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Many changes to reduce complaints from CppCheck. Several latent bugs fixes, but probably some new typos introduced

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This commit is contained in:
Gregory Nutt
2014-02-10 18:08:49 -06:00
parent 8b1d3f6698
commit 91b002a043
82 changed files with 1932 additions and 1594 deletions
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ChangeLog
+3
View File
@@ -6570,3 +6570,6 @@
for the MIO283QT9A LCD. From Toby Duckworth (2014-2-10).
* configs/mikroe-stm32f4/src/up_mio283qt9a.c: The Mikroe STM32F4 can
now support the newer MIO283QT9A LCD. From Toby Duckworth (2014-2-10).
* MANY files changes based on complaints from the tool CppCheck. Several
latent bugs were fixed (and most likely some new typos were introducted)
(2014-2-10).
arch/arm/src/c5471/c5471_irq.c
+1 -1
View File
@@ -228,7 +228,7 @@ void up_enable_irq(int irq)
void up_maskack_irq(int irq)
{
uint32_t reg = getreg32(INT_CTRL_REG);
uint32_t reg;
/* Mask the interrupt */
arch/arm/src/c5471/c5471_watchdog.c
+1 -1
View File
@@ -261,7 +261,7 @@ static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
dbg("buflen=%d\n", buflen);
if (buflen >= 18)
{
sprintf(buffer, "#08x %08x\n", c5471_wdt_cntl, c5471_wdt_count);
sprintf(buffer, "%08x %08x\n", c5471_wdt_cntl, c5471_wdt_count);
return 18;
}
return 0;
arch/arm/src/common/up_allocateheap.c
-4
View File
@@ -112,7 +112,6 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
uintptr_t ubase = (uintptr_t)USERSPACE->us_bssend + CONFIG_MM_KERNEL_HEAPSIZE;
size_t usize = CONFIG_RAM_END - ubase;
int log2;
DEBUGASSERT(ubase < (uintptr_t)CONFIG_RAM_END);
@@ -151,9 +150,6 @@ void up_allocate_kheap(FAR void **heap_start, size_t *heap_size)
*/
uintptr_t ubase = (uintptr_t)USERSPACE->us_bssend + CONFIG_MM_KERNEL_HEAPSIZE;
size_t usize = CONFIG_RAM_END - ubase;
int log2;
DEBUGASSERT(ubase < (uintptr_t)CONFIG_RAM_END);
/* Return the kernel heap settings (i.e., the part of the heap region
arch/arm/src/dm320/dm320_framebuffer.c
+2 -4
View File
@@ -1254,7 +1254,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
attrib->size.w = getreg16(DM320_OSD_CURXL);
attrib->size.h = getreg16(DM320_OSD_CURYL);
#endif
irqrestore();
irqrestore(flags);
attrib->mxsize.w = MAX_XRES;
attrib->mxsize.h = MAX_YRES;
@@ -1325,10 +1325,8 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
settings->size.h = MAX_YRES;
}
flags = irqsave();
putreg16(settings->size.w, DM320_OSD_CURXL);
putreg16(settings->size.h, DM320_OSD_CURYL);
restore_flags(flags);
}
#endif
@@ -1342,7 +1340,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
regval &= ~1;
}
putreg16(regval, DM320_OSD_RECTCUR);
restore_flags(flags);
irqrestore(flags);
gvdbg("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
gvdbg("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
arch/arm/src/dm320/dm320_usbdev.c
+1 -1
View File
@@ -1761,7 +1761,7 @@ static inline void dm320_epinitialize(struct dm320_usbdev_s *priv)
/* FIFO address, max packet size, dual/single buffered */
dm320_putreg8(addrhi, DM320_USB_TXFIFO1);
dm320_putreg8(addrlo, DM320_USB_TXFIFO1);
dm320_putreg8(addrhi|g_epinfo[i].fifo, DM320_USB_TXFIFO2);
/* TX endpoint max packet size */
arch/arm/src/imx/imx_serial.c
+2
View File
@@ -879,8 +879,10 @@ static int up_interrupt(int irq, void *context)
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
#endif
int ret = OK;
switch (cmd)
arch/arm/src/imx/imx_spi.c
+2 -2
View File
@@ -500,10 +500,10 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
{
#ifndef CONFIG_SPI_POLLWAIT
irqstate_t flags;
#endif
uint32_t regval;
int ntxd;
int ret;
#endif
int ntxd;
/* Set up to perform the transfer */
arch/arm/src/kl/kl_serial.c
+1 -1
View File
@@ -709,7 +709,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
}
else
{
priv->ie |= UART_C2_RIE;
priv->ie &= ~UART_C2_RIE;
up_setuartint(priv);
}
arch/arm/src/lm/lm_start.c
+2
View File
@@ -100,7 +100,9 @@ extern void _vectors(void);
void __start(void)
{
#ifdef CONFIG_BOOT_RUNFROMFLASH
const uint32_t *src;
#endif
uint32_t *dest;
/* Configure the uart so that we can get debug output as soon as possible */
arch/arm/src/lpc31xx/lpc31_i2c.c
+254 -214
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/sam34/sam4l_gpio.c
+4 -4
View File
@@ -214,7 +214,7 @@ static inline int sam_configinterrupt(uintptr_t base, uint32_t pin,
* 11 Reserved
*/
gpio_pinset_t edges = cfgset & GPIO_INT_MASK;
gpio_pinset_t edges = (cfgset & GPIO_INT_MASK);
if (edges == GPIO_INT_RISING)
{
@@ -398,16 +398,16 @@ static inline int sam_configperiph(uintptr_t base, uint32_t pin,
* 11 Reserved
*/
edges = cfgset & GPIO_INT_MASK;
edges = (cfgset & GPIO_INT_MASK);
if (edges == GPIO_INT_RISING)
{
/* Rising only.. disable interrrupts on the falling edge */
/* Rising only.. disable interrupts on the falling edge */
putreg32(pin, base + SAM_GPIO_IMR0S_OFFSET);
}
else if (edges == GPIO_INT_FALLING)
{
/* Falling only.. disable interrrupts on the rising edge */
/* Falling only.. disable interrupts on the rising edge */
putreg32(pin, base + SAM_GPIO_IMR1S_OFFSET);
}
arch/arm/src/stm32/stm32_dumpgpio.c
-2
View File
@@ -109,12 +109,10 @@ int stm32_dumpgpio(uint32_t pinset, const char *msg)
irqstate_t flags;
uint32_t base;
unsigned int port;
unsigned int pin;
/* Get the base address associated with the GPIO port */
port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
base = g_gpiobase[port];
/* The following requires exclusive access to the GPIO registers */
arch/arm/src/str71x/str71x_serial.c
+2
View File
@@ -753,8 +753,10 @@ static int up_interrupt(int irq, void *context)
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
#endif
int ret = OK;
switch (cmd)
arch/avr/src/avr/up_checkstack.c
+6 -1
View File
@@ -82,7 +82,10 @@ size_t up_check_tcbstack(FAR struct tcb_s *tcb)
{
FAR uint8_t *ptr;
size_t mark;
int i, j;
#if 0
int i;
int j;
#endif
/* The AVR uses a push-down stack: the stack grows toward lower addresses
* in memory. We need to start at the lowest address in the stack memory
@@ -121,8 +124,10 @@ size_t up_check_tcbstack(FAR struct tcb_s *tcb)
{
ch = 'X';
}
up_putc(ch);
}
up_putc('\n');
}
}
arch/hc/src/m9s12/m9s12_ethernet.c
+1 -1
View File
@@ -291,7 +291,7 @@ static void emac_receive(FAR struct emac_driver_s *priv)
}
}
}
while (); /* While there are more packets to be processed */
while (true); /* While there are more packets to be processed */
}
/****************************************************************************
arch/sim/src/up_touchscreen.c
+1 -1
View File
@@ -534,7 +534,7 @@ static int up_poll(FAR struct file *filep, FAR struct pollfd *fds,
{
FAR struct inode *inode;
FAR struct up_dev_s *priv;
int ret = OK;
int ret;
int i;
ivdbg("setup: %d\n", (int)setup);
arch/z16/src/z16f/z16f_serial.c
+1 -3
View File
@@ -302,8 +302,7 @@ static uint8_t z16f_disableuartirq(struct uart_dev_s *dev)
static void z16f_restoreuartirq(struct uart_dev_s *dev, uint8_t state)
{
struct z16f_uart_s *priv = (struct z16f_uart_s*)dev->priv;
irqstate_t flags = irqsave();
irqstate_t flags = irqsave();
z16f_txint(dev, (state & STATE_TXENABLED) ? true : false);
z16f_rxint(dev, (state & STATE_RXENABLED) ? true : false);
@@ -400,7 +399,6 @@ static int z16f_setup(struct uart_dev_s *dev)
static void z16f_shutdown(struct uart_dev_s *dev)
{
struct z16f_uart_s *priv = (struct z16f_uart_s*)dev->priv;
(void)z16f_disableuartirq(dev);
}
arch/z80/src/ez80/ez80_i2c.c
-1
View File
@@ -393,7 +393,6 @@ static void i2c_stop(void)
static int i2c_sendaddr(struct ez80_i2cdev_s *priv, uint8_t readbit)
{
uint8_t sr;
int ret = OK;
/* Wait for the IFLG bit to transition to 1. At this point, we should
* have status == 8 meaning that the start bit was sent successfully.
arch/z80/src/ez80/ez80_spi.c
+2 -3
View File
@@ -284,7 +284,7 @@ static uint8_t spi_waitspif(void)
* Name: spi_transfer
*
* Description:
* Send one byte on SPI, return th response
* Send one byte on SPI, return the response
*
* Input Parameters:
* ch - the byte to send
@@ -361,7 +361,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
FAR const uint8_t *ptr = (FAR const uint8_t*)buffer;
uint8_t response;
/* Loop while thre are bytes remaining to be sent */
/* Loop while there are bytes remaining to be sent */
while (buflen-- > 0)
{
@@ -392,7 +392,6 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *buffer,
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer, size_t buflen)
{
FAR uint8_t *ptr = (FAR uint8_t*)buffer;
uint8_t response;
/* Loop while thre are bytes remaining to be sent */
arch/z80/src/z180/z180_mmu.c
-1
View File
@@ -438,7 +438,6 @@ int up_addrenv_destroy(task_addrenv_t addrenv)
int up_addrenv_assign(task_addrenv_t addrenv, FAR struct tcb_s *tcb)
{
FAR struct z180_cbr_s *cbr = (FAR struct z180_cbr_s *)addrenv;
int ret;
/* Make sure that there is no address environment in place on this TCB */
arch/z80/src/z8/z8_serial.c
+2 -5
View File
@@ -284,8 +284,7 @@ static uint8_t z8_disableuartirq(FAR struct uart_dev_s *dev)
static void z8_restoreuartirq(FAR struct uart_dev_s *dev, uint8_t state)
{
struct z8_uart_s *priv = (struct z8_uart_s*)dev->priv;
irqstate_t flags = irqsave();
irqstate_t flags = irqsave();
z8_txint(dev, (state & STATE_TXENABLED) ? true : false);
z8_rxint(dev, (state & STATE_RXENABLED) ? true : false);
@@ -322,8 +321,7 @@ static void z8_consoleput(uint8_t ch)
void z8_uartconfigure(void)
{
uint16_t brg;
uint8_t val;
uint8_t val;
/* Configure GPIO Port A pins 4 & 5 for alternate function */
@@ -421,7 +419,6 @@ static int z8_setup(FAR struct uart_dev_s *dev)
static void z8_shutdown(FAR struct uart_dev_s *dev)
{
struct z8_uart_s *priv = (struct z8_uart_s*)dev->priv;
(void)z8_disableuartirq(dev);
}
binfmt/libelf/libelf_sections.c
+3 -2
View File
@@ -124,12 +124,13 @@ static inline int elf_sectname(FAR struct elf_loadinfo_s *loadinfo,
readlen = loadinfo->buflen - bytesread;
if (offset + readlen > loadinfo->filelen)
{
readlen = loadinfo->filelen - offset;
if (readlen <= 0)
if (loadinfo->filelen <= offset)
{
bdbg("At end of file\n");
return -EINVAL;
}
readlen = loadinfo->filelen - offset;
}
/* Read that number of bytes into the array */
binfmt/libelf/libelf_symbols.c
+3 -2
View File
@@ -110,12 +110,13 @@ static int elf_symname(FAR struct elf_loadinfo_s *loadinfo,
readlen = loadinfo->buflen - bytesread;
if (offset + readlen > loadinfo->filelen)
{
readlen = loadinfo->filelen - offset;
if (readlen <= 0)
if (loadinfo->filelen <= offset)
{
bdbg("At end of file\n");
return -EINVAL;
}
readlen = loadinfo->filelen - offset;
}
/* Read that number of bytes into the array */
binfmt/libnxflat/libnxflat_init.c
-2
View File
@@ -97,7 +97,6 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
{
uint32_t datastart;
uint32_t dataend;
uint32_t bssstart;
uint32_t bssend;
int ret;
@@ -152,7 +151,6 @@ int nxflat_init(const char *filename, struct nxflat_loadinfo_s *loadinfo)
datastart = ntohl(loadinfo->header.h_datastart);
dataend = ntohl(loadinfo->header.h_dataend);
bssstart = dataend;
bssend = ntohl(loadinfo->header.h_bssend);
/* And put this information into the loadinfo structure as well.
configs/lpc4330-xplorer/src/up_nsh.c
+1 -1
View File
@@ -103,7 +103,7 @@ static int nsh_spifi_initialize(void)
return ret;
}
#else
/* Initialize to provide NXFFS on the MTD interface */1G
/* Initialize to provide NXFFS on the MTD interface */
ret = nxffs_initialize(mtd);
if (ret < 0)
configs/mikroe-stm32f4/src/up_clockconfig.c
+1 -1
View File
@@ -109,7 +109,7 @@ void stm32_board_clockconfig(void)
regval |= STM32_RCC_CFGR_PPRE1;
putreg32(regval, STM32_RCC_CFGR);
/* Set the PLL dividers and multiplers to configure the main PLL */
/* Set the PLL dividers and multipliers to configure the main PLL */
regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP |
RCC_PLLCFG_PLLSRC_HSI | STM32_PLLCFG_PLLQ);
configs/mikroe-stm32f4/src/up_nsh.c
-3
View File
@@ -181,9 +181,6 @@
int nsh_archinitialize(void)
{
#if defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR)
int ret;
#endif
#ifdef CONFIG_STM32_SPI3
FAR struct spi_dev_s *spi;
FAR struct mtd_dev_s *mtd;
configs/mx1ads/src/up_boot.c
+1 -1
View File
@@ -81,7 +81,7 @@ void imx_boardinitialize(void)
(IMX_CSCR_USBDIV << PLL_CSCR_USBDIV_SHIFT) | /* USB divider */
CSCR_SDCNT_4thEDGE | /* Shutdown on 4th edge */
(IMX_CSCR_BCLKDIV << PLL_CSCR_BCLKDIV_SHIFT) | /* Bclock divider */
PLL_CSCR_SPEN | PLL_CSCR_MPEN); /* Enable MUC and System PLL */
PLL_CSCR_SPEN | PLL_CSCR_MPEN); /* Enable MUC and System PLL */
putreg32(regval, IMX_PLL_CSCR);
/* Use these new frequencies now */
configs/olimex-strp711/src/up_nsh.c
+1 -2
View File
@@ -125,11 +125,10 @@
int nsh_archinitialize(void)
{
#ifdef NSH_HAVEMMCSD
FAR struct spi_dev_s *spi;
int ret;
#ifdef NSH_HAVEMMCSD
/* Get the SPI port */
message("nsh_archinitialize: Initializing SPI port %d\n",
configs/pic32mx7mmb/src/up_touchscreen.c
-3
View File
@@ -1365,9 +1365,6 @@ int arch_tcinitialize(int minor)
{
FAR struct tc_dev_s *priv;
char devname[DEV_NAMELEN];
#ifdef CONFIG_TOUCHSCREEN_MULTIPLE
irqstate_t flags;
#endif
int ret;
ivdbg("minor: %d\n", minor);
configs/px4fmu-v2_upstream/src/px4fmu2_init.c
+2
View File
@@ -195,7 +195,9 @@ void stm32_boardinitialize(void)
int nsh_archinitialize(void)
{
#ifdef CONFIG_MMCSD
int ret;
#endif
/* Configure ADC pins */
configs/sam4l-xplained/src/sam_buttons.c
+1
View File
@@ -147,6 +147,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
sam_gpioirq(IRQ_SW0);
(void)irq_attach(IRQ_SW0, irqhandler);
sam_gpioirqenable(IRQ_SW0);
irqrestore(flags);
}
/* Return the old button handler (so that it can be restored) */
configs/sam4s-xplained/src/sam_buttons.c
+1
View File
@@ -145,6 +145,7 @@ xcpt_t board_button_irq(int id, xcpt_t irqhandler)
sam_gpioirq(IRQ_BP2);
(void)irq_attach(IRQ_BP2, irqhandler);
sam_gpioirqenable(IRQ_BP2);
irqrestore(flags);
}
/* Return the old button handler (so that it can be restored) */
configs/skp16c26/src/up_lcd.c
+2 -1
View File
@@ -116,6 +116,7 @@ static inline void up_setrs(bool data)
{
regval &= ~(1 << 0); /* Low = control */
}
putreg8(regval, M16C_P6);
}
@@ -128,7 +129,7 @@ static inline void up_seten(void)
/* Set bit 1 of port 6 */
register uint8_t regval = getreg8(M16C_P6);
regval = (1 << 1);
regval |= (1 << 1);
putreg8(regval, M16C_P6);
}
configs/stm32ldiscovery/src/stm32_nsh.c
+4 -6
View File
@@ -82,13 +82,11 @@
int nsh_archinitialize(void)
{
int ret = OK;
#ifdef CONFIG_STM32_LCD
/* Initialize the SLCD and register the SLCD device as /dev/slcd */
#ifdef CONFIG_STM32_LCD
ret = stm32_slcd_initialize();
return stm32_slcd_initialize();
#else
return OK;
#endif
return ret;
}
configs/twr-k60n512/src/up_buttons.c
+1 -1
View File
@@ -135,7 +135,7 @@ uint8_t board_buttons(void)
#ifdef CONFIG_ARCH_IRQBUTTONS
xcpt_t board_button_irq(int id, xcpt_t irqhandler)
{
xcpt_t oldhandler = NULL;
xcpt_t oldhandler;
uint32_t pinset;
/* Map the button id to the GPIO bit set. */
configs/us7032evb1/shterm/shterm.c
+4 -2
View File
@@ -110,6 +110,7 @@ static void putconsole(char ch)
{
(void)putc(ch, g_logstream);
}
(void)putchar(ch);
}
@@ -139,6 +140,7 @@ static void printconsole(const char *fmt, ...)
{
(void)vfprintf(g_logstream, fmt, ap);
}
(void)vprintf(fmt, ap);
va_end(ap);
}
@@ -435,7 +437,7 @@ static void close_tty(void)
(void)close(g_fd);
}
if (g_logstream >= 0)
if (g_logstream)
{
(void)fclose(g_logstream);
}
@@ -717,7 +719,7 @@ int main(int argc, char **argv, char **envp)
{
sendfile(g_fd, filename, 0);
}
else if (ch1 == 'v' || ch1 == 'v')
else if (ch1 == 'v' || ch1 == 'V')
{
sendfile(g_fd, filename, 1);
}
drivers/analog/adc.c
+3 -3
View File
@@ -362,9 +362,9 @@ static ssize_t adc_write(FAR struct file *filep, FAR const char *buffer, size_t
static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
FAR struct inode *inode = filep->f_inode;
FAR struct adc_dev_s *dev = inode->i_private;
int ret = OK;
FAR struct inode *inode = filep->f_inode;
FAR struct adc_dev_s *dev = inode->i_private;
int ret;
ret = dev->ad_ops->ao_ioctl(dev, cmd, arg);
return ret;
drivers/analog/ads1255.c
+128 -114
View File
@@ -107,14 +107,14 @@
struct up_dev_s
{
uint8_t channel;
uint32_t sps;
uint8_t pga;
uint8_t buf;
const uint8_t *mux;
int irq;
int devno;
FAR struct spi_dev_s *spi; /* Cached SPI device reference */
uint8_t channel;
uint32_t sps;
uint8_t pga;
uint8_t buf;
const uint8_t *mux;
int irq;
int devno;
FAR struct spi_dev_s *spi; /* Cached SPI device reference */
};
/****************************************************************************
@@ -136,28 +136,28 @@ static int adc_interrupt(int irq, void *context);
static const struct adc_ops_s g_adcops =
{
.ao_reset = adc_reset, /* ao_reset */
.ao_setup = adc_setup, /* ao_setup */
.ao_shutdown = adc_shutdown, /* ao_shutdown */
.ao_rxint = adc_rxint, /* ao_rxint */
.ao_ioctl = adc_ioctl /* ao_read */
.ao_reset = adc_reset, /* ao_reset */
.ao_setup = adc_setup, /* ao_setup */
.ao_shutdown = adc_shutdown, /* ao_shutdown */
.ao_rxint = adc_rxint, /* ao_rxint */
.ao_ioctl = adc_ioctl /* ao_read */
};
static struct up_dev_s g_adcpriv =
{
.mux = (const uint8_t [])
{
CONFIG_ADS1255_MUX,0
},
.sps = CONFIG_ADS1255_SPS,
.channel = 0,
.irq = CONFIG_ADS1255_IRQ,
.mux = (const uint8_t [])
{
CONFIG_ADS1255_MUX,0
},
.sps = CONFIG_ADS1255_SPS,
.channel = 0,
.irq = CONFIG_ADS1255_IRQ,
};
static struct adc_dev_s g_adcdev =
{
.ad_ops = &g_adcops,
.ad_priv= &g_adcpriv,
.ad_ops = &g_adcops,
.ad_priv= &g_adcpriv,
};
/****************************************************************************
@@ -166,141 +166,155 @@ static struct adc_dev_s g_adcdev =
static uint8_t getspsreg(uint16_t sps)
{
static const unsigned short sps_tab[]=
static const unsigned short sps_tab[]=
{
3,7,12,20,27,40,55,80,300,750,1500,3000,5000,10000,20000,65535,
};
static const unsigned char sps_reg[]=
{
0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x72,0x82,0x92,0xa1,0xb0,0xc0,0xd0,0xe0,0xf0,
};
int i;
for (i=0; i<16; i++)
{
3,7,12,20,27,40,55,80,300,750,1500,3000,5000,10000,20000,65535,
};
static const unsigned char sps_reg[]=
{
0x03,0x13,0x23,0x33,0x43,0x53,0x63,0x72,0x82,0x92,0xa1,0xb0,0xc0,0xd0,0xe0,0xf0,
};
int i;
for (i=0; i<16; i++)
{
if (sps<sps_tab[i])
break;
if (sps<sps_tab[i])
{
break;
}
}
return sps_reg[i];
return sps_reg[i];
}
/****************************************************************************
* ad_private Functions
****************************************************************************/
/* Reset the ADC device. Called early to initialize the hardware. This
* is called, before ao_setup() and on error conditions.
*/
* is called, before ao_setup() and on error conditions.
*/
static void adc_reset(FAR struct adc_dev_s *dev)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
FAR struct spi_dev_s *spi = priv->spi;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
FAR struct spi_dev_s *spi = priv->spi;
SPI_SETMODE(spi, SPIDEV_MODE1);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, CONFIG_ADS1255_FREQUENCY);
usleep(1000);
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_WREG+0x03); //WRITE SPS REG
SPI_SEND(spi,0x00); //count=1
SPI_SEND(spi,0x63);
SPI_SELECT(spi, priv->devno, false);
SPI_SETMODE(spi, SPIDEV_MODE1);
SPI_SETBITS(spi, 8);
SPI_SETFREQUENCY(spi, CONFIG_ADS1255_FREQUENCY);
usleep(1000);
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_WREG+0x03); /* WRITE SPS REG */
SPI_SEND(spi,0x00); /* count=1 */
SPI_SEND(spi,0x63);
SPI_SELECT(spi, priv->devno, false);
}
/* Configure the ADC. This method is called the first time that the ADC
* device is opened. This will occur when the port is first opened.
* This setup includes configuring and attaching ADC interrupts. Interrupts
* are all disabled upon return.
*/
* device is opened. This will occur when the port is first opened.
* This setup includes configuring and attaching ADC interrupts. Interrupts
* are all disabled upon return.
*/
static int adc_setup(FAR struct adc_dev_s *dev)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
FAR struct spi_dev_s *spi = priv->spi;
int ret = irq_attach(priv->irq, adc_interrupt);
if (ret == OK)
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
FAR struct spi_dev_s *spi = priv->spi;
int ret = irq_attach(priv->irq, adc_interrupt);
if (ret == OK)
{
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_WREG); //WRITE REG from 0
SPI_SEND(spi,0x03); //count=4+1
if (priv->buf)
SPI_SEND(spi,ADS125X_BUFON); //REG0 STATUS BUFFER ON
else
SPI_SEND(spi,ADS125X_BUFOFF);
SPI_SEND(spi,priv->mux[0]);
SPI_SEND(spi,priv->pga); //REG2 ADCON PGA=2
SPI_SEND(spi,getspsreg(priv->sps));
usleep(1000);
SPI_SEND(spi,ADS125X_SELFCAL);
SPI_SELECT(spi, priv->devno, false);
up_enable_irq(priv->irq);
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_WREG); /* WRITE REG from 0 */
SPI_SEND(spi,0x03); /* count=4+1 */
if (priv->buf)
{
SPI_SEND(spi,ADS125X_BUFON); /* REG0 STATUS BUFFER ON */
}
else
{
SPI_SEND(spi,ADS125X_BUFOFF);
}
SPI_SEND(spi,priv->mux[0]);
SPI_SEND(spi,priv->pga); /* REG2 ADCON PGA=2 */
SPI_SEND(spi,getspsreg(priv->sps));
usleep(1000);
SPI_SEND(spi,ADS125X_SELFCAL);
SPI_SELECT(spi, priv->devno, false);
up_enable_irq(priv->irq);
}
return ret;
return ret;
}
/* Disable the ADC. This method is called when the ADC device is closed.
* This method reverses the operation the setup method.
*/
* This method reverses the operation the setup method.
*/
static void adc_shutdown(FAR struct adc_dev_s *dev)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
up_disable_irq(priv->irq);
irq_detach(priv->irq);
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
up_disable_irq(priv->irq);
irq_detach(priv->irq);
}
/* Call to enable or disable RX interrupts */
static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
if (enable)
up_enable_irq(priv->irq);
else
up_disable_irq(priv->irq);
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv;
if (enable)
{
up_enable_irq(priv->irq);
}
else
{
up_disable_irq(priv->irq);
}
}
/* All ioctl calls will be routed through this method */
static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
{
dbg("Fix me:Not Implemented\n");
return 0;
dbg("Fix me:Not Implemented\n");
return 0;
}
static int adc_interrupt(int irq, void *context)
{
uint32_t regval;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv;
FAR struct spi_dev_s *spi = priv->spi;
unsigned char buf[4];
unsigned char ch;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv;
FAR struct spi_dev_s *spi = priv->spi;
unsigned char buf[4];
unsigned char ch;
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_RDATA);
up_udelay(10);
buf[3]=SPI_SEND(spi,0xff);
buf[2]=SPI_SEND(spi,0xff);
buf[1]=SPI_SEND(spi,0xff);
buf[0]=0;
SPI_SELECT(spi, priv->devno, true);
SPI_SEND(spi,ADS125X_RDATA);
up_udelay(10);
buf[3]=SPI_SEND(spi,0xff);
buf[2]=SPI_SEND(spi,0xff);
buf[1]=SPI_SEND(spi,0xff);
buf[0]=0;
priv->channel++;
ch = priv->mux[priv->channel];
if ( ch == 0 )
priv->channel++;
ch = priv->mux[priv->channel];
if ( ch == 0 )
{
priv->channel=0;
ch = priv->mux[0];
priv->channel=0;
ch = priv->mux[0];
}
SPI_SEND(spi,ADS125X_WREG+0x01);
SPI_SEND(spi,0x00);
SPI_SEND(spi,ch);
SPI_SEND(spi,ADS125X_SYNC);
up_udelay(2);
SPI_SEND(spi,ADS125X_WAKEUP);
SPI_SELECT(spi, priv->devno, false);
SPI_SEND(spi,ADS125X_WREG+0x01);
SPI_SEND(spi,0x00);
SPI_SEND(spi,ch);
SPI_SEND(spi,ADS125X_SYNC);
up_udelay(2);
SPI_SEND(spi,ADS125X_WAKEUP);
SPI_SELECT(spi, priv->devno, false);
adc_receive(&g_adcdev,priv->channel,*(int32_t *)buf);
return OK;
adc_receive(&g_adcdev,priv->channel,*(int32_t *)buf);
return OK;
}
/****************************************************************************
@@ -323,13 +337,13 @@ static int adc_interrupt(int irq, void *context)
FAR struct adc_dev_s *up_ads1255initialize(FAR struct spi_dev_s *spi, unsigned int devno)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv;
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv;
/* Driver state data */
/* Driver state data */
priv->spi = spi;
priv->devno = devno;
return &g_adcdev;
priv->spi = spi;
priv->devno = devno;
return &g_adcdev;
}
#endif
drivers/analog/dac.c
+63 -45
View File
@@ -68,7 +68,6 @@
#define HALF_SECOND_MSEC 500
#define HALF_SECOND_USEC 500000L
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
@@ -155,11 +154,14 @@ static int dac_open(FAR struct file *filep)
dev->ad_ocount = tmp;
}
irqrestore(flags);
}
}
sem_post(&dev->ad_closesem);
}
return ret;
}
@@ -220,6 +222,7 @@ static int dac_close(FAR struct file *filep)
sem_post(&dev->ad_closesem);
}
}
return ret;
}
@@ -260,6 +263,7 @@ static int dac_xmit(FAR struct dac_dev_s *dev)
enable = (ret == OK ? true : false);
}
dev->ad_ops->ao_txint(dev, enable);
return ret;
}
@@ -274,7 +278,7 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
FAR struct dac_dev_s *dev = inode->i_private;
FAR struct dac_fifo_s *fifo = &dev->ad_xmit;
FAR struct dac_msg_s *msg;
bool empty = false;
bool empty;
ssize_t nsent = 0;
irqstate_t flags;
int nexttail;
@@ -295,18 +299,30 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
* shorter than the minimum.
*/
if (buflen % 5 ==0 )
msglen=5;
else if (buflen % 4 ==0 )
msglen=4;
else if (buflen % 3 ==0 )
msglen=3;
else if (buflen % 2 ==0 )
msglen=2;
if (buflen % 5 == 0 )
{
msglen = 5;
}
else if (buflen % 4 == 0)
{
msglen = 4;
}
else if (buflen % 3 == 0)
{
msglen = 3;
}
else if (buflen % 2 == 0)
{
msglen = 2;
}
else if (buflen == 1)
msglen=1;
{
msglen = 1;
}
else
msglen=5;
{
msglen = 5;
}
while ((buflen - nsent) >= msglen )
{
@@ -336,6 +352,7 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
{
ret = nsent;
}
goto return_with_irqdisabled;
}
@@ -370,35 +387,36 @@ static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t
* CAN message at the tail of the FIFO.
*/
if (msglen==5)
{
msg = (FAR struct dac_msg_s *)&buffer[nsent];
memcpy(&fifo->af_buffer[fifo->af_tail], msg, msglen);
}
else if(msglen == 4)
{
fifo->af_buffer[fifo->af_tail].am_channel=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data=*(uint32_t *)&buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data&=0xffffff00;
}
else if(msglen == 3)
{
fifo->af_buffer[fifo->af_tail].am_channel=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data=(*(uint16_t *)&buffer[nsent+1]);
fifo->af_buffer[fifo->af_tail].am_data<<=16;
}
else if(msglen == 2)
{
fifo->af_buffer[fifo->af_tail].am_channel=0;
fifo->af_buffer[fifo->af_tail].am_data=(*(uint16_t *)&buffer[nsent]);
fifo->af_buffer[fifo->af_tail].am_data<<=16;
}
else if(msglen == 1)
{
fifo->af_buffer[fifo->af_tail].am_channel=0;
fifo->af_buffer[fifo->af_tail].am_data=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data<<=24;
}
if (msglen == 5)
{
msg = (FAR struct dac_msg_s *)&buffer[nsent];
memcpy(&fifo->af_buffer[fifo->af_tail], msg, msglen);
}
else if (msglen == 4)
{
fifo->af_buffer[fifo->af_tail].am_channel=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data=*(uint32_t *)&buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data&=0xffffff00;
}
else if(msglen == 3)
{
fifo->af_buffer[fifo->af_tail].am_channel=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data=(*(uint16_t *)&buffer[nsent+1]);
fifo->af_buffer[fifo->af_tail].am_data<<=16;
}
else if(msglen == 2)
{
fifo->af_buffer[fifo->af_tail].am_channel=0;
fifo->af_buffer[fifo->af_tail].am_data=(*(uint16_t *)&buffer[nsent]);
fifo->af_buffer[fifo->af_tail].am_data<<=16;
}
else if(msglen == 1)
{
fifo->af_buffer[fifo->af_tail].am_channel=0;
fifo->af_buffer[fifo->af_tail].am_data=buffer[nsent];
fifo->af_buffer[fifo->af_tail].am_data<<=24;
}
/* Increment the tail of the circular buffer */
fifo->af_tail = nexttail;
@@ -432,9 +450,9 @@ return_with_irqdisabled:
static int dac_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
FAR struct inode *inode = filep->f_inode;
FAR struct dac_dev_s *dev = inode->i_private;
int ret = OK;
FAR struct inode *inode = filep->f_inode;
FAR struct dac_dev_s *dev = inode->i_private;
int ret;
ret = dev->ad_ops->ao_ioctl(dev, cmd, arg);
return ret;
@@ -480,6 +498,7 @@ int dac_txdone(FAR struct dac_dev_s *dev)
ret = sem_post(&dev->ad_xmit.af_sem);
}
}
return ret;
}
@@ -496,4 +515,3 @@ int dac_register(FAR const char *path, FAR struct dac_dev_s *dev)
return register_driver(path, &dac_fops, 0555, dev);
}
drivers/audio/vs1053.c
+6 -3
View File
@@ -1255,9 +1255,12 @@ static void *vs1053_workerthread(pthread_addr_t pvarg)
{
FAR struct vs1053_struct_s *dev = (struct vs1053_struct_s *) pvarg;
struct audio_msg_s msg;
FAR struct ap_buffer_s *pBuf;
int size, prio;
FAR struct ap_buffer_s *pBuf;
int size;
int prio;
#ifndef CONFIG_AUDIO_EXCLUDE_STOP
uint16_t reg;
#endif
uint8_t timeout;
auddbg("Entry\n");
@@ -1454,7 +1457,7 @@ static int vs1053_start(FAR struct audio_lowerhalf_s *lower)
/* Pop the first enqueued buffer */
if ((ret = (sem_wait(&dev->apbq_sem)) == OK))
if ((ret = sem_wait(&dev->apbq_sem)) == OK)
{
dev->pBuf = (FAR struct ap_buffer_s *) dq_remfirst(&dev->apbq);
apb_reference(dev->pBuf); /* Add our buffer reference */
drivers/input/ads7843e.c
+3 -3
View File
@@ -1080,10 +1080,10 @@ static int ads7843e_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
static int ads7843e_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup)
{
FAR struct inode *inode;
FAR struct inode *inode;
FAR struct ads7843e_dev_s *priv;
int ret = OK;
int i;
int ret;
int i;
ivdbg("setup: %d\n", (int)setup);
DEBUGASSERT(filep && fds);
drivers/input/max11802.c
+3 -5
View File
@@ -1061,12 +1061,10 @@ static int max11802_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
static int max11802_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup)
{
FAR struct inode *inode;
FAR struct inode *inode;
FAR struct max11802_dev_s *priv;
pollevent_t eventset;
int ndx;
int ret = OK;
int i;
int ret;
int i;
ivdbg("setup: %d\n", (int)setup);
DEBUGASSERT(filep && fds);
drivers/input/stmpe811_gpio.c
+2 -1
View File
@@ -381,7 +381,7 @@ int stmpe811_gpioattach(STMPE811_HANDLE handle, uint8_t pinconfig,
{
/* Enable interrupts for this GPIO */
regval &= ~GPIO_PIN(pin);
regval |= GPIO_PIN(pin);
}
else
{
@@ -389,6 +389,7 @@ int stmpe811_gpioattach(STMPE811_HANDLE handle, uint8_t pinconfig,
regval &= ~GPIO_PIN(pin);
}
stmpe811_putreg8(priv, STMPE811_GPIO_EN, regval);
sem_post(&priv->exclsem);
drivers/input/stmpe811_tsc.c
+2 -2
View File
@@ -769,7 +769,7 @@ static void stmpe811_timeout(int argc, uint32_t arg1, ...)
/* Are we still stuck in the pen down state? */
if (priv->sample.contact == CONTACT_MOVE ||
if (priv->sample.contact == CONTACT_DOWN ||
priv->sample.contact == CONTACT_MOVE)
{
/* Yes... is the worker thread available? If not, then apparently
@@ -1127,7 +1127,7 @@ void stmpe811_tscworker(FAR struct stmpe811_dev_s *priv, uint8_t intsta)
*/
ignored:
if (priv->sample.contact == CONTACT_MOVE ||
if (priv->sample.contact == CONTACT_DOWN ||
priv->sample.contact == CONTACT_MOVE)
{
(void)wd_start(priv->wdog, STMPE811_PENUP_TICKS, stmpe811_timeout,
drivers/lcd/st7567.c
+1 -2
View File
@@ -455,12 +455,11 @@ static int st7567_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buff
FAR struct st7567_dev_s *priv = &g_st7567dev;
FAR uint8_t *fbptr;
FAR uint8_t *ptr;
uint8_t devcol;
uint8_t fbmask;
uint8_t page;
uint8_t usrmask;
uint8_t i;
int pixlen;
int pixlen;
gvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
DEBUGASSERT(buffer);
drivers/mtd/mtd_config.c
+1 -1
View File
@@ -905,7 +905,7 @@ static int mtdconfig_open(FAR struct file *filep)
{
FAR struct inode *inode = filep->f_inode;
FAR struct mtdconfig_struct_s *dev = inode->i_private;
int ret = OK;
int ret;
/* Get exclusive access to the device */
drivers/net/dm90x0.c
+1 -1
View File
@@ -908,7 +908,7 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
mdrah = getreg(DM9X_MDRAH);
mdral = getreg(DM9X_MDRAL);
getreg(DM9X_MRCMDX); /* Dummy read */
getreg(DM9X_MRCMDX); /* Dummy read */
rxbyte = (uint8_t)DM9X_DATA; /* Get the most up-to-date data */
/* Packet ready for receive check */
drivers/net/e1000.c
+624 -507
View File
File diff suppressed because it is too large Load Diff

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