From f4fa4799f76572ef0c77d2076b6aa22178f5bbee Mon Sep 17 00:00:00 2001
From: Sebastien Lorquet <sebastien@lorquet.fr>
Date: Tue, 10 May 2016 11:09:15 -0600
Subject: [PATCH 01/33] Add a driver for SST26F spi/qspi flash devices (SPI
 mode only)

---
 drivers/mtd/Kconfig     |  33 ++
 drivers/mtd/Make.defs   |   4 +
 drivers/mtd/sst26.c     | 946 ++++++++++++++++++++++++++++++++++++++++
 include/nuttx/mtd/mtd.h |  12 +
 4 files changed, 995 insertions(+)
 create mode 100644 drivers/mtd/sst26.c

diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 3a3b8b77094..89f130ccb16 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -783,6 +783,39 @@ config SST25XX_MEMORY_TYPE
 
 endif # MTD_SST25XX
 
+config MTD_SST26
+	bool "SPI/QSPI-based SST26XX FLASHes (16,32,64-MBit)"
+	default n
+	select SPI
+	---help---
+		These part are also different from SST25 and SST25XX, they support both SPI and QSPI.
+
+if MTD_SST26
+
+config SST26_SPIMODE
+	int "SST26 (Q)SPI Mode"
+	default 0
+
+config SST26_SPIFREQUENCY
+	int "SST26 (Q)SPI Frequency"
+	default 64000000
+
+config SST26_MANUFACTURER
+	hex "Manufacturers ID"
+	default 0xBF
+	---help---
+		Various manufacturers may have produced the parts.  0xBF is the manufacturer ID
+		for the parts manufactured by SST.
+
+config SST26_MEMORY_TYPE
+	hex "Memory type ID"
+	default 0x26
+	---help---
+		The memory type for SST26VF0xx series is 0x26, but this can be modified if needed
+		to support compatible devices from different manufacturers.
+
+endif # MTD_SST26
+
 config MTD_SST39FV
 	bool "SST39FV NOR FLASH"
 	default n
diff --git a/drivers/mtd/Make.defs b/drivers/mtd/Make.defs
index a3a6eb7f20f..1d1ba6d26b7 100644
--- a/drivers/mtd/Make.defs
+++ b/drivers/mtd/Make.defs
@@ -88,6 +88,10 @@ ifeq ($(CONFIG_MTD_SST25XX),y)
 CSRCS += sst25xx.c
 endif
 
+ifeq ($(CONFIG_MTD_SST26),y)
+CSRCS += sst26.c
+endif
+
 ifeq ($(CONFIG_MTD_SST39FV),y)
 CSRCS += sst39vf.c
 endif
diff --git a/drivers/mtd/sst26.c b/drivers/mtd/sst26.c
new file mode 100644
index 00000000000..6790af73763
--- /dev/null
+++ b/drivers/mtd/sst26.c
@@ -0,0 +1,946 @@
+/************************************************************************************
+ * drivers/mtd/sst26.c
+ * Driver for SPI-based or QSPI-based SST26VF parts of 32 or 64MBit.
+ *
+ * For smaller SST25 parts, use the sst25.c driver instead as support
+ * a different program mechanism (byte or word writing vs page writing
+ * supported in this driver).
+ *
+ * For SST25VF064, see sst25cxx.c driver instead.
+ *
+ *   Copyright (C) 2009-2011, 2013, 2016 Gregory Nutt. All rights reserved.
+ *   Author: Ken Pettit <pettitkd@gmail.com>
+ *   Author: Sebastien Lorquet <sebastien@lorquet.fr>
+ *
+ *   Copied from / based on sst25.c driver written by
+ *   Gregory Nutt <gnutt@nuttx.org>
+ *   Ken Pettit <pettitkd@gmail.com>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdint.h>
+#include <stdbool.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/kmalloc.h>
+#include <nuttx/fs/ioctl.h>
+#include <nuttx/spi/spi.h>
+#include <nuttx/mtd/mtd.h>
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Configuration ********************************************************************/
+/* Per the data sheet, SST26 parts can be driven with either SPI mode 0 (CPOL=0 and
+ * CPHA=0) or mode 3 (CPOL=1 and CPHA=1).  So you may need to specify
+ * CONFIG_SST26_SPIMODE to select the best mode for your device.  If
+ * CONFIG_SST26_SPIMODE is not defined, mode 0 will be used.
+ */
+
+#ifndef CONFIG_SST26_SPIMODE
+#  define CONFIG_SST26_SPIMODE SPIDEV_MODE0
+#endif
+
+/* SPI Frequency.  May be up to 104 MHz. */
+
+#ifndef CONFIG_SST26_SPIFREQUENCY
+#  define CONFIG_SST26_SPIFREQUENCY 20000000
+#endif
+
+/* Various manufacturers may have produced the parts.  0xBF is the manufacturer ID
+ * for the SST serial FLASH.
+ */
+
+#ifndef CONFIG_SST26_MANUFACTURER
+#  define CONFIG_SST26_MANUFACTURER 0xBF
+#endif
+
+#ifndef CONFIG_SST26_MEMORY_TYPE
+#  define CONFIG_SST26_MEMORY_TYPE  0x25
+#endif
+
+/* SST26 Registers *******************************************************************/
+/* Indentification register values */
+
+#define SST26_MANUFACTURER         CONFIG_SST26_MANUFACTURER
+#define SST26_MEMORY_TYPE          CONFIG_SST26_MEMORY_TYPE
+
+#define SST26_SST26VF016_CAPACITY    0x41 /* 16 M-bit */
+#define SST26_SST26VF032_CAPACITY    0x42 /* 32 M-bit */
+#define SST26_SST26VF064_CAPACITY    0x43 /* 64 M-bit */
+
+/* SST26VF016 capacity is 2,097,152 bytes:
+ * (512 sectors) * (4,096 bytes per sector)
+ * (8192 pages) * (256 bytes per page)
+ */
+
+#define SST26_SST26VF016_SECTOR_SHIFT  12    /* Sector size 1 << 15 = 65,536 */
+#define SST26_SST26VF016_NSECTORS      512
+#define SST26_SST26VF016_PAGE_SHIFT    8     /* Page size 1 << 8 = 256 */
+#define SST26_SST26VF016_NPAGES        8192
+
+/* SST26VF032 capacity is 4,194,304 bytes:
+ * (1,024 sectors) * (4,096 bytes per sector)
+ * (16,384 pages) * (256 bytes per page)
+ */
+
+#define SST26_SST26VF032_SECTOR_SHIFT  12    /* Sector size 1 << 15 = 65,536 */
+#define SST26_SST26VF032_NSECTORS      1024
+#define SST26_SST26VF032_PAGE_SHIFT    8     /* Page size 1 << 8 = 256 */
+#define SST26_SST26VF032_NPAGES        16384
+
+/* SST26VF064 capacity is 8,388,608 bytes:
+ * (2,048 sectors) * (4,096 bytes per sector)
+ * (32,768 pages) * (256 bytes per page)
+ */
+
+#define SST26_SST26VF064_SECTOR_SHIFT  12    /* Sector size 1 << 15 = 65,536 */
+#define SST26_SST26VF064_NSECTORS      2048
+#define SST26_SST26VF064_PAGE_SHIFT    8     /* Page size 1 << 8 = 256 */
+#define SST26_SST26VF064_NPAGES        32768
+
+/* Instructions */
+/*      Command         Value      NN Description                  Addr Dummy  Data */
+#define SST26_NOP       0x00    /* 14 No Operation                    0   0   0     */
+#define SST26_RSTEN     0x66    /* 14 Reset Enable                    0   0   0     */
+#define SST26_RST       0x99    /* 14 Reset Memory                    0   0   0     */
+#define SST26_EQIO      0x38    /* 1  Enable Quad I/O                 0   0   0     */
+#define SST26_RSTQIO    0xFF    /*  4 Reset Quad I/O                  0   0   0     */
+#define SST26_RDSR      0x05    /* 1  Read Status Register            0   0   >=1   */
+                                /*  4 Read Status Register            0   1   >=1   */
+#define SST26_WRSR      0x01    /* 14 Write Status Register           0   0   2     */
+#define SST26_RDCR      0x35    /* 1  Read Config Register            0   0   >=1   */
+                                /*  4 Read Config Register            0   1   >=1   */
+
+#define SST26_READ      0x03    /* 1  Read Data Bytes                 3   0   >=1   */
+#define SST26_FAST_READ 0x0b    /* 1  Higher speed read               3   1   >=1   */
+                                /*  4 Higher speed read               3   3   >=1   */
+#define SST26_SQOR      0x6b    /* 1  SQI Output Read                 3   1   >=1   */
+#define SST26_SQIOR     0xeb    /* 1  SQI I/O Read                    3   3   >=1   */
+#define SST26_SDOR      0x3b    /* 1  SDI Output Read                 3   1   >=1   */
+#define SST26_SDIOR     0xbb    /* 1  SDI I/O Read                    3   1   >=1   */
+#define SST26_SB        0xc0    /* 14 Set Burst Length                0   0   1     */
+#define SST26_RBSQI     0x0c    /*  4 SQI Read Burst w/ Wrap          3   3   >=1   */
+#define SST26_RBSPI     0xec    /* 1  SPI Read Burst w/ Wrap          3   3   >=1   */
+
+#define SST26_RDID      0x9f    /* 1  Read Identification             0   0   >=3   */
+#define SST26_QRDID     0xaf    /*  4 Quad Read Identification        0   1   >=3   */
+#define SST26_SFDP      0x5a    /* 1  Serial Flash Discov. Par.       3   1   >=1   */
+
+#define SST26_WREN      0x06    /* 14 Write Enable                    0   0   0     */
+#define SST26_WRDI      0x04    /* 14 Write Disable                   0   0   0     */
+#define SST26_SE        0x20    /* 14 Sector Erase                    3   0   0     */
+#define SST26_BE        0xd8    /* 14 8/32/64K Block Erase            3   0   0     */
+#define SST26_CE        0xc7    /* 14 Chip Erase                      0   0   0     */
+#define SST26_PP        0x02    /* 1  Page Program                    3   0   1-256 */
+#define SST26_QPP       0x32    /* 1  Quad Page Program               3   0   1-256 */
+#define SST26_WRSU      0xb0    /* 14 Suspend Program/Erase           0   0   0     */
+#define SST26_WRRE      0x30    /* 14 Resume Program/Erase            0   0   0     */
+
+#define SST26_RBPR      0x72    /* 1  Read Block-Protection reg       0   0   1-18  */
+                                /*  4 Read Block-Protection reg       0   1   1-18  */
+#define SST26_WBPR      0x42    /* 14 Write Block-Protection reg      0   0   1-18  */
+#define SST26_LBPR      0x8d    /* 14 Lock down Block-Prot. reg       0   0   0     */
+#define SST26_NVWLDR    0xe8    /* 14 non-Volatile Write L-D reg      0   0   1-18  */
+#define SST26_ULBPR     0x98    /* 14 Global Block Protection unlock  0   0   0     */
+#define SST26_RSID      0x88    /* 14 Read Security ID                2   1   1-2048*/ 
+                                /*  4 Read Security ID                2   3   1-2048*/
+#define SST26_PSID      0xa5    /* 14 Program User Security ID area   2   0   1-256 */
+#define SST26_LSID      0x85    /* 14 Lockout Security ID programming 0   0   0     */
+
+/* NOTE 1: All parts.
+ * NOTE 2: In SST26VF064 terminology, 0xd8 is block erase and 0x20
+ *         is a sector erase.  Block erase provides a faster way to erase
+ *         multiple 4K sectors at once.
+ */
+
+/* Status register bit definitions */
+
+#define SST26_SR_WIP              (1 << 0)                /* Bit 0: Write in progress */
+#define SST26_SR_WEL              (1 << 1)                /* Bit 1: Write enable latch */
+#define SST26_SR_WSE              (1 << 2)                /* Bit 2: Write Suspend-Erase Status */
+#define SST26_SR_WSP              (1 << 3)                /* Bit 3: Write Suspend-Program Status */
+#define SST26_SR_WPLD             (1 << 4)                /* Bit 4: Write Protection Lock-Down Status */
+#define SST26_SR_SEC              (1 << 5)                /* Bit 5: Security ID status */
+#define SST26_SR_RES              (1 << 6)                /* Bit 6: RFU */
+#define SST26_SR_WIP2             (1 << 7)                /* Bit 7: Write in progress */
+
+#define SST26_DUMMY     0xa5
+
+/************************************************************************************
+ * Private Types
+ ************************************************************************************/
+
+/* This type represents the state of the MTD device.  The struct mtd_dev_s
+ * must appear at the beginning of the definition so that you can freely
+ * cast between pointers to struct mtd_dev_s and struct sst26_dev_s.
+ */
+
+struct sst26_dev_s
+{
+  struct mtd_dev_s mtd;      /* MTD interface */
+  FAR struct spi_dev_s *dev; /* Saved SPI interface instance */
+  uint8_t  sectorshift;
+  uint8_t  pageshift;
+  uint16_t nsectors;
+  uint32_t npages;
+};
+
+/************************************************************************************
+ * Private Function Prototypes
+ ************************************************************************************/
+
+/* Helpers */
+
+static void sst26_lock(FAR struct spi_dev_s *dev);
+static inline void sst26_unlock(FAR struct spi_dev_s *dev);
+static inline int sst26_readid(struct sst26_dev_s *priv);
+static void sst26_waitwritecomplete(struct sst26_dev_s *priv);
+static void sst26_writeenable(struct sst26_dev_s *priv);
+static void sst26_globalunlock(struct sst26_dev_s *priv);
+static inline void sst26_sectorerase(struct sst26_dev_s *priv, off_t offset, uint8_t type);
+static inline int  sst26_chiperase(struct sst26_dev_s *priv);
+static inline void sst26_pagewrite(struct sst26_dev_s *priv, FAR const uint8_t *buffer,
+                                   off_t offset);
+
+/* MTD driver methods */
+
+static int sst26_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks);
+static ssize_t sst26_bread(FAR struct mtd_dev_s *dev, off_t startblock,
+                           size_t nblocks, FAR uint8_t *buf);
+static ssize_t sst26_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
+                            size_t nblocks, FAR const uint8_t *buf);
+static ssize_t sst26_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                          FAR uint8_t *buffer);
+#ifdef CONFIG_MTD_BYTE_WRITE
+static ssize_t sst26_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                           FAR const uint8_t *buffer);
+#endif
+static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg);
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: sst26_lock
+ ************************************************************************************/
+
+static void sst26_lock(FAR struct spi_dev_s *dev)
+{
+  /* On SPI busses where there are multiple devices, it will be necessary to
+   * lock SPI to have exclusive access to the busses for a sequence of
+   * transfers.  The bus should be locked before the chip is selected.
+   *
+   * This is a blocking call and will not return until we have exclusiv access to
+   * the SPI buss.  We will retain that exclusive access until the bus is unlocked.
+   */
+
+  (void)SPI_LOCK(dev, true);
+
+  /* After locking the SPI bus, the we also need call the setfrequency, setbits, and
+   * setmode methods to make sure that the SPI is properly configured for the device.
+   * If the SPI buss is being shared, then it may have been left in an incompatible
+   * state.
+   */
+
+  SPI_SETMODE(dev, CONFIG_SST26_SPIMODE);
+  SPI_SETBITS(dev, 8);
+  (void)SPI_HWFEATURES(dev, 0);
+  (void)SPI_SETFREQUENCY(dev, CONFIG_SST26_SPIFREQUENCY);
+}
+
+/************************************************************************************
+ * Name: sst26_unlock
+ ************************************************************************************/
+
+static inline void sst26_unlock(FAR struct spi_dev_s *dev)
+{
+  (void)SPI_LOCK(dev, false);
+}
+
+/************************************************************************************
+ * Name: sst26_readid
+ ************************************************************************************/
+
+static inline int sst26_readid(struct sst26_dev_s *priv)
+{
+  uint16_t manufacturer;
+  uint16_t memory;
+  uint16_t capacity;
+
+  fvdbg("priv: %p\n", priv);
+
+  /* Lock the SPI bus, configure the bus, and select this FLASH part. */
+
+  sst26_lock(priv->dev);
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Read ID (RDID)" command and read the first three ID bytes */
+
+  (void)SPI_SEND(priv->dev, SST26_RDID);
+  manufacturer = SPI_SEND(priv->dev, SST26_DUMMY);
+  memory       = SPI_SEND(priv->dev, SST26_DUMMY);
+  capacity     = SPI_SEND(priv->dev, SST26_DUMMY);
+
+  /* Deselect the FLASH and unlock the bus */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  sst26_unlock(priv->dev);
+
+  lldbg("manufacturer: %02x memory: %02x capacity: %02x\n",
+        manufacturer, memory, capacity);
+
+  /* Check for a valid manufacturer and memory type */
+
+  if (manufacturer == SST26_MANUFACTURER && memory == SST26_MEMORY_TYPE)
+    {
+      /* Okay.. is it a FLASH capacity that we understand? */
+
+      if (capacity == SST26_SST26VF064_CAPACITY)
+        {
+           /* Save the FLASH geometry */
+
+           priv->sectorshift = SST26_SST26VF064_SECTOR_SHIFT;
+           priv->nsectors    = SST26_SST26VF064_NSECTORS;
+           priv->pageshift   = SST26_SST26VF064_PAGE_SHIFT;
+           priv->npages      = SST26_SST26VF064_NPAGES;
+           return OK;
+        }
+      else if (capacity == SST26_SST26VF032_CAPACITY)
+        {
+           /* Save the FLASH geometry */
+
+           priv->sectorshift = SST26_SST26VF032_SECTOR_SHIFT;
+           priv->nsectors    = SST26_SST26VF032_NSECTORS;
+           priv->pageshift   = SST26_SST26VF032_PAGE_SHIFT;
+           priv->npages      = SST26_SST26VF032_NPAGES;
+           return OK;
+        }
+    }
+
+  return -ENODEV;
+}
+
+/************************************************************************************
+ * Name: sst26_waitwritecomplete
+ ************************************************************************************/
+
+static void sst26_waitwritecomplete(struct sst26_dev_s *priv)
+{
+  uint8_t status;
+
+  /* Loop as long as the memory is busy with a write cycle */
+
+  do
+    {
+      /* Select this FLASH part */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+      /* Send "Read Status Register (RDSR)" command */
+
+      (void)SPI_SEND(priv->dev, SST26_RDSR);
+
+      /* Send a dummy byte to generate the clock needed to shift out the status */
+
+      status = SPI_SEND(priv->dev, SST26_DUMMY);
+
+      /* Deselect the FLASH */
+
+      SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+      /* Given that writing could take up to few tens of milliseconds, and erasing
+       * could take more.  The following short delay in the "busy" case will allow
+       * other peripherals to access the SPI bus.
+       */
+
+      if ((status & SST26_SR_WIP) != 0)
+        {
+          sst26_unlock(priv->dev);
+          usleep(1000);
+          sst26_lock(priv->dev);
+        }
+    }
+  while ((status & SST26_SR_WIP) != 0);
+
+  fvdbg("Complete\n");
+}
+
+/************************************************************************************
+ * Name:  sst26_globalunlock
+ * Description: SST26 flashes are globally locked after startup. To allow writing,
+ * this command must be sent once.
+ ************************************************************************************/
+
+static void sst26_globalunlock(struct sst26_dev_s *priv)
+{
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Write Enable (WREN)" command */
+
+  (void)SPI_SEND(priv->dev, SST26_ULBPR);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  fvdbg("Device unlocked.\n");
+}
+
+/************************************************************************************
+ * Name:  sst26_writeenable
+ ************************************************************************************/
+
+static void sst26_writeenable(struct sst26_dev_s *priv)
+{
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Write Enable (WREN)" command */
+
+  (void)SPI_SEND(priv->dev, SST26_WREN);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  fvdbg("Enabled\n");
+}
+
+/************************************************************************************
+ * Name:  sst26_sectorerase (4k)
+ ************************************************************************************/
+
+static void sst26_sectorerase(struct sst26_dev_s *priv, off_t sector, uint8_t type)
+{
+  off_t offset;
+
+  offset = sector << priv->sectorshift;
+
+  fvdbg("sector: %08lx\n", (long)sector);
+
+  /* Send write enable instruction */
+
+  sst26_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Sector Erase (SE)" or "Block Erase (BE)" instruction
+   * that was passed in as the erase type.
+   */
+
+  (void)SPI_SEND(priv->dev, type);
+
+  /* Send the sector offset high byte first.  For all of the supported
+   * parts, the sector number is completely contained in the first byte
+   * and the values used in the following two bytes don't really matter.
+   */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  sst26_waitwritecomplete(priv);
+
+  fvdbg("Erased\n");
+}
+
+/************************************************************************************
+ * Name:  sst26_chiperase
+ ************************************************************************************/
+
+static inline int sst26_chiperase(struct sst26_dev_s *priv)
+{
+  fvdbg("priv: %p\n", priv);
+
+  /* Send write enable instruction */
+
+  sst26_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send the "Chip Erase (CE)" instruction */
+
+  (void)SPI_SEND(priv->dev, SST26_CE);
+
+  /* Deselect the FLASH */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  sst26_waitwritecomplete(priv);
+
+  fvdbg("Return: OK\n");
+  return OK;
+}
+
+/************************************************************************************
+ * Name:  sst26_pagewrite
+ ************************************************************************************/
+
+static inline void sst26_pagewrite(struct sst26_dev_s *priv,
+                                   FAR const uint8_t *buffer, off_t page)
+{
+  off_t offset = page << priv->pageshift;
+
+  fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset);
+
+  /* Enable the write access to the FLASH */
+
+  sst26_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Page Program (PP)" command */
+
+  (void)SPI_SEND(priv->dev, SST26_PP);
+
+  /* Send the page offset high byte first. */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Then write the specified number of bytes */
+
+  SPI_SNDBLOCK(priv->dev, buffer, 1 << priv->pageshift);
+
+  /* Deselect the FLASH: Chip Select high */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  sst26_waitwritecomplete(priv);
+
+  fvdbg("Written\n");
+}
+
+/************************************************************************************
+ * Name:  sst26_bytewrite
+ ************************************************************************************/
+
+#ifdef CONFIG_MTD_BYTE_WRITE
+static inline void sst26_bytewrite(struct sst26_dev_s *priv,
+                                   FAR const uint8_t *buffer, off_t offset,
+                                   uint16_t count)
+{
+  fvdbg("offset: %08lx  count:%d\n", (long)offset, count);
+
+  /* Enable the write access to the FLASH */
+
+  sst26_writeenable(priv);
+
+  /* Select this FLASH part */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Page Program (PP)" command */
+
+  (void)SPI_SEND(priv->dev, SST26_PP);
+
+  /* Send the page offset high byte first. */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* Then write the specified number of bytes */
+
+  SPI_SNDBLOCK(priv->dev, buffer, count);
+  priv->lastwaswrite = true;
+
+  /* Deselect the FLASH: Chip Select high */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+
+  sst26_waitwritecomplete(priv);
+
+  fvdbg("Written\n");
+}
+#endif
+
+/* Driver routines */
+
+/************************************************************************************
+ * Name: sst26_erase
+ ************************************************************************************/
+
+static int sst26_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks)
+{
+  FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
+  size_t blocksleft = nblocks;
+
+  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* Lock access to the SPI bus until we complete the erase */
+
+  sst26_lock(priv->dev);
+  while (blocksleft > 0)
+    {
+      /* SST26VF parts have complex block overlay structure for the moment
+       * we just erase in 4k blocks.
+       */
+
+      sst26_sectorerase(priv, startblock, SST26_SE);
+      startblock++;
+      blocksleft--;
+    }
+
+  sst26_unlock(priv->dev);
+  return (int)nblocks;
+}
+
+/************************************************************************************
+ * Name: sst26_bread
+ ************************************************************************************/
+
+static ssize_t sst26_bread(FAR struct mtd_dev_s *dev, off_t startblock,
+                           size_t nblocks, FAR uint8_t *buffer)
+{
+  FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
+  ssize_t nbytes;
+
+  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* On this device, we can handle the block read just like the byte-oriented read */
+
+  nbytes = sst26_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift,
+                      buffer);
+  if (nbytes > 0)
+    {
+      return nbytes >> priv->pageshift;
+    }
+
+  return (int)nbytes;
+}
+
+/************************************************************************************
+ * Name: sst26_bwrite
+ ************************************************************************************/
+
+static ssize_t sst26_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
+                              FAR const uint8_t *buffer)
+{
+  FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
+  size_t blocksleft = nblocks;
+  size_t pagesize = 1 << priv->pageshift;
+
+  fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
+
+  /* Lock the SPI bus and write each page to FLASH */
+
+  sst26_lock(priv->dev);
+  while (blocksleft-- > 0)
+    {
+      sst26_pagewrite(priv, buffer, startblock);
+      buffer += pagesize;
+      startblock++;
+   }
+
+  sst26_unlock(priv->dev);
+  return nblocks;
+}
+
+/************************************************************************************
+ * Name: sst26_read
+ ************************************************************************************/
+
+static ssize_t sst26_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                            FAR uint8_t *buffer)
+{
+  FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
+
+  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+
+  /* Lock the SPI bus and select this FLASH part */
+
+  sst26_lock(priv->dev);
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, true);
+
+  /* Send "Read from Memory " instruction */
+
+  (void)SPI_SEND(priv->dev, SST26_FAST_READ);
+
+  /* Send the page offset high byte first. */
+
+  (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff);
+  (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff);
+  (void)SPI_SEND(priv->dev, offset & 0xff);
+
+  /* dummy read */
+  (void)SPI_SEND(priv->dev, SST26_DUMMY);
+
+  /* Then read all of the requested bytes */
+
+  SPI_RECVBLOCK(priv->dev, buffer, nbytes);
+
+  /* Deselect the FLASH and unlock the SPI bus */
+
+  SPI_SELECT(priv->dev, SPIDEV_FLASH, false);
+  sst26_unlock(priv->dev);
+  fvdbg("return nbytes: %d\n", (int)nbytes);
+  return nbytes;
+}
+
+/************************************************************************************
+ * Name: sst26_write
+ ************************************************************************************/
+
+#ifdef CONFIG_MTD_BYTE_WRITE
+static ssize_t sst26_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
+                         FAR const uint8_t *buffer)
+{
+  FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
+  int    startpage;
+  int    endpage;
+  int    count;
+  int    index;
+  int    pagesize;
+  int    bytestowrite;
+
+  fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
+
+  /* We must test if the offset + count crosses one or more pages
+   * and perform individual writes.  The devices can only write in
+   * page increments.
+   */
+
+  startpage = offset / (1 << priv->pageshift);
+  endpage = (offset + nbytes) / (1 << priv->pageshift);
+
+  if (startpage == endpage)
+    {
+      /* All bytes within one programmable page.  Just do the write. */
+
+      sst26_bytewrite(priv, buffer, offset, nbytes);
+    }
+  else
+    {
+      /* Write the 1st partial-page */
+
+      count = nbytes;
+      pagesize = (1 << priv->pageshift);
+      bytestowrite = pagesize - (offset & (pagesize-1));
+      sst26_bytewrite(priv, buffer, offset, bytestowrite);
+
+      /* Update offset and count */
+
+      offset += bytestowrite;
+      count -=  bytestowrite;
+      index = bytestowrite;
+
+      /* Write full pages */
+
+      while (count >= pagesize)
+        {
+          sst26_bytewrite(priv, &buffer[index], offset, pagesize);
+
+          /* Update offset and count */
+
+          offset += pagesize;
+          count -= pagesize;
+          index += pagesize;
+        }
+
+      /* Now write any partial page at the end */
+
+      if (count > 0)
+        {
+          sst26_bytewrite(priv, &buffer[index], offset, count);
+        }
+
+      priv->lastwaswrite = true;
+    }
+
+  return nbytes;
+}
+#endif /* CONFIG_MTD_BYTE_WRITE */
+
+/************************************************************************************
+ * Name: sst26_ioctl
+ ************************************************************************************/
+
+static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
+{
+  FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev;
+  int ret = -EINVAL; /* Assume good command with bad parameters */
+
+  fvdbg("cmd: %d \n", cmd);
+
+  switch (cmd)
+    {
+      case MTDIOC_GEOMETRY:
+        {
+          FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)((uintptr_t)arg);
+          if (geo)
+            {
+              /* Populate the geometry structure with information need to know
+               * the capacity and how to access the device.
+               *
+               * NOTE: that the device is treated as though it where just an array
+               * of fixed size blocks.  That is most likely not true, but the client
+               * will expect the device logic to do whatever is necessary to make it
+               * appear so.
+               */
+
+              geo->blocksize = (1 << priv->pageshift);
+              geo->erasesize    = (1 << priv->sectorshift);
+              geo->neraseblocks = priv->nsectors;
+
+              ret = OK;
+
+              fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n",
+                    geo->blocksize, geo->erasesize, geo->neraseblocks);
+            }
+        }
+        break;
+
+      case MTDIOC_BULKERASE:
+        {
+            /* Erase the entire device */
+
+            sst26_lock(priv->dev);
+            ret = sst26_chiperase(priv);
+            sst26_unlock(priv->dev);
+        }
+        break;
+
+      case MTDIOC_XIPBASE:
+      default:
+        ret = -ENOTTY; /* Bad command */
+        break;
+    }
+
+  fvdbg("return %d\n", ret);
+  return ret;
+}
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: sst26_initialize
+ *
+ * Description:
+ *   Create an initialize MTD device instance.  MTD devices are not registered
+ *   in the file system, but are created as instances that can be bound to
+ *   other functions (such as a block or character driver front end).
+ *
+ ************************************************************************************/
+
+FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev)
+{
+  FAR struct sst26_dev_s *priv;
+  int ret;
+
+  fvdbg("dev: %p\n", dev);
+
+  /* Allocate a state structure (we allocate the structure instead of using
+   * a fixed, static allocation so that we can handle multiple FLASH devices.
+   * The current implementation would handle only one FLASH part per SPI
+   * device (only because of the SPIDEV_FLASH definition) and so would have
+   * to be extended to handle multiple FLASH parts on the same SPI bus.
+   */
+
+  priv = (FAR struct sst26_dev_s *)kmm_zalloc(sizeof(struct sst26_dev_s));
+  if (priv)
+    {
+      /* Initialize the allocated structure. (unsupported methods were
+       * nullified by kmm_zalloc).
+       */
+
+      priv->mtd.erase  = sst26_erase;
+      priv->mtd.bread  = sst26_bread;
+      priv->mtd.bwrite = sst26_bwrite;
+      priv->mtd.read   = sst26_read;
+#ifdef CONFIG_MTD_BYTE_WRITE
+      priv->mtd.write  = sst26_write;
+#endif
+      priv->mtd.ioctl  = sst26_ioctl;
+      priv->dev        = dev;
+
+      /* Deselect the FLASH */
+
+      SPI_SELECT(dev, SPIDEV_FLASH, false);
+
+      /* Identify the FLASH chip and get its capacity */
+
+      ret = sst26_readid(priv);
+      if (ret != OK)
+        {
+          /* Unrecognized! Discard all of that work we just did and return NULL */
+
+          fdbg("Unrecognized\n");
+          kmm_free(priv);
+          priv = NULL;
+        }
+      else
+        {
+          /* Make sure that the FLASH is unprotected so that we can write into it */
+
+          sst26_globalunlock(priv);
+
+#ifdef CONFIG_MTD_REGISTRATION
+          /* Register the MTD with the procfs system if enabled */
+
+          mtd_register(&priv->mtd, "sst26");
+#endif
+        }
+    }
+
+  /* Return the implementation-specific state structure as the MTD device */
+
+  fvdbg("Return %p\n", priv);
+  return (FAR struct mtd_dev_s *)priv;
+}
diff --git a/include/nuttx/mtd/mtd.h b/include/nuttx/mtd/mtd.h
index 80b1c4215d4..8d1ee6db705 100644
--- a/include/nuttx/mtd/mtd.h
+++ b/include/nuttx/mtd/mtd.h
@@ -476,6 +476,18 @@ FAR struct mtd_dev_s *sst25_initialize(FAR struct spi_dev_s *dev);
 
 FAR struct mtd_dev_s *sst25xx_initialize(FAR struct spi_dev_s *dev);
 
+/****************************************************************************
+ * Name: sst26_initialize_spi
+ *
+ * Description:
+ *   Initializes the driver for SPI-based SST26 FLASH
+ *
+ *   Supports SST26VF016 SST26VF032 SST26VF064
+ *
+ ****************************************************************************/
+
+FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev);
+
 /****************************************************************************
  * Name: sst39vf_initialize
  *

From 88b79d305f0ef55a6682720e32055a3e5cf451fe Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Tue, 10 May 2016 11:14:27 -0600
Subject: [PATCH 02/33] Update ChangeLog

---
 ChangeLog | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/ChangeLog b/ChangeLog
index 4f2191bba4e..36062acd6eb 100755
--- a/ChangeLog
+++ b/ChangeLog
@@ -11705,3 +11705,13 @@
 	  naming problems. (2016-05-05).
 	* arch/arm/src/samv7:  Fix typo in MATRIX register definitions.  From
 	  Stefan Kolb (2016-05-06).
+	* arch/arm/src/stm32l4: Problem with resetting backup domain clears
+	  clocking options set up before in *rcc.c use INITS flag to avoid magic
+	  reg value to detect power up reset state of RTC correct a problem
+	  clearing interrupt flags (they weren't) which prevented an alarm from
+	  ever being used more than once per reset cycl.e  From Dave
+	  dev@ziggurat29.com (2016-05-07).
+	* arch/arm/src/tiva: Fix a bug of GPIO falling-edge interrupt for tiva.
+	  From Young (2016-05-07).
+	* drivrs/mtd:  Add a driver for SST26F spi/qspi flash devices (SPI mode
+	  only).  From Sebastien Lorquet (2016-05-10).

From e523c9339128079501ec5857161637b4b8d607f5 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Tue, 10 May 2016 15:44:06 -0600
Subject: [PATCH 03/33] Several Makefiles: Add .PHONY definitions to prevent
 'clean up to date' message weirdness.

---
 ChangeLog         |  2 ++
 audio/Makefile    |  1 +
 binfmt/Makefile   |  3 ++-
 configs/Makefile  |  5 +++--
 crypto/Makefile   |  3 ++-
 drivers/Makefile  |  3 ++-
 fs/Makefile       |  3 ++-
 lib/Makefile      |  3 ++-
 libxx/Makefile    |  3 ++-
 net/Makefile      | 19 ++++++++++---------
 wireless/Makefile |  1 +
 11 files changed, 29 insertions(+), 17 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 36062acd6eb..3c2bb980f5a 100755
--- a/ChangeLog
+++ b/ChangeLog
@@ -11715,3 +11715,5 @@
 	  From Young (2016-05-07).
 	* drivrs/mtd:  Add a driver for SST26F spi/qspi flash devices (SPI mode
 	  only).  From Sebastien Lorquet (2016-05-10).
+	* Several Makefiles: Add .PHONY definitions to prevent 'clean up to date'
+	  message weirdness (2016-05-10).
diff --git a/audio/Makefile b/audio/Makefile
index 33b3a26a798..42ee4ea319b 100644
--- a/audio/Makefile
+++ b/audio/Makefile
@@ -62,6 +62,7 @@ OBJS = $(AOBJS) $(COBJS)
 BIN = libaudio$(LIBEXT)
 
 all: $(BIN)
+.PHONY: depend clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
diff --git a/binfmt/Makefile b/binfmt/Makefile
index 5c5244d89bf..7240ca9b15c 100644
--- a/binfmt/Makefile
+++ b/binfmt/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # nxflat/Makefile
 #
-#   Copyright (C) 2007-2009, 2012-2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007-2009, 2012-2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -80,6 +80,7 @@ BINFMT_OBJS = $(BINFMT_AOBJS) $(BINFMT_COBJS)
 BIN = libbinfmt$(LIBEXT)
 
 all: $(BIN)
+.PHONY: depend clean distclean
 
 $(BINFMT_AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
diff --git a/configs/Makefile b/configs/Makefile
index 4e96cc8dfdb..496601da0b0 100644
--- a/configs/Makefile
+++ b/configs/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # configs/Makefile
 #
-#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -58,6 +58,7 @@ OBJS = $(AOBJS) $(COBJS)
 BIN = libconfigs$(LIBEXT)
 
 all: $(BIN)
+.PHONY: depend clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
@@ -84,4 +85,4 @@ distclean: clean
 	$(call DELFILE, Make.dep)
 	$(call DELFILE, .depend)
 
--include Make.dep
\ No newline at end of file
+-include Make.dep
diff --git a/crypto/Makefile b/crypto/Makefile
index c56640534ef..23b4cf137e9 100644
--- a/crypto/Makefile
+++ b/crypto/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # crypto/Makefile
 #
-#   Copyright (C) 2007, 2008, 2011-2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007, 2008, 2011-2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -70,6 +70,7 @@ OBJS = $(AOBJS) $(COBJS)
 BIN = libcrypto$(LIBEXT)
 
 all: $(BIN)
+.PHONY: depend clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
diff --git a/drivers/Makefile b/drivers/Makefile
index 025444990f9..224cd78f6e5 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # drivers/Makefile
 #
-#   Copyright (C) 2007-2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007-2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -108,6 +108,7 @@ OBJS = $(AOBJS) $(COBJS)
 BIN = libdrivers$(LIBEXT)
 
 all: $(BIN)
+.PHONY: depend clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
diff --git a/fs/Makefile b/fs/Makefile
index e60af07ae09..5ef45f84ee2 100644
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # fs/Makefile
 #
-#   Copyright (C) 2007, 2008, 2011-2014 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007, 2008, 2011-2014, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -84,6 +84,7 @@ OBJS = $(AOBJS) $(COBJS)
 BIN = libfs$(LIBEXT)
 
 all: $(BIN)
+.PHONY: depend clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
diff --git a/lib/Makefile b/lib/Makefile
index 58857dbd410..92a774d28a4 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # lib/Makefile
 #
-#   Copyright (C) 2012 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -36,6 +36,7 @@
 -include $(TOPDIR)/Make.defs
 
 all:
+.PHONY: depend clean distclean
 
 depend:
 
diff --git a/libxx/Makefile b/libxx/Makefile
index 2fee7011865..02402dbf7db 100644
--- a/libxx/Makefile
+++ b/libxx/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # libxx/Makefile
 #
-#   Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2009, 2012, 2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -88,6 +88,7 @@ OBJS = $(AOBJS) $(COBJS) $(CXXOBJS)
 BIN = libcxx$(LIBEXT)
 
 all: $(BIN)
+.PHONY: depend clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
diff --git a/net/Makefile b/net/Makefile
index 5cfc2349e28..2487ce96091 100644
--- a/net/Makefile
+++ b/net/Makefile
@@ -1,7 +1,7 @@
 ############################################################################
 # net/Makefile
 #
-#   Copyright (C) 2007, 2008, 2011-2015 Gregory Nutt. All rights reserved.
+#   Copyright (C) 2007, 2008, 2011-2016 Gregory Nutt. All rights reserved.
 #   Author: Gregory Nutt <gnutt@nuttx.org>
 #
 # Redistribution and use in source and binary forms, with or without
@@ -75,18 +75,19 @@ include procfs/Make.defs
 include utils/Make.defs
 endif
 
-ASRCS		= $(SOCK_ASRCS) $(NETDEV_ASRCS) $(NET_ASRCS)
-AOBJS		= $(ASRCS:.S=$(OBJEXT))
+ASRCS = $(SOCK_ASRCS) $(NETDEV_ASRCS) $(NET_ASRCS)
+AOBJS = $(ASRCS:.S=$(OBJEXT))
 
-CSRCS		= $(SOCK_CSRCS) $(NETDEV_CSRCS) $(NET_CSRCS)
-COBJS		= $(CSRCS:.c=$(OBJEXT))
+CSRCS = $(SOCK_CSRCS) $(NETDEV_CSRCS) $(NET_CSRCS)
+COBJS = $(CSRCS:.c=$(OBJEXT))
 
-SRCS		= $(ASRCS) $(CSRCS)
-OBJS		= $(AOBJS) $(COBJS)
+SRCS = $(ASRCS) $(CSRCS)
+OBJS = $(AOBJS) $(COBJS)
 
-BIN		= libnet$(LIBEXT)
+BIN = libnet$(LIBEXT)
 
-all:	$(BIN)
+all: $(BIN)
+.PHONY: depend clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)
diff --git a/wireless/Makefile b/wireless/Makefile
index 85f69bd118f..008d23ff1c8 100644
--- a/wireless/Makefile
+++ b/wireless/Makefile
@@ -69,6 +69,7 @@ OBJS = $(AOBJS) $(COBJS)
 BIN = libwireless$(LIBEXT)
 
 all: $(BIN)
+.PHONY: depend clean distclean
 
 $(AOBJS): %$(OBJEXT): %.S
 	$(call ASSEMBLE, $<, $@)

From b096ea077f53445d41435aa95f3318a2350a0e02 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Tue, 10 May 2016 16:40:47 -0600
Subject: [PATCH 04/33] Fix some typos in the ChangeLog

---
 ChangeLog | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 3c2bb980f5a..455ccb8c46c 100755
--- a/ChangeLog
+++ b/ChangeLog
@@ -11700,7 +11700,7 @@
 	  dev@ziggurat29.com (2016-05-03).
 	* Makefile.unix and tools/mkexport.sh: Pass top-level make to the
 	  script to allow -j greater than 1.  From David Sidrane (2016-05-04).
-	* arch/arm/src/stm32, sm32f7, stm32l4: Fix typo in variable name in
+	* arch/arm/src/stm32, stm32f7, stm32l4: Fix typo in variable name in
 	  serial BREAK logic.  Review other serial implementations for similar
 	  naming problems. (2016-05-05).
 	* arch/arm/src/samv7:  Fix typo in MATRIX register definitions.  From
@@ -11709,11 +11709,12 @@
 	  clocking options set up before in *rcc.c use INITS flag to avoid magic
 	  reg value to detect power up reset state of RTC correct a problem
 	  clearing interrupt flags (they weren't) which prevented an alarm from
-	  ever being used more than once per reset cycl.e  From Dave
+	  ever being used more than once per reset cycle.  From Dave
 	  dev@ziggurat29.com (2016-05-07).
 	* arch/arm/src/tiva: Fix a bug of GPIO falling-edge interrupt for tiva.
 	  From Young (2016-05-07).
 	* drivrs/mtd:  Add a driver for SST26F spi/qspi flash devices (SPI mode
 	  only).  From Sebastien Lorquet (2016-05-10).
 	* Several Makefiles: Add .PHONY definitions to prevent 'clean up to date'
-	  message weirdness (2016-05-10).
+	  message weirdness when 'make clean' is done with no .config or Make.defs
+	  file (2016-05-10).

From 3c594b5ba1c70031b1412527f782a1b8c2e9ddde Mon Sep 17 00:00:00 2001
From: Sebastien Lorquet <sebastien@lorquet.fr>
Date: Wed, 11 May 2016 06:48:30 -0600
Subject: [PATCH 05/33] Allows the use of tmpfs when no block driver is
 available. This is correctly done to define NONBDFS but below the structure
 is not where it should be.

---
 fs/mount/fs_mount.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/fs/mount/fs_mount.c b/fs/mount/fs_mount.c
index 8357aabcb11..f3ab72bc933 100644
--- a/fs/mount/fs_mount.c
+++ b/fs/mount/fs_mount.c
@@ -103,9 +103,6 @@ extern const struct mountpt_operations fat_operations;
 #ifdef CONFIG_FS_ROMFS
 extern const struct mountpt_operations romfs_operations;
 #endif
-#ifdef CONFIG_FS_TMPFS
-extern const struct mountpt_operations tmpfs_operations;
-#endif
 #ifdef CONFIG_FS_SMARTFS
 extern const struct mountpt_operations smartfs_operations;
 #endif
@@ -129,6 +126,9 @@ static const struct fsmap_t g_bdfsmap[] =
 #ifdef CONFIG_FS_NXFFS
 extern const struct mountpt_operations nxffs_operations;
 #endif
+#ifdef CONFIG_FS_TMPFS
+extern const struct mountpt_operations tmpfs_operations;
+#endif
 #ifdef CONFIG_NFS
 extern const struct mountpt_operations nfs_operations;
 #endif

From 9eeb8634fc29974f65a35503f2be2a9e761a6f62 Mon Sep 17 00:00:00 2001
From: Frank Benkert <mail@frank-benkert.de>
Date: Wed, 11 May 2016 07:10:17 -0600
Subject: [PATCH 06/33] Improve the CAN error reporting by also report internal
 device driver errors.

---
 drivers/can.c       | 50 +++++++++++++++++++++++++++++++++++++++++++++
 include/nuttx/can.h | 11 +++++++++-
 2 files changed, 60 insertions(+), 1 deletion(-)

diff --git a/drivers/can.c b/drivers/can.c
index 4cca6c0dbb8..2454f06c2d3 100644
--- a/drivers/can.c
+++ b/drivers/can.c
@@ -522,6 +522,44 @@ static ssize_t can_read(FAR struct file *filep, FAR char *buffer,
       /* Interrupts must be disabled while accessing the cd_recv FIFO */
 
       flags = enter_critical_section();
+
+#ifdef CONFIG_CAN_ERRORS
+      /* Check for internal errors */
+
+      if (dev->cd_error != 0)
+        {
+          FAR struct can_msg_s *msg;
+
+          /* Detected an internal driver error.  Generate a
+           * CAN_ERROR_MESSAGE
+           */
+
+          if (buflen < CAN_MSGLEN(CAN_ERROR_DLC))
+            {
+              goto return_with_irqdisabled;
+            }
+
+          msg                   = (FAR struct can_msg_s *)buffer;
+          msg->cm_hdr.ch_id     = CAN_ERROR_INTERNAL;
+          msg->cm_hdr.ch_dlc    = CAN_ERROR_DLC;
+          msg->cm_hdr.ch_rtr    = 0;
+          msg->cm_hdr.ch_error  = 1;
+#ifdef CONFIG_CAN_EXTID
+          msg->cm_hdr.ch_extid  = 0;
+#endif
+          msg->cm_hdr.ch_unused = 0;
+          memset(&(msg->cm_data), 0, CAN_ERROR_DLC);
+          msg->cm_data[5]       = dev->cd_error;
+
+          /* Reset the error flag */
+
+          dev->cd_error         = 0;
+
+          ret = CAN_MSGLEN(CAN_ERROR_DLC);
+          goto return_with_irqdisabled;
+        }
+#endif /* CONFIG_CAN_ERRORS */
+
       while (dev->cd_recv.rx_head == dev->cd_recv.rx_tail)
         {
           /* The receive FIFO is empty -- was non-blocking mode selected? */
@@ -540,6 +578,7 @@ static ssize_t can_read(FAR struct file *filep, FAR char *buffer,
               ret = sem_wait(&dev->cd_recv.rx_sem);
             }
           while (ret >= 0 && dev->cd_recv.rx_head == dev->cd_recv.rx_tail);
+
           dev->cd_nrxwaiters--;
 
           if (ret < 0)
@@ -927,6 +966,9 @@ int can_register(FAR const char *path, FAR struct can_dev_s *dev)
   dev->cd_ntxwaiters = 0;
   dev->cd_nrxwaiters = 0;
   dev->cd_npendrtr   = 0;
+#ifdef CONFIG_CAN_ERRORS
+  dev->cd_error      = 0;
+#endif
 
   sem_init(&dev->cd_xmit.tx_sem, 0, 0);
   sem_init(&dev->cd_recv.rx_sem, 0, 0);
@@ -1073,6 +1115,14 @@ int can_receive(FAR struct can_dev_s *dev, FAR struct can_hdr_s *hdr,
 
       err = OK;
     }
+#ifdef CONFIG_CAN_ERRORS
+  else
+    {
+      /* Report rx overflow error */
+
+      dev->cd_error |= CAN_ERROR5_RXOVERFLOW;
+    }
+#endif
 
   return err;
 }
diff --git a/include/nuttx/can.h b/include/nuttx/can.h
index 6f8b3d72aa9..573edd16b2b 100644
--- a/include/nuttx/can.h
+++ b/include/nuttx/can.h
@@ -219,7 +219,8 @@
 #  define CAN_ERROR_BUSOFF        (1 << 6) /* Bit 6: Bus off */
 #  define CAN_ERROR_BUSERROR      (1 << 7) /* Bit 7: Bus error */
 #  define CAN_ERROR_RESTARTED     (1 << 8) /* Bit 8: Controller restarted */
-                                           /* Bits 9-10: Available */
+#  define CAN_ERROR_INTERNAL      (1 << 9) /* Bit 9: Stack internal error (See CAN_ERROR5_* definitions) */
+                                           /* Bit 10: Available */
 
 /* The remaining definitions described the error report payload that follows the
  * CAN header.
@@ -295,6 +296,11 @@
 #  define CANL_ERROR4_SHORT2GND   0x40
 #  define CANL_ERROR4_SHORT2CANH  0x50
 
+/* Data[5]: Error status of stack internals */
+
+#  define CAN_ERROR5_UNSPEC       0x00     /* Unspecified error */
+#  define CAN_ERROR5_RXOVERFLOW   (1 << 0) /* Bit 0: RX buffer overflow */
+
 #endif /* CONFIG_CAN_ERRORS */
 
 /* CAN filter support ***************************************************************/
@@ -494,6 +500,9 @@ struct can_dev_s
   uint8_t              cd_npendrtr;      /* Number of pending RTR messages */
   volatile uint8_t     cd_ntxwaiters;    /* Number of threads waiting to enqueue a message */
   volatile uint8_t     cd_nrxwaiters;    /* Number of threads waiting to receive a message */
+#ifdef CONFIG_CAN_ERRORS
+  uint8_t              cd_error;         /* Flags to indicate internal device errors */
+#endif
   sem_t                cd_closesem;      /* Locks out new opens while close is in progress */
   struct can_txfifo_s  cd_xmit;          /* Describes transmit FIFO */
   struct can_rxfifo_s  cd_recv;          /* Describes receive FIFO */

From 60382e7dcffe37c853036a21b0172cfc6878e60c Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 09:52:32 -0600
Subject: [PATCH 07/33] fs/Kconfig:  Allow CONFIG_FS_WRITABLE to be manually
 selected

---
 fs/Kconfig | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/fs/Kconfig b/fs/Kconfig
index 8f25c3d43f8..d9f987fe08b 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -43,10 +43,20 @@ config DISABLE_PSEUDOFS_OPERATIONS
 config FS_READABLE
 	bool
 	default n
+	---help---
+		Automatically selected if any readable file system is selected
 
 config FS_WRITABLE
-	bool
+	bool "Writable file system"
 	default n
+	---help---
+		Automatically selected if any writable file system is selected.
+		This selection will disable support for writing in all block drivers
+		and also the block-to-character (BCH) layer and the MTD FTL layer.
+
+		This selection can also be manually selected.  You might want to do
+		this if there are no writable file systems enabled, but you still
+		want support for write access in block drivers and/or FTL.
 
 source fs/aio/Kconfig
 source fs/semaphore/Kconfig

From a2a6c0b9a5a716dd5401173d3dadc7f7416b238d Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 09:54:33 -0600
Subject: [PATCH 08/33] Improve some Kconfig help comments

---
 fs/Kconfig | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/fs/Kconfig b/fs/Kconfig
index d9f987fe08b..85c7c20fd20 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -50,9 +50,10 @@ config FS_WRITABLE
 	bool "Writable file system"
 	default n
 	---help---
-		Automatically selected if any writable file system is selected.
-		This selection will disable support for writing in all block drivers
-		and also the block-to-character (BCH) layer and the MTD FTL layer.
+		Automatically selected if any writable file system is selected.  If
+		not selected, disable support for writing will be disabled in all
+		block drivers and also the block-to-character (BCH) layer and the
+		MTD FTL layer.
 
 		This selection can also be manually selected.  You might want to do
 		this if there are no writable file systems enabled, but you still

From d5be40be5fe88b701c66094d38f8500a674944d3 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 10:01:43 -0600
Subject: [PATCH 09/33] Remove CONFIG_FS_READABLE/WRITABLE logic from
 tools/mkconfig.c.  This logic has been replaced with proper logic in the
 Kconfig files, it is out of date and an ongoing maintenance problem, and it
 shoulw not be necessary.

---
 fs/Kconfig       |  6 +++---
 tools/mkconfig.c | 12 ------------
 2 files changed, 3 insertions(+), 15 deletions(-)

diff --git a/fs/Kconfig b/fs/Kconfig
index 85c7c20fd20..150bbcdde99 100644
--- a/fs/Kconfig
+++ b/fs/Kconfig
@@ -51,9 +51,9 @@ config FS_WRITABLE
 	default n
 	---help---
 		Automatically selected if any writable file system is selected.  If
-		not selected, disable support for writing will be disabled in all
-		block drivers and also the block-to-character (BCH) layer and the
-		MTD FTL layer.
+		not selected, support for writing will be disabled in all block
+		drivers and also the block-to-character (BCH) layer and the MTD FTL
+		layer.
 
 		This selection can also be manually selected.  You might want to do
 		this if there are no writable file systems enabled, but you still
diff --git a/tools/mkconfig.c b/tools/mkconfig.c
index 70160aa0bb5..68f9e770e5f 100644
--- a/tools/mkconfig.c
+++ b/tools/mkconfig.c
@@ -225,18 +225,6 @@ int main(int argc, char **argv, char **envp)
   printf("# undef CONFIG_FS_BINFS\n");
   printf("# undef CONFIG_NFS\n");
   printf("#endif\n\n");
-  printf("/* Check if any readable and writable filesystem (OR USB storage) is supported */\n\n");
-  printf("#if defined(CONFIG_FS_FAT) || defined(CONFIG_FS_ROMFS) || defined(CONFIG_USBMSC) || \\\n");
-  printf("    defined(CONFIG_FS_NXFFS) || defined(CONFIG_FS_SMARTFS) || defined(CONFIG_FS_BINFS) || \\\n");
-  printf("    defined(CONFIG_NFS) || defined(CONFIG_FS_PROCFS)\n");
-  printf("# undef  CONFIG_FS_READABLE\n");
-  printf("# define CONFIG_FS_READABLE 1\n");
-  printf("#endif\n\n");
-  printf("#if defined(CONFIG_FS_FAT) || defined(CONFIG_USBMSC) || defined(CONFIG_FS_NXFFS) || \\\n");
-  printf("    defined(CONFIG_FS_SMARTFS) || defined(CONFIG_NFS)\n");
-  printf("# undef  CONFIG_FS_WRITABLE\n");
-  printf("# define CONFIG_FS_WRITABLE 1\n");
-  printf("#endif\n\n");
   printf("/* There can be no network support with no socket descriptors */\n\n");
   printf("#if CONFIG_NSOCKET_DESCRIPTORS <= 0\n");
   printf("# undef CONFIG_NET\n");

From ef6edb60947680c39cacc5d04b840bea160dc4fa Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 10:10:14 -0600
Subject: [PATCH 10/33] tools/mkconfig.c:  Go further... remove all
 autogenerated sanity checks from the config.h header file

---
 tools/mkconfig.c | 172 +----------------------------------------------
 1 file changed, 1 insertion(+), 171 deletions(-)

diff --git a/tools/mkconfig.c b/tools/mkconfig.c
index 68f9e770e5f..15a2a34304c 100644
--- a/tools/mkconfig.c
+++ b/tools/mkconfig.c
@@ -98,178 +98,8 @@ int main(int argc, char **argv, char **envp)
   printf("/* config.h -- Autogenerated! Do not edit. */\n\n");
   printf("#ifndef __INCLUDE_NUTTX_CONFIG_H\n");
   printf("#define __INCLUDE_NUTTX_CONFIG_H\n\n");
-  printf("/* Architecture-specific options *************************/\n\n");
   generate_definitions(stream);
-  printf("\n/* Sanity Checks *****************************************/\n\n");
-  printf("/* If this is an NXFLAT, external build, then make sure that\n");
-  printf(" * NXFLAT support is enabled in the base code.\n");
-  printf(" */\n\n");
-  printf("#if defined(__NXFLAT__) && !defined(CONFIG_NXFLAT)\n");
-  printf("# error \"NXFLAT support not enabled in this configuration\"\n");
-  printf("#endif\n\n");
-  printf("/* NXFLAT requires PIC support in the TCBs. */\n\n");
-  printf("#if defined(CONFIG_NXFLAT)\n");
-  printf("# undef CONFIG_PIC\n");
-  printf("# define CONFIG_PIC 1\n");
-  printf("#endif\n\n");
-  printf("/* Binary format support is disabled if no binary formats are\n");
-  printf(" * configured (at present, NXFLAT is the only supported binary.\n");
-  printf(" * format).\n");
-  printf(" */\n\n");
-  printf("#if !defined(CONFIG_NXFLAT) && !defined(CONFIG_ELF) && !defined(CONFIG_BUILTIN)\n");
-  printf("# undef CONFIG_BINFMT_DISABLE\n");
-  printf("# define CONFIG_BINFMT_DISABLE 1\n");
-  printf("#endif\n\n");
-  printf("/* The correct way to disable RR scheduling is to set the\n");
-  printf(" * timeslice to zero.\n");
-  printf(" */\n\n");
-  printf("#ifndef CONFIG_RR_INTERVAL\n");
-  printf("# define CONFIG_RR_INTERVAL 0\n");
-  printf("#endif\n\n");
-  printf("/* The correct way to disable filesystem supuport is to set the number of\n");
-  printf(" * file descriptors to zero.\n");
-  printf(" */\n\n");
-  printf("#ifndef CONFIG_NFILE_DESCRIPTORS\n");
-  printf("# define CONFIG_NFILE_DESCRIPTORS 0\n");
-  printf("#endif\n\n");
-  printf("/* If a console is selected, then make sure that there are resources for\n");
-  printf(" * three file descriptors and, if any streams are selected, also for three\n");
-  printf(" * file streams.\n");
-  printf(" *\n");
-  printf(" * CONFIG_DEV_CONSOLE means that a builtin console device exists at /dev/console\n");
-  printf(" * and can be opened during boot-up.  Other consoles, such as USB consoles, may\n");
-  printf(" * not exist at boot-upand have to be handled in a different way.  Three file\n");
-  printf(" * descriptors and three file streams are still needed.\n");
-  printf(" */\n\n");
-  printf("#if defined(CONFIG_DEV_CONSOLE) || defined(CONFIG_CDCACM_CONSOLE) || \\\n");
-  printf("    defined(CONFIG_PL2303_CONSOLE)\n");
-  printf("# if CONFIG_NFILE_DESCRIPTORS < 3\n");
-  printf("#   undef CONFIG_NFILE_DESCRIPTORS\n");
-  printf("#   define CONFIG_NFILE_DESCRIPTORS 3\n");
-  printf("# endif\n\n");
-  printf("# if CONFIG_NFILE_STREAMS > 0 && CONFIG_NFILE_STREAMS < 3\n");
-  printf("#  undef CONFIG_NFILE_STREAMS\n");
-  printf("#  define CONFIG_NFILE_STREAMS 3\n");
-  printf("# endif\n\n");
-  printf("/* If no console is selected, then disable all builtin console devices */\n\n");
-  printf("#else\n");
-  printf("#  undef CONFIG_DEV_LOWCONSOLE\n");
-  printf("#  undef CONFIG_RAMLOG_CONSOLE\n");
-  printf("#endif\n\n");
-  printf("/* If priority inheritance is disabled, then do not allocate any\n");
-  printf(" * associated resources.\n");
-  printf(" */\n\n");
-  printf("#if !defined(CONFIG_PRIORITY_INHERITANCE) || !defined(CONFIG_SEM_PREALLOCHOLDERS)\n");
-  printf("# undef CONFIG_SEM_PREALLOCHOLDERS\n");
-  printf("# define CONFIG_SEM_PREALLOCHOLDERS 0\n");
-  printf("#endif\n\n");
-  printf("#if !defined(CONFIG_PRIORITY_INHERITANCE) || !defined(CONFIG_SEM_NNESTPRIO)\n");
-  printf("# undef CONFIG_SEM_NNESTPRIO\n");
-  printf("# define CONFIG_SEM_NNESTPRIO 0\n");
-  printf("#endif\n\n");
-  printf("/* If no file descriptors are configured, then make certain no\n");
-  printf(" * streams are configured either.\n");
-  printf(" */\n\n");
-  printf("#if CONFIG_NFILE_DESCRIPTORS == 0\n");
-  printf("# undef CONFIG_NFILE_STREAMS\n");
-  printf("# define CONFIG_NFILE_STREAMS 0\n");
-  printf("#endif\n\n");
-  printf("/* There must be at least one memory region. */\n\n");
-  printf("#ifndef CONFIG_MM_REGIONS\n");
-  printf("# define CONFIG_MM_REGIONS 1\n");
-  printf("#endif\n\n");
-  printf("/* If the end of RAM is not specified then it is assumed to be the beginning\n");
-  printf(" * of RAM plus the RAM size.\n");
-  printf(" */\n\n");
-  printf("#ifndef CONFIG_RAM_END\n");
-  printf("# define CONFIG_RAM_END (CONFIG_RAM_START+CONFIG_RAM_SIZE)\n");
-  printf("#endif\n\n");
-  printf("#ifndef CONFIG_RAM_VEND\n");
-  printf("# define CONFIG_RAM_VEND (CONFIG_RAM_VSTART+CONFIG_RAM_SIZE)\n");
-  printf("#endif\n\n");
-  printf("/* If the end of FLASH is not specified then it is assumed to be the beginning\n");
-  printf(" * of FLASH plus the FLASH size.\n");
-  printf(" */\n\n");
-  printf("#ifndef CONFIG_FLASH_END\n");
-  printf("# define CONFIG_FLASH_END (CONFIG_FLASH_START+CONFIG_FLASH_SIZE)\n");
-  printf("#endif\n\n");
-  printf("/* If no file streams are configured, then make certain that buffered I/O\n");
-  printf(" * support is disabled\n");
-  printf(" */\n\n");
-  printf("#if CONFIG_NFILE_STREAMS == 0\n");
-  printf("# undef CONFIG_STDIO_BUFFER_SIZE\n");
-  printf("# define CONFIG_STDIO_BUFFER_SIZE 0\n");
-  printf("#endif\n\n");
-  printf("/* If no standard C buffered I/O is not supported, then line-oriented buffering\n");
-  printf(" * cannot be supported.\n");
-  printf(" */\n\n");
-  printf("#if CONFIG_STDIO_BUFFER_SIZE == 0\n");
-  printf("# undef CONFIG_STDIO_LINEBUFFER\n");
-  printf("#endif\n\n");
-  printf("/* If the maximum message size is zero, then we assume that message queues\n");
-  printf(" * support should be disabled\n");
-  printf(" */\n\n");
-  printf("#if !defined(CONFIG_MQ_MAXMSGSIZE) || defined(CONFIG_DISABLE_MQUEUE)\n");
-  printf("# undef CONFIG_MQ_MAXMSGSIZE\n");
-  printf("# define CONFIG_MQ_MAXMSGSIZE 0\n");
-  printf("#endif\n\n");
-  printf("#if CONFIG_MQ_MAXMSGSIZE <= 0 && !defined(CONFIG_DISABLE_MQUEUE)\n");
-  printf("# define CONFIG_DISABLE_MQUEUE 1\n");
-  printf("#endif\n\n");
-  printf("/* If mountpoint support in not included, then no filesystem can be supported */\n\n");
-  printf("#ifdef CONFIG_DISABLE_MOUNTPOINT\n");
-  printf("# undef CONFIG_FS_FAT\n");
-  printf("# undef CONFIG_FS_ROMFS\n");
-  printf("# undef CONFIG_FS_NXFFS\n");
-  printf("# undef CONFIG_FS_SMARTFS\n");
-  printf("# undef CONFIG_FS_BINFS\n");
-  printf("# undef CONFIG_NFS\n");
-  printf("#endif\n\n");
-  printf("/* There can be no network support with no socket descriptors */\n\n");
-  printf("#if CONFIG_NSOCKET_DESCRIPTORS <= 0\n");
-  printf("# undef CONFIG_NET\n");
-  printf("#endif\n\n");
-  printf("/* Conversely, if there is no network support, there is no need for\n");
-  printf(" * socket descriptors\n");
-  printf(" */\n\n");
-  printf("#ifndef CONFIG_NET\n");
-  printf("# undef CONFIG_NSOCKET_DESCRIPTORS\n");
-  printf("# define CONFIG_NSOCKET_DESCRIPTORS 0\n");
-  printf("#endif\n\n");
-  printf("/* Protocol support can only be provided on top of basic network support */\n\n");
-  printf("#ifndef CONFIG_NET\n");
-  printf("# undef CONFIG_NET_TCP\n");
-  printf("# undef CONFIG_NET_UDP\n");
-  printf("# undef CONFIG_NET_ICMP\n");
-  printf("#endif\n\n");
-  printf("/* NFS client can only be provided on top of UDP network support */\n\n");
-  printf("#if !defined(CONFIG_NET) || !defined(CONFIG_NET_UDP)\n");
-  printf("# undef CONFIG_NFS\n");
-  printf("#endif\n\n");
-  printf("/* Verbose debug and sub-system debug only make sense if debug is enabled */\n\n");
-  printf("#ifndef CONFIG_DEBUG\n");
-  printf("# undef CONFIG_DEBUG_VERBOSE\n");
-  printf("# undef CONFIG_DEBUG_SCHED\n");
-  printf("# undef CONFIG_DEBUG_MM\n");
-  printf("# undef CONFIG_DEBUG_PAGING\n");
-  printf("# undef CONFIG_DEBUG_DMA\n");
-  printf("# undef CONFIG_DEBUG_FS\n");
-  printf("# undef CONFIG_DEBUG_LIB\n");
-  printf("# undef CONFIG_DEBUG_BINFMT\n");
-  printf("# undef CONFIG_DEBUG_NET\n");
-  printf("# undef CONFIG_DEBUG_USB\n");
-  printf("# undef CONFIG_DEBUG_GRAPHICS\n");
-  printf("# undef CONFIG_DEBUG_GPIO\n");
-  printf("# undef CONFIG_DEBUG_SPI\n");
-  printf("# undef CONFIG_DEBUG_HEAP\n");
-  printf("#endif\n\n");
-  printf("/* User entry point. This is provided as a fall-back to keep compatibility\n");
-  printf(" * with existing code, for builds which do not define CONFIG_USER_ENTRYPOINT.\n");
-  printf(" */\n\n");
-  printf("#ifndef CONFIG_USER_ENTRYPOINT\n");
-  printf("# define CONFIG_USER_ENTRYPOINT main\n");
-  printf("#endif\n\n");
-  printf("#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");
+  printf("/n#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");
   fclose(stream);
 
   /* Exit (without bothering to clean up allocations) */

From cf489a60834639ae2483a7bdfb369790cdec39fe Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 10:06:12 -0600
Subject: [PATCH 11/33] Fix a typo in the last commit

---
 tools/mkconfig.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/mkconfig.c b/tools/mkconfig.c
index 15a2a34304c..28b0c0351f0 100644
--- a/tools/mkconfig.c
+++ b/tools/mkconfig.c
@@ -99,7 +99,7 @@ int main(int argc, char **argv, char **envp)
   printf("#ifndef __INCLUDE_NUTTX_CONFIG_H\n");
   printf("#define __INCLUDE_NUTTX_CONFIG_H\n\n");
   generate_definitions(stream);
-  printf("/n#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");
+  printf("\n#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");
   fclose(stream);
 
   /* Exit (without bothering to clean up allocations) */

From b77672a049e3979016d07b2d40593021dbb14673 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 10:25:06 -0600
Subject: [PATCH 12/33] Backout d5be40be5fe88b701c66094d38f8500a674944d3.  This
 change is logically correct but unmasks a lot of issues.  Reverted for now.

---
 tools/mkconfig.c | 174 ++++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 173 insertions(+), 1 deletion(-)

diff --git a/tools/mkconfig.c b/tools/mkconfig.c
index 28b0c0351f0..4a64c7867c4 100644
--- a/tools/mkconfig.c
+++ b/tools/mkconfig.c
@@ -98,8 +98,180 @@ int main(int argc, char **argv, char **envp)
   printf("/* config.h -- Autogenerated! Do not edit. */\n\n");
   printf("#ifndef __INCLUDE_NUTTX_CONFIG_H\n");
   printf("#define __INCLUDE_NUTTX_CONFIG_H\n\n");
+  printf("/* Architecture-specific options *************************/\n\n");
+
   generate_definitions(stream);
-  printf("\n#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");
+
+  printf("\n/* Sanity Checks *****************************************/\n\n");
+  printf("/* If this is an NXFLAT, external build, then make sure that\n");
+  printf(" * NXFLAT support is enabled in the base code.\n");
+  printf(" */\n\n");
+  printf("#if defined(__NXFLAT__) && !defined(CONFIG_NXFLAT)\n");
+  printf("# error \"NXFLAT support not enabled in this configuration\"\n");
+  printf("#endif\n\n");
+  printf("/* NXFLAT requires PIC support in the TCBs. */\n\n");
+  printf("#if defined(CONFIG_NXFLAT)\n");
+  printf("# undef CONFIG_PIC\n");
+  printf("# define CONFIG_PIC 1\n");
+  printf("#endif\n\n");
+  printf("/* Binary format support is disabled if no binary formats are\n");
+  printf(" * configured (at present, NXFLAT is the only supported binary.\n");
+  printf(" * format).\n");
+  printf(" */\n\n");
+  printf("#if !defined(CONFIG_NXFLAT) && !defined(CONFIG_ELF) && !defined(CONFIG_BUILTIN)\n");
+  printf("# undef CONFIG_BINFMT_DISABLE\n");
+  printf("# define CONFIG_BINFMT_DISABLE 1\n");
+  printf("#endif\n\n");
+  printf("/* The correct way to disable RR scheduling is to set the\n");
+  printf(" * timeslice to zero.\n");
+  printf(" */\n\n");
+  printf("#ifndef CONFIG_RR_INTERVAL\n");
+  printf("# define CONFIG_RR_INTERVAL 0\n");
+  printf("#endif\n\n");
+  printf("/* The correct way to disable filesystem supuport is to set the number of\n");
+  printf(" * file descriptors to zero.\n");
+  printf(" */\n\n");
+  printf("#ifndef CONFIG_NFILE_DESCRIPTORS\n");
+  printf("# define CONFIG_NFILE_DESCRIPTORS 0\n");
+  printf("#endif\n\n");
+  printf("/* If a console is selected, then make sure that there are resources for\n");
+  printf(" * three file descriptors and, if any streams are selected, also for three\n");
+  printf(" * file streams.\n");
+  printf(" *\n");
+  printf(" * CONFIG_DEV_CONSOLE means that a builtin console device exists at /dev/console\n");
+  printf(" * and can be opened during boot-up.  Other consoles, such as USB consoles, may\n");
+  printf(" * not exist at boot-upand have to be handled in a different way.  Three file\n");
+  printf(" * descriptors and three file streams are still needed.\n");
+  printf(" */\n\n");
+  printf("#if defined(CONFIG_DEV_CONSOLE) || defined(CONFIG_CDCACM_CONSOLE) || \\\n");
+  printf("    defined(CONFIG_PL2303_CONSOLE)\n");
+  printf("# if CONFIG_NFILE_DESCRIPTORS < 3\n");
+  printf("#   undef CONFIG_NFILE_DESCRIPTORS\n");
+  printf("#   define CONFIG_NFILE_DESCRIPTORS 3\n");
+  printf("# endif\n\n");
+  printf("# if CONFIG_NFILE_STREAMS > 0 && CONFIG_NFILE_STREAMS < 3\n");
+  printf("#  undef CONFIG_NFILE_STREAMS\n");
+  printf("#  define CONFIG_NFILE_STREAMS 3\n");
+  printf("# endif\n\n");
+  printf("/* If no console is selected, then disable all builtin console devices */\n\n");
+  printf("#else\n");
+  printf("#  undef CONFIG_DEV_LOWCONSOLE\n");
+  printf("#  undef CONFIG_RAMLOG_CONSOLE\n");
+  printf("#endif\n\n");
+  printf("/* If priority inheritance is disabled, then do not allocate any\n");
+  printf(" * associated resources.\n");
+  printf(" */\n\n");
+  printf("#if !defined(CONFIG_PRIORITY_INHERITANCE) || !defined(CONFIG_SEM_PREALLOCHOLDERS)\n");
+  printf("# undef CONFIG_SEM_PREALLOCHOLDERS\n");
+  printf("# define CONFIG_SEM_PREALLOCHOLDERS 0\n");
+  printf("#endif\n\n");
+  printf("#if !defined(CONFIG_PRIORITY_INHERITANCE) || !defined(CONFIG_SEM_NNESTPRIO)\n");
+  printf("# undef CONFIG_SEM_NNESTPRIO\n");
+  printf("# define CONFIG_SEM_NNESTPRIO 0\n");
+  printf("#endif\n\n");
+  printf("/* If no file descriptors are configured, then make certain no\n");
+  printf(" * streams are configured either.\n");
+  printf(" */\n\n");
+  printf("#if CONFIG_NFILE_DESCRIPTORS == 0\n");
+  printf("# undef CONFIG_NFILE_STREAMS\n");
+  printf("# define CONFIG_NFILE_STREAMS 0\n");
+  printf("#endif\n\n");
+  printf("/* There must be at least one memory region. */\n\n");
+  printf("#ifndef CONFIG_MM_REGIONS\n");
+  printf("# define CONFIG_MM_REGIONS 1\n");
+  printf("#endif\n\n");
+  printf("/* If the end of RAM is not specified then it is assumed to be the beginning\n");
+  printf(" * of RAM plus the RAM size.\n");
+  printf(" */\n\n");
+  printf("#ifndef CONFIG_RAM_END\n");
+  printf("# define CONFIG_RAM_END (CONFIG_RAM_START+CONFIG_RAM_SIZE)\n");
+  printf("#endif\n\n");
+  printf("#ifndef CONFIG_RAM_VEND\n");
+  printf("# define CONFIG_RAM_VEND (CONFIG_RAM_VSTART+CONFIG_RAM_SIZE)\n");
+  printf("#endif\n\n");
+  printf("/* If the end of FLASH is not specified then it is assumed to be the beginning\n");
+  printf(" * of FLASH plus the FLASH size.\n");
+  printf(" */\n\n");
+  printf("#ifndef CONFIG_FLASH_END\n");
+  printf("# define CONFIG_FLASH_END (CONFIG_FLASH_START+CONFIG_FLASH_SIZE)\n");
+  printf("#endif\n\n");
+  printf("/* If no file streams are configured, then make certain that buffered I/O\n");
+  printf(" * support is disabled\n");
+  printf(" */\n\n");
+  printf("#if CONFIG_NFILE_STREAMS == 0\n");
+  printf("# undef CONFIG_STDIO_BUFFER_SIZE\n");
+  printf("# define CONFIG_STDIO_BUFFER_SIZE 0\n");
+  printf("#endif\n\n");
+  printf("/* If no standard C buffered I/O is not supported, then line-oriented buffering\n");
+  printf(" * cannot be supported.\n");
+  printf(" */\n\n");
+  printf("#if CONFIG_STDIO_BUFFER_SIZE == 0\n");
+  printf("# undef CONFIG_STDIO_LINEBUFFER\n");
+  printf("#endif\n\n");
+  printf("/* If the maximum message size is zero, then we assume that message queues\n");
+  printf(" * support should be disabled\n");
+  printf(" */\n\n");
+  printf("#if !defined(CONFIG_MQ_MAXMSGSIZE) || defined(CONFIG_DISABLE_MQUEUE)\n");
+  printf("# undef CONFIG_MQ_MAXMSGSIZE\n");
+  printf("# define CONFIG_MQ_MAXMSGSIZE 0\n");
+  printf("#endif\n\n");
+  printf("#if CONFIG_MQ_MAXMSGSIZE <= 0 && !defined(CONFIG_DISABLE_MQUEUE)\n");
+  printf("# define CONFIG_DISABLE_MQUEUE 1\n");
+  printf("#endif\n\n");
+  printf("/* If mountpoint support in not included, then no filesystem can be supported */\n\n");
+  printf("#ifdef CONFIG_DISABLE_MOUNTPOINT\n");
+  printf("# undef CONFIG_FS_FAT\n");
+  printf("# undef CONFIG_FS_ROMFS\n");
+  printf("# undef CONFIG_FS_NXFFS\n");
+  printf("# undef CONFIG_FS_SMARTFS\n");
+  printf("# undef CONFIG_FS_BINFS\n");
+  printf("# undef CONFIG_NFS\n");
+  printf("#endif\n\n");
+  printf("/* There can be no network support with no socket descriptors */\n\n");
+  printf("#if CONFIG_NSOCKET_DESCRIPTORS <= 0\n");
+  printf("# undef CONFIG_NET\n");
+  printf("#endif\n\n");
+  printf("/* Conversely, if there is no network support, there is no need for\n");
+  printf(" * socket descriptors\n");
+  printf(" */\n\n");
+  printf("#ifndef CONFIG_NET\n");
+  printf("# undef CONFIG_NSOCKET_DESCRIPTORS\n");
+  printf("# define CONFIG_NSOCKET_DESCRIPTORS 0\n");
+  printf("#endif\n\n");
+  printf("/* Protocol support can only be provided on top of basic network support */\n\n");
+  printf("#ifndef CONFIG_NET\n");
+  printf("# undef CONFIG_NET_TCP\n");
+  printf("# undef CONFIG_NET_UDP\n");
+  printf("# undef CONFIG_NET_ICMP\n");
+  printf("#endif\n\n");
+  printf("/* NFS client can only be provided on top of UDP network support */\n\n");
+  printf("#if !defined(CONFIG_NET) || !defined(CONFIG_NET_UDP)\n");
+  printf("# undef CONFIG_NFS\n");
+  printf("#endif\n\n");
+  printf("/* Verbose debug and sub-system debug only make sense if debug is enabled */\n\n");
+  printf("#ifndef CONFIG_DEBUG\n");
+  printf("# undef CONFIG_DEBUG_VERBOSE\n");
+  printf("# undef CONFIG_DEBUG_SCHED\n");
+  printf("# undef CONFIG_DEBUG_MM\n");
+  printf("# undef CONFIG_DEBUG_PAGING\n");
+  printf("# undef CONFIG_DEBUG_DMA\n");
+  printf("# undef CONFIG_DEBUG_FS\n");
+  printf("# undef CONFIG_DEBUG_LIB\n");
+  printf("# undef CONFIG_DEBUG_BINFMT\n");
+  printf("# undef CONFIG_DEBUG_NET\n");
+  printf("# undef CONFIG_DEBUG_USB\n");
+  printf("# undef CONFIG_DEBUG_GRAPHICS\n");
+  printf("# undef CONFIG_DEBUG_GPIO\n");
+  printf("# undef CONFIG_DEBUG_SPI\n");
+  printf("# undef CONFIG_DEBUG_HEAP\n");
+  printf("#endif\n\n");
+  printf("/* User entry point. This is provided as a fall-back to keep compatibility\n");
+  printf(" * with existing code, for builds which do not define CONFIG_USER_ENTRYPOINT.\n");
+  printf(" */\n\n");
+  printf("#ifndef CONFIG_USER_ENTRYPOINT\n");
+  printf("# define CONFIG_USER_ENTRYPOINT main\n");
+  printf("#endif\n\n");
+  printf("#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");
   fclose(stream);
 
   /* Exit (without bothering to clean up allocations) */

From 5356e3d74792f602a9a1026a1d9041a56d0a60d5 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 11:07:00 -0600
Subject: [PATCH 13/33] Since I can't (yet) get rid of the sanity checks in
 config.h, I suppose I should at least update the checks.

---
 Kconfig                      |  10 ---
 drivers/leds/userled_upper.c |   4 +-
 tools/mkconfig.c             | 145 ++++++++++++++++++++++-------------
 3 files changed, 92 insertions(+), 67 deletions(-)

diff --git a/Kconfig b/Kconfig
index 11e734ab2ac..17d6e351f9e 100644
--- a/Kconfig
+++ b/Kconfig
@@ -574,16 +574,6 @@ config DEBUG_INPUT
 		this debug option is board-specific and may not be available for
 		some boards.
 
-config DEBUG_DISCRETE
-	bool "Discrete I/O Debug Output"
-	default n
-	depends on DISCRETE_IO
-	---help---
-		Enable low level debug SYSLOG output from the discrete I/O device
-		drivers such as LEDs and I/O expanders (disabled by default).
-		Support for this debug option is board-specific and may not be
-		available for some boards.
-
 config DEBUG_ANALOG
 	bool "Analog Device Debug Output"
 	default n
diff --git a/drivers/leds/userled_upper.c b/drivers/leds/userled_upper.c
index 0d2377b624f..5c8f0a0997b 100644
--- a/drivers/leds/userled_upper.c
+++ b/drivers/leds/userled_upper.c
@@ -63,10 +63,10 @@
 
 #ifndef CONFIG_DEBUG
 #  undef CONFIG_DEBUG_VERBOSE
-#  undef CONFIG_DEBUG_DISCRETE
+#  undef CONFIG_DEBUG_LEDS
 #endif
 
-#ifdef CONFIG_DEBUG_DISCRETE
+#ifdef CONFIG_DEBUG_LEDS
 #  define ddbg lldbg
 #  ifdef CONFIG_DEBUG_VERBOSE
 #    define dvdbg lldbg
diff --git a/tools/mkconfig.c b/tools/mkconfig.c
index 4a64c7867c4..710a0926e28 100644
--- a/tools/mkconfig.c
+++ b/tools/mkconfig.c
@@ -109,31 +109,36 @@ int main(int argc, char **argv, char **envp)
   printf("#if defined(__NXFLAT__) && !defined(CONFIG_NXFLAT)\n");
   printf("# error \"NXFLAT support not enabled in this configuration\"\n");
   printf("#endif\n\n");
+
   printf("/* NXFLAT requires PIC support in the TCBs. */\n\n");
   printf("#if defined(CONFIG_NXFLAT)\n");
-  printf("# undef CONFIG_PIC\n");
-  printf("# define CONFIG_PIC 1\n");
+  printf("#  undef CONFIG_PIC\n");
+  printf("#  define CONFIG_PIC 1\n");
   printf("#endif\n\n");
+
   printf("/* Binary format support is disabled if no binary formats are\n");
   printf(" * configured (at present, NXFLAT is the only supported binary.\n");
   printf(" * format).\n");
   printf(" */\n\n");
   printf("#if !defined(CONFIG_NXFLAT) && !defined(CONFIG_ELF) && !defined(CONFIG_BUILTIN)\n");
-  printf("# undef CONFIG_BINFMT_DISABLE\n");
-  printf("# define CONFIG_BINFMT_DISABLE 1\n");
+  printf("#  undef CONFIG_BINFMT_DISABLE\n");
+  printf("#  define CONFIG_BINFMT_DISABLE 1\n");
   printf("#endif\n\n");
+
   printf("/* The correct way to disable RR scheduling is to set the\n");
   printf(" * timeslice to zero.\n");
   printf(" */\n\n");
   printf("#ifndef CONFIG_RR_INTERVAL\n");
-  printf("# define CONFIG_RR_INTERVAL 0\n");
+  printf("#  define CONFIG_RR_INTERVAL 0\n");
   printf("#endif\n\n");
+
   printf("/* The correct way to disable filesystem supuport is to set the number of\n");
   printf(" * file descriptors to zero.\n");
   printf(" */\n\n");
   printf("#ifndef CONFIG_NFILE_DESCRIPTORS\n");
-  printf("# define CONFIG_NFILE_DESCRIPTORS 0\n");
+  printf("#  define CONFIG_NFILE_DESCRIPTORS 0\n");
   printf("#endif\n\n");
+
   printf("/* If a console is selected, then make sure that there are resources for\n");
   printf(" * three file descriptors and, if any streams are selected, also for three\n");
   printf(" * file streams.\n");
@@ -158,119 +163,149 @@ int main(int argc, char **argv, char **envp)
   printf("#  undef CONFIG_DEV_LOWCONSOLE\n");
   printf("#  undef CONFIG_RAMLOG_CONSOLE\n");
   printf("#endif\n\n");
+
   printf("/* If priority inheritance is disabled, then do not allocate any\n");
   printf(" * associated resources.\n");
   printf(" */\n\n");
   printf("#if !defined(CONFIG_PRIORITY_INHERITANCE) || !defined(CONFIG_SEM_PREALLOCHOLDERS)\n");
-  printf("# undef CONFIG_SEM_PREALLOCHOLDERS\n");
-  printf("# define CONFIG_SEM_PREALLOCHOLDERS 0\n");
+  printf("#  undef CONFIG_SEM_PREALLOCHOLDERS\n");
+  printf("#  define CONFIG_SEM_PREALLOCHOLDERS 0\n");
   printf("#endif\n\n");
   printf("#if !defined(CONFIG_PRIORITY_INHERITANCE) || !defined(CONFIG_SEM_NNESTPRIO)\n");
-  printf("# undef CONFIG_SEM_NNESTPRIO\n");
-  printf("# define CONFIG_SEM_NNESTPRIO 0\n");
+  printf("#  undef CONFIG_SEM_NNESTPRIO\n");
+  printf("#  define CONFIG_SEM_NNESTPRIO 0\n");
   printf("#endif\n\n");
+
   printf("/* If no file descriptors are configured, then make certain no\n");
   printf(" * streams are configured either.\n");
   printf(" */\n\n");
   printf("#if CONFIG_NFILE_DESCRIPTORS == 0\n");
-  printf("# undef CONFIG_NFILE_STREAMS\n");
-  printf("# define CONFIG_NFILE_STREAMS 0\n");
+  printf("#  undef CONFIG_NFILE_STREAMS\n");
+  printf("#  define CONFIG_NFILE_STREAMS 0\n");
   printf("#endif\n\n");
+
   printf("/* There must be at least one memory region. */\n\n");
   printf("#ifndef CONFIG_MM_REGIONS\n");
-  printf("# define CONFIG_MM_REGIONS 1\n");
+  printf("#  define CONFIG_MM_REGIONS 1\n");
   printf("#endif\n\n");
+
   printf("/* If the end of RAM is not specified then it is assumed to be the beginning\n");
   printf(" * of RAM plus the RAM size.\n");
   printf(" */\n\n");
   printf("#ifndef CONFIG_RAM_END\n");
-  printf("# define CONFIG_RAM_END (CONFIG_RAM_START+CONFIG_RAM_SIZE)\n");
+  printf("#  define CONFIG_RAM_END (CONFIG_RAM_START+CONFIG_RAM_SIZE)\n");
   printf("#endif\n\n");
   printf("#ifndef CONFIG_RAM_VEND\n");
-  printf("# define CONFIG_RAM_VEND (CONFIG_RAM_VSTART+CONFIG_RAM_SIZE)\n");
+  printf("#  define CONFIG_RAM_VEND (CONFIG_RAM_VSTART+CONFIG_RAM_SIZE)\n");
   printf("#endif\n\n");
+
   printf("/* If the end of FLASH is not specified then it is assumed to be the beginning\n");
   printf(" * of FLASH plus the FLASH size.\n");
   printf(" */\n\n");
   printf("#ifndef CONFIG_FLASH_END\n");
-  printf("# define CONFIG_FLASH_END (CONFIG_FLASH_START+CONFIG_FLASH_SIZE)\n");
+  printf("#  define CONFIG_FLASH_END (CONFIG_FLASH_START+CONFIG_FLASH_SIZE)\n");
   printf("#endif\n\n");
+
   printf("/* If no file streams are configured, then make certain that buffered I/O\n");
   printf(" * support is disabled\n");
   printf(" */\n\n");
   printf("#if CONFIG_NFILE_STREAMS == 0\n");
-  printf("# undef CONFIG_STDIO_BUFFER_SIZE\n");
-  printf("# define CONFIG_STDIO_BUFFER_SIZE 0\n");
+  printf("#  undef CONFIG_STDIO_BUFFER_SIZE\n");
+  printf("#  define CONFIG_STDIO_BUFFER_SIZE 0\n");
   printf("#endif\n\n");
+
   printf("/* If no standard C buffered I/O is not supported, then line-oriented buffering\n");
   printf(" * cannot be supported.\n");
   printf(" */\n\n");
   printf("#if CONFIG_STDIO_BUFFER_SIZE == 0\n");
-  printf("# undef CONFIG_STDIO_LINEBUFFER\n");
+  printf("#  undef CONFIG_STDIO_LINEBUFFER\n");
   printf("#endif\n\n");
+
   printf("/* If the maximum message size is zero, then we assume that message queues\n");
   printf(" * support should be disabled\n");
   printf(" */\n\n");
   printf("#if !defined(CONFIG_MQ_MAXMSGSIZE) || defined(CONFIG_DISABLE_MQUEUE)\n");
-  printf("# undef CONFIG_MQ_MAXMSGSIZE\n");
-  printf("# define CONFIG_MQ_MAXMSGSIZE 0\n");
+  printf("#  undef CONFIG_MQ_MAXMSGSIZE\n");
+  printf("#  define CONFIG_MQ_MAXMSGSIZE 0\n");
   printf("#endif\n\n");
   printf("#if CONFIG_MQ_MAXMSGSIZE <= 0 && !defined(CONFIG_DISABLE_MQUEUE)\n");
-  printf("# define CONFIG_DISABLE_MQUEUE 1\n");
+  printf("#  define CONFIG_DISABLE_MQUEUE 1\n");
   printf("#endif\n\n");
+
   printf("/* If mountpoint support in not included, then no filesystem can be supported */\n\n");
   printf("#ifdef CONFIG_DISABLE_MOUNTPOINT\n");
-  printf("# undef CONFIG_FS_FAT\n");
-  printf("# undef CONFIG_FS_ROMFS\n");
-  printf("# undef CONFIG_FS_NXFFS\n");
-  printf("# undef CONFIG_FS_SMARTFS\n");
-  printf("# undef CONFIG_FS_BINFS\n");
-  printf("# undef CONFIG_NFS\n");
+  printf("#  undef CONFIG_FS_BINFS\n");
+  printf("#  undef CONFIG_FS_FAT\n");
+  printf("#  undef CONFIG_FS_HOSTFS\n");
+  printf("#  undef CONFIG_NFS\n");
+  printf("#  undef CONFIG_FS_NXFFS\n");
+  printf("#  undef CONFIG_FS_PROCFS\n");
+  printf("#  undef CONFIG_FS_ROMFS\n");
+  printf("#  undef CONFIG_FS_SMARTFS\n");
+  printf("#  undef CONFIG_FS_TMPFS\n");
   printf("#endif\n\n");
+
   printf("/* There can be no network support with no socket descriptors */\n\n");
   printf("#if CONFIG_NSOCKET_DESCRIPTORS <= 0\n");
-  printf("# undef CONFIG_NET\n");
+  printf("#  undef CONFIG_NET\n");
   printf("#endif\n\n");
   printf("/* Conversely, if there is no network support, there is no need for\n");
   printf(" * socket descriptors\n");
   printf(" */\n\n");
   printf("#ifndef CONFIG_NET\n");
-  printf("# undef CONFIG_NSOCKET_DESCRIPTORS\n");
-  printf("# define CONFIG_NSOCKET_DESCRIPTORS 0\n");
+  printf("#  undef CONFIG_NSOCKET_DESCRIPTORS\n");
+  printf("#  define CONFIG_NSOCKET_DESCRIPTORS 0\n");
   printf("#endif\n\n");
+
   printf("/* Protocol support can only be provided on top of basic network support */\n\n");
   printf("#ifndef CONFIG_NET\n");
-  printf("# undef CONFIG_NET_TCP\n");
-  printf("# undef CONFIG_NET_UDP\n");
-  printf("# undef CONFIG_NET_ICMP\n");
+  printf("#  undef CONFIG_NET_TCP\n");
+  printf("#  undef CONFIG_NET_UDP\n");
+  printf("#  undef CONFIG_NET_ICMP\n");
   printf("#endif\n\n");
+
   printf("/* NFS client can only be provided on top of UDP network support */\n\n");
   printf("#if !defined(CONFIG_NET) || !defined(CONFIG_NET_UDP)\n");
-  printf("# undef CONFIG_NFS\n");
+  printf("#  undef CONFIG_NFS\n");
   printf("#endif\n\n");
+
   printf("/* Verbose debug and sub-system debug only make sense if debug is enabled */\n\n");
   printf("#ifndef CONFIG_DEBUG\n");
-  printf("# undef CONFIG_DEBUG_VERBOSE\n");
-  printf("# undef CONFIG_DEBUG_SCHED\n");
-  printf("# undef CONFIG_DEBUG_MM\n");
-  printf("# undef CONFIG_DEBUG_PAGING\n");
-  printf("# undef CONFIG_DEBUG_DMA\n");
-  printf("# undef CONFIG_DEBUG_FS\n");
-  printf("# undef CONFIG_DEBUG_LIB\n");
-  printf("# undef CONFIG_DEBUG_BINFMT\n");
-  printf("# undef CONFIG_DEBUG_NET\n");
-  printf("# undef CONFIG_DEBUG_USB\n");
-  printf("# undef CONFIG_DEBUG_GRAPHICS\n");
-  printf("# undef CONFIG_DEBUG_GPIO\n");
-  printf("# undef CONFIG_DEBUG_SPI\n");
-  printf("# undef CONFIG_DEBUG_HEAP\n");
-  printf("#endif\n\n");
-  printf("/* User entry point. This is provided as a fall-back to keep compatibility\n");
-  printf(" * with existing code, for builds which do not define CONFIG_USER_ENTRYPOINT.\n");
-  printf(" */\n\n");
-  printf("#ifndef CONFIG_USER_ENTRYPOINT\n");
-  printf("# define CONFIG_USER_ENTRYPOINT main\n");
+  printf("#  undef CONFIG_DEBUG_VERBOSE\n");
+  printf("#  undef CONFIG_DEBUG_ANALOG\n");
+  printf("#  undef CONFIG_DEBUG_AUDIO\n");
+  printf("#  undef CONFIG_DEBUG_BINFMT\n");
+  printf("#  undef CONFIG_DEBUG_CRYPTO\n");
+  printf("#  undef CONFIG_DEBUG_CAN\n");
+  printf("#  undef CONFIG_DEBUG_DMA\n");
+  printf("#  undef CONFIG_DEBUG_FS\n");
+  printf("#  undef CONFIG_DEBUG_GPIO\n");
+  printf("#  undef CONFIG_DEBUG_GRAPHICS\n");
+  printf("#  undef CONFIG_DEBUG_HEAP\n");
+  printf("#  undef CONFIG_DEBUG_I2C\n");
+  printf("#  undef CONFIG_DEBUG_I2S\n");
+  printf("#  undef CONFIG_DEBUG_INPUT\n");
+  printf("#  undef CONFIG_DEBUG_IRQ\n");
+  printf("#  undef CONFIG_DEBUG_LCD\n");
+  printf("#  undef CONFIG_DEBUG_LEDS\n");
+  printf("#  undef CONFIG_DEBUG_LIB\n");
+  printf("#  undef CONFIG_DEBUG_MM\n");
+  printf("#  undef CONFIG_DEBUG_NET\n");
+  printf("#  undef CONFIG_DEBUG_PAGING\n");
+  printf("#  undef CONFIG_DEBUG_PWM\n");
+  printf("#  undef CONFIG_DEBUG_RTC\n");
+  printf("#  undef CONFIG_DEBUG_SCHED\n");
+  printf("#  undef CONFIG_DEBUG_SDIO\n");
+  printf("#  undef CONFIG_DEBUG_SENSORS\n");
+  printf("#  undef CONFIG_DEBUG_SHM\n");
+  printf("#  undef CONFIG_DEBUG_SPI\n");
+  printf("#  undef CONFIG_DEBUG_SYSCALL\n");
+  printf("#  undef CONFIG_DEBUG_TIMER\n");
+  printf("#  undef CONFIG_DEBUG_USB\n");
+  printf("#  undef CONFIG_DEBUG_WATCHDOG\n");
+  printf("#  undef CONFIG_DEBUG_WIRELESS\n");
   printf("#endif\n\n");
+
   printf("#endif /* __INCLUDE_NUTTX_CONFIG_H */\n");
   fclose(stream);
 

From 8517a303a5134db236dd63883a85baf15839e84d Mon Sep 17 00:00:00 2001
From: David Sidrane <david_s5@nscdg.com>
Date: Wed, 11 May 2016 23:13:24 +0000
Subject: [PATCH 14/33] sam_xdmac.c edited online with Bitbucket

---
 arch/arm/src/samv7/sam_xdmac.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/src/samv7/sam_xdmac.c b/arch/arm/src/samv7/sam_xdmac.c
index 5519c87c790..de7127f5bcc 100644
--- a/arch/arm/src/samv7/sam_xdmac.c
+++ b/arch/arm/src/samv7/sam_xdmac.c
@@ -1809,7 +1809,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
       /* Set up the maximum size transfer */
 
       ret = sam_txbuffer(xdmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 

From 1ac3d2128a94dbe81f3abf566926c45f98bb0262 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 17:18:16 -0600
Subject: [PATCH 15/33] Trivial fix to comment

---
 configs/samv71-xult/src/sam_boot.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/samv71-xult/src/sam_boot.c b/configs/samv71-xult/src/sam_boot.c
index 92f07ddc6e5..9f703718eb2 100644
--- a/configs/samv71-xult/src/sam_boot.c
+++ b/configs/samv71-xult/src/sam_boot.c
@@ -103,7 +103,7 @@ void sam_boardinitialize(void)
 
 #ifdef CONFIG_SAMV7_SDRAMC
   /* Configure SDRAM if it has been enabled in the NuttX configuration.
-   * Here we assume, of course, that we are not running out SDRAM.
+   * Here we assume, of course, that we are not running out of SDRAM.
    */
 
   sam_sdram_config();

From f07ea1bb94ed6a4dac271771ea5d4511cba3bab2 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 17:26:59 -0600
Subject: [PATCH 16/33] SAM (all): Fix several places in DMA logic where a
 spurious semicolon causes bad conditional logic

---
 arch/arm/src/sam34/sam_dmac.c  | 4 ++--
 arch/arm/src/sama5/sam_dmac.c  | 4 ++--
 arch/arm/src/sama5/sam_xdmac.c | 4 ++--
 arch/arm/src/samv7/sam_xdmac.c | 2 +-
 4 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/arm/src/sam34/sam_dmac.c b/arch/arm/src/sam34/sam_dmac.c
index 26bd9c3a498..bcc8fb03f07 100644
--- a/arch/arm/src/sam34/sam_dmac.c
+++ b/arch/arm/src/sam34/sam_dmac.c
@@ -1554,7 +1554,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t nby
       /* Set up the maximum size transfer */
 
       ret = sam_txbuffer(dmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 
@@ -1622,7 +1622,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr, size_t nby
       /* Set up the maximum size transfer */
 
       ret = sam_rxbuffer(dmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 
diff --git a/arch/arm/src/sama5/sam_dmac.c b/arch/arm/src/sama5/sam_dmac.c
index 990e05df545..bf3f1481684 100644
--- a/arch/arm/src/sama5/sam_dmac.c
+++ b/arch/arm/src/sama5/sam_dmac.c
@@ -2159,7 +2159,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
       /* Set up the maximum size transfer */
 
       ret = sam_txbuffer(dmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 
@@ -2238,7 +2238,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
       /* Set up the maximum size transfer */
 
       ret = sam_rxbuffer(dmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 
diff --git a/arch/arm/src/sama5/sam_xdmac.c b/arch/arm/src/sama5/sam_xdmac.c
index 651624d63a0..bb4ce4e1ddc 100644
--- a/arch/arm/src/sama5/sam_xdmac.c
+++ b/arch/arm/src/sama5/sam_xdmac.c
@@ -2205,7 +2205,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
       /* Set up the maximum size transfer */
 
       ret = sam_txbuffer(xdmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 
@@ -2284,7 +2284,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
       /* Set up the maximum size transfer */
 
       ret = sam_rxbuffer(xdmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 
diff --git a/arch/arm/src/samv7/sam_xdmac.c b/arch/arm/src/samv7/sam_xdmac.c
index de7127f5bcc..886de898fe4 100644
--- a/arch/arm/src/samv7/sam_xdmac.c
+++ b/arch/arm/src/samv7/sam_xdmac.c
@@ -1888,7 +1888,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
       /* Set up the maximum size transfer */
 
       ret = sam_rxbuffer(xdmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 

From f64f7407bac6661df554605283d104bf2d17a38e Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 17:30:04 -0600
Subject: [PATCH 17/33] SAMDL DMAC: Fix several places in DMA logic where a
 spurious semicolon causes bad conditional logic

---
 arch/arm/src/samdl/sam_dmac.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/src/samdl/sam_dmac.c b/arch/arm/src/samdl/sam_dmac.c
index 0d1cb43041d..de5004f2d74 100644
--- a/arch/arm/src/samdl/sam_dmac.c
+++ b/arch/arm/src/samdl/sam_dmac.c
@@ -986,7 +986,7 @@ int sam_dmatxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
       /* Set up the maximum size transfer */
 
       ret = sam_txbuffer(dmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 
@@ -1060,7 +1060,7 @@ int sam_dmarxsetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
       /* Set up the maximum size transfer */
 
       ret = sam_rxbuffer(dmach, paddr, maddr, maxtransfer);
-      if (ret == OK);
+      if (ret == OK)
         {
           /* Decrement the number of bytes left to transfer */
 

From c00e3e55dce748be1d2d01ae326c86376c08e620 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Wed, 11 May 2016 17:42:59 -0600
Subject: [PATCH 18/33] Fix several places in DMA logic where a spurious
 semicolon causes bad conditional logic

---
 arch/arm/src/stm32/stm32_tim.c | 17 ++++++++++++-----
 arch/sh/src/m16c/m16c_serial.c |  2 +-
 fs/unionfs/fs_unionfs.c        |  2 +-
 sched/group/group_signal.c     |  2 +-
 4 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/arch/arm/src/stm32/stm32_tim.c b/arch/arm/src/stm32/stm32_tim.c
index c7d3b8350ce..14359625f88 100644
--- a/arch/arm/src/stm32/stm32_tim.c
+++ b/arch/arm/src/stm32/stm32_tim.c
@@ -516,7 +516,8 @@ static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t m
         val |= ATIM_CR1_OPM;
         break;
 
-      default: return ERROR;
+      default:
+        return ERROR;
     }
 
   stm32_tim_reload_counter(dev);
@@ -548,7 +549,10 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
 
   /* Further we use range as 0..3; if channel=0 it will also overflow here */
 
-  if (--channel > 4) return ERROR;
+  if (--channel > 4)
+    {
+      return ERROR;
+    }
 
   /* Assume that channel is disabled and polarity is active high */
 
@@ -699,7 +703,8 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
               stm32_tim_gpioconfig(GPIO_TIM4_CH4OUT, mode);
               break;
 #endif
-            default: return ERROR;
+            default:
+              return ERROR;
           }
         break;
 #endif
@@ -727,7 +732,8 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
               stm32_tim_gpioconfig(GPIO_TIM5_CH4OUT, mode);
               break;
 #endif
-            default: return ERROR;
+            default:
+              return ERROR;
           }
         break;
 #endif
@@ -753,7 +759,8 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
             case 3:
               stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break;
 #endif
-            default: return ERROR;
+            default:
+              return ERROR;
           }
         break;
 #endif
diff --git a/arch/sh/src/m16c/m16c_serial.c b/arch/sh/src/m16c/m16c_serial.c
index 6aeb973f751..a366e3b57d3 100644
--- a/arch/sh/src/m16c/m16c_serial.c
+++ b/arch/sh/src/m16c/m16c_serial.c
@@ -492,7 +492,7 @@ static inline void up_waittxready(struct up_dev_s *priv)
     {
       /* Check the TI bit in the CI register.  1=Transmit buffer empty */
 
-      if ((up_serialin(priv, M16C_UART_C1) & UART_C1_TI) != 0);
+      if ((up_serialin(priv, M16C_UART_C1) & UART_C1_TI) != 0)
        {
           /* The transmit buffer is empty... return */
           break;
diff --git a/fs/unionfs/fs_unionfs.c b/fs/unionfs/fs_unionfs.c
index 3ebc6d2fdb0..b0a0920e837 100644
--- a/fs/unionfs/fs_unionfs.c
+++ b/fs/unionfs/fs_unionfs.c
@@ -1506,7 +1506,7 @@ static int unionfs_closedir(FAR struct inode *mountpt,
     {
       /* Was this file system opened? */
 
-      if (fu->fu_lower[i] != NULL);
+      if (fu->fu_lower[i] != NULL)
         {
           um = &ui->ui_fs[i];
 
diff --git a/sched/group/group_signal.c b/sched/group/group_signal.c
index 1f681928d90..ac8afca3e59 100644
--- a/sched/group/group_signal.c
+++ b/sched/group/group_signal.c
@@ -131,7 +131,7 @@ static int group_signal_handler(pid_t pid, FAR void *arg)
           /* Limit to one thread */
 
           info->atcb = tcb;
-          if (info->ptcb != NULL);
+          if (info->ptcb != NULL)
             {
               return 1; /* Terminate the search */
             }

From abc0481a57fc9fd704d6e4dc019a5ed9c4e8928c Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 12 May 2016 09:47:54 -0600
Subject: [PATCH 19/33] Port for the Nucleo-144 board with the STM32F476ZG MCU.
  From Kconstantin Berezenko.

---
 ChangeLog                                    |   3 +
 configs/Kconfig                              |  17 +-
 configs/nucleo-144/Kconfig                   |   8 +
 configs/nucleo-144/include/board.h           | 356 ++++++++
 configs/nucleo-144/nsh/Make.defs             | 113 +++
 configs/nucleo-144/nsh/defconfig             | 908 +++++++++++++++++++
 configs/nucleo-144/nsh/setenv.sh             |  77 ++
 configs/nucleo-144/scripts/flash.ld          | 147 +++
 configs/nucleo-144/scripts/kernel-space.ld   | 109 +++
 configs/nucleo-144/scripts/memory.ld         | 129 +++
 configs/nucleo-144/scripts/user-space.ld     | 111 +++
 configs/nucleo-144/src/.gitignore            |   2 +
 configs/nucleo-144/src/Makefile              |  55 ++
 configs/nucleo-144/src/nucleo-144.h          | 100 ++
 configs/nucleo-144/src/stm32_appinitialize.c |  87 ++
 configs/nucleo-144/src/stm32_autoleds.c      | 144 +++
 configs/nucleo-144/src/stm32_boot.c          | 119 +++
 configs/nucleo-144/src/stm32_buttons.c       | 112 +++
 configs/nucleo-144/src/stm32_spi.c           | 246 +++++
 configs/nucleo-144/src/stm32_userleds.c      | 120 +++
 20 files changed, 2962 insertions(+), 1 deletion(-)
 create mode 100644 configs/nucleo-144/Kconfig
 create mode 100644 configs/nucleo-144/include/board.h
 create mode 100644 configs/nucleo-144/nsh/Make.defs
 create mode 100644 configs/nucleo-144/nsh/defconfig
 create mode 100644 configs/nucleo-144/nsh/setenv.sh
 create mode 100644 configs/nucleo-144/scripts/flash.ld
 create mode 100644 configs/nucleo-144/scripts/kernel-space.ld
 create mode 100644 configs/nucleo-144/scripts/memory.ld
 create mode 100644 configs/nucleo-144/scripts/user-space.ld
 create mode 100644 configs/nucleo-144/src/.gitignore
 create mode 100644 configs/nucleo-144/src/Makefile
 create mode 100644 configs/nucleo-144/src/nucleo-144.h
 create mode 100644 configs/nucleo-144/src/stm32_appinitialize.c
 create mode 100644 configs/nucleo-144/src/stm32_autoleds.c
 create mode 100644 configs/nucleo-144/src/stm32_boot.c
 create mode 100644 configs/nucleo-144/src/stm32_buttons.c
 create mode 100644 configs/nucleo-144/src/stm32_spi.c
 create mode 100644 configs/nucleo-144/src/stm32_userleds.c

diff --git a/ChangeLog b/ChangeLog
index 455ccb8c46c..87f923ce2af 100755
--- a/ChangeLog
+++ b/ChangeLog
@@ -11718,3 +11718,6 @@
 	* Several Makefiles: Add .PHONY definitions to prevent 'clean up to date'
 	  message weirdness when 'make clean' is done with no .config or Make.defs
 	  file (2016-05-10).
+	* configs/nucleo-144: Basic port for the Nucleo-144 board with the
+	  STM32F746ZG MCU.  From Kconstantin Berezenko (2015-05-12).
+
diff --git a/configs/Kconfig b/configs/Kconfig
index 17d7a9ba85c..c2d650557c3 100644
--- a/configs/Kconfig
+++ b/configs/Kconfig
@@ -647,6 +647,17 @@ config ARCH_BOARD_PIRELLI_DPL10
 		This directory contains the board support for Pirelli dpl10 phones.  The
 		additions were made by Craig Comstock (with help form Alan Carvalho de Assis).
 
+config ARCH_BOARD_NUCLEO_144
+	bool "STMicro NUCLEO-144"
+	depends on ARCH_CHIP_STM32F746
+	select ARCH_HAVE_LEDS
+	select ARCH_HAVE_BUTTONS
+	select ARCH_HAVE_IRQBUTTONS
+	---help---
+		STMicro Nucleo-144 development board featuring the STM32F746ZGT6U
+		MCU. The STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash
+		memory and 300Kb SRAM.
+
 config ARCH_BOARD_NUCLEO_F303RE
 	bool "STM32F303 Nucleo F303RE"
 	depends on ARCH_CHIP_STM32F303RE
@@ -963,7 +974,7 @@ config ARCH_BOARD_STM32F746G_DISCO
 	---help---
 		STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6
 		MCU. The STM32F746NGH6  is a 216MHz Cortex-M7 operation with 1024Kb Flash
-		memory and 300Kb SRAM.
+		memory and 320Kb SRAM.
 
 config ARCH_BOARD_STM32L476VG_DISCO
 	bool "STMicro STM32F746VG-Discovery board"
@@ -1363,6 +1374,7 @@ config ARCH_BOARD
 	default "pic32mx7mmb"              if ARCH_BOARD_PIC32MX7MMB
 	default "pic32mz-starterkit"       if ARCH_BOARD_PIC32MZ_STARTERKIT
 	default "pirelli_dpl10"            if ARCH_BOARD_PIRELLI_DPL10
+	default "nucleo-144"               if ARCH_BOARD_NUCLEO_144
 	default "nucleo-f303re"            if ARCH_BOARD_NUCLEO_F303RE
 	default "nucleo-f4x1re"            if ARCH_BOARD_NUCLEO_F401RE || ARCH_BOARD_NUCLEO_F411RE
 	default "nucleo-l476rg"            if ARCH_BOARD_NUCLEO_L476RG
@@ -1669,6 +1681,9 @@ endif
 if ARCH_BOARD_PIRELLI_DPL10
 source "configs/pirelli_dpl10/Kconfig"
 endif
+if ARCH_BOARD_NUCLEO_144
+source "configs/nucleo-144/Kconfig"
+endif
 if ARCH_BOARD_NUCLEO_F303RE
 source "configs/nucleo-f303re/Kconfig"
 endif
diff --git a/configs/nucleo-144/Kconfig b/configs/nucleo-144/Kconfig
new file mode 100644
index 00000000000..57585efaff0
--- /dev/null
+++ b/configs/nucleo-144/Kconfig
@@ -0,0 +1,8 @@
+#
+# For a description of the syntax of this configuration file,
+# see the file kconfig-language.txt in the NuttX tools repository.
+#
+
+if ARCH_BOARD_NUCLEO_144
+
+endif # ARCH_BOARD_NUCLEO_144
diff --git a/configs/nucleo-144/include/board.h b/configs/nucleo-144/include/board.h
new file mode 100644
index 00000000000..0e9020c0de8
--- /dev/null
+++ b/configs/nucleo-144/include/board.h
@@ -0,0 +1,356 @@
+/************************************************************************************
+ * configs/nucleo-144/include/board.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __CONFIG_NUCLEO_144_INCLUDE_BOARD_H
+#define __CONFIG_NUCLEO_144_INCLUDE_BOARD_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#ifndef __ASSEMBLY__
+# include <stdint.h>
+#endif
+
+#include "stm32_rcc.h"
+#ifdef CONFIG_STM32F7_SDMMC1
+#  include "stm32_sdmmc.h"
+#endif
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/* Clocking *************************************************************************/
+/* The STM32F7 Discovery board provides the following clock sources:
+ *
+ *   X1:  24 MHz oscillator for USB OTG HS PHY and camera module (daughter board)
+ *   X2:  25 MHz oscillator for STM32F746NGH6 microcontroller and Ethernet PHY.
+ *   X3:  32.768 KHz crystal for STM32F746NGH6 embedded RTC
+ *
+ * So we have these clock source available within the STM32
+ *
+ *   HSI: 16 MHz RC factory-trimmed
+ *   LSI: 32 KHz RC
+ *   HSE: On-board crystal frequency is 25MHz
+ *   LSE: 32.768 kHz
+ */
+
+#define STM32_BOARD_XTAL        8000000ul
+
+#define STM32_HSI_FREQUENCY     16000000ul
+#define STM32_LSI_FREQUENCY     32000
+#define STM32_HSE_FREQUENCY     STM32_BOARD_XTAL
+#define STM32_LSE_FREQUENCY     32768
+
+/* Main PLL Configuration.
+ *
+ * PLL source is HSE = 8,000,000
+ *
+ * PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
+ * Subject to:
+ *
+ *     2 <= PLLM <= 63
+ *   192 <= PLLN <= 432
+ *   192 MHz <= PLL_VCO <= 432MHz
+ *
+ * SYSCLK  = PLL_VCO / PLLP
+ * Subject to
+ *
+ *   PLLP = {2, 4, 6, 8}
+ *   SYSCLK <= 216 MHz
+ *
+ * USB OTG FS, SDMMC and RNG Clock = PLL_VCO / PLLQ
+ * Subject to
+ *   The USB OTG FS requires a 48 MHz clock to work correctly. The SDMMC
+ *   and the random number generator need a frequency lower than or equal
+ *   to 48 MHz to work correctly.
+ *
+ * 2 <= PLLQ <= 15
+ */
+
+#if defined(CONFIG_STM32F7_USBOTHFS)
+/* Highest SYSCLK with USB OTG FS clock = 48 MHz
+ *
+ * PLL_VCO = (8,000,000 / 8) * 384 = 384 MHz
+ * SYSCLK  = 384 MHz / 2 = 192 MHz
+ * USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz
+ */
+
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(8)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(384)
+#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(8)
+
+#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 8) * 384)
+#define STM32_SYSCLK_FREQUENCY  (STM32_VCO_FREQUENCY / 2)
+#define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 8)
+
+#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_RNG)
+/* Highest SYSCLK with USB OTG FS clock <= 48MHz
+ *
+ * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz
+ * SYSCLK  = 432 MHz / 2 = 216 MHz
+ * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz
+ */
+
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(8)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(432)
+#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(10)
+
+#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 8) * 432)
+#define STM32_SYSCLK_FREQUENCY  (STM32_VCO_FREQUENCY / 2)
+#define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 10)
+
+#else
+/* Highest SYSCLK
+ *
+ * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz
+ * SYSCLK  = 432 MHz / 2 = 216 MHz
+ */
+
+#define STM32_PLLCFG_PLLM       RCC_PLLCFG_PLLM(8)
+#define STM32_PLLCFG_PLLN       RCC_PLLCFG_PLLN(432)
+#define STM32_PLLCFG_PLLP       RCC_PLLCFG_PLLP_2
+#define STM32_PLLCFG_PLLQ       RCC_PLLCFG_PLLQ(10)
+
+#define STM32_VCO_FREQUENCY     ((STM32_HSE_FREQUENCY / 8) * 432)
+#define STM32_SYSCLK_FREQUENCY  (STM32_VCO_FREQUENCY / 2)
+#define STM32_OTGFS_FREQUENCY   (STM32_VCO_FREQUENCY / 10)
+#endif
+
+/* Several prescalers allow the configuration of the two AHB buses, the
+ * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum
+ * frequency of the two AHB buses is 216 MHz while the maximum frequency of
+ * the high-speed APB domains is 108 MHz. The maximum allowed frequency of
+ * the low-speed APB domain is 54 MHz.
+ */
+
+/* AHB clock (HCLK) is SYSCLK (216 MHz) */
+
+#define STM32_RCC_CFGR_HPRE     RCC_CFGR_HPRE_SYSCLK  /* HCLK  = SYSCLK / 1 */
+#define STM32_HCLK_FREQUENCY    STM32_SYSCLK_FREQUENCY
+#define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY  /* same as above, to satisfy compiler */
+
+/* APB1 clock (PCLK1) is HCLK/4 (54 MHz) */
+
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd4     /* PCLK1 = HCLK / 4 */
+#define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/4)
+
+/* Timers driven from APB1 will be twice PCLK1 */
+
+#define STM32_APB1_TIM2_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM3_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM4_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM5_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM6_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM7_CLKIN   (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM12_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM13_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+#define STM32_APB1_TIM14_CLKIN  (2*STM32_PCLK1_FREQUENCY)
+
+/* APB2 clock (PCLK2) is HCLK/2 (108MHz) */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLKd2     /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
+/* Timers driven from APB2 will be twice PCLK2 */
+
+#define STM32_APB2_TIM1_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM8_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM9_CLKIN   (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM10_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+#define STM32_APB2_TIM11_CLKIN  (2*STM32_PCLK2_FREQUENCY)
+
+/* FLASH wait states
+ *
+ *  --------- ---------- -----------
+ *  VDD       MAX SYSCLK WAIT STATES
+ *  --------- ---------- -----------
+ *  1.7-2.1 V   180 MHz    8
+ *  2.1-2.4 V   216 MHz    9
+ *  2.4-2.7 V   216 MHz    8
+ *  2.7-3.6 V   216 MHz    7
+ *  --------- ---------- -----------
+ */
+
+#define BOARD_FLASH_WAITSTATES 7
+
+/* LED definitions ******************************************************************/
+/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the
+ * reset button, that can be controlled by software (LD2 is a power indicator, LD3-6
+ * indicate USB status, LD7 is controlled by the ST-Link).
+ *
+ * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface.
+ * One end of LD1 is grounded so a high output on PI1 will illuminate the LED.
+ *
+ * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
+ * The following definitions are used to access individual LEDs.
+ */
+
+/* LED index values for use with board_userled() */
+
+#define BOARD_LED1        0
+#define BOARD_NLEDS       1
+
+#define BOARD_LD1         BOARD_LED1
+
+/* LED bits for use with board_userled_all() */
+
+#define BOARD_LED1_BIT    (1 << BOARD_LED1)
+
+/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
+ * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
+ * events as follows:
+ *
+ *   SYMBOL              Meaning                 LD1
+ *   ------------------- ----------------------- ------
+ *   LED_STARTED         NuttX has been started  OFF
+ *   LED_HEAPALLOCATE    Heap has been allocated OFF
+ *   LED_IRQSENABLED     Interrupts enabled      OFF
+ *   LED_STACKCREATED    Idle stack created      ON
+ *   LED_INIRQ           In an interrupt         N/C
+ *   LED_SIGNAL          In a signal handler     N/C
+ *   LED_ASSERTION       An assertion failed     N/C
+ *   LED_PANIC           The system has crashed  FLASH
+ *
+ * Thus is LD1 is statically on, NuttX has successfully  booted and is,
+ * apparently, running normally.  If LD1 is flashing at approximately
+ * 2Hz, then a fatal error has been detected and the system has halted.
+ */
+
+#define LED_STARTED                  0 /* LD1=OFF */
+#define LED_HEAPALLOCATE             0 /* LD1=OFF */
+#define LED_IRQSENABLED              0 /* LD1=OFF */
+#define LED_STACKCREATED             1 /* LD1=ON */
+#define LED_INIRQ                    2 /* LD1=no change */
+#define LED_SIGNAL                   2 /* LD1=no change */
+#define LED_ASSERTION                2 /* LD1=no change */
+#define LED_PANIC                    3 /* LD1=flashing */
+
+/* Button definitions ***************************************************************/
+/* The STM32F7 Discovery supports one button:  Pushbutton B1, labelled "User", is
+ * connected to GPIO PI11.  A high value will be sensed when the button is depressed.
+ */
+
+#define BUTTON_USER        0
+#define NUM_BUTTONS        1
+#define BUTTON_USER_BIT    (1 << BUTTON_USER)
+
+/* Alternate function pin selections ************************************************/
+
+/* USART6:
+ *
+ * These configurations assume that you are using a standard Arduio RS-232 shield
+ * with the serial interface with RX on pin D0 and TX on pin D1:
+ *
+ *   -------- ---------------
+ *               STM32F7
+ *   ARDUIONO FUNCTION  GPIO
+ *   -- ----- --------- -----
+ *   DO RX    USART6_RX PC7
+ *   D1 TX    USART6_TX PC6
+ *   -- ----- --------- -----
+ */
+
+#define GPIO_USART6_RX GPIO_USART6_RX_1
+#define GPIO_USART6_TX GPIO_USART6_TX_1
+
+/* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins:
+ *
+ *   STM32 F7 BOARD        LAN8742A
+ *   GPIO     SIGNAL       PIN NAME
+ *   -------- ------------ -------------
+ *   PG11     RMII_TX_EN   TXEN
+ *   PG13     RMII_TXD0    TXD0
+ *   PG14     RMII_TXD1    TXD1
+ *   PC4      RMII_RXD0    RXD0/MODE0
+ *   PC5      RMII_RXD1    RXD1/MODE1
+ *   PG2      RMII_RXER    RXER/PHYAD0 -- Not used
+ *   PA7      RMII_CRS_DV  CRS_DV/MODE2
+ *   PC1      RMII_MDC     MDC
+ *   PA2      RMII_MDIO    MDIO
+ *   N/A      NRST         nRST
+ *   PA1      RMII_REF_CLK nINT/REFCLK0
+ *   N/A      OSC_25M      XTAL1/CLKIN
+ *
+ * The PHY address is either 0 or 1, depending on the state of PG2 on reset.
+ * PG2 is not controlled but appears to result in a PHY address of 0.
+ */
+
+#define GPIO_ETH_RMII_TX_EN   GPIO_ETH_RMII_TX_EN_2
+#define GPIO_ETH_RMII_TXD0    GPIO_ETH_RMII_TXD0_2
+#define GPIO_ETH_RMII_TXD1    GPIO_ETH_RMII_TXD1_2
+
+/************************************************************************************
+ * Public Data
+ ************************************************************************************/
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/************************************************************************************
+ * Public Function Prototypes
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void);
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif  /* __CONFIG_NUCLEO_144_INCLUDE_BOARD_H */
diff --git a/configs/nucleo-144/nsh/Make.defs b/configs/nucleo-144/nsh/Make.defs
new file mode 100644
index 00000000000..45b3f5f4aee
--- /dev/null
+++ b/configs/nucleo-144/nsh/Make.defs
@@ -0,0 +1,113 @@
+############################################################################
+# configs/nucleo-144/nsh/Make.defs
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+include ${TOPDIR}/.config
+include ${TOPDIR}/tools/Config.mk
+include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
+
+LDSCRIPT = flash.ld
+
+ifeq ($(WINTOOL),y)
+  # Windows-native toolchains
+  DIRLINK = $(TOPDIR)/tools/copydir.sh
+  DIRUNLINK = $(TOPDIR)/tools/unlink.sh
+  MKDEP = $(TOPDIR)/tools/mkwindeps.sh
+  ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
+  ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
+  ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
+else
+  # Linux/Cygwin-native toolchain
+  MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
+  ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
+  ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
+  ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
+endif
+
+CC = $(CROSSDEV)gcc
+CXX = $(CROSSDEV)g++
+CPP = $(CROSSDEV)gcc -E
+LD = $(CROSSDEV)ld
+AR = $(ARCROSSDEV)ar rcs
+NM = $(ARCROSSDEV)nm
+OBJCOPY = $(CROSSDEV)objcopy
+OBJDUMP = $(CROSSDEV)objdump
+
+ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
+ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
+
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  ARCHOPTIMIZATION = -g
+endif
+
+ifneq ($(CONFIG_DEBUG_NOOPT),y)
+  ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
+endif
+
+ARCHCFLAGS = -fno-builtin
+ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti
+ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
+ARCHWARNINGSXX = -Wall -Wshadow -Wundef
+ARCHDEFINES =
+ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
+
+CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
+CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
+CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
+CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
+AFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+NXFLATLDFLAGS1 = -r -d -warn-common
+NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
+LDNXFLATFLAGS = -e main -s 2048
+
+ASMEXT = .S
+OBJEXT = .o
+LIBEXT = .a
+EXEEXT =
+
+ifneq ($(CROSSDEV),arm-nuttx-elf-)
+  LDFLAGS += -nostartfiles -nodefaultlibs
+endif
+ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
+  LDFLAGS += -g
+endif
+
+
+HOSTCC = gcc
+HOSTINCLUDES = -I.
+HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
+HOSTLDFLAGS =
+
diff --git a/configs/nucleo-144/nsh/defconfig b/configs/nucleo-144/nsh/defconfig
new file mode 100644
index 00000000000..f7fe7e2ebb7
--- /dev/null
+++ b/configs/nucleo-144/nsh/defconfig
@@ -0,0 +1,908 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Nuttx/ Configuration
+#
+
+#
+# Build Setup
+#
+# CONFIG_EXPERIMENTAL is not set
+# CONFIG_DEFAULT_SMALL is not set
+CONFIG_HOST_LINUX=y
+# CONFIG_HOST_OSX is not set
+# CONFIG_HOST_WINDOWS is not set
+# CONFIG_HOST_OTHER is not set
+
+#
+# Build Configuration
+#
+CONFIG_APPS_DIR="../apps"
+CONFIG_BUILD_FLAT=y
+# CONFIG_BUILD_2PASS is not set
+
+#
+# Binary Output Formats
+#
+# CONFIG_RRLOAD_BINARY is not set
+CONFIG_INTELHEX_BINARY=y
+# CONFIG_MOTOROLA_SREC is not set
+CONFIG_RAW_BINARY=y
+# CONFIG_UBOOT_UIMAGE is not set
+
+#
+# Customize Header Files
+#
+# CONFIG_ARCH_STDINT_H is not set
+# CONFIG_ARCH_STDBOOL_H is not set
+# CONFIG_ARCH_MATH_H is not set
+# CONFIG_ARCH_FLOAT_H is not set
+# CONFIG_ARCH_STDARG_H is not set
+# CONFIG_ARCH_DEBUG_H is not set
+
+#
+# Debug Options
+#
+# CONFIG_DEBUG is not set
+CONFIG_ARCH_HAVE_HEAPCHECK=y
+CONFIG_ARCH_HAVE_STACKCHECK=y
+# CONFIG_STACK_COLORATION is not set
+CONFIG_DEBUG_SYMBOLS=y
+CONFIG_ARCH_HAVE_CUSTOMOPT=y
+CONFIG_DEBUG_NOOPT=y
+# CONFIG_DEBUG_CUSTOMOPT is not set
+# CONFIG_DEBUG_FULLOPT is not set
+
+#
+# System Type
+#
+CONFIG_ARCH_ARM=y
+# CONFIG_ARCH_AVR is not set
+# CONFIG_ARCH_HC is not set
+# CONFIG_ARCH_MIPS is not set
+# CONFIG_ARCH_RGMP is not set
+# CONFIG_ARCH_SH is not set
+# CONFIG_ARCH_SIM is not set
+# CONFIG_ARCH_X86 is not set
+# CONFIG_ARCH_Z16 is not set
+# CONFIG_ARCH_Z80 is not set
+CONFIG_ARCH="arm"
+
+#
+# ARM Options
+#
+# CONFIG_ARCH_CHIP_A1X is not set
+# CONFIG_ARCH_CHIP_C5471 is not set
+# CONFIG_ARCH_CHIP_CALYPSO is not set
+# CONFIG_ARCH_CHIP_DM320 is not set
+# CONFIG_ARCH_CHIP_EFM32 is not set
+# CONFIG_ARCH_CHIP_IMX1 is not set
+# CONFIG_ARCH_CHIP_IMX6 is not set
+# CONFIG_ARCH_CHIP_KINETIS is not set
+# CONFIG_ARCH_CHIP_KL is not set
+# CONFIG_ARCH_CHIP_LM is not set
+# CONFIG_ARCH_CHIP_TIVA is not set
+# CONFIG_ARCH_CHIP_LPC11XX is not set
+# CONFIG_ARCH_CHIP_LPC17XX is not set
+# CONFIG_ARCH_CHIP_LPC214X is not set
+# CONFIG_ARCH_CHIP_LPC2378 is not set
+# CONFIG_ARCH_CHIP_LPC31XX is not set
+# CONFIG_ARCH_CHIP_LPC43XX is not set
+# CONFIG_ARCH_CHIP_NUC1XX is not set
+# CONFIG_ARCH_CHIP_SAMA5 is not set
+# CONFIG_ARCH_CHIP_SAMD is not set
+# CONFIG_ARCH_CHIP_SAML is not set
+# CONFIG_ARCH_CHIP_SAM34 is not set
+# CONFIG_ARCH_CHIP_SAMV7 is not set
+# CONFIG_ARCH_CHIP_STM32 is not set
+CONFIG_ARCH_CHIP_STM32F7=y
+# CONFIG_ARCH_CHIP_STM32L4 is not set
+# CONFIG_ARCH_CHIP_STR71X is not set
+# CONFIG_ARCH_CHIP_TMS570 is not set
+# CONFIG_ARCH_CHIP_MOXART is not set
+# CONFIG_ARCH_ARM7TDMI is not set
+# CONFIG_ARCH_ARM926EJS is not set
+# CONFIG_ARCH_ARM920T is not set
+# CONFIG_ARCH_CORTEXM0 is not set
+# CONFIG_ARCH_CORTEXM3 is not set
+# CONFIG_ARCH_CORTEXM4 is not set
+CONFIG_ARCH_CORTEXM7=y
+# CONFIG_ARCH_CORTEXA5 is not set
+# CONFIG_ARCH_CORTEXA8 is not set
+# CONFIG_ARCH_CORTEXA9 is not set
+# CONFIG_ARCH_CORTEXR4 is not set
+# CONFIG_ARCH_CORTEXR4F is not set
+# CONFIG_ARCH_CORTEXR5 is not set
+# CONFIG_ARCH_CORTEX5F is not set
+# CONFIG_ARCH_CORTEXR7 is not set
+# CONFIG_ARCH_CORTEXR7F is not set
+CONFIG_ARCH_FAMILY="armv7-m"
+CONFIG_ARCH_CHIP="stm32f7"
+# CONFIG_ARM_TOOLCHAIN_IAR is not set
+CONFIG_ARM_TOOLCHAIN_GNU=y
+# CONFIG_ARMV7M_USEBASEPRI is not set
+CONFIG_ARCH_HAVE_CMNVECTOR=y
+CONFIG_ARMV7M_CMNVECTOR=y
+# CONFIG_ARMV7M_LAZYFPU is not set
+CONFIG_ARCH_HAVE_FPU=y
+CONFIG_ARCH_HAVE_DPFPU=y
+# CONFIG_ARCH_FPU is not set
+# CONFIG_ARCH_HAVE_TRUSTZONE is not set
+CONFIG_ARM_HAVE_MPU_UNIFIED=y
+# CONFIG_ARM_MPU is not set
+
+#
+# ARMV7M Configuration Options
+#
+CONFIG_ARMV7M_HAVE_ICACHE=y
+CONFIG_ARMV7M_HAVE_DCACHE=y
+CONFIG_ARMV7M_ICACHE=y
+CONFIG_ARMV7M_DCACHE=y
+CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
+CONFIG_ARMV7M_HAVE_ITCM=y
+CONFIG_ARMV7M_HAVE_DTCM=y
+# CONFIG_ARMV7M_ITCM is not set
+CONFIG_ARMV7M_DTCM=y
+# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
+# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
+CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
+CONFIG_ARMV7M_HAVE_STACKCHECK=y
+# CONFIG_ARMV7M_STACKCHECK is not set
+# CONFIG_ARMV7M_ITMSYSLOG is not set
+# CONFIG_SERIAL_TERMIOS is not set
+
+#
+# STM32 F7 Configuration Options
+#
+# CONFIG_ARCH_CHIP_STM32F745 is not set
+CONFIG_ARCH_CHIP_STM32F746=y
+# CONFIG_ARCH_CHIP_STM32F756 is not set
+CONFIG_STM32F7_STM32F74XX=y
+# CONFIG_STM32F7_STM32F75XX is not set
+# CONFIG_STM32F7_FLASH_512KB is not set
+CONFIG_STM32F7_FLASH_1024KB=y
+
+#
+# STM32 Peripheral Support
+#
+CONFIG_STM32F7_HAVE_LTDC=y
+# CONFIG_STM32F7_ADC is not set
+# CONFIG_STM32F7_CAN is not set
+# CONFIG_STM32F7_DAC is not set
+# CONFIG_STM32F7_DMA is not set
+# CONFIG_STM32F7_I2C is not set
+# CONFIG_STM32F7_SAI is not set
+# CONFIG_STM32F7_SPI is not set
+CONFIG_STM32F7_USART=y
+# CONFIG_STM32F7_ADC1 is not set
+# CONFIG_STM32F7_ADC2 is not set
+# CONFIG_STM32F7_ADC3 is not set
+# CONFIG_STM32F7_BKPSRAM is not set
+# CONFIG_STM32F7_CAN1 is not set
+# CONFIG_STM32F7_CAN2 is not set
+# CONFIG_STM32F7_CEC is not set
+# CONFIG_STM32F7_CRC is not set
+# CONFIG_STM32F7_CRYP is not set
+# CONFIG_STM32F7_DMA1 is not set
+# CONFIG_STM32F7_DMA2 is not set
+# CONFIG_STM32F7_DAC1 is not set
+# CONFIG_STM32F7_DAC2 is not set
+# CONFIG_STM32F7_DCMI is not set
+# CONFIG_STM32F7_ETHMAC is not set
+# CONFIG_STM32F7_FSMC is not set
+# CONFIG_STM32F7_I2C1 is not set
+# CONFIG_STM32F7_I2C2 is not set
+# CONFIG_STM32F7_I2C3 is not set
+# CONFIG_STM32F7_LPTIM1 is not set
+# CONFIG_STM32F7_LTDC is not set
+# CONFIG_STM32F7_DMA2D is not set
+# CONFIG_STM32F7_OTGFS is not set
+# CONFIG_STM32F7_OTGHS is not set
+# CONFIG_STM32F7_QUADSPI is not set
+# CONFIG_STM32F7_SAI1 is not set
+# CONFIG_STM32F7_RNG is not set
+# CONFIG_STM32F7_SAI2 is not set
+# CONFIG_STM32F7_SDMMC1 is not set
+# CONFIG_STM32F7_SPDIFRX is not set
+# CONFIG_STM32F7_SPI1 is not set
+# CONFIG_STM32F7_SPI2 is not set
+# CONFIG_STM32F7_SPI3 is not set
+# CONFIG_STM32F7_SPI4 is not set
+# CONFIG_STM32F7_SPI5 is not set
+# CONFIG_STM32F7_SPI6 is not set
+# CONFIG_STM32F7_TIM1 is not set
+# CONFIG_STM32F7_TIM2 is not set
+# CONFIG_STM32F7_TIM3 is not set
+# CONFIG_STM32F7_TIM4 is not set
+# CONFIG_STM32F7_TIM5 is not set
+# CONFIG_STM32F7_TIM6 is not set
+# CONFIG_STM32F7_TIM7 is not set
+# CONFIG_STM32F7_TIM8 is not set
+# CONFIG_STM32F7_TIM9 is not set
+# CONFIG_STM32F7_TIM10 is not set
+# CONFIG_STM32F7_TIM11 is not set
+# CONFIG_STM32F7_TIM12 is not set
+# CONFIG_STM32F7_TIM13 is not set
+# CONFIG_STM32F7_TIM14 is not set
+# CONFIG_STM32F7_TIM15 is not set
+# CONFIG_STM32F7_USART1 is not set
+# CONFIG_STM32F7_USART2 is not set
+# CONFIG_STM32F7_USART3 is not set
+# CONFIG_STM32F7_UART4 is not set
+# CONFIG_STM32F7_UART5 is not set
+CONFIG_STM32F7_USART6=y
+# CONFIG_STM32F7_UART7 is not set
+# CONFIG_STM32F7_UART8 is not set
+# CONFIG_STM32F7_IWDG is not set
+# CONFIG_STM32F7_WWDG is not set
+# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set
+
+#
+# Architecture Options
+#
+# CONFIG_ARCH_NOINTC is not set
+# CONFIG_ARCH_VECNOTIRQ is not set
+# CONFIG_ARCH_DMA is not set
+CONFIG_ARCH_HAVE_IRQPRIO=y
+# CONFIG_ARCH_L2CACHE is not set
+# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set
+# CONFIG_ARCH_HAVE_ADDRENV is not set
+# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set
+# CONFIG_ARCH_HAVE_MULTICPU is not set
+CONFIG_ARCH_HAVE_VFORK=y
+# CONFIG_ARCH_HAVE_MMU is not set
+CONFIG_ARCH_HAVE_MPU=y
+# CONFIG_ARCH_NAND_HWECC is not set
+# CONFIG_ARCH_HAVE_EXTCLK is not set
+# CONFIG_ARCH_HAVE_POWEROFF is not set
+# CONFIG_ARCH_HAVE_RESET is not set
+# CONFIG_ARCH_USE_MPU is not set
+# CONFIG_ARCH_IRQPRIO is not set
+CONFIG_ARCH_STACKDUMP=y
+# CONFIG_ENDIAN_BIG is not set
+# CONFIG_ARCH_IDLE_CUSTOM is not set
+# CONFIG_ARCH_HAVE_RAMFUNCS is not set
+CONFIG_ARCH_HAVE_RAMVECTORS=y
+# CONFIG_ARCH_RAMVECTORS is not set
+
+#
+# Board Settings
+#
+CONFIG_BOARD_LOOPSPERMSEC=43103
+# CONFIG_ARCH_CALIBRATION is not set
+
+#
+# Interrupt options
+#
+CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
+CONFIG_ARCH_INTERRUPTSTACK=0
+CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y
+# CONFIG_ARCH_HIPRI_INTERRUPT is not set
+
+#
+# Boot options
+#
+# CONFIG_BOOT_RUNFROMEXTSRAM is not set
+CONFIG_BOOT_RUNFROMFLASH=y
+# CONFIG_BOOT_RUNFROMISRAM is not set
+# CONFIG_BOOT_RUNFROMSDRAM is not set
+# CONFIG_BOOT_COPYTORAM is not set
+
+#
+# Boot Memory Configuration
+#
+CONFIG_RAM_START=0x20010000
+CONFIG_RAM_SIZE=245760
+# CONFIG_ARCH_HAVE_SDRAM is not set
+
+#
+# Board Selection
+#
+# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set
+CONFIG_ARCH_BOARD_NUCLEO_144=y
+# CONFIG_ARCH_BOARD_CUSTOM is not set
+CONFIG_ARCH_BOARD="nucleo-144"
+
+#
+# Common Board Options
+#
+CONFIG_ARCH_HAVE_LEDS=y
+CONFIG_ARCH_LEDS=y
+CONFIG_ARCH_HAVE_BUTTONS=y
+CONFIG_ARCH_BUTTONS=y
+CONFIG_ARCH_HAVE_IRQBUTTONS=y
+# CONFIG_ARCH_IRQBUTTONS is not set
+CONFIG_NSH_MMCSDMINOR=0
+
+#
+# Board-Specific Options
+#
+# CONFIG_LIB_BOARDCTL is not set
+
+#
+# RTOS Features
+#
+CONFIG_DISABLE_OS_API=y
+# CONFIG_DISABLE_POSIX_TIMERS is not set
+# CONFIG_DISABLE_PTHREAD is not set
+# CONFIG_DISABLE_SIGNALS is not set
+# CONFIG_DISABLE_MQUEUE is not set
+# CONFIG_DISABLE_ENVIRON is not set
+
+#
+# Clocks and Timers
+#
+CONFIG_USEC_PER_TICK=10000
+# CONFIG_SYSTEM_TIME64 is not set
+# CONFIG_CLOCK_MONOTONIC is not set
+# CONFIG_JULIAN_TIME is not set
+CONFIG_START_YEAR=2011
+CONFIG_START_MONTH=12
+CONFIG_START_DAY=6
+CONFIG_MAX_WDOGPARMS=2
+CONFIG_PREALLOC_WDOGS=4
+CONFIG_WDOG_INTRESERVE=0
+CONFIG_PREALLOC_TIMERS=4
+
+#
+# Tasks and Scheduling
+#
+# CONFIG_INIT_NONE is not set
+CONFIG_INIT_ENTRYPOINT=y
+# CONFIG_INIT_FILEPATH is not set
+CONFIG_USER_ENTRYPOINT="nsh_main"
+CONFIG_RR_INTERVAL=200
+# CONFIG_SCHED_SPORADIC is not set
+CONFIG_TASK_NAME_SIZE=0
+CONFIG_MAX_TASKS=16
+# CONFIG_SCHED_HAVE_PARENT is not set
+CONFIG_SCHED_WAITPID=y
+
+#
+# Pthread Options
+#
+# CONFIG_MUTEX_TYPES is not set
+CONFIG_NPTHREAD_KEYS=4
+
+#
+# Performance Monitoring
+#
+# CONFIG_SCHED_CPULOAD is not set
+# CONFIG_SCHED_INSTRUMENTATION is not set
+
+#
+# Files and I/O
+#
+CONFIG_DEV_CONSOLE=y
+# CONFIG_FDCLONE_DISABLE is not set
+# CONFIG_FDCLONE_STDIO is not set
+CONFIG_SDCLONE_DISABLE=y
+CONFIG_NFILE_DESCRIPTORS=8
+CONFIG_NFILE_STREAMS=8
+CONFIG_NAME_MAX=32
+# CONFIG_PRIORITY_INHERITANCE is not set
+
+#
+# RTOS hooks
+#
+# CONFIG_BOARD_INITIALIZE is not set
+# CONFIG_SCHED_STARTHOOK is not set
+# CONFIG_SCHED_ATEXIT is not set
+# CONFIG_SCHED_ONEXIT is not set
+
+#
+# Signal Numbers
+#
+CONFIG_SIG_SIGUSR1=1
+CONFIG_SIG_SIGUSR2=2
+CONFIG_SIG_SIGALARM=3
+CONFIG_SIG_SIGCONDTIMEDOUT=16
+
+#
+# POSIX Message Queue Options
+#
+CONFIG_PREALLOC_MQ_MSGS=4
+CONFIG_MQ_MAXMSGSIZE=32
+# CONFIG_MODULE is not set
+
+#
+# Work queue support
+#
+# CONFIG_SCHED_WORKQUEUE is not set
+# CONFIG_SCHED_HPWORK is not set
+# CONFIG_SCHED_LPWORK is not set
+
+#
+# Stack and heap information
+#
+CONFIG_IDLETHREAD_STACKSIZE=1024
+CONFIG_USERMAIN_STACKSIZE=2048
+CONFIG_PTHREAD_STACK_MIN=256
+CONFIG_PTHREAD_STACK_DEFAULT=2048
+# CONFIG_LIB_SYSCALL is not set
+
+#
+# Device Drivers
+#
+CONFIG_DISABLE_POLL=y
+CONFIG_DEV_NULL=y
+# CONFIG_DEV_ZERO is not set
+# CONFIG_DEV_LOOP is not set
+
+#
+# Buffering
+#
+# CONFIG_DRVR_WRITEBUFFER is not set
+# CONFIG_DRVR_READAHEAD is not set
+# CONFIG_RAMDISK is not set
+# CONFIG_CAN is not set
+# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
+# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set
+# CONFIG_PWM is not set
+CONFIG_ARCH_HAVE_I2CRESET=y
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_SLAVE is not set
+CONFIG_SPI_EXCHANGE=y
+# CONFIG_SPI_CMDDATA is not set
+# CONFIG_SPI_CALLBACK is not set
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_HWFEATURES is not set
+# CONFIG_SPI_CRCGENERATION is not set
+# CONFIG_I2S is not set
+
+#
+# Timer Driver Support
+#
+# CONFIG_TIMER is not set
+# CONFIG_RTC is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_ANALOG is not set
+# CONFIG_AUDIO_DEVICES is not set
+# CONFIG_VIDEO_DEVICES is not set
+# CONFIG_BCH is not set
+# CONFIG_INPUT is not set
+# CONFIG_IOEXPANDER is not set
+# CONFIG_LCD is not set
+
+#
+# LED Support
+#
+# CONFIG_USERLED is not set
+# CONFIG_RGBLED is not set
+# CONFIG_PCA9635PW is not set
+# CONFIG_MMCSD is not set
+# CONFIG_MODEM is not set
+# CONFIG_MTD is not set
+# CONFIG_EEPROM is not set
+# CONFIG_PIPES is not set
+# CONFIG_PM is not set
+# CONFIG_POWER is not set
+# CONFIG_SENSORS is not set
+# CONFIG_SERCOMM_CONSOLE is not set
+CONFIG_SERIAL=y
+# CONFIG_DEV_LOWCONSOLE is not set
+# CONFIG_16550_UART is not set
+# CONFIG_ARCH_HAVE_UART is not set
+# CONFIG_ARCH_HAVE_UART0 is not set
+# CONFIG_ARCH_HAVE_UART1 is not set
+# CONFIG_ARCH_HAVE_UART2 is not set
+# CONFIG_ARCH_HAVE_UART3 is not set
+# CONFIG_ARCH_HAVE_UART4 is not set
+# CONFIG_ARCH_HAVE_UART5 is not set
+# CONFIG_ARCH_HAVE_UART6 is not set
+# CONFIG_ARCH_HAVE_UART7 is not set
+# CONFIG_ARCH_HAVE_UART8 is not set
+# CONFIG_ARCH_HAVE_SCI0 is not set
+# CONFIG_ARCH_HAVE_SCI1 is not set
+# CONFIG_ARCH_HAVE_USART0 is not set
+# CONFIG_ARCH_HAVE_USART1 is not set
+# CONFIG_ARCH_HAVE_USART2 is not set
+# CONFIG_ARCH_HAVE_USART3 is not set
+# CONFIG_ARCH_HAVE_USART4 is not set
+# CONFIG_ARCH_HAVE_USART5 is not set
+CONFIG_ARCH_HAVE_USART6=y
+# CONFIG_ARCH_HAVE_USART7 is not set
+# CONFIG_ARCH_HAVE_USART8 is not set
+# CONFIG_ARCH_HAVE_OTHER_UART is not set
+
+#
+# USART Configuration
+#
+CONFIG_USART6_ISUART=y
+CONFIG_MCU_SERIAL=y
+CONFIG_STANDARD_SERIAL=y
+# CONFIG_SERIAL_IFLOWCONTROL is not set
+# CONFIG_SERIAL_OFLOWCONTROL is not set
+# CONFIG_SERIAL_DMA is not set
+CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
+CONFIG_USART6_SERIAL_CONSOLE=y
+# CONFIG_OTHER_SERIAL_CONSOLE is not set
+# CONFIG_NO_SERIAL_CONSOLE is not set
+
+#
+# USART6 Configuration
+#
+CONFIG_USART6_RXBUFSIZE=256
+CONFIG_USART6_TXBUFSIZE=256
+CONFIG_USART6_BAUD=115200
+CONFIG_USART6_BITS=8
+CONFIG_USART6_PARITY=0
+CONFIG_USART6_2STOP=0
+# CONFIG_USART6_IFLOWCONTROL is not set
+# CONFIG_USART6_OFLOWCONTROL is not set
+# CONFIG_USART6_DMA is not set
+# CONFIG_USBDEV is not set
+# CONFIG_USBHOST is not set
+# CONFIG_DRIVERS_WIRELESS is not set
+
+#
+# System Logging Device Options
+#
+
+#
+# System Logging
+#
+# CONFIG_RAMLOG is not set
+# CONFIG_SYSLOG_CONSOLE is not set
+
+#
+# Networking Support
+#
+# CONFIG_ARCH_HAVE_NET is not set
+# CONFIG_ARCH_HAVE_PHY is not set
+# CONFIG_NET is not set
+
+#
+# Crypto API
+#
+# CONFIG_CRYPTO is not set
+
+#
+# File Systems
+#
+
+#
+# File system configuration
+#
+# CONFIG_DISABLE_MOUNTPOINT is not set
+# CONFIG_FS_AUTOMOUNTER is not set
+# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set
+# CONFIG_FS_READABLE is not set
+# CONFIG_FS_WRITABLE is not set
+# CONFIG_FS_NAMED_SEMAPHORES is not set
+CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
+# CONFIG_FS_RAMMAP is not set
+# CONFIG_FS_FAT is not set
+# CONFIG_FS_NXFFS is not set
+# CONFIG_FS_ROMFS is not set
+# CONFIG_FS_TMPFS is not set
+# CONFIG_FS_SMARTFS is not set
+# CONFIG_FS_BINFS is not set
+# CONFIG_FS_PROCFS is not set
+# CONFIG_FS_UNIONFS is not set
+
+#
+# System Logging
+#
+# CONFIG_SYSLOG is not set
+# CONFIG_SYSLOG_TIMESTAMP is not set
+
+#
+# Graphics Support
+#
+# CONFIG_NX is not set
+
+#
+# Memory Management
+#
+# CONFIG_MM_SMALL is not set
+CONFIG_MM_REGIONS=2
+# CONFIG_ARCH_HAVE_HEAP2 is not set
+# CONFIG_GRAN is not set
+
+#
+# Audio Support
+#
+# CONFIG_AUDIO is not set
+
+#
+# Wireless Support
+#
+
+#
+# Binary Loader
+#
+# CONFIG_BINFMT_DISABLE is not set
+# CONFIG_BINFMT_EXEPATH is not set
+# CONFIG_NXFLAT is not set
+# CONFIG_ELF is not set
+CONFIG_BUILTIN=y
+# CONFIG_PIC is not set
+# CONFIG_SYMTAB_ORDEREDBYNAME is not set
+
+#
+# Library Routines
+#
+
+#
+# Standard C Library Options
+#
+CONFIG_STDIO_BUFFER_SIZE=64
+CONFIG_STDIO_LINEBUFFER=y
+CONFIG_NUNGET_CHARS=2
+CONFIG_LIB_HOMEDIR="/"
+# CONFIG_LIBM is not set
+# CONFIG_NOPRINTF_FIELDWIDTH is not set
+# CONFIG_LIBC_FLOATINGPOINT is not set
+CONFIG_LIBC_LONG_LONG=y
+# CONFIG_LIBC_IOCTL_VARIADIC is not set
+CONFIG_LIB_RAND_ORDER=1
+# CONFIG_EOL_IS_CR is not set
+# CONFIG_EOL_IS_LF is not set
+# CONFIG_EOL_IS_BOTH_CRLF is not set
+CONFIG_EOL_IS_EITHER_CRLF=y
+# CONFIG_LIBC_EXECFUNCS is not set
+CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
+CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
+# CONFIG_LIBC_STRERROR is not set
+# CONFIG_LIBC_PERROR_STDOUT is not set
+CONFIG_ARCH_LOWPUTC=y
+# CONFIG_LIBC_LOCALTIME is not set
+# CONFIG_TIME_EXTENDED is not set
+CONFIG_LIB_SENDFILE_BUFSIZE=512
+# CONFIG_ARCH_ROMGETC is not set
+# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
+CONFIG_ARCH_HAVE_TLS=y
+# CONFIG_TLS is not set
+# CONFIG_LIBC_NETDB is not set
+
+#
+# Non-standard Library Support
+#
+# CONFIG_LIB_KBDCODEC is not set
+# CONFIG_LIB_SLCDCODEC is not set
+
+#
+# Basic CXX Support
+#
+# CONFIG_C99_BOOL8 is not set
+CONFIG_HAVE_CXX=y
+CONFIG_HAVE_CXXINITIALIZE=y
+# CONFIG_CXX_NEWLONG is not set
+
+#
+# uClibc++ Standard C++ Library
+#
+# CONFIG_UCLIBCXX is not set
+
+#
+# Application Configuration
+#
+
+#
+# Built-In Applications
+#
+CONFIG_BUILTIN_PROXY_STACKSIZE=1024
+
+#
+# CAN Utilities
+#
+
+#
+# Examples
+#
+# CONFIG_EXAMPLES_BUTTONS is not set
+# CONFIG_EXAMPLES_CHAT is not set
+# CONFIG_EXAMPLES_CONFIGDATA is not set
+# CONFIG_EXAMPLES_CPUHOG is not set
+# CONFIG_EXAMPLES_CXXTEST is not set
+# CONFIG_EXAMPLES_DHCPD is not set
+# CONFIG_EXAMPLES_ELF is not set
+# CONFIG_EXAMPLES_FTPC is not set
+# CONFIG_EXAMPLES_FTPD is not set
+# CONFIG_EXAMPLES_HELLO is not set
+# CONFIG_EXAMPLES_HELLOXX is not set
+# CONFIG_EXAMPLES_JSON is not set
+# CONFIG_EXAMPLES_HIDKBD is not set
+# CONFIG_EXAMPLES_KEYPADTEST is not set
+# CONFIG_EXAMPLES_IGMP is not set
+# CONFIG_EXAMPLES_MEDIA is not set
+# CONFIG_EXAMPLES_MM is not set
+# CONFIG_EXAMPLES_MODBUS is not set
+# CONFIG_EXAMPLES_MOUNT is not set
+# CONFIG_EXAMPLES_NRF24L01TERM is not set
+CONFIG_EXAMPLES_NSH=y
+# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set
+# CONFIG_EXAMPLES_NULL is not set
+# CONFIG_EXAMPLES_NX is not set
+# CONFIG_EXAMPLES_NXTERM is not set
+# CONFIG_EXAMPLES_NXFFS is not set
+# CONFIG_EXAMPLES_NXHELLO is not set
+# CONFIG_EXAMPLES_NXIMAGE is not set
+# CONFIG_EXAMPLES_NXLINES is not set
+# CONFIG_EXAMPLES_NXTEXT is not set
+# CONFIG_EXAMPLES_OSTEST is not set
+# CONFIG_EXAMPLES_PCA9635 is not set
+# CONFIG_EXAMPLES_PIPE is not set
+# CONFIG_EXAMPLES_PPPD is not set
+# CONFIG_EXAMPLES_POSIXSPAWN is not set
+# CONFIG_EXAMPLES_RGBLED is not set
+# CONFIG_EXAMPLES_RGMP is not set
+# CONFIG_EXAMPLES_SENDMAIL is not set
+# CONFIG_EXAMPLES_SERIALBLASTER is not set
+# CONFIG_EXAMPLES_SERIALRX is not set
+# CONFIG_EXAMPLES_SERLOOP is not set
+# CONFIG_EXAMPLES_SLCD is not set
+# CONFIG_EXAMPLES_SMART_TEST is not set
+# CONFIG_EXAMPLES_SMART is not set
+# CONFIG_EXAMPLES_SMP is not set
+# CONFIG_EXAMPLES_TCPECHO is not set
+# CONFIG_EXAMPLES_TELNETD is not set
+# CONFIG_EXAMPLES_TIFF is not set
+# CONFIG_EXAMPLES_TOUCHSCREEN is not set
+# CONFIG_EXAMPLES_WEBSERVER is not set
+# CONFIG_EXAMPLES_USBTERM is not set
+# CONFIG_EXAMPLES_WATCHDOG is not set
+
+#
+# File System Utilities
+#
+# CONFIG_FSUTILS_INIFILE is not set
+
+#
+# GPS Utilities
+#
+# CONFIG_GPSUTILS_MINMEA_LIB is not set
+
+#
+# Graphics Support
+#
+# CONFIG_TIFF is not set
+# CONFIG_GRAPHICS_TRAVELER is not set
+
+#
+# Interpreters
+#
+# CONFIG_INTERPRETERS_FICL is not set
+# CONFIG_INTERPRETERS_PCODE is not set
+# CONFIG_INTERPRETERS_MICROPYTHON is not set
+
+#
+# FreeModBus
+#
+# CONFIG_MODBUS is not set
+
+#
+# Network Utilities
+#
+# CONFIG_NETUTILS_CODECS is not set
+# CONFIG_NETUTILS_FTPC is not set
+# CONFIG_NETUTILS_JSON is not set
+# CONFIG_NETUTILS_SMTP is not set
+
+#
+# NSH Library
+#
+CONFIG_NSH_LIBRARY=y
+# CONFIG_NSH_MOTD is not set
+
+#
+# Command Line Configuration
+#
+CONFIG_NSH_READLINE=y
+# CONFIG_NSH_CLE is not set
+CONFIG_NSH_LINELEN=64
+# CONFIG_NSH_DISABLE_SEMICOLON is not set
+CONFIG_NSH_CMDPARMS=y
+CONFIG_NSH_MAXARGUMENTS=6
+CONFIG_NSH_ARGCAT=y
+CONFIG_NSH_NESTDEPTH=3
+# CONFIG_NSH_DISABLEBG is not set
+CONFIG_NSH_BUILTIN_APPS=y
+
+#
+# Disable Individual commands
+#
+# CONFIG_NSH_DISABLE_ADDROUTE is not set
+# CONFIG_NSH_DISABLE_BASENAME is not set
+# CONFIG_NSH_DISABLE_CAT is not set
+# CONFIG_NSH_DISABLE_CD is not set
+# CONFIG_NSH_DISABLE_CP is not set
+# CONFIG_NSH_DISABLE_CMP is not set
+CONFIG_NSH_DISABLE_DATE=y
+# CONFIG_NSH_DISABLE_DD is not set
+# CONFIG_NSH_DISABLE_DF is not set
+# CONFIG_NSH_DISABLE_DELROUTE is not set
+# CONFIG_NSH_DISABLE_DIRNAME is not set
+# CONFIG_NSH_DISABLE_ECHO is not set
+# CONFIG_NSH_DISABLE_EXEC is not set
+# CONFIG_NSH_DISABLE_EXIT is not set
+# CONFIG_NSH_DISABLE_FREE is not set
+# CONFIG_NSH_DISABLE_GET is not set
+# CONFIG_NSH_DISABLE_HELP is not set
+# CONFIG_NSH_DISABLE_HEXDUMP is not set
+# CONFIG_NSH_DISABLE_IFCONFIG is not set
+CONFIG_NSH_DISABLE_IFUPDOWN=y
+# CONFIG_NSH_DISABLE_KILL is not set
+# CONFIG_NSH_DISABLE_LOSETUP is not set
+CONFIG_NSH_DISABLE_LOSMART=y
+# CONFIG_NSH_DISABLE_LS is not set
+# CONFIG_NSH_DISABLE_MB is not set
+# CONFIG_NSH_DISABLE_MKDIR is not set
+# CONFIG_NSH_DISABLE_MKFIFO is not set
+# CONFIG_NSH_DISABLE_MKRD is not set
+# CONFIG_NSH_DISABLE_MH is not set
+# CONFIG_NSH_DISABLE_MOUNT is not set
+# CONFIG_NSH_DISABLE_MV is not set
+# CONFIG_NSH_DISABLE_MW is not set
+# CONFIG_NSH_DISABLE_PS is not set
+# CONFIG_NSH_DISABLE_PUT is not set
+# CONFIG_NSH_DISABLE_PWD is not set
+# CONFIG_NSH_DISABLE_RM is not set
+# CONFIG_NSH_DISABLE_RMDIR is not set
+# CONFIG_NSH_DISABLE_SET is not set
+# CONFIG_NSH_DISABLE_SH is not set
+# CONFIG_NSH_DISABLE_SLEEP is not set
+# CONFIG_NSH_DISABLE_TIME is not set
+# CONFIG_NSH_DISABLE_TEST is not set
+# CONFIG_NSH_DISABLE_UMOUNT is not set
+# CONFIG_NSH_DISABLE_UNAME is not set
+# CONFIG_NSH_DISABLE_UNSET is not set
+# CONFIG_NSH_DISABLE_USLEEP is not set
+# CONFIG_NSH_DISABLE_WGET is not set
+# CONFIG_NSH_DISABLE_XD is not set
+
+#
+# Configure Command Options
+#
+CONFIG_NSH_CMDOPT_DF_H=y
+CONFIG_NSH_CODECS_BUFSIZE=128
+CONFIG_NSH_CMDOPT_HEXDUMP=y
+CONFIG_NSH_FILEIOSIZE=512
+
+#
+# Scripting Support
+#
+# CONFIG_NSH_DISABLESCRIPT is not set
+# CONFIG_NSH_DISABLE_ITEF is not set
+# CONFIG_NSH_DISABLE_LOOPS is not set
+
+#
+# Console Configuration
+#
+CONFIG_NSH_CONSOLE=y
+# CONFIG_NSH_ALTCONDEV is not set
+# CONFIG_NSH_ARCHINIT is not set
+# CONFIG_NSH_LOGIN is not set
+# CONFIG_NSH_CONSOLE_LOGIN is not set
+
+#
+# NxWidgets/NxWM
+#
+
+#
+# Platform-specific Support
+#
+# CONFIG_PLATFORM_CONFIGDATA is not set
+
+#
+# System Libraries and NSH Add-Ons
+#
+# CONFIG_SYSTEM_FREE is not set
+# CONFIG_SYSTEM_CLE is not set
+# CONFIG_SYSTEM_CUTERM is not set
+# CONFIG_SYSTEM_INSTALL is not set
+# CONFIG_SYSTEM_HEX2BIN is not set
+# CONFIG_SYSTEM_HEXED is not set
+# CONFIG_SYSTEM_RAMTEST is not set
+CONFIG_READLINE_HAVE_EXTMATCH=y
+CONFIG_SYSTEM_READLINE=y
+CONFIG_READLINE_ECHO=y
+# CONFIG_READLINE_TABCOMPLETION is not set
+# CONFIG_READLINE_CMD_HISTORY is not set
+# CONFIG_SYSTEM_SUDOKU is not set
+# CONFIG_SYSTEM_VI is not set
+# CONFIG_SYSTEM_UBLOXMODEM is not set
+# CONFIG_SYSTEM_ZMODEM is not set
diff --git a/configs/nucleo-144/nsh/setenv.sh b/configs/nucleo-144/nsh/setenv.sh
new file mode 100644
index 00000000000..8498950aed9
--- /dev/null
+++ b/configs/nucleo-144/nsh/setenv.sh
@@ -0,0 +1,77 @@
+#!/bin/bash
+# configs/nucleo-144/nsh/setenv.sh
+#
+#   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+
+if [ "$_" = "$0" ] ; then
+  echo "You must source this script, not run it!" 1>&2
+  exit 1
+fi
+
+WD=`pwd`
+if [ ! -x "setenv.sh" ]; then
+  echo "This script must be executed from the top-level NuttX build directory"
+  exit 1
+fi
+
+if [ -z "${PATH_ORIG}" ]; then
+  export PATH_ORIG="${PATH}"
+fi
+
+# This is the Cygwin path to the location where I installed the Atmel GCC
+# toolchain under Windows.  You will also have to edit this if you install
+# this toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin"
+
+# This is the Cygwin path to the location where I installed the CodeSourcery
+# toolchain under windows.  You will also have to edit this if you install
+# the CodeSourcery toolchain in any other location
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
+
+# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
+# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
+export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
+
+# This is the path to the location where I installed the devkitARM toolchain
+# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
+#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
+
+# This is the Cygwin path to the location where I build the buildroot
+# toolchain.
+# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
+
+# Add the path to the toolchain to the PATH varialble
+export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
+
+echo "PATH : ${PATH}"
diff --git a/configs/nucleo-144/scripts/flash.ld b/configs/nucleo-144/scripts/flash.ld
new file mode 100644
index 00000000000..90e589ed8ab
--- /dev/null
+++ b/configs/nucleo-144/scripts/flash.ld
@@ -0,0 +1,147 @@
+/****************************************************************************
+ * configs/nucleo-144/scripts/flash.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ *       Modified 11/4/2013 for STM32F429 support
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F746NGH6 has 1024Kb of main FLASH memory.  This FLASH memory can
+ * be accessed from either the AXIM interface at address 0x0800:0000 or from
+ * the ITCM interface at address 0x0020:0000.
+ *
+ * Additional information, including the option bytes, is available at at
+ * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
+ *
+ * In the STM32F746NGH6, two different boot spaces can be selected through
+ * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
+ * BOOT_ADD1 option bytes:
+ *
+ *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
+ *      ST programmed value: Flash on ITCM at 0x0020:0000
+ *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
+ *      ST programmed value: System bootloader at 0x0010:0000
+ *
+ * NuttX does not modify these option byes.  On the unmodified STM32F746G
+ * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
+ * to address 0x0020:0000 in ITCM FLASH.
+ *
+ * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM).
+ * SRAM is split up into three blocks:
+ *
+ *   1)  64Kb of DTCM SRM beginning at address 0x2000:0000
+ *   2) 240Kb of SRAM1 beginning at address 0x2001:0000
+ *   3)  16Kb of SRAM2 beginning at address 0x2004:c000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+	itcm  (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
+	flash (rx)  : ORIGIN = 0x08000000, LENGTH = 1024K
+	dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+	sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 240K
+	sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
+}
+
+OUTPUT_ARCH(arm)
+EXTERN(_vectors)
+ENTRY(_stext)
+SECTIONS
+{
+	.text : {
+		_stext = ABSOLUTE(.);
+		*(.vectors)
+		*(.text .text.*)
+		*(.fixup)
+		*(.gnu.warning)
+		*(.rodata .rodata.*)
+		*(.gnu.linkonce.t.*)
+		*(.glue_7)
+		*(.glue_7t)
+		*(.got)
+		*(.gcc_except_table)
+		*(.gnu.linkonce.r.*)
+		_etext = ABSOLUTE(.);
+	} > flash
+
+	.init_section : {
+		_sinit = ABSOLUTE(.);
+		*(.init_array .init_array.*)
+		_einit = ABSOLUTE(.);
+	} > flash
+
+	.ARM.extab : {
+		*(.ARM.extab*)
+	} > flash
+
+	__exidx_start = ABSOLUTE(.);
+	.ARM.exidx : {
+		*(.ARM.exidx*)
+	} > flash
+	__exidx_end = ABSOLUTE(.);
+
+	_eronly = ABSOLUTE(.);
+
+	.data : {
+		_sdata = ABSOLUTE(.);
+		*(.data .data.*)
+		*(.gnu.linkonce.d.*)
+		CONSTRUCTORS
+		_edata = ABSOLUTE(.);
+	} > sram1 AT > flash
+
+	.bss : {
+		_sbss = ABSOLUTE(.);
+		*(.bss .bss.*)
+		*(.gnu.linkonce.b.*)
+		*(COMMON)
+		_ebss = ABSOLUTE(.);
+	} > sram1
+
+	/* Stabs debugging sections. */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	.debug_abbrev 0 : { *(.debug_abbrev) }
+	.debug_info 0 : { *(.debug_info) }
+	.debug_line 0 : { *(.debug_line) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	.debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/nucleo-144/scripts/kernel-space.ld b/configs/nucleo-144/scripts/kernel-space.ld
new file mode 100644
index 00000000000..166d4f0bbcd
--- /dev/null
+++ b/configs/nucleo-144/scripts/kernel-space.ld
@@ -0,0 +1,109 @@
+/****************************************************************************
+ * configs/nucleo-144/scripts/kernel-space.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* NOTE:  This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > kflash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > kflash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > kflash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > kflash
+
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        _edata = ABSOLUTE(.);
+    } > ksram AT > kflash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        _ebss = ABSOLUTE(.);
+    } > ksram
+
+    /* Stabs debugging sections */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/nucleo-144/scripts/memory.ld b/configs/nucleo-144/scripts/memory.ld
new file mode 100644
index 00000000000..2308c38ec87
--- /dev/null
+++ b/configs/nucleo-144/scripts/memory.ld
@@ -0,0 +1,129 @@
+/****************************************************************************
+ * configs/nucleo-144/scripts/memory.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* The STM32F746NGH6 has 1024Kb of main FLASH memory.  This FLASH memory can
+ * be accessed from either the AXIM interface at address 0x0800:0000 or from
+ * the ITCM interface at address 0x0020:0000.
+ *
+ * Additional information, including the option bytes, is available at at
+ * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
+ *
+ * In the STM32F746NGH6, two different boot spaces can be selected through
+ * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
+ * BOOT_ADD1 option bytes:
+ *
+ *   1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
+ *      ST programmed value: Flash on ITCM at 0x0020:0000
+ *   2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
+ *      ST programmed value: System bootloader at 0x0010:0000
+ *
+ * NuttX does not modify these option byes.  On the unmodified STM32F746G
+ * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
+ * to address 0x0020:0000 in ITCM FLASH.
+ *
+ * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM).
+ * SRAM is split up into three blocks:
+ *
+ *   1)  64Kb of DTCM SRM beginning at address 0x2000:0000
+ *   2) 240Kb of SRAM1 beginning at address 0x2001:0000
+ *   3)  16Kb of SRAM2 beginning at address 0x2004:c000
+ *
+ * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
+ * where the code expects to begin execution by jumping to the entry point in
+ * the 0x0800:0000 address range.
+ *
+ * For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
+ * FLASH and 4Kb of SRAM.  That is an excessive amount for the kernel which
+ * should fit into 64KB and, of course, can be optimized as needed (See
+ * also configs/stm32f746g-disco/scripts/kernel-space.ld).  Allowing the
+ * additional does permit addition debug instrumentation to be added to the
+ * kernel space without overflowing the partition.
+ *
+ * Alignment of the user space FLASH partition is also a critical factor:
+ * The user space FLASH partition will be spanned with a single region of
+ * size 2**n bytes.  The alignment of the user-space region must be the same.
+ * As a consequence, as the user-space increases in size, the alignment
+ * requirement also increases.
+ *
+ * This alignment requirement means that the largest user space FLASH region
+ * you can have will be 512KB at it would have to be positioned at
+ * 0x08800000.  If you change this address, don't forget to change the
+ * CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
+ * the check in kernel/userspace.c.
+ *
+ * For the same reasons, the maximum size of the SRAM mapping is limited to
+ * 4KB.  Both of these alignment limitations could be reduced by using
+ * multiple regions to map the FLASH/SDRAM range or perhaps with some
+ * clever use of subregions.
+ *
+ * A detailed memory map for the 112KB SRAM region is as follows:
+ *
+ *   0x20001 0000:  Kernel .data region.  Typical size: 0.1KB
+ *   ------- ----   Kernel .bss  region.  Typical size: 1.8KB
+ *   0x20001 0800:  Kernel IDLE thread stack (approximate).  Size is
+ *                  determined by CONFIG_IDLETHREAD_STACKSIZE and
+ *                  adjustments for alignment.  Typical is 1KB.
+ *   ------- ----   Padded to 4KB
+ *   0x20001 1000:  User .data region.  Size is variable.
+ *   ------- ----   User .bss region  Size is variable.
+ *   0x20001 2000:  Beginning of kernel heap.  Size determined by
+ *                  CONFIG_MM_KERNEL_HEAPSIZE.
+ *   ------- ----   Beginning of user heap.  Can vary with other settings.
+ *   0x20004 c000:  End+1 of SRAM1
+ */
+
+MEMORY
+{
+	/* ITCM boot address */
+
+	itcm  (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
+
+	/* 1024KB FLASH */
+
+	kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+	uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
+	xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
+
+	/* 240KB of contiguous SRAM1 */
+
+	ksram (rwx) : ORIGIN = 0x20010000, LENGTH = 4K
+	usram (rwx) : ORIGIN = 0x20011000, LENGTH = 4K
+	xsram (rwx) : ORIGIN = 0x20012000, LENGTH = 240K - 8K
+
+    /* DTCM SRAM */
+
+	dtcm  (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+	sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
+}
diff --git a/configs/nucleo-144/scripts/user-space.ld b/configs/nucleo-144/scripts/user-space.ld
new file mode 100644
index 00000000000..871d8e055f8
--- /dev/null
+++ b/configs/nucleo-144/scripts/user-space.ld
@@ -0,0 +1,111 @@
+/****************************************************************************
+ * configs/nucleo-144/scripts/user-space.ld
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* NOTE:  This depends on the memory.ld script having been included prior to
+ * this script.
+ */
+
+OUTPUT_ARCH(arm)
+SECTIONS
+{
+    .userspace : {
+        *(.userspace)
+    } > uflash
+
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > uflash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > uflash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > uflash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > uflash
+
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        _edata = ABSOLUTE(.);
+    } > usram AT > uflash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        _ebss = ABSOLUTE(.);
+    } > usram
+
+    /* Stabs debugging sections */
+
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}
diff --git a/configs/nucleo-144/src/.gitignore b/configs/nucleo-144/src/.gitignore
new file mode 100644
index 00000000000..726d936e1e3
--- /dev/null
+++ b/configs/nucleo-144/src/.gitignore
@@ -0,0 +1,2 @@
+/.depend
+/Make.dep
diff --git a/configs/nucleo-144/src/Makefile b/configs/nucleo-144/src/Makefile
new file mode 100644
index 00000000000..2f742b273bb
--- /dev/null
+++ b/configs/nucleo-144/src/Makefile
@@ -0,0 +1,55 @@
+############################################################################
+# configs/nucleo-144/src/Makefile
+#
+#   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <gnutt@nuttx.org>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name NuttX nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+
+ASRCS =
+CSRCS = stm32_boot.c stm32_spi.c
+
+ifeq ($(CONFIG_ARCH_LEDS),y)
+CSRCS += stm32_autoleds.c
+else
+CSRCS += stm32_userleds.c
+endif
+
+ifeq ($(CONFIG_ARCH_BUTTONS),y)
+CSRCS +=  stm32_buttons.c
+endif
+
+ifeq ($(CONFIG_LIB_BOARDCTL),y)
+CSRCS += stm32_appinitialize.c
+endif
+
+include $(TOPDIR)/configs/Board.mk
diff --git a/configs/nucleo-144/src/nucleo-144.h b/configs/nucleo-144/src/nucleo-144.h
new file mode 100644
index 00000000000..7628bd120be
--- /dev/null
+++ b/configs/nucleo-144/src/nucleo-144.h
@@ -0,0 +1,100 @@
+/****************************************************************************************************
+ * configs/nucleo-144/src/nucleo-144.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H
+#define __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/compiler.h>
+#include <stdint.h>
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+/* procfs File System */
+
+#ifdef CONFIG_FS_PROCFS
+#  ifdef CONFIG_NSH_PROC_MOUNTPOINT
+#    define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
+#  else
+#    define STM32_PROCFS_MOUNTPOINT "/proc"
+#  endif
+#endif
+
+/* STM32F736G Discovery GPIOs ***********************************************************************/
+/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the reset button, that
+ * can be controlled by software (LD2 is a power indicator, LD3-6 indicate USB status, LD7 is
+ * controlled by the ST-Link).
+ *
+ * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. One end of LD1 is
+ * grounded so a high output on PI1 will illuminate the LED.
+ */
+
+#define GPIO_LD1           (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \
+                            GPIO_PORTI | GPIO_PIN1)
+
+/* Pushbutton B1, labelled "User", is connected to GPIO PI11.  A high value will be sensed when the
+ * button is depressed. Note that the EXTI interrupt is configured.
+ */
+
+#define GPIO_BTN_USER      (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTI | GPIO_PIN11)
+
+/****************************************************************************************************
+ * Public data
+ ****************************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/****************************************************************************************************
+ * Public Functions
+ ****************************************************************************************************/
+
+/****************************************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the stm32f746g-disco board.
+ *
+ ****************************************************************************************************/
+
+void weak_function stm32_spidev_initialize(void);
+
+#endif /* __ASSEMBLY__ */
+#endif /* __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H */
+
diff --git a/configs/nucleo-144/src/stm32_appinitialize.c b/configs/nucleo-144/src/stm32_appinitialize.c
new file mode 100644
index 00000000000..6c80705c3a3
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_appinitialize.c
@@ -0,0 +1,87 @@
+/****************************************************************************
+ * config/nucleo-144/src/stm32_appinitilaize.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "stm32_ccm.h"
+#include "nucleo-144.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_app_initialize
+ *
+ * Description:
+ *   Perform application specific initialization.  This function is never
+ *   called directly from application code, but only indirectly via the
+ *   (non-standard) boardctl() interface using the command BOARDIOC_INIT.
+ *
+ ****************************************************************************/
+
+int board_app_initialize(void)
+{
+#ifdef CONFIG_FS_PROCFS
+  int ret;
+
+#ifdef CONFIG_STM32_CCM_PROCFS
+  /* Register the CCM procfs entry.  This must be done before the procfs is
+   * mounted.
+   */
+
+  (void)ccm_procfs_register();
+#endif
+
+  /* Mount the procfs file system */
+
+  ret = mount(NULL, SAMV71_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
+  if (ret < 0)
+    {
+      SYSLOG("ERROR: Failed to mount procfs at %s: %d\n",
+             SAMV71_PROCFS_MOUNTPOINT, ret);
+    }
+#endif
+
+  return OK;
+}
diff --git a/configs/nucleo-144/src/stm32_autoleds.c b/configs/nucleo-144/src/stm32_autoleds.c
new file mode 100644
index 00000000000..0e7a19d6ad0
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_autoleds.c
@@ -0,0 +1,144 @@
+/****************************************************************************
+ * configs/nucleo-144/src/stm32_autoleds.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <debug.h>
+
+#include <nuttx/board.h>
+
+#include "stm32_gpio.h"
+#include "nucleo-144.h"
+
+#ifdef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
+ * with CONFIG_DEBUG_VERBOSE too)
+ */
+
+#ifdef CONFIG_DEBUG_LEDS
+#  define leddbg  lldbg
+#  define ledvdbg llvdbg
+#else
+#  define leddbg(x...)
+#  define ledvdbg(x...)
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_autoled_initialize
+ ****************************************************************************/
+
+void board_autoled_initialize(void)
+{
+  /* Configure the LD1 GPIO for output. Initial state is OFF */
+
+  stm32_configgpio(GPIO_LD1);
+}
+
+/****************************************************************************
+ * Name: board_autoled_on
+ ****************************************************************************/
+
+void board_autoled_on(int led)
+{
+  bool ledstate = false;
+
+  switch (led)
+    {
+    case 0:                   /* LED_STARTED:      NuttX has been started  STATUS LED=OFF */
+                              /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
+                              /* LED_IRQSENABLED:  Interrupts enabled      STATUS LED=OFF */
+      break;                  /* Leave ledstate == true to turn OFF */
+
+    default:
+    case 2:                   /* LED_INIRQ:        In an interrupt         STATUS LED=N/C */
+                              /* LED_SIGNAL:       In a signal handler     STATUS LED=N/C */
+                              /* LED_ASSERTION:    An assertion failed     STATUS LED=N/C */
+      return;                 /* Return to leave STATUS LED unchanged */
+
+    case 3:                   /* LED_PANIC:        The system has crashed  STATUS LED=FLASH */
+    case 1:                   /* LED_STACKCREATED: Idle stack created      STATUS LED=ON */
+      ledstate = true;       /* Set ledstate == false to turn ON */
+      break;
+    }
+
+   stm32_gpiowrite(GPIO_LD1, ledstate);
+}
+
+/****************************************************************************
+ * Name: board_autoled_off
+ ****************************************************************************/
+
+void board_autoled_off(int led)
+{
+  switch (led)
+    {
+    /* These should not happen and are ignored */
+
+    default:
+    case 0:                   /* LED_STARTED:      NuttX has been started  STATUS LED=OFF */
+                              /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */
+                              /* LED_IRQSENABLED:  Interrupts enabled      STATUS LED=OFF */
+    case 1:                   /* LED_STACKCREATED: Idle stack created      STATUS LED=ON */
+
+    /* These result in no-change */
+
+    case 2:                   /* LED_INIRQ:        In an interrupt         STATUS LED=N/C */
+                              /* LED_SIGNAL:       In a signal handler     STATUS LED=N/C */
+                              /* LED_ASSERTION:    An assertion failed     STATUS LED=N/C */
+      return;                 /* Return to leave STATUS LED unchanged */
+
+    /* Turn STATUS LED off set driving the output high */
+
+    case 3:                   /* LED_PANIC:        The system has crashed  STATUS LED=FLASH */
+      stm32_gpiowrite(GPIO_LD1, false);
+      break;
+    }
+}
+
+#endif /* CONFIG_ARCH_LEDS */
diff --git a/configs/nucleo-144/src/stm32_boot.c b/configs/nucleo-144/src/stm32_boot.c
new file mode 100644
index 00000000000..6024e76b226
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_boot.c
@@ -0,0 +1,119 @@
+/************************************************************************************
+ * configs/nucleo-144/src/stm32_boot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <debug.h>
+
+#include <nuttx/board.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "nucleo-144.h"
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_boardinitialize
+ *
+ * Description:
+ *   All STM32 architectures must provide the following entry point.  This entry point
+ *   is called early in the initialization -- after all memory has been configured
+ *   and mapped but before any devices have been initialized.
+ *
+ ************************************************************************************/
+
+void stm32_boardinitialize(void)
+{
+#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
+    defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
+    defined(CONFIG_STM32F7_SPI5)
+  /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
+   * stm32_spidev_initialize() has been brought into the link.
+   */
+
+  if (stm32_spidev_initialize)
+    {
+      stm32_spidev_initialize();
+    }
+#endif
+
+#ifdef CONFIG_ARCH_LEDS
+  /* Configure on-board LEDs if LED support has been selected. */
+
+  board_autoled_initialize();
+#endif
+}
+
+/************************************************************************************
+ * Name: board_initialize
+ *
+ * Description:
+ *   If CONFIG_BOARD_INITIALIZE is selected, then an additional initialization call
+ *   will be performed in the boot-up sequence to a function called
+ *   board_initialize().  board_initialize() will be called immediately after
+ *   up_initialize() is called and just before the initial application is started.
+ *   This additional initialization phase may be used, for example, to initialize
+ *   board-specific device drivers.
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_BOARD_INITIALIZE
+void board_initialize(void)
+{
+#if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL)
+  /* Perform NSH initialization here instead of from the NSH.  This
+   * alternative NSH initialization is necessary when NSH is ran in user-space
+   * but the initialization function must run in kernel space.
+   */
+
+  (void)board_app_initialize();
+#endif
+}
+#endif
diff --git a/configs/nucleo-144/src/stm32_buttons.c b/configs/nucleo-144/src/stm32_buttons.c
new file mode 100644
index 00000000000..0421caeec7e
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_buttons.c
@@ -0,0 +1,112 @@
+/****************************************************************************
+ * configs/nucleo-144/src/stm32_buttons.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/board.h>
+
+#include "stm32_gpio.h"
+#include "nucleo-144.h"
+
+#ifdef CONFIG_ARCH_BUTTONS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_button_initialize
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.
+ *   After that, board_buttons() may be called to collect the current state
+ *   of all buttons or board_button_irq() may be called to register button
+ *   interrupt handlers.
+ *
+ ****************************************************************************/
+
+void board_button_initialize(void)
+{
+  stm32_configgpio(GPIO_BTN_USER);
+}
+
+/****************************************************************************
+ * Name: board_buttons
+ ****************************************************************************/
+
+uint8_t board_buttons(void)
+{
+  return stm32_gpioread(GPIO_BTN_USER) ? 1 : 0;
+}
+
+/************************************************************************************
+ * Button support.
+ *
+ * Description:
+ *   board_button_initialize() must be called to initialize button resources.  After
+ *   that, board_buttons() may be called to collect the current state of all
+ *   buttons or board_button_irq() may be called to register button interrupt
+ *   handlers.
+ *
+ *   After board_button_initialize() has been called, board_buttons() may be called to
+ *   collect the state of all buttons.  board_buttons() returns an 8-bit bit set
+ *   with each bit associated with a button.  See the BUTTON_*_BIT
+ *   definitions in board.h for the meaning of each bit.
+ *
+ *   board_button_irq() may be called to register an interrupt handler that will
+ *   be called when a button is depressed or released.  The ID value is a
+ *   button enumeration value that uniquely identifies a button resource. See the
+ *   BUTTON_* definitions in board.h for the meaning of enumeration
+ *   value.  The previous interrupt handler address is returned (so that it may
+ *   restored, if so desired).
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_ARCH_IRQBUTTONS
+xcpt_t board_button_irq(int id, xcpt_t irqhandler)
+{
+#warning Missing logic
+}
+#endif
+#endif /* CONFIG_ARCH_BUTTONS */
diff --git a/configs/nucleo-144/src/stm32_spi.c b/configs/nucleo-144/src/stm32_spi.c
new file mode 100644
index 00000000000..d3b5e9160e5
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_spi.c
@@ -0,0 +1,246 @@
+/************************************************************************************
+ * configs/nucleo-144/src/stm32_spi.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Authors: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <errno.h>
+#include <debug.h>
+
+#include <nuttx/spi/spi.h>
+#include <arch/board/board.h>
+
+#include "up_arch.h"
+#include "chip.h"
+#include "stm32_spi.h"
+
+#include "nucleo-144.h"
+
+#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \
+    defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \
+    defined(CONFIG_STM32F7_SPI5)
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+#ifdef CONFIG_DEBUG_SPI
+#  define spidbg  lldbg
+#  ifdef SPI_VERBOSE
+#    define spivdbg lldbg
+#  else
+#    define spivdbg(x...)
+#  endif
+#else
+#  undef SPI_VERBOSE
+#  define spidbg(x...)
+#  define spivdbg(x...)
+#endif
+
+/************************************************************************************
+ * Private Data
+ ************************************************************************************/
+
+/************************************************************************************
+ * Private Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Name: stm32_spidev_initialize
+ *
+ * Description:
+ *   Called to configure SPI chip select GPIO pins for the stm32f746g-disco board.
+ *
+ ************************************************************************************/
+
+void weak_function stm32_spidev_initialize(void)
+{
+}
+
+/****************************************************************************
+ * Name:  stm32_spi1/2/3/4/5select and stm32_spi1/2/3/4/5status
+ *
+ * Description:
+ *   The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
+ *   provided by board-specific logic.  They are implementations of the select
+ *   and status methods of the SPI interface defined by struct spi_ops_s (see
+ *   include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
+ *   are provided by common STM32 logic.  To use this common SPI logic on your
+ *   board:
+ *
+ *   1. Provide logic in stm32_boardinitialize() to configure SPI chip select
+ *      pins.
+ *   2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
+ *      board-specific logic.  These functions will perform chip selection and
+ *      status operations using GPIOs in the way your board is configured.
+ *   3. Add a calls to stm32_spibus_initialize() in your low level application
+ *      initialization logic
+ *   4. The handle returned by stm32_spibus_initialize() may then be used to bind the
+ *      SPI driver to higher level logic (e.g., calling
+ *      mmcsd_spislotinitialize(), for example, will bind the SPI driver to
+ *      the SPI MMC/SD driver).
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_STM32F7_SPI1
+void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI2
+void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI3
+void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI4
+void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI5
+void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
+{
+  spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
+}
+
+uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
+{
+  return 0;
+}
+#endif
+
+/****************************************************************************
+ * Name: stm32_spi1cmddata
+ *
+ * Description:
+ *   Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
+ *   or command (false). This function must be provided by platform-specific
+ *   logic. This is an implementation of the cmddata method of the SPI
+ *   interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
+ *
+ * Input Parameters:
+ *
+ *   spi - SPI device that controls the bus the device that requires the CMD/
+ *         DATA selection.
+ *   devid - If there are multiple devices on the bus, this selects which one
+ *         to select cmd or data.  NOTE:  This design restricts, for example,
+ *         one one SPI display per SPI bus.
+ *   cmd - true: select command; false: select data
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SPI_CMDDATA
+#ifdef CONFIG_STM32F7_SPI1
+int stm32_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI2
+int stm32_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI3
+int stm32_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI4
+int stm32_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#ifdef CONFIG_STM32F7_SPI5
+int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd)
+{
+  return -ENODEV;
+}
+#endif
+
+#endif /* CONFIG_SPI_CMDDATA */
+#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */
diff --git a/configs/nucleo-144/src/stm32_userleds.c b/configs/nucleo-144/src/stm32_userleds.c
new file mode 100644
index 00000000000..19146d241de
--- /dev/null
+++ b/configs/nucleo-144/src/stm32_userleds.c
@@ -0,0 +1,120 @@
+/****************************************************************************
+ * configs/nucleo-144/src/stm32_userleds.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdbool.h>
+#include <debug.h>
+
+#include "stm32_gpio.h"
+#include "nucleo-144.h"
+
+#ifndef CONFIG_ARCH_LEDS
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* CONFIG_DEBUG_LEDS enables debug output from this file (needs CONFIG_DEBUG
+ * with CONFIG_DEBUG_VERBOSE too)
+ */
+
+#ifdef CONFIG_DEBUG_LEDS
+#  define leddbg  lldbg
+#  define ledvdbg llvdbg
+#else
+#  define leddbg(x...)
+#  define ledvdbg(x...)
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: board_userled_initialize
+ *
+ * Description:
+ *   If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
+ *   LEDs.  If CONFIG_ARCH_LEDS is not defined, then the
+ *   board_userled_initialize() is available to initialize the LED from user
+ *   application logic.
+ *
+ ****************************************************************************/
+
+void board_userled_initialize(void)
+{
+  stm32_configgpio(GPIO_LD1);
+}
+
+/****************************************************************************
+ * Name: board_userled
+ *
+ * Description:
+ *   If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
+ *  LEDs.  If CONFIG_ARCH_LEDS is not defined, then the board_userled() is
+ *  available to control the LED from user application logic.
+ *
+ ****************************************************************************/
+
+void board_userled(int led, bool ledon)
+{
+  if (led == BOARD_STATUS_LED)
+    {
+      stm32_gpiowrite(GPIO_LD1, !ledon);
+    }
+}
+
+/****************************************************************************
+ * Name: board_userled_all
+ *
+ * Description:
+ *   If CONFIG_ARCH_LEDS is defined, then NuttX will control the on-board
+ *  LEDs.  If CONFIG_ARCH_LEDS is not defined, then the board_userled_all() is
+ *  available to control the LED from user application logic.  NOTE:  since
+ *  there is only a single LED on-board, this is function is not very useful.
+ *
+ ****************************************************************************/
+
+void board_userled_all(uint8_t ledset)
+{
+  stm32_gpiowrite(GPIO_LD1, (ledset & BOARD_STATUS_LED_BIT) != 0);
+}
+
+#endif /* !CONFIG_ARCH_LEDS */

From d03b0f518886e3eb9536a3cf7f5db4beb4b7b168 Mon Sep 17 00:00:00 2001
From: David Sidrane <David_S5@usa.net>
Date: Thu, 12 May 2016 09:56:32 -0600
Subject: [PATCH 20/33] README.txt file for the nucleo-144

---
 configs/nucleo-144/README.txt | 306 ++++++++++++++++++++++++++++++++++
 1 file changed, 306 insertions(+)
 create mode 100644 configs/nucleo-144/README.txt

diff --git a/configs/nucleo-144/README.txt b/configs/nucleo-144/README.txt
new file mode 100644
index 00000000000..0eca17d5829
--- /dev/null
+++ b/configs/nucleo-144/README.txt
@@ -0,0 +1,306 @@
+README
+======
+
+This README discusses issues unique to NuttX configurations for the ST
+Nucleo F746ZG board from ST Micro.  See
+
+http://www.st.com/web/catalog/tools/FM116/CL1620/SC959/SS1532/LN1847/PF261636
+  
+The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is clumped together
+under the STM32 Nucleo-144 board family. This does provide uniformity in the
+documentation from ST and should allow us to quickly change configurations
+but just cloning this configuration and changing the CPU choice and board
+init. Unfortunately for the developer, the CPU specific information must be
+extracted from the common information in the documentation.
+
+Please read the User Manaul UM1727: Getting started with STM32 Nucleo board
+software development tools and take note of the Powering options for the
+board (6.3 Power supply and power selection) and the Solder bridges based
+hardware configuration changes that are configurable (6.11 Solder bridges).
+
+NUCLEO-F746ZG:
+
+  Microprocessor: STM32F746ZGT6 Core: ARM 32-bit Cortex®-M7 CPU with FPU,
+                  L1-cache: 4KB data cache and 4KB instruction cache, up to
+                  216 MHz, MPU, and DSP instructions.
+  Memory:         1024 KB Flash 320KB of SRAM (including 64KB of data TCM RAM)
+                  + 16KB of instruction TCM RAM + 4KB of backup SRAM
+  ADC:            3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in 
+                  triple interleaved mode
+  DMA:            16-stream DMA controllers with FIFOs and burst support
+  Timers:         Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower),
+                  two 32-bit timers, 2x watchdogs, SysTick
+  GPIO:           114 I/O ports with interrupt capability
+  LCD:            LCD-TFT Controllerwith (DMA2D), Parallel interface 
+  I2C:            4 × I2C interfaces (SMBus/PMBus)
+  U[S]ARTs:       4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA,
+                  modem control)
+  SPI/12Ss:       6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S 
+                  for audio class accuracy via internal audio PLL or external 
+                  clock
+  QSPI:           Dual mode Quad-SPI
+  SAIs:           2 Serial Audio Interfaces
+  CAN:             2 X CAN interface
+  SDMMC interface
+  SPDIFRX interface
+  USB:            USB 2.0 full-speed device/host/OTG controller with on-chip 
+                  PHY
+  10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, 
+  				   MII/RMII
+  Camera Interface: 8/14 Bit
+  CRC calculation unit
+  TRG:            True random number generator
+  RTC
+
+Board features:
+
+  Peripherals:    8 leds, 2 push button (3 LEDs, 1 button) under software 
+                  control
+  Debug:          STLINK/V2-1 debugger/programmer Uses a STM32F103CB to 
+                  provide a ST-Link for programming, debug similar to the
+                  OpenOcd FTDI function - USB to JTAG front-end. 
+                  
+  Expansion I/F   ST Zio  an Extended Ardino and Morpho Headers
+
+See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG  form additional information about this board.
+
+Contents
+========
+
+  - Development Environment
+  - IDEs
+  - Basic configuaration & build steps
+  - Hardware
+    - Button
+    - LED
+    - U[S]ARTs and Serial Consoles
+  - Configurations
+
+Development Environment
+=======================
+
+  Either Linux or Cygwin on Windows can be used for the development environment.
+  The source has been built only using the GNU toolchain (see below).  Other
+  toolchains will likely cause problems.
+
+  All testing has been conducted using the GNU toolchain from ARM for Linux.
+  found here https://launchpad.net/gcc-arm-embedded/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2
+  
+  If you change the default toolchain, then you may also have to modify the PATH in
+  the setenv.h file if your make cannot find the tools.
+
+  
+IDEs
+====
+
+  NuttX is built using command-line make.  It can be used with an IDE, but some
+  effort will be required to create the project.
+
+  Makefile Build
+  --------------
+  Under Eclipse, it is pretty easy to set up an "empty makefile project" and
+  simply use the NuttX makefile to build the system.  That is almost for free
+  under Linux.  Under Windows, you will need to set up the "Cygwin GCC" empty
+  makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
+  there is a lot of help on the internet).
+
+
+Basic configuration & build steps
+==================================
+
+  A GNU GCC-based toolchain is assumed.  The files */setenv.sh should
+  be modified to point to the correct path to the Cortex-M7 GCC toolchain (if
+  different from the default in your PATH variable).
+
+   - Configures nuttx creating .config file in the nuttx directory
+     $ cd tools && ./configure.sh nucleo-f746zg/nsh && cd ..
+   - Refreshes the .config file with the latest features addes sice this writting
+     $ make oldconfig
+   - Select the features you want in the build.
+	 $ make menuconfig
+   - Builds Nuttx with the features you selected.	 
+	 $ make
+
+Hardware
+========
+
+  GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out
+  on the Nucleo F746ZG
+  
+  See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic
+  pinouts.
+  
+  Keep in mind that:
+   1) The I/O is 3.3 Volt not 5 Volt like on the Arduino products.
+   2) The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder
+      Blobs (SB) that can alter the factory configuration. We will note SB
+      in effect but will assume the facitory defualt settings.
+  
+  Our main concern is establishing a console and LED utilization for
+  debugging. Because so many pins can be multiplexed with so many functions,
+  the above mentioned graphic is super helpful in indentifying a serial port
+  that will not rob us of another IO feature. Namely Serial Port 8 (UART8)
+  with TX on PE1 and RX on PE0. Of course if your design  has used those
+  pins you can choose another IO configuration to bring out Serial Port 8
+  or choose a completely different U[S]ART to use as the console.
+  In that Case, You will need to edit the include/board.h to select different
+  U[S]ART and / or pin selections.
+  
+
+  Serial 
+  ----
+
+  SERIAL_RX         PE_0
+  SERIAL_TX         PE_1
+
+  Buttons
+  -------
+  B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173
+           ON and SB180 OFF)  
+
+  LEDs
+  ----
+  The Board provides a 3 user LEDs, LD1-LD3
+  LED1 (Green)      PB_0  (SB120 ON and SB119 OFF) 
+  LED2 (Blue)       PB_7  (SB139 ON)
+  LED3 (Red)        PB_14 (SP118 ON)
+
+    - When the I/O is HIGH value, the LEDs are on.
+    - When the I/O is LOW, the LEDs are off.
+
+  These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
+  defined.  In that case, the usage by the board port is defined in
+  include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS
+  related events as follows when the LEDs are available:
+
+    SYMBOL                Meaning    RED  GREEN BLUE
+    -------------------  -----------------------  -----------
+
+	LED_STARTED             0        OFF  OFF   OFF 
+	LED_HEAPALLOCATE        0        OFF  OFF   OFF 
+	LED_IRQSENABLED         0        OFF  OFF   OFF 
+	LED_STACKCREATED        1        OFF  ON    OFF 
+	LED_INIRQ               2        NC   NC    ON  (momentary)
+	LED_SIGNAL              2        NC   NC    ON  (momentary)
+	LED_ASSERTION           3        ON   NC    NC  (momentary)
+	LED_PANIC               4        ON   OFF   OFF (flashing 2Hz)
+
+OFF - means that the OS is still initializing. Initialization is very fast so
+    if you see this at all, it probably means that the system is hanging up
+    somewhere in the initialization phases.
+
+GREEN - This means that the OS completed initialization.
+ 
+BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is
+   illuminated and extinguished when the interrupt or signal handler exits.
+ 
+RED - If a recovered assertion occurs, the RED LED will be illuminated
+   briefly while the assertion is handled.  You will probably never see this.
+ 
+Flashing RED - In the event of a fatal crash, all other LEDs will be 
+extinguished and RED LED will FLASH at a 2Hz rate.
+ 
+
+  Thus if the GREEN LED is lit, NuttX has successfully booted and is, 
+  apparently, running normally.  If the RED LED is flashing at 
+  approximately 2Hz, then a fatal error has been detected and the system has
+  halted.
+
+Serial Consoles
+===============
+
+  USART8
+  ------
+  Pins and Connectors:
+         GPIO  Connector NAME
+    RXD: PE0   CN11 pin 64, PE0
+    		   CN10 pin 33, D34
+
+    TXD: PE1   CN11 pin 61, PE1
+
+  You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL
+
+    Nucleo 144           FTDI TTL-232R-3V3 
+    -----------         ------------
+    TXD - CN11 pin 64 - RXD - Pin 5 (Yellow)
+    RXD - CN11 pin 61 - TXD - Pin 4 (Orange)
+    GND   CN11 pin 63   GND   Pin 1  (Black)
+
+	*Note you will be reverse RX/TX
+
+  Use make menuconfig to configure USART8 as the console:
+
+    CONFIG_STM32F7_UART8=y
+    CONFIG_USART8_ISUART=y
+    CONFIG_USART8_SERIAL_CONSOLE=y
+    CONFIG_UART8_RXBUFSIZE=256
+    CONFIG_UART8_TXBUFSIZE=256
+    CONFIG_UART8_BAUD=115200
+    CONFIG_UART8_BITS=8
+    CONFIG_UART8_PARITY=0
+    CONFIG_UART8_2STOP=0
+
+  Virtual COM Port
+  ----------------
+  Yet another option is to use USART3 and the USB virtual COM port.  This
+  option may be more convenient for long term development, but is painful
+  to use during board bring-up.
+
+  Solder Bridges.  This configuration requires:
+
+	PD8 USART3 TX SB5 ON and SB7 OFF (Default)
+	PD9 USART3 RX SB6 ON and SB4 OFF (Default)
+
+  Configuring USART3 is the same as given above but add the S and #3.
+
+  Question:  What BAUD should be configure to interface with the Virtual
+  COM port?  115200 8N1?
+
+  Default
+  -------
+  As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the
+  virtual COM port is enabled.
+
+
+Configurations
+==============
+
+  nsh:
+  ---------
+    Configures the NuttShell (nsh) located at apps/examples/nsh for the
+    Nucleo-144 boards.  The Configuration enables the serial interfaces
+    on UART8.  Support for builtin applications is enabled, but in the base
+    configuration no builtin applications are selected (see NOTES below).
+
+    NOTES:
+
+    1. This configuration uses the mconf-based configuration tool.  To
+       change this configuration using that tool, you should:
+
+       a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+          see additional README.txt files in the NuttX tools repository.
+
+       b. If this is the intall configuration then Execute 
+       	  'cd tools && ./configure.sh stm32f746g-disco/nsh && cd ..'
+          in nuttx/ in order to start configuration process. 
+          Caution: Doing this step more than once will overwrite .config with
+          the contents of the stm32f746g-disco/nsh/defconfig file.
+
+       c. Execute 'make oldconfig' in nuttx/ in order to refresh the
+          configuration.
+
+       d. Execute 'make menuconfig' in nuttx/ in order to start the
+          reconfiguration process.
+          
+       e. Save the .config file to reuse it in the future starting at step d.
+
+    2. By default, this configuration uses the ARM GNU toolchain
+       for Linux.  That can easily be reconfigured, of course.
+
+       CONFIG_HOST_LINUX=y                     : Builds under Linux
+       CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y     : ARM GNU for Linux
+
+    3. Although the default console is USART3 (which would correspond to
+       the Virtual COM port) I have done all testing with the console
+       device configured for UART8 (see instruction above under "Serial
+       Consoles).

From 61f6915898de8948f65f7edb910797011939ed66 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 12 May 2016 10:01:43 -0600
Subject: [PATCH 21/33] Update README files

---
 Documentation/README.html | 4 +++-
 README.txt                | 2 ++
 configs/README.txt        | 5 +++++
 3 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/Documentation/README.html b/Documentation/README.html
index ed18b435931..ce2d5eef2a5 100644
--- a/Documentation/README.html
+++ b/Documentation/README.html
@@ -8,7 +8,7 @@
   <tr align="center" bgcolor="#e4e4e4">
     <td>
       <h1><big><font color="#3c34ec"><i>NuttX README Files</i></font></big></h1>
-      <p>Last Updated:  April 12, 2016</p>
+      <p>Last Updated:  May 12, 2016</p>
     </td>
   </tr>
 </table>
@@ -157,6 +157,8 @@ nuttx/
  |   |- ntosd-dm320/
  |   |   |- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ntosd-dm320/doc/README.txt" target="_blank">doc/README.txt</a>
  |   |   `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/ntosd-dm320/README.txt" target="_blank"><b><i>README.txt</i></b></a>
+ |   |- nucleo-144/
+ |   |   `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/nucleo-144/README.txt" target="_blank"><b><i>README.txt</i></b></a>
  |   |- nucleo-f4x1re/
  |   |   `- <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/nucleo-f4x1re/README.txt" target="_blank"><b><i>README.txt</i></b></a>
  |   |- nutiny-nuc120/
diff --git a/README.txt b/README.txt
index cbba0da1d01..ed3d0141f56 100644
--- a/README.txt
+++ b/README.txt
@@ -1332,6 +1332,8 @@ nuttx/
  |   |- ntosd-dm320/
  |   |   |- doc/README.txt
  |   |   `- README.txt
+ |   |- nucleo-144/
+ |   |   `- README.txt
  |   |- nucleo-f4x1re/
  |   |   `- README.txt
  |   |- nutiny-nuc120/
diff --git a/configs/README.txt b/configs/README.txt
index 4df80fa8147..4b1b2017070 100644
--- a/configs/README.txt
+++ b/configs/README.txt
@@ -392,6 +392,11 @@ configs/ntosd-dm320
   STATUS: This port is code complete, verified, and included in the
   NuttX 0.2.1 release.
 
+configs/nucleo-144
+  STMicro Nucleo-144 development board featuring the STM32F746ZGT6U MCU. The
+  STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash memory
+  and 300Kb SRAM.
+
 configs/nucleo-f4x1re
   STMicro ST Nucleo F401RE and F411RE boards.  See
   http://mbed.org/platforms/ST-Nucleo-F401RE and

From 7887b2d1642606bbc4b4453321d2777cdc05bf48 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 12 May 2016 12:23:07 -0600
Subject: [PATCH 22/33] i.MX6: Add SRC register definition header file

---
 arch/arm/src/imx6/chip/imx_src.h | 211 +++++++++++++++++++++++++++++++
 1 file changed, 211 insertions(+)
 create mode 100644 arch/arm/src/imx6/chip/imx_src.h

diff --git a/arch/arm/src/imx6/chip/imx_src.h b/arch/arm/src/imx6/chip/imx_src.h
new file mode 100644
index 00000000000..fb8e3c0e9a5
--- /dev/null
+++ b/arch/arm/src/imx6/chip/imx_src.h
@@ -0,0 +1,211 @@
+/****************************************************************************************************
+ * arch/arm/src/imx6/imx_src.h
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Reference:
+ *   "i.MX 6Dual/6Quad ApplicationsProcessor Reference Manual," Document Number
+ *   IMX6DQRM, Rev. 3, 07/2015, FreeScale.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_IMX6_CHIP_IMX_SRC_H
+#define __ARCH_ARM_SRC_IMX6_CHIP_IMX_SRC_H
+
+/****************************************************************************************************
+ * Included Files
+ ****************************************************************************************************/
+
+#include <nuttx/config.h>
+#include <chip/imx_memorymap.h>
+
+/****************************************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************************************/
+
+/* SRC Register Offsets *****************************************************************************/
+
+#define IMX_SRC_SCR_OFFSET         0x0000 /* SRC Control Register */
+#define IMX_SRC_SBMR1_OFFSET       0x0004 /* SRC Boot Mode Register 1 */
+#define IMX_SRC_SRSR_OFFSET        0x0008 /* SRC Reset Status Register */
+#define IMX_SRC_SISR_OFFSET        0x0014 /* SRC Interrupt Status Register */
+#define IMX_SRC_SIMR_OFFSET        0x0018 /* SRC Interrupt Mask Register */
+#define IMX_SRC_SBMR2_OFFSET       0x001c /* SRC Boot Mode Register 2 */
+#define IMX_SRC_GPR1_OFFSET        0x0020 /* SRC General Purpose Register 1 */
+#define IMX_SRC_GPR2_OFFSET        0x0024 /* SRC General Purpose Register 2 */
+#define IMX_SRC_GPR3_OFFSET        0x0028 /* SRC General Purpose Register 3 */
+#define IMX_SRC_GPR4_OFFSET        0x002c /* SRC General Purpose Register 4 */
+#define IMX_SRC_GPR5_OFFSET        0x0030 /* SRC General Purpose Register 5 */
+#define IMX_SRC_GPR6_OFFSET        0x0034 /* SRC General Purpose Register 6 */
+#define IMX_SRC_GPR7_OFFSET        0x0038 /* SRC General Purpose Register 7 */
+#define IMX_SRC_GPR8_OFFSET        0x003c /* SRC General Purpose Register 8 */
+#define IMX_SRC_GPR9_OFFSET        0x0040 /* SRC General Purpose Register 9 */
+#define IMX_SRC_GPR10_OFFSET       0x0044 /* SRC General Purpose Register 10 */
+
+/* SRC Register Addresses ***************************************************************************/
+
+#define IMX_SRC_SCR                (IMX_SRC_VBASE+IMX_SRC_SCR_OFFSET)
+#define IMX_SRC_SBMR1              (IMX_SRC_VBASE+IMX_SRC_SBMR1_OFFSET)
+#define IMX_SRC_SRSR               (IMX_SRC_VBASE+IMX_SRC_SRSR_OFFSET)
+#define IMX_SRC_SISR               (IMX_SRC_VBASE+IMX_SRC_SISR_OFFSET)
+#define IMX_SRC_SIMR               (IMX_SRC_VBASE+IMX_SRC_SIMR_OFFSET)
+#define IMX_SRC_SBMR2              (IMX_SRC_VBASE+IMX_SRC_SBMR2_OFFSET)
+#define IMX_SRC_GPR1               (IMX_SRC_VBASE+IMX_SRC_GPR1_OFFSET)
+#define IMX_SRC_GPR2               (IMX_SRC_VBASE+IMX_SRC_GPR2_OFFSET)
+#define IMX_SRC_GPR3               (IMX_SRC_VBASE+IMX_SRC_GPR3_OFFSET)
+#define IMX_SRC_GPR4               (IMX_SRC_VBASE+IMX_SRC_GPR4_OFFSET)
+#define IMX_SRC_GPR5               (IMX_SRC_VBASE+IMX_SRC_GPR5_OFFSET)
+#define IMX_SRC_GPR6               (IMX_SRC_VBASE+IMX_SRC_GPR6_OFFSET)
+#define IMX_SRC_GPR7               (IMX_SRC_VBASE+IMX_SRC_GPR7_OFFSET)
+#define IMX_SRC_GPR8               (IMX_SRC_VBASE+IMX_SRC_GPR8_OFFSET)
+#define IMX_SRC_GPR9               (IMX_SRC_VBASE+IMX_SRC_GPR9_OFFSET)
+#define IMX_SRC_GPR10              (IMX_SRC_VBASE+IMX_SRC_GPR10_OFFSET)
+
+/* SRC Register Bit Definitions *********************************************************************/
+
+/* SRC Control Register: Reset value 0x00000521 */
+#define SRC_SCR_WARM_RESET_ENABLE  (1 << 0)  /* Bit 0:  WARM reset enable bit */
+#define SRC_SCR_SW_GPU_RST         (1 << 1)  /* Bit 1:  Software reset for GPU */
+#define SRC_SCR_SW_VPU_RST         (1 << 2)  /* Bit 2:  Software reset for VPU */
+#define SRC_SCR_SW_IPU1_RST        (1 << 3)  /* Bit 3:  Software reset for IPU1 */
+#define SRC_SCR_SW_OPEN_VG_RST     (1 << 4)  /* Bit 4:  Software reset for open_vg */
+#define SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT  (5) /* Bits 5-6: XTALI cycles before bypassing the MMDC ack */
+#define SRC_SCR_WARM_RST_BYPASS_COUNT_MASK   (3 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT)
+#  define SRC_SCR_WARM_RST_BYPASS_COUNT_NONE (0 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT) /* Counter not used */
+#  define SRC_SCR_WARM_RST_BYPASS_COUNT_16   (1 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT) /* 16 XTALI cycles before WARM to COLD reset */
+#  define SRC_SCR_WARM_RST_BYPASS_COUNT_32   (2 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT) /* 32 XTALI cycles before WARM to COLD reset */
+#  define SRC_SCR_WARM_RST_BYPASS_COUNT_64   (3 << SRC_SCR_WARM_RST_BYPASS_COUNT_SHIFT) /* 64 XTALI cycles before WARM to COLD reset */
+#define SRC_SCR_MASK_WDOG_RST_SHIFT          (7) /* Bits 7-10: Mask wdog_rst_b source */
+#define SRC_SCR_MASK_WDOG_RST_MASK           (15 << SRC_SCR_MASK_WDOG_RST_SHIFT)
+#  define SRC_SCR_MASK_WDOG_RST_MASKED       (15 << SRC_SCR_MASK_WDOG_RST_SHIFT) /* wdog_rst_b is masked */
+#  define SRC_SCR_MASK_WDOG_RST_UNMASKED     (15 << SRC_SCR_MASK_WDOG_RST_SHIFT) /* wdog_rst_b is not masked */
+#define SRC_SCR_EIM_RST            (1 << 11) /* Bit 11: EIM reset is needed in order to reconfigure the eim chip select */
+#define SRC_SCR_SW_IPU2_RST        (1 << 12) /* Bit 12: Software reset for ipu2 */
+#define SRC_SCR_CORE0_RST          (1 << 13) /* Bit 13: Software reset for core0 */
+#define SRC_SCR_CORE1_RST          (1 << 14) /* Bit 14: Software reset for core1 */
+#define SRC_SCR_CORE2_RST          (1 << 15) /* Bit 15: Software reset for core2 */
+#define SRC_SCR_CORE3_RST          (1 << 16) /* Bit 16: Software reset for core3 */
+#define SRC_SCR_CORE0_DBG_RST      (1 << 17) /* Bit 17: Software reset for core0 debug */
+#define SRC_SCR_CORE1_DBG_RST      (1 << 18) /* Bit 18: Software reset for core1 debug */
+#define SRC_SCR_CORE2_DBG_RST      (1 << 19) /* Bit 19: Software reset for core2 debug */
+#define SRC_SCR_CORE3_DBG_RST      (1 << 20) /* Bit 20: Software reset for core3 debug */
+#define SRC_SCR_CORES_DBG_RST      (1 << 21) /* Bit 21: Software reset for debug of arm platform */
+#define SRC_SCR_CORE1_ENABLE       (1 << 22) /* Bit 22: core1 enable */
+#define SRC_SCR_CORE2_ENABLE       (1 << 23) /* Bit 23: core2 enable */
+#define SRC_SCR_CORE3_ENABLE       (1 << 24) /* Bit 24: core3 enable */
+#define SRC_SCR_DBG_RST_MSK_PG     (1 << 25) /* Bit 25: No debug resets after core power gating event */
+                                             /* Bits 26-31: Reserved */
+
+/* SRC Boot Mode Register 1 */
+
+#define SRC_SBMR1_BOOT_CFG1_SHIFT  (0)       /* Bits 0-7: Refer to fusemap */
+#define SRC_SBMR1_BOOT_CFG1_MASK   (0xff << SRC_SBMR1_BOOT_CFG1_SHIFT)
+#  define SRC_SBMR1_BOOT_CFG1(n)   ((uint32_t)(n) << SRC_SBMR1_BOOT_CFG1_SHIFT)
+#define SRC_SBMR1_BOOT_CFG2_SHIFT  (8)       /* Bits 8-15: Refer to fusemap */
+#define SRC_SBMR1_BOOT_CFG2_MASK   (0xff << SRC_SBMR1_BOOT_CFG2_SHIFT)
+#  define SRC_SBMR1_BOOT_CFG2(n)   ((uint32_t)(n) << SRC_SBMR1_BOOT_CFG2_SHIFT)
+#define SRC_SBMR1_BOOT_CFG3_SHIFT  (16)      /* Bits 16-23: Refer to fusemap */
+#define SRC_SBMR1_BOOT_CFG3_MASK   (0xff << SRC_SBMR1_BOOT_CFG3_SHIFT)
+#  define SRC_SBMR1_BOOT_CFG3(n)   ((uint32_t)(n) << SRC_SBMR1_BOOT_CFG3_SHIFT)
+#define SRC_SBMR1_BOOT_CFG4_SHIFT  (24)      /* Bits 24-31: Refer to fusemap */
+#define SRC_SBMR1_BOOT_CFG4_MASK   (0xff << SRC_SBMR1_BOOT_CFG4_SHIFT)
+#  define SRC_SBMR1_BOOT_CFG4(n)   ((uint32_t)(n) << SRC_SBMR1_BOOT_CFG4_SHIFT)
+
+/* SRC Reset Status Register */
+
+#define SRC_SRSR_IPP_RESET         (1 << 0)  /* Bit 0:  Reset result of ipp_reset_b pin (Power-up sequence) */
+                                             /* Bit 1:  Reserved */
+#define SRC_SRSR_CSU_RESET         (1 << 2)  /* Bit 2:  Reset result of the csu_reset_b input */
+#define SRC_SRSR_IPP_USER_RESET    (1 << 3)  /* Bit 3:  Reset result of ipp_user_reset_b qualified reset */
+#define SRC_SRSR_WDOG_RST          (1 << 4)  /* Bit 4:  IC Watchdog Time-out reset */
+#define SRC_SRSR_JTAG_RST          (1 << 5)  /* Bit 5:  HIGH - Z JTAG reset */
+#define SRC_SRSR_JTAG_SW_RST       (1 << 6)  /* Bit 6:  JTAG software reset */
+                                             /* Bits 7-15: Reserved */
+#define SRC_SRSR_WARM_BOOT         (1 << 16) /* Bit 16: WARM boot indication shows that WARM boot was initiated by software */
+                                             /* Bits 17-31: Reserved */
+
+/* SRC Interrupt Status Register */
+
+#define SRC_SISR_GPU_PASSED_RESET      (1 << 0)  /* Bit 0:  GPU passed software reset and is ready */
+#define SRC_SISR_VPU_PASSED_RESET      (1 << 1)  /* Bit 1:  VPU passed software reset and is ready */
+#define SRC_SISR_IPU1_PASSED_RESET     (1 << 2)  /* Bit 2:  ipu passed software reset and is ready */
+#define SRC_SISR_OPEN_VG_PASSED_RESET  (1 << 3)  /* Bit 3:  open_vg passed software reset and is ready */
+#define SRC_SISR_IPU2_PASSED_RESET     (1 << 4)  /* Bit 4:  ipu2 passed software reset and is ready */
+#define SRC_SISR_CORE0_WDOG_RST_REQ    (1 << 5)  /* Bit 5:  WDOG reset request from core0 */
+#define SRC_SISR_CORE1_WDOG_RST_REQ    (1 << 6)  /* Bit 6:  WDOG reset request from core1 */
+#define SRC_SISR_CORE2_WDOG_RST_REQ    (1 << 7)  /* Bit 7:  WDOG reset request from core2 */
+#define SRC_SISR_CORE3_WDOG_RST_REQ    (1 << 8)  /* Bit 8:  WDOG reset request from core3 */
+                                                 /* Bits 9-31: Reserved */
+
+/* SRC Interrupt Mask Register */
+#define SRC_SIMR_
+
+#define SRC_SIMR_GPU_PASSED_RESET      (1 << 0)  /* Bit 0:  Mask GPU passed software reset interrupt */
+#define SRC_SIMR_VPU_PASSED_RESET      (1 << 1)  /* Bit 1:  Mask VPU passed software reset interrupt */
+#define SRC_SIMR_IPU1_PASSED_RESET     (1 << 2)  /* Bit 2:  Mask ipu passed software reset interrupt */
+#define SRC_SIMR_OPEN_VG_PASSED_RESET  (1 << 3)  /* Bit 3:  Mask open_vg passed software reset interrupt */
+#define SRC_SIMR_IPU2_PASSED_RESET     (1 << 4)  /* Bit 4:  Mask ipu2 passed software reset interrupt */
+                                                 /* Bits 5-31: Reserved */
+
+/* SRC Boot Mode Register 2 */
+
+#define SRC_SBMR2_SEC_CONFIG_SHIFT (0)       /* Bits 0-1: State of the SECONFIG fuses */
+                                             /* Bit 2: Reserved */
+#define SRC_SBMR2_DIR_BT_DIS       (1 << 3)  /* Bit 3:  State of the DIR_BT_DIS fuse */
+#define SRC_SBMR2_BT_FUSE_SEL      (1 << 4)  /* Bit 4: State of the BT_FUSE_SEL fuse */
+                                             /* Bits 5-23: Reserved */
+#define SRC_SBMR2_BMOD_SHIFT       (24)      /* Bits 24-25: Latched state of the BOOT_MODE1 and BOOT_MODE0 */
+#define SRC_SBMR2_BMOD_MASK        (3 << SRC_SBMR2_BMOD_SHIFT)
+                                             /* Bits 26-31: Reserved */
+
+/* SRC General Purpose Register 1:  32-bit PERSISTENT_ENTRY0: core0 entry function for waking-up from low power mode */
+/* SRC General Purpose Register 2:  32-bit PERSISTENT_ARG0:  core0 entry function argument */
+/* SRC General Purpose Register 3:  32-bit PERSISTENT_ENTRY1: core1 entry function for waking-up from low power mode */
+/* SRC General Purpose Register 4:  32-bit PERSISTENT_ARG1:  core1 entry function argument */
+/* SRC General Purpose Register 5:  32-bit PERSISTENT_ENTRY2: core2 entry function for waking-up from low power mode */
+/* SRC General Purpose Register 6:  32-bit PERSISTENT_ARG2:  core1 entry function argument */
+/* SRC General Purpose Register 7:  32-bit PERSISTENT_ENTRY3: core3 entry function for waking-up from low power mode */
+/* SRC General Purpose Register 8:  32-bit PERSISTENT_ARG3:  core1 entry function argument */
+/* SRC General Purpose Register 9:  Reserved */
+
+/* SRC General Purpose Register 10 */
+
+#define SRC_GPR10_RW1_SHIFT          (0)  /* Bits 0-24: General purpose R/W bits */
+#define SRC_GPR10_RW1_MASK           (0x01ffffff << SRC_GPR10_RW1_SHIFT)
+#  define SRC_GPR10_RW1(n)           ((uint32_t)(n) << SRC_GPR10_RW1_SHIFT)
+#define SRC_GPR10_CORE1_ERROR_STATUS (1 << 25) /* Bit 25: core1 error status bit */
+#define SRC_GPR10_CORE2_ERROR_STATUS (1 << 26) /* Bit 26: core2 error status bit */
+#define SRC_GPR10_CORE3_ERROR_STATUS (1 << 27) /* Bit 27: core3 error status bit */
+#define SRC_GPR10_RW2_SHIFT          (28)  /* Bits 28-31: General purpose R/W bits */
+#define SRC_GPR10_RW2_MASK           (15 << SRC_GPR10_RW2_SHIFT)
+#  define SRC_GPR10_RW2(n)           ((uint32_t)(n) << SRC_GPR10_RW2_SHIFT)
+
+#endif /* __ARCH_ARM_SRC_IMX6_CHIP_IMX_SRC_H */

From 365df152c57d21ffca5d775dc45b32c907bbb5ff Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 12 May 2016 12:26:56 -0600
Subject: [PATCH 23/33] Remove TABs and while space from end of line in README
 file

---
 configs/nucleo-144/README.txt | 100 +++++++++++++++++-----------------
 1 file changed, 50 insertions(+), 50 deletions(-)

diff --git a/configs/nucleo-144/README.txt b/configs/nucleo-144/README.txt
index 0eca17d5829..b826f78680e 100644
--- a/configs/nucleo-144/README.txt
+++ b/configs/nucleo-144/README.txt
@@ -5,7 +5,7 @@ This README discusses issues unique to NuttX configurations for the ST
 Nucleo F746ZG board from ST Micro.  See
 
 http://www.st.com/web/catalog/tools/FM116/CL1620/SC959/SS1532/LN1847/PF261636
-  
+
 The Nucleo F746ZG order part number is NUCLEO-F746ZG. It is clumped together
 under the STM32 Nucleo-144 board family. This does provide uniformity in the
 documentation from ST and should allow us to quickly change configurations
@@ -25,28 +25,28 @@ NUCLEO-F746ZG:
                   216 MHz, MPU, and DSP instructions.
   Memory:         1024 KB Flash 320KB of SRAM (including 64KB of data TCM RAM)
                   + 16KB of instruction TCM RAM + 4KB of backup SRAM
-  ADC:            3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in 
+  ADC:            3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in
                   triple interleaved mode
   DMA:            16-stream DMA controllers with FIFOs and burst support
   Timers:         Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower),
                   two 32-bit timers, 2x watchdogs, SysTick
   GPIO:           114 I/O ports with interrupt capability
-  LCD:            LCD-TFT Controllerwith (DMA2D), Parallel interface 
+  LCD:            LCD-TFT Controllerwith (DMA2D), Parallel interface
   I2C:            4 × I2C interfaces (SMBus/PMBus)
   U[S]ARTs:       4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA,
                   modem control)
-  SPI/12Ss:       6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S 
-                  for audio class accuracy via internal audio PLL or external 
+  SPI/12Ss:       6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S
+                  for audio class accuracy via internal audio PLL or external
                   clock
   QSPI:           Dual mode Quad-SPI
   SAIs:           2 Serial Audio Interfaces
   CAN:             2 X CAN interface
   SDMMC interface
   SPDIFRX interface
-  USB:            USB 2.0 full-speed device/host/OTG controller with on-chip 
+  USB:            USB 2.0 full-speed device/host/OTG controller with on-chip
                   PHY
-  10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, 
-  				   MII/RMII
+  10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware,
+                     MII/RMII
   Camera Interface: 8/14 Bit
   CRC calculation unit
   TRG:            True random number generator
@@ -54,12 +54,12 @@ NUCLEO-F746ZG:
 
 Board features:
 
-  Peripherals:    8 leds, 2 push button (3 LEDs, 1 button) under software 
+  Peripherals:    8 leds, 2 push button (3 LEDs, 1 button) under software
                   control
-  Debug:          STLINK/V2-1 debugger/programmer Uses a STM32F103CB to 
+  Debug:          STLINK/V2-1 debugger/programmer Uses a STM32F103CB to
                   provide a ST-Link for programming, debug similar to the
-                  OpenOcd FTDI function - USB to JTAG front-end. 
-                  
+                  OpenOcd FTDI function - USB to JTAG front-end.
+
   Expansion I/F   ST Zio  an Extended Ardino and Morpho Headers
 
 See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG  form additional information about this board.
@@ -85,11 +85,11 @@ Development Environment
 
   All testing has been conducted using the GNU toolchain from ARM for Linux.
   found here https://launchpad.net/gcc-arm-embedded/4.9/4.9-2015-q3-update/+download/gcc-arm-none-eabi-4_9-2015q3-20150921-linux.tar.bz2
-  
+
   If you change the default toolchain, then you may also have to modify the PATH in
   the setenv.h file if your make cannot find the tools.
 
-  
+
 IDEs
 ====
 
@@ -117,25 +117,25 @@ Basic configuration & build steps
    - Refreshes the .config file with the latest features addes sice this writting
      $ make oldconfig
    - Select the features you want in the build.
-	 $ make menuconfig
-   - Builds Nuttx with the features you selected.	 
-	 $ make
+     $ make menuconfig
+   - Builds Nuttx with the features you selected.
+     $ make
 
 Hardware
 ========
 
   GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out
   on the Nucleo F746ZG
-  
+
   See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic
   pinouts.
-  
+
   Keep in mind that:
    1) The I/O is 3.3 Volt not 5 Volt like on the Arduino products.
    2) The Nucleo-144 board family has 3 pages of Solder Bridges AKA Solder
       Blobs (SB) that can alter the factory configuration. We will note SB
       in effect but will assume the facitory defualt settings.
-  
+
   Our main concern is establishing a console and LED utilization for
   debugging. Because so many pins can be multiplexed with so many functions,
   the above mentioned graphic is super helpful in indentifying a serial port
@@ -145,10 +145,10 @@ Hardware
   or choose a completely different U[S]ART to use as the console.
   In that Case, You will need to edit the include/board.h to select different
   U[S]ART and / or pin selections.
-  
 
-  Serial 
-  ----
+
+  Serial
+  ------
 
   SERIAL_RX         PE_0
   SERIAL_TX         PE_1
@@ -156,12 +156,12 @@ Hardware
   Buttons
   -------
   B1 USER: the user button is connected to the I/O PC13 (Tamper support, SB173
-           ON and SB180 OFF)  
+           ON and SB180 OFF)
 
   LEDs
   ----
   The Board provides a 3 user LEDs, LD1-LD3
-  LED1 (Green)      PB_0  (SB120 ON and SB119 OFF) 
+  LED1 (Green)      PB_0  (SB120 ON and SB119 OFF)
   LED2 (Blue)       PB_7  (SB139 ON)
   LED3 (Red)        PB_14 (SP118 ON)
 
@@ -176,33 +176,33 @@ Hardware
     SYMBOL                Meaning    RED  GREEN BLUE
     -------------------  -----------------------  -----------
 
-	LED_STARTED             0        OFF  OFF   OFF 
-	LED_HEAPALLOCATE        0        OFF  OFF   OFF 
-	LED_IRQSENABLED         0        OFF  OFF   OFF 
-	LED_STACKCREATED        1        OFF  ON    OFF 
-	LED_INIRQ               2        NC   NC    ON  (momentary)
-	LED_SIGNAL              2        NC   NC    ON  (momentary)
-	LED_ASSERTION           3        ON   NC    NC  (momentary)
-	LED_PANIC               4        ON   OFF   OFF (flashing 2Hz)
+    LED_STARTED             0        OFF  OFF   OFF
+    LED_HEAPALLOCATE        0        OFF  OFF   OFF
+    LED_IRQSENABLED         0        OFF  OFF   OFF
+    LED_STACKCREATED        1        OFF  ON    OFF
+    LED_INIRQ               2        NC   NC    ON  (momentary)
+    LED_SIGNAL              2        NC   NC    ON  (momentary)
+    LED_ASSERTION           3        ON   NC    NC  (momentary)
+    LED_PANIC               4        ON   OFF   OFF (flashing 2Hz)
 
 OFF - means that the OS is still initializing. Initialization is very fast so
     if you see this at all, it probably means that the system is hanging up
     somewhere in the initialization phases.
 
 GREEN - This means that the OS completed initialization.
- 
+
 BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is
    illuminated and extinguished when the interrupt or signal handler exits.
- 
+
 RED - If a recovered assertion occurs, the RED LED will be illuminated
    briefly while the assertion is handled.  You will probably never see this.
- 
-Flashing RED - In the event of a fatal crash, all other LEDs will be 
-extinguished and RED LED will FLASH at a 2Hz rate.
- 
 
-  Thus if the GREEN LED is lit, NuttX has successfully booted and is, 
-  apparently, running normally.  If the RED LED is flashing at 
+Flashing RED - In the event of a fatal crash, all other LEDs will be
+extinguished and RED LED will FLASH at a 2Hz rate.
+
+
+  Thus if the GREEN LED is lit, NuttX has successfully booted and is,
+  apparently, running normally.  If the RED LED is flashing at
   approximately 2Hz, then a fatal error has been detected and the system has
   halted.
 
@@ -214,19 +214,19 @@ Serial Consoles
   Pins and Connectors:
          GPIO  Connector NAME
     RXD: PE0   CN11 pin 64, PE0
-    		   CN10 pin 33, D34
+               CN10 pin 33, D34
 
     TXD: PE1   CN11 pin 61, PE1
 
   You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL
 
-    Nucleo 144           FTDI TTL-232R-3V3 
+    Nucleo 144           FTDI TTL-232R-3V3
     -----------         ------------
     TXD - CN11 pin 64 - RXD - Pin 5 (Yellow)
     RXD - CN11 pin 61 - TXD - Pin 4 (Orange)
     GND   CN11 pin 63   GND   Pin 1  (Black)
 
-	*Note you will be reverse RX/TX
+    *Note you will be reverse RX/TX
 
   Use make menuconfig to configure USART8 as the console:
 
@@ -248,8 +248,8 @@ Serial Consoles
 
   Solder Bridges.  This configuration requires:
 
-	PD8 USART3 TX SB5 ON and SB7 OFF (Default)
-	PD9 USART3 RX SB6 ON and SB4 OFF (Default)
+    PD8 USART3 TX SB5 ON and SB7 OFF (Default)
+    PD9 USART3 RX SB6 ON and SB4 OFF (Default)
 
   Configuring USART3 is the same as given above but add the S and #3.
 
@@ -280,9 +280,9 @@ Configurations
        a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
           see additional README.txt files in the NuttX tools repository.
 
-       b. If this is the intall configuration then Execute 
-       	  'cd tools && ./configure.sh stm32f746g-disco/nsh && cd ..'
-          in nuttx/ in order to start configuration process. 
+       b. If this is the intall configuration then Execute
+             'cd tools && ./configure.sh stm32f746g-disco/nsh && cd ..'
+          in nuttx/ in order to start configuration process.
           Caution: Doing this step more than once will overwrite .config with
           the contents of the stm32f746g-disco/nsh/defconfig file.
 
@@ -291,7 +291,7 @@ Configurations
 
        d. Execute 'make menuconfig' in nuttx/ in order to start the
           reconfiguration process.
-          
+
        e. Save the .config file to reuse it in the future starting at step d.
 
     2. By default, this configuration uses the ARM GNU toolchain

From 8a4e185c84fc8a1918afbaafec3c9cd714caefca Mon Sep 17 00:00:00 2001
From: David Sidrane <david_s5@nscdg.com>
Date: Thu, 12 May 2016 18:50:43 +0000
Subject: [PATCH 24/33] Kconfig edited online with Bitbucket

---
 arch/arm/src/samv7/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig
index 1f9941e3154..5a68712427d 100644
--- a/arch/arm/src/samv7/Kconfig
+++ b/arch/arm/src/samv7/Kconfig
@@ -26,7 +26,7 @@ config ARCH_CHIP_SAME70Q21
 	select ARCH_CHIP_SAME70Q
 
 config ARCH_CHIP_SAME70N19
-	bool "SAME70N10"
+	bool "SAME70N19"
 	select ARCH_CHIP_SAME70N
 
 config ARCH_CHIP_SAME70N20

From ba4ae6fdc4d2286b88864b4105622fc97c7af060 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 12 May 2016 13:14:48 -0600
Subject: [PATCH 25/33] Cosmetic fixes to last commit

---
 arch/arm/src/imx6/chip/imx_src.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/src/imx6/chip/imx_src.h b/arch/arm/src/imx6/chip/imx_src.h
index fb8e3c0e9a5..b49a9b44254 100644
--- a/arch/arm/src/imx6/chip/imx_src.h
+++ b/arch/arm/src/imx6/chip/imx_src.h
@@ -92,6 +92,7 @@
 /* SRC Register Bit Definitions *********************************************************************/
 
 /* SRC Control Register: Reset value 0x00000521 */
+
 #define SRC_SCR_WARM_RESET_ENABLE  (1 << 0)  /* Bit 0:  WARM reset enable bit */
 #define SRC_SCR_SW_GPU_RST         (1 << 1)  /* Bit 1:  Software reset for GPU */
 #define SRC_SCR_SW_VPU_RST         (1 << 2)  /* Bit 2:  Software reset for VPU */
@@ -193,18 +194,18 @@
 /* SRC General Purpose Register 5:  32-bit PERSISTENT_ENTRY2: core2 entry function for waking-up from low power mode */
 /* SRC General Purpose Register 6:  32-bit PERSISTENT_ARG2:  core1 entry function argument */
 /* SRC General Purpose Register 7:  32-bit PERSISTENT_ENTRY3: core3 entry function for waking-up from low power mode */
-/* SRC General Purpose Register 8:  32-bit PERSISTENT_ARG3:  core1 entry function argument */
+/* SRC General Purpose Register 8:  32-bit PERSISTENT_ARG3:  core3 entry function argument */
 /* SRC General Purpose Register 9:  Reserved */
 
 /* SRC General Purpose Register 10 */
 
-#define SRC_GPR10_RW1_SHIFT          (0)  /* Bits 0-24: General purpose R/W bits */
+#define SRC_GPR10_RW1_SHIFT          (0)       /* Bits 0-24: General purpose R/W bits */
 #define SRC_GPR10_RW1_MASK           (0x01ffffff << SRC_GPR10_RW1_SHIFT)
 #  define SRC_GPR10_RW1(n)           ((uint32_t)(n) << SRC_GPR10_RW1_SHIFT)
 #define SRC_GPR10_CORE1_ERROR_STATUS (1 << 25) /* Bit 25: core1 error status bit */
 #define SRC_GPR10_CORE2_ERROR_STATUS (1 << 26) /* Bit 26: core2 error status bit */
 #define SRC_GPR10_CORE3_ERROR_STATUS (1 << 27) /* Bit 27: core3 error status bit */
-#define SRC_GPR10_RW2_SHIFT          (28)  /* Bits 28-31: General purpose R/W bits */
+#define SRC_GPR10_RW2_SHIFT          (28)      /* Bits 28-31: General purpose R/W bits */
 #define SRC_GPR10_RW2_MASK           (15 << SRC_GPR10_RW2_SHIFT)
 #  define SRC_GPR10_RW2(n)           ((uint32_t)(n) << SRC_GPR10_RW2_SHIFT)
 

From 99e695398cf78ccb07d46db48d49166100453a7b Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 12 May 2016 13:42:19 -0600
Subject: [PATCH 26/33] Rename up_boot to arm_boot

---
 arch/arm/src/a1x/a1x_boot.c                     |  4 ++--
 arch/arm/src/arm/up_head.S                      |  2 +-
 arch/arm/src/arm/up_pginitialize.c              |  2 +-
 arch/arm/src/armv7-a/arm_head.S                 |  8 ++++----
 arch/arm/src/armv7-a/arm_pghead.S               | 12 ++++++------
 arch/arm/src/armv7-a/arm_pginitialize.c         |  2 +-
 arch/arm/src/common/up_internal.h               |  2 +-
 arch/arm/src/dm320/dm320_boot.c                 |  2 +-
 arch/arm/src/imx1/imx_boot.c                    |  2 +-
 arch/arm/src/imx6/imx_boot.c                    |  4 ++--
 arch/arm/src/lpc31xx/lpc31.h                    |  2 +-
 arch/arm/src/lpc31xx/lpc31_boot.c               |  4 ++--
 arch/arm/src/lpc31xx/lpc31_lowputc.c            |  2 +-
 arch/arm/src/sama5/sam_boot.c                   |  4 ++--
 arch/avr/src/common/up_internal.h               |  1 -
 arch/hc/src/common/up_internal.h                |  4 ----
 arch/mips/src/pic32mx/pic32mx.h                 |  2 +-
 arch/sh/src/common/up_internal.h                |  1 -
 arch/x86/src/common/up_internal.h               |  1 -
 configs/ea3131/locked/mklocked.sh               |  6 +++---
 configs/freedom-kl25z/src/kl_boardinitialize.c  |  3 +--
 configs/freedom-kl26z/src/kl_boardinitialize.c  |  2 +-
 configs/mirtoo/README.txt                       |  4 ++--
 configs/mirtoo/src/pic32_boot.c                 |  4 ++--
 configs/nutiny-nuc120/src/nuc_boardinitialize.c |  3 +--
 configs/pcduino-a10/nsh/pcduino-140107.patch    | 10 +++++-----
 configs/stm32ldiscovery/src/stm32_boot.c        |  2 +-
 configs/teensy-lc/src/kl_boardinitialize.c      |  2 +-
 28 files changed, 44 insertions(+), 53 deletions(-)

diff --git a/arch/arm/src/a1x/a1x_boot.c b/arch/arm/src/a1x/a1x_boot.c
index c999ea6ef57..b7ceee33f74 100644
--- a/arch/arm/src/a1x/a1x_boot.c
+++ b/arch/arm/src/a1x/a1x_boot.c
@@ -289,7 +289,7 @@ static void a1x_copyvectorblock(void)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_boot
+ * Name: arm_boot
  *
  * Description:
  *   Complete boot operations started in arm_head.S
@@ -305,7 +305,7 @@ static void a1x_copyvectorblock(void)
  *
  ****************************************************************************/
 
-void up_boot(void)
+void arm_boot(void)
 {
 #ifndef CONFIG_ARCH_ROMPGTABLE
   /* __start provided the basic MMU mappings for SRAM.  Now provide mappings
diff --git a/arch/arm/src/arm/up_head.S b/arch/arm/src/arm/up_head.S
index 296c30656fd..53f94a2e0fa 100644
--- a/arch/arm/src/arm/up_head.S
+++ b/arch/arm/src/arm/up_head.S
@@ -609,7 +609,7 @@ __start:
 
 	/* Perform early C-level, platform-specific initialization */
 
-	bl		up_boot
+	bl		arm_boot
 
 #ifdef CONFIG_STACK_COLORATION
 	/* Write a known value to the IDLE thread stack to support stack
diff --git a/arch/arm/src/arm/up_pginitialize.c b/arch/arm/src/arm/up_pginitialize.c
index 5470f73e354..25cb917809a 100644
--- a/arch/arm/src/arm/up_pginitialize.c
+++ b/arch/arm/src/arm/up_pginitialize.c
@@ -88,7 +88,7 @@ void up_pginitialize(void)
 {
   /* None needed at present.  This file is just retained in case the need
    * arises in the future.  Nothing calls up_pginitialize() now.  If needed,
-   * if should be called early in up_boot.c to assure that all paging is
+   * if should be called early in arm_boot.c to assure that all paging is
    * ready.
    */
 }
diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S
index 5af4f17ddf7..220026da340 100644
--- a/arch/arm/src/armv7-a/arm_head.S
+++ b/arch/arm/src/armv7-a/arm_head.S
@@ -630,18 +630,18 @@ __start:
 #ifndef CONFIG_BOOT_SDRAM_DATA
 	/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
 	 * ready to use.  Other memory, such as SDRAM, must be initialized before
-	 * it can be used.  up_boot() will perform that memory initialization and
-	 * .bss and .data can be initialized after up_boot() returns.
+	 * it can be used.  arm_boot() will perform that memory initialization and
+	 * .bss and .data can be initialized after arm_boot() returns.
 	 */
 
 	bl		arm_data_initialize
 #endif
 
 	/* Perform early C-level, platform-specific initialization.  Logic
-	 * within up_boot() must configure SDRAM and call arm_ram_initailize.
+	 * within arm_boot() must configure SDRAM and call arm_ram_initailize.
 	 */
 
-	bl		up_boot
+	bl		arm_boot
 
 #ifdef CONFIG_STACK_COLORATION
 	/* Write a known value to the IDLE thread stack to support stack
diff --git a/arch/arm/src/armv7-a/arm_pghead.S b/arch/arm/src/armv7-a/arm_pghead.S
index e785360dfec..bc4c99ce26d 100644
--- a/arch/arm/src/armv7-a/arm_pghead.S
+++ b/arch/arm/src/armv7-a/arm_pghead.S
@@ -650,8 +650,8 @@ __start:
 
 	/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
 	 * ready to use.  Other memory, such as SDRAM, must be initialized before
-	 * it can be used.  up_boot() will perform that memory initialization and
-	 * .bss and .data can be initialized after up_boot() returns.
+	 * it can be used.  arm_boot() will perform that memory initialization and
+	 * .bss and .data can be initialized after arm_boot() returns.
 	 */
 
 	/* Set up the stack pointer and clear the frame pointer */
@@ -662,18 +662,18 @@ __start:
 #ifndef CONFIG_BOOT_SDRAM_DATA
 	/* Initialize .bss and .data ONLY if .bss and .data lie in SRAM that is
 	 * ready to use.  Other memory, such as SDRAM, must be initialized before
-	 * it can be used.  up_boot() will perform that memory initialization and
-	 * .bss and .data can be initialized after up_boot() returns.
+	 * it can be used.  arm_boot() will perform that memory initialization and
+	 * .bss and .data can be initialized after arm_boot() returns.
 	 */
 
 	bl		arm_data_initialize
 #endif
 
 	/* Perform early C-level, platform-specific initialization.  Logic
-	 * within up_boot() must configure SDRAM and call arm_ram_initailize.
+	 * within arm_boot() must configure SDRAM and call arm_ram_initailize.
 	 */
 
-	bl		up_boot
+	bl		arm_boot
 
 #ifdef CONFIG_STACK_COLORATION
 	/* Write a known value to the IDLE thread stack to support stack
diff --git a/arch/arm/src/armv7-a/arm_pginitialize.c b/arch/arm/src/armv7-a/arm_pginitialize.c
index f419a28ba4c..94b44449ed2 100644
--- a/arch/arm/src/armv7-a/arm_pginitialize.c
+++ b/arch/arm/src/armv7-a/arm_pginitialize.c
@@ -88,7 +88,7 @@ void up_pginitialize(void)
 {
   /* None needed at present.  This file is just retained in case the need
    * arises in the future.  Nothing calls up_pginitialize() now.  If needed,
-   * if should be called early in up_boot.c to assure that all paging is
+   * if should be called early in arm_boot.c to assure that all paging is
    * ready.
    */
 }
diff --git a/arch/arm/src/common/up_internal.h b/arch/arm/src/common/up_internal.h
index 0e8650c76cd..8dccf8a1ef0 100644
--- a/arch/arm/src/common/up_internal.h
+++ b/arch/arm/src/common/up_internal.h
@@ -331,7 +331,7 @@ EXTERN uint32_t _eramfuncs;       /* Copy destination end address in RAM */
 
 /* Low level initialization provided by board-level logic ******************/
 
-void up_boot(void);
+void arm_boot(void);
 
 /* Context switching */
 
diff --git a/arch/arm/src/dm320/dm320_boot.c b/arch/arm/src/dm320/dm320_boot.c
index 4ba55ac1726..aba87ed2400 100644
--- a/arch/arm/src/dm320/dm320_boot.c
+++ b/arch/arm/src/dm320/dm320_boot.c
@@ -202,7 +202,7 @@ static void up_copyvectorblock(void)
  * Public Functions
  ************************************************************************************/
 
-void up_boot(void)
+void arm_boot(void)
 {
   /* __start provided the basic MMU mappings for SDRAM.  Now provide mappings for all
    * IO regions (Including the vector region).
diff --git a/arch/arm/src/imx1/imx_boot.c b/arch/arm/src/imx1/imx_boot.c
index f28d2cd7ee1..c429a317491 100644
--- a/arch/arm/src/imx1/imx_boot.c
+++ b/arch/arm/src/imx1/imx_boot.c
@@ -195,7 +195,7 @@ static void up_copyvectorblock(void)
  * Public Functions
  ************************************************************************************/
 
-void up_boot(void)
+void arm_boot(void)
 {
   /* __start provided the basic MMU mappings for SDRAM.  Now provide mappings for all
    * IO regions (Including the vector region).
diff --git a/arch/arm/src/imx6/imx_boot.c b/arch/arm/src/imx6/imx_boot.c
index ae3cc1a123b..89fe54cac9a 100644
--- a/arch/arm/src/imx6/imx_boot.c
+++ b/arch/arm/src/imx6/imx_boot.c
@@ -320,7 +320,7 @@ static inline void imx_wdtdisable(void)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_boot
+ * Name: arm_boot
  *
  * Description:
  *   Complete boot operations started in arm_head.S
@@ -386,7 +386,7 @@ static inline void imx_wdtdisable(void)
  *
  ****************************************************************************/
 
-void up_boot(void)
+void arm_boot(void)
 {
 #ifdef CONFIG_ARCH_RAMFUNCS
   const uint32_t *src;
diff --git a/arch/arm/src/lpc31xx/lpc31.h b/arch/arm/src/lpc31xx/lpc31.h
index d16058a35cf..4a342a9a839 100644
--- a/arch/arm/src/lpc31xx/lpc31.h
+++ b/arch/arm/src/lpc31xx/lpc31.h
@@ -154,7 +154,7 @@ static inline void gpio_outputhigh(uint32_t ioconfig, uint32_t bit)
  * Name: lpc31_lowsetup
  *
  * Description:
- *   Called early in up_boot.  Performs chip-common low level initialization.
+ *   Called early in arm_boot.  Performs chip-common low level initialization.
  *
  ************************************************************************************/
 
diff --git a/arch/arm/src/lpc31xx/lpc31_boot.c b/arch/arm/src/lpc31xx/lpc31_boot.c
index 1932b8fee7d..11a3e71302a 100644
--- a/arch/arm/src/lpc31xx/lpc31_boot.c
+++ b/arch/arm/src/lpc31xx/lpc31_boot.c
@@ -333,14 +333,14 @@ static void up_copyvectorblock(void)
  ************************************************************************************/
 
 /************************************************************************************
- * Name: up_boot
+ * Name: arm_boot
  *
  * Description:
  *   Complete boot operations started in up_head.S
  *
  ************************************************************************************/
 
-void up_boot(void)
+void arm_boot(void)
 {
   /* __start provided the basic MMU mappings for SRAM.  Now provide mappings for all
    * IO regions (Including the vector region).
diff --git a/arch/arm/src/lpc31xx/lpc31_lowputc.c b/arch/arm/src/lpc31xx/lpc31_lowputc.c
index 189ad0b9c73..3e3213927f1 100644
--- a/arch/arm/src/lpc31xx/lpc31_lowputc.c
+++ b/arch/arm/src/lpc31xx/lpc31_lowputc.c
@@ -271,7 +271,7 @@ static inline void up_configbaud(void)
  * Name: lpc31_lowsetup
  *
  * Description:
- *   Called early in up_boot.  Performs chip-common low level initialization.
+ *   Called early in arm_boot.  Performs chip-common low level initialization.
  *
  ****************************************************************************/
 
diff --git a/arch/arm/src/sama5/sam_boot.c b/arch/arm/src/sama5/sam_boot.c
index 58cae338248..d2d154613cb 100644
--- a/arch/arm/src/sama5/sam_boot.c
+++ b/arch/arm/src/sama5/sam_boot.c
@@ -338,7 +338,7 @@ static inline void sam_wdtdisable(void)
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_boot
+ * Name: arm_boot
  *
  * Description:
  *   Complete boot operations started in arm_head.S
@@ -407,7 +407,7 @@ static inline void sam_wdtdisable(void)
  *
  ****************************************************************************/
 
-void up_boot(void)
+void arm_boot(void)
 {
 #ifdef CONFIG_ARCH_RAMFUNCS
   const uint32_t *src;
diff --git a/arch/avr/src/common/up_internal.h b/arch/avr/src/common/up_internal.h
index bc6a7ebf257..92a160ee90e 100644
--- a/arch/avr/src/common/up_internal.h
+++ b/arch/avr/src/common/up_internal.h
@@ -134,7 +134,6 @@ extern uint32_t _ebss;            /* End+1 of .bss */
 
 /* Defined in files with the same name as the function */
 
-void up_boot(void);
 void up_irqinitialize(void);
 #ifdef CONFIG_ARCH_DMA
 void weak_function up_dmainitialize(void);
diff --git a/arch/hc/src/common/up_internal.h b/arch/hc/src/common/up_internal.h
index a2d44341551..1650711f3a6 100644
--- a/arch/hc/src/common/up_internal.h
+++ b/arch/hc/src/common/up_internal.h
@@ -157,10 +157,6 @@ extern uint32_t g_intstackbase;
  * Public Functions
  ****************************************************************************/
 
-/* Start-up functions */
-
-void up_boot(void);
-
 /* Context switching functions */
 
 void up_copystate(uint8_t *dest, uint8_t *src);
diff --git a/arch/mips/src/pic32mx/pic32mx.h b/arch/mips/src/pic32mx/pic32mx.h
index ab8e50b491a..d636293703b 100644
--- a/arch/mips/src/pic32mx/pic32mx.h
+++ b/arch/mips/src/pic32mx/pic32mx.h
@@ -234,7 +234,7 @@ void pic32mx_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
  *
  * Description:
  *   This function must be provided by the board-specific logic in the  directory
- *   configs/<board-name>/up_boot.c.
+ *   configs/<board-name>/pic32_boot.c.
  *
  ************************************************************************************/
 
diff --git a/arch/sh/src/common/up_internal.h b/arch/sh/src/common/up_internal.h
index 724efbca93f..5f1a54bb3ef 100644
--- a/arch/sh/src/common/up_internal.h
+++ b/arch/sh/src/common/up_internal.h
@@ -155,7 +155,6 @@ extern uint32_t g_idle_topstack;
 
 /* Defined in files with the same name as the function */
 
-void up_boot(void);
 void up_copystate(uint32_t *dest, uint32_t *src);
 void up_dataabort(uint32_t *regs);
 void up_decodeirq(uint32_t *regs);
diff --git a/arch/x86/src/common/up_internal.h b/arch/x86/src/common/up_internal.h
index db35e68035a..d0eb1570c36 100644
--- a/arch/x86/src/common/up_internal.h
+++ b/arch/x86/src/common/up_internal.h
@@ -192,7 +192,6 @@ void x86_boardinitialize(void);
 
 /* Defined in files with the same name as the function */
 
-void up_boot(void);
 void up_copystate(uint32_t *dest, uint32_t *src);
 void up_savestate(uint32_t *regs);
 void up_decodeirq(uint32_t *regs);
diff --git a/configs/ea3131/locked/mklocked.sh b/configs/ea3131/locked/mklocked.sh
index 29b357ae399..97a126015d9 100755
--- a/configs/ea3131/locked/mklocked.sh
+++ b/configs/ea3131/locked/mklocked.sh
@@ -140,9 +140,9 @@ fi
 # consequence, the 1-time initialization code takes up precious memory
 # in the locked memory region.
 #
-# up_boot is a low-level initialization function called by __start:
+# arm_boot is a low-level initialization function called by __start:
 
-echo "EXTERN(up_boot)" >>ld-locked.inc
+echo "EXTERN(arm_boot)" >>ld-locked.inc
 
 # All of the initialization functions that are called by os_start up to
 # the point where the page fill worker thread is started must also be
@@ -150,7 +150,7 @@ echo "EXTERN(up_boot)" >>ld-locked.inc
 
 answer=$(checkzero CONFIG_TASK_NAME_SIZE)
 if [ "$answer" = n ]; then
-	echo "EXTERN(up_boot)" >>ld-locked.inc
+	echo "EXTERN(arm_boot)" >>ld-locked.inc
 fi
 
 echo "EXTERN(dq_addfirst)" >>ld-locked.inc
diff --git a/configs/freedom-kl25z/src/kl_boardinitialize.c b/configs/freedom-kl25z/src/kl_boardinitialize.c
index a3036bd9075..2ab54047bef 100644
--- a/configs/freedom-kl25z/src/kl_boardinitialize.c
+++ b/configs/freedom-kl25z/src/kl_boardinitialize.c
@@ -1,6 +1,5 @@
 /************************************************************************************
- * configs/freedom-kl25z/src/up_boot.c
- * arch/arm/src/board/up_boot.c
+ * configs/freedom-kl25z/src/kl_boardinitialize.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/configs/freedom-kl26z/src/kl_boardinitialize.c b/configs/freedom-kl26z/src/kl_boardinitialize.c
index 4d80f64591b..004274c6f62 100644
--- a/configs/freedom-kl26z/src/kl_boardinitialize.c
+++ b/configs/freedom-kl26z/src/kl_boardinitialize.c
@@ -1,5 +1,5 @@
 /************************************************************************************
- * configs/freedom-kl26z/src/up_boot.c
+ * configs/freedom-kl26z/src/kl_boardinitialize.c
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/configs/mirtoo/README.txt b/configs/mirtoo/README.txt
index 799d77ccd0d..483e1d50a24 100644
--- a/configs/mirtoo/README.txt
+++ b/configs/mirtoo/README.txt
@@ -530,7 +530,7 @@ UART Usage
 
   When mounted on the DTX1-4000L EV-kit1 board, serial output is avaiable through
   an FT230X device via the FUNC0 and FUNC1 module outputs.  If CONFIG_PIC32MX_UART2
-  is enabled, the src/up_boot will configure the UART2 pins as follows:
+  is enabled, the src/pic32_boot will configure the UART2 pins as follows:
 
     ---------- ------ ----- ------ -------------------------
        BOARD   MODULE  PIN  SIGNAL NOTES
@@ -542,7 +542,7 @@ UART Usage
   for UART2 if you are also debugging with the ICD3.  In that case, you may need
   to switch to UART1.
 
-  If CONFIG_PIC32MX_UART1 is enabled, the src/up_boot will configure the UART
+  If CONFIG_PIC32MX_UART1 is enabled, the src/pic32_boot will configure the UART
   pins as follows.  This will support communictions (via an external RS-232
   driver) through X3 pins 4 and 5:
 
diff --git a/configs/mirtoo/src/pic32_boot.c b/configs/mirtoo/src/pic32_boot.c
index 221377fd5ac..01d7b57a4b0 100644
--- a/configs/mirtoo/src/pic32_boot.c
+++ b/configs/mirtoo/src/pic32_boot.c
@@ -70,7 +70,7 @@
  * Description:
  *   When mounted on the DTX1-4000L EV-kit1 board, serial output is avaiable through
  *   an FT230X device via the FUNC0 and FUNC1 module outputs.  If CONFIG_PIC32MX_UART2
- *   is enabled, the src/up_boot will configure the UART2 pins as follows.
+ *   is enabled, the src/pic32_boot will configure the UART2 pins as follows.
  *
  *   ---------- ------ ----- ------ -------------------------
  *      BOARD   OUTPUT  PIN  SIGNAL NOTES
@@ -78,7 +78,7 @@
  *   FT230X RXD  FUNC0 RPB11  U2RX  UART2 RX (Also PGEC2)
  *   FT230X TXD  FUNC1 RPB10  U2TX  UART2 TX (Also PGED2)
  *
- *   If CONFIG_PIC32MX_UART1 is enabled, the src/up_boot will configure the UART
+ *   If CONFIG_PIC32MX_UART1 is enabled, the src/pic32_boot will configure the UART
  *   pins as follows.  This will support communictions (via an external RS-232
  *   driver) through X3 pins 4 and 5:
  *
diff --git a/configs/nutiny-nuc120/src/nuc_boardinitialize.c b/configs/nutiny-nuc120/src/nuc_boardinitialize.c
index ef4ec1a7e84..add4e9290f6 100644
--- a/configs/nutiny-nuc120/src/nuc_boardinitialize.c
+++ b/configs/nutiny-nuc120/src/nuc_boardinitialize.c
@@ -1,6 +1,5 @@
 /************************************************************************************
- * configs/nutiny-nuc120/src/up_boot.c
- * arch/arm/src/board/up_boot.c
+ * configs/nutiny-nuc120/src/nuc_boardinitialize.c
  *
  *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/configs/pcduino-a10/nsh/pcduino-140107.patch b/configs/pcduino-a10/nsh/pcduino-140107.patch
index 50d4a0aca1a..1d0b6651844 100644
--- a/configs/pcduino-a10/nsh/pcduino-140107.patch
+++ b/configs/pcduino-a10/nsh/pcduino-140107.patch
@@ -2,7 +2,7 @@ diff --git a/nuttx/arch/arm/src/a1x/a1x_boot.c b/nuttx/arch/arm/src/a1x/a1x_boot
 index 3cc6323..ad42790 100644
 --- a/nuttx/arch/arm/src/a1x/a1x_boot.c
 +++ b/nuttx/arch/arm/src/a1x/a1x_boot.c
-@@ -312,12 +312,14 @@ void up_boot(void)
+@@ -312,12 +312,14 @@ void arm_boot(void)
     * for all IO regions (Including the vector region).
     */
  
@@ -17,7 +17,7 @@ index 3cc6323..ad42790 100644
    a1x_vectormapping();
  
  #endif /* CONFIG_ARCH_ROMPGTABLE */
-@@ -326,16 +328,19 @@ void up_boot(void)
+@@ -326,16 +328,19 @@ void arm_boot(void)
     * arm_vector.S
     */
  
@@ -37,7 +37,7 @@ index 3cc6323..ad42790 100644
    a1x_lowsetup();
  
    /* Perform early serial initialization if we are going to use the serial
-@@ -343,6 +348,7 @@ void up_boot(void)
+@@ -343,6 +348,7 @@ void arm_boot(void)
     */
  
  #ifdef USE_EARLYSERIALINIT
@@ -45,7 +45,7 @@ index 3cc6323..ad42790 100644
    up_earlyserialinit();
  #endif
  
-@@ -353,6 +359,7 @@ void up_boot(void)
+@@ -353,6 +359,7 @@ void arm_boot(void)
     */
  
  #ifdef CONFIG_BUILD_PROTECTED
@@ -53,7 +53,7 @@ index 3cc6323..ad42790 100644
    a1x_userspace();
  #endif
  
-@@ -362,5 +369,7 @@ void up_boot(void)
+@@ -362,5 +369,7 @@ void arm_boot(void)
     * - Configuration of board specific resources (PIOs, LEDs, etc).
     */
  
diff --git a/configs/stm32ldiscovery/src/stm32_boot.c b/configs/stm32ldiscovery/src/stm32_boot.c
index 375d9de3297..df34cb340a2 100644
--- a/configs/stm32ldiscovery/src/stm32_boot.c
+++ b/configs/stm32ldiscovery/src/stm32_boot.c
@@ -1,5 +1,5 @@
 /************************************************************************************
- * configs/stm32ldiscovery/src/up_boot.c
+ * configs/stm32ldiscovery/src/stm32_boot.c
  *
  *   Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
diff --git a/configs/teensy-lc/src/kl_boardinitialize.c b/configs/teensy-lc/src/kl_boardinitialize.c
index c99ef366731..119a2d4ca6c 100644
--- a/configs/teensy-lc/src/kl_boardinitialize.c
+++ b/configs/teensy-lc/src/kl_boardinitialize.c
@@ -1,5 +1,5 @@
 /************************************************************************************
- * configs/teensy-lc/src/up_boot.c
+ * configs/teensy-lc/src/kl_boardinitialize.c
  *
  *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>

From 70782b0f14cc763a25d002084c729a1b7e5c3e14 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 12 May 2016 15:04:46 -0600
Subject: [PATCH 27/33] ARMv7-A i.MX6: More SMP logic.  Still untested.

---
 Documentation/NuttxPortingGuide.html          |  36 +--
 .../src/{imx6/imx_cpuinit.c => armv7-a/smp.h} |  74 +++--
 arch/arm/src/imx6/Make.defs                   |   2 +-
 arch/arm/src/imx6/imx_boot.c                  |  15 +
 arch/arm/src/imx6/imx_boot.h                  |  57 +++-
 arch/arm/src/imx6/imx_cpuboot.c               | 265 ++++++++++++++++++
 arch/sim/src/up_smphook.c                     |  23 --
 include/nuttx/arch.h                          |  22 --
 sched/init/os_smpstart.c                      |   6 -
 9 files changed, 381 insertions(+), 119 deletions(-)
 rename arch/arm/src/{imx6/imx_cpuinit.c => armv7-a/smp.h} (59%)
 create mode 100644 arch/arm/src/imx6/imx_cpuboot.c

diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html
index d935ad37a15..e44d380fc04 100644
--- a/Documentation/NuttxPortingGuide.html
+++ b/Documentation/NuttxPortingGuide.html
@@ -154,9 +154,8 @@
       <a href="#uptestset">4.7.1 <code>up_testset()</code></a><br>
       <a href="#upcpuindex">4.7.2 <code>up_cpu_index()</code></a><br>
       <a href="#upcpustart">4.7.3 <code>up_cpu_start()</code></a><br>
-      <a href="#upcpuinitialize">4.7.4 <code>up_cpu_initialize()</code></a><br>
-      <a href="#upcpupause">4.7.5 <code>up_cpu_pause()</code></a><br>
-      <a href="#upcpuresume">4.7.6 <code>up_cpu_resume()</code></a>
+      <a href="#upcpupause">4.7.4 <code>up_cpu_pause()</code></a><br>
+      <a href="#upcpuresume">4.7.5 <code>up_cpu_resume()</code></a>
     </ul>
     <a href="#exports">4.8 APIs Exported by NuttX to Architecture-Specific Logic</a>
     <ul>
@@ -3722,34 +3721,7 @@ int up_cpu_start(int cpu);
   </p>
 </ul>
 
-<h3><a name="upcpuinitialize">4.7.4 <code>up_cpu_initialize()</code></a></h3>
-<p><b>Function Prototype</b>:<p>
-<ul><pre>
-#include &lt;nuttx/arch.h&gt;
-#ifdef CONFIG_SMP
-int up_cpu_initialize(void);
-#endif
-</pre></ul>
-
-<p><b>Description</b>:</p>
-<ul>
-  <p>
-    After the CPU has been started (via <code>up_cpu_start()</code>) the system will call back into the architecture-specific code with this function on the thread of execution of the newly started CPU.
-    This gives the architecture-specific a chance to perform ny initial, CPU-specific initialize on that thread.
-  </p>
-</ul>
-<p><b>Input Parameters</b>:</p>
-<ul>
-  None
-</ul>
-<p><b>Returned Value</b>:</p>
-<ul>
-  <p>
-    Zero (<code>OK</code>) is returned on success; a negated <code>errno</code> value on failure.
-  </p>
-</ul>
-
-<h3><a name="upcpupause">4.7.5 <code>up_cpu_pause()</code></a></h3>
+<h3><a name="upcpupause">4.7.4 <code>up_cpu_pause()</code></a></h3>
 <p><b>Function Prototype</b>:<p>
 <ul><pre>
 #include &lt;nuttx/arch.h&gt;
@@ -3781,7 +3753,7 @@ int up_cpu_pause(int cpu);
   </p>
 </ul>
 
-<h3><a name="upcpuresume">4.7.6 <code>up_cpu_resume()</code></a></h3>
+<h3><a name="upcpuresume">4.7.5 <code>up_cpu_resume()</code></a></h3>
 <p><b>Function Prototype</b>:<p>
 <ul><pre>
 #include &lt;nuttx/arch.h&gt;
diff --git a/arch/arm/src/imx6/imx_cpuinit.c b/arch/arm/src/armv7-a/smp.h
similarity index 59%
rename from arch/arm/src/imx6/imx_cpuinit.c
rename to arch/arm/src/armv7-a/smp.h
index d928781408b..42b3eda0eda 100644
--- a/arch/arm/src/imx6/imx_cpuinit.c
+++ b/arch/arm/src/armv7-a/smp.h
@@ -1,5 +1,6 @@
 /****************************************************************************
- * arch/arm/src/imx6/imx_clockconfig.c
+ * arch/arm/src/armv7-a/smp.h
+ * Common ARM support for SMP on multi-core CPUs.
  *
  *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
@@ -33,46 +34,77 @@
  *
  ****************************************************************************/
 
+#ifndef __ARCH_ARM_SRC_ARMV7_A_SMP_H
+#define __ARCH_ARM_SRC_ARMV7_A_SMP_H
+
 /****************************************************************************
  * Included Files
  ****************************************************************************/
 
 #include <nuttx/config.h>
 
-#include <nuttx/arch.h>
-
-#include "gic.h"
-
 #ifdef CONFIG_SMP
 
 /****************************************************************************
- * Public Functions
+ * Public Function Prototypes
  ****************************************************************************/
 
 /****************************************************************************
- * Name: up_cpu_initialize
+ * Name: __cpu[n]_start
  *
  * Description:
- *   After the CPU has been started (via up_cpu_start()) the system will
- *   call back into the architecture-specific code with this function on the
- *   thread of execution of the newly started CPU.  This gives the
- *   architecture-specific a chance to perform ny initial, CPU-specific
- *   initialize on that thread.
+ *   Boot functions for each CPU (other than CPU0).  These functions set up
+ *   the ARM operating mode, the initial stack, and configure co-processor
+ *   registers.  At the end of the boot, arm_cpu_boot() is called.
  *
- * Input Parameters:
+ *   These functions are provided by the common ARMv7-A logic.
+ *
+ * Input parameters:
  *   None
  *
  * Returned Value:
- *   Zero on success; a negated errno value on failure.
+ *   Do not return.
  *
  ****************************************************************************/
 
-int up_cpu_initialize(void)
-{
-  /* Initialize the Generic Interrupt Controller (GIC) for CPUn (n != 0) */
+#if CONFIG_SMP_NCPUS > 1
+void __cpu1_start(void);
+#endif
 
-  arm_gic_initialize();
-  return OK;
-}
+#if CONFIG_SMP_NCPUS > 2
+void __cpu2_start(void);
+#endif
 
-#endif /* CONFIG_SMP */
+#if CONFIG_SMP_NCPUS > 3
+void __cpu3_start(void);
+#endif
+
+#if CONFIG_SMP_NCPUS > 4
+#  error This logic needs to extended for CONFIG_SMP_NCPUS > 4
+#endif
+
+/****************************************************************************
+ * Name: arm_cpu_boot
+ *
+ * Description:
+ *   Continues the C-level initialization started by the assembly language
+ *   __cpu[n]_start function.  At a minimum, this function needs to initialize
+ *   interrupt handling and, perhaps, wait on WFI for arm_cpu_start() to
+ *   issue an SGI.
+ *
+ *   This function must be provided by the each ARMv7-A MCU and implement
+ *   MCU-specific initialization logic.
+ *
+ * Input parameters:
+ *   cpu - The CPU index.  This is the same value that would be obtained by
+ *      calling up_cpu_index();
+ *
+ * Returned Value:
+ *   Does not return.
+ *
+ ****************************************************************************/
+
+void arm_cpu_boot(int cpu);
+
+#endif  /* CONFIG_SMP */
+#endif  /* __ARCH_ARM_SRC_ARMV7_A_SMP_H */
diff --git a/arch/arm/src/imx6/Make.defs b/arch/arm/src/imx6/Make.defs
index 8ddf77b5e84..c33085a1bcb 100644
--- a/arch/arm/src/imx6/Make.defs
+++ b/arch/arm/src/imx6/Make.defs
@@ -145,5 +145,5 @@ CHIP_CSRCS += imx_timerisr.c imx_gpio.c imx_iomuxc.c
 CHIP_CSRCS += imx_serial.c imx_lowputc.c
 
 ifeq ($(CONFIG_SMP),y)
-CHIP_CSRCS += imx_cpuinit.c
+CHIP_CSRCS += imx_cpuboot.c
 endif
diff --git a/arch/arm/src/imx6/imx_boot.c b/arch/arm/src/imx6/imx_boot.c
index 89fe54cac9a..8e5c56232f7 100644
--- a/arch/arm/src/imx6/imx_boot.c
+++ b/arch/arm/src/imx6/imx_boot.c
@@ -400,6 +400,13 @@ void arm_boot(void)
   imx_setupmappings();
   imx_lowputc('A');
 
+  /* Make sure that all other CPUs are in the disabled state.  This is a
+   * formality because the other CPUs are actually running then we have
+   * probably already crashed.
+   */
+
+  imx_cpu_disable();
+
   /* Provide a special mapping for the OCRAM interrupt vector positioned in
    * high memory.
    */
@@ -498,5 +505,13 @@ void arm_boot(void)
   imx_earlyserialinit();
   imx_lowputc('M');
 #endif
+
+  /* Now we can enable all other CPUs.  The enabled CPUs will start execution
+   * at __cpuN_start and, after very low-level CPU initialzation has been
+   * performed, will branch to arm_cpu_boot() (see arch/arm/src/armv7-a/smp.h)
+   */
+
+  imx_cpu_enable();
+  imx_lowputc('N');
   imx_lowputc('\n');
 }
diff --git a/arch/arm/src/imx6/imx_boot.h b/arch/arm/src/imx6/imx_boot.h
index 8e63cc9e9d6..11c1ef56fe3 100644
--- a/arch/arm/src/imx6/imx_boot.h
+++ b/arch/arm/src/imx6/imx_boot.h
@@ -51,23 +51,11 @@
 #include "chip.h"
 
 /****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/****************************************************************************
- * Public Types
- ****************************************************************************/
-
-/****************************************************************************
- * Inline Functions
+ * Public Function Prototypes
  ****************************************************************************/
 
 #ifndef __ASSEMBLY__
 
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
 #undef EXTERN
 #if defined(__cplusplus)
 #define EXTERN extern "C"
@@ -78,9 +66,50 @@ extern "C"
 #endif
 
 /****************************************************************************
- * Public Function Prototypes
+ * Name: imx_cpu_disable
+ *
+ * Description:
+ *   Called from CPU0 to make sure that all other CPUs are in the disabled
+ *   state.  This is a formality because the other CPUs are actually running
+ *   then we have probably already crashed.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
  ****************************************************************************/
 
+#ifdef CONFIG_SMP
+void imx_cpu_disable(void);
+#else
+#  define imx_cpu_disable()
+#endif
+
+/****************************************************************************
+ * Name: imx_cpu_enable
+ *
+ * Description:
+ *   Called from CPU0 to enable all other CPUs.  The enabled CPUs will start
+ *   execution at __cpuN_start and, after very low-level CPU initialzation
+ *   has been performed, will branch to arm_cpu_boot()
+ *   (see arch/arm/src/armv7-a/smp.h)
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+void imx_cpu_enable(void);
+#else
+#  define imx_cpu_enable()
+#endif
+
 /****************************************************************************
  * Name: imx_board_initialize
  *
diff --git a/arch/arm/src/imx6/imx_cpuboot.c b/arch/arm/src/imx6/imx_cpuboot.c
new file mode 100644
index 00000000000..650b9ddf5e9
--- /dev/null
+++ b/arch/arm/src/imx6/imx_cpuboot.c
@@ -0,0 +1,265 @@
+/****************************************************************************
+ * arch/arm/src/imx6/imx_cpuboot.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <assert.h>
+
+#include <nuttx/arch.h>
+
+#include "up_arch.h"
+
+#include "chip/imx_src.h"
+#include "smp.h"
+#include "gic.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+typedef CODE void (*cpu_start_t)(void);
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+#if 0 /* Not used */
+static const uint32_t g_cpu_reset[CONFIG_SMP_NCPUS] =
+{
+  0,
+#if CONFIG_SMP_NCPUS > 1
+  SRC_SCR_CORE1_RST,
+#endif
+#if CONFIG_SMP_NCPUS > 2
+  SRC_SCR_CORE2_RST,
+#endif
+#if CONFIG_SMP_NCPUS > 3
+  SRC_SCR_CORE3_RST
+#endif
+};
+#endif
+
+static const uint32_t g_cpu_ctrl[CONFIG_SMP_NCPUS] =
+{
+  0,
+#if CONFIG_SMP_NCPUS > 1
+  SRC_SCR_CORE1_ENABLE,
+#endif
+#if CONFIG_SMP_NCPUS > 2
+  SRC_SCR_CORE2_ENABLE,
+#endif
+#if CONFIG_SMP_NCPUS > 3
+  SRC_SCR_CORE3_ENABLE
+#endif
+};
+
+static const uintptr_t g_cpu_gpr[CONFIG_SMP_NCPUS] =
+{
+  0,
+#if CONFIG_SMP_NCPUS > 1
+  IMX_SRC_GPR3,
+#endif
+#if CONFIG_SMP_NCPUS > 2
+  IMX_SRC_GPR5,
+#endif
+#if CONFIG_SMP_NCPUS > 3
+  IMX_SRC_GPR7
+#endif
+};
+
+static const cpu_start_t g_cpu_boot[CONFIG_SMP_NCPUS] =
+{
+  0,
+#if CONFIG_SMP_NCPUS > 1
+  __cpu1_start,
+#endif
+#if CONFIG_SMP_NCPUS > 2
+  __cpu2_start,
+#endif
+#if CONFIG_SMP_NCPUS > 3
+  __cpu3_start
+#endif
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: imx_cpu_reset
+ *
+ * Description:
+ *   CPUn software reset
+ *
+ ****************************************************************************/
+
+#if 0 /* Not used */
+static void imx_cpu_reset(int cpu)
+{
+  uint32_t regval;
+
+  regval  = getreg32(IMX_SRC_SCR);
+  regval |= g_cpu_reset[cpu];
+  putreg32(regval, IMX_SRC_SCR);
+}
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: imx_cpu_disable
+ *
+ * Description:
+ *   Called from CPU0 to make sure that all other CPUs are in the disabled
+ *   state.  This is a formality because the other CPUs are actually running
+ *   then we have probably already crashed.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void imx_cpu_disable(void)
+{
+  uint32_t regval;
+  uint32_t cpumask;
+
+  cpumask  = 0;
+#if CONFIG_SMP_NCPUS > 1
+  cpumask |= SRC_SCR_CORE1_ENABLE;
+#endif
+#if CONFIG_SMP_NCPUS > 2
+  cpumask |= SRC_SCR_CORE2_ENABLE;
+#endif
+#if CONFIG_SMP_NCPUS > 3
+  cpumask |= SRC_SCR_CORE3_ENABLE;
+#endif
+
+  regval  = getreg32(IMX_SRC_SCR);
+  regval &= ~cpumask;
+  putreg32(regval, IMX_SRC_SCR);
+}
+
+/****************************************************************************
+ * Name: imx_cpu_enable
+ *
+ * Description:
+ *   Called from CPU0 to enable all other CPUs.  The enabled CPUs will start
+ *   execution at __cpuN_start and, after very low-level CPU initialzation
+ *   has been performed, will branch to arm_cpu_boot()
+ *   (see arch/arm/src/armv7-a/smp.h)
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void imx_cpu_enable(void)
+{
+  cpu_start_t bootaddr;
+  uintptr_t regaddr;
+  uint32_t regval;
+  int cpu;
+
+  for (cpu = 1; cpu < CONFIG_SMP_NCPUS; cpu++)
+    {
+      /* Set the start up address */
+
+      regaddr  = g_cpu_gpr[cpu];
+      bootaddr = g_cpu_boot[cpu];
+      putreg32((uint32_t)bootaddr, regaddr);
+
+      /* Then enable the CPU */
+
+      regval   = getreg32(IMX_SRC_SCR);
+      regval  |= g_cpu_ctrl[cpu];
+      putreg32(regval, IMX_SRC_SCR);
+    }
+}
+
+/****************************************************************************
+ * Name: arm_cpu_boot
+ *
+ * Description:
+ *   Continues the C-level initialization started by the assembly language
+ *   __cpu[n]_start function.  At a minimum, this function needs to initialize
+ *   interrupt handling and, perhaps, wait on WFI for arm_cpu_start() to
+ *   issue an SGI.
+ *
+ *   This function must be provided by the each ARMv7-A MCU and implement
+ *   MCU-specific initialization logic.
+ *
+ * Input parameters:
+ *   cpu - The CPU index.  This is the same value that would be obtained by
+ *      calling up_cpu_index();
+ *
+ * Returned Value:
+ *   Does not return.
+ *
+ ****************************************************************************/
+
+void arm_cpu_boot(int cpu)
+{
+  /* Initialize the Generic Interrupt Controller (GIC) for CPUn (n != 0) */
+
+  arm_gic_initialize();
+
+  /* The next thing that we expect to happen is for logic running on CPU0
+   * to call up_cpu_start() which generate an SGI and a context switch to
+   * the configured NuttX IDLE task.
+   */
+
+  for (; ; )
+    {
+      asm("WFI");
+    }
+}
+
+#endif /* CONFIG_SMP */
diff --git a/arch/sim/src/up_smphook.c b/arch/sim/src/up_smphook.c
index 7c008a7d3d3..e871c42f0fb 100644
--- a/arch/sim/src/up_smphook.c
+++ b/arch/sim/src/up_smphook.c
@@ -51,29 +51,6 @@
  * Public Functions
  ****************************************************************************/
 
-/****************************************************************************
- * Name: up_cpu_initialize
- *
- * Description:
- *   After the CPU has been started (via up_cpu_start()) the system will
- *   call back into the architecture-specific code with this function on the
- *   thread of execution of the newly started CPU.  This gives the
- *   architecture-specific a chance to perform ny initial, CPU-specific
- *   initialize on that thread.
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   Zero on success; a negated errno value on failure.
- *
- ****************************************************************************/
-
-int up_cpu_initialize(void)
-{
-  return OK;
-}
-
 /****************************************************************************
  * Name: sim_smp_hook
  *
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index da9296af2d0..02fb6997446 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -1753,28 +1753,6 @@ int up_cpu_index(void);
 int up_cpu_start(int cpu);
 #endif
 
-/****************************************************************************
- * Name: up_cpu_initialize
- *
- * Description:
- *   After the CPU has been started (via up_cpu_start()) the system will
- *   call back into the architecture-specific code with this function on the
- *   thread of execution of the newly started CPU.  This gives the
- *   architecture-specific a chance to perform ny initial, CPU-specific
- *   initialize on that thread.
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   Zero on success; a negated errno value on failure.
- *
- ****************************************************************************/
-
-#ifdef CONFIG_SMP
-int up_cpu_initialize(void);
-#endif
-
 /****************************************************************************
  * Name: up_cpu_pause
  *
diff --git a/sched/init/os_smpstart.c b/sched/init/os_smpstart.c
index f613344b5f1..baf91a2e379 100644
--- a/sched/init/os_smpstart.c
+++ b/sched/init/os_smpstart.c
@@ -98,13 +98,7 @@ void os_idle_trampoline(void)
 {
 #ifdef CONFIG_SCHED_INSTRUMENTATION
   FAR struct tcb_s *tcb = this_task();
-#endif
 
-  /* Perform architecture-specific initialization for this CPU */
-
-  up_cpu_initialize();
-
-#ifdef CONFIG_SCHED_INSTRUMENTATION
   /* Announce that the IDLE task has started */
 
   sched_note_start(tcb);

From e5388ad12713ba1804bece7834062ba686659365 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Thu, 12 May 2016 15:32:53 -0600
Subject: [PATCH 28/33] i.MX6:  Need to set VBAR register for each CPU

---
 arch/arm/src/imx6/imx_cpuboot.c | 39 ++++++++++++++++++++++++++++++++-
 1 file changed, 38 insertions(+), 1 deletion(-)

diff --git a/arch/arm/src/imx6/imx_cpuboot.c b/arch/arm/src/imx6/imx_cpuboot.c
index 650b9ddf5e9..cc8494782e9 100644
--- a/arch/arm/src/imx6/imx_cpuboot.c
+++ b/arch/arm/src/imx6/imx_cpuboot.c
@@ -43,10 +43,13 @@
 #include <assert.h>
 
 #include <nuttx/arch.h>
+#include <arch/irq.h>
 
 #include "up_arch.h"
+#include "up_internal.h"
 
 #include "chip/imx_src.h"
+#include "sctlr.h"
 #include "smp.h"
 #include "gic.h"
 
@@ -120,6 +123,14 @@ static const cpu_start_t g_cpu_boot[CONFIG_SMP_NCPUS] =
 #endif
 };
 
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Symbols defined via the linker script */
+
+extern uint32_t _vector_start; /* Beginning of vector block */
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -251,6 +262,33 @@ void arm_cpu_boot(int cpu)
 
   arm_gic_initialize();
 
+#ifdef CONFIG_ARCH_LOWVECTORS
+  /* If CONFIG_ARCH_LOWVECTORS is defined, then the vectors located at the
+   * beginning of the .text region must appear at address at the address
+   * specified in the VBAR.  There are two ways to accomplish this:
+   *
+   *   1. By explicitly mapping the beginning of .text region with a page
+   *      table entry so that the virtual address zero maps to the beginning
+   *      of the .text region.  VBAR == 0x0000:0000.
+   *
+   *   2. Set the Cortex-A5 VBAR register so that the vector table address
+   *      is moved to a location other than 0x0000:0000.
+   *
+   *  The second method is used by this logic.
+   */
+
+  /* Set the VBAR register to the address of the vector table */
+
+  DEBUGASSERT((((uintptr_t)&_vector_start) & ~VBAR_MASK) == 0);
+  cp15_wrvbar((uint32_t)&_vector_start);
+#endif /* CONFIG_ARCH_LOWVECTORS */
+
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+  /* And finally, enable interrupts */
+
+  (void)up_irq_enable();
+#endif
+
   /* The next thing that we expect to happen is for logic running on CPU0
    * to call up_cpu_start() which generate an SGI and a context switch to
    * the configured NuttX IDLE task.
@@ -261,5 +299,4 @@ void arm_cpu_boot(int cpu)
       asm("WFI");
     }
 }
-
 #endif /* CONFIG_SMP */

From 7c52b8ddaeaf6f30b3c5c4b371602c6b12ea8a81 Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Fri, 13 May 2016 08:05:21 -0600
Subject: [PATCH 29/33] Add a .noinit section to all ARMv7-A linker scripts

---
 Documentation/NuttxPortingGuide.html        |  2 +-
 configs/pcduino-a10/scripts/sdram.ld        | 27 ++++++++++++++-----
 configs/sabre-6quad/scripts/dramboot.ld     | 24 +++++++++++++----
 configs/sama5d2-xult/scripts/dramboot.ld    | 27 ++++++++++++++-----
 configs/sama5d2-xult/scripts/gnu-elf.ld     | 11 +++++++-
 configs/sama5d2-xult/scripts/isram.ld       | 24 +++++++++++++----
 configs/sama5d2-xult/scripts/uboot.ld       | 27 ++++++++++++++-----
 configs/sama5d3-xplained/scripts/ddram.ld   | 27 ++++++++++++++-----
 configs/sama5d3-xplained/scripts/gnu-elf.ld | 11 +++++++-
 configs/sama5d3-xplained/scripts/isram.ld   | 27 ++++++++++++++-----
 configs/sama5d3x-ek/scripts/ddram.ld        | 27 ++++++++++++++-----
 configs/sama5d3x-ek/scripts/gnu-elf.ld      | 11 +++++++-
 configs/sama5d3x-ek/scripts/isram.ld        | 27 ++++++++++++++-----
 configs/sama5d3x-ek/scripts/nor-ddram.ld    | 27 ++++++++++++++-----
 configs/sama5d3x-ek/scripts/nor-isram.ld    | 30 ++++++++++++++++-----
 configs/sama5d3x-ek/scripts/pg-sram.ld      | 30 ++++++++++++++++-----
 configs/sama5d4-ek/scripts/dramboot.ld      | 27 ++++++++++++++-----
 configs/sama5d4-ek/scripts/gnu-elf.ld       | 11 +++++++-
 configs/sama5d4-ek/scripts/isram.ld         | 27 ++++++++++++++-----
 configs/sama5d4-ek/scripts/uboot.ld         | 27 ++++++++++++++-----
 20 files changed, 356 insertions(+), 95 deletions(-)

diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html
index e44d380fc04..ff3990c9d9b 100644
--- a/Documentation/NuttxPortingGuide.html
+++ b/Documentation/NuttxPortingGuide.html
@@ -12,7 +12,7 @@
       <h1><big><font color="#3c34ec">
         <i>NuttX RTOS Porting Guide</i>
       </font></big></h1>
-      <p>Last Updated: March 28, 2016</p>
+      <p>Last Updated: May 12, 2016</p>
     </td>
   </tr>
 </table>
diff --git a/configs/pcduino-a10/scripts/sdram.ld b/configs/pcduino-a10/scripts/sdram.ld
index 414c408a4ac..b4eaeef8d7c 100644
--- a/configs/pcduino-a10/scripts/sdram.ld
+++ b/configs/pcduino-a10/scripts/sdram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/pcduino-a10/scripts/sdram.ld
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,7 +49,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -67,13 +68,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > sdram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > sdram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > sdram
 
@@ -86,7 +89,8 @@ SECTIONS
 	} > sdram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -94,7 +98,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > sdram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -102,7 +107,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > sdram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > sdram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sabre-6quad/scripts/dramboot.ld b/configs/sabre-6quad/scripts/dramboot.ld
index ef87268ff6f..f1134bcc926 100644
--- a/configs/sabre-6quad/scripts/dramboot.ld
+++ b/configs/sabre-6quad/scripts/dramboot.ld
@@ -55,7 +55,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -73,13 +74,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > ddr3
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > ddr3
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > ddr3
 
@@ -92,7 +95,10 @@ SECTIONS
 	} > ddr3
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	/* Uninitialized data */
+
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -100,7 +106,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > ddr3
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -108,6 +115,13 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > ddr3
 
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > ddr3
+
 	/* Stabs debugging sections. */
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
diff --git a/configs/sama5d2-xult/scripts/dramboot.ld b/configs/sama5d2-xult/scripts/dramboot.ld
index 0494ff0a911..e921c5e8aaf 100644
--- a/configs/sama5d2-xult/scripts/dramboot.ld
+++ b/configs/sama5d2-xult/scripts/dramboot.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d2-xult/scripts/dramboot.ld
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -54,7 +54,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -72,13 +73,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > sdram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > sdram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > sdram
 
@@ -91,7 +94,8 @@ SECTIONS
 	} > sdram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -99,7 +103,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > sdram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -107,7 +112,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > sdram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > sdram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d2-xult/scripts/gnu-elf.ld b/configs/sama5d2-xult/scripts/gnu-elf.ld
index d84460b4c05..7f35d218bc1 100644
--- a/configs/sama5d2-xult/scripts/gnu-elf.ld
+++ b/configs/sama5d2-xult/scripts/gnu-elf.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d2-xult/scripts/gnu-elf.ld
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,6 +76,15 @@ SECTIONS
       _edata = . ;
     }
 
+  /* Uninitialized data */
+
+  .noinit :
+    {
+      _snoinit = . ;
+      *(.noinit*)
+      _enoinit = . ;
+    }
+
   /* C++ support. For each global and static local C++ object,
    * GCC creates a small subroutine to construct the object. Pointers
    * to these routines (not the routines themselves) are stored as
diff --git a/configs/sama5d2-xult/scripts/isram.ld b/configs/sama5d2-xult/scripts/isram.ld
index a170e022600..a5b1afe9a03 100644
--- a/configs/sama5d2-xult/scripts/isram.ld
+++ b/configs/sama5d2-xult/scripts/isram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d2-xult/scripts/isram.ld
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,7 +51,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -69,7 +70,8 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > isram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
@@ -88,7 +90,8 @@ SECTIONS
 	} > isram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -96,7 +99,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > isram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -104,7 +108,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > isram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > isram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d2-xult/scripts/uboot.ld b/configs/sama5d2-xult/scripts/uboot.ld
index 66e524d9225..3ad820747d3 100644
--- a/configs/sama5d2-xult/scripts/uboot.ld
+++ b/configs/sama5d2-xult/scripts/uboot.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d2-xult/scripts/uboot.ld
  *
- *   Copyright (C) 2015 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -73,13 +74,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > sdram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > sdram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > sdram
 
@@ -92,7 +95,8 @@ SECTIONS
 	} > sdram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -100,7 +104,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > sdram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -108,7 +113,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > sdram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > sdram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d3-xplained/scripts/ddram.ld b/configs/sama5d3-xplained/scripts/ddram.ld
index edb3f63a49e..9c3243d04e6 100644
--- a/configs/sama5d3-xplained/scripts/ddram.ld
+++ b/configs/sama5d3-xplained/scripts/ddram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3-xplained/scripts/ddram.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -73,13 +74,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > sdram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > sdram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > sdram
 
@@ -92,7 +95,8 @@ SECTIONS
 	} > sdram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -100,7 +104,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > sdram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -108,7 +113,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > sdram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > sdram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d3-xplained/scripts/gnu-elf.ld b/configs/sama5d3-xplained/scripts/gnu-elf.ld
index 88c53fe05f0..ffd6dc04b3d 100644
--- a/configs/sama5d3-xplained/scripts/gnu-elf.ld
+++ b/configs/sama5d3-xplained/scripts/gnu-elf.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3-xplained/scripts/gnu-elf.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,6 +76,15 @@ SECTIONS
       _edata = . ;
     }
 
+  /* Uninitialized data */
+
+  .noinit :
+    {
+      _snoinit = . ;
+      *(.noinit*)
+      _enoinit = . ;
+    }
+
   /* C++ support. For each global and static local C++ object,
    * GCC creates a small subroutine to construct the object. Pointers
    * to these routines (not the routines themselves) are stored as
diff --git a/configs/sama5d3-xplained/scripts/isram.ld b/configs/sama5d3-xplained/scripts/isram.ld
index dae430c3081..847d3e58b30 100644
--- a/configs/sama5d3-xplained/scripts/isram.ld
+++ b/configs/sama5d3-xplained/scripts/isram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3-xplained/scripts/isram.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,7 +51,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -69,13 +70,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > isram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > isram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > isram
 
@@ -88,7 +91,8 @@ SECTIONS
 	} > isram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -96,7 +100,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > isram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -104,7 +109,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > isram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > isram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d3x-ek/scripts/ddram.ld b/configs/sama5d3x-ek/scripts/ddram.ld
index 8735df50a66..6376646ba2c 100644
--- a/configs/sama5d3x-ek/scripts/ddram.ld
+++ b/configs/sama5d3x-ek/scripts/ddram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3x-ek/scripts/ddram.ld
  *
- *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -73,13 +74,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > sdram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > sdram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > sdram
 
@@ -92,7 +95,8 @@ SECTIONS
 	} > sdram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -100,7 +104,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > sdram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -108,7 +113,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > sdram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > sdram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d3x-ek/scripts/gnu-elf.ld b/configs/sama5d3x-ek/scripts/gnu-elf.ld
index 82c9b37e2f1..6b77f5dffd2 100644
--- a/configs/sama5d3x-ek/scripts/gnu-elf.ld
+++ b/configs/sama5d3x-ek/scripts/gnu-elf.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3x-ek/scripts/gnu-elf.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,6 +76,15 @@ SECTIONS
       _edata = . ;
     }
 
+  /* Uninitialized data */
+
+  .noinit :
+    {
+      _snoinit = . ;
+      *(.noinit*)
+      _enoinit = . ;
+    }
+
   /* C++ support. For each global and static local C++ object,
    * GCC creates a small subroutine to construct the object. Pointers
    * to these routines (not the routines themselves) are stored as
diff --git a/configs/sama5d3x-ek/scripts/isram.ld b/configs/sama5d3x-ek/scripts/isram.ld
index 0dde103d990..c7c3ac1799a 100644
--- a/configs/sama5d3x-ek/scripts/isram.ld
+++ b/configs/sama5d3x-ek/scripts/isram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3x-ek/scripts/isram.ld
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,7 +51,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -69,13 +70,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > isram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > isram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > isram
 
@@ -88,7 +91,8 @@ SECTIONS
 	} > isram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -96,7 +100,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > isram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -104,7 +109,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > isram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > isram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d3x-ek/scripts/nor-ddram.ld b/configs/sama5d3x-ek/scripts/nor-ddram.ld
index ecebee5930f..1787e05a194 100644
--- a/configs/sama5d3x-ek/scripts/nor-ddram.ld
+++ b/configs/sama5d3x-ek/scripts/nor-ddram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3x-ek/scripts/nor-ddram.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -60,7 +60,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -78,13 +79,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > norflash
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > norflash
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > norflash
 
@@ -97,7 +100,8 @@ SECTIONS
 	} > norflash
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -107,7 +111,8 @@ SECTIONS
 
 	_eronly = LOADADDR(.data);
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -115,7 +120,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > sdram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > sdram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d3x-ek/scripts/nor-isram.ld b/configs/sama5d3x-ek/scripts/nor-isram.ld
index c8681562e28..6d667f5e095 100644
--- a/configs/sama5d3x-ek/scripts/nor-isram.ld
+++ b/configs/sama5d3x-ek/scripts/nor-isram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3x-ek/scripts/nor-isram.ld
  *
- *   Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013-2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -56,7 +56,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -74,13 +75,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > norflash
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > norflash
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > norflash
 
@@ -93,7 +96,8 @@ SECTIONS
 	} > norflash
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -103,7 +107,8 @@ SECTIONS
 
 	_eronly = LOADADDR(.data);
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -111,7 +116,8 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > isram
 
-	.ramfunc ALIGN(4): {
+	.ramfunc ALIGN(4):
+	{
 		_sramfuncs = ABSOLUTE(.);
 		*(.ramfunc  .ramfunc.*)
 		_eramfuncs = ABSOLUTE(.);
@@ -119,7 +125,17 @@ SECTIONS
 
 	 _framfuncs = LOADADDR(.ramfunc);
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > isram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d3x-ek/scripts/pg-sram.ld b/configs/sama5d3x-ek/scripts/pg-sram.ld
index 549802619fe..31c49abb347 100644
--- a/configs/sama5d3x-ek/scripts/pg-sram.ld
+++ b/configs/sama5d3x-ek/scripts/pg-sram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d3x-ek/scripts/pg-isram.ld
  *
- *   Copyright (C) 2013 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -79,7 +79,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.locked : {
+	.locked :
+	{
 		_slocked = ABSOLUTE(.);
 		*(.vectors)
 		up_head.o locked.r (.text .text.*)
@@ -95,7 +96,8 @@ SECTIONS
 		_elocked = ABSOLUTE(.);
 	} >locked
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
@@ -110,7 +112,8 @@ SECTIONS
 	} > isram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.paged : {
+	.paged :
+	{
 		_spaged = ABSOLUTE(.);
 		*(.text .text.*)
 		*(.fixup)
@@ -127,7 +130,8 @@ SECTIONS
 		_epaged = ABSOLUTE(.);
 	} > paged
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -135,14 +139,26 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > data AT > locked
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
 		*(COMMON)
 		_ebss = ABSOLUTE(.);
 	} > data
-					/* Stabs debugging sections.	*/
+
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > data
+
+	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d4-ek/scripts/dramboot.ld b/configs/sama5d4-ek/scripts/dramboot.ld
index 4ca01c6b88f..2e19a34be30 100644
--- a/configs/sama5d4-ek/scripts/dramboot.ld
+++ b/configs/sama5d4-ek/scripts/dramboot.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d4-ek/scripts/dramboot.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -54,7 +54,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -72,13 +73,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > sdram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > sdram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > sdram
 
@@ -91,7 +94,8 @@ SECTIONS
 	} > sdram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -99,7 +103,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > sdram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -107,7 +112,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > sdram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > sdram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d4-ek/scripts/gnu-elf.ld b/configs/sama5d4-ek/scripts/gnu-elf.ld
index 6d402a750d7..6cab7801d10 100644
--- a/configs/sama5d4-ek/scripts/gnu-elf.ld
+++ b/configs/sama5d4-ek/scripts/gnu-elf.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d4-ek/scripts/gnu-elf.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -76,6 +76,15 @@ SECTIONS
       _edata = . ;
     }
 
+  /* Uninitialized data */
+
+  .noinit :
+    {
+      _snoinit = . ;
+      *(.noinit*)
+      _enoinit = . ;
+    }
+
   /* C++ support. For each global and static local C++ object,
    * GCC creates a small subroutine to construct the object. Pointers
    * to these routines (not the routines themselves) are stored as
diff --git a/configs/sama5d4-ek/scripts/isram.ld b/configs/sama5d4-ek/scripts/isram.ld
index 85bc4dfc4f0..70689842f29 100644
--- a/configs/sama5d4-ek/scripts/isram.ld
+++ b/configs/sama5d4-ek/scripts/isram.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d4-ek/scripts/isram.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -51,7 +51,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -69,13 +70,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > isram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > isram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > isram
 
@@ -88,7 +91,8 @@ SECTIONS
 	} > isram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -96,7 +100,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > isram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -104,7 +109,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > isram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > isram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }
diff --git a/configs/sama5d4-ek/scripts/uboot.ld b/configs/sama5d4-ek/scripts/uboot.ld
index 530be22418e..2a76487ccf8 100644
--- a/configs/sama5d4-ek/scripts/uboot.ld
+++ b/configs/sama5d4-ek/scripts/uboot.ld
@@ -1,7 +1,7 @@
 /****************************************************************************
  * configs/sama5d4-ek/scripts/uboot.ld
  *
- *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <gnutt@nuttx.org>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,8 @@ ENTRY(_stext)
 
 SECTIONS
 {
-	.text : {
+	.text :
+	{
 		_stext = ABSOLUTE(.);
 		*(.vectors)
 		*(.text .text.*)
@@ -73,13 +74,15 @@ SECTIONS
 		_etext = ABSOLUTE(.);
 	} > sdram
 
-	.init_section : {
+	.init_section :
+	{
 		_sinit = ABSOLUTE(.);
 		*(.init_array .init_array.*)
 		_einit = ABSOLUTE(.);
 	} > sdram
 
-	.ARM.extab : {
+	.ARM.extab :
+	{
 		*(.ARM.extab*)
 	} > sdram
 
@@ -92,7 +95,8 @@ SECTIONS
 	} > sdram
 	PROVIDE_HIDDEN (__exidx_end = .);
 
-	.data : {
+	.data :
+	{
 		_sdata = ABSOLUTE(.);
 		*(.data .data.*)
 		*(.gnu.linkonce.d.*)
@@ -100,7 +104,8 @@ SECTIONS
 		_edata = ABSOLUTE(.);
 	} > sdram
 
-	.bss : {
+	.bss :
+	{
 		_sbss = ABSOLUTE(.);
 		*(.bss .bss.*)
 		*(.gnu.linkonce.b.*)
@@ -108,7 +113,17 @@ SECTIONS
 		_ebss = ABSOLUTE(.);
 	} > sdram
 
+	/* Uninitialized data */
+
+	.noinit :
+	{
+		_snoinit = ABSOLUTE(.);
+		*(.noinit*)
+		_enoinit = ABSOLUTE(.);
+	} > sdram
+
 	/* Stabs debugging sections. */
+
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }
 	.stab.excl 0 : { *(.stab.excl) }

From d14d84c1a6acfa5dfb84f247a5f4f2f4146e1c4e Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Fri, 13 May 2016 09:11:55 -0600
Subject: [PATCH 30/33] ARMv7M/i.MX6: Implement CPUn n=1,2,3 startup logic

---
 arch/arm/src/armv7-a/arm_cpuhead.S | 487 +++++++++++++++++++++++++++++
 arch/arm/src/imx6/Make.defs        |   3 +
 2 files changed, 490 insertions(+)
 create mode 100644 arch/arm/src/armv7-a/arm_cpuhead.S

diff --git a/arch/arm/src/armv7-a/arm_cpuhead.S b/arch/arm/src/armv7-a/arm_cpuhead.S
new file mode 100644
index 00000000000..9019f2e140b
--- /dev/null
+++ b/arch/arm/src/armv7-a/arm_cpuhead.S
@@ -0,0 +1,487 @@
+/****************************************************************************
+ * arch/arm/src/armv7-a/arm_cpuhead.S
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <arch/board/board.h>
+
+#include "arm.h"
+#include "cp15.h"
+#include "sctlr.h"
+#include "mmu.h"
+#include "chip.h"
+#include "up_internal.h"
+
+	.file	"arm_cpuhead.S"
+
+/**********************************************************************************
+ * Configuration
+ **********************************************************************************/
+
+/* Hard-coded options */
+
+#undef CPU_ALIGNMENT_TRAP
+#undef CPU_CACHE_ROUND_ROBIN
+#undef CPU_DCACHE_DISABLE
+#undef CPU_ICACHE_DISABLE
+#undef CPU_AFE_ENABLE
+
+/* Check for the identity mapping:  For this configuration, this would be
+ * the case where the virtual beginning of RAM is the same as the physical
+ * beginning of RAM.
+ */
+
+#if !defined(CONFIG_RAM_START) || !defined(CONFIG_RAM_VSTART)
+#  error "CONFIG_RAM_START or CONFIG_RAM_VSTART is not defined"
+#endif
+
+#if CONFIG_RAM_START == CONFIG_RAM_VSTART
+#  define CONFIG_IDENTITY_TEXTMAP 1
+#endif
+
+/****************************************************************************
+ * .text
+ ****************************************************************************/
+
+	.text
+
+/****************************************************************************
+ * Name: __cpu[n]_start
+ *
+ * Description:
+ *   Boot functions for each CPU (other than CPU0).  These functions set up
+ *   the ARM operating mode, the initial stack, and configure co-processor
+ *   registers.  At the end of the boot, arm_cpu_boot() is called.
+ *
+ *   These functions are provided by the common ARMv7-A logic.
+ *
+ * Input parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Do not return.
+ *
+ ****************************************************************************/
+
+#if CONFIG_SMP_NCPUS > 1
+	.global	__cpu1_start
+	.type	__cpu1_start, #function
+
+__cpu1_start:
+	/* Set up the stack pointer and the CPU index */
+
+	ldr		sp, .Lcpu1_stackpointer
+	mov		r5, #1
+
+	/* Then branch to the common startup logic (PC-relative) */
+
+	b		.Lcpu_start
+
+.Lcpu1_stackpointer:
+	.long	.Lcpu1_stackbottom
+	.size	__cpu1_start, .-__cpu1_start
+
+#if CONFIG_SMP_NCPUS > 2
+	.global	__cpu2_start
+	.type	__cpu2_start, #function
+
+__cpu2_start:
+	/* Set up the stack pointer and the CPU index */
+
+	ldr		sp, .Lcpu2_stackpointer
+	mov		r5, #2
+
+	/* Then branch to the common startup logic (PC-relative) */
+
+	b		.Lcpu_start
+
+.Lcpu2_stackpointer:
+	.long	.Lcpu2_stackbottom
+	.size	__cpu2_start, .-__cpu2_start
+
+#if CONFIG_SMP_NCPUS > 3
+	.global	__cpu3_start
+	.type	__cpu3_start, #function
+
+__cpu3_start:
+	/* Set up the stack pointer and the CPU index */
+
+	ldr		sp, .Lcpu3_stackpointer
+	mov		r5, #3
+
+	/* Then branch to the common startup logic (PC-relative) */
+
+	b		.Lcpu_start
+
+.Lcpu3_stackpointer:
+	.long	.Lcpu3_stackbottom
+	.size	__cpu3_start, .-__cpu3_start
+
+#if CONFIG_SMP_NCPUS > 4
+#  error This logic needs to extended for CONFIG_SMP_NCPUS > 4
+
+#endif /* CONFIG_SMP_NCPUS > 4 */
+#endif /* CONFIG_SMP_NCPUS > 3 */
+#endif /* CONFIG_SMP_NCPUS > 2 */
+#endif /* CONFIG_SMP_NCPUS > 1 */
+
+/****************************************************************************
+ * Name: .Lcpu_start
+ *
+ * Description:
+ *   Common CPUn startup logic (n > 0)
+ *
+ * On input:
+ *   SP = Set to bottom of CPU IDLE stack (virtual)
+ *   R5 = CPU number
+ *
+ ****************************************************************************/
+
+	.type	.Lcpu_start, #function
+
+.Lcpu_start:
+	/* Make sure that we are in SVC mode with IRQs and FIQs disabled */
+
+	mov		r0, #(PSR_MODE_SVC | PSR_I_BIT | PSR_F_BIT)
+	msr		cpsr_c, r0
+
+	/* The MMU and caches should be disabled */
+
+	mrc		CP15_SCTLR(r0)
+	bic		r0, r0, #(SCTLR_M | SCTLR_C)
+	bic		r0, r0, #(SCTLR_I)
+	mcr		CP15_SCTLR(r0)
+
+	/* Invalidate caches and TLBs.
+	 *
+	 *   NOTE: "The ARMv7 Virtual Memory System Architecture (VMSA) does not
+	 *   support a CP15 operation to invalidate the entire data cache. ...
+	 *   In normal usage the only time the entire data cache has to be
+	 *   invalidated is on reset."
+	 *
+	 * The instruction cache is virtually indexed and physically tagged but
+	 * the data cache is physically indexed and physically tagged.  So it
+	 * should not be an issue if the system comes up with a dirty Dcache;
+	 * the ICache, however, must be invalidated.
+	 */
+
+	mov		r0, #0
+	mcr		CP15_TLBIALL(r0,c7)	/* Invalidate the entire unified TLB */
+	mcr		CP15_TLBIALL(r0,c6)
+	mcr		CP15_TLBIALL(r0,c5)
+	mcr		CP15_BPIALL(r0)		/* Invalidate entire branch prediction array */
+	mcr		CP15_ICIALLU(r0)	/* Invalidate I-cache */
+
+	/* Load the page table address.
+	 *
+	 * NOTES:
+	 * - Here we assume that the page table address is aligned to at least
+	 *   least a 16KB boundary (bits 0-13 are zero).  No masking is provided
+	 *   to protect against an unaligned page table address.
+	 * - The ARMv7-A has two page table address registers, TTBR0 and 1.
+	 *   Only TTBR0 is used in this implementation but both are initialized.
+	 */
+
+	ldr		r1, .LCppgtable		/* r1=phys. page table */
+	orr		r1, r1, #(TTBR0_RGN_WBWA | TTBR0_IRGN0)	/* Select cache properties */
+	mcr		CP15_TTBR0(r1)
+	mcr		CP15_TTBR1(r1)
+
+	/* Set the TTB control register (TTBCR) to indicate that we are using
+	 * TTBR0.  r0 still holds the value of zero.
+	 *
+	 *   N   : 0=Selects TTBR0 and 16KB page table size indexed by VA[31:20]
+	 *   PD0 : 0=Perform translation table walks using TTBR0
+	 *   PD1 : 0=Perform translation table walks using TTBR1 (but it is disabled)
+	 *   EAE : 0=Use 32-bit translation system
+	 */
+
+	mcr		CP15_TTBCR(r0)
+
+	/* Enable the MMU and caches
+	 * lr = Resume at .Lcpu_vstart with the MMU enabled
+	 */
+
+	ldr		lr, .LCcpu_vstart		/* Abs. virtual address */
+
+	/* Configure the domain access register (see mmu.h).  Only domain 0 is
+	 * supported and it uses the permissions in the TLB.
+	 */
+
+	mov		r0, #DACR_CLIENT(0)
+	mcr		CP15_DACR(r0)			/* Set domain access register */
+
+	/* Configure the system control register (see sctrl.h) */
+
+	mrc		CP15_SCTLR(r0)			/* Get control register */
+
+	/* Clear bits to reset values.  This is only necessary in situations like, for
+	 * example, we get here via a bootloader and the control register is in some
+	 * unknown state.
+	 *
+	 *   SCTLR_M    Bit 0:  Enable the MMU
+	 *   SCTLR_A    Bit 1:  Strict alignment disabled (reset value)
+	 *   SCTLR_C    Bit 2:  DCache disabled (reset value)
+	 *
+	 *   SCTLR_SW   Bit 10: SWP/SWPB not enabled (reset value)
+	 *   SCTLR_I    Bit 12: ICache disabled (reset value)
+	 *   SCTLR_V    Bit 13: Assume low vectors (reset value)
+	 *   SCTLR_RR   Bit 14: The Cortex-A5 processor only supports a fixed random
+	 *                      replacement strategy.
+	 *   SCTLR_HA   Bit 17: Not supported by A5
+	 *
+	 *   SCTLR_EE   Bit 25: 0=Little endian (reset value).
+	 *   SCTLR_TRE  Bit 28: No memory region remapping (reset value)
+	 *   SCTLR_AFE  Bit 29: Full, legacy access permissions behavior (reset value).
+	 *   SCTLR_TE   Bit 30: All exceptions handled in ARM state (reset value).
+	 */
+
+	bic		r0, r0, #(SCTLR_A  | SCTLR_C)
+	bic		r0, r0, #(SCTLR_SW | SCTLR_I   | SCTLR_V   | SCTLR_RR | SCTLR_HA)
+	bic		r0, r0, #(SCTLR_EE | SCTLR_TRE | SCTLR_AFE | SCTLR_TE)
+
+	/* Set bits to enable the MMU
+	 *
+	 *   SCTLR_M     Bit 0:  Enable the MMU
+	 *   SCTLR_Z     Bit 11: Program flow prediction control always enabled on A5
+	 */
+
+	orr		r0, r0, #(SCTLR_M)
+#ifndef CONFIG_ARCH_CORTEXA5
+	orr		r0, r0, #(SCTLR_Z)
+#endif
+
+#ifndef CONFIG_ARCH_LOWVECTORS
+	/* Position vectors to 0xffff0000 if so configured.
+	 *
+	 *   SCTLR_V    Bit 13: High vectors
+	 */
+
+	orr		r0, r0, #(SCTLR_V)
+#endif
+
+#if defined(CPU_CACHE_ROUND_ROBIN) && !defined(CONFIG_ARCH_CORTEXA5)
+	/* Round Robin cache replacement
+	 *
+	 *   SCTLR_RR   Bit 14: The Cortex-A5 processor only supports a fixed random
+	 *                      replacement strategy.
+	 */
+
+	orr		r0, r0, #(SCTLR_RR)
+#endif
+
+#ifndef CPU_DCACHE_DISABLE
+	/* Dcache enable
+	 *
+	 *   SCTLR_C    Bit 2:  DCache enable
+	 */
+
+	orr		r0, r0, #(SCTLR_C)
+#endif
+
+#ifndef CPU_ICACHE_DISABLE
+	/* Icache enable
+	 *
+	 *   SCTLR_I    Bit 12: ICache enable
+	 */
+
+	orr		r0, r0, #(SCTLR_I)
+#endif
+
+#ifdef CPU_ALIGNMENT_TRAP
+	/* Alignment abort enable
+	 *
+	 *   SCTLR_A    Bit 1:  Strict alignment enabled
+	 */
+
+	orr		r0, r0, #(SCTLR_A)
+#endif
+
+#ifdef CONFIG_ENDIAN_BIG
+	/* Big endian mode
+	 *
+	 *   SCTLR_EE       Bit 25: 1=Big endian.
+	 */
+
+	orr		r0, r0, #(SCTLR_EE)
+#endif
+
+#ifdef CPU_AFE_ENABLE
+	/* AP[0:2] Permissions model
+	 *
+	 *   SCTLR_AFE  Bit 29: Full, legacy access permissions behavior (reset value).
+	 *
+	 * When AFE=1, the page table AP[0] is used as an access flag and AP[2:1]
+	 * control.  When AFE=0, AP[2:0] control access permissions.
+	 */
+
+	orr		r0, r0, #(SCTLR_AFE)
+#endif
+
+	/* Then write the configured control register */
+
+	mcr		CP15_SCTLR(r0)			/* Write control reg */
+	.rept	12						/* Cortex A8 wants lots of NOPs here */
+	nop
+	.endr
+
+	/* And "jump" to .Lcpu_vstart in the newly mapped virtual address space */
+
+	mov		pc, lr
+
+/****************************************************************************
+ * PC_Relative Data
+ ****************************************************************************/
+
+	/* The physical base address of the page table */
+
+	.type	.LCppgtable, %object
+.LCppgtable:
+	.long	PGTABLE_BASE_PADDR		/* Physical start of page table */
+	.size	.LCppgtable, . -.LCppgtable
+
+	/* The virtual start address of the second phase boot logic */
+
+	.type	.LCcpu_vstart, %object
+.LCcpu_vstart:
+	.long	.Lcpu_vstart
+	.size	.LCcpu_vstart, . -.LCcpu_vstart
+
+	.size	.Lcpu_start, .-.Lcpu_start
+
+/****************************************************************************
+ * Name: .Lcpu_vstart
+ *
+ * Description:
+ *   Continue initialization after the MMU has been enabled.
+ *
+ *   The following is executed after the MMU has been enabled. This uses
+ *   absolute addresses; this is not position independent.
+ *
+ * On input:
+ *   SP = Set to bottom of CPU IDLE stack (virtual)
+ *   R5 = CPU number
+ *
+ ****************************************************************************/
+
+	.align	8
+	.globl	arm_cpu_boot
+	.type	.Lcpu_vstart, %function
+
+.Lcpu_vstart:
+
+#ifdef CONFIG_STACK_COLORATION
+	/* Write a known value to the IDLE thread stack to support stack
+	 * monitoring logic
+	 */
+
+	adr		r3, .Lstkinit
+	ldmia	r3, {r0, r1, r2}	/* R0 = start of IDLE stack; R1 = Size of stack; R2 = coloration */
+
+1:								/* Top of the loop */
+	sub		r1, r1, #1			/* R1 = Number of words remaining */
+	cmp		r1, #0				/* Check (nwords == 0) */
+	str		r2, [r0], #4		/* Save stack color word, increment stack address */
+	bne		1b					/* Bottom of the loop */
+#endif
+
+	/* Branch to continue C level CPU initialization */
+
+	mov		fp, #0				/* Clear framepointer */
+	mov		lr, #0				/* LR = return address (none) */
+	mov		r0, r5				/* Input parameter = CPU index */
+	b		arm_cpu_boot		/* Branch to C level CPU initialization */
+	.size	.Lcpu_vstart, .-.Lcpu_vstart
+
+/***************************************************************************
+ * Text-section constants
+ ***************************************************************************/
+
+	/* Text-section constants: */
+
+#ifdef CONFIG_STACK_COLORATION
+	.type	.Lstkinit, %object
+.Lstkinit:
+	.long	((CONFIG_IDLETHREAD_STACKSIZE + 7) & ~7) >> 2)
+	.long	STACK_COLOR				/* Stack coloration word */
+	.size	.Lstkinit, . -.Lstkinit
+#endif
+
+/***************************************************************************
+ * .noinit section data
+ ***************************************************************************/
+
+	.section	.noinit, "aw"
+
+#if CONFIG_SMP_NCPUS > 1
+	.align	8
+	.type	.Lcpu1_idlestack, object
+
+.Lcpu1_idlestack:
+	.space	((CONFIG_SMP_IDLETHREAD_STACKSIZE + 7) & ~7)
+.Lcpu1_stackbottom:
+	.size	.Lcpu1_idlestack, .Lcpu1_stackbottom-.Lcpu1_idlestack
+
+#if CONFIG_SMP_NCPUS > 2
+	.align	8
+	.type	.Lcpu2_idlestack, object
+
+.Lcpu2_idlestack:
+	.space	((CONFIG_SMP_IDLETHREAD_STACKSIZE + 7) & ~7)
+.Lcpu2_stackbottom:
+	.size	.Lcpu2_idlestack, .Lcpu2_stackbottom-.Lcpu2_idlestack
+
+#if CONFIG_SMP_NCPUS > 3
+	.align	8
+	.type	.Lcpu3_idlestack, object
+
+.Lcpu3_idlestack:
+	.space	((CONFIG_SMP_IDLETHREAD_STACKSIZE + 7) & ~7)
+.Lcpu3_stackbottom:
+	.size	.Lcpu3_idlestack, .Lcpu3_stackbottom-.Lcpu3_idlestack
+
+#if CONFIG_SMP_NCPUS > 4
+#  error This logic needs to extended for CONFIG_SMP_NCPUS > 4
+
+#endif /* CONFIG_SMP_NCPUS > 4 */
+#endif /* CONFIG_SMP_NCPUS > 3 */
+#endif /* CONFIG_SMP_NCPUS > 2 */
+#endif /* CONFIG_SMP_NCPUS > 1 */
+
+	.end
diff --git a/arch/arm/src/imx6/Make.defs b/arch/arm/src/imx6/Make.defs
index c33085a1bcb..d4db5209100 100644
--- a/arch/arm/src/imx6/Make.defs
+++ b/arch/arm/src/imx6/Make.defs
@@ -49,6 +49,9 @@ ifeq ($(CONFIG_PAGING),y)
 CMN_ASRCS  = arm_pghead.S
 else
 CMN_ASRCS  = arm_head.S
+ifeq ($(CONFIG_SMP),y)
+CMN_ASRCS += arm_cpuhead.S
+endif
 endif
 
 # Common assembly language files

From faca2fb1e70154337215a9eddb5b89694a966a9c Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Fri, 13 May 2016 11:39:42 -0600
Subject: [PATCH 31/33] ARMv7-A/i.MX6: Add logic to handle allocation of CPU
 IDLE thread stacks more efficiently

---
 arch/arm/src/armv7-a/arm_cpuhead.S      |  47 ++++----
 arch/arm/src/armv7-a/arm_cpuidlestack.c | 145 ++++++++++++++++++++++++
 arch/arm/src/armv7-a/smp.h              |  35 ++++++
 arch/arm/src/imx6/Make.defs             |   2 +-
 arch/arm/src/imx6/imx_boot.c            |   2 +-
 arch/sim/src/Makefile                   |   2 +-
 arch/sim/src/up_cpuidlestack.c          | 108 ++++++++++++++++++
 include/nuttx/arch.h                    |  47 +++++++-
 sched/init/os_smpstart.c                |   3 +-
 9 files changed, 364 insertions(+), 27 deletions(-)
 create mode 100644 arch/arm/src/armv7-a/arm_cpuidlestack.c
 create mode 100644 arch/sim/src/up_cpuidlestack.c

diff --git a/arch/arm/src/armv7-a/arm_cpuhead.S b/arch/arm/src/armv7-a/arm_cpuhead.S
index 9019f2e140b..487fee0a46b 100644
--- a/arch/arm/src/armv7-a/arm_cpuhead.S
+++ b/arch/arm/src/armv7-a/arm_cpuhead.S
@@ -45,6 +45,8 @@
 #include "cp15.h"
 #include "sctlr.h"
 #include "mmu.h"
+#include "smp.h"
+
 #include "chip.h"
 #include "up_internal.h"
 
@@ -114,7 +116,7 @@ __cpu1_start:
 	b		.Lcpu_start
 
 .Lcpu1_stackpointer:
-	.long	.Lcpu1_stackbottom
+	.long	.Lcpu1_stacktop
 	.size	__cpu1_start, .-__cpu1_start
 
 #if CONFIG_SMP_NCPUS > 2
@@ -132,7 +134,7 @@ __cpu2_start:
 	b		.Lcpu_start
 
 .Lcpu2_stackpointer:
-	.long	.Lcpu2_stackbottom
+	.long	.Lcpu2_stacktop
 	.size	__cpu2_start, .-__cpu2_start
 
 #if CONFIG_SMP_NCPUS > 3
@@ -150,7 +152,7 @@ __cpu3_start:
 	b		.Lcpu_start
 
 .Lcpu3_stackpointer:
-	.long	.Lcpu3_stackbottom
+	.long	.Lcpu3_stacktop
 	.size	__cpu3_start, .-__cpu3_start
 
 #if CONFIG_SMP_NCPUS > 4
@@ -168,7 +170,7 @@ __cpu3_start:
  *   Common CPUn startup logic (n > 0)
  *
  * On input:
- *   SP = Set to bottom of CPU IDLE stack (virtual)
+ *   SP = Set to top of CPU IDLE stack (virtual)
  *   R5 = CPU number
  *
  ****************************************************************************/
@@ -395,7 +397,7 @@ __cpu3_start:
  *   absolute addresses; this is not position independent.
  *
  * On input:
- *   SP = Set to bottom of CPU IDLE stack (virtual)
+ *   SP = Set to top of CPU IDLE stack (virtual)
  *   R5 = CPU number
  *
  ****************************************************************************/
@@ -438,7 +440,7 @@ __cpu3_start:
 #ifdef CONFIG_STACK_COLORATION
 	.type	.Lstkinit, %object
 .Lstkinit:
-	.long	((CONFIG_IDLETHREAD_STACKSIZE + 7) & ~7) >> 2)
+	.long	SMP_STACK_WORDS
 	.long	STACK_COLOR				/* Stack coloration word */
 	.size	.Lstkinit, . -.Lstkinit
 #endif
@@ -451,30 +453,33 @@ __cpu3_start:
 
 #if CONFIG_SMP_NCPUS > 1
 	.align	8
-	.type	.Lcpu1_idlestack, object
+	.globl	g_cpu1_idlestack
+	.type	g_cpu1_idlestack, object
 
-.Lcpu1_idlestack:
-	.space	((CONFIG_SMP_IDLETHREAD_STACKSIZE + 7) & ~7)
-.Lcpu1_stackbottom:
-	.size	.Lcpu1_idlestack, .Lcpu1_stackbottom-.Lcpu1_idlestack
+g_cpu1_idlestack:
+	.space	SMP_STACK_SIZE
+.Lcpu1_stacktop:
+	.size	g_cpu1_idlestack, .Lcpu1_stacktop-g_cpu1_idlestack
 
 #if CONFIG_SMP_NCPUS > 2
 	.align	8
-	.type	.Lcpu2_idlestack, object
+	.globl	g_cpu2_idlestack
+	.type	g_cpu2_idlestack, object
 
-.Lcpu2_idlestack:
-	.space	((CONFIG_SMP_IDLETHREAD_STACKSIZE + 7) & ~7)
-.Lcpu2_stackbottom:
-	.size	.Lcpu2_idlestack, .Lcpu2_stackbottom-.Lcpu2_idlestack
+g_cpu2_idlestack:
+	.space	SMP_STACK_SIZE
+.Lcpu2_stacktop:
+	.size	g_cpu2_idlestack, .Lcpu2_stacktop-g_cpu2_idlestack
 
 #if CONFIG_SMP_NCPUS > 3
 	.align	8
-	.type	.Lcpu3_idlestack, object
+	.globl	g_cpu3_idlestack
+	.type	g_cpu3_idlestack, object
 
-.Lcpu3_idlestack:
-	.space	((CONFIG_SMP_IDLETHREAD_STACKSIZE + 7) & ~7)
-.Lcpu3_stackbottom:
-	.size	.Lcpu3_idlestack, .Lcpu3_stackbottom-.Lcpu3_idlestack
+g_cpu3_idlestack:
+	.space	SMP_STACK_SIZE
+.Lcpu3_stacktop:
+	.size	g_cpu3_idlestack, .Lcpu3_stacktop-g_cpu3_idlestack
 
 #if CONFIG_SMP_NCPUS > 4
 #  error This logic needs to extended for CONFIG_SMP_NCPUS > 4
diff --git a/arch/arm/src/armv7-a/arm_cpuidlestack.c b/arch/arm/src/armv7-a/arm_cpuidlestack.c
new file mode 100644
index 00000000000..fe191233216
--- /dev/null
+++ b/arch/arm/src/armv7-a/arm_cpuidlestack.c
@@ -0,0 +1,145 @@
+/****************************************************************************
+ * arch/arm/src/armv7-a/arm_cpuidlestack.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/sched.h>
+
+#include "smp.h"
+#include "up_internal.h"
+
+#if defined(CONFIG_SMP) && CONFIG_SMP_NCPUS > 1
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Stack alignment macros */
+
+#define STACK_ISALIGNED(a) ((uintptr_t)(a) & ~SMP_STACK_MASK)
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
+{
+    0
+  , g_cpu1_idlestack
+#if CONFIG_SMP_NCPUS > 2
+  , g_cpu2_idlestack
+#if CONFIG_SMP_NCPUS > 3
+  , g_cpu3_idlestack
+#endif /* CONFIG_SMP_NCPUS > 3 */
+#endif /* CONFIG_SMP_NCPUS > 2 */
+};
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_idlestack
+ *
+ * Description:
+ *   Allocate a stack for the CPU[n] IDLE task (n > 0) if appropriate and
+ *   setup up stack-related information in the IDLE task's TCB.  This
+ *   function is always called before up_cpu_start().  This function is
+ *   only called for the CPU's initial IDLE task; up_create_task is used for
+ *   all normal tasks, pthreads, and kernel threads for all CPUs.
+ *
+ *   The initial IDLE task is a special case because the CPUs can be started
+ *   in different wans in different environments:
+ *
+ *   1. The CPU may already have been started and waiting in a low power
+ *      state for up_cpu_start().  In this case, the IDLE thread's stack
+ *      has already been allocated and is already in use.  Here
+ *      up_cpu_idlestack() only has to provide information about the
+ *      already allocated stack.
+ *
+ *   2. The CPU may be disabled but started when up_cpu_start() is called.
+ *      In this case, a new stack will need to be created for the IDLE
+ *      thread and this function is then equivalent to:
+ *
+ *      up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+ *
+ *   The following TCB fields must be initialized by this function:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware, processor,
+ *     etc.  This value is retained only for debug purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The initial value of
+ *     the stack pointer.
+ *
+ * Inputs:
+ *   - cpu:         CPU index that indicates which CPU the IDLE task is
+ *                  being created for.
+ *   - tcb:         The TCB of new CPU IDLE task
+ *   - stack_size:  The requested stack size for the IDLE task.  At least
+ *                  this much must be allocated.  This should be
+ *                  CONFIG_SMP_STACK_SIZE.
+ *
+ ****************************************************************************/
+
+int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
+{
+  uintptr_t stack_alloc;
+  uintptr_t top_of_stack;
+
+  DEBUGASSERT(cpu > 0 && cpu < CONFIG_SMP_NCPUS && tcb != NULL &&
+              stack_size <= SMP_STACK_SIZE);
+
+  /* Get the top of the stack */
+
+
+  stack_alloc          = (uintptr_t)g_cpu_stackalloc[cpu];
+  DEBUGASSERT(stack_alloc != 0 && STACK_ISALIGNED(stack_alloc));
+  top_of_stack         = stack_alloc + SMP_STACK_TOP;
+
+  tcb->adj_stack_size  = SMP_STACK_SIZE;
+  tcb->stack_alloc_ptr = (FAR uint32_t *)stack_alloc;
+  tcb->adj_stack_ptr   = (FAR uint32_t *)top_of_stack;
+
+  return OK;
+}
+
+#endif /* CONFIG_SMP && CONFIG_SMP_NCPUS > 1 */
diff --git a/arch/arm/src/armv7-a/smp.h b/arch/arm/src/armv7-a/smp.h
index 42b3eda0eda..7c9d1cc72af 100644
--- a/arch/arm/src/armv7-a/smp.h
+++ b/arch/arm/src/armv7-a/smp.h
@@ -45,6 +45,40 @@
 
 #ifdef CONFIG_SMP
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* ARM requires at least a 4-byte stack alignment.  For use with EABI and
+ * floating point, the stack must be aligned to 8-byte addresses.  We will
+ * always use the EABI stack alignment
+ */
+
+#define SMP_STACK_ALIGNMENT  8
+#define SMP_STACK_MASK       7
+#define SMP_STACK_SIZE       ((CONFIG_SMP_IDLETHREAD_STACKSIZE + 7) & ~7)
+#define SMP_STACK_WORDS      (SMP_STACK_SIZE >> 2)
+#define SMP_STACK_TOP        (SMP_STACK_SIZE - 8)
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#if CONFIG_SMP_NCPUS > 1
+extern uint32_t g_cpu1_idlestack[SMP_STACK_WORDS];
+#if CONFIG_SMP_NCPUS > 2
+extern uint32_t g_cpu2_idlestack[SMP_STACK_WORDS];
+#if CONFIG_SMP_NCPUS > 3
+extern uint32_t g_cpu3_idlestack[SMP_STACK_WORDS];
+#if CONFIG_SMP_NCPUS > 4
+#  error This logic needs to extended for CONFIG_SMP_NCPUS > 4
+#endif /* CONFIG_SMP_NCPUS > 4 */
+#endif /* CONFIG_SMP_NCPUS > 3 */
+#endif /* CONFIG_SMP_NCPUS > 2 */
+#endif /* CONFIG_SMP_NCPUS > 1 */
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -106,5 +140,6 @@ void __cpu3_start(void);
 
 void arm_cpu_boot(int cpu);
 
+#endif  /* __ASSEMBLY__ */
 #endif  /* CONFIG_SMP */
 #endif  /* __ARCH_ARM_SRC_ARMV7_A_SMP_H */
diff --git a/arch/arm/src/imx6/Make.defs b/arch/arm/src/imx6/Make.defs
index d4db5209100..3f949158e36 100644
--- a/arch/arm/src/imx6/Make.defs
+++ b/arch/arm/src/imx6/Make.defs
@@ -80,7 +80,7 @@ CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
 CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
 
 ifeq ($(CONFIG_SMP),y)
-CMN_CSRCS += arm_cpuindex.c arm_cpustart.c arm_cpupause.c
+CMN_CSRCS += arm_cpuindex.c arm_cpustart.c arm_cpupause.c arm_cpuidlestack.c
 endif
 
 ifeq ($(CONFIG_DEBUG_IRQ),y)
diff --git a/arch/arm/src/imx6/imx_boot.c b/arch/arm/src/imx6/imx_boot.c
index 8e5c56232f7..edfd5304a14 100644
--- a/arch/arm/src/imx6/imx_boot.c
+++ b/arch/arm/src/imx6/imx_boot.c
@@ -309,7 +309,7 @@ static void imx_copyvectorblock(void)
 #ifndef CONFIG_IMX6_WDT
 static inline void imx_wdtdisable(void)
 {
-#  warning REVISIT WDT initialization
+  /* REVISIT: WDT initialization */
 }
 #else
 #  define imx_wdtdisable()
diff --git a/arch/sim/src/Makefile b/arch/sim/src/Makefile
index f4f6270660e..406ac4ee934 100644
--- a/arch/sim/src/Makefile
+++ b/arch/sim/src/Makefile
@@ -70,7 +70,7 @@ ifeq ($(CONFIG_SPINLOCK),y)
 endif
 
 ifeq ($(CONFIG_SMP),y)
-  CSRCS += up_smpsignal.c up_smphook.c
+  CSRCS += up_smpsignal.c up_smphook.c up_cpuidlestack.c
   HOSTSRCS += up_simsmp.c
 endif
 
diff --git a/arch/sim/src/up_cpuidlestack.c b/arch/sim/src/up_cpuidlestack.c
new file mode 100644
index 00000000000..ee728849a91
--- /dev/null
+++ b/arch/sim/src/up_cpuidlestack.c
@@ -0,0 +1,108 @@
+/****************************************************************************
+ * arch/sim/src/up_cpuidlestack.c
+ *
+ *   Copyright (C) 2016 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/sched.h>
+
+#include "up_internal.h"
+
+#ifdef CONFIG_SMP
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_cpu_idlestack
+ *
+ * Description:
+ *   Allocate a stack for the CPU[n] IDLE task (n > 0) if appropriate and
+ *   setup up stack-related information in the IDLE task's TCB.  This
+ *   function is always called before up_cpu_start().  This function is
+ *   only called for the CPU's initial IDLE task; up_create_task is used for
+ *   all normal tasks, pthreads, and kernel threads for all CPUs.
+ *
+ *   The initial IDLE task is a special case because the CPUs can be started
+ *   in different wans in different environments:
+ *
+ *   1. The CPU may already have been started and waiting in a low power
+ *      state for up_cpu_start().  In this case, the IDLE thread's stack
+ *      has already been allocated and is already in use.  Here
+ *      up_cpu_idlestack() only has to provide information about the
+ *      already allocated stack.
+ *
+ *   2. The CPU may be disabled but started when up_cpu_start() is called.
+ *      In this case, a new stack will need to be created for the IDLE
+ *      thread and this function is then equivalent to:
+ *
+ *      up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+ *
+ *   The following TCB fields must be initialized by this function:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware, processor,
+ *     etc.  This value is retained only for debug purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The initial value of
+ *     the stack pointer.
+ *
+ * Inputs:
+ *   - cpu:         CPU index that indicates which CPU the IDLE task is
+ *                  being created for.
+ *   - tcb:         The TCB of new CPU IDLE task
+ *   - stack_size:  The requested stack size for the IDLE task.  At least
+ *                  this much must be allocated.  This should be
+ *                  CONFIG_SMP_IDLETHREAD_STACKSIZE.
+ *
+ ****************************************************************************/
+
+int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size)
+{
+  /* REVISIT:  I don't think anything is needed here */
+
+  tcb->adj_stack_size = stack_size;
+  tcb->stack_alloc_ptr = NULL;
+  tcb->adj_stack_ptr   = NULL;
+  return OK;
+}
+
+#endif /* CONFIG_SMP */
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index 02fb6997446..b2066b162a3 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -1644,7 +1644,7 @@ int up_timer_start(FAR const struct timespec *ts);
  *
  * Description:
  *   Return the TLS information structure for the currently executing thread.
- *   When TLS is enabled, up_createstack() will align allocated stacks to
+ *   When TLS is enabled, up_create_stack() will align allocated stacks to
  *   the TLS_STACK_ALIGN value.  An instance of the following structure will
  *   be implicitly positioned at the "lower" end of the stack.  Assuming a
  *   "push down" stack, this is at the "far" end of the stack (and can be
@@ -1722,6 +1722,51 @@ int up_cpu_index(void);
 #  define up_cpu_index() (0)
 #endif
 
+/****************************************************************************
+ * Name: up_cpu_idlestack
+ *
+ * Description:
+ *   Allocate a stack for the CPU[n] IDLE task (n > 0) if appropriate and
+ *   setup up stack-related information in the IDLE task's TCB.  This
+ *   function is always called before up_cpu_start().  This function is
+ *   only called for the CPU's initial IDLE task; up_create_task is used for
+ *   all normal tasks, pthreads, and kernel threads for all CPUs.
+ *
+ *   The initial IDLE task is a special case because the CPUs can be started
+ *   in different wans in different environments:
+ *
+ *   1. The CPU may already have been started and waiting in a low power
+ *      state for up_cpu_start().  In this case, the IDLE thread's stack
+ *      has already been allocated and is already in use.  Here
+ *      up_cpu_idlestack() only has to provide information about the
+ *      already allocated stack.
+ *
+ *   2. The CPU may be disabled but started when up_cpu_start() is called.
+ *      In this case, a new stack will need to be created for the IDLE
+ *      thread and this function is then equivalent to:
+ *
+ *      up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+ *
+ *   The following TCB fields must be initialized by this function:
+ *
+ *   - adj_stack_size: Stack size after adjustment for hardware, processor,
+ *     etc.  This value is retained only for debug purposes.
+ *   - stack_alloc_ptr: Pointer to allocated stack
+ *   - adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The initial value of
+ *     the stack pointer.
+ *
+ * Inputs:
+ *   - cpu:         CPU index that indicates which CPU the IDLE task is
+ *                  being created for.
+ *   - tcb:         The TCB of new CPU IDLE task
+ *   - stack_size:  The requested stack size for the IDLE task.  At least
+ *                  this much must be allocated.  This should be
+ *                  CONFIG_SMP_IDLETHREAD_STACKSIZE.
+ *
+ ****************************************************************************/
+
+int up_cpu_idlestack(int cpu, FAR struct tcb_s *tcb, size_t stack_size);
+
 /****************************************************************************
  * Name: up_cpu_start
  *
diff --git a/sched/init/os_smpstart.c b/sched/init/os_smpstart.c
index baf91a2e379..c8be9c1cb18 100644
--- a/sched/init/os_smpstart.c
+++ b/sched/init/os_smpstart.c
@@ -203,8 +203,7 @@ int os_smp_start(void)
       FAR struct tcb_s *tcb = current_task(cpu);
       DEBUGASSERT(tcb != NULL);
 
-      ret = up_create_stack(tcb, CONFIG_SMP_IDLETHREAD_STACKSIZE,
-                            TCB_FLAG_TTYPE_KERNEL);
+      ret = up_cpu_idlestack(cpu, tcb, CONFIG_SMP_IDLETHREAD_STACKSIZE);
       if (ret < 0)
         {
           sdbg("ERROR: Failed to allocate stack for CPU%d\n", cpu);

From 09a58263c85940b8cc420b5bae715399b44e875c Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Fri, 13 May 2016 12:19:26 -0600
Subject: [PATCH 32/33] Update ChangeLog

---
 ChangeLog | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 87f923ce2af..5be696ba87e 100755
--- a/ChangeLog
+++ b/ChangeLog
@@ -11718,6 +11718,14 @@
 	* Several Makefiles: Add .PHONY definitions to prevent 'clean up to date'
 	  message weirdness when 'make clean' is done with no .config or Make.defs
 	  file (2016-05-10).
+	* include/nuttx/can.h and drivers/can.c:  Improve CAN error reporting.
+	  From Frank Benkert (2016-05-11).
+	* fs/Kconfig:  Allow CONFIG_FS_WRITABLE to be manually selectable
+	  (2016-05-11).
+	* Various file:  Search for places where a stray semicolon following an
+	  if condition cause the if body to be executed unconditionally.  Fixes
+	  in all SAM DMA logic, unionfs, OS signalling logic,
 	* configs/nucleo-144: Basic port for the Nucleo-144 board with the
 	  STM32F746ZG MCU.  From Kconstantin Berezenko (2015-05-12).
-
+	* arch/arm-src/armv7-a:  Complete logic to initialize each CPUn, n > 0,
+	  when CONFIG_SMP=y (2016-05-13).

From a3f3cc12c0c6667194050e2503175c3c90932d0c Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Fri, 13 May 2016 17:36:08 -0600
Subject: [PATCH 33/33] Update some comments; Fix grammatic error in ChangeLog.

---
 ChangeLog                               | 4 ++--
 arch/arm/src/armv7-a/arm_cpuidlestack.c | 2 +-
 arch/sim/src/up_cpuidlestack.c          | 2 +-
 include/nuttx/arch.h                    | 2 +-
 4 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/ChangeLog b/ChangeLog
index 5be696ba87e..6504de162ef 100755
--- a/ChangeLog
+++ b/ChangeLog
@@ -11727,5 +11727,5 @@
 	  in all SAM DMA logic, unionfs, OS signalling logic,
 	* configs/nucleo-144: Basic port for the Nucleo-144 board with the
 	  STM32F746ZG MCU.  From Kconstantin Berezenko (2015-05-12).
-	* arch/arm-src/armv7-a:  Complete logic to initialize each CPUn, n > 0,
-	  when CONFIG_SMP=y (2016-05-13).
+	* arch/arm-src/armv7-a:  Complete re-design of logic to initialize each
+	  CPUn, n > 0, when CONFIG_SMP=y (2016-05-13).
diff --git a/arch/arm/src/armv7-a/arm_cpuidlestack.c b/arch/arm/src/armv7-a/arm_cpuidlestack.c
index fe191233216..09e9f0d12ee 100644
--- a/arch/arm/src/armv7-a/arm_cpuidlestack.c
+++ b/arch/arm/src/armv7-a/arm_cpuidlestack.c
@@ -100,7 +100,7 @@ static FAR const uint32_t *g_cpu_stackalloc[CONFIG_SMP_NCPUS] =
  *      In this case, a new stack will need to be created for the IDLE
  *      thread and this function is then equivalent to:
  *
- *      up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+ *      return up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
  *
  *   The following TCB fields must be initialized by this function:
  *
diff --git a/arch/sim/src/up_cpuidlestack.c b/arch/sim/src/up_cpuidlestack.c
index ee728849a91..c11d14e4a99 100644
--- a/arch/sim/src/up_cpuidlestack.c
+++ b/arch/sim/src/up_cpuidlestack.c
@@ -75,7 +75,7 @@
  *      In this case, a new stack will need to be created for the IDLE
  *      thread and this function is then equivalent to:
  *
- *      up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+ *      return up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
  *
  *   The following TCB fields must be initialized by this function:
  *
diff --git a/include/nuttx/arch.h b/include/nuttx/arch.h
index b2066b162a3..24925c05ec6 100644
--- a/include/nuttx/arch.h
+++ b/include/nuttx/arch.h
@@ -1745,7 +1745,7 @@ int up_cpu_index(void);
  *      In this case, a new stack will need to be created for the IDLE
  *      thread and this function is then equivalent to:
  *
- *      up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
+ *      return up_create_stack(tcb, stack_size, TCB_FLAG_TTYPE_KERNEL);
  *
  *   The following TCB fields must be initialized by this function:
  *