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arch/tricore: Regs for context switching save the memory address of the CSA.

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In the exception panic process, regs needs to use a memory address, which defaults to PCXI. Here, it is uniformly saved as the actual memory address.

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
This commit is contained in:
liwenxiang1
2024-11-22 14:53:43 +08:00
committed by Xiang Xiao
parent 68a5732d9a
commit 8da6b45939
4 changed files with 10 additions and 9 deletions
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arch/tricore/include/irq.h
+5 -4
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@@ -205,14 +205,15 @@ static inline_function bool up_interrupt_context(void)
static inline_function uintptr_t up_getusrsp(void *regs)
{
uintptr_t *csa = regs;
uintptr_t pcxi = tricore_addr2csa(csa);
while (((uintptr_t)csa & PCXI_UL) == 0)
while ((pcxi & PCXI_UL) == 0)
{
csa = tricore_csa2addr((uintptr_t)csa);
csa = (uintptr_t *)csa[0];
csa = tricore_csa2addr(csa[REG_UPCXI]);
pcxi = csa[REG_UPCXI];
}
csa = tricore_csa2addr((uintptr_t)csa);
csa = tricore_csa2addr(pcxi);
return csa[REG_SP];
}