From 8d9df11ca2c44f6f74f4274d92b8527a2672b829 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 11 Sep 2014 10:27:40 -0600 Subject: [PATCH] Fix for UART7 and UART8 on STM32 clock enable from Aton --- arch/arm/src/stm32/chip/stm32f20xxx_rcc.h | 4 +++- arch/arm/src/stm32/stm32_serial.c | 6 +++--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h index 837094d0114..6dbb7f1d71e 100644 --- a/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h +++ b/arch/arm/src/stm32/chip/stm32f20xxx_rcc.h @@ -1,7 +1,7 @@ /**************************************************************************************************** * arch/arm/src/stm32/chip/stm32f20xxx_rcc.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -357,6 +357,8 @@ #define RCC_APB1ENR_CAN2EN (1 << 26) /* Bit 26: CAN 2 clock enable */ #define RCC_APB1ENR_PWREN (1 << 28) /* Bit 28: Power interface clock enable */ #define RCC_APB1ENR_DACEN (1 << 29) /* Bit 29: DAC interface clock enable */ +#define RCC_APB1ENR_UART7EN (1 << 30) /* Bit 30: UART7 clock enable */ +#define RCC_APB1ENR_UART8EN (1 << 31) /* Bit 31: UART8 clock enable */ /* APB2 Peripheral Clock enable register */ diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index 42973bce158..de499ab086f 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_serial.c * - * Copyright (C) 2009-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -1375,13 +1375,13 @@ static void up_set_apb_clock(struct uart_dev_s *dev, bool on) #endif #ifdef CONFIG_STM32_UART7 case STM32_UART7_BASE: - rcc_en = RCC_APB1ENR_USART5EN; + rcc_en = RCC_APB1ENR_UART7EN; regaddr = STM32_RCC_APB1ENR; break; #endif #ifdef CONFIG_STM32_UART8 case STM32_UART8_BASE: - rcc_en = RCC_APB1ENR_USART5EN; + rcc_en = RCC_APB1ENR_UART8EN; regaddr = STM32_RCC_APB1ENR; break; #endif