arch/arm/src/stm32, stm32f7, stm32l4, and related defconfig files: The STM32 RTC driver was being selected by the global CONFIG_RTC option. That is in correct. For example, if you want to disabled the STM32 RTC and use an external RTC you cannot because the external RTC also depends on the global CONFIG_RTC. The solution is to add a new CONFIG_STM32xx_RTC configuration option the permits to you select or deselect the STM32 RTC but still be able to selecte the external RTC.

Documentation/README.html

@@ -8,7 +8,7 @@
   <tr align="center" bgcolor="#e4e4e4">
     <td>
       <h1><big><font color="#3c34ec"><i>NuttX README Files</i></font></big></h1>
-      <p>Last Updated: August 7, 2018</p>
+      <p>Last Updated: August 8, 2018</p>
     </td>
   </tr>
 </table>
@@ -29,8 +29,9 @@ nuttx/
  |- arch/
  |   |
  |   |- arm/
- |   |   `- src
+ |   |   |- src
- |   |       `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/arm/src/lpc214x/README.txt" target="_blank">lpc214x/README.txt</a>
+ |   |      |- <a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/arm/src/lpc214x/README.txt" target="_blank">lpc214x/README.txt</a>
+ |   |      `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/arm/src/stm32l4/README.txt" target="_blank">stm32l4/README.txt</a>
  |   |- renesas/
  |   |   |- include/
  |   |   |   `-<a href="https://bitbucket.org/nuttx/nuttx/src/master/arch/renesas/include/README.txt" target="_blank">README.txt</a>

README.txt

@@ -1706,7 +1706,8 @@ nuttx/
  |   |
  |   |- arm/
  |   |   `- src
- |   |       `- lpc214x/README.txt
+ |   |       |- lpc214x/README.txt
+ |   |       `- stm32l4/README.txt
  |   |- renesas/
  |   |   |- include/
  |   |   |   `-README.txt

arch/arm/src/stm32/Kconfig

@@ -2484,6 +2484,11 @@ config STM32_OPAMP4
 	default n
 	depends on STM32_HAVE_OPAMP4
 
+config STM32_RTC
+	bool "RTC"
+	default n
+	select RTC
+
 config STM32_USBHOST
 	bool
 	default n
@@ -7713,7 +7718,7 @@ config STM32_HAVE_RTC_SUBSECONDS
 	default n
 
 menu "RTC Configuration"
-	depends on RTC
+	depends on STM32_RTC
 
 config STM32_RTC_MAGIC_REG
 	int "BKP register"

arch/arm/src/stm32/Make.defs

@@ -178,7 +178,7 @@ ifeq ($(CONFIG_STM32_PWR),y)
 CHIP_CSRCS += stm32_pwr.c stm32_exti_pwr.c
 endif
 
-ifeq ($(CONFIG_RTC),y)
+ifeq ($(CONFIG_STM32_RTC),y)
 CHIP_CSRCS += stm32_rtc.c
 ifeq ($(CONFIG_RTC_ALARM),y)
 CHIP_CSRCS += stm32_exti_alarm.c

arch/arm/src/stm32/stm32_rcc.c

@@ -122,7 +122,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_RTC) && defined(CONFIG_STM32_PWR) && !defined(CONFIG_STM32_STM32F10XX)
+#if defined(CONFIG_STM32_RTC) && defined(CONFIG_STM32_PWR) && !defined(CONFIG_STM32_STM32F10XX)
 static inline void rcc_resetbkp(void)
 {
   uint32_t regval;

arch/arm/src/stm32/stm32_rtcc.c

@@ -56,7 +56,7 @@
 #include "stm32_exti.h"
 #include "stm32_rtc.h"
 
-#ifdef CONFIG_RTC
+#ifdef CONFIG_STM32_RTC
 
 /************************************************************************************
  * Pre-processor Definitions
@@ -1095,4 +1095,4 @@ int stm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
 }
 #endif
 
-#endif /* CONFIG_RTC */
+#endif /* CONFIG_STM32_RTC */

arch/arm/src/stm32/stm32_rtcounter.c

@@ -110,11 +110,11 @@
 #endif
 
 #ifndef CONFIG_STM32_BKP
-#  error "CONFIG_STM32_BKP is required for CONFIG_RTC"
+#  error "CONFIG_STM32_BKP is required for CONFIG_STM32_RTC"
 #endif
 
 #ifndef CONFIG_STM32_PWR
-#  error "CONFIG_STM32_PWR is required for CONFIG_RTC"
+#  error "CONFIG_STM32_PWR is required for CONFIG_STM32_RTC"
 #endif
 
 #ifdef CONFIG_STM32_STM32F10XX

arch/arm/src/stm32/stm32l15xxx_rtcc.c

@@ -59,7 +59,7 @@
 #include "stm32_exti.h"
 #include "stm32_rtc.h"
 
-#ifdef CONFIG_RTC
+#ifdef CONFIG_STM32_RTC
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -1903,4 +1903,4 @@ int stm32_rtc_cancelperiodic(void)
 }
 #endif
 
-#endif /* CONFIG_RTC */
+#endif /* CONFIG_STM32_RTC */

arch/arm/src/stm32f7/Kconfig

@@ -1422,6 +1422,11 @@ config STM32F7_QUADSPI
 	bool "QuadSPI"
 	default n
 
+config STM32F7_RTC
+	bool "RTC"
+	default n
+	select RTC
+
 config STM32F7_PWR
 	bool "PWR"
 	default n
@@ -2120,7 +2125,7 @@ config STM32F7_HAVE_RTC_SUBSECONDS
 	default y
 
 menu "RTC Configuration"
-	depends on RTC
+	depends on STM32F7_RTC
 
 config STM32F7_RTC_MAGIC_REG
 	int "BKP register"

arch/arm/src/stm32f7/Make.defs

@@ -133,7 +133,7 @@ ifeq ($(CONFIG_STM32F7_PWR),y)
 CHIP_CSRCS += stm32_pwr.c stm32_exti_pwr.c
 endif
 
-ifeq ($(CONFIG_RTC),y)
+ifeq ($(CONFIG_STM32F7_RTC),y)
 CHIP_CSRCS += stm32_rtc.c
 ifeq ($(CONFIG_RTC_ALARM),y)
 CHIP_CSRCS += stm32_exti_alarm.c

arch/arm/src/stm32f7/stm32_rtc.c

@@ -58,7 +58,7 @@
 
 #include <arch/board/board.h>
 
-#ifdef CONFIG_RTC
+#ifdef CONFIG_STM32F7_RTC
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -1982,4 +1982,4 @@ int stm32_rtc_cancelperiodic(void)
 }
 #endif
 
-#endif /* CONFIG_RTC */
+#endif /* CONFIG_STM32F7_RTC */

arch/arm/src/stm32l4/Kconfig

@@ -801,6 +801,11 @@ config STM32L4_HAVE_SAI2
 	bool
 	default n
 
+config STM32L4_RTC
+	bool "RTC"
+	default n
+	select RTC
+
 config STM32L4_HAVE_SDMMC1
 	bool
 	default n
@@ -1457,7 +1462,7 @@ config STM32L4_RTC_MAGIC_TIME_SET
 choice
 	prompt "RTC clock source"
 	default STM32L4_RTC_LSECLOCK
-	depends on RTC
+	depends on STM32L4_RTC
 
 config STM32L4_RTC_LSECLOCK
 	bool "LSE clock"

arch/arm/src/stm32l4/Make.defs

@@ -176,7 +176,7 @@ ifeq ($(CONFIG_STM32L4_PWR),y)
 CHIP_CSRCS += stm32l4_exti_pwr.c
 endif
 
-ifeq ($(CONFIG_RTC),y)
+ifeq ($(CONFIG_STM32L4_RTC),y)
 ifeq ($(CONFIG_RTC_ALARM),y)
 CHIP_CSRCS += stm32l4_exti_alarm.c
 endif

arch/arm/src/stm32l4/stm32l4_rcc.c

@@ -110,7 +110,7 @@
  *
  ****************************************************************************/
 
-#if defined(CONFIG_STM32L4_PWR) && defined(CONFIG_RTC)
+#if defined(CONFIG_STM32L4_PWR) && defined(CONFIG_STM32L4_RTC)
 static inline void rcc_resetbkp(void)
 {
   bool init_stat;

arch/arm/src/stm32l4/stm32l4_rtc.c

@@ -60,7 +60,7 @@
 #include "stm32l4_exti.h"
 #include "stm32l4_rtc.h"
 
-#ifdef CONFIG_RTC
+#ifdef CONFIG_STM32L4_RTC
 
 /****************************************************************************
  * Pre-processor Definitions
@@ -1860,4 +1860,4 @@ int stm32l4_rtc_cancelperiodic(void)
 }
 #endif
 
-#endif /* CONFIG_RTC */
+#endif /* CONFIG_STM32L4_RTC */

configs/cloudctrl/nsh/defconfig

@@ -55,7 +55,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=65536
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
@@ -73,6 +72,7 @@ CONFIG_STM32_PHYSR_10HD=0x1000
 CONFIG_STM32_PHYSR_ALTCONFIG=y
 CONFIG_STM32_PHYSR_ALTMODE=0xf000
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_USART2=y
 CONFIG_STM32_USART2_REMAP=y

configs/fire-stm32v2/nsh/defconfig

@@ -59,7 +59,6 @@ CONFIG_PREALLOC_WDOGS=16
 CONFIG_RAM_SIZE=65536
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_HPWORKPRIORITY=192
 CONFIG_SCHED_HPWORKSTACKSIZE=1024
@@ -70,6 +69,7 @@ CONFIG_STM32_DMA2=y
 CONFIG_STM32_I2C1=y
 CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SDIO=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_USART1=y

configs/hymini-stm32v/nsh2/defconfig

@@ -56,7 +56,6 @@ CONFIG_RAM_SIZE=49152
 CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_HPWORKPRIORITY=192
 CONFIG_SCHED_HPWORKSTACKSIZE=1024
@@ -67,6 +66,7 @@ CONFIG_STM32_BKP=y
 CONFIG_STM32_DMA2=y
 CONFIG_STM32_FSMC=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SDIO=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_TIM3=y

configs/mikroe-stm32f4/fulldemo/defconfig

@@ -113,7 +113,6 @@ CONFIG_RAM_SIZE=114688
 CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_ALARM=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
@@ -131,6 +130,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_OTGFS=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_RNG=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SPI2=y
 CONFIG_STM32_SPI_DMA=y
 CONFIG_STM32_TIM1=y

configs/mikroe-stm32f4/kostest/defconfig

@@ -61,7 +61,6 @@ CONFIG_RAM_SIZE=114688
 CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_ALARM=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
@@ -78,6 +77,7 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_OTGFS=y
 CONFIG_STM32_PWR=y
 CONFIG_STM32_RNG=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SPI2=y
 CONFIG_STM32_TIM1=y
 CONFIG_STM32_USART2=y

configs/nucleo-l432kc/nsh/defconfig

@@ -1,25 +1,24 @@
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_DF_H is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_CMDPARMS is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
-CONFIG_ARCH_BOARD_NUCLEO_L432KC=y
+CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="nucleo-l432kc"
-CONFIG_ARCH_CHIP_STM32L4=y
+CONFIG_ARCH_BOARD_NUCLEO_L432KC=y
 CONFIG_ARCH_CHIP_STM32L432KC=y
+CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
 CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH="arm"
 CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
 CONFIG_BOARD_LOOPSPERMSEC=8499
 CONFIG_BUILTIN=y
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_DISABLE_POLL=y
 CONFIG_EXAMPLES_ALARM=y
-CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_RANDOM=y
 CONFIG_HAVE_CXX=y
@@ -47,7 +46,6 @@ CONFIG_RTC_DATETIME=y
 CONFIG_RTC_DRIVER=y
 CONFIG_RTC_IOCTL=y
 CONFIG_RTC_NALARMS=2
-CONFIG_RTC=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_SPI=y
@@ -56,6 +54,7 @@ CONFIG_STM32L4_DMA1=y
 CONFIG_STM32L4_DMA2=y
 CONFIG_STM32L4_PWR=y
 CONFIG_STM32L4_RNG=y
+CONFIG_STM32L4_RTC=y
 CONFIG_STM32L4_SAI1PLL=y
 CONFIG_STM32L4_SRAM2_HEAP=y
 CONFIG_STM32L4_USART2=y

configs/nucleo-l452re/nsh/defconfig

@@ -50,7 +50,6 @@ CONFIG_RAW_BINARY=y
 CONFIG_READLINE_CMD_HISTORY=y
 CONFIG_READLINE_TABCOMPLETION=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_ALARM=y
 CONFIG_RTC_DATETIME=y
 CONFIG_RTC_DRIVER=y
@@ -69,6 +68,7 @@ CONFIG_STM32L4_DMA2=y
 CONFIG_STM32L4_I2C1=y
 CONFIG_STM32L4_PWR=y
 CONFIG_STM32L4_RNG=y
+CONFIG_STM32L4_RTC=y
 CONFIG_STM32L4_SAI1PLL=y
 CONFIG_STM32L4_SPI1=y
 CONFIG_STM32L4_SRAM2_HEAP=y

configs/nucleo-l476rg/nsh/defconfig

@@ -1,25 +1,24 @@
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_DF_H is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_CMDPARMS is not set
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
-CONFIG_ARCH_BOARD_NUCLEO_L476RG=y
+CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="nucleo-l476rg"
-CONFIG_ARCH_CHIP_STM32L4=y
+CONFIG_ARCH_BOARD_NUCLEO_L476RG=y
 CONFIG_ARCH_CHIP_STM32L476RG=y
+CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
 CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH="arm"
 CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
 CONFIG_BOARD_LOOPSPERMSEC=8499
 CONFIG_BUILTIN=y
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_DISABLE_POLL=y
 CONFIG_EXAMPLES_ALARM=y
-CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_EXAMPLES_NSH=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_EXAMPLES_OSTEST=y
 CONFIG_EXAMPLES_RANDOM=y
 CONFIG_HAVE_CXX=y
@@ -47,7 +46,6 @@ CONFIG_RTC_DATETIME=y
 CONFIG_RTC_DRIVER=y
 CONFIG_RTC_IOCTL=y
 CONFIG_RTC_NALARMS=2
-CONFIG_RTC=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_SPI=y
@@ -56,6 +54,7 @@ CONFIG_STM32L4_DMA1=y
 CONFIG_STM32L4_DMA2=y
 CONFIG_STM32L4_PWR=y
 CONFIG_STM32L4_RNG=y
+CONFIG_STM32L4_RTC=y
 CONFIG_STM32L4_SAI1PLL=y
 CONFIG_STM32L4_SRAM2_HEAP=y
 CONFIG_STM32L4_USART2=y

configs/nucleo-l476rg/nxdemo/defconfig

@@ -5,28 +5,28 @@
 # CONFIG_NSH_DISABLE_IFCONFIG is not set
 # CONFIG_NSH_DISABLE_PS is not set
 # CONFIG_NX_DISABLE_1BPP is not set
-CONFIG_ARCH_BOARD_NUCLEO_L476RG=y
+CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="nucleo-l476rg"
-CONFIG_ARCH_CHIP_STM32L4=y
+CONFIG_ARCH_BOARD_NUCLEO_L476RG=y
 CONFIG_ARCH_CHIP_STM32L476RG=y
+CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
 CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH="arm"
 CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y
 CONFIG_BOARD_LOOPSPERMSEC=8499
 CONFIG_BUILTIN=y
 CONFIG_DEBUG_SYMBOLS=y
 CONFIG_DISABLE_POLL=y
-CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_EXAMPLES_NSH=y
-CONFIG_EXAMPLES_NXHELLO_BPP=1
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_EXAMPLES_NXHELLO=y
+CONFIG_EXAMPLES_NXHELLO_BPP=1
 CONFIG_HAVE_CXX=y
 CONFIG_HAVE_CXXINITIALIZE=y
 CONFIG_INTELHEX_BINARY=y
+CONFIG_LCD=y
 CONFIG_LCD_FRAMEBUFFER=y
 CONFIG_LCD_PCD8544=y
-CONFIG_LCD=y
 CONFIG_MAX_TASKS=16
 CONFIG_MAX_WDOGPARMS=2
 CONFIG_MM_REGIONS=2
@@ -38,9 +38,9 @@ CONFIG_NSH_BUILTIN_APPS=y
 CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_LINELEN=64
 CONFIG_NSH_READLINE=y
-CONFIG_NX_BLOCKING=y
 CONFIG_NX=y
 CONFIG_NXFONT_MONO5X8=y
+CONFIG_NX_BLOCKING=y
 CONFIG_PREALLOC_MQ_MSGS=4
 CONFIG_PREALLOC_TIMERS=4
 CONFIG_PREALLOC_WDOGS=8
@@ -53,7 +53,6 @@ CONFIG_RTC_DATETIME=y
 CONFIG_RTC_DRIVER=y
 CONFIG_RTC_IOCTL=y
 CONFIG_RTC_NALARMS=2
-CONFIG_RTC=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_SPI_CMDDATA=y
@@ -63,6 +62,7 @@ CONFIG_STM32L4_DMA1=y
 CONFIG_STM32L4_DMA2=y
 CONFIG_STM32L4_PWR=y
 CONFIG_STM32L4_RNG=y
+CONFIG_STM32L4_RTC=y
 CONFIG_STM32L4_SAI1PLL=y
 CONFIG_STM32L4_SPI1=y
 CONFIG_STM32L4_SRAM2_HEAP=y

configs/nucleo-l496zg/nsh/defconfig

@@ -52,7 +52,6 @@ CONFIG_RAW_BINARY=y
 CONFIG_READLINE_CMD_HISTORY=y
 CONFIG_READLINE_TABCOMPLETION=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_ALARM=y
 CONFIG_RTC_DATETIME=y
 CONFIG_RTC_DRIVER=y
@@ -80,6 +79,7 @@ CONFIG_STM32L4_I2C4=y
 CONFIG_STM32L4_LPUART1=y
 CONFIG_STM32L4_PWR=y
 CONFIG_STM32L4_RNG=y
+CONFIG_STM32L4_RTC=y
 CONFIG_STM32L4_SAI1PLL=y
 CONFIG_STM32L4_SPI1=y
 CONFIG_STM32L4_SPI2=y

configs/olimexino-stm32/composite/defconfig

@@ -89,7 +89,6 @@ CONFIG_RAM_SIZE=20480
 CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_SERIAL_TERMIOS=y
 CONFIG_STACK_COLORATION=y
@@ -109,6 +108,7 @@ CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP=10
 CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE=40
 CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_SPI2=y

configs/olimexino-stm32/nsh/defconfig

@@ -77,7 +77,6 @@ CONFIG_RAM_SIZE=20480
 CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_SERIAL_TERMIOS=y
 CONFIG_STACK_COLORATION=y
@@ -97,6 +96,7 @@ CONFIG_STM32_I2C_DYNTIMEO_STARTSTOP=10
 CONFIG_STM32_I2C_DYNTIMEO_USECPERBYTE=40
 CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SERIAL_DISABLE_REORDERING=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_SPI2=y

configs/shenzhou/nsh/defconfig

@@ -52,7 +52,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=65536
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
@@ -69,6 +68,7 @@ CONFIG_STM32_PHYSR_10HD=0x1000
 CONFIG_STM32_PHYSR_ALTCONFIG=y
 CONFIG_STM32_PHYSR_ALTMODE=0xf000
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_USART2=y
 CONFIG_STM32_USART2_REMAP=y

configs/shenzhou/thttpd/defconfig

@@ -60,7 +60,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=65536
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_STM32_BKP=y
@@ -75,6 +74,7 @@ CONFIG_STM32_PHYSR_10HD=0x1000
 CONFIG_STM32_PHYSR_ALTCONFIG=y
 CONFIG_STM32_PHYSR_ALTMODE=0xf000
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SPI1=y
 CONFIG_STM32_USART2=y
 CONFIG_STM32_USART2_REMAP=y

configs/stm3210e-eval/pm/defconfig

@@ -70,7 +70,6 @@ CONFIG_PREALLOC_WDOGS=4
 CONFIG_RAM_SIZE=65536
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_ALARM=y
 CONFIG_RTC_FREQUENCY=16384
 CONFIG_RTC_HIRES=y
@@ -88,6 +87,7 @@ CONFIG_STM32_DFU=y
 CONFIG_STM32_FSMC=y
 CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_TIM1=y
 CONFIG_STM32_USART1=y
 CONFIG_STM32_USART2=y

configs/stm3220g-eval/nsh/defconfig

@@ -52,7 +52,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_WAITPID=y
@@ -68,6 +67,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_SPEED=0x0002
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART3=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_PING=y

configs/stm3220g-eval/nsh2/defconfig

@@ -68,7 +68,6 @@ CONFIG_RAMLOG_SYSLOG=y
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_HPWORKPRIORITY=192
@@ -86,6 +85,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_SPEED=0x0002
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SDIO=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_I2CTOOL=y

configs/stm3220g-eval/nxwm/defconfig

@@ -96,7 +96,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_HPWORKPRIORITY=192
@@ -115,6 +114,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_SPEED=0x0002
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART3=y
 CONFIG_STMPE811_ACTIVELOW=y
 CONFIG_STMPE811_EDGE=y

configs/stm3240g-eval/fb/defconfig

@@ -52,7 +52,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_WAITPID=y
@@ -64,6 +63,7 @@ CONFIG_STM32_FSMC_SRAM=y
 CONFIG_STM32_I2C1=y
 CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART3=y
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_USART3_RXBUFSIZE=128

configs/stm3240g-eval/knxwm/defconfig

@@ -72,7 +72,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_HPWORKPRIORITY=192
@@ -84,6 +83,7 @@ CONFIG_STM32_FSMC=y
 CONFIG_STM32_I2C1=y
 CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART3=y
 CONFIG_STMPE811_ACTIVELOW=y
 CONFIG_STMPE811_EDGE=y

configs/stm3240g-eval/nsh/defconfig

@@ -59,7 +59,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_WAITPID=y
@@ -75,6 +74,7 @@ CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_SPEED=0x0002
 CONFIG_STM32_PWR=y
 CONFIG_STM32_RNG=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART3=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_I2CTOOL=y

configs/stm3240g-eval/nsh2/defconfig

@@ -69,7 +69,6 @@ CONFIG_RAMLOG_SYSLOG=y
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_HPWORKPRIORITY=192
@@ -88,6 +87,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_SPEED=0x0002
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_SDIO=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_I2CTOOL=y

configs/stm3240g-eval/nxterm/defconfig

@@ -79,7 +79,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_WAITPID=y
@@ -97,6 +96,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_SPEED=0x0002
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART3=y
 CONFIG_SYSTEM_I2CTOOL=y
 CONFIG_SYSTEM_PING=y

configs/stm3240g-eval/nxwm/defconfig

@@ -93,7 +93,6 @@ CONFIG_PREALLOC_WDOGS=8
 CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_HPWORKPRIORITY=192
@@ -112,6 +111,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_SPEED=0x0002
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART3=y
 CONFIG_STMPE811_ACTIVELOW=y
 CONFIG_STMPE811_EDGE=y

configs/stm3240g-eval/webserver/defconfig

@@ -53,7 +53,6 @@ CONFIG_RAM_SIZE=196608
 CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
 CONFIG_SCHED_WAITPID=y
@@ -69,6 +68,7 @@ CONFIG_STM32_PHYSR_FULLDUPLEX=0x0004
 CONFIG_STM32_PHYSR_MODE=0x0004
 CONFIG_STM32_PHYSR_SPEED=0x0002
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART3=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_SYSTEM_PING=y

configs/stm32f4discovery/pm/defconfig

@@ -39,7 +39,6 @@ CONFIG_RAM_SIZE=114688
 CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_RTC_ALARM=y
 CONFIG_RTC_DATETIME=y
 CONFIG_SCHED_HPWORK=y
@@ -49,6 +48,7 @@ CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_STM32_JTAG_SW_ENABLE=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_TIM1=y
 CONFIG_STM32_USART2=y
 CONFIG_USART2_RXBUFSIZE=128

configs/stm32l476-mdk/nsh/defconfig

@@ -2,25 +2,25 @@
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_CMDPARMS is not set
-CONFIG_ARCH_BOARD_STM32L476_MDK=y
+CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="stm32l476-mdk"
+CONFIG_ARCH_BOARD_STM32L476_MDK=y
 CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_CHIP_STM32L476RG=y
+CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
 CONFIG_ARCH_IRQBUTTONS=y
 CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH="arm"
-CONFIG_BOARD_LOOPSPERMSEC=8499
-CONFIG_BOARDCTL_UNIQUEID_SIZE=12
 CONFIG_BOARDCTL_UNIQUEID=y
+CONFIG_BOARDCTL_UNIQUEID_SIZE=12
+CONFIG_BOARD_LOOPSPERMSEC=8499
 CONFIG_BUILTIN=y
 CONFIG_DEV_LOOP=y
 CONFIG_DEV_ZERO=y
 CONFIG_DISABLE_POLL=y
 CONFIG_EXAMPLES_NSH=y
-CONFIG_FS_PROCFS_REGISTER=y
 CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
 CONFIG_FS_ROMFS=y
 CONFIG_FS_TMPFS=y
 CONFIG_HAVE_CXX=y
@@ -48,7 +48,6 @@ CONFIG_RTC_DATETIME=y
 CONFIG_RTC_DRIVER=y
 CONFIG_RTC_IOCTL=y
 CONFIG_RTC_NALARMS=2
-CONFIG_RTC=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_SPI=y
@@ -57,11 +56,12 @@ CONFIG_STM32L4_DMA1=y
 CONFIG_STM32L4_DMA2=y
 CONFIG_STM32L4_PWR=y
 CONFIG_STM32L4_RNG=y
+CONFIG_STM32L4_RTC=y
 CONFIG_STM32L4_SAI1PLL=y
 CONFIG_STM32L4_USART3=y
 CONFIG_TASK_NAME_SIZE=0
 CONFIG_USART3_SERIAL_CONSOLE=y
-CONFIG_USER_ENTRYPOINT="nsh_main"
-CONFIG_USERLED_LOWER=y
 CONFIG_USERLED=y
+CONFIG_USERLED_LOWER=y
+CONFIG_USER_ENTRYPOINT="nsh_main"
 CONFIG_WDOG_INTRESERVE=1

configs/stm32l476vg-disco/knsh/defconfig

@@ -1,39 +1,38 @@
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_DF_H is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_CMDPARMS is not set
-CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y
+CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="stm32l476vg-disco"
+CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y
 CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_CHIP_STM32L476RG=y
+CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
 CONFIG_ARCH_IRQBUTTONS=y
 CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH="arm"
 CONFIG_ARM_MPU=y
-CONFIG_BOARD_LOOPSPERMSEC=8499
 CONFIG_BOARDCTL_IOCTL=y
-CONFIG_BOARDCTL_UNIQUEID_SIZE=12
 CONFIG_BOARDCTL_UNIQUEID=y
+CONFIG_BOARDCTL_UNIQUEID_SIZE=12
+CONFIG_BOARD_LOOPSPERMSEC=8499
 CONFIG_BUILD_PROTECTED=y
 CONFIG_DEV_LOOP=y
 CONFIG_DEV_ZERO=y
 CONFIG_DISABLE_POLL=y
-CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_EXAMPLES_NSH=y
-CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
 CONFIG_FS_TMPFS=y
 CONFIG_HAVE_CXX=y
 CONFIG_HAVE_CXXINITIALIZE=y
 CONFIG_INTELHEX_BINARY=y
 CONFIG_MAX_TASKS=16
 CONFIG_MAX_WDOGPARMS=2
+CONFIG_MTD=y
 CONFIG_MTD_N25QXXX=y
 CONFIG_MTD_PARTITION=y
-CONFIG_MTD=y
 CONFIG_N25QXXX_SECTOR512=y
 CONFIG_NFILE_DESCRIPTORS=8
 CONFIG_NFILE_STREAMS=8
@@ -58,7 +57,6 @@ CONFIG_RTC_DATETIME=y
 CONFIG_RTC_DRIVER=y
 CONFIG_RTC_IOCTL=y
 CONFIG_RTC_NALARMS=2
-CONFIG_RTC=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_SPI=y
@@ -68,6 +66,7 @@ CONFIG_STM32L4_DMA2=y
 CONFIG_STM32L4_PWR=y
 CONFIG_STM32L4_QSPI=y
 CONFIG_STM32L4_RNG=y
+CONFIG_STM32L4_RTC=y
 CONFIG_STM32L4_SAI1PLL=y
 CONFIG_STM32L4_USART2=y
 CONFIG_SYS_RESERVED=8

configs/stm32l476vg-disco/nsh/defconfig

@@ -1,31 +1,30 @@
 # CONFIG_ARCH_FPU is not set
 # CONFIG_NSH_ARGCAT is not set
-# CONFIG_NSH_CMDOPT_DF_H is not set
 # CONFIG_NSH_CMDOPT_HEXDUMP is not set
 # CONFIG_NSH_CMDPARMS is not set
-CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y
+CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="stm32l476vg-disco"
+CONFIG_ARCH_BOARD_STM32L476VG_DISCO=y
 CONFIG_ARCH_BUTTONS=y
-CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_CHIP_STM32L476RG=y
+CONFIG_ARCH_CHIP_STM32L4=y
 CONFIG_ARCH_INTERRUPTSTACK=2048
 CONFIG_ARCH_IRQBUTTONS=y
 CONFIG_ARCH_STACKDUMP=y
-CONFIG_ARCH="arm"
-CONFIG_BOARD_LOOPSPERMSEC=8499
 CONFIG_BOARDCTL_IOCTL=y
-CONFIG_BOARDCTL_UNIQUEID_SIZE=12
 CONFIG_BOARDCTL_UNIQUEID=y
+CONFIG_BOARDCTL_UNIQUEID_SIZE=12
+CONFIG_BOARD_LOOPSPERMSEC=8499
 CONFIG_BUILTIN=y
 CONFIG_DEV_LOOP=y
 CONFIG_DEV_ZERO=y
 CONFIG_DISABLE_POLL=y
 CONFIG_EXAMPLES_ALARM=y
 CONFIG_EXAMPLES_MEDIA=y
-CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_EXAMPLES_NSH=y
-CONFIG_FS_PROCFS_REGISTER=y
+CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
 CONFIG_FS_PROCFS=y
+CONFIG_FS_PROCFS_REGISTER=y
 CONFIG_FS_ROMFS=y
 CONFIG_FS_TMPFS=y
 CONFIG_HAVE_CXX=y
@@ -33,9 +32,9 @@ CONFIG_HAVE_CXXINITIALIZE=y
 CONFIG_INTELHEX_BINARY=y
 CONFIG_MAX_TASKS=16
 CONFIG_MAX_WDOGPARMS=2
+CONFIG_MTD=y
 CONFIG_MTD_N25QXXX=y
 CONFIG_MTD_PARTITION=y
-CONFIG_MTD=y
 CONFIG_N25QXXX_SECTOR512=y
 CONFIG_NFILE_DESCRIPTORS=8
 CONFIG_NFILE_STREAMS=8
@@ -59,7 +58,6 @@ CONFIG_RTC_DATETIME=y
 CONFIG_RTC_DRIVER=y
 CONFIG_RTC_IOCTL=y
 CONFIG_RTC_NALARMS=2
-CONFIG_RTC=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_SPI=y
@@ -69,6 +67,7 @@ CONFIG_STM32L4_DMA2=y
 CONFIG_STM32L4_PWR=y
 CONFIG_STM32L4_QSPI=y
 CONFIG_STM32L4_RNG=y
+CONFIG_STM32L4_RTC=y
 CONFIG_STM32L4_SAI1PLL=y
 CONFIG_STM32L4_USART2=y
 CONFIG_TASK_NAME_SIZE=0

configs/stm32vldiscovery/nsh/defconfig

@@ -42,13 +42,13 @@ CONFIG_RAM_SIZE=8192
 CONFIG_RAM_START=0x20000000
 CONFIG_RAW_BINARY=y
 CONFIG_RR_INTERVAL=200
-CONFIG_RTC=y
 CONFIG_SCHED_WAITPID=y
 CONFIG_SDCLONE_DISABLE=y
 CONFIG_STDIO_BUFFER_SIZE=0
 CONFIG_STM32_BKP=y
 CONFIG_STM32_JTAG_FULL_ENABLE=y
 CONFIG_STM32_PWR=y
+CONFIG_STM32_RTC=y
 CONFIG_STM32_USART1=y
 CONFIG_SYMTAB_ORDEREDBYNAME=y
 CONFIG_TASK_NAME_SIZE=0