From 6114cf769f0f5ac54424c2142e5c6c43858023fb Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 27 Jan 2015 06:32:01 -0600 Subject: [PATCH 1/4] Update ChangeLog --- ChangeLog | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/ChangeLog b/ChangeLog index 52d1466b443..9a4fa74d9ef 100755 --- a/ChangeLog +++ b/ChangeLog @@ -9524,3 +9524,8 @@ * include/nuttx/math.h and libc/math: Add math library defines for nan(), copysign(), and trunc() functions. From Brennan Ashton (2015-01-26). + * sched/wqueue/kwork_process and libc/wqueue/lib_usrthread.c: Fix + a backward calculation when determining the time to the next event. + This is a bug in the back-up, "fail safe", work queue timing so it + not as bad as it seems. From Liio Chen via the PX4 repository + (2015-01-27). From c74aaafc7244920c81eb12b57eaf46a38a72683c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 27 Jan 2015 09:15:43 -0600 Subject: [PATCH 2/4] Disabling any of EXTI 5-9 interrupts was disabling interrupts for all EXTI 5-9. Same issue with EXTI 10-15. From Jussi Kivilinna. --- arch/arm/src/stm32/stm32_exti_gpio.c | 38 +++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 7 deletions(-) diff --git a/arch/arm/src/stm32/stm32_exti_gpio.c b/arch/arm/src/stm32/stm32_exti_gpio.c index f897691ef0a..ebf9d61dc44 100644 --- a/arch/arm/src/stm32/stm32_exti_gpio.c +++ b/arch/arm/src/stm32/stm32_exti_gpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/stm32/stm32_exti_gpio.c * - * Copyright (C) 2009, 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011-2012, 2015 Gregory Nutt. All rights reserved. * Copyright (C) 2011 Uros Platise. All rights reserved. * Author: Gregory Nutt * Uros Platise @@ -245,12 +245,17 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge, int irq; xcpt_t handler; xcpt_t oldhandler = NULL; + int nshared; + xcpt_t *shared_cbs; + int i; /* Select the interrupt handler for this EXTI pin */ if (pin < 5) { - irq = pin + STM32_IRQ_EXTI0; + irq = pin + STM32_IRQ_EXTI0; + nshared = 1; + shared_cbs = &stm32_exti_callbacks[pin]; switch (pin) { case 0: @@ -276,13 +281,17 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge, } else if (pin < 10) { - irq = STM32_IRQ_EXTI95; - handler = stm32_exti95_isr; + irq = STM32_IRQ_EXTI95; + handler = stm32_exti95_isr; + shared_cbs = &stm32_exti_callbacks[5]; + nshared = 5; } else { - irq = STM32_IRQ_EXTI1510; - handler = stm32_exti1510_isr; + irq = STM32_IRQ_EXTI1510; + handler = stm32_exti1510_isr; + shared_cbs = &stm32_exti_callbacks[10]; + nshared = 6; } /* Get the previous GPIO IRQ handler; Save the new IRQ handler. */ @@ -299,7 +308,22 @@ xcpt_t stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge, } else { - up_disable_irq(irq); + /* Only disable IRQ if shared handler does not have any active + * callbacks. + */ + + for (i = 0; i < nshared; i++) + { + if (shared_cbs[i] != NULL) + { + break; + } + } + + if (i == nshared) + { + up_disable_irq(irq); + } } /* Configure GPIO, enable EXTI line enabled if event or interrupt is From 4146fdbe8f71989c9185defea96a0b98c2169b32 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 27 Jan 2015 09:20:42 -0600 Subject: [PATCH 3/4] Recent changes to stm32_rtcc.c do not compile with STM32L15XX configurations. From Jussi Kivilinna. --- arch/arm/src/stm32/Kconfig | 2 ++ arch/arm/src/stm32/stm32_rtcc.c | 17 +++++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index c7c46b04038..5dd9f299dc1 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -3251,11 +3251,13 @@ config RTC_LSECLOCK config RTC_LSICLOCK bool "LSI clock" + depends on !STM32_STM32L15XX ---help--- Drive the RTC with the LSI clock config RTC_HSECLOCK bool "HSE clock" + depends on !STM32_STM32L15XX ---help--- Drive the RTC with the HSE clock, divided down to 1MHz. diff --git a/arch/arm/src/stm32/stm32_rtcc.c b/arch/arm/src/stm32/stm32_rtcc.c index 817111d5876..ea49fa2e6ad 100644 --- a/arch/arm/src/stm32/stm32_rtcc.c +++ b/arch/arm/src/stm32/stm32_rtcc.c @@ -51,6 +51,8 @@ #include "up_arch.h" +#include "stm32_rcc.h" +#include "stm32_pwr.h" #include "stm32_rtc.h" #ifdef CONFIG_RTC @@ -77,6 +79,14 @@ # undef CONFIG_DEBUG_RTC #endif +#ifdef CONFIG_STM32_STM32L15XX +# if defined(CONFIG_RTC_HSECLOCK) +# error "RTC with HSE clock not yet implemented for STM32L15XXX" +# elif defined(CONFIG_RTC_LSICLOCK) +# error "RTC with LSI clock not yet implemented for STM32L15XXX" +# endif +#endif + /* Constants ************************************************************************/ #define SYNCHRO_TIMEOUT (0x00020000) @@ -435,6 +445,7 @@ static int rtc_setup(void) uint32_t regval; int ret; +#ifndef CONFIG_STM32_STM32L15XX /* We might be changing RTCSEL - to ensure such changes work, we must reset the * backup domain */ @@ -475,6 +486,12 @@ static int rtc_setup(void) stm32_rcc_enablelse(); #endif +#else + /* Enable the LSE clock */ + + stm32_rcc_enablelse(); + +#endif /* CONFIG_STM32_STM32L15XX */ /* Wait for the RTC Time and Date registers to be synchronized with RTC APB * clock. From a8f6e24554f4a418ba033f136476ff8170313d5d Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 27 Jan 2015 09:24:30 -0600 Subject: [PATCH 4/4] Update ChangeLogs --- ChangeLog | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/ChangeLog b/ChangeLog index 9a4fa74d9ef..11e43c1dd12 100755 --- a/ChangeLog +++ b/ChangeLog @@ -9529,3 +9529,9 @@ This is a bug in the back-up, "fail safe", work queue timing so it not as bad as it seems. From Liio Chen via the PX4 repository (2015-01-27). + * arch/arm/src/stm32/stm32_exti_gpio.c: Disabling any of EXTI 5-9 + interrupts was disabling interrupts for all EXTI 5-9. Same issue with + EXTI 10-15. From Jussi Kivilinna (2015-01-27). + * arch/arm/src/stm32/stm32_rtcc.c and Kconfig: Recent changes to + stm32_rtcc.c do not compile with STM32L15XX configurations. From + Jussi Kivilinna (2015-01-27).