Squashed commit of the following:

arch/arm:  Remove support for CONFIG_ARMV7M_CMNVECTOR.  It is now the only vector support available.  Also remove CONFIG_HAVE_CMNVECTOR.  That no longer signifies anything."
    arch/arm/src/stm32:  This commit removes support for the dedicated vector handling from the STM32 architecture support. Only common vectors are now supported.
This commit is contained in:
Gregory Nutt
2018-06-20 12:30:37 -06:00
parent 2ec450f185
commit 8bd9cfe038
247 changed files with 1540 additions and 4809 deletions
+1 -1
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@@ -55,7 +55,7 @@
/* Included implementation-dependent register save structure layouts */
#if defined(CONFIG_ARMV7M_CMNVECTOR) && !defined(CONFIG_ARMV7M_LAZYFPU)
#ifndef CONFIG_ARMV7M_LAZYFPU
# include <arch/armv7-m/irq_cmnvector.h>
#else
# include <arch/armv7-m/irq_lazyfpu.h>
+4 -4
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@@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/include/stm32/stm32f10xxx_irq.h
*
* Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2012, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -129,7 +129,7 @@
# define STM32_IRQ_DMA2CH45 (75) /* 59: DMA2 Channel 4 and 5 global interrupt */
# define STM32_IRQ_DMA2CH5 (76) /* 60: DMA2 Channel 5 global interrupt */
# define NR_VECTORS (77)
# define STM32_IRQ_NEXTINT (61)
# define NR_IRQS (77)
/* Connectivity Line Devices */
@@ -204,7 +204,7 @@
# define STM32_IRQ_CAN2SCE (82) /* 66: CAN2 SCE interrupt */
# define STM32_IRQ_OTGFS (83) /* 67: USB On The Go FS global interrupt */
# define NR_VECTORS (84)
# define STM32_IRQ_NEXTINT (68)
# define NR_IRQS (84)
/* Medium and High Density Devices */
@@ -271,7 +271,7 @@
# define STM32_IRQ_DMA2CH3 (74) /* 58: DMA2 Channel 3 global interrupt */
# define STM32_IRQ_DMA2CH45 (75) /* 59: DMA2 Channel 4&5 global interrupt */
# define NR_VECTORS (76)
# define STM32_IRQ_NEXTINT (60)
# define NR_IRQS (76)
/* Convenience definitions for interrupts with multiple functions */
+2 -2
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@@ -1,7 +1,7 @@
/****************************************************************************************************
* arch/arm/include/stm32/stm32f20xxx_irq.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -150,7 +150,7 @@
#define STM32_IRQ_HASH (STM32_IRQ_FIRST+80) /* 80: Hash and Rng global interrupt */
#define STM32_IRQ_RNG (STM32_IRQ_FIRST+80) /* 80: Hash and Rng global interrupt */
#define NR_VECTORS (STM32_IRQ_FIRST+81)
#define STM32_IRQ_NEXTINT (81)
#define NR_IRQS (STM32_IRQ_FIRST+81)
/****************************************************************************************************
+2 -2
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@@ -1,7 +1,7 @@
/****************************************************************************************************
* arch/arm/include/stm32/stm32f30xxx_irq.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -161,7 +161,7 @@
#define STM32_IRQ_RESERVED80 (STM32_IRQ_FIRST+80) /* 80: Reserved */
#define STM32_IRQ_FPU (STM32_IRQ_FIRST+81) /* 81: FPU global interrupt */
#define NR_VECTORS (STM32_IRQ_FIRST+82)
#define STM32_IRQ_NEXTINT (82)
#define NR_IRQS (STM32_IRQ_FIRST+82)
/****************************************************************************************************
+2 -2
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@@ -1,7 +1,7 @@
/****************************************************************************************************
* arch/arm/include/stm32/stm32f33xxx_irq.h
*
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2017, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Modified for STM32F334 by Mateusz Szafoni <raiden00@railab.me>
*
@@ -152,7 +152,7 @@
#define STM32_IRQ_RESERVED80 (STM32_IRQ_FIRST+80) /* 80: Reserved */
#define STM32_IRQ_FPU (STM32_IRQ_FIRST+81) /* 81: FPU global interrupt */
#define NR_VECTORS (STM32_IRQ_FIRST+82)
#define STM32_IRQ_NEXTINT (82)
#define NR_IRQS (STM32_IRQ_FIRST+82)
/****************************************************************************************************
+2 -2
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@@ -1,7 +1,7 @@
/****************************************************************************************************
* arch/arm/include/stm32/stm32f37xxx_irq.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Modified for STM32F373 by Marten Svanfeldt <marten@svanfeldt.com>
*
@@ -147,7 +147,7 @@
#define STM32_IRQ_RESERVED80 (STM32_IRQ_FIRST+80) /* 80: Reserved */
#define STM32_IRQ_FPU (STM32_IRQ_FIRST+81) /* 81: FPU global interrupt */
#define NR_VECTORS (STM32_IRQ_FIRST+82)
#define STM32_IRQ_NEXTINT (82)
#define NR_IRQS (STM32_IRQ_FIRST+82)
/****************************************************************************************************
+7 -7
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@@ -1,7 +1,7 @@
/****************************************************************************************************
* arch/arm/include/stm32/stm32f40xxx_irq.h
*
* Copyright (C) 2009, 2014-2015, 2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2014-2015, 2017-2018 Gregory Nutt. All rights reserved.
* Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* David Sidrane <david_s5@nscdg.com>
@@ -321,22 +321,22 @@
#if defined(CONFIG_STM32_STM32F401) || defined(CONFIG_STM32_STM32F411) || \
defined(CONFIG_STM32_STM32F405) || defined(CONFIG_STM32_STM32F407)
# define NR_VECTORS (STM32_IRQ_FIRST+82)
# define STM32_IRQ_NEXTINT (82)
# define NR_IRQS (STM32_IRQ_FIRST+82)
#elif defined(CONFIG_STM32_STM32F410)
# define NR_VECTORS (STM32_IRQ_FIRST+98)
# define STM32_IRQ_NEXTINT (98)
# define NR_IRQS (STM32_IRQ_FIRST+98)
#elif defined(CONFIG_STM32_STM32F427)
# define NR_VECTORS (STM32_IRQ_FIRST+87)
# define STM32_IRQ_NEXTINT (87)
# define NR_IRQS (STM32_IRQ_FIRST+87)
#elif defined(CONFIG_STM32_STM32F429)
# define NR_VECTORS (STM32_IRQ_FIRST+91)
# define STM32_IRQ_NEXTINT (91)
# define NR_IRQS (STM32_IRQ_FIRST+91)
#elif defined(CONFIG_STM32_STM32F446)
# define NR_VECTORS (STM32_IRQ_FIRST+97)
# define STM32_IRQ_NEXTINT (97)
# define NR_IRQS (STM32_IRQ_FIRST+97)
#elif defined(CONFIG_STM32_STM32F469)
# define NR_VECTORS (STM32_IRQ_FIRST+93)
# define STM32_IRQ_NEXTINT (93)
# define NR_IRQS (STM32_IRQ_FIRST+93)
#endif
+4 -4
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@@ -2,7 +2,7 @@
* arch/arm/include/stm32/stm32l15xxx_irq.h
* For STM32L100xx, STM32L151xx, STM32L152xx and STM32L162xx advanced ARM-based 32-bit MCUs
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -108,7 +108,7 @@
# define STM32_IRQ_TIM6 (STM32_IRQ_FIRST+43) /* 43: TIM6 global interrupt */
# define STM32_IRQ_TIM7 (STM32_IRQ_FIRST+44) /* 44: TIM7 global interrupt */
# define NR_VECTORS (STM32_IRQ_FIRST+45)
# define STM32_IRQ_NEXTINT (45)
# define NR_IRQS (STM32_IRQ_FIRST+45)
/* External interrupts (vectors >= 16) medium+ density devices */
@@ -171,7 +171,7 @@
# define STM32_IRQ_AES (STM32_IRQ_FIRST+52) /* 52: AES global interrupt */
# define STM32_IRQ_COMPACQ (STM32_IRQ_FIRST+53) /* 53: Comparator Channel Acquisition Interrupt */
# define NR_VECTORS (STM32_IRQ_FIRST+54)
# define STM32_IRQ_NEXTINT (54)
# define NR_IRQS (STM32_IRQ_FIRST+54)
/* External interrupts (vectors >= 16) high density devices */
@@ -237,7 +237,7 @@
# define STM32_IRQ_AES (STM32_IRQ_FIRST+55) /* 55: AES global interrupt */
# define STM32_IRQ_COMPACQ (STM32_IRQ_FIRST+56) /* 56: Comparator Channel Acquisition Interrupt */
# define NR_VECTORS (STM32_IRQ_FIRST+57)
# define STM32_IRQ_NEXTINT (57)
# define NR_IRQS (STM32_IRQ_FIRST+57)
#else
# error "Unknown STM32L density"