This adds basic architectural support for the LPC546xx family and includes support for the LPCXpresso-LPC54628 board. The basic NSH port is almost complete... still lacking GPIO support and LED support. There are still no significant drivers available.

Squashed commit of the following:

    arch/arm/src/lpc54xx:  Finish off some missing logic.  Complete now execpt for GPIO and LED support.
    arch/arm/src/lpc54xx:  Add lpc54_clrpend.c
    arch/arm/src/lpc54xx:  Serial driver is complete and compiles.
    arch/arm/src/lpc54xx:  Add beginning of a serial driver (still missing some logic)
    arch/arm/src/lpc54xx:  Fleshes out low level USART intialization.
    arch/arm/src/lpc546xx/Kconfig: Add hooks to integrate with common seril upper half.
    arch/arm/src/lpc54xx:  Beginning of USART console support.
    arch/arm/src/lpc54xx: Completes very basic clock configuration.
    arch/arm/src/lpc54xx:  Add clocking logic (still not complete)
    arch/arm/src/lpc54xx:  Beginning of PLL configuration logic.
    arch/arm/src/lpc54xx:  Fix a few things from first compile attempt.  Compilation cannot work until I at least finish the clock configuration logic.
    arch/arm/src/lpc54xx: Addes some SysTick logic.
    arch/arm/src/lpc54xx:  Completes basic startup logic (sans clock configuration) and interrupt configuration.
     arch/arm/src/lpc54xx:  Add generic ARMv7-M start-up logic (needs LPC54628 customizations); add emtpy file that will eventually hold the clock configuration logic.
    arch/arm/src/lpc54xx:  Add (incomplete) SYSCON register definition header file.
    arch/arm/src/lpc54xx:  Add FLEXCOMM header file.
    arch/arm/src/lpc54xx:  Bring in tickless clock logic from LPC43; configs/lpcxpresso-lpc54628: mount procfs if enabled.
    arch/arm/src/lpc54xx: Add RIT clock definitions; add SysTick initialization (not finished)
    LPC54xx and LPCXpresso-LPC54628: add more boilerplate files and stubbed out files.
    arch/arm/src/lpc54xx:  Add (incomplete) USART header file.
    Add another condition to a Kconfig; refresh a defconfig.
    arch/arm/src/lpc54xx/chip: Add LPC54628 memory map header files.
    configs/lpcxpresso-lpc54628:  Add basic build files for the LPCXpresso-LPC54628
    arch/: Basic build directory structure for the LPC54628
This commit is contained in:
Gregory Nutt
2017-12-07 13:30:02 -06:00
parent ba64499bc7
commit 8bc90a1899
50 changed files with 9557 additions and 19 deletions
+75
View File
@@ -461,6 +461,11 @@ config USART8_SERIALDRIVER
default n
select MCU_SERIAL
config USART9_SERIALDRIVER
bool
default n
select MCU_SERIAL
config OTHER_UART_SERIALDRIVER
bool
default n
@@ -667,6 +672,11 @@ config USART8_SERIAL_CONSOLE
depends on USART8_SERIALDRIVER
select SERIAL_CONSOLE
config USART9_SERIAL_CONSOLE
bool "USART8"
depends on USART9_SERIALDRIVER
select SERIAL_CONSOLE
config SCI0_SERIAL_CONSOLE
bool "SCI0"
depends on SCI0_SERIALDRIVER
@@ -1924,6 +1934,71 @@ config UART8_DMA
endmenu
menu "USART9 Configuration"
depends on USART9_SERIALDRIVER
config USART9_RXBUFSIZE
int "Receive buffer size"
default 256
---help---
Characters are buffered as they are received. This specifies
the size of the receive buffer.
config USART9_TXBUFSIZE
int "Transmit buffer size"
default 256
---help---
Characters are buffered before being sent. This specifies
the size of the transmit buffer.
config USART9_BAUD
int "BAUD rate"
default 115200
---help---
The configured BAUD of the USART.
config USART9_BITS
int "Character size"
default 8
---help---
The number of bits. Must be either 7 or 8.
config USART9_PARITY
int "Parity setting"
default 0
range 0 2
---help---
0=no parity, 1=odd parity, 2=even parity
config USART9_2STOP
int "Uses 2 stop bits"
default 0
---help---
1=Two stop bits
config USART9_IFLOWCONTROL
bool "USART9 RTS flow control"
default n
select SERIAL_IFLOWCONTROL
---help---
Enable USART9 RTS flow control
config USART9_OFLOWCONTROL
bool "USART9 CTS flow control"
default n
select SERIAL_OFLOWCONTROL
---help---
Enable USART9 CTS flow control
config USART9_DMA
bool "USART9 DMA support"
default n
select SERIAL_DMA
---help---
Enable DMA transfers on USART9
endmenu
menu "SCI0 Configuration"
depends on SCI0_SERIALDRIVER