SAMD20: SPI driver is code-complete, but untested

This commit is contained in:
Gregory Nutt
2014-02-20 09:59:54 -06:00
parent e013c96358
commit 8bbf4f3ec8
7 changed files with 441 additions and 83 deletions
+2
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@@ -6626,4 +6626,6 @@
a lot of missing logic (2014-2-19).
* arch/arm/src/lm/lm_lowputc.c and lm_serial.c: Several errors
are unmasked with UARTs > UART2 are enabled. From gosha (2014-2-19).
* arch/arm/src/samd/sam_spi.c: The SPI driver is code complete,
but untested (2014-2-19).
+10 -7
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@@ -145,15 +145,18 @@
# define SPI_CTRLA_MODE_MASTER (3 << SPI_CTRLA_MODE_SHIFT) /* SPI master operation */
#define SPI_CTRLA_RUNSTDBY (1 << 7) /* Bit 7: Run in standby */
#define SPI_CTRLA_IBON (1 << 8) /* Bit 8: Immediate BUFOVF notification */
#define SPI_CTRLA_DOPO (1 << 16) /* Bit 16: Data out pinout */
# define SPI_CTRLA_DOPAD0 (0)
# define SPI_CTRLA_DOPAD2 SPI_CTRLA_DOPO
#define SPI_CTRLA_DOPO_SHIFT (16) /* Bit 16-17: Data out pinout */
#define SPI_CTRLA_DOPO_MASK (3 << SPI_CTRLA_DOPO_SHIFT) /* Bit 16-17: Data out pinout */
# define SPI_CTRLA_DOPO_DOPAD012 (0 << SPI_CTRLA_DOPO_SHIFT) /* D0=PAD0 SCK=PAD1 SS=PAD2 */
# define SPI_CTRLA_DOPO_DOPAD231 (1 << SPI_CTRLA_DOPO_SHIFT) /* D0=PAD2 SCK=PAD3 SS=PAD1 */
# define SPI_CTRLA_DOPO_DOPAD312 (2 << SPI_CTRLA_DOPO_SHIFT) /* D0=PAD3 SCK=PAD1 SS=PAD2 */
# define SPI_CTRLA_DOPO_DOPAD031 (3 << SPI_CTRLA_DOPO_SHIFT) /* D0=PAD0 SCK=PAD3 SS=PAD1 */
#define SPI_CTRLA_DIPO_SHIFT (20) /* Bits 20-21: Data in pinout */
#define SPI_CTRLA_DIPO_MASK (3 << SPI_CTRLA_DIPO_SHIFT)
# define SPI_CTRLA_DIPAD0 (0 << SPI_CTRLA_DIPO_SHIFT) /* SERCOM PAD[0] for DI */
# define SPI_CTRLA_DIPAD1 (1 << SPI_CTRLA_DIPO_SHIFT) /* SERCOM PAD[1] for DI */
# define SPI_CTRLA_DIPAD2 (2 << SPI_CTRLA_DIPO_SHIFT) /* SERCOM PAD[2] for DI */
# define SPI_CTRLA_DIPAD3 (3 << SPI_CTRLA_DIPO_SHIFT) /* SERCOM PAD[3] for DI */
# define SPI_CTRLA_DIPAD0 (0 << SPI_CTRLA_DIPO_SHIFT) /* SERCOM PAD0 for DI */
# define SPI_CTRLA_DIPAD1 (1 << SPI_CTRLA_DIPO_SHIFT) /* SERCOM PAD1 for DI */
# define SPI_CTRLA_DIPAD2 (2 << SPI_CTRLA_DIPO_SHIFT) /* SERCOM PAD2 for DI */
# define SPI_CTRLA_DIPAD3 (3 << SPI_CTRLA_DIPO_SHIFT) /* SERCOM PAD3 for DI */
#define SPI_CTRLA_FORM_SHIFT (24) /* Bits 24-27: Frame format */
#define SPI_CTRLA_FORM_MASK (7 << SPI_CTRLA_FORM_SHIFT)
# define SPI_CTRLA_FORM_SPI (0 << SPI_CTRLA_FORM_SHIFT) /* SPI frame (no address) */
+3 -1
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@@ -56,6 +56,8 @@
#include "sam_config.h"
#include <arch/board/board.h>
#include "chip/sam_pm.h"
#include "chip/sam_gclk.h"
#include "chip/sam_usart.h"
@@ -301,7 +303,7 @@ int sam_usart_internal(const struct sam_usart_config_s * const config)
/* Configure the GCLKs for the SERCOM module */
sercom_coreclk_configure(config->sercom, config->gclkgen, false);
sercom_slowclk_configure(config->gclkgen);
sercom_slowclk_configure(BOARD_SERCOM_SLOW_GCLKGEN);
/* Set USART configuration according to the board configuration */
+3 -1
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@@ -44,7 +44,9 @@
#include <stdbool.h>
#include "up_arch.h"
#include "sam_config.h"
#include "chip/sam_pm.h"
/****************************************************************************
* Pre-processor Definitions
@@ -85,7 +87,7 @@ extern "C"
*
****************************************************************************/
static inline int sercom_enable(int sercom)
static inline void sercom_enable(int sercom)
{
uint32_t regval;
+1 -1
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@@ -561,7 +561,7 @@ static int sam_interrupt(struct uart_dev_s *dev)
uint8_t intflag;
uint8_t inten;
/* Get the set of pending USART usarts (we are only interested in the
/* Get the set of pending USART interrupts (we are only interested in the
* unmasked interrupts).
*/
File diff suppressed because it is too large Load Diff
+78 -21
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@@ -355,7 +355,65 @@
#endif
/* SERCOM definitions ***************************************************************/
/* SERCOM4 is available on connectors EXT1, EXT2, and EXT3
/* This is the source clock generator for the GCLK_SERCOM_SLOW clock that is common
* to all SERCOM modules.
*/
#define BOARD_SERCOM_SLOW_GCLKGEN (GCLK_CLKCTRL_GEN0 >> GCLK_CLKCTRL_GEN_SHIFT)
/* SERCOM0 SPI is available on EXT1
*
* PIN PORT SERCOM FUNCTION
* --- ------------------ -----------
* 15 PA5 SERCOM0 PAD1 SPI SS
* 16 PA6 SERCOM0 PAD2 SPI MOSI
* 17 PA4 SERCOM0 PAD0 SPI MISO
* 18 PA7 SERCOM0 PAD3 SPI SCK
*/
#define BOARD_SERCOM0_CLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM0_MUX_SETTING (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0)
#define BOARD_SERCOM0_PINMUX_PAD0 PINMUX_PA04D_SERCOM0_PAD0 /* SPI_MISO */
#define BOARD_SERCOM0_PINMUX_PAD1 0 /* microSD_SS */
#define BOARD_SERCOM0_PINMUX_PAD2 PINMUX_PA06D_SERCOM0_PAD2 /* SPI_MOSI */
#define BOARD_SERCOM0_PINMUX_PAD3 PINMUX_PA07D_SERCOM0_PAD3 /* SPI_SCK */
/* SERCOM1 SPI is available on EXT2
*
* PIN PORT SERCOM FUNCTION
* --- ------------------ -----------
* 15 PA17 SERCOM1 PAD1 SPI SS
* 16 PA18 SERCOM1 PAD2 SPI MOSI
* 17 PA16 SERCOM1 PAD0 SPI MISO
* 18 PA19 SERCOM1 PAD3 SPI SCK
*/
#define BOARD_SERCOM1_CLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM1_MUX_SETTING (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0)
#define BOARD_SERCOM1_PINMUX_PAD0 PINMUX_PA16C_SERCOM1_PAD0 /* SPI_MISO */
#define BOARD_SERCOM1_PINMUX_PAD1 0 /* microSD_SS */
#define BOARD_SERCOM1_PINMUX_PAD2 PINMUX_PA18C_SERCOM1_PAD2 /* SPI_MOSI */
#define BOARD_SERCOM1_PINMUX_PAD3 PINMUX_PA19C_SERCOM1_PAD3 /* SPI_SCK */
/* The SAMD20 Xplained Pro contains an Embedded Debugger (EDBG) that can be
* used to program and debug the ATSAMD20J18A using Serial Wire Debug (SWD).
* The Embedded debugger also include a Virtual COM port interface over
* SERCOM3. Virtual COM port connections:
*
* PA24 SERCOM3 / USART TXD
* PA25 SERCOM3 / USART RXD
*/
#define BOARD_SERCOM3_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM3_MUXCONFIG (USART_CTRLA_RXPAD3 | USART_CTRLA_TXPAD2)
#define BOARD_SERCOM3_PINMAP_PAD0 0
#define BOARD_SERCOM3_PINMAP_PAD1 0
#define BOARD_SERCOM3_PINMAP_PAD2 PORT_SERCOM3_PAD2_1 /* USART TX */
#define BOARD_SERCOM3_PINMAP_PAD3 PORT_SERCOM3_PAD3_1 /* USART RX */
#define BOARD_SERCOM3_FREQUENCY BOARD_GCLK0_FREQUENCY
/* The SERCOM4 USART is available on connectors EXT1, EXT2, and EXT3
*
* PIN EXT1 EXT2 EXT3 GPIO Function
* ---- ---- ---- ---- ------------------
@@ -374,43 +432,42 @@
#if defined(CONFIG_SAMD20_XPLAINED_USART4_EXT1)
# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0)
# define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_3
# define BOARD_SERCOM4_PINMAP_PAD1 PORT_SERCOM4_PAD1_3
# define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_3 /* USART TX */
# define BOARD_SERCOM4_PINMAP_PAD1 PORT_SERCOM4_PAD1_3 /* USART RX */
# define BOARD_SERCOM4_PINMAP_PAD2 0
# define BOARD_SERCOM4_PINMAP_PAD3 0
#elif defined(CONFIG_SAMD20_XPLAINED_USART4_EXT2)
# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0)
# define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_1
# define BOARD_SERCOM4_PINMAP_PAD1 PORT_SERCOM4_PAD1_1
# define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_1 /* USART TX */
# define BOARD_SERCOM4_PINMAP_PAD1 PORT_SERCOM4_PAD1_1 /* USART RX */
# define BOARD_SERCOM4_PINMAP_PAD2 0
# define BOARD_SERCOM4_PINMAP_PAD3 0
#else /* if defined(CONFIG_SAMD20_XPLAINED_USART4_EXT3) */
# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD3 | USART_CTRLA_TXPAD2)
# define BOARD_SERCOM4_PINMAP_PAD0 0
# define BOARD_SERCOM4_PINMAP_PAD1 0
# define BOARD_SERCOM4_PINMAP_PAD2 PORT_SERCOM4_PAD2_3
# define BOARD_SERCOM4_PINMAP_PAD3 PORT_SERCOM4_PAD3_3
# define BOARD_SERCOM4_PINMAP_PAD2 PORT_SERCOM4_PAD2_3 /* USART TX */
# define BOARD_SERCOM4_PINMAP_PAD3 PORT_SERCOM4_PAD3_3 /* USART RX */
#endif
#define BOARD_SERCOM4_FREQUENCY BOARD_GCLK0_FREQUENCY
/* The SAMD20 Xplained Pro contains an Embedded Debugger (EDBG) that can be
* used to program and debug the ATSAMD20J18A using Serial Wire Debug (SWD).
* The Embedded debugger also include a Virtual COM port interface over
* SERCOM3. Virtual COM port connections:
/* SERCOM5 SPI is available on EXT3
*
* PA24 SERCOM3 / USART TXD
* PA25 SERCOM3 / USART RXD
* PIN PORT SERCOM FUNCTION
* --- ------------------ -----------
* 15 PB17 SERCOM5 PAD1 SPI SS
* 16 PB22 SERCOM5 PAD2 SPI MOSI
* 17 PB16 SERCOM5 PAD0 SPI MISO
* 18 PB23 SERCOM5 PAD3 SPI SCK
*/
#define BOARD_SERCOM3_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM3_MUXCONFIG (USART_CTRLA_RXPAD3 | USART_CTRLA_TXPAD2)
#define BOARD_SERCOM3_PINMAP_PAD0 0
#define BOARD_SERCOM3_PINMAP_PAD1 0
#define BOARD_SERCOM3_PINMAP_PAD2 PORT_SERCOM3_PAD2_1
#define BOARD_SERCOM3_PINMAP_PAD3 PORT_SERCOM3_PAD3_1
#define BOARD_SERCOM3_FREQUENCY BOARD_GCLK0_FREQUENCY
#define BOARD_SERCOM5_CLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM5_MUX_SETTING (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0)
#define BOARD_SERCOM5_PINMUX_PAD0 PINMUX_PB16C_SERCOM5_PAD0 /* SPI_MISO */
#define BOARD_SERCOM5_PINMUX_PAD1 0 /* microSD_SS */
#define BOARD_SERCOM5_PINMUX_PAD2 PINMUX_PB22D_SERCOM5_PAD2 /* SPI_MOSI */
#define BOARD_SERCOM5_PINMUX_PAD3 PINMUX_PB23D_SERCOM5_PAD3 /* SPI_SCK */
/* LED definitions ******************************************************************/
/* There are three LEDs on board the SAMD20 Xplained Pro board: The EDBG