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arch: x86_64: Check only XSAVE and rename __eanble_sse3 to __enable_sse_avx

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This commit is contained in:
Yang Chung-Fan
2020-05-05 16:14:00 +09:00
committed by Brennan Ashton
parent 2936f72651
commit 8b86fae8d3
4 changed files with 13 additions and 13 deletions
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arch/x86_64/include/intel64/arch.h
+1 -1
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@@ -580,7 +580,7 @@ extern volatile struct gdt_entry_s *gdt64;
int up_map_region(void *base, int size, int flags); int up_map_region(void *base, int size, int flags);
void x86_64_check_and_enable_capability(void); void x86_64_check_and_enable_capability(void);
extern void __enable_sse3(void); extern void __enable_sse_avx(void);
extern void __revoke_low_memory(void); extern void __revoke_low_memory(void);
extern void __enable_pcid(void); extern void __enable_pcid(void);
arch/x86_64/src/intel64/Kconfig
+4 -3
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@@ -34,11 +34,12 @@ config ARCH_INTEL64_APIC_FREQ_KHZ
endif endif
config ARCH_INTEL64_HAVE_SSE3 config ARCH_INTEL64_HAVE_XSAVE
bool "SSE3 support" bool "XSAVE support"
default y default y
---help--- ---help---
Select to enable the use of SSE3 and FPU functions of x86_64 Select to enable the use of XSAVE and FPU/SSE/AVX functions
of x86_64
config ARCH_INTEL64_HAVE_PCID config ARCH_INTEL64_HAVE_PCID
bool "PCID support" bool "PCID support"
arch/x86_64/src/intel64/intel64_check_capability.c
+3 -4
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@@ -67,8 +67,7 @@ void x86_64_check_and_enable_capability(void)
require |= X86_64_CPUID_01_TSCDEA; require |= X86_64_CPUID_01_TSCDEA;
#endif #endif
#ifdef CONFIG_ARCH_INTEL64_HAVE_SSE3 #ifdef CONFIG_ARCH_INTEL64_HAVE_XSAVE
require |= X86_64_CPUID_01_SSE3;
require |= X86_64_CPUID_01_XSAVE; require |= X86_64_CPUID_01_XSAVE;
#endif #endif
@@ -90,8 +89,8 @@ void x86_64_check_and_enable_capability(void)
goto err; goto err;
} }
#ifdef CONFIG_ARCH_INTEL64_HAVE_SSE3 #ifdef CONFIG_ARCH_INTEL64_HAVE_XSAVE
__enable_sse3(); __enable_sse_avx();
#endif #endif
#ifdef CONFIG_ARCH_INTEL64_HAVE_PCID #ifdef CONFIG_ARCH_INTEL64_HAVE_PCID
arch/x86_64/src/intel64/intel64_head.S
+5 -5
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@@ -63,7 +63,7 @@
****************************************************************************/ ****************************************************************************/
.global __pmode_entry /* The 32bit protected mode entry */ .global __pmode_entry /* The 32bit protected mode entry */
.global __nxstart .global __nxstart
.global __enable_sse3 .global __enable_sse_avx
.global __enable_pcid .global __enable_pcid
.global __revoke_low_memory .global __revoke_low_memory
.global nx_start /* nx_start is defined elsewhere */ .global nx_start /* nx_start is defined elsewhere */
@@ -302,16 +302,16 @@ npd_loop:
.size __revoke_low_memory, . - __revoke_low_memory .size __revoke_low_memory, . - __revoke_low_memory
/**************************************************************************** /****************************************************************************
* Name: __enable_sse3 * Name: __enable_sse_avx
* *
* Description: * Description:
* Do low-level initialization SSE related processor setting * Do low-level initialization SSE related processor setting
* *
****************************************************************************/ ****************************************************************************/
.type __enable_sse3, @function .type __enable_sse_avx, @function
__enable_sse3: __enable_sse_avx:
// Enable SSE // Enable SSE
mov %cr0, %rax mov %cr0, %rax
mov $(X86_CR0_EM), %rbx mov $(X86_CR0_EM), %rbx
@@ -330,7 +330,7 @@ __enable_sse3:
ret ret
.size __enable_sse3, . - __enable_sse3 .size __enable_sse_avx, . - __enable_sse_avx
/**************************************************************************** /****************************************************************************