mirror of
https://github.com/apache/nuttx.git
synced 2026-06-04 23:03:27 +08:00
onfigs/mx1ads/ostest: Configuration converted to use the kconfig-frontends tools
This commit is contained in:
@@ -5,19 +5,45 @@
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if ARCH_CHIP_IMX
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if ARCH_CHIP_IMX
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config IMX_UART0
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# choice "iMX Chip Selection"
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bool "UART0"
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select ARCH_HAVE_UART0
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config ARCH_CHIP_IMX1
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default n
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bool
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default y
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menu "iMX Peripheral Selection"
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config IMX_UART1
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config IMX_UART1
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bool "UART1"
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bool "UART1"
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select ARCH_HAVE_UART1
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default n
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default n
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select ARCH_HAVE_UART1
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config IMX_UART2
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config IMX_UART2
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bool "UART2"
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bool "UART2"
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select ARCH_HAVE_UART2
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default n
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default n
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select ARCH_HAVE_UART2
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config IMX_UART3
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bool "UART2"
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default n
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select ARCH_HAVE_UART3
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config IMX_SPI1
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bool "SPI1"
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default n
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select SPI
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config IMX_SPI2
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bool "SPI2"
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default n
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select SPI
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endmenu # iMX Peripheral Selection
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config RAM_NUTTXENTRY
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hex "NuttX entry point"
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default 0x01004000
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---help---
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The virtual address of the NuttX entry point
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endif
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endif
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@@ -107,9 +107,9 @@ void up_addregion(void)
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*/
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*/
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#if !defined(CONFIG_BOOT_RUNFROMFLASH) && !defined(CONFIG_BOOT_COPYTORAM)
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#if !defined(CONFIG_BOOT_RUNFROMFLASH) && !defined(CONFIG_BOOT_COPYTORAM)
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# if (CONFIG_DRAM_NUTTXENTRY & 0xffff0000) != CONFIG_RAM_VSTART
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# if (CONFIG_RAM_NUTTXENTRY & 0xffff0000) != CONFIG_RAM_VSTART
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uint32_t start = CONFIG_RAM_VSTART + 0x1000;
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uint32_t start = CONFIG_RAM_VSTART + 0x1000;
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uint32_t end = (CONFIG_DRAM_NUTTXENTRY & 0xffff0000);
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uint32_t end = (CONFIG_RAM_NUTTXENTRY & 0xffff0000);
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kmm_addregion((FAR void*)start, end - start);
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kmm_addregion((FAR void*)start, end - start);
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# endif
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# endif
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#endif
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#endif
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@@ -216,11 +216,11 @@
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* This offset reserves space for the MMU page cache.
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* This offset reserves space for the MMU page cache.
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*/
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*/
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#define NUTTX_START_VADDR ((CONFIG_DRAM_NUTTXENTRY & 0xfff00000) | PGTABLE_SIZE)
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#define NUTTX_START_VADDR ((CONFIG_RAM_NUTTXENTRY & 0xfff00000) | PGTABLE_SIZE)
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#define NUTTX_START_PADDR (IMX_SDRAM0_PSECTION | PGTABLE_SIZE)
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#define NUTTX_START_PADDR (IMX_SDRAM0_PSECTION | PGTABLE_SIZE)
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#if NUTTX_START_VADDR != CONFIG_DRAM_NUTTXENTRY
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#if NUTTX_START_VADDR != CONFIG_RAM_NUTTXENTRY
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# error "CONFIG_DRAM_NUTTXENTRY does not have correct offset for page table"
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# error "CONFIG_RAM_NUTTXENTRY does not have correct offset for page table"
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#endif
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#endif
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/* Section MMU Flags */
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/* Section MMU Flags */
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+11
-11
@@ -63,16 +63,16 @@
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/* The i.MX1/L supports 2 SPI interfaces. Which have been enabled? */
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/* The i.MX1/L supports 2 SPI interfaces. Which have been enabled? */
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#ifndef CONFIG_SPI1_DISABLE
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#ifdef CONFIG_IMX_SPI1
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# define SPI1_NDX 0 /* Index to SPI1 in g_spidev[] */
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# define SPI1_NDX 0 /* Index to SPI1 in g_spidev[] */
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# ifndef CONFIG_SPI2_DISABLE
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# ifdef CONFIG_IMX_SPI2
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# define SPI2_NDX 1 /* Index to SPI2 in g_spidev[] */
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# define SPI2_NDX 1 /* Index to SPI2 in g_spidev[] */
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# define NSPIS 2 /* Two SPI interfaces: SPI1 & SPI2 */
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# define NSPIS 2 /* Two SPI interfaces: SPI1 & SPI2 */
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# else
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# else
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# define NSPIS 1 /* One SPI interface: SPI1 */
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# define NSPIS 1 /* One SPI interface: SPI1 */
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# endif
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# endif
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#else
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#else
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# ifndef CONFIG_SPI2_DISABLE
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# ifdef CONFIG_IMX_SPI2
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# define SPI2_NDX 0 /* Index to SPI2 in g_spidev[] */
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# define SPI2_NDX 0 /* Index to SPI2 in g_spidev[] */
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# define NSPIS 1 /* One SPI interface: SPI2 */
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# define NSPIS 1 /* One SPI interface: SPI2 */
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# else
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# else
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@@ -213,7 +213,7 @@ static const struct spi_ops_s g_spiops =
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static struct imx_spidev_s g_spidev[] =
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static struct imx_spidev_s g_spidev[] =
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{
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{
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#ifndef CONFIG_SPI1_DISABLE
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#ifdef CONFIG_IMX_SPI1
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{
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{
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.ops = &g_spiops,
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.ops = &g_spiops,
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.base = IMX_CSPI1_VBASE,
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.base = IMX_CSPI1_VBASE,
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@@ -222,7 +222,7 @@ static struct imx_spidev_s g_spidev[] =
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#endif
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#endif
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},
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},
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#endif
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#endif
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#ifndef CONFIG_SPI2_DISABLE
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#ifdef CONFIG_IMX_SPI2
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{
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{
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.ops = &g_spiops,
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.ops = &g_spiops,
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.base = IMX_CSPI2_VBASE,
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.base = IMX_CSPI2_VBASE,
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@@ -614,11 +614,11 @@ static inline struct imx_spidev_s *spi_mapirq(int irq)
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{
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{
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switch (irq)
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switch (irq)
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{
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{
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#ifndef CONFIG_SPI1_DISABLE
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#ifdef CONFIG_IMX_SPI1
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case IMX_IRQ_CSPI1:
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case IMX_IRQ_CSPI1:
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return &g_spidev[SPI1_NDX];
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return &g_spidev[SPI1_NDX];
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#endif
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#endif
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#ifndef CONFIG_SPI2_DISABLE
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#ifdef CONFIG_IMX_SPI2
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case IMX_IRQ_CSPI2:
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case IMX_IRQ_CSPI2:
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return &g_spidev[SPI2_NDX];
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return &g_spidev[SPI2_NDX];
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#endif
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#endif
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@@ -1020,7 +1020,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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switch (port)
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switch (port)
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{
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{
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#ifndef CONFIG_SPI1_DISABLE
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#ifdef CONFIG_IMX_SPI1
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case 1:
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case 1:
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/* Select SPI1 */
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/* Select SPI1 */
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@@ -1035,9 +1035,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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imxgpio_configpfinput(GPIOC, 16); /* Port C, pin 16: MISO */
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imxgpio_configpfinput(GPIOC, 16); /* Port C, pin 16: MISO */
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imxgpio_configpfoutput(GPIOC, 17); /* Port C, pin 17: MOSI */
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imxgpio_configpfoutput(GPIOC, 17); /* Port C, pin 17: MOSI */
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break;
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break;
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#endif /* CONFIG_SPI1_DISABLE */
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#endif /* CONFIG_IMX_SPI1 */
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#ifndef CONFIG_SPI2_DISABLE
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#ifdef CONFIG_IMX_SPI2
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case 2:
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case 2:
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/* Select SPI2 */
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/* Select SPI2 */
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@@ -1087,7 +1087,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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imxgpio_configoutput(GPIOD, 10);
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imxgpio_configoutput(GPIOD, 10);
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#endif
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#endif
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break;
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break;
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#endif /* CONFIG_SPI2_DISABLE */
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#endif /* CONFIG_IMX_SPI2 */
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default:
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default:
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return NULL;
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return NULL;
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