sched/sleep: replace all Signal-based sleep implement to Scheduled sleep

Nuttx currently has 2 types of sleep interfaces:

1. Signal-scheduled sleep: nxsig_sleep() / nxsig_usleep() / nxsig_nanosleep()
Weaknesses:
a. Signal-dependent: The signal-scheduled sleep method is bound to the signal framework, while some driver sleep operations do not depend on signals.
b. Timespec conversion: Signal-scheduled sleep involves timespec conversion, which has a significant impact on performance.

2. Busy sleep: up_mdelay() / up_udelay()
Weaknesses:
a. Does not actively trigger scheduling, occupy the CPU loading.

3. New interfaces: Scheduled sleep: nxsched_sleep() / nxsched_usleep() / nxsched_msleep() / nxsched_ticksleep()
Strengths:
a. Does not depend on the signal framework.
b. Tick-based, without additional computational overhead.

Currently, the Nuttx driver framework extensively uses nxsig_* interfaces. However, the driver does not need to rely on signals or timespec conversion.
Therefore, a new set of APIs is added to reduce dependencies on other modules.

(This PR also aims to make signals optional, further reducing the code size of Nuttx.)

Signed-off-by: chao an <anchao.archer@bytedance.com>

arch/arm/src/at32/at32_otgfshost.c

@@ -1947,7 +1947,7 @@ static ssize_t at32_in_transfer(struct at32_usbhost_s *priv, int chidx,
                    * Small delays could require more resolution than is
                    * provided by the system timer.  For example, if the
                    * system timer resolution is 10MS, then
-                   * nxsig_usleep(1000) will actually request a delay 20MS
+                   * nxsched_usleep(1000) will actually request a delay 20MS
                    * (due to both quantization and rounding).
                    *
                    * REVISIT: So which is better?  To ignore tiny delays and
@@ -1957,7 +1957,7 @@ static ssize_t at32_in_transfer(struct at32_usbhost_s *priv, int chidx,
 
                   if (delay > CONFIG_USEC_PER_TICK)
                     {
-                      nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
+                      nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
                     }
                 }
             }
@@ -2262,7 +2262,7 @@ static ssize_t at32_out_transfer(struct at32_usbhost_s *priv,
            * transfer using the same buffer pointer and length.
            */
 
-          nxsig_usleep(5 * 1000);
+          nxsched_usleep(5 * 1000);
         }
       else
         {
@@ -3958,7 +3958,7 @@ static int at32_rh_enumerate(struct at32_usbhost_s *priv,
    * 100ms.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Reset the host port */
 

arch/arm/src/cxd56xx/cxd56_farapi.c

@@ -205,7 +205,7 @@ void farapi_main(int id, void *arg, struct modulelist_s *mlist)
 
       /* NOTE: a workaround to finish rescheduling */
 
-      nxsig_usleep(10 * 1000);
+      nxsched_usleep(10 * 1000);
     }
 #endif
 
@@ -273,7 +273,7 @@ err:
 
       /* NOTE: a workaround to finish rescheduling */
 
-      nxsig_usleep(10 * 1000);
+      nxsched_usleep(10 * 1000);
     }
 #endif
 }

arch/arm/src/cxd56xx/cxd56_gnss.c

@@ -452,7 +452,7 @@ static int cxd56_gnss_start(struct file *filep, unsigned long arg)
     {
       /* GNSS requires stable RTC */
 
-      nxsig_usleep(100 * 1000);
+      nxsched_usleep(100 * 1000);
     }
 
   ret = cxd56_gnss_cpufifo_api(filep, CXD56_GNSS_GD_GNSS_START,
@@ -1453,7 +1453,7 @@ static int cxd56_gnss_start_test(struct file *filep, unsigned long arg)
         {
           /* GNSS requires stable RTC */
 
-          nxsig_usleep(100 * 1000);
+          nxsched_usleep(100 * 1000);
         }
 
       /* set parameter */
@@ -2768,7 +2768,7 @@ static int cxd56_gnss_open(struct file *filep)
     {
       /* GNSS requires stable RTC */
 
-      nxsig_usleep(100 * 1000);
+      nxsched_usleep(100 * 1000);
     }
 
   ret = nxmutex_lock(&priv->devlock);

arch/arm/src/cxd56xx/cxd56_nxaudio.c

@@ -2957,7 +2957,7 @@ static int cxd56_start(struct audio_lowerhalf_s *lower)
 
           if (time < CXD56_MIC_BOOT_WAIT)
             {
-              nxsig_usleep((CXD56_MIC_BOOT_WAIT - time) * 1000);
+              nxsched_usleep((CXD56_MIC_BOOT_WAIT - time) * 1000);
             }
         }
     }

arch/arm/src/cxd56xx/cxd56_sdhci.c

@@ -3338,7 +3338,7 @@ void cxd56_sdhci_mediachange(struct sdio_dev_s *dev)
               break;
             }
 
-          nxsig_usleep(100000);
+          nxsched_usleep(100000);
           timeout -= 100000;
         }
     }

arch/arm/src/efm32/efm32_usbhost.c

@@ -2276,7 +2276,7 @@ static ssize_t efm32_out_transfer(struct efm32_usbhost_s *priv,
            * transfer using the same buffer pointer and length.
            */
 
-          nxsig_usleep(20 * 1000);
+          nxsched_usleep(20 * 1000);
         }
       else
         {
@@ -3960,7 +3960,7 @@ static int efm32_rh_enumerate(struct efm32_usbhost_s *priv,
 
   /* USB 2.0 spec says at least 50ms delay before port reset. wait 100ms. */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Reset the host port */
 

arch/arm/src/imx6/imx_enet.c

@@ -2043,7 +2043,7 @@ static inline int imx_initphy(struct imx_driver_s *priv, bool renogphy)
       retries = 0;
       do
         {
-          nxsig_usleep(LINK_WAITUS);
+          nxsched_usleep(LINK_WAITUS);
 
           ninfo("%s: Read PHYID1, retries=%d\n",
                 BOARD_PHY_NAME, retries + 1);
@@ -2216,7 +2216,7 @@ static inline int imx_initphy(struct imx_driver_s *priv, bool renogphy)
               break;
             }
 
-          nxsig_usleep(LINK_WAITUS);
+          nxsched_usleep(LINK_WAITUS);
         }
 
       if (phydata & MII_MSR_ANEGCOMPLETE)

arch/arm/src/imxrt/imxrt_ehci.c

@@ -3811,7 +3811,7 @@ static int imxrt_rh_enumerate(struct usbhost_connection_s *conn,
    * reset for 50Msec, not wait 50Msec before resetting.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Paragraph 2.3.9:
    *
@@ -3905,7 +3905,7 @@ static int imxrt_rh_enumerate(struct usbhost_connection_s *conn,
    * 50 ms."
    */
 
-  nxsig_usleep(50 * 1000);
+  nxsched_usleep(50 * 1000);
 
   regval  = imxrt_getreg(regaddr);
   regval &= ~EHCI_PORTSC_RESET;
@@ -3926,7 +3926,7 @@ static int imxrt_rh_enumerate(struct usbhost_connection_s *conn,
    */
 
   while ((imxrt_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
-  nxsig_usleep(200 * 1000);
+  nxsched_usleep(200 * 1000);
 
   /* EHCI Paragraph 4.2.2:
    *

arch/arm/src/imxrt/imxrt_enet.c

@@ -2226,7 +2226,7 @@ static int imxrt_determine_phy(struct imxrt_driver_s *priv)
           retries = 0;
           do
             {
-              nxsig_usleep(100);
+              nxsched_usleep(100);
               phydata = 0xffff;
               ret = imxrt_readmii(priv, phyaddr, MII_PHYID1, &phydata);
             }
@@ -2237,7 +2237,7 @@ static int imxrt_determine_phy(struct imxrt_driver_s *priv)
             {
               do
                 {
-                  nxsig_usleep(100);
+                  nxsched_usleep(100);
                   phydata = 0xffff;
                   ret = imxrt_readmii(priv, phyaddr, MII_PHYID2, &phydata);
                 }
@@ -2550,7 +2550,7 @@ static inline int imxrt_initphy(struct imxrt_driver_s *priv, bool renogphy)
       retries = 0;
       do
         {
-          nxsig_usleep(LINK_WAITUS);
+          nxsched_usleep(LINK_WAITUS);
 
           ninfo("%s: Read PHYID1, retries=%d\n",
                 BOARD_PHY_NAME, retries + 1);
@@ -2786,7 +2786,7 @@ static inline int imxrt_initphy(struct imxrt_driver_s *priv, bool renogphy)
                   break;
                 }
 
-              nxsig_usleep(LINK_WAITUS);
+              nxsched_usleep(LINK_WAITUS);
             }
 
           if (phydata & MII_MSR_ANEGCOMPLETE)

arch/arm/src/kinetis/kinetis_enet.c

@@ -1564,7 +1564,7 @@ static inline int kinetis_initphy(struct kinetis_driver_s *priv)
       retries = 0;
       do
         {
-          nxsig_usleep(LINK_WAITUS);
+          nxsched_usleep(LINK_WAITUS);
           ninfo("%s: Read PHYID1, retries=%d\n",
                 BOARD_PHY_NAME, retries + 1);
           phydata = 0xffff;
@@ -1646,7 +1646,7 @@ static inline int kinetis_initphy(struct kinetis_driver_s *priv)
           break;
         }
 
-      nxsig_usleep(LINK_WAITUS);
+      nxsched_usleep(LINK_WAITUS);
     }
 
   if (phydata & MII_MSR_ANEGCOMPLETE)

arch/arm/src/kinetis/kinetis_usbhshost.c

@@ -3696,7 +3696,7 @@ static int kinetis_rh_enumerate(struct usbhost_connection_s *conn,
    * reset for 50Msec, not wait 50Msec before resetting.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Paragraph 2.3.9:
    *
@@ -3800,7 +3800,7 @@ static int kinetis_rh_enumerate(struct usbhost_connection_s *conn,
    */
 
   while ((kinetis_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
-  nxsig_usleep(200 * 1000);
+  nxsched_usleep(200 * 1000);
 
   /* EHCI Paragraph 4.2.2:
    *

arch/arm/src/lc823450/lc823450_i2c.c

@@ -1024,7 +1024,7 @@ static int lc823450_i2c_transfer(struct i2c_master_s *dev,
            * transaction, STOP condition for write transaction
            */
 
-          nxsig_usleep(10 * 1000);
+          nxsched_usleep(10 * 1000);
         }
       else
         {

arch/arm/src/lc823450/lc823450_i2s.c

@@ -291,7 +291,7 @@ static void _setup_audio_pll(uint32_t freq)
 
   /* TODO: Wait */
 
-  nxsig_usleep(50 * 1000);
+  nxsched_usleep(50 * 1000);
 
   /* Switch to the PLL */
 
@@ -1052,7 +1052,7 @@ struct i2s_dev_s *lc823450_i2sdev_initialize(void)
   /* Set the new affinity which assigns to CPU0 */
 
   nxsched_set_affinity(nxsched_gettid(), sizeof(cpuset1), &cpuset1);
-  nxsig_usleep(10 * 1000);
+  nxsched_usleep(10 * 1000);
 #endif
 
   irq_attach(LC823450_IRQ_AUDIOBUF0, _i2s_isr, NULL);
@@ -1065,7 +1065,7 @@ struct i2s_dev_s *lc823450_i2sdev_initialize(void)
   /* Restore the original affinity */
 
   nxsched_set_affinity(nxsched_gettid(), sizeof(cpuset0), &cpuset0);
-  nxsig_usleep(10 * 1000);
+  nxsched_usleep(10 * 1000);
 #endif
 
   /* Success exit */

arch/arm/src/lc823450/lc823450_ipl2.c

@@ -357,7 +357,7 @@ static int check_forceusbboot(void)
   modifyreg32(MCLKCNTAPB, 0, MCLKCNTAPB_ADC_CLKEN);
   modifyreg32(MRSTCNTAPB, 0, MRSTCNTAPB_ADC_RSTB);
 
-  nxsig_usleep(10000);
+  nxsched_usleep(10000);
 
   /* start ADC0,1 */
 
@@ -416,7 +416,7 @@ static void sysreset(void)
 {
   /* workaround to flush eMMC cache */
 
-  nxsig_usleep(100000);
+  nxsched_usleep(100000);
 
   up_systemreset();
 }
@@ -520,7 +520,7 @@ static void chg_disable(void)
             }
           else
             {
-              nxsig_usleep(20);
+              nxsched_usleep(20);
             }
         }
 
@@ -568,7 +568,7 @@ static int msc_enable(int forced)
           return 0;
         }
 
-      nxsig_usleep(10000);
+      nxsched_usleep(10000);
     }
 
 #else
@@ -576,7 +576,7 @@ static int msc_enable(int forced)
 
   while (g_update_flag == 0)
     {
-      nxsig_usleep(10000);
+      nxsched_usleep(10000);
     }
 #endif
 
@@ -585,7 +585,7 @@ static int msc_enable(int forced)
   /* check recovery kernel update */
 
   nx_mount(CONFIG_MTD_CP_DEVPATH, "/mnt/sd0", "evfat", 0, NULL);
-  nxsig_usleep(10000);
+  nxsched_usleep(10000);
 
   /* recovery kernel install from UPG.img */
 
@@ -677,7 +677,7 @@ int ipl2_main(int argc, char *argv[])
       /* check recovery kernel update */
 
       nx_mount(CONFIG_MTD_CP_DEVPATH, "/mnt/sd0", "evfat", 0, NULL);
-      nxsig_usleep(10000);
+      nxsched_usleep(10000);
 
       /* recovery kernel install from UPG.img */
 

arch/arm/src/lc823450/lc823450_sddrv_dep.c

@@ -182,7 +182,7 @@ SINT_T sddep1_hw_init(struct sddrcfg_s *cfg)
 
   /* wait 15ms */
 
-  nxsig_usleep(15000);
+  nxsched_usleep(15000);
 
   irqstate_t flags = enter_critical_section();
 
@@ -276,7 +276,7 @@ void sddep_voltage_switch(struct sddrcfg_s *cfg)
 
   lc823450_gpio_config(GPIO_PORT0 | GPIO_PIN6 |
                        GPIO_MODE_OUTPUT | GPIO_VALUE_ONE);
-  nxsig_usleep(200 * 1000);
+  nxsched_usleep(200 * 1000);
 #endif
 }
 
@@ -333,7 +333,7 @@ SINT_T sddep_wait(UI_32 ms, struct sddrcfg_s *cfg)
     }
   else
     {
-      nxsig_usleep(ms * 1000);
+      nxsched_usleep(ms * 1000);
     }
 #endif
 

arch/arm/src/lc823450/lc823450_usbdev.c

@@ -1581,7 +1581,7 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
 
       putreg32(~USB_DEVS_SOF, USB_DEVS);
 
-      nxsig_usleep(100000);
+      nxsched_usleep(100000);
 
       /* SOF is not arrived & D+/D- is HIGH */
 

arch/arm/src/lpc17xx_40xx/lpc17_40_ethernet.c

@@ -2488,7 +2488,7 @@ static inline int lpc17_40_phyinit(struct lpc17_40_driver_s *priv)
 
   while ((lpc17_40_phyread(phyaddr, MII_DP83848C_STS) & 0x0001) == 0)
     {
-      nxsig_usleep(40000);
+      nxsched_usleep(40000);
     }
 #endif
 

arch/arm/src/lpc17xx_40xx/lpc17_40_usbhost.c

@@ -2076,7 +2076,7 @@ static int lpc17_40_rh_enumerate(struct usbhost_connection_s *conn,
 
   /* USB 2.0 spec says at least 50ms delay before port reset */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Put RH port 1 in reset (the LPC176x supports only a single downstream
    * port).
@@ -2094,7 +2094,7 @@ static int lpc17_40_rh_enumerate(struct usbhost_connection_s *conn,
   /* Release RH port 1 from reset and wait a bit */
 
   lpc17_40_putreg(OHCI_RHPORTST_PRSC, LPC17_40_USBHOST_RHPORTST1);
-  nxsig_usleep(200 * 1000);
+  nxsched_usleep(200 * 1000);
   return OK;
 }
 

arch/arm/src/lpc31xx/lpc31_ehci.c

@@ -3620,7 +3620,7 @@ static int lpc31_rh_enumerate(struct usbhost_connection_s *conn,
    * reset for 50Msec, not wait 50Msec before resetting.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Paragraph 2.3.9:
    *
@@ -3723,7 +3723,7 @@ static int lpc31_rh_enumerate(struct usbhost_connection_s *conn,
    * 50 ms."
    */
 
-  nxsig_usleep(50 * 1000);
+  nxsched_usleep(50 * 1000);
 
   regval  = lpc31_getreg(regaddr);
   regval &= ~EHCI_PORTSC_RESET;
@@ -3744,7 +3744,7 @@ static int lpc31_rh_enumerate(struct usbhost_connection_s *conn,
    */
 
   while ((lpc31_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
-  nxsig_usleep(200 * 1000);
+  nxsched_usleep(200 * 1000);
 
   /* Paragraph 4.2.2:
    *

arch/arm/src/lpc43xx/lpc43_ehci.c

@@ -3458,7 +3458,7 @@ static int lpc43_rh_enumerate(struct usbhost_connection_s *conn,
    * reset for 50Msec, not wait 50Msec before resetting.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Paragraph 2.3.9:
    *
@@ -3561,7 +3561,7 @@ static int lpc43_rh_enumerate(struct usbhost_connection_s *conn,
    * 50 ms."
    */
 
-  nxsig_usleep(50 * 1000);
+  nxsched_usleep(50 * 1000);
 
   regval  = lpc43_getreg(regaddr);
   regval &= ~EHCI_PORTSC_RESET;
@@ -3582,7 +3582,7 @@ static int lpc43_rh_enumerate(struct usbhost_connection_s *conn,
    */
 
   while ((lpc43_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
-  nxsig_usleep(200 * 1000);
+  nxsched_usleep(200 * 1000);
 
   /* Paragraph 4.2.2:
    *

arch/arm/src/lpc54xx/lpc54_usb0_ohci.c

@@ -2172,7 +2172,7 @@ static int lpc54_rh_enumerate(struct usbhost_connection_s *conn,
 
   /* USB 2.0 spec says at least 50ms delay before port reset */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Put RH port 1 in reset
    * (the LPC546x supports only a single downstream port)
@@ -2187,7 +2187,7 @@ static int lpc54_rh_enumerate(struct usbhost_connection_s *conn,
   /* Release RH port 1 from reset and wait a bit */
 
   lpc54_putreg(OHCI_RHPORTST_PRSC, LPC54_OHCI_RHPORTST1);
-  nxsig_usleep(200 * 1000);
+  nxsched_usleep(200 * 1000);
   return OK;
 }
 

arch/arm/src/mx8mp/mx8mp_i2c.c

@@ -543,9 +543,9 @@ static void mx8mp_i2c_set_frequency(struct mx8mp_i2c_s *priv,
 static void mx8mp_i2c_reset_bus(struct mx8mp_i2c_s *priv)
 {
   mx8mp_i2c_disable(priv);
-  nxsig_usleep(50);
+  nxsched_usleep(50);
   mx8mp_i2c_enable(priv);
-  nxsig_usleep(50);
+  nxsched_usleep(50);
 }
 
 /****************************************************************************
@@ -679,7 +679,7 @@ error:
           break;
         }
 
-      nxsig_usleep(10);
+      nxsched_usleep(10);
     }
 
   /* Release access to I2C bus */

arch/arm/src/nrf53/nrf53_rptun.c

@@ -223,7 +223,7 @@ nrf53_rptun_get_resource(struct rptun_dev_s *dev)
 
       while (priv->shmem->base == 0)
         {
-          nxsig_usleep(100);
+          nxsched_usleep(100);
         }
     }
 

arch/arm/src/nrf91/nrf91_modem_os.c

@@ -389,7 +389,7 @@ int nrf_modem_os_sleep(uint32_t timeout)
 {
   /* Timeout in ms */
 
-  nxsig_usleep(timeout * 1000);
+  nxsched_usleep(timeout * 1000);
   return OK;
 }
 

arch/arm/src/nrf91/nrf91_modem_sock.c

@@ -685,7 +685,7 @@ static void nrf91_usrsock_poll_work(void *arg)
         {
           while (g_usrsock.sock[pollfd->fd].recvpending == true)
             {
-              nxsig_usleep(100);
+              nxsched_usleep(100);
             }
         }
 

arch/arm/src/rp2040/rp2040_cyw43439.c

@@ -166,11 +166,11 @@ static int my_init(gspi_dev_t  *gspi)
   rp2040_gpio_setdir(rp_io->gpio_data, true);
   rp2040_gpio_put(rp_io->gpio_data, false);
 
-  nxsig_usleep(50000); /* Leave off for at least 50ms. */
+  nxsched_usleep(50000); /* Leave off for at least 50ms. */
 
   rp2040_gpio_put(rp_io->gpio_on, true);     /* power on */
 
-  nxsig_usleep(50000); /* Wait a bit to let the power come up. */
+  nxsched_usleep(50000); /* Wait a bit to let the power come up. */
 
   /* Don't let anyone else grab a PIO while we are doing so. */
 

arch/arm/src/rp2040/rp2040_ws2812.c

@@ -143,7 +143,7 @@ static void update_pixels(struct ws2812_dev_s  *dev_data)
 
   if (time_delta < 50)
     {
-      nxsig_usleep(50 - time_delta);
+      nxsched_usleep(50 - time_delta);
     }
 
   rp2040_dmastart(dma_handle, dma_complete, dev_data);

arch/arm/src/rp23xx/rp23xx_ws2812.c

@@ -143,7 +143,7 @@ static void update_pixels(struct ws2812_dev_s  *dev_data)
 
   if (time_delta < 50)
     {
-      nxsig_usleep(50 - time_delta);
+      nxsched_usleep(50 - time_delta);
     }
 
   rp23xx_dmastart(dma_handle, dma_complete, dev_data);

arch/arm/src/rtl8720c/ameba_hci.c

@@ -330,7 +330,7 @@ static int hci_load_firmware(struct file *filep)
       command[1] = 0x20;
       command[2] = 0xfc;
       buffer_size = header_size + command[3];
-      nxsig_usleep(10);
+      nxsched_usleep(10);
       ret = hci_send(filep, command, buffer_size);
       if (ret != buffer_size)
         {

arch/arm/src/rtl8720c/amebaz_depend.c

@@ -400,7 +400,7 @@ void rtw_yield_os(void)
 
 void rtw_usleep_os(int us)
 {
-  nxsig_usleep(us);
+  nxsched_usleep(us);
 }
 
 void rtw_msleep_os(int ms)

arch/arm/src/rtl8720c/amebaz_driver.c

@@ -961,7 +961,7 @@ int amebaz_wl_set_mode(struct amebaz_dev_s *priv, struct iwreq *iwr)
 
           while (!rltk_wlan_running(priv->devnum))
             {
-              nxsig_usleep(1000);
+              nxsched_usleep(1000);
             }
 
           ret = amebaz_wl_disable_powersave(0);
@@ -1128,7 +1128,7 @@ static int amebaz_wl_on(int mode)
 
       while (!rltk_wlan_running(gp_wlan_dev[i]->devnum))
         {
-          nxsig_usleep(1000);
+          nxsched_usleep(1000);
         }
     }
 

arch/arm/src/s32k1xx/s32k1xx_enet.c

@@ -1909,7 +1909,7 @@ static inline int s32k1xx_initphy(struct s32k1xx_driver_s *priv,
       retries = 0;
       do
         {
-          nxsig_usleep(LINK_WAITUS);
+          nxsched_usleep(LINK_WAITUS);
 
           ninfo("%s: Read PHYID1, retries=%d\n",
                 BOARD_PHY_NAME, retries + 1);
@@ -2040,7 +2040,7 @@ static inline int s32k1xx_initphy(struct s32k1xx_driver_s *priv,
               break;
             }
 
-          nxsig_usleep(LINK_WAITUS);
+          nxsched_usleep(LINK_WAITUS);
         }
 
       if (phydata & MII_MSR_ANEGCOMPLETE)

arch/arm/src/s32k3xx/s32k3xx_emac.c

@@ -2805,7 +2805,7 @@ static inline int s32k3xx_initphy(struct s32k3xx_driver_s *priv,
       retries = 0;
       do
         {
-          nxsig_usleep(LINK_WAITUS);
+          nxsched_usleep(LINK_WAITUS);
 
           ninfo("%s: Read PHYID1, retries=%d\n",
                 BOARD_PHY_NAME, retries + 1);
@@ -2962,7 +2962,7 @@ static inline int s32k3xx_initphy(struct s32k3xx_driver_s *priv,
               break;
             }
 
-          nxsig_usleep(LINK_WAITUS);
+          nxsched_usleep(LINK_WAITUS);
         }
 
       if (phydata & MII_MSR_ANEGCOMPLETE)

arch/arm/src/sam34/sam_hsmci.c

@@ -1792,7 +1792,7 @@ static int sam_sendcmd(struct sdio_dev_s *dev,
    * correct solution.
    */
 
-  nxsig_usleep(10);
+  nxsched_usleep(10);
 
   return OK;
 }

arch/arm/src/sam34/sam_udp.c

@@ -3524,7 +3524,7 @@ static int sam_wakeup(struct usbdev_s *dev)
 
   /* Wait 5msec in case we just entered the resume state */
 
-  nxsig_usleep(5 * 1000);
+  nxsched_usleep(5 * 1000);
 
   /* Set the ESR bit to send the remote resume */
 

arch/arm/src/sama5/sam_classd.c

@@ -668,7 +668,7 @@ void classd_enable_audio(struct classd_dev_s *priv, bool pmc_clock_enable)
 
   /* wait for Audio PLL startup time */
 
-  nxsig_usleep(100);
+  nxsched_usleep(100);
 #endif
 }
 

arch/arm/src/sama5/sam_ehci.c

@@ -3394,7 +3394,7 @@ static int sam_rh_enumerate(struct usbhost_connection_s *conn,
    * reset for 50Msec, not wait 50Msec before resetting.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Paragraph 2.3.9:
    *
@@ -3504,7 +3504,7 @@ static int sam_rh_enumerate(struct usbhost_connection_s *conn,
    * 50 ms."
    */
 
-  nxsig_usleep(50 * 1000);
+  nxsched_usleep(50 * 1000);
 
   regval  = sam_getreg(regaddr);
   regval &= ~EHCI_PORTSC_RESET;
@@ -3525,7 +3525,7 @@ static int sam_rh_enumerate(struct usbhost_connection_s *conn,
    */
 
   while ((sam_getreg(regaddr) & EHCI_PORTSC_RESET) != 0);
-  nxsig_usleep(200 * 1000);
+  nxsched_usleep(200 * 1000);
 
   /* Paragraph 4.2.2:
    *

arch/arm/src/sama5/sam_sdmmc.c

@@ -1581,7 +1581,7 @@ static void sam_reset(struct sdio_dev_s *dev)
         }
 
       timeout_ms--;
-      nxsig_usleep(100);
+      nxsched_usleep(100);
     }
 
     mcinfo("Reset complete\n");
@@ -1967,7 +1967,7 @@ static void sam_clock(struct sdio_dev_s *dev, enum sdio_clock_e rate)
 
   if (wait_microseconds > 0)
     {
-     nxsig_usleep(wait_microseconds);
+     nxsched_usleep(wait_microseconds);
     }
 }
 
@@ -2677,7 +2677,7 @@ static int sam_recvshortcrc(struct sdio_dev_s *dev, uint32_t cmd,
 
   /* We need a short delay here to let the SDMMC peripheral respond */
 
-  nxsig_usleep(10);
+  nxsched_usleep(10);
 
   return ret;
 }
@@ -3326,7 +3326,7 @@ static int sam_set_clock(struct sam_dev_s *priv, uint32_t clock)
         }
 
         timeout--;
-        nxsig_usleep(100);
+        nxsched_usleep(100);
     }
 
   sam_putreg16(priv, 0, SAMA5_SDMMC_SYSCTL_OFFSET);
@@ -3436,7 +3436,7 @@ static int sam_set_clock(struct sam_dev_s *priv, uint32_t clock)
             }
 
           timeout--;
-          nxsig_usleep(100);
+          nxsched_usleep(100);
         }
 
       /* High Speed Mode? */

arch/arm/src/samd5e5/sam_usb.c

@@ -5690,7 +5690,7 @@ static ssize_t sam_out_transfer(struct sam_usbhost_s *priv,
            * using the same buffer pointer and length.
            */
 
-          nxsig_usleep(20 * 1000);
+          nxsched_usleep(20 * 1000);
         }
       else
         {
@@ -6464,7 +6464,7 @@ static ssize_t sam_in_transfer(struct sam_usbhost_s *priv,
        *
        * Small delays could require more resolution than is provided
        * by the system timer.  For example, if the system timer
-       * resolution is 10MS, then nxsig_usleep(1000) will actually request
+       * resolution is 10MS, then nxsched_usleep(1000) will actually request
        * a delay 20MS (due to both quantization and rounding).
        *
        * REVISIT: So which is better?  To ignore tiny delays and
@@ -6474,7 +6474,7 @@ static ssize_t sam_in_transfer(struct sam_usbhost_s *priv,
 
                   if (delay > CONFIG_USEC_PER_TICK)
                     {
-                      nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
+                      nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
                     }
                 }
             }
@@ -6850,7 +6850,7 @@ static int sam_rh_enumerate(struct sam_usbhost_s *priv,
 
   /* USB 2.0 spec says at least 50ms delay before port reset. */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Reset the host port */
 

arch/arm/src/samv7/sam_serial_spi.c

@@ -246,7 +246,7 @@ static inline void serial_flush(struct sam_serial_spi_s *priv)
   status = serial_getreg(priv, SAM_UART_SR_OFFSET);
   while ((status & UART_INT_TXRDY) == 0)
     {
-      nxsig_usleep(100);
+      nxsched_usleep(100);
       status = serial_getreg(priv, SAM_UART_SR_OFFSET);
     }
 
@@ -639,7 +639,7 @@ static void serial_spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
       status = serial_getreg(priv, SAM_UART_SR_OFFSET);
       while ((status & UART_INT_TXRDY) == 0)
         {
-          nxsig_usleep(100);
+          nxsched_usleep(100);
           status = serial_getreg(priv, SAM_UART_SR_OFFSET);
         }
 
@@ -652,7 +652,7 @@ static void serial_spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
       status = serial_getreg(priv, SAM_UART_SR_OFFSET);
       while ((status & UART_INT_RXRDY) == 0)
         {
-          nxsig_usleep(100);
+          nxsched_usleep(100);
           status = serial_getreg(priv, SAM_UART_SR_OFFSET);
         }
 

arch/arm/src/stm32/stm32_dfumode.c

@@ -61,7 +61,7 @@ void stm32_dfumode(void)
 {
 #ifdef CONFIG_DEBUG_WARN
   _warn("Entering DFU mode...\n");
-  nxsig_sleep(1);
+  nxsched_sleep(1);
 #endif
 
   asm("ldr r0, =0x40023844\n\t"    /* RCC_APB2ENR */

arch/arm/src/stm32/stm32_otgfshost.c

@@ -1947,7 +1947,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
                    * Small delays could require more resolution than is
                    * provided by the system timer.  For example, if the
                    * system timer resolution is 10MS, then
-                   * nxsig_usleep(1000) will actually request a delay 20MS
+                   * nxsched_usleep(1000) will actually request a delay 20MS
                    * (due to both quantization and rounding).
                    *
                    * REVISIT: So which is better?  To ignore tiny delays and
@@ -1957,7 +1957,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
 
                   if (delay > CONFIG_USEC_PER_TICK)
                     {
-                      nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
+                      nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
                     }
                 }
             }
@@ -2262,7 +2262,7 @@ static ssize_t stm32_out_transfer(struct stm32_usbhost_s *priv,
            * transfer using the same buffer pointer and length.
            */
 
-          nxsig_usleep(20 * 1000);
+          nxsched_usleep(20 * 1000);
         }
       else
         {
@@ -3958,7 +3958,7 @@ static int stm32_rh_enumerate(struct stm32_usbhost_s *priv,
    * 100ms.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Reset the host port */
 

arch/arm/src/stm32/stm32_otghshost.c

@@ -1948,7 +1948,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
                    * Small delays could require more resolution than is
                    * provided by the system timer.  For example, if the
                    * system timer resolution is 10MS, then
-                   * nxsig_usleep(1000) will actually request a delay 20MS
+                   * nxsched_usleep(1000) will actually request a delay 20MS
                    * (due to both quantization and rounding).
                    *
                    * REVISIT: So which is better?  To ignore tiny delays and
@@ -1958,7 +1958,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
 
                   if (delay > CONFIG_USEC_PER_TICK)
                     {
-                      nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
+                      nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
                     }
                 }
             }
@@ -2263,7 +2263,7 @@ static ssize_t stm32_out_transfer(struct stm32_usbhost_s *priv,
            * transfer using the same buffer pointer and length.
            */
 
-          nxsig_usleep(20 * 1000);
+          nxsched_usleep(20 * 1000);
         }
       else
         {
@@ -3959,7 +3959,7 @@ static int stm32_rh_enumerate(struct stm32_usbhost_s *priv,
    * 100ms.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Reset the host port */
 

arch/arm/src/stm32f7/stm32_ethernet.c

@@ -3195,7 +3195,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
           break;
         }
 
-      nxsig_usleep(100);
+      nxsched_usleep(100);
     }
 
   if (timeout >= PHY_RETRY_TIMEOUT)
@@ -3228,7 +3228,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
           break;
         }
 
-      nxsig_usleep(100);
+      nxsched_usleep(100);
     }
 
   if (timeout >= PHY_RETRY_TIMEOUT)

arch/arm/src/stm32f7/stm32_otghost.c

@@ -1935,7 +1935,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
                    * Small delays could require more resolution than is
                    * provided by the system timer.  For example, if the
                    * system timer resolution is 10MS, then
-                   * nxsig_usleep(1000) will actually request a delay 20MS
+                   * nxsched_usleep(1000) will actually request a delay 20MS
                    * (due to both quantization and rounding).
                    *
                    * REVISIT: So which is better?  To ignore tiny delays and
@@ -1945,7 +1945,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
 
                   if (delay > CONFIG_USEC_PER_TICK)
                     {
-                      nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
+                      nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
                     }
                 }
             }
@@ -2250,7 +2250,7 @@ static ssize_t stm32_out_transfer(struct stm32_usbhost_s *priv,
            * transfer using the same buffer pointer and length.
            */
 
-          nxsig_usleep(20 * 1000);
+          nxsched_usleep(20 * 1000);
         }
       else
         {
@@ -3934,7 +3934,7 @@ static int stm32_rh_enumerate(struct stm32_usbhost_s *priv,
    * 100ms.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Reset the host port */
 

arch/arm/src/stm32h5/stm32_ethernet.c

@@ -3375,7 +3375,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
           break;
         }
 
-      nxsig_usleep(100);
+      nxsched_usleep(100);
     }
 
   if (timeout >= PHY_RETRY_TIMEOUT)
@@ -3409,7 +3409,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
           break;
         }
 
-      nxsig_usleep(100);
+      nxsched_usleep(100);
     }
 
   if (timeout >= PHY_RETRY_TIMEOUT)

arch/arm/src/stm32h7/stm32_ethernet.c

@@ -3338,7 +3338,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
           break;
         }
 
-      nxsig_usleep(100);
+      nxsched_usleep(100);
     }
 
   if (timeout >= PHY_RETRY_TIMEOUT)
@@ -3373,7 +3373,7 @@ static int stm32_phyinit(struct stm32_ethmac_s *priv)
           break;
         }
 
-      nxsig_usleep(100);
+      nxsched_usleep(100);
     }
 
   if (timeout >= PHY_RETRY_TIMEOUT)

arch/arm/src/stm32h7/stm32_otghost.c

@@ -1962,7 +1962,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
                    * Small delays could require more resolution than is
                    * provided by the system timer.  For example, if the
                    * system timer resolution is 10MS, then
-                   * nxsig_usleep(1000) will actually request a delay 20MS
+                   * nxsched_usleep(1000) will actually request a delay 20MS
                    * (due to both quantization and rounding).
                    *
                    * REVISIT: So which is better?  To ignore tiny delays and
@@ -1972,7 +1972,7 @@ static ssize_t stm32_in_transfer(struct stm32_usbhost_s *priv, int chidx,
 
                   if (delay > CONFIG_USEC_PER_TICK)
                     {
-                      nxsig_usleep(delay - CONFIG_USEC_PER_TICK);
+                      nxsched_usleep(delay - CONFIG_USEC_PER_TICK);
                     }
                 }
             }
@@ -2277,7 +2277,7 @@ static ssize_t stm32_out_transfer(struct stm32_usbhost_s *priv,
            * transfer using the same buffer pointer and length.
            */
 
-          nxsig_usleep(20 * 1000);
+          nxsched_usleep(20 * 1000);
         }
       else
         {
@@ -3960,7 +3960,7 @@ static int stm32_rh_enumerate(struct stm32_usbhost_s *priv,
    * 100ms.
    */
 
-  nxsig_usleep(100 * 1000);
+  nxsched_usleep(100 * 1000);
 
   /* Reset the host port */
 

arch/arm/src/stm32h7/stm32_rptun.c

@@ -228,7 +228,7 @@ stm32_rptun_get_resource(struct rptun_dev_s *dev)
 
       while (priv->shmem->base == 0)
         {
-          nxsig_usleep(100);
+          nxsched_usleep(100);
         }
     }
 

arch/arm/src/stm32h7/stm32_sdmmc.c

@@ -1927,11 +1927,11 @@ static void stm32_reset(struct sdio_dev_s *dev)
 
   regval = getreg32(regaddress);
   putreg32(regval | restval, regaddress);
-  nxsig_usleep(2);
+  nxsched_usleep(2);
   putreg32(regval, regaddress);
 
   stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_CYCLE);
-  nxsig_usleep(1000);
+  nxsched_usleep(1000);
 
   /* Put SDIO registers in their default, reset state */
 
@@ -1960,7 +1960,7 @@ static void stm32_reset(struct sdio_dev_s *dev)
   /* Configure the SDIO peripheral */
 
   stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_OFF);
-  nxsig_usleep(1000);
+  nxsched_usleep(1000);
   stm32_setpwrctrl(priv, STM32_SDMMC_POWER_PWRCTRL_ON);
 
   stm32_setclkcr(priv, STM32_CLCKCR_INIT);