diff --git a/arch/arm/include/s32k1xx/s32k14x_irq.h b/arch/arm/include/s32k1xx/s32k14x_irq.h index b09850062df..f5159f5c72f 100644 --- a/arch/arm/include/s32k1xx/s32k14x_irq.h +++ b/arch/arm/include/s32k1xx/s32k14x_irq.h @@ -168,7 +168,7 @@ #define S32K1XX_IRQ_CAN2_16_31 (112) /* CAN2 OR'ed Message buffer (16-31) */ /* Reserved (113-114) */ #define S32K1XX_IRQ_FTM0_CH0_1 (115) /* FTM0 Channel 0/1 Interrupt */ -#define S32K1XX_IRQ_FTM0_CH2_2 (116) /* FTM0 Channel 2/3 Interrupt */ +#define S32K1XX_IRQ_FTM0_CH2_3 (116) /* FTM0 Channel 2/3 Interrupt */ #define S32K1XX_IRQ_FTM0_CH4_5 (117) /* FTM0 Channel 4/5 Interrupt */ #define S32K1XX_IRQ_FTM0_CH6_7 (118) /* FTM0 Channel 6/7 Interrupt */ #define S32K1XX_IRQ_FTM0_FAULT (119) /* FTM0 Fault Interrupt */ diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h b/arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h index 1e1b9191d7b..b2fd683e300 100644 --- a/arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h +++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_memorymap.h @@ -60,7 +60,7 @@ #define S32K1XX_DMAMUX_BASE 0x40021000 /* DMA Channel Multiplexer */ #define S32K1XX_FLEXCAN0_BASE 0x40024000 /* FlexCAN 0 */ #define S32K1XX_FLEXCAN1_BASE 0x40025000 /* FlexCAN 1 */ -#define S32K1XX_FLEXTIMER_BASE 0x40026000 /* FlexTimer */ +#define S32K1XX_FTM3_BASE 0x40026000 /* FlexTimer 3 */ #define S32K1XX_ADC1_BASE 0x40027000 /* Analog-to-digital converter 1 */ #define S32K1XX_FLEXCAN2_BASE 0x4002b000 /* FlexCAN 2 */ #define S32K1XX_LPSPI0_BASE 0x4002c000 /* Low Power SPI 0 */ diff --git a/arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h b/arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h index 173267d72dc..e535080e1ee 100644 --- a/arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h +++ b/arch/arm/src/s32k1xx/hardware/s32k1xx_pcc.h @@ -55,7 +55,7 @@ #define S32K1XX_PCC_FLEXCAN1_OFFSET 0x0094 /* PCC FlexCAN1 Register */ #define S32K1XX_PCC_FTM3_OFFSET 0x0098 /* PCC FTM3 Register */ #define S32K1XX_PCC_ADC1_OFFSET 0x009c /* PCC ADC1 Register */ -#define S32K1XX_PCC_FLEXCAN_OFFSET 0x00ac /* PCC FlexCAN2 Register */ +#define S32K1XX_PCC_FLEXCAN2_OFFSET 0x00ac /* PCC FlexCAN2 Register */ #define S32K1XX_PCC_LPSPI0_OFFSET 0x00b0 /* PCC LPSPI0 Register */ #define S32K1XX_PCC_LPSPI1_OFFSET 0x00b4 /* PCC LPSPI1 Register */ #define S32K1XX_PCC_LPSPI2_OFFSET 0x00b8 /* PCC LPSPI2 Register */ @@ -101,7 +101,7 @@ #define S32K1XX_PCC_FLEXCAN1 (S32K1XX_PCC_BASE + S32K1XX_PCC_FLEXCAN1_OFFSET) #define S32K1XX_PCC_FTM3 (S32K1XX_PCC_BASE + S32K1XX_PCC_FTM3_OFFSET) #define S32K1XX_PCC_ADC1 (S32K1XX_PCC_BASE + S32K1XX_PCC_ADC1_OFFSET) -#define S32K1XX_PCC_FLEXCAN (S32K1XX_PCC_BASE + S32K1XX_PCC_FLEXCAN_OFFSET) +#define S32K1XX_PCC_FLEXCAN2 (S32K1XX_PCC_BASE + S32K1XX_PCC_FLEXCAN2_OFFSET) #define S32K1XX_PCC_LPSPI0 (S32K1XX_PCC_BASE + S32K1XX_PCC_LPSPI0_OFFSET) #define S32K1XX_PCC_LPSPI1 (S32K1XX_PCC_BASE + S32K1XX_PCC_LPSPI1_OFFSET) #define S32K1XX_PCC_LPSPI2 (S32K1XX_PCC_BASE + S32K1XX_PCC_LPSPI2_OFFSET) diff --git a/arch/arm/src/s32k1xx/s32k1xx_eeeprom.c b/arch/arm/src/s32k1xx/s32k1xx_eeeprom.c index 6eeb93d7b07..c6d45b65be5 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_eeeprom.c +++ b/arch/arm/src/s32k1xx/s32k1xx_eeeprom.c @@ -46,7 +46,7 @@ #include #include -#include "up_arch.h" +#include "arm_arch.h" #include "hardware/s32k1xx_ftfc.h" #include "hardware/s32k1xx_sim.h" @@ -54,7 +54,7 @@ #include "s32k1xx_config.h" #include "s32k1xx_eeeprom.h" -#include "up_internal.h" +#include "arm_internal.h" #include /* Include last: has dependencies */ diff --git a/arch/arm/src/s32k1xx/s32k1xx_eeeprom.h b/arch/arm/src/s32k1xx/s32k1xx_eeeprom.h index 5f2e0e6a012..5907950cfd4 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_eeeprom.h +++ b/arch/arm/src/s32k1xx/s32k1xx_eeeprom.h @@ -47,7 +47,7 @@ #include #include -#include "up_internal.h" +#include "arm_internal.h" #include "s32k1xx_config.h" /****************************************************************************** diff --git a/arch/arm/src/s32k1xx/s32k1xx_pin.c b/arch/arm/src/s32k1xx/s32k1xx_pin.c index 2e66bf137e1..b098a104d97 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_pin.c +++ b/arch/arm/src/s32k1xx/s32k1xx_pin.c @@ -161,6 +161,7 @@ int s32k1xx_pinconfig(uint32_t cfgset) * as an input */ + base = S32K1XX_GPIO_BASE(port); regval = getreg32(base + S32K1XX_GPIO_PIDR_OFFSET); if ((cfgset & PIN_DISABLE_INPUT) != 0) { diff --git a/arch/arm/src/s32k1xx/s32k1xx_progmem.h b/arch/arm/src/s32k1xx/s32k1xx_progmem.h index 9b97d7798e3..e413ec8368c 100644 --- a/arch/arm/src/s32k1xx/s32k1xx_progmem.h +++ b/arch/arm/src/s32k1xx/s32k1xx_progmem.h @@ -47,7 +47,7 @@ #include #include -#include "up_internal.h" +#include "arm_internal.h" #include "s32k1xx_config.h" /******************************************************************************