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arch/risc-v/k210: Remove QEMU support

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Remove the CONFIG_K210_WITH_QEMU option and associated conditional
code paths. The reasons for removal are:

* Simplifies code path for real hardware by removing QEMU workarounds
* The current QEMU target uses sifive_u machine, which is not designed
  for K210 emulation
* For RISC-V QEMU simulation, the qemu-rv (rv-virt) target is a better
  choice
* Renode can be used as an alternative for K210 simulation if needed

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi
2026-03-22 14:09:18 +08:00
committed by Xiang Xiao
parent f07e4e690b
commit 864fdb090c
9 changed files with 4 additions and 74 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.github/CODEOWNERS
-1
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@@ -687,7 +687,6 @@ Documentation/platforms/risc-v/hpm6750/index.rst raiden00@railab.me
Documentation/platforms/risc-v/index.rst matias@protobits.dev Documentation/platforms/risc-v/index.rst matias@protobits.dev
Documentation/platforms/risc-v/jh7110/boards/star64/index.rst luppy@appkaki.com Documentation/platforms/risc-v/jh7110/boards/star64/index.rst luppy@appkaki.com
Documentation/platforms/risc-v/jh7110/index.rst luppy@appkaki.com Documentation/platforms/risc-v/jh7110/index.rst luppy@appkaki.com
Documentation/platforms/risc-v/k210/boards/maix-bit/README-qemu.txt raiden00@railab.me
Documentation/platforms/risc-v/k210/boards/maix-bit/README.txt raiden00@railab.me Documentation/platforms/risc-v/k210/boards/maix-bit/README.txt raiden00@railab.me
Documentation/platforms/risc-v/k210/boards/maix-bit/index.rst raiden00@railab.me Documentation/platforms/risc-v/k210/boards/maix-bit/index.rst raiden00@railab.me
Documentation/platforms/risc-v/k210/index.rst raiden00@railab.me Documentation/platforms/risc-v/k210/index.rst raiden00@railab.me
Documentation/platforms/risc-v/k210/boards/maix-bit/index.rst
+1 -46
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@@ -30,7 +30,7 @@ Features
.. todo:: .. todo::
If you are intersted in using this board, please consider contributing If you are interested in using this board, please consider contributing
implementations for the above missing features. implementations for the above missing features.
Installation Installation
@@ -77,51 +77,6 @@ Write ``nuttx.bin`` to SPI-Flash:
The ``kflash_gui`` is not recommended because it's unstable. The ``kflash_gui`` is not recommended because it's unstable.
QEMU Process
============
In order to run this board's version of NuttX on QEMU, make the following
adjustments:
QEMU Installation
-----------------
Installing and building QEMU can be done with:
.. code:: console
$ git clone https://github.com/qemu/qemu
$ cd qemu
$ ./configure --target-list=riscv64-softmmu
$ make
$ sudo make install
Building NuttX for QEMU
-----------------------
Building NuttX follows the same process, but you will need to modify your chosen
configuration to include the option ``CONFIG_K210_WITH_QEMU=y``.
Running on QEMU
---------------
Run the following:
.. code:: console
$ qemu-system-riscv64 -nographic -machine sifive_u -bios ./nuttx
.. note::
To run Nuttx for kostest, ``gdb`` needs to be used to load both
``nuttx_user.elf`` and ``nuttx``.
.. code:: console
$ qemu-system-riscv64 -nographic -machine sifive_u -s -S
$ riscv64-unknown-elf-gdb -ex 'target extended-remote:1234' -ex 'load nuttx_user.elf' -ex 'load nuttx' -ex 'c'
Configurations Configurations
============== ==============
arch/risc-v/Kconfig
+2 -2
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@@ -29,8 +29,8 @@ config ARCH_CHIP_K210
select ARCH_RV_ISA_M select ARCH_RV_ISA_M
select ARCH_RV_ISA_A select ARCH_RV_ISA_A
select ARCH_RV_ISA_C select ARCH_RV_ISA_C
select ARCH_HAVE_FPU if !K210_WITH_QEMU select ARCH_HAVE_FPU
select ARCH_HAVE_DPFPU if !K210_WITH_QEMU select ARCH_HAVE_DPFPU
select ARCH_HAVE_MPU select ARCH_HAVE_MPU
select ARCH_HAVE_TESTSET select ARCH_HAVE_TESTSET
select ARCH_HAVE_MULTICPU select ARCH_HAVE_MULTICPU
arch/risc-v/include/k210/irq.h
-4
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@@ -33,13 +33,9 @@
/* Map RISC-V exception code to NuttX IRQ */ /* Map RISC-V exception code to NuttX IRQ */
#ifdef CONFIG_K210_WITH_QEMU
#define K210_IRQ_UART0 (RISCV_IRQ_MEXT + 4)
#else
#define K210_IRQ_WDT0 (RISCV_IRQ_MEXT + 21) #define K210_IRQ_WDT0 (RISCV_IRQ_MEXT + 21)
#define K210_IRQ_WDT1 (RISCV_IRQ_MEXT + 22) #define K210_IRQ_WDT1 (RISCV_IRQ_MEXT + 22)
#define K210_IRQ_UART0 (RISCV_IRQ_MEXT + 33) #define K210_IRQ_UART0 (RISCV_IRQ_MEXT + 33)
#endif
/* Total number of IRQs */ /* Total number of IRQs */
arch/risc-v/src/k210/Kconfig
-8
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@@ -50,11 +50,3 @@ config K210_CPU_FREQ
Set the K210 CPU target frequency in Hz. Set the K210 CPU target frequency in Hz.
Default is 400000000 (400 MHz). Default is 400000000 (400 MHz).
Valid range: 40000000-600000000 Hz (40-600 MHz). Valid range: 40000000-600000000 Hz (40-600 MHz).
menu "K210 Others"
config K210_WITH_QEMU
bool "qemu support"
default n
endmenu
arch/risc-v/src/k210/hardware/k210_memorymap.h
-4
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@@ -32,11 +32,7 @@
#define K210_CLINT_BASE 0x02000000 #define K210_CLINT_BASE 0x02000000
#define K210_PLIC_BASE 0x0c000000 #define K210_PLIC_BASE 0x0c000000
#ifdef CONFIG_K210_WITH_QEMU
#define K210_UART0_BASE 0x10010000
#else
#define K210_UART0_BASE 0x38000000 #define K210_UART0_BASE 0x38000000
#endif
#define K210_GPIOHS_BASE 0x38001000 #define K210_GPIOHS_BASE 0x38001000
#define K210_FPIOA_BASE 0x502B0000 #define K210_FPIOA_BASE 0x502B0000
arch/risc-v/src/k210/k210_clockconfig.c
-4
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@@ -66,7 +66,6 @@ uint32_t k210_get_cpuclk(void)
* Name: k210_get_pll0clk * Name: k210_get_pll0clk
****************************************************************************/ ****************************************************************************/
#ifndef CONFIG_K210_WITH_QEMU
uint32_t k210_get_pll0clk(void) uint32_t k210_get_pll0clk(void)
{ {
uint32_t pll0; uint32_t pll0;
@@ -81,7 +80,6 @@ uint32_t k210_get_pll0clk(void)
return OSC_FREQ / nr * nf / od; return OSC_FREQ / nr * nf / od;
} }
#endif
/**************************************************************************** /****************************************************************************
* Name: k210_clockconfig * Name: k210_clockconfig
@@ -89,7 +87,6 @@ uint32_t k210_get_pll0clk(void)
void k210_clockconfig(void) void k210_clockconfig(void)
{ {
#ifndef CONFIG_K210_WITH_QEMU
uint32_t clksel0; uint32_t clksel0;
uint32_t div; uint32_t div;
@@ -133,5 +130,4 @@ void k210_clockconfig(void)
/* Workaround for stabilization */ /* Workaround for stabilization */
up_udelay(1); up_udelay(1);
#endif
} }
arch/risc-v/src/k210/k210_timerisr.c
-4
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@@ -46,11 +46,7 @@
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_K210_WITH_QEMU
#define MTIMER_FREQ 1000000
#else
#define MTIMER_FREQ (k210_get_cpuclk() / 50) #define MTIMER_FREQ (k210_get_cpuclk() / 50)
#endif
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
boards/Kconfig
+1 -1
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@@ -1116,7 +1116,7 @@ config ARCH_BOARD_LX_CPU
config ARCH_BOARD_MAIX_BIT config ARCH_BOARD_MAIX_BIT
bool "Sipeed Maix Bit board" bool "Sipeed Maix Bit board"
depends on ARCH_CHIP_K210 depends on ARCH_CHIP_K210
select ARCH_HAVE_LEDS if !K210_WITH_QEMU select ARCH_HAVE_LEDS
---help--- ---help---
This is the board configuration for the port of NuttX to the This is the board configuration for the port of NuttX to the
Sipeed Maix Bit board. This board features the RISC-V K210 Sipeed Maix Bit board. This board features the RISC-V K210