diff --git a/arch/arm/src/arm/up_head.S b/arch/arm/src/arm/up_head.S index 685e61b823c..e829fa9e556 100644 --- a/arch/arm/src/arm/up_head.S +++ b/arch/arm/src/arm/up_head.S @@ -148,6 +148,7 @@ __start: /* Clear the 16K level 1 page table */ ldr r4, .LCppgtable /* r4=phys. page table */ +#ifndef CONFIG_ARCH_ROMPGTABLE mov r0, r4 mov r1, #0 add r2, r0, #PGTABLE_SIZE @@ -179,6 +180,7 @@ __start: ldr r2, .LCvpgtable /* r2=virt. page table */ mksection r0, r2 /* r0=virt. base section */ str r3, [r4, r0, lsr #18] /* identity mapping */ +#endif /* CONFIG_ARCH_ROMPGTABLE */ /* The following logic will set up the ARM920/ARM926 for normal operation */ @@ -213,7 +215,7 @@ __start: orr r0, r0, #(CR_M|CR_P|CR_D) - /* In most architectures, vectors are reloated to 0xffff0000. + /* In most architectures, vectors are relocated to 0xffff0000. * -- but not all */ @@ -253,15 +255,22 @@ __start: .type .LCvstart, %object .LCvstart: .long .Lvstart + +#ifndef CONFIG_ARCH_ROMPGTABLE .type .LCmmuflags, %object .LCmmuflags: .long MMU_MEMFLAGS +#endif + .type .LCppagetable, %object .LCppgtable: - .long CONFIG_DRAM_START /* Physical start of DRAM */ + .long PGTABLE_BASE_PADDR /* Physical start of DRAM */ + +#ifndef CONFIG_ARCH_ROMPGTABLE .type .LCvpagetable, %object .LCvpgtable: - .long CONFIG_DRAM_VSTART /* Virtual start of DRAM */ + .long PGTABLE_BASE_VADDR /* Virtual start of DRAM */ +#endif .size _start, .-_start /**************************************************************************** @@ -278,6 +287,7 @@ __start: /* Remove the temporary null mapping */ +#ifndef CONFIG_ARCH_ROMPGTABLE ldr r4, .LCvpgtable /* r4=virtual page table */ ldr r1, .LCppgtable /* r1=phys. page table */ mksection r3, r1 /* r2=phys. base addr */ @@ -306,6 +316,7 @@ __start: add r3, r3, #SECTION_SIZE str r3, [r0], #4 .endr +#endif /* CONFIG_ARCH_ROMPGTABLE */ /* Zero BSS and set up the stack pointer */ diff --git a/arch/arm/src/lpc313x/lpc313x_boot.c b/arch/arm/src/lpc313x/lpc313x_boot.c index 758e384304e..5fe8a34d297 100755 --- a/arch/arm/src/lpc313x/lpc313x_boot.c +++ b/arch/arm/src/lpc313x/lpc313x_boot.c @@ -82,13 +82,17 @@ extern uint32_t _vector_end; /* End+1 of vector block */ * space of the LPCD313x. */ -#ifndef CONFIG_ARM_ROMPGTABLE +#ifndef CONFIG_ARCH_ROMPGTABLE static const struct section_mapping_s section_mapping[] = { { LPC313X_SHADOWSPACE_PSECTION, LPC313X_SHADOWSPACE_VSECTION, LPC313X_SHADOWSPACE_MMUFLAGS, LPC313X_SHADOWSPACE_NSECTIONS}, { LPC313X_INTSRAM_PSECTION, LPC313X_INTSRAM_VSECTION, LPC313X_INTSRAM_MMUFLAGS, LPC313X_INTSRAM_NSECTIONS}, +#ifdef CONFIG_ARCH_ROMPGTABLE + { LPC313X_INTSROM0_PSECTION, LPC313X_INTSROM0_VSECTION, + LPC313X_INTSROM_MMUFLAGS, LPC313X_INTSROM0_NSECTIONS}, +#endif { LPC313X_APB0_PSECTION, LPC313X_APB0_VSECTION, LPC313X_APB0_MMUFLAGS, LPC313X_APB0_NSECTIONS}, { LPC313X_APB1_PSECTION, LPC313X_APB1_VSECTION, @@ -129,7 +133,7 @@ static const struct section_mapping_s section_mapping[] = * Name: up_setlevel1entry ************************************************************************************/ -#ifndef CONFIG_ARM_ROMPGTABLE +#ifndef CONFIG_ARCH_ROMPGTABLE static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags) { uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR; @@ -167,7 +171,7 @@ static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr, * Name: up_setupmappings ************************************************************************************/ -#ifndef CONFIG_ARM_ROMPGTABLE +#ifndef CONFIG_ARCH_ROMPGTABLE static void up_setupmappings(void) { int i, j; @@ -201,7 +205,7 @@ static void up_setupmappings(void) * ************************************************************************************/ -#if !defined(CONFIG_ARM_ROMPGTABLE) && !defined(CONFIG_ARM_LOWVECTORS) +#if !defined(CONFIG_ARCH_ROMPGTABLE) && !defined(CONFIG_ARCH_LOWVECTORS) static void up_vectormapping(void) { uint32_t vector_paddr = LPC313X_VECTOR_PADDR; @@ -254,14 +258,14 @@ void up_boot(void) * IO regions (Including the vector region). */ -#ifndef CONFIG_ARM_ROMPGTABLE +#ifndef CONFIG_ARCH_ROMPGTABLE up_setupmappings(); /* Provide a special mapping for the IRAM interrupt vector positioned in high * memory. */ -#ifndef CONFIG_ARM_LOWVECTORS +#ifndef CONFIG_ARCH_LOWVECTORS up_vectormapping(); #endif #endif diff --git a/arch/arm/src/lpc313x/lpc313x_decodeirq.c b/arch/arm/src/lpc313x/lpc313x_decodeirq.c index 2fa87211472..9abaff3c10d 100755 --- a/arch/arm/src/lpc313x/lpc313x_decodeirq.c +++ b/arch/arm/src/lpc313x/lpc313x_decodeirq.c @@ -92,8 +92,8 @@ void up_decodeirq(uint32_t *regs) index = getreg32(LPC313X_INTC_VECTOR0) & INTC_VECTOR_INDEX_MASK; if (index != 0) { - /* Shift the index so that the range of IRQ numbers are in bits 0-7 (up - * 0-127 and back off the IRQ number by 1 so that the numbering is zero-based + /* Shift the index so that the range of IRQ numbers are in bits 0-7 (values + * 1-127) and back off the IRQ number by 1 so that the numbering is zero-based */ irq = (index >> INTC_VECTOR_INDEX_SHIFT) -1; diff --git a/arch/arm/src/lpc313x/lpc313x_memorymap.h b/arch/arm/src/lpc313x/lpc313x_memorymap.h index 6f639641cde..5f1ac4cd452 100755 --- a/arch/arm/src/lpc313x/lpc313x_memorymap.h +++ b/arch/arm/src/lpc313x/lpc313x_memorymap.h @@ -154,6 +154,7 @@ #define LPC313X_SHADOWSPACE_NSECTIONS 1 /* 4Kb - <1 section */ #define LPC313X_INTSRAM_NSECTIONS 1 /* 96 or 192Kb - <1 section */ #define LPC313X_APB0_NSECTIONS 1 /* 32Kb - <1 section */ +#define LPC313X_INTSROM0_NSECTIONS 1 /* 128Kb - <1 section */ #define LPC313X_APB1_NSECTIONS 1 /* 16Kb - <1 section */ #define LPC313X_APB2_NSECTIONS 1 /* 16Kb - <1 section */ #define LPC313X_APB3_NSECTIONS 1 /* 1Kb - <1 section */ @@ -176,6 +177,7 @@ #define LPC313X_SHADOWSPACE_MMUFLAGS MMU_MEMFLAGS #define LPC313X_INTSRAM_MMUFLAGS MMU_MEMFLAGS +#define LPC313X_INTSROM_MMUFLAGS MMU_MEMFLAGS #define LPC313X_APB0_MMUFLAGS MMU_IOFLAGS #define LPC313X_APB1_MMUFLAGS MMU_IOFLAGS #define LPC313X_APB2_MMUFLAGS MMU_IOFLAGS @@ -188,13 +190,20 @@ #define LPC313X_INTC_MMUFLAGS MMU_IOFLAGS #define LPC313X_NAND_MMUFLAGS MMU_IOFLAGS +/* board_memorymap.h contains special mappings that are needed when a ROM + * memory map is used. It is included in this odd location becaue it depends + * on some the virtual address definitions provided above. + */ + +#include + /* LPC313X Virtual (mapped) Memory Map. These are the mappings that will * be created if the page table lies in RAM. If the platform has another, * read-only, pre-initialized page table (perhaps in ROM), then the board.h * file must provide these definitions. */ -#ifndef CONFIG_ARM_ROMPGTABLE +#ifndef CONFIG_ARCH_ROMPGTABLE # define LPC313X_SHADOWSPACE_VSECTION 0x00000000 /* 0x00000000-0x00000fff: Shadow Area 4Kb */ # define LPC313X_INTSRAM_VSECTION 0x11028000 /* Internal SRAM 96Kb-192Kb */ # define LPC313X_INTSRAM0_VADDR 0x11028000 /* 0x11028000-0x1103ffff: Internal SRAM 0 96Kb */ @@ -249,18 +258,19 @@ # endif /* A sanity check, if the configuration says that the page table is read-only - * and pre-initialized (maybe ROM), then it should have also defined CONFIG_PGTABLE_BASE + * and pre-initialized (maybe ROM), then it should have also defined both of + * the page table base addresses. */ -# ifdef CONFIG_ARM_ROMPGTABLE -# error "CONFIG_ARM_ROMPGTABLE defined; CONFIG_PGTABLE_BASE not defined" +# ifdef CONFIG_ARCH_ROMPGTABLE +# error "CONFIG_ARCH_ROMPGTABLE defined; PGTABLE_BASE_P/VADDR not defined" # else /* We must declare the page table in ISRAM0 or 1. We decide depending upon * where the vector table was place. */ -# ifdef CONFIG_ARM_ROMPGTABLE /* Vectors located at 0x0000:0000 */ +# ifdef CONFIG_ARCH_ROMPGTABLE /* Vectors located at 0x0000:0000 */ /* In this case, ISRAM0 will be shadowed at address 0x0000:0000. The page * table must lie at the top 16Kb of ISRAM1 (or ISRAM0 if this is a LPC3130) @@ -311,7 +321,7 @@ /* Determine the base address of the vector table */ #define VECTOR_TABLE_SIZE 0x00010000 -#ifdef CONFIG_ARM_LOWVECTORS /* Vectors located at 0x0000:0000 */ +#ifdef CONFIG_ARCH_LOWVECTORS /* Vectors located at 0x0000:0000 */ # define LPC313X_VECTOR_PADDR LPC313X_SHADOWSPACE_PSECTION # define LPC313X_VECTOR_VADDR 0x00000000 # define LPC313X_VECTOR_VCOARSE 0x00000000