mirror of
https://github.com/apache/nuttx.git
synced 2026-05-29 20:56:47 +08:00
style: fix multiple style issues and remove unused
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
committed by
Xiang Xiao
parent
f06c509f9e
commit
816cb3cfaf
+16
-11
@@ -142,7 +142,7 @@
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#if defined(CONFIG_MPU_RESET)
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#if defined(CONFIG_MPU_RESET)
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void mpu_reset(void);
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void mpu_reset(void);
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#else
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#else
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# define mpu_reset() do { } while (0)
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# define mpu_reset()
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#endif
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#endif
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/****************************************************************************
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/****************************************************************************
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@@ -157,7 +157,7 @@ void mpu_reset(void);
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#if defined(CONFIG_ARM_MPU_EARLY_RESET)
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#if defined(CONFIG_ARM_MPU_EARLY_RESET)
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void mpu_early_reset(void);
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void mpu_early_reset(void);
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#else
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#else
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# define mpu_early_reset() do { } while (0)
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# define mpu_early_reset()
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#endif
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#endif
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#ifdef CONFIG_ARM_MPU
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#ifdef CONFIG_ARM_MPU
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@@ -246,8 +246,7 @@ void mpu_control(bool enable, bool hfnmiena, bool privdefena);
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*
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*
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****************************************************************************/
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****************************************************************************/
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void mpu_configure_region(uintptr_t base, size_t size,
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void mpu_configure_region(uintptr_t base, size_t size, uint32_t flags);
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uint32_t flags);
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/****************************************************************************
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/****************************************************************************
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* Inline Functions
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* Inline Functions
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@@ -270,9 +269,10 @@ void mpu_configure_region(uintptr_t base, size_t size,
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(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified", \
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(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified", \
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(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT, \
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(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT, \
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(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT); \
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(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT); \
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} while (0)
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} \
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while (0)
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#else
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#else
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# define mpu_showtype() do { } while (0)
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# define mpu_showtype()
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#endif
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#endif
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/****************************************************************************
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/****************************************************************************
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@@ -294,7 +294,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
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MPU_RASR_S | /* Shareable */ \
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MPU_RASR_S | /* Shareable */ \
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MPU_RASR_AP_RWNO /* P:RW U:None */ \
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MPU_RASR_AP_RWNO /* P:RW U:None */ \
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/* Instruction access */); \
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/* Instruction access */); \
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} while (0)
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} \
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while (0)
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/****************************************************************************
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/****************************************************************************
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* Name: mpu_user_flash
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* Name: mpu_user_flash
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@@ -315,7 +316,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
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/* Not Shareable */ \
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/* Not Shareable */ \
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MPU_RASR_AP_RORO /* P:RO U:RO */ \
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MPU_RASR_AP_RORO /* P:RO U:RO */ \
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/* Instruction access */); \
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/* Instruction access */); \
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} while (0)
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} \
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while (0)
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/****************************************************************************
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/****************************************************************************
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* Name: mpu_priv_flash
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* Name: mpu_priv_flash
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@@ -336,7 +338,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
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/* Not Shareable */ \
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/* Not Shareable */ \
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MPU_RASR_AP_RONO /* P:RO U:None */ \
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MPU_RASR_AP_RONO /* P:RO U:None */ \
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/* Instruction access */); \
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/* Instruction access */); \
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} while (0)
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} \
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while (0)
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/****************************************************************************
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/****************************************************************************
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* Name: mpu_user_intsram
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* Name: mpu_user_intsram
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@@ -357,7 +360,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
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MPU_RASR_S | /* Shareable */ \
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MPU_RASR_S | /* Shareable */ \
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MPU_RASR_AP_RWRW /* P:RW U:RW */ \
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MPU_RASR_AP_RWRW /* P:RW U:RW */ \
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/* Instruction access */); \
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/* Instruction access */); \
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} while (0)
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} \
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while (0)
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/****************************************************************************
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/****************************************************************************
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* Name: mpu_priv_intsram
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* Name: mpu_priv_intsram
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@@ -378,7 +382,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
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MPU_RASR_S | /* Shareable */ \
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MPU_RASR_S | /* Shareable */ \
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MPU_RASR_AP_RWNO /* P:RW U:None */ \
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MPU_RASR_AP_RWNO /* P:RW U:None */ \
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/* Instruction access */); \
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/* Instruction access */); \
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} while (0)
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} \
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while (0)
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/****************************************************************************
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/****************************************************************************
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* Name: mpu_priv_shmem
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* Name: mpu_priv_shmem
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@@ -50,18 +50,10 @@
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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/* BLE packet buffer max number */
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#define BLE_BUF_NUM CONFIG_ESP32_BLE_PKTBUF_NUM
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/* BLE packet buffer max size */
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/* BLE packet buffer max size */
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#define BLE_BUF_SIZE 1024
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#define BLE_BUF_SIZE 1024
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/* Low-priority work queue process RX/TX */
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#define BLE_WORK LPWORK
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/****************************************************************************
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/****************************************************************************
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* Private Types
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* Private Types
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****************************************************************************/
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****************************************************************************/
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@@ -317,7 +317,7 @@ static int esp32_getcpuint(uint32_t intmask)
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* that CPU interrupt is available.
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* that CPU interrupt is available.
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*/
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*/
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bitmask = (1ul << cpuint);
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bitmask = 1ul << cpuint;
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if ((intset & bitmask) != 0)
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if ((intset & bitmask) != 0)
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{
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{
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/* Got it! */
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/* Got it! */
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@@ -335,7 +335,7 @@ static int esp32_getcpuint(uint32_t intmask)
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if (ret >= 0)
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if (ret >= 0)
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{
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{
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xtensa_enable_cpuint(&g_intenable[cpu], (1ul << ret));
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xtensa_enable_cpuint(&g_intenable[cpu], 1ul << ret);
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}
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}
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return ret;
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return ret;
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@@ -411,7 +411,7 @@ static void esp32_free_cpuint(int cpuint)
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/* Mark the CPU interrupt as available */
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/* Mark the CPU interrupt as available */
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bitmask = (1ul << cpuint);
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bitmask = 1ul << cpuint;
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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if (up_cpu_index() != 0)
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if (up_cpu_index() != 0)
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@@ -556,7 +556,7 @@ void up_disable_irq(int irq)
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}
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}
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#endif
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#endif
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xtensa_disable_cpuint(&g_intenable[cpu], (1ul << cpuint));
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xtensa_disable_cpuint(&g_intenable[cpu], 1ul << cpuint);
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}
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}
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else
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else
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{
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{
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@@ -612,7 +612,7 @@ void up_enable_irq(int irq)
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/* Enable the CPU interrupt now for internal CPU. */
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/* Enable the CPU interrupt now for internal CPU. */
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xtensa_enable_cpuint(&g_intenable[cpu], (1ul << cpuint));
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xtensa_enable_cpuint(&g_intenable[cpu], 1ul << cpuint);
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}
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}
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else
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else
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{
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{
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@@ -956,7 +956,7 @@ uint32_t *xtensa_int_decode(uint32_t cpuints, uint32_t *regs)
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for (; bit < ESP32_NCPUINTS && cpuints != 0; bit++)
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for (; bit < ESP32_NCPUINTS && cpuints != 0; bit++)
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{
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{
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mask = (1 << bit);
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mask = 1 << bit;
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if ((cpuints & mask) != 0)
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if ((cpuints & mask) != 0)
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{
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{
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/* Extract the IRQ number from the mapping table */
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/* Extract the IRQ number from the mapping table */
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