style: fix multiple style issues and remove unused

Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
This commit is contained in:
Petro Karashchenko
2023-09-10 15:20:43 +03:00
committed by Xiang Xiao
parent f06c509f9e
commit 816cb3cfaf
6 changed files with 57 additions and 60 deletions
+16 -11
View File
@@ -142,7 +142,7 @@
#if defined(CONFIG_MPU_RESET) #if defined(CONFIG_MPU_RESET)
void mpu_reset(void); void mpu_reset(void);
#else #else
# define mpu_reset() do { } while (0) # define mpu_reset()
#endif #endif
/**************************************************************************** /****************************************************************************
@@ -157,7 +157,7 @@ void mpu_reset(void);
#if defined(CONFIG_ARM_MPU_EARLY_RESET) #if defined(CONFIG_ARM_MPU_EARLY_RESET)
void mpu_early_reset(void); void mpu_early_reset(void);
#else #else
# define mpu_early_reset() do { } while (0) # define mpu_early_reset()
#endif #endif
#ifdef CONFIG_ARM_MPU #ifdef CONFIG_ARM_MPU
@@ -246,8 +246,7 @@ void mpu_control(bool enable, bool hfnmiena, bool privdefena);
* *
****************************************************************************/ ****************************************************************************/
void mpu_configure_region(uintptr_t base, size_t size, void mpu_configure_region(uintptr_t base, size_t size, uint32_t flags);
uint32_t flags);
/**************************************************************************** /****************************************************************************
* Inline Functions * Inline Functions
@@ -270,9 +269,10 @@ void mpu_configure_region(uintptr_t base, size_t size,
(regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified", \ (regval & MPU_TYPE_SEPARATE) != 0 ? "Separate" : "Unified", \
(regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT, \ (regval & MPU_TYPE_DREGION_MASK) >> MPU_TYPE_DREGION_SHIFT, \
(regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT); \ (regval & MPU_TYPE_IREGION_MASK) >> MPU_TYPE_IREGION_SHIFT); \
} while (0) } \
while (0)
#else #else
# define mpu_showtype() do { } while (0) # define mpu_showtype()
#endif #endif
/**************************************************************************** /****************************************************************************
@@ -294,7 +294,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
MPU_RASR_S | /* Shareable */ \ MPU_RASR_S | /* Shareable */ \
MPU_RASR_AP_RWNO /* P:RW U:None */ \ MPU_RASR_AP_RWNO /* P:RW U:None */ \
/* Instruction access */); \ /* Instruction access */); \
} while (0) } \
while (0)
/**************************************************************************** /****************************************************************************
* Name: mpu_user_flash * Name: mpu_user_flash
@@ -315,7 +316,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Not Shareable */ \ /* Not Shareable */ \
MPU_RASR_AP_RORO /* P:RO U:RO */ \ MPU_RASR_AP_RORO /* P:RO U:RO */ \
/* Instruction access */); \ /* Instruction access */); \
} while (0) } \
while (0)
/**************************************************************************** /****************************************************************************
* Name: mpu_priv_flash * Name: mpu_priv_flash
@@ -336,7 +338,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
/* Not Shareable */ \ /* Not Shareable */ \
MPU_RASR_AP_RONO /* P:RO U:None */ \ MPU_RASR_AP_RONO /* P:RO U:None */ \
/* Instruction access */); \ /* Instruction access */); \
} while (0) } \
while (0)
/**************************************************************************** /****************************************************************************
* Name: mpu_user_intsram * Name: mpu_user_intsram
@@ -357,7 +360,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
MPU_RASR_S | /* Shareable */ \ MPU_RASR_S | /* Shareable */ \
MPU_RASR_AP_RWRW /* P:RW U:RW */ \ MPU_RASR_AP_RWRW /* P:RW U:RW */ \
/* Instruction access */); \ /* Instruction access */); \
} while (0) } \
while (0)
/**************************************************************************** /****************************************************************************
* Name: mpu_priv_intsram * Name: mpu_priv_intsram
@@ -378,7 +382,8 @@ void mpu_configure_region(uintptr_t base, size_t size,
MPU_RASR_S | /* Shareable */ \ MPU_RASR_S | /* Shareable */ \
MPU_RASR_AP_RWNO /* P:RW U:None */ \ MPU_RASR_AP_RWNO /* P:RW U:None */ \
/* Instruction access */); \ /* Instruction access */); \
} while (0) } \
while (0)
/**************************************************************************** /****************************************************************************
* Name: mpu_priv_shmem * Name: mpu_priv_shmem
-8
View File
@@ -50,18 +50,10 @@
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/* BLE packet buffer max number */
#define BLE_BUF_NUM CONFIG_ESP32_BLE_PKTBUF_NUM
/* BLE packet buffer max size */ /* BLE packet buffer max size */
#define BLE_BUF_SIZE 1024 #define BLE_BUF_SIZE 1024
/* Low-priority work queue process RX/TX */
#define BLE_WORK LPWORK
/**************************************************************************** /****************************************************************************
* Private Types * Private Types
****************************************************************************/ ****************************************************************************/
+6 -6
View File
@@ -317,7 +317,7 @@ static int esp32_getcpuint(uint32_t intmask)
* that CPU interrupt is available. * that CPU interrupt is available.
*/ */
bitmask = (1ul << cpuint); bitmask = 1ul << cpuint;
if ((intset & bitmask) != 0) if ((intset & bitmask) != 0)
{ {
/* Got it! */ /* Got it! */
@@ -335,7 +335,7 @@ static int esp32_getcpuint(uint32_t intmask)
if (ret >= 0) if (ret >= 0)
{ {
xtensa_enable_cpuint(&g_intenable[cpu], (1ul << ret)); xtensa_enable_cpuint(&g_intenable[cpu], 1ul << ret);
} }
return ret; return ret;
@@ -411,7 +411,7 @@ static void esp32_free_cpuint(int cpuint)
/* Mark the CPU interrupt as available */ /* Mark the CPU interrupt as available */
bitmask = (1ul << cpuint); bitmask = 1ul << cpuint;
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
if (up_cpu_index() != 0) if (up_cpu_index() != 0)
@@ -556,7 +556,7 @@ void up_disable_irq(int irq)
} }
#endif #endif
xtensa_disable_cpuint(&g_intenable[cpu], (1ul << cpuint)); xtensa_disable_cpuint(&g_intenable[cpu], 1ul << cpuint);
} }
else else
{ {
@@ -612,7 +612,7 @@ void up_enable_irq(int irq)
/* Enable the CPU interrupt now for internal CPU. */ /* Enable the CPU interrupt now for internal CPU. */
xtensa_enable_cpuint(&g_intenable[cpu], (1ul << cpuint)); xtensa_enable_cpuint(&g_intenable[cpu], 1ul << cpuint);
} }
else else
{ {
@@ -956,7 +956,7 @@ uint32_t *xtensa_int_decode(uint32_t cpuints, uint32_t *regs)
for (; bit < ESP32_NCPUINTS && cpuints != 0; bit++) for (; bit < ESP32_NCPUINTS && cpuints != 0; bit++)
{ {
mask = (1 << bit); mask = 1 << bit;
if ((cpuints & mask) != 0) if ((cpuints & mask) != 0)
{ {
/* Extract the IRQ number from the mapping table */ /* Extract the IRQ number from the mapping table */