Refine the preprocessor conditional guard style (#190)

arch/arm/include/cxd56xx/adc.h

@@ -93,4 +93,4 @@
 
 int cxd56_adcinitialize(void);
 
-#endif  /* __ARCH_ARM_INCLUDE_CXD56XX_ADC_H */
+#endif /* __ARCH_ARM_INCLUDE_CXD56XX_ADC_H */

arch/arm/include/cxd56xx/crashdump.h

@@ -162,4 +162,4 @@ extern "C"
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif  /* __ARCH_ARM_INCLUDE_CXD56XX_CRASHDUMP_H */
+#endif /* __ARCH_ARM_INCLUDE_CXD56XX_CRASHDUMP_H */

arch/arm/include/cxd56xx/scu.h

@@ -557,4 +557,4 @@ void scu_initialize(void);
 
 void scu_uninitialize(void);
 
-#endif  /* __ARCH_ARM_INCLUDE_CXD56XX_SCU_H */
+#endif /* __ARCH_ARM_INCLUDE_CXD56XX_SCU_H */

arch/arm/include/cxd56xx/timer.h

@@ -63,4 +63,4 @@ struct timer_sethandler_s
   CODE tccb_t handler;         /* The timer interrupt handler */
 };
 
-#endif  /* __ARCH_ARM_INCLUDE_CXD56XX_TIMER_H */
+#endif /* __ARCH_ARM_INCLUDE_CXD56XX_TIMER_H */

arch/arm/include/setjmp.h

@@ -34,7 +34,7 @@
  ****************************************************************************/
 
 #ifndef __ARCH_ARM_INCLUDE_SETJUMP_H
-#define __ARCH_ARM_INCLUDE_SETJUMP_H 1
+#define __ARCH_ARM_INCLUDE_SETJUMP_H
 
 /****************************************************************************
  * Included Files

arch/arm/include/tls.h

@@ -34,7 +34,7 @@
  ****************************************************************************/
 
 #ifndef __ARCH_ARM_INCLUDE_TLS_H
-#define __ARCH_ARM_INCLUDE_TLS_H 1
+#define __ARCH_ARM_INCLUDE_TLS_H
 
 /****************************************************************************
  * Included Files

arch/arm/src/am335x/am335x_gpio.h

@@ -314,4 +314,4 @@ gpio_pinset_t am335x_periph_gpio(gpio_pinset_t pinset);
 #if defined(__cplusplus)
 }
 #endif
-#endif  /* __ARCH_ARM_SRC_AM335X_AM335X_GPIO_H */
+#endif /* __ARCH_ARM_SRC_AM335X_AM335X_GPIO_H */

arch/arm/src/arm/arm.h

@@ -443,4 +443,4 @@ extern "C"
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_COMMON_ARM_H */
+#endif /* __ARCH_ARM_SRC_COMMON_ARM_H */

arch/arm/src/armv6-m/exc_return.h

@@ -100,4 +100,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_ARMV6_M_EXC_RETURN_H */
+#endif /* __ARCH_ARM_SRC_ARMV6_M_EXC_RETURN_H */

arch/arm/src/armv6-m/psr.h

@@ -74,4 +74,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H */
+#endif /* __ARCH_ARM_SRC_COMMON_ARMV6_M_PSR_H */

arch/arm/src/armv6-m/svcall.h

@@ -142,4 +142,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_ARMV6_M_SVCALL_H */
+#endif /* __ARCH_ARM_SRC_ARMV6_M_SVCALL_H */

arch/arm/src/armv7-a/addrenv.h

@@ -121,5 +121,5 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* CONFIG_ARCH_ADDRENV */
+#endif /* CONFIG_ARCH_ADDRENV */
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_ADDRENV_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_ADDRENV_H */

arch/arm/src/armv7-a/arm.h

@@ -130,4 +130,4 @@ void arm_data_initialize(void);
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_ARM_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_ARM_H */

arch/arm/src/armv7-a/barriers.h

@@ -54,4 +54,4 @@
 #define ARM_ISB()  arm_isb(15)
 #define ARM_DMB()  arm_dmb(15)
 
-#endif  /* __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H */
+#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_A_BARRIERS_H */

arch/arm/src/armv7-a/cp15_cacheops.h

@@ -1080,4 +1080,4 @@ void cp15_flush_dcache(uintptr_t start, uintptr_t end);
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_CP15_CACHEOPS_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_CP15_CACHEOPS_H */

arch/arm/src/armv7-a/fpu.h

@@ -90,4 +90,4 @@ void arm_fpuconfig(void);
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_FPU_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_FPU_H */

arch/arm/src/armv7-a/l2cc.h

@@ -255,4 +255,4 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr);
 #  define l2cc_flush(s,e)
 
 #endif /* CONFIG_ARCH_L2CACHE */
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_L2CC_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_L2CC_H */

arch/arm/src/armv7-a/mmu.h

@@ -1510,4 +1510,4 @@ void mmu_invalidate_region(uint32_t vstart, size_t size);
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_MMU_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_MMU_H */

arch/arm/src/armv7-a/sctlr.h

@@ -416,4 +416,4 @@ extern "C"
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_SCTLR_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_SCTLR_H */

arch/arm/src/armv7-a/smp.h

@@ -140,6 +140,6 @@ void __cpu3_start(void);
 
 void arm_cpu_boot(int cpu);
 
-#endif  /* __ASSEMBLY__ */
+#endif /* __ASSEMBLY__ */
-#endif  /* CONFIG_SMP */
+#endif /* CONFIG_SMP */
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_SMP_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_SMP_H */

arch/arm/src/armv7-a/svcall.h

@@ -127,4 +127,4 @@
  ************************************************************************************/
 
 #endif /* CONFIG_LIB_SYSCALL */
-#endif  /* __ARCH_ARM_SRC_ARMV7_A_SVCALL_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_A_SVCALL_H */

arch/arm/src/armv7-m/barriers.h

@@ -54,4 +54,4 @@
 #define ARM_ISB()  arm_isb(15)
 #define ARM_DMB()  arm_dmb(15)
 
-#endif  /* __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H */
+#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_BARRIERS_H */

arch/arm/src/armv7-m/exc_return.h

@@ -116,4 +116,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_M_EXC_RETURN_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_M_EXC_RETURN_H */

arch/arm/src/armv7-m/mpu.h

@@ -499,5 +499,5 @@ static inline void mpu_user_peripheral(uintptr_t base, size_t size)
 }
 #endif
 
-#endif  /* __ASSEMBLY__ */
+#endif /* __ASSEMBLY__ */
-#endif  /* __ARCH_ARM_SRC_ARMV7M_MPU_H */
+#endif /* __ARCH_ARM_SRC_ARMV7M_MPU_H */

arch/arm/src/armv7-m/psr.h

@@ -84,4 +84,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H */
+#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_PSR_H */

arch/arm/src/armv7-m/ram_vectors.h

@@ -115,4 +115,4 @@ void exception_common(void);
 int up_ramvec_attach(int irq, up_vector_t vector);
 
 #endif /* CONFIG_ARCH_RAMVECTORS */
-#endif  /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */
+#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */

arch/arm/src/armv7-m/svcall.h

@@ -142,4 +142,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_M_SVCALL_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_M_SVCALL_H */

arch/arm/src/armv7-m/up_cache.c

@@ -283,7 +283,7 @@ void up_enable_dcache(void)
   ARM_DSB();
   ARM_ISB();
 }
-#endif  /* CONFIG_ARMV7M_DCACHE */
+#endif /* CONFIG_ARMV7M_DCACHE */
 
 /****************************************************************************
  * Name: up_disable_dcache
@@ -356,7 +356,7 @@ void up_disable_dcache(void)
   ARM_DSB();
   ARM_ISB();
 }
-#endif  /* CONFIG_ARMV7M_DCACHE */
+#endif /* CONFIG_ARMV7M_DCACHE */
 
 /****************************************************************************
  * Name: up_invalidate_dcache
@@ -427,7 +427,7 @@ void up_invalidate_dcache(uintptr_t start, uintptr_t end)
   ARM_DSB();
   ARM_ISB();
 }
-#endif  /* CONFIG_ARMV7M_DCACHE */
+#endif /* CONFIG_ARMV7M_DCACHE */
 
 /****************************************************************************
  * Name: up_invalidate_dcache_all
@@ -493,7 +493,7 @@ void up_invalidate_dcache_all(void)
   ARM_DSB();
   ARM_ISB();
 }
-#endif  /* CONFIG_ARMV7M_DCACHE */
+#endif /* CONFIG_ARMV7M_DCACHE */
 
 /****************************************************************************
  * Name: up_clean_dcache

arch/arm/src/armv7-r/arm.h

@@ -167,4 +167,4 @@ void arm_data_initialize(void);
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_R_CPSR_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_R_CPSR_H */

arch/arm/src/armv7-r/barriers.h

@@ -54,4 +54,4 @@
 #define ARM_ISB()  arm_isb(15)
 #define ARM_DMB()  arm_dmb(15)
 
-#endif  /* __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H */
+#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_R_BARRIERS_H */

arch/arm/src/armv7-r/cp15_cacheops.h

@@ -1088,4 +1088,4 @@ void cp15_flush_dcache(uintptr_t start, uintptr_t end);
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_R_CP15_CACHEOPS_H */

arch/arm/src/armv7-r/fpu.h

@@ -90,4 +90,4 @@ void arm_fpuconfig(void);
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_R_FPU_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_R_FPU_H */

arch/arm/src/armv7-r/l2cc.h

@@ -255,4 +255,4 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr);
 #  define l2cc_flush(s,e)
 
 #endif /* CONFIG_ARCH_L2CACHE */
-#endif  /* __ARCH_ARM_SRC_ARMV7_R_L2CC_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_R_L2CC_H */

arch/arm/src/armv7-r/mpu.h

@@ -828,5 +828,5 @@ static inline void mpu_user_intsram_wb(uintptr_t base, size_t size)
 }
 #endif
 
-#endif  /* __ASSEMBLY__ */
+#endif /* __ASSEMBLY__ */
-#endif  /* __ARCH_ARM_SRC_ARMV7R_MPU_H */
+#endif /* __ARCH_ARM_SRC_ARMV7R_MPU_H */

arch/arm/src/armv7-r/sctlr.h

@@ -542,4 +542,4 @@ extern "C"
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_ARMV7_R_SCTLR_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_R_SCTLR_H */

arch/arm/src/armv7-r/svcall.h

@@ -127,4 +127,4 @@
  ************************************************************************************/
 
 #endif /* CONFIG_LIB_SYSCALL */
-#endif  /* __ARCH_ARM_SRC_ARMV7_R_SVCALL_H */
+#endif /* __ARCH_ARM_SRC_ARMV7_R_SVCALL_H */

arch/arm/src/c5471/chip.h

@@ -368,4 +368,4 @@
  * Public Function Prototypes
  ****************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_C5471_CHIP_H */
+#endif /* __ARCH_ARM_SRC_C5471_CHIP_H */

arch/arm/src/common/up_arch.h

@@ -83,4 +83,4 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits);
 #endif
 
 #endif /* __ASSEMBLY__ */
-#endif  /* ___ARCH_ARM_SRC_COMMON_UP_ARCH_H */
+#endif /* ___ARCH_ARM_SRC_COMMON_UP_ARCH_H */

arch/arm/src/common/up_internal.h

@@ -540,4 +540,4 @@ void up_stack_color(FAR void *stackbase, size_t nbytes);
 #endif
 #endif /* __ASSEMBLY__ */
 
-#endif  /* __ARCH_ARM_SRC_COMMON_UP_INTERNAL_H */
+#endif /* __ARCH_ARM_SRC_COMMON_UP_INTERNAL_H */

arch/arm/src/cxd56xx/cxd56_gnss.c

@@ -95,7 +95,7 @@ extern int PM_SleepCpu(int cpuid, int mode);
 #endif
 
 #define CXD56_GNSS_GPS_CPUID                  1
-#ifdef  CONFIG_CXD56_GNSS_FW_RTK
+#ifdef CONFIG_CXD56_GNSS_FW_RTK
 #  define CXD56_GNSS_FWNAME                   "gnssfwrtk"
 #else
 #  define CXD56_GNSS_FWNAME                   "gnssfw"

arch/arm/src/dm320/chip.h

@@ -58,4 +58,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_DM320_CHIP_H */
+#endif /* __ARCH_ARM_SRC_DM320_CHIP_H */

arch/arm/src/dm320/dm320_ahb.h

@@ -56,4 +56,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_DM320_DM320_AHB_H */
+#endif /* __ARCH_ARM_SRC_DM320_DM320_AHB_H */

arch/arm/src/dm320/dm320_busc.h

@@ -55,4 +55,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_DM320_DM320_BUSC_H */
+#endif /* __ARCH_ARM_SRC_DM320_DM320_BUSC_H */

arch/arm/src/dm320/dm320_clkc.h

@@ -78,4 +78,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_DM320_DM320_CLKC_H */
+#endif /* __ARCH_ARM_SRC_DM320_DM320_CLKC_H */

arch/arm/src/dm320/dm320_emif.h

@@ -105,4 +105,4 @@
 
 #endif
 
-#endif  /* __ARCH_ARM_SRC_DM320_DM320_EMIF_H */
+#endif /* __ARCH_ARM_SRC_DM320_DM320_EMIF_H */

arch/arm/src/dm320/dm320_gio.h

@@ -173,4 +173,4 @@
 
 #endif
 
-#endif  /* __DM320_DM320_GIO_H */
+#endif /* __DM320_DM320_GIO_H */

arch/arm/src/dm320/dm320_intc.h

@@ -98,4 +98,4 @@
 
 #endif
 
-#endif  /* __ARCH_ARM_SRC_DM320_DM320_INTC_H */
+#endif /* __ARCH_ARM_SRC_DM320_DM320_INTC_H */

arch/arm/src/dm320/dm320_memorymap.h

@@ -261,4 +261,4 @@
 
 #endif
 
-#endif  /* __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H */
+#endif /* __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H */

arch/arm/src/dm320/dm320_osd.h

@@ -111,4 +111,4 @@
  * Inline Functions
  ************************************************************************************/
 
-#endif  /* __ARCH_ARM_SRC_DM320_DM320_OSD_H */
+#endif /* __ARCH_ARM_SRC_DM320_DM320_OSD_H */

arch/arm/src/dm320/dm320_timer.h

@@ -105,4 +105,4 @@
 
 #endif
 
-#endif  /* __ARCH_ARM_SRC_DM320_DM320_TIMER_H */
+#endif /* __ARCH_ARM_SRC_DM320_DM320_TIMER_H */