diff --git a/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h
index 843f006135c..88eb1ad6729 100644
--- a/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h
+++ b/arch/arm/src/stm32/chip/stm32f10xxx_memorymap.h
@@ -47,7 +47,7 @@
 #define STM32_SRAMBB_BASE    0x22000000
 #define STM32_PERIPH_BASE    0x40000000
 
-#define STM32_REGION_MASK    0x0fffffff
+#define STM32_REGION_MASK    0xf0000000
 #define STM32_IS_SRAM(a)     ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE)
 
 /* Register Base Address ************************************************************/
diff --git a/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h
index f26ccff9444..777b9595fea 100644
--- a/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h
+++ b/arch/arm/src/stm32/chip/stm32f20xxx_memorymap.h
@@ -55,7 +55,7 @@
                                             /* 0xc0000000-0xdfffffff: 512Mb (not used) */
 #define STM32_CORTEX_BASE    0xe0000000     /* 0xe0000000-0xffffffff: 512Mb Cortex-M4 block */
 
-#define STM32_REGION_MASK    0x0fffffff
+#define STM32_REGION_MASK    0xf0000000
 #define STM32_IS_SRAM(a)     ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE)
 #define STM32_IS_EXTSRAM(a)  ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1)
 
diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h b/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h
index a7ee8e97cfe..6b99121216d 100644
--- a/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h
+++ b/arch/arm/src/stm32/chip/stm32f40xxx_memorymap.h
@@ -55,7 +55,7 @@
                                             /* 0xc0000000-0xdfffffff: 512Mb (not used) */
 #define STM32_CORTEX_BASE    0xe0000000     /* 0xe0000000-0xffffffff: 512Mb Cortex-M4 block */
 
-#define STM32_REGION_MASK    0x0fffffff
+#define STM32_REGION_MASK    0xf0000000
 #define STM32_IS_SRAM(a)     ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE)
 #define STM32_IS_EXTSRAM(a)  ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1)