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risc-v: Rename up_fault to riscv_fault

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Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
This commit is contained in:
Huang Qi
2022-02-17 21:14:51 +08:00
committed by Xiang Xiao
parent 979124928c
commit 7c18290331
5 changed files with 6 additions and 23 deletions
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arch/risc-v/src/c906/c906_irq_dispatch.c
+1 -7
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@@ -37,12 +37,6 @@
#include "group/group.h" #include "group/group.h"
/****************************************************************************
* Public Data
****************************************************************************/
extern void up_fault(int irq, uint64_t *regs);
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
@@ -60,7 +54,7 @@ void *riscv_dispatch_irq(uint64_t vector, uint64_t *regs)
if (vector < RISCV_IRQ_ECALLU) if (vector < RISCV_IRQ_ECALLU)
{ {
up_fault((int)irq, regs); riscv_fault((int)irq, regs);
} }
/* Firstly, check if the irq is machine external interrupt */ /* Firstly, check if the irq is machine external interrupt */
arch/risc-v/src/common/riscv_fault.c
+2 -2
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@@ -47,14 +47,14 @@
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
* Name: up_fault * Name: riscv_fault
* *
* Description: * Description:
* This is Fault exception handler. * This is Fault exception handler.
* *
****************************************************************************/ ****************************************************************************/
void up_fault(int irq, uintptr_t *regs) void riscv_fault(int irq, uintptr_t *regs)
{ {
CURRENT_REGS = regs; CURRENT_REGS = regs;
arch/risc-v/src/common/riscv_internal.h
+1
View File
@@ -221,6 +221,7 @@ void rpmsg_serialinit(void);
/* Exception Handler ********************************************************/ /* Exception Handler ********************************************************/
void riscv_fault(int irq, uintptr_t *regs);
void riscv_exception(uintptr_t mcause, uintptr_t *regs); void riscv_exception(uintptr_t mcause, uintptr_t *regs);
/* Debug ********************************************************************/ /* Debug ********************************************************************/
arch/risc-v/src/k210/k210_irq_dispatch.c
+1 -7
View File
@@ -37,12 +37,6 @@
#include "group/group.h" #include "group/group.h"
/****************************************************************************
* Public Data
****************************************************************************/
extern void up_fault(int irq, uintptr_t *regs);
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
@@ -60,7 +54,7 @@ void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
if (vector < RISCV_IRQ_ECALLU) if (vector < RISCV_IRQ_ECALLU)
{ {
up_fault((int)irq, regs); riscv_fault((int)irq, regs);
} }
/* Firstly, check if the irq is machine external interrupt */ /* Firstly, check if the irq is machine external interrupt */
arch/risc-v/src/mpfs/mpfs_irq_dispatch.c
+1 -7
View File
@@ -39,12 +39,6 @@
#include "hardware/mpfs_memorymap.h" #include "hardware/mpfs_memorymap.h"
#include "hardware/mpfs_plic.h" #include "hardware/mpfs_plic.h"
/****************************************************************************
* Public Data
****************************************************************************/
extern void up_fault(int irq, uint64_t *regs);
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
****************************************************************************/ ****************************************************************************/
@@ -68,7 +62,7 @@ void *riscv_dispatch_irq(uint64_t vector, uint64_t *regs)
vector == RISCV_IRQ_SROREPF || vector == RISCV_IRQ_SROREPF ||
vector == RISCV_IRQ_RESERVED) vector == RISCV_IRQ_RESERVED)
{ {
up_fault((int)irq, regs); riscv_fault((int)irq, regs);
} }
if (vector & 0x8000000000000000) if (vector & 0x8000000000000000)