diff --git a/ChangeLog b/ChangeLog index 3fdb1e4158d..248130c1bea 100644 --- a/ChangeLog +++ b/ChangeLog @@ -4858,3 +4858,8 @@ * arch/arm/src/sam3u: Renamed files to sam_* vs. sam3u_*. Eliminated sam3u_internal.h; instead uses individual header files for each SAM interface block (2013-6-2). + * arch/arm/src/stm32/stm32f20xxx_rcc.c and stm32f40xxx_rcc.c, and + configs/mikroe-stm32f4/src/up_clockconfig.c. Correct some bad + conditional compilation (CONFIG_ missing from setting name). This + affects some STM32 FLASH pre-fetch settings. From Lorenz Meier + (2013-6-2). diff --git a/arch/arm/src/stm32/stm32f20xxx_rcc.c b/arch/arm/src/stm32/stm32f20xxx_rcc.c index ac72fb60bcb..dd796f86c25 100644 --- a/arch/arm/src/stm32/stm32f20xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f20xxx_rcc.c @@ -631,7 +631,7 @@ static void stm32_stdclockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); diff --git a/arch/arm/src/stm32/stm32f40xxx_rcc.c b/arch/arm/src/stm32/stm32f40xxx_rcc.c index fc7fe1697d7..82757c43f61 100644 --- a/arch/arm/src/stm32/stm32f40xxx_rcc.c +++ b/arch/arm/src/stm32/stm32f40xxx_rcc.c @@ -669,7 +669,7 @@ static void stm32_stdclockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN); diff --git a/configs/mikroe-stm32f4/src/up_clockconfig.c b/configs/mikroe-stm32f4/src/up_clockconfig.c index 9618cf8dd54..3c55bd9501a 100644 --- a/configs/mikroe-stm32f4/src/up_clockconfig.c +++ b/configs/mikroe-stm32f4/src/up_clockconfig.c @@ -128,7 +128,7 @@ void stm32_board_clockconfig(void) /* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */ -#ifdef STM32_FLASH_PREFETCH +#ifdef CONFIG_STM32_FLASH_PREFETCH regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN); #else regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);