arch/xtesna/esp32: Merge the contents of esp32_cpuint and esp32_irq.

They do the same thing (manipulate interrupts) keeping them separated
was making things harder.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>

arch/xtensa/src/esp32/Make.defs

@@ -69,8 +69,8 @@ endif
 
 # Required ESP32 files (arch/xtensa/src/lx6)
 
-CHIP_CSRCS  = esp32_allocateheap.c esp32_clockconfig.c esp32_cpuint.c
+CHIP_CSRCS  = esp32_allocateheap.c esp32_clockconfig.c esp32_gpio.c
-CHIP_CSRCS += esp32_gpio.c esp32_intdecode.c esp32_irq.c esp32_region.c
+CHIP_CSRCS += esp32_intdecode.c esp32_irq.c esp32_region.c
 CHIP_CSRCS += esp32_user.c
 CHIP_CSRCS += esp32_dma.c
 

arch/xtensa/src/esp32/esp32_cpuint.h

@@ -1,131 +0,0 @@
-/****************************************************************************
- * arch/xtensa/src/esp32/esp32_cpuint.h
- *
- * Licensed to the Apache Software Foundation (ASF) under one or more
- * contributor license agreements.  See the NOTICE file distributed with
- * this work for additional information regarding copyright ownership.  The
- * ASF licenses this file to you under the Apache License, Version 2.0 (the
- * "License"); you may not use this file except in compliance with the
- * License.  You may obtain a copy of the License at
- *
- *   http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
- * License for the specific language governing permissions and limitations
- * under the License.
- *
- ****************************************************************************/
-
-#ifndef __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H
-#define __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H
-
-/****************************************************************************
- * Included Files
- ****************************************************************************/
-
-#include <nuttx/config.h>
-
-#include <arch/irq.h>
-
-/****************************************************************************
- * Pre-processor Definitions
- ****************************************************************************/
-
-/* No peripheral assigned to this CPU interrupt */
-
-#define CPUINT_UNASSIGNED    0xff
-
-/* CPU interrupt types. */
-
-#define ESP32_CPUINT_LEVEL   0
-#define ESP32_CPUINT_EDGE    1
-
-/****************************************************************************
- * Public Data
- ****************************************************************************/
-
-/* Maps a CPU interrupt to the IRQ of the attached peripheral interrupt */
-
-extern uint8_t g_cpu0_intmap[ESP32_NCPUINTS];
-#ifdef CONFIG_SMP
-extern uint8_t g_cpu1_intmap[ESP32_NCPUINTS];
-#endif
-
-/* g_intenable[] is a shadow copy of the per-CPU INTENABLE register
- * content.
- */
-
-#ifdef CONFIG_SMP
-extern uint32_t g_intenable[CONFIG_SMP_NCPUS];
-#else
-extern uint32_t g_intenable[1];
-#endif
-
-/****************************************************************************
- * Public Function Prototypes
- ****************************************************************************/
-
-/****************************************************************************
- * Name:  esp32_cpuint_initialize
- *
- * Description:
- *   Initialize CPU interrupts
- *
- * Input Parameters:
- *   None
- *
- * Returned Value:
- *   Zero (OK) is returned on success; A negated errno value is returned on
- *   any failure.
- *
- ****************************************************************************/
-
-int esp32_cpuint_initialize(void);
-
-/****************************************************************************
- * Name:  esp32_setup_irq
- *
- * Description:
- *   This function sets up the IRQ. It allocates a CPU interrupt of the given
- *   priority and type and attaches it to the given peripheral.
- *
- * Input Parameters:
- *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
- *   periphid - The peripheral number from irq.h to be assigned to
- *              a CPU interrupt.
- *   priority - Interrupt's priority (1 - 5).
- *   type     - Interrupt's type (level or edge).
- *
- * Returned Value:
- *   The allocated CPU interrupt on success, a negated errno value on
- *   failure.
- *
- ****************************************************************************/
-
-int esp32_setup_irq(int cpu, int periphid, int priority, int type);
-
-/****************************************************************************
- * Name:  esp32_teardown_irq
- *
- * Description:
- *   This function undoes the operations done by esp32_setup_irq.
- *   It detaches a peripheral interrupt from a CPU interrupt and frees the
- *   CPU interrupt.
- *
- * Input Parameters:
- *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
- *   periphid - The peripheral number from irq.h to be detached from the
- *              CPU interrupt.
- *   cpuint   - The CPU interrupt from which the peripheral interrupt will
- *              be detached.
- *
- * Returned Value:
- *   None
- *
- ****************************************************************************/
-
-void esp32_teardown_irq(int cpu, int periphid, int cpuint);
-
-#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_CPUINT_H */

arch/xtensa/src/esp32/esp32_cpustart.c

@@ -37,10 +37,12 @@
 
 #include "sched/sched.h"
 #include "xtensa.h"
+
 #include "hardware/esp32_dport.h"
 #include "hardware/esp32_rtccntl.h"
+
 #include "esp32_region.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 #include "esp32_smp.h"
 
 #ifdef CONFIG_SMP

arch/xtensa/src/esp32/esp32_emac.c

@@ -61,7 +61,7 @@
 #include "hardware/esp32_dport.h"
 #include "hardware/esp32_emac.h"
 #include "esp32_gpio.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 
 #include <arch/board/board.h>
 

arch/xtensa/src/esp32/esp32_gpio.c

@@ -34,10 +34,13 @@
 #include <arch/irq.h>
 
 #include "xtensa.h"
+
 #include "hardware/esp32_iomux.h"
 #include "hardware/esp32_gpio.h"
-#include "esp32_cpuint.h"
+
+#include "esp32_irq.h"
 #include "esp32_rtc_gpio.h"
+
 #include "esp32_gpio.h"
 
 /****************************************************************************

arch/xtensa/src/esp32/esp32_i2c.c

@@ -47,7 +47,7 @@
 
 #include "esp32_i2c.h"
 #include "esp32_gpio.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 
 #include "xtensa.h"
 #include "hardware/esp32_gpio_sigmap.h"

arch/xtensa/src/esp32/esp32_intdecode.c

@@ -31,7 +31,7 @@
 #include <arch/irq.h>
 
 #include "xtensa.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 
 /****************************************************************************
  * Private Functions

arch/xtensa/src/esp32/esp32_irq.h

@@ -27,6 +27,8 @@
 
 #include <nuttx/config.h>
 
+#include <arch/irq.h>
+
 #ifndef __ASSEMBLY__
 
 #undef EXTERN
@@ -38,6 +40,40 @@ extern "C"
 #define EXTERN extern
 #endif
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* No peripheral assigned to this CPU interrupt */
+
+#define CPUINT_UNASSIGNED    0xff
+
+/* CPU interrupt types. */
+
+#define ESP32_CPUINT_LEVEL   0
+#define ESP32_CPUINT_EDGE    1
+
+/****************************************************************************
+ * Public Data
+ ****************************************************************************/
+
+/* Maps a CPU interrupt to the IRQ of the attached peripheral interrupt */
+
+extern uint8_t g_cpu0_intmap[ESP32_NCPUINTS];
+#ifdef CONFIG_SMP
+extern uint8_t g_cpu1_intmap[ESP32_NCPUINTS];
+#endif
+
+/* g_intenable[] is a shadow copy of the per-CPU INTENABLE register
+ * content.
+ */
+
+#ifdef CONFIG_SMP
+extern uint32_t g_intenable[CONFIG_SMP_NCPUS];
+#else
+extern uint32_t g_intenable[1];
+#endif
+
 /****************************************************************************
  * Public Functions Prototypes
  ****************************************************************************/
@@ -76,6 +112,67 @@ void esp32_mapirq(int irq, int cpu, int cpuint);
 
 void esp32_unmapirq(int irq);
 
+/****************************************************************************
+ * Name:  esp32_cpuint_initialize
+ *
+ * Description:
+ *   Initialize CPU interrupts
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; A negated errno value is returned on
+ *   any failure.
+ *
+ ****************************************************************************/
+
+int esp32_cpuint_initialize(void);
+
+/****************************************************************************
+ * Name:  esp32_setup_irq
+ *
+ * Description:
+ *   This function sets up the IRQ. It allocates a CPU interrupt of the given
+ *   priority and type and attaches it to the given peripheral.
+ *
+ * Input Parameters:
+ *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
+ *   periphid - The peripheral number from irq.h to be assigned to
+ *              a CPU interrupt.
+ *   priority - Interrupt's priority (1 - 5).
+ *   type     - Interrupt's type (level or edge).
+ *
+ * Returned Value:
+ *   The allocated CPU interrupt on success, a negated errno value on
+ *   failure.
+ *
+ ****************************************************************************/
+
+int esp32_setup_irq(int cpu, int periphid, int priority, int type);
+
+/****************************************************************************
+ * Name:  esp32_teardown_irq
+ *
+ * Description:
+ *   This function undoes the operations done by esp32_setup_irq.
+ *   It detaches a peripheral interrupt from a CPU interrupt and frees the
+ *   CPU interrupt.
+ *
+ * Input Parameters:
+ *   cpu      - The CPU to receive the interrupt 0=PRO CPU 1=APP CPU
+ *   periphid - The peripheral number from irq.h to be detached from the
+ *              CPU interrupt.
+ *   cpuint   - The CPU interrupt from which the peripheral interrupt will
+ *              be detached.
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void esp32_teardown_irq(int cpu, int periphid, int cpuint);
+
 #undef EXTERN
 #if defined(__cplusplus)
 }

arch/xtensa/src/esp32/esp32_serial.c

@@ -53,7 +53,7 @@
 #include "hardware/esp32_dma.h"
 #include "esp32_config.h"
 #include "esp32_gpio.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 #include "esp32_dma.h"
 #include "hardware/esp32_dport.h"
 

arch/xtensa/src/esp32/esp32_spi.c

@@ -45,7 +45,7 @@
 
 #include "esp32_spi.h"
 #include "esp32_gpio.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 #include "esp32_dma.h"
 
 #include "xtensa.h"

arch/xtensa/src/esp32/esp32_spi_slave.c

@@ -48,7 +48,7 @@
 
 #include "esp32_spi.h"
 #include "esp32_gpio.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 #include "esp32_dma.h"
 
 #include "xtensa.h"

arch/xtensa/src/esp32/esp32_tim.c

@@ -33,8 +33,9 @@
 
 #include "hardware/esp32_tim.h"
 
+#include "esp32_irq.h"
+
 #include "esp32_tim.h"
-#include "esp32_cpuint.h"
 
 /****************************************************************************
  * Private Types

arch/xtensa/src/esp32/esp32_wdt.c

@@ -31,7 +31,7 @@
 #include "hardware/esp32_tim.h"
 #include "hardware/esp32_rtccntl.h"
 #include "esp32_wdt.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 #include "esp32_rtc.h"
 
 /****************************************************************************

arch/xtensa/src/esp32/esp32_wifi_adapter.c

@@ -56,7 +56,7 @@
 #include "hardware/esp32_dport.h"
 #include "hardware/esp32_emac.h"
 #include "hardware/esp32_soc.h"
-#include "esp32_cpuint.h"
+#include "esp32_irq.h"
 #include "esp32_wifi_adapter.h"
 #include "esp32_rt_timer.h"
 #include "esp32_wifi_utils.h"