mirror of
https://github.com/apache/nuttx.git
synced 2026-06-06 08:36:24 +08:00
kinetis:Replace DMA
Kinetis:DMAMUX use hex in mask
This commit is contained in:
David Sidrane
committed by
Xiang Xiao
Xiang Xiao
parent
3439c40044
commit
78bf264af0
@@ -751,7 +751,7 @@ config KINETIS_FTFL
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---help---
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Support FLASH
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config KINETIS_DMA
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config KINETIS_EDMA
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bool "DMA"
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default n
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depends on KINETIS_HAVE_DMA
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@@ -1114,6 +1114,96 @@ config KINETIS_SD4BIT_FREQ
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endif
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endmenu # Kinetis SDHC Configuration
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menu "eDMA Configuration"
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depends on KINETIS_EDMA
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config KINETIS_EDMA_NTCD
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int "Number of transfer descriptors"
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default 0
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---help---
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Number of pre-allocated transfer descriptors. Needed for scatter-
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gather DMA. Make to be set to zero to disable in-memory TCDs in
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which case only the TCD channel registers will be used and scatter-
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will not be supported.
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config KINETIS_EDMA_ELINK
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bool "Channeling Linking"
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default n
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---help---
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This option enables optional minor or major loop channel linking:
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Minor loop channel linking: As the channel completes the minor
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loop, this flag enables linking to another channel. The link target
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channel initiates a channel service request via an internal
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mechanism that sets the TCDn_CSR[START] bit of the specified
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channel.
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If minor loop channel linking is disabled, this link mechanism is
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suppressed in favor of the major loop channel linking.
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Major loop channel linking: As the channel completes the minor
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loop, this option enables the linking to another channel. The link
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target channel initiates a channel service request via an internal
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mechanism that sets the TCDn_CSR[START] bit of the linked channel.
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config KINETIS_EDMA_ERCA
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bool "Round Robin Channel Arbitration"
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default n
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---help---
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Normally, a fixed priority arbitration is used for channel
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selection. If this option is selected, round robin arbitration is
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used for channel selection.
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config KINETIS_EDMA_ERGA
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bool "Round Robin Group Arbitration"
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default n
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---help---
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Normally, a fixed priority arbitration is used for channel
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selection among the groups. If this option is selected,
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round Round robin arbitration is used for selection among
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the groups.
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config KINETIS_EDMA_HOE
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bool "Halt On Error"
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default y
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---help---
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Any error causes the HALT bit to set. Subsequently, all service
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requests are ignored until the HALT bit is cleared.
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config KINETIS_EDMA_CLM
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bool "Continuous Link Mode"
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default n
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---help---
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By default, A minor loop channel link made to itself goes through
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channel arbitration before being activated again. If this option is
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selected, a minor loop channel link made to itself does not go
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through channel arbitration before being activated again. Upon minor
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loop completion, the channel activates again if that channel has a
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minor loop channel link enabled and the link channel is itself. This
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effectively applies the minor loop offsets and restarts the next
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minor loop.
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config KINETIS_EDMA_EMLIM
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bool "Minor Loop Mapping"
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default n
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---help---
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Normally TCD word 2 is a 32-bit NBYTES field. When this option is
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enabled, TCD word 2 is redefined to include individual enable fields,
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an offset field, and the NBYTES field. The individual enable fields
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allow the minor loop offset to be applied to the source address, the
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destination address, or both. The NBYTES field is reduced when either
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offset is enabled.
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config KINETIS_EDMA_EDBG
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bool "Enable Debug"
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default n
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---help---
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When in debug mode, the DMA stalls the start of a new channel. Executing
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channels are allowed to complete. Channel execution resumes when the
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system exits debug mode or the EDBG bit is cleared
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endmenu # eDMA Global Configuration
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if KINETIS_USBHS && USBHOST
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menu "USB host controller driver (HCD) options"
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@@ -1208,42 +1298,42 @@ config KINETIS_UARTFIFOS
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config KINETIS_UART0_RXDMA
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bool "UART0 Rx DMA"
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default n
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depends on KINETIS_UART0 && KINETIS_DMA
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depends on KINETIS_UART0 && KINETIS_EDMA
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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config KINETIS_UART1_RXDMA
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bool "UART1 Rx DMA"
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default n
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depends on KINETIS_UART1 && KINETIS_DMA
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depends on KINETIS_UART1 && KINETIS_EDMA
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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config KINETIS_UART2_RXDMA
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bool "UART2 Rx DMA"
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default n
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depends on KINETIS_UART2 && KINETIS_DMA
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depends on KINETIS_UART2 && KINETIS_EDMA
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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config KINETIS_UART3_RXDMA
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bool "UART3 Rx DMA"
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default n
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depends on KINETIS_UART3 && KINETIS_DMA
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depends on KINETIS_UART3 && KINETIS_EDMA
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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config KINETIS_UART4_RXDMA
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bool "UART4 Rx DMA"
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default n
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depends on KINETIS_UART4 && KINETIS_DMA
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depends on KINETIS_UART4 && KINETIS_EDMA
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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config KINETIS_UART5_RXDMA
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bool "UART5 Rx DMA"
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default n
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depends on KINETIS_UART5 && KINETIS_DMA
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depends on KINETIS_UART5 && KINETIS_EDMA
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---help---
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In high data rate usage, Rx DMA may eliminate Rx overrun errors
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@@ -140,8 +140,8 @@ CHIP_CSRCS += kinetis_usbhshost.c
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endif
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endif
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ifeq ($(CONFIG_KINETIS_DMA),y)
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CHIP_CSRCS += kinetis_dma.c kinetis_pindma.c
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ifeq ($(CONFIG_KINETIS_EDMA),y)
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CHIP_CSRCS += kinetis_edma.c kinetis_pindma.c
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endif
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ifeq ($(CONFIG_PWM),y)
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File diff suppressed because it is too large
Load Diff
@@ -56,7 +56,7 @@
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/* Channel n Configuration Register */
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#define DMAMUX_CHCFG_SOURCE_SHIFT (0) /* Bits 0-5: DMA Channel Source (slot) */
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#define DMAMUX_CHCFG_SOURCE_MASK (63 << DMAMUX_CHCFG_SOURCE_SHIFT)
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#define DMAMUX_CHCFG_SOURCE_MASK (0x3f << DMAMUX_CHCFG_SOURCE_SHIFT)
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#define DMAMUX_CHCFG_TRIG (1 << 6) /* Bit 6: DMA Channel Trigger Enable */
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#define DMAMUX_CHCFG_ENBL (1 << 7) /* Bit 7: DMA Channel Enable */
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File diff suppressed because it is too large
Load Diff
@@ -1,455 +0,0 @@
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/****************************************************************************
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* arch/arm/src/kinetis/kinetis_dma.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <sys/types.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include "arm_arch.h"
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#include "arm_internal.h"
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#include "kinetis_config.h"
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#include "chip.h"
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#include "kinetis_dma.h"
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#include "hardware/kinetis_dmamux.h"
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#include "hardware/kinetis_sim.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef DMA_CHN_PER_GROUP
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# define DMA_CHN_PER_GROUP KINETIS_NDMACH /* Number of channels per group */
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct kinetis_dma_ch
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{
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bool used;
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uint8_t ind;
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uint8_t irq;
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enum kinetis_dma_direction_e dir;
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enum kinetis_dma_data_sz_e data_sz;
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dma_callback_t callback;
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void *arg;
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static struct kinetis_dma_ch g_channels[KINETIS_NDMACH];
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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static int kinetis_dmainterrupt_int(int irq, void *context,
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struct kinetis_dma_ch *ch)
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{
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/* Clear bit in the interrupt */
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putreg8(ch->ind, KINETIS_DMA_CINT);
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/* Invoke the callback */
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if (ch->callback)
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{
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ch->callback((DMA_HANDLE)&ch, ch->arg, 0);
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}
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return OK;
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}
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static int kinetis_dmainterrupt(int irq, void *context, void *arg)
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{
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uint8_t irq_int = *(uint8_t *)arg;
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uint32_t regval;
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regval = getreg32(KINETIS_DMA_INT);
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/* Channel irq_int and irq_int + DMA_CHN_PER_GROUP use the same arg. Check
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* which one requested an interrupt
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*/
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if ((regval & (1 << irq_int)) != 0)
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{
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kinetis_dmainterrupt_int(irq, context, &g_channels[irq_int]);
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}
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if ((regval & (1 << (irq_int + DMA_CHN_PER_GROUP))) != 0)
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{
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kinetis_dmainterrupt_int(irq, context,
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&g_channels[irq_int + DMA_CHN_PER_GROUP]);
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}
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return OK;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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size_t kinetis_dmaresidual(DMA_HANDLE handle)
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{
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struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
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/* Channel Linking Disabled */
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return ((getreg16(KINETIS_DMA_TCD_CITER(ch->ind)) >>
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DMA_TCD_CITER2_SHIFT) & DMA_TCD_CITER2_MASK);
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}
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/****************************************************************************
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* Name: kinetis_dmainitialize
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*
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* Description:
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* Initialize the DMA subsystem.
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void weak_function arm_dma_initialize(void)
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{
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int i;
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uint32_t regval;
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int ret;
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for (i = KINETIS_NDMACH - 1; i >= 0; i--)
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{
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g_channels[i].ind = i;
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g_channels[i].used = false;
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g_channels[i].irq = KINETIS_IRQ_FIRST + (i % DMA_CHN_PER_GROUP);
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if (i < DMA_CHN_PER_GROUP)
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{
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/* Attach DMA interrupt */
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ret = irq_attach(g_channels[i].irq, kinetis_dmainterrupt,
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(void *)&g_channels[i].ind);
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if (ret == OK)
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{
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/* Enable the IRQ at the NVIC (still disabled at the DMA
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* controller)
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*/
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up_enable_irq(g_channels[i].irq);
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}
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else
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{
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g_channels[i].used = true;
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g_channels[i + DMA_CHN_PER_GROUP].used = true;
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}
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}
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}
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/* Enable clocking for DMA */
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regval = getreg32(KINETIS_SIM_SCGC7);
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regval |= SIM_SCGC7_DMA;
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putreg32(regval, KINETIS_SIM_SCGC7);
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/* Configure DMA for round robin arbitration */
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regval = 0;
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regval |= DMA_CR_ERCA | DMA_CR_ERGA;
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putreg32(regval, KINETIS_DMA_CR);
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/* Enable clocking for the DMA mux */
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regval = getreg32(KINETIS_SIM_SCGC6);
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regval |= SIM_SCGC6_DMAMUX0;
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putreg32(regval, KINETIS_SIM_SCGC6);
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}
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/****************************************************************************
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* Name: kinetis_dmachannel
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*
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* Description:
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* Allocate a DMA channel. This function sets aside a DMA channel and
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* gives the caller exclusive access to the DMA channel.
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*
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* Returned Value:
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* On success, this function returns a non-NULL, void* DMA channel handle.
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* NULL is returned on any failure. This function can fail only if no DMA
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* channel is available.
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*
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****************************************************************************/
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DMA_HANDLE kinetis_dmachannel(uint8_t src, uint32_t per_addr,
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enum kinetis_dma_data_sz_e per_data_sz,
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enum kinetis_dma_direction_e dir)
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{
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int i;
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int ch_ind;
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uint8_t regval8;
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uint16_t regval16;
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irqstate_t flags;
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struct kinetis_dma_ch *ch;
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/* Find available channel */
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ch_ind = -1;
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flags = enter_critical_section();
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for (i = 0; i < KINETIS_NDMACH; i++)
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{
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if (!g_channels[i].used)
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{
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ch_ind = i;
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g_channels[ch_ind].used = true;
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break;
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}
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}
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leave_critical_section(flags);
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if (ch_ind == -1)
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{
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/* No available channel */
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return NULL;
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}
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ch = &g_channels[ch_ind];
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/* Copy arguments */
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ch->dir = dir;
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ch->data_sz = per_data_sz;
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/* DMAMUX Set DMA channel source and enable it */
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regval8 = ((((uint8_t)src) << DMAMUX_CHCFG_SOURCE_SHIFT) &
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DMAMUX_CHCFG_SOURCE_MASK) | DMAMUX_CHCFG_ENBL;
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putreg8(regval8, KINETIS_DMAMUX_CHCFG(ch_ind));
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/* DMA Set peripheral address in TCD */
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if (ch->dir == KINETIS_DMA_DIRECTION_PERIPHERAL_TO_MEMORY)
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{
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putreg32(per_addr, KINETIS_DMA_TCD_SADDR(ch->ind));
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putreg16(0, KINETIS_DMA_TCD_SOFF(ch->ind));
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putreg32(0, KINETIS_DMA_TCD_SLAST(ch->ind));
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}
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else if (ch->dir == KINETIS_DMA_DIRECTION_MEMORY_TO_PERIPHERAL)
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{
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putreg32(per_addr, KINETIS_DMA_TCD_DADDR(ch->ind));
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putreg16(0, KINETIS_DMA_TCD_DOFF(ch->ind));
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putreg32(0, KINETIS_DMA_TCD_DLASTSGA(ch->ind));
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}
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else
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{
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ch->used = false;
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return NULL;
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}
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/* Set data sizes */
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regval16 = (DMA_TCD_ATTR_SSIZE_MASK & ((uint16_t)per_data_sz) <<
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DMA_TCD_ATTR_SSIZE_SHIFT);
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regval16 |= (DMA_TCD_ATTR_DSIZE_MASK & ((uint16_t)per_data_sz) <<
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DMA_TCD_ATTR_DSIZE_SHIFT);
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putreg16(regval16, KINETIS_DMA_TCD_ATTR(ch->ind));
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/* Set minor loop count */
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putreg32(1 << (uint8_t)per_data_sz, KINETIS_DMA_TCD_NBYTES(ch->ind));
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return (DMA_HANDLE)ch;
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}
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/****************************************************************************
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* Name: kinetis_dmafree
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*
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* Description:
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* Release a DMA channel. NOTE: The 'handle' used in this argument must
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* NEVER be used again until kinetis_dmachannel() is called again to
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* re-gain a valid handle.
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void kinetis_dmafree(DMA_HANDLE handle)
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{
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struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
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irqstate_t flags;
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DEBUGASSERT(handle != NULL);
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||||
|
||||
/* Disable DMA channel in the dmamux */
|
||||
|
||||
putreg8(0, KINETIS_DMAMUX_CHCFG(ch->ind));
|
||||
|
||||
flags = enter_critical_section();
|
||||
ch->used = false;
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmasetup
|
||||
*
|
||||
* Description:
|
||||
* Configure DMA for one transfer.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int kinetis_dmasetup(DMA_HANDLE handle, uint32_t mem_addr, size_t ntransfers,
|
||||
uint16_t control)
|
||||
{
|
||||
struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
|
||||
uint16_t regval = 0;
|
||||
uint32_t nbytes;
|
||||
|
||||
if (ntransfers > (DMA_TCD_CITER2_MASK >> DMA_TCD_CITER2_SHIFT))
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
|
||||
nbytes = (uint32_t)ntransfers * (uint32_t)(1 << (uint8_t)ch->data_sz);
|
||||
|
||||
if (ch->dir == KINETIS_DMA_DIRECTION_PERIPHERAL_TO_MEMORY)
|
||||
{
|
||||
putreg32(mem_addr, KINETIS_DMA_TCD_DADDR(ch->ind));
|
||||
putreg16(1 << (uint8_t)ch->data_sz, KINETIS_DMA_TCD_DOFF(ch->ind));
|
||||
putreg32(-nbytes, KINETIS_DMA_TCD_DLASTSGA(ch->ind));
|
||||
}
|
||||
else if (ch->dir == KINETIS_DMA_DIRECTION_MEMORY_TO_PERIPHERAL)
|
||||
{
|
||||
putreg32(mem_addr, KINETIS_DMA_TCD_SADDR(ch->ind));
|
||||
putreg16(1 << (uint8_t)ch->data_sz, KINETIS_DMA_TCD_SOFF(ch->ind));
|
||||
putreg32(-nbytes, KINETIS_DMA_TCD_SLAST(ch->ind));
|
||||
}
|
||||
else
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Set up channel with control word */
|
||||
|
||||
regval = (control & DMA_TCD_CSR_MAJORELINK) ? ch->ind : 0;
|
||||
regval <<= DMA_TCD_CSR_MAJORLINKCH_SHIFT;
|
||||
regval &= DMA_TCD_CSR_MAJORLINKCH_MASK;
|
||||
regval |= (DMA_TCD_CSR_INTMAJOR |
|
||||
(control & (DMA_TCD_CSR_INTHALF | DMA_TCD_CSR_MAJORELINK)));
|
||||
putreg16(regval, KINETIS_DMA_TCD_CSR(ch->ind));
|
||||
|
||||
/* Set major loop count */
|
||||
|
||||
putreg16(ntransfers, KINETIS_DMA_TCD_BITER(ch->ind));
|
||||
putreg16(ntransfers, KINETIS_DMA_TCD_CITER(ch->ind));
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmastart
|
||||
*
|
||||
* Description:
|
||||
* Start the DMA transfer
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
|
||||
{
|
||||
struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
|
||||
ch->callback = callback;
|
||||
ch->arg = arg;
|
||||
|
||||
/* Enable request register for this channel */
|
||||
|
||||
putreg8(ch->ind, KINETIS_DMA_SERQ);
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmastop
|
||||
*
|
||||
* Description:
|
||||
* Cancel the DMA. After kinetis_dmastop() is called, the DMA channel is
|
||||
* reset and kinetis_dmasetup() must be called before kinetis_dmastart()
|
||||
* can be called again
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmastop(DMA_HANDLE handle)
|
||||
{
|
||||
struct kinetis_dma_ch *ch = (struct kinetis_dma_ch *)handle;
|
||||
|
||||
DEBUGASSERT(handle != NULL);
|
||||
|
||||
putreg8(ch->ind, KINETIS_DMA_CERQ);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmasample
|
||||
*
|
||||
* Description:
|
||||
* Sample DMA register contents
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs)
|
||||
{
|
||||
DEBUGASSERT(handle != NULL);
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmadump
|
||||
*
|
||||
* Description:
|
||||
* Dump previously sampled DMA register contents
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *regs,
|
||||
const char *msg)
|
||||
{
|
||||
DEBUGASSERT(handle != NULL);
|
||||
}
|
||||
#endif
|
||||
@@ -1,250 +0,0 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_dma.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETEIS_KINETEIS_DMA_H
|
||||
#define __ARCH_ARM_SRC_KINETEIS_KINETEIS_DMA_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <sys/types.h>
|
||||
|
||||
#include "hardware/kinetis_dma.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Declarations
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
typedef FAR void *DMA_HANDLE;
|
||||
typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
|
||||
|
||||
/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is
|
||||
* selected.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
struct kinetis_dmaglobalregs_s
|
||||
{
|
||||
#warning "Missing logic"
|
||||
/* Global Registers */
|
||||
};
|
||||
|
||||
struct kinetis_dmachanregs_s
|
||||
{
|
||||
#warning "Missing logic"
|
||||
/* Channel Registers */
|
||||
};
|
||||
|
||||
struct kinetis_dmaregs_s
|
||||
{
|
||||
/* Global Registers */
|
||||
|
||||
struct kinetis_dmaglobalregs_s gbl;
|
||||
|
||||
/* Channel Registers */
|
||||
|
||||
struct kinetis_dmachanregs_s ch;
|
||||
};
|
||||
#endif
|
||||
|
||||
enum kinetis_dma_direction_e
|
||||
{
|
||||
KINETIS_DMA_DIRECTION_PERIPHERAL_TO_MEMORY,
|
||||
KINETIS_DMA_DIRECTION_MEMORY_TO_PERIPHERAL
|
||||
};
|
||||
|
||||
/* Kinetis data transfer size */
|
||||
|
||||
enum kinetis_dma_data_sz_e
|
||||
{
|
||||
KINETIS_DMA_DATA_SZ_8BIT = 0,
|
||||
KINETIS_DMA_DATA_SZ_16BIT = 1,
|
||||
KINETIS_DMA_DATA_SZ_32BIT = 2,
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmainitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the GPDMA subsystem.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmainitialize(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmachannel
|
||||
*
|
||||
* Description:
|
||||
* Allocate a DMA channel. This function sets aside a DMA channel and
|
||||
* gives the caller exclusive access to the DMA channel.
|
||||
*
|
||||
* Input Parameters:
|
||||
* src - DMA request source
|
||||
* per_addr - Address of the peripheral data
|
||||
* per_data_sz - Peripheral data size (register size). Note that if this
|
||||
* does not agree with the peripheral register size, DMA
|
||||
* transfers will silently fail during operation.
|
||||
* dir - transfer direction
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, this function returns a non-NULL, void* DMA channel handle.
|
||||
* NULL is returned on any failure. This function can fail only if no DMA
|
||||
* channel is available.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
DMA_HANDLE kinetis_dmachannel(uint8_t src,
|
||||
uint32_t per_addr,
|
||||
enum kinetis_dma_data_sz_e per_data_sz,
|
||||
enum kinetis_dma_direction_e dir);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmafree
|
||||
*
|
||||
* Description:
|
||||
* Release a DMA channel. NOTE: The 'handle' used in this argument must
|
||||
* NEVER be used again until kinetis_dmachannel() is called again to re-
|
||||
* gain a valid handle.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmafree(DMA_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmasetup
|
||||
*
|
||||
* Description:
|
||||
* Configure DMA for one transfer.
|
||||
*
|
||||
* Input Parameters:
|
||||
* mem_addr - Memory address
|
||||
* ntransfers - Number of transfers. Must be 0<= ntransfers <= 0x7FFF
|
||||
* control - Channel control configuration
|
||||
*
|
||||
* Returned Value:
|
||||
* result: 0 if ok, negative else
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int kinetis_dmasetup(DMA_HANDLE handle, uint32_t mem_addr,
|
||||
size_t ntransfers, uint16_t control);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmastart
|
||||
*
|
||||
* Description:
|
||||
* Start the DMA transfer
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int kinetis_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmastop
|
||||
*
|
||||
* Description:
|
||||
* Cancel the DMA. After kinetis_dmastop() is called, the DMA channel is
|
||||
* reset and kinetis_dmasetup() must be called before kinetis_dmastart()
|
||||
* can be called again
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmastop(DMA_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmaresidual
|
||||
*
|
||||
* Description:
|
||||
* Returns the number of transfers left
|
||||
*
|
||||
* Returned Value:
|
||||
* Residual transfers
|
||||
****************************************************************************/
|
||||
|
||||
size_t kinetis_dmaresidual(DMA_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmasample
|
||||
*
|
||||
* Description:
|
||||
* Sample DMA register contents
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
void kinetis_dmasample(DMA_HANDLE handle, struct kinetis_dmaregs_s *regs);
|
||||
#else
|
||||
# define kinetis_dmasample(handle,regs)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmadump
|
||||
*
|
||||
* Description:
|
||||
* Dump previously sampled DMA register contents
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
void kinetis_dmadump(DMA_HANDLE handle, const struct kinetis_dmaregs_s *regs,
|
||||
const char *msg);
|
||||
#else
|
||||
# define kinetis_dmadump(handle,regs,msg)
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_KINETEIS_KINETEIS_DMA_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,455 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_edma.h
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* This file was leveraged from the NuttX i.MXRT port.
|
||||
* Portions of that eDMA logic derived from NXP sample code which has
|
||||
* a compatible BSD 3-clause license:
|
||||
*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* Copyright 2016-2017 NXP
|
||||
* All rights reserved
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_KINETIS_KINETIS_EDMAC_H
|
||||
#define __ARCH_ARM_SRC_KINETIS_KINETIS_EDMAC_H
|
||||
|
||||
/* General Usage:
|
||||
*
|
||||
* 1. Allocate a DMA channel
|
||||
*
|
||||
* DMACH_HANDLE handle;
|
||||
* handle = edma_dmach_alloc(dmamux, dchpri);
|
||||
*
|
||||
* Where 'dmamux' is the channel DMAMUX configuration register setting and
|
||||
* 'dchpri' is the channel DCHPRIO priority register setting.
|
||||
*
|
||||
* 2. Create the transfer configuration:
|
||||
*
|
||||
* struct kinetis_edma_xfrconfig_s config;
|
||||
* config.saddr = ..;
|
||||
* config.daddr = ..;
|
||||
* etc.
|
||||
*
|
||||
* 3. Setup the transfer in hardware:
|
||||
*
|
||||
* int ret;
|
||||
* ret = kinetis_dmach_xfrsetup(handle, &config);
|
||||
*
|
||||
* 4. If you are setting up a scatter gather DMA
|
||||
* (with CONFIG_KINETIS_EDMA_NTCD > 0), then repeat steps 2 and 3 for
|
||||
* each segment of the transfer.
|
||||
*
|
||||
* 5. Start the DMA:
|
||||
*
|
||||
* ret = kinetis_dmach_start(handle, my_callback_func, priv);
|
||||
*
|
||||
* Where my_callback_func() is called when the DMA completes or an error
|
||||
* occurs. 'priv' represents some internal driver state that will be
|
||||
* provided with the callback.
|
||||
*
|
||||
* 6. If you need to stop the DMA and free resources (such as if a timeout
|
||||
* occurs), then:
|
||||
*
|
||||
* i mxrt_dmach_stop(handle);
|
||||
*
|
||||
* 7. The callback will be received when the DMA completes (or an error
|
||||
* occurs). After that, you may free the DMA channel, or re-use it on
|
||||
* subsequent DMAs.
|
||||
*
|
||||
* kinetis_dmach_free(handle);
|
||||
*
|
||||
* Almost non-invasive debug instrumentation is available. You may call
|
||||
* kinetis_dmasample() to save the current state of the eDMA registers at
|
||||
* any given point in time. At some later, postmortem analysis, you can
|
||||
* dump the content of the buffered registers with kinetis_dmadump().
|
||||
* kinetis_dmasample() is also available for monitoring DMA progress.
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include "hardware/kinetis_edma.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Configuration flags.
|
||||
*
|
||||
* REVISIT: Many missing options that should be represented as flags:
|
||||
* 1. Bandwidth
|
||||
* 2. Source/Destination modulo
|
||||
*/
|
||||
|
||||
#define EDMA_CONFIG_LINKTYPE_SHIFT (0) /* Bits 0-1: Link type */
|
||||
#define EDMA_CONFIG_LINKTYPE_MASK (3 << EDMA_CONFIG_LINKTYPE_SHIFT)
|
||||
# define EDMA_CONFIG_LINKTYPE_LINKNONE (0 << EDMA_CONFIG_LINKTYPE_SHIFT) /* No channel link */
|
||||
# define EDMA_CONFIG_LINKTYPE_MINORLINK (1 << EDMA_CONFIG_LINKTYPE_SHIFT) /* Channel link after each minor loop */
|
||||
# define EDMA_CONFIG_LINKTYPE_MAJORLINK (2 << EDMA_CONFIG_LINKTYPE_SHIFT) /* Channel link when major loop count exhausted */
|
||||
|
||||
#define EDMA_CONFIG_LOOP_SHIFT (2) /* Bits 2: Loop type */
|
||||
#define EDMA_CONFIG_LOOP_MASK (3 << EDMA_CONFIG_LOOP_SHIFT)
|
||||
# define EDMA_CONFIG_LOOPNONE (0 << EDMA_CONFIG_LOOP_SHIFT) /* No looping */
|
||||
# define EDMA_CONFIG_LOOPSRC (1 << EDMA_CONFIG_LOOP_SHIFT) /* Source looping */
|
||||
# define EDMA_CONFIG_LOOPDEST (2 << EDMA_CONFIG_LOOP_SHIFT) /* Dest looping */
|
||||
|
||||
#define EDMA_CONFIG_INTHALF (1 << 3) /* Bits 3: Int on HALF */
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
typedef FAR void *DMACH_HANDLE;
|
||||
typedef void (*edma_callback_t)(DMACH_HANDLE handle,
|
||||
void *arg, bool done, int result);
|
||||
|
||||
/* eDMA transfer type */
|
||||
|
||||
enum kinetis_edma_xfrtype_e
|
||||
{
|
||||
EDMA_MEM2MEM = 0, /* Transfer from memory to memory */
|
||||
EDMA_PERIPH2MEM, /* Transfer from peripheral to memory */
|
||||
EDMA_MEM2PERIPH, /* Transfer from memory to peripheral */
|
||||
};
|
||||
|
||||
/* eDMA transfer sises */
|
||||
|
||||
enum kinetis_edma_sizes_e
|
||||
{
|
||||
EDMA_8BIT = 0, /* Transfer data size 8 */
|
||||
EDMA_16BIT = 1, /* Transfer data size 16 */
|
||||
EDMA_32BIT = 2, /* Transfer data size 32 */
|
||||
};
|
||||
|
||||
/* This structure holds the source/destination transfer attribute
|
||||
* configuration.
|
||||
*/
|
||||
|
||||
struct kinetis_edma_xfrconfig_s
|
||||
{
|
||||
uint32_t saddr; /* Source data address. */
|
||||
uint32_t daddr; /* Destination data address. */
|
||||
int16_t soff; /* Sign-extended offset for current source address. */
|
||||
int16_t doff; /* Sign-extended offset for current destination address. */
|
||||
uint16_t iter; /* Major loop iteration count. */
|
||||
uint8_t flags; /* See EDMA_CONFIG_* definitions */
|
||||
uint8_t ssize; /* Source data transfer size (see TCD_ATTR_SIZE_* definitions in rdware/. */
|
||||
uint8_t dsize; /* Destination data transfer size. */
|
||||
uint8_t ttype; /* Transfer type (see enum kinetis_edma_xfrtype_e). */
|
||||
#ifdef CONFIG_KINETIS_EDMA_EMLIM
|
||||
uint16_t nbytes; /* Bytes to transfer in a minor loop */
|
||||
#else
|
||||
uint32_t nbytes; /* Bytes to transfer in a minor loop */
|
||||
#endif
|
||||
#ifdef CONFIG_KINETIS_EDMA_ELINK
|
||||
DMACH_HANDLE linkch; /* Link channel (With EDMA_CONFIG_LINKTYPE_* flags) */
|
||||
#endif
|
||||
};
|
||||
|
||||
/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA
|
||||
* is selected
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
struct kinetis_dmaregs_s
|
||||
{
|
||||
uint8_t chan; /* Sampled channel */
|
||||
|
||||
/* eDMA Global Registers */
|
||||
|
||||
uint32_t cr; /* Control */
|
||||
uint32_t es; /* Error Status */
|
||||
uint32_t erq; /* Enable Request */
|
||||
uint32_t req; /* Interrupt Request */
|
||||
uint32_t err; /* Error */
|
||||
uint32_t hrs; /* Hardware Request Status */
|
||||
uint32_t ears; /* Enable Asynchronous Request in Stop */
|
||||
|
||||
/* eDMA Channel registers */
|
||||
|
||||
uint8_t dchpri; /* Channel priority */
|
||||
|
||||
/* eDMA TCD */
|
||||
|
||||
uint32_t saddr; /* TCD Source Address */
|
||||
uint16_t soff; /* TCD Signed Source Address Offset */
|
||||
uint16_t attr; /* TCD Transfer Attributes */
|
||||
uint32_t nbml; /* TCD Signed Minor Loop Offset / Byte Count */
|
||||
uint32_t slast; /* TCD Last Source Address Adjustment */
|
||||
uint32_t daddr; /* TCD Destination Address */
|
||||
uint16_t doff; /* TCD Signed Destination Address Offset */
|
||||
uint16_t citer; /* TCD Current Minor Loop Link, Major Loop Count */
|
||||
uint32_t dlastsga; /* TCD Last Destination Address Adjustment/Scatter Gather Address */
|
||||
uint16_t csr; /* TCD Control and Status */
|
||||
uint16_t biter; /* TCD Beginning Minor Loop Link, Major Loop Count */
|
||||
|
||||
/* DMAMUX registers */
|
||||
|
||||
uint32_t dmamux; /* Channel configuration */
|
||||
};
|
||||
#endif /* CONFIG_DEBUG_DMA */
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmach_alloc
|
||||
*
|
||||
* Allocate a DMA channel. This function sets aside a DMA channel,
|
||||
* initializes the DMAMUX for the channel, then gives the caller exclusive
|
||||
* access to the DMA channel.
|
||||
*
|
||||
* Input Parameters:
|
||||
* dmamux - DMAMUX configuration see DMAMUX channel configuration register
|
||||
* bit-field definitions in hardware/kinetis_dmamux.h.
|
||||
* Settings include:
|
||||
*
|
||||
* DMAMUX_CHCFG_SOURCE Chip-specific DMA source (required)
|
||||
* DMAMUX_CHCFG_TRIG DMA Channel Trigger Enable (optional)
|
||||
* DMAMUX_CHCFG_ENBL DMA Mux Channel Enable (required)
|
||||
*
|
||||
* A value of zero will disable the DMAMUX channel.
|
||||
* dchpri - DCHPRI channel priority configuration. See DCHPRI channel
|
||||
* configuration register bit-field definitions in
|
||||
* hardware/kinetis_edma.h. Meaningful settings include:
|
||||
*
|
||||
* EDMA_DCHPRI_CHPRI Channel Arbitration Priority
|
||||
* DCHPRI_DPA Disable Preempt Ability
|
||||
* DCHPRI_ECP Enable Channel Preemption
|
||||
*
|
||||
* The power-on default, 0x05, is a reasonable choice.
|
||||
*
|
||||
* Returned Value:
|
||||
* If a DMA channel is available, this function returns a non-NULL, void*
|
||||
* DMA channel handle. NULL is returned on any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
DMACH_HANDLE kinetis_dmach_alloc(uint8_t dmamux, uint8_t dchpri);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmach_free
|
||||
*
|
||||
* Description:
|
||||
* Release a DMA channel.
|
||||
* NOTE: The 'handle' used in this argument must NEVER be used again
|
||||
* until kinetis_dmach_alloc() is called again to re-gain a valid handle.
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmach_free(DMACH_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmach_xfrsetup
|
||||
*
|
||||
* Description:
|
||||
* This function adds the eDMA transfer to the DMA sequence. The request
|
||||
* is setup according to the content of the transfer configuration
|
||||
* structure. For "normal" DMA, kinetis_dmach_xfrsetup is called only
|
||||
* once.
|
||||
* Scatter/gather DMA is accomplished by calling this function repeatedly,
|
||||
* once for each transfer in the sequence. Scatter/gather DMA processing
|
||||
* is enabled automatically when the second transfer configuration is
|
||||
* received.
|
||||
*
|
||||
* This function may be called multiple times to handle multiple,
|
||||
* discontinuous transfers (scatter-gather)
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DMA channel handle created by kinetis_dmach_alloc()
|
||||
* config - A DMA transfer configuration instance, populated by the
|
||||
* The content of 'config' describes the transfer
|
||||
*
|
||||
* Returned Value
|
||||
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||
* any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int kinetis_dmach_xfrsetup(DMACH_HANDLE *handle,
|
||||
const struct kinetis_edma_xfrconfig_s *config);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmach_start
|
||||
*
|
||||
* Description:
|
||||
* Start the DMA transfer by enabling the channel DMA request.
|
||||
* This function should be called after the final call to
|
||||
* kinetis_dmasetup() in order to avoid race conditions.
|
||||
*
|
||||
* At the conclusion of each major DMA loop, a callback to the
|
||||
* user-provided function is made: |For "normal" DMAs, this will
|
||||
* correspond to the DMA DONE interrupt; for scatter gather DMAs, multiple
|
||||
* interrupts will be generated with the final being the DONE interrupt.
|
||||
*
|
||||
* At the conclusion of the DMA, the DMA channel is reset, all TCDs are
|
||||
* freed, and the callback function is called with the the success/fail
|
||||
* result of the DMA.
|
||||
*
|
||||
* NOTE:
|
||||
* On Rx DMAs (peripheral-to-memory or memory-to-memory), it is necessary
|
||||
* to invalidate the destination memory. That is not done automatically
|
||||
* by the DMA module. Invalidation of the destination memory regions is
|
||||
* the responsibility of the caller.
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DMA channel handle created by kinetis_dmach_alloc()
|
||||
* callback - The callback to be invoked when the DMA is completes or is
|
||||
* aborted.
|
||||
* arg - An argument that accompanies the callback
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||
* any failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int kinetis_dmach_start(DMACH_HANDLE handle,
|
||||
edma_callback_t callback, void *arg);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmach_stop
|
||||
*
|
||||
* Description:
|
||||
* Cancel the DMA. After kinetis_dmach_stop() is called, the DMA channel
|
||||
* is reset, all TCDs are freed, and kinetis_dmarx/txsetup() must be called
|
||||
* before kinetis_dmach_start() can be called again
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DMA channel handle created by kinetis_dmach_alloc()
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void kinetis_dmach_stop(DMACH_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmach_getcount
|
||||
*
|
||||
* Description:
|
||||
* This function checks the TCD (Task Control Descriptor) status for a
|
||||
* specified eDMA channel and returns the the number of major loop counts
|
||||
* that have not finished.
|
||||
*
|
||||
* NOTES:
|
||||
* 1. This function can only be used to get unfinished major loop count of
|
||||
* transfer without the next TCD, or it might be inaccuracy.
|
||||
* 2. The unfinished/remaining transfer bytes cannot be obtained directly
|
||||
* from registers while the channel is running.
|
||||
*
|
||||
* Because to calculate the remaining bytes, the initial NBYTES configured
|
||||
* in DMA_TCDn_NBYTES_MLNO register is needed while the eDMA IP does not
|
||||
* support getting it while a channel is active. In another words, the
|
||||
* NBYTES value reading is always the actual (decrementing) NBYTES value
|
||||
* the dma_engine is working with while a channel is running.
|
||||
* Consequently, to get the remaining transfer bytes, a software-saved
|
||||
* initial value of NBYTES (for example copied before enabling the channel)
|
||||
* is needed. The formula to calculate it is shown below:
|
||||
*
|
||||
* RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)
|
||||
*
|
||||
* Input Parameters:
|
||||
* handle - DMA channel handle created by kinetis_dmach_alloc()
|
||||
*
|
||||
* Returned Value:
|
||||
* Major loop count which has not been transferred yet for the current TCD.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
unsigned int kinetis_dmach_getcount(DMACH_HANDLE *handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmasample
|
||||
*
|
||||
* Description:
|
||||
* Sample DMA register contents
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
void kinetis_dmasample(DMACH_HANDLE handle, struct kinetis_dmaregs_s *regs);
|
||||
#else
|
||||
# define kinetis_dmasample(handle,regs)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: kinetis_dmadump
|
||||
*
|
||||
* Description:
|
||||
* Dump previously sampled DMA register contents
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_DMA
|
||||
void kinetis_dmadump(const struct kinetis_dmaregs_s *regs, const char *msg);
|
||||
#else
|
||||
# define kinetis_dmadump(handle,regs,msg)
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_EDMAC_H */
|
||||
Reference in New Issue
Block a user