rpmsg/rpmsg_port_uart: add rpmsg uart port driver

Rpmsg Port Uart is a new rpmsg transport layer.
Just like the rpmsg port spi, the difference is that the physical
communication method changed from SPI to UART.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>

drivers/rpmsg/CMakeLists.txt

@@ -41,6 +41,10 @@ if(CONFIG_RPMSG)
     list(APPEND SRCS rpmsg_port_spi_slave.c)
   endif()
 
+  if(CONFIG_RPMSG_PORT_UART)
+    list(APPEND SRCS rpmsg_port_uart.c)
+  endif()
+
   if(CONFIG_RPMSG_VIRTIO)
     list(APPEND SRCS rpmsg_virtio.c)
   endif()

drivers/rpmsg/Kconfig

@@ -72,6 +72,41 @@ config RPMSG_PORT_SPI_RX_THRESHOLD
 
 endif # RPMSG_PORT_SPI
 
+config RPMSG_PORT_UART
+	bool "Rpmsg Uart Port Driver Support"
+	default n
+	select RPMSG_PORT
+	---help---
+		Rpmsg Uart Port driver used for cross chip communication.
+
+if RPMSG_PORT_UART
+
+config RPMSG_PORT_UART_RX_THREAD_PRIORITY
+	int "Rpmsg UART Port RX Thread Priority"
+	default 224
+
+config RPMSG_PORT_UART_RX_THREAD_STACKSIZE
+	int "Rpmsg UART Port RX Stack Size"
+	default DEFAULT_TASK_STACKSIZE
+
+config RPMSG_PORT_UART_TX_THREAD_PRIORITY
+	int "Rpmsg UART Port TX Thread Priority"
+	default 224
+
+config RPMSG_PORT_UART_TX_THREAD_STACKSIZE
+	int "Rpmsg UART Port TX Stack Size"
+	default DEFAULT_TASK_STACKSIZE
+
+config RPMSG_PORT_UART_CRC
+	bool "Rpmsg UART Port CRC Enable"
+	default n
+
+config RPMSG_PORT_UART_DEBUG
+	bool "Rpmsg UART DEBUG Enable"
+	default n
+
+endif # RPMSG_PORT_UART
+
 config RPMSG_VIRTIO
 	bool "rpmsg virtio transport support"
 	default n

drivers/rpmsg/Make.defs

@@ -45,6 +45,10 @@ ifeq ($(CONFIG_RPMSG_PORT_SPI_SLAVE),y)
 CSRCS += rpmsg_port_spi_slave.c
 endif
 
+ifeq ($(CONFIG_RPMSG_PORT_UART),y)
+CSRCS += rpmsg_port_uart.c
+endif
+
 ifeq ($(CONFIG_RPMSG_VIRTIO),y)
 CSRCS += rpmsg_virtio.c
 CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)openamp$(DELIM)open-amp$(DELIM)lib