Add QEMU interrupt handling (incomplete)

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3339 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2011-03-05 16:04:24 +00:00
parent 1135ccf5a0
commit 758b944c8a
8 changed files with 648 additions and 25 deletions
+36
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@@ -81,6 +81,42 @@
#define X86_EFLAGS_VIP (1 << 20) /* Bit 20: Virtual Interrupt Pending (Pentium+) */
#define X86_EFLAGS_ID (1 << 21) /* Bit 21: CPUID detection flag (Pentium+) */
/****************************************************************************
* Public Types
****************************************************************************/
/* GDT data structures
*
* The Global Descriptor Table or GDT is a data structure used by Intel x86-
* family processors starting with the 80286 in order to define the
* characteristics of the various memory areas used during program execution,
* for example the base address, the size and access privileges like
* executability and writability. These memory areas are called segments in
* Intel terminology.
*/
/* This structure defines one segment */
struct gdt_entry_s
{
uint16_t lowlimit; /* The lower 16 bits of the limit */
uint16_t lowbase; /* The lower 16 bits of the base */
uint8_t midbase; /* The next 8 bits of the base */
uint8_t access; /* Access flags, determine ring segment can be used in */
uint8_t granularity;
uint8_t hibase; /* The last 8 bits of the base */
} __attribute__((packed));
/* This structure refers to the array of GDT entries, and is in the format
* required by the lgdt instruction.
*/
struct gdt_ptr_s
{
uint16_t limit; /* The upper 16 bits of all selector limits */
uint32_t base; /* The address of the first gdt_entry_t struct */
} __attribute__((packed));
/****************************************************************************
* Inline functions
****************************************************************************/
+51 -1
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@@ -48,7 +48,57 @@
* Definitions
****************************************************************************/
#define NR_IRQS 0
#define ISR0 0
#define ISR1 1
#define ISR2 2
#define ISR3 3
#define ISR4 4
#define ISR5 5
#define ISR6 6
#define ISR7 7
#define ISR8 8
#define ISR9 9
#define ISR10 10
#define ISR11 11
#define ISR12 12
#define ISR13 13
#define ISR14 14
#define ISR15 15
#define ISR16 16
#define ISR17 17
#define ISR18 18
#define ISR19 19
#define ISR20 20
#define ISR21 21
#define ISR22 22
#define ISR23 23
#define ISR24 24
#define ISR25 25
#define ISR26 26
#define ISR27 27
#define ISR28 28
#define ISR29 29
#define ISR30 30
#define ISR31 31
#define IRQ0 32
#define IRQ1 33
#define IRQ2 34
#define IRQ3 35
#define IRQ4 36
#define IRQ5 37
#define IRQ6 38
#define IRQ7 39
#define IRQ8 40
#define IRQ9 41
#define IRQ10 42
#define IRQ11 43
#define IRQ12 44
#define IRQ13 45
#define IRQ14 46
#define IRQ15 47
#define NR_IRQS 48
/****************************************************************************
* Public Types