diff --git a/arch/risc-v/Kconfig b/arch/risc-v/Kconfig index c7dee7c9bb5..657db21a6ef 100644 --- a/arch/risc-v/Kconfig +++ b/arch/risc-v/Kconfig @@ -113,8 +113,6 @@ config ARCH_CHIP_RV32M1 config ARCH_CHIP_QEMU_RV32 bool "QEMU RV32" select ARCH_RV32 - select ARCH_RV_ISA_M - select ARCH_RV_ISA_A select ARCH_RV_ISA_F select ARCH_RV_ISA_D ---help--- diff --git a/arch/risc-v/src/qemu-rv32/Kconfig b/arch/risc-v/src/qemu-rv32/Kconfig index e69de29bb2d..f10a326bbf1 100644 --- a/arch/risc-v/src/qemu-rv32/Kconfig +++ b/arch/risc-v/src/qemu-rv32/Kconfig @@ -0,0 +1,24 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_CHIP_QEMU_RV32 +comment "QEMU RV32 Options" + +config ARCH_CHIP_QEMU_RV32_ISA_M + bool "Standard Extension for Integer Multiplication and Division" + default y + select ARCH_RV_ISA_M + +config ARCH_CHIP_QEMU_RV32_ISA_A + bool "Standard Extension for Atomic Instructions" + default y + select ARCH_RV_ISA_A + +config ARCH_CHIP_QEMU_RV32_ISA_C + bool "Standard Extension for Compressed Instructions" + default y + select ARCH_RV_ISA_C + +endif diff --git a/arch/risc-v/src/qemu-rv32/Make.defs b/arch/risc-v/src/qemu-rv32/Make.defs index b243b78361e..4934db56e57 100644 --- a/arch/risc-v/src/qemu-rv32/Make.defs +++ b/arch/risc-v/src/qemu-rv32/Make.defs @@ -23,7 +23,7 @@ HEAD_ASRC = qemu_rv32_head.S # Specify our general Assembly files -CMN_ASRCS += riscv_vectors.S riscv_testset.S riscv_exception_common.S +CMN_ASRCS += riscv_vectors.S riscv_exception_common.S # Specify C code within the common directory to be included CMN_CSRCS += riscv_initialize.c riscv_swint.c @@ -54,6 +54,10 @@ ifeq ($(CONFIG_ARCH_FPU),y) CMN_ASRCS += riscv_fpu.S endif +ifeq ($(CONFIG_ARCH_RV_ISA_A),y) +CMN_ASRCS += riscv_testset.S +endif + # Specify our C code within this directory to be included CHIP_CSRCS = qemu_rv32_start.c qemu_rv32_irq_dispatch.c qemu_rv32_irq.c CHIP_CSRCS += qemu_rv32_idle.c qemu_rv32_timerisr.c