diff --git a/boards/arm/stm32u5/b-u585i-iot02a/README.txt b/boards/arm/stm32u5/b-u585i-iot02a/README.txt
index 8a3765951f5..7b92118240d 100644
--- a/boards/arm/stm32u5/b-u585i-iot02a/README.txt
+++ b/boards/arm/stm32u5/b-u585i-iot02a/README.txt
@@ -5,10 +5,6 @@ B-U585I-IOT02A README
   B-U585I-IOT02A board.  That board features the STM32U585AII6QU MCU with 2MiB
   of Flash and 768KiB of SRAM.
 
-  This port is a proof-of-concept to demonstrate running NuttX in the Non-
-  Secure TrustZone domain as a companion to TrustedFirmware-M (TFM).  Running
-  NuttX on the B-U585I-IOT02A without TFM is currently not supported.
-
 Contents
 ========
 
@@ -23,6 +19,9 @@ Status
     basic NSH configuration works with Apache NuttX as the OS running in the
     non-secure world.
 
+  2022-04-03: The dependency on TrustedFirmware-M was dropped.  I.e. the
+    b-u585i-iot02a:nsh configuration now runs standalone.
+
 Clock Source
 ============
 
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig b/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig
index 7a6f93ff28b..33dffe75c89 100644
--- a/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig
+++ b/boards/arm/stm32u5/b-u585i-iot02a/configs/nsh/defconfig
@@ -5,13 +5,13 @@
 # You can then do "make savedefconfig" to generate a new defconfig file that includes your
 # modifications.
 #
+# CONFIG_ARCH_LEDS is not set
 # CONFIG_NSH_ARGCAT is not set
 # CONFIG_NSH_CMDPARMS is not set
 # CONFIG_STANDARD_SERIAL is not set
 CONFIG_ARCH="arm"
 CONFIG_ARCH_BOARD="b-u585i-iot02a"
 CONFIG_ARCH_BOARD_B_U585I_IOT02A=y
-CONFIG_ARCH_BOARD_STM32U5_CUSTOM_CLOCKCONFIG=y
 CONFIG_ARCH_CHIP="stm32u5"
 CONFIG_ARCH_CHIP_STM32U585AI=y
 CONFIG_ARCH_CHIP_STM32U5=y
@@ -19,7 +19,6 @@ CONFIG_ARCH_INTERRUPTSTACK=2048
 CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARCH_TRUSTZONE_NONSECURE=y
 CONFIG_ARMV8M_LAZYFPU=y
-CONFIG_ARMV8M_TOOLCHAIN_BUILDROOT=y
 CONFIG_ARMV8M_USEBASEPRI=y
 CONFIG_BOARD_LOOPSPERMSEC=4230
 CONFIG_BUILTIN=y
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/scripts/Make.defs b/boards/arm/stm32u5/b-u585i-iot02a/scripts/Make.defs
index db632f9d2af..39da14f7cac 100644
--- a/boards/arm/stm32u5/b-u585i-iot02a/scripts/Make.defs
+++ b/boards/arm/stm32u5/b-u585i-iot02a/scripts/Make.defs
@@ -22,7 +22,7 @@ include ${TOPDIR}/.config
 include ${TOPDIR}/tools/Config.mk
 include ${TOPDIR}/arch/arm/src/armv8-m/Toolchain.defs
 
-ARCHSCRIPT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)tfm-ns.ld
+ARCHSCRIPT = $(BOARD_DIR)$(DELIM)scripts$(DELIM)flash.ld
 
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
diff --git a/boards/arm/stm32u5/b-u585i-iot02a/scripts/flash.ld b/boards/arm/stm32u5/b-u585i-iot02a/scripts/flash.ld
new file mode 100644
index 00000000000..a211bc4f4b0
--- /dev/null
+++ b/boards/arm/stm32u5/b-u585i-iot02a/scripts/flash.ld
@@ -0,0 +1,103 @@
+/****************************************************************************
+ * boards/arm/stm32u5/b-u585i-iot02a/scripts/flash.ld
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/* The STM32Uxx has 2 MiB of FLASH beginning at address 0x0800:0000 and
+ * 192 KiB of SRAM beginning at address 0x2000:0000.  When booting from
+ * FLASH, FLASH memory is aliased to address 0x0000:0000 where the code
+ * expects to begin execution by jumping to the entry point in the
+ * 0x0800:0000 address range.
+ */
+
+MEMORY
+{
+  flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
+  sram (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
+}
+
+OUTPUT_ARCH(arm)
+ENTRY(_stext)
+SECTIONS
+{
+    .text : {
+        _stext = ABSOLUTE(.);
+        *(.vectors)
+        *(.text .text.*)
+        *(.fixup)
+        *(.gnu.warning)
+        *(.rodata .rodata.*)
+        *(.gnu.linkonce.t.*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.got)
+        *(.gcc_except_table)
+        *(.gnu.linkonce.r.*)
+        _etext = ABSOLUTE(.);
+    } > flash
+
+    .init_section : {
+        _sinit = ABSOLUTE(.);
+        *(.init_array .init_array.*)
+        _einit = ABSOLUTE(.);
+    } > flash
+
+    .ARM.extab : {
+        *(.ARM.extab*)
+    } > flash
+
+    __exidx_start = ABSOLUTE(.);
+    .ARM.exidx : {
+        *(.ARM.exidx*)
+    } > flash
+    __exidx_end = ABSOLUTE(.);
+
+    _eronly = ABSOLUTE(.);
+
+    .data : {
+        _sdata = ABSOLUTE(.);
+        *(.data .data.*)
+        *(.gnu.linkonce.d.*)
+        CONSTRUCTORS
+        . = ALIGN(4);
+        _edata = ABSOLUTE(.);
+    } > sram AT > flash
+
+    .bss : {
+        _sbss = ABSOLUTE(.);
+        *(.bss .bss.*)
+        *(.gnu.linkonce.b.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = ABSOLUTE(.);
+    } > sram
+
+    /* Stabs debugging sections. */
+    .stab 0 : { *(.stab) }
+    .stabstr 0 : { *(.stabstr) }
+    .stab.excl 0 : { *(.stab.excl) }
+    .stab.exclstr 0 : { *(.stab.exclstr) }
+    .stab.index 0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment 0 : { *(.comment) }
+    .debug_abbrev 0 : { *(.debug_abbrev) }
+    .debug_info 0 : { *(.debug_info) }
+    .debug_line 0 : { *(.debug_line) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    .debug_aranges 0 : { *(.debug_aranges) }
+}