diff --git a/configs/esp32-core/README.txt b/configs/esp32-core/README.txt
index eb970582750..081cfad7327 100644
--- a/configs/esp32-core/README.txt
+++ b/configs/esp32-core/README.txt
@@ -241,6 +241,10 @@ Debug Issues
       FreeRTOS, you will need to uncomment the "set ESP32_RTOS none"
       line in OpenOCD configuration file.
 
+      NOTE: A copy of this OpenOCD configuration file (with the referenced
+      line uncommented).  Is available in the NuttX source tree at
+      nuttx/config/esp32-core/scripts/esp32.cfg.
+
       The documentation indicates that you need to use an external JTAG
       like the TIAO USB Multi-protocol Adapter and the Flyswatter2.
       The instructions at http://www.esp32.com/viewtopic.php?t=381 show
diff --git a/configs/esp32-core/scripts/esp32.cfg b/configs/esp32-core/scripts/esp32.cfg
new file mode 100644
index 00000000000..68c594c101b
--- /dev/null
+++ b/configs/esp32-core/scripts/esp32.cfg
@@ -0,0 +1,51 @@
+#
+# Example configuration file to hook up an ESP32 module or board to a JTAG 
+# adapter. Please modify this file to your local setup.
+#
+#
+
+
+# Include the configuration for the JTAG adapter. We use the Tian TUMPA here.
+# If you have a different interface, please edit this to include the 
+# configuration file of yours.
+source [find interface/ftdi/tumpa.cfg]
+
+# The ESP32 only supports JTAG.
+transport select jtag
+
+# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
+# do not relate to OpenOCD trying to read from a memory range without physical
+# memory being present there), you can try lowering this.
+adapter_khz 200
+
+# With no variables set, openocd will configure JTAG for the two cores of the ESP32 and
+# will do automatic RTOS detection. This can be be adjusted by uncommenting any of the
+# following lines:
+
+# Only configure the PRO CPU
+#set ESP32_ONLYCPU 1
+# Only configure the APP CPU
+#set ESP32_ONLYCPU 2
+# Disable RTOS support
+set ESP32_RTOS none
+# Force RTOS to be FreeRTOS
+#set ESP32_RTOS FreeRTOS
+
+#Source the ESP32 configuration file
+source [find target/esp32.cfg]
+
+
+# The TDI pin of ESP32 is also a bootstrap pin that selects the voltage the SPI flash
+# chip runs at. When a hard reset happens (e.g. because someone switches the board off
+# and on) the ESP32 will use the current TDI value as the bootstrap value because the
+# JTAG adapter overrides the pull-up or pull-down resistor that is supposed to do the
+# bootstrapping. These lines basically set the idle value of the TDO line to a 
+# specified value, therefore reducing the chance of a bad bootup due to a bad flash
+# voltage greatly.
+
+# Enable this for 1.8V SPI flash
+esp108 flashbootstrap 1.8
+# Enable this for 3.3V SPI flash
+#esp108 flashbootstrap 3.3
+
+