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arch/arm/src/lpc43xx/Kconfig: Restored dependency on EXPERIMENTAL for LPC43_SDMMC.

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This commit is contained in:
Gregory Nutt
2018-10-23 06:22:40 -06:00
parent 41ebb6d672
commit 729b2e1907
3 changed files with 6 additions and 7 deletions
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arch/arm/src/lpc43xx/Kconfig
+1
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@@ -256,6 +256,7 @@ config LPC43_SDMMC
default n default n
select ARCH_HAVE_SDIO select ARCH_HAVE_SDIO
select SDIO_BLOCKSETUP select SDIO_BLOCKSETUP
depends on EXPERIMENTAL
config LPC43_SPI config LPC43_SPI
bool "SPI" bool "SPI"
arch/arm/src/lpc54xx/lpc54_sdmmc.c
+2 -4
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@@ -2768,7 +2768,6 @@ FAR struct sdio_dev_s *lpc54_sdmmc_initialize(int slotno)
lpc54_putreg(regval, LPC54_SYSCON_SDIOCLKDIV); lpc54_putreg(regval, LPC54_SYSCON_SDIOCLKDIV);
lpc54_putreg(regval | SYSCON_SDIOCLKDIV_REQFLAG, LPC54_SYSCON_SDIOCLKDIV); lpc54_putreg(regval | SYSCON_SDIOCLKDIV_REQFLAG, LPC54_SYSCON_SDIOCLKDIV);
#if 1 /* REVISIT */
/* Set delay values on the sample and drive inputs and outputs using the /* Set delay values on the sample and drive inputs and outputs using the
* SDIOCLKCTRL register in the SYSCON block. * SDIOCLKCTRL register in the SYSCON block.
*/ */
@@ -2778,7 +2777,6 @@ FAR struct sdio_dev_s *lpc54_sdmmc_initialize(int slotno)
SYSCON_SDIOCLKCTRL_DRVDLY_DEFAULT | SYSCON_SDIOCLKCTRL_DRVDLY_DEFAULT |
SYSCON_SDIOCLKCTRL_SMPDLY_DEFAULT; SYSCON_SDIOCLKCTRL_SMPDLY_DEFAULT;
lpc54_putreg(regval, LPC54_SYSCON_SDIOCLKCTRL); lpc54_putreg(regval, LPC54_SYSCON_SDIOCLKCTRL);
#endif
/* Enable clocking to the SD/MMC peripheral */ /* Enable clocking to the SD/MMC peripheral */
@@ -2820,8 +2818,8 @@ FAR struct sdio_dev_s *lpc54_sdmmc_initialize(int slotno)
#endif #endif
#ifndef CONFIG_SDIO_WIDTH_D1_ONLY #ifndef CONFIG_SDIO_WIDTH_D1_ONLY
/* REVISIT: Due to a chip errata, DAT4-7 must also be configured. /* REVISIT: Due to chip errata, Rev. 1.7, Issue 3.7, DAT4-7 must also be
* Otherwise the SD interface will not work. * configured. Otherwise the SD interface will not work.
*/ */
lpc54_gpio_config(GPIO_SD_D4); lpc54_gpio_config(GPIO_SD_D4);
configs/lpcxpresso-lpc54628/include/board.h
+3 -3
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@@ -203,7 +203,7 @@
* Fsdmmc = Fmck / SYSDIV * Fsdmmc = Fmck / SYSDIV
* Fsd = Fsdmmc / SDDIV * Fsd = Fsdmmc / SDDIV
* *
* The optimal SYSCON divisor (SYSDIV) is the smallest smallest that will * The optimal SYSCON divisor (SYSDIV) is the smallest divisor that will
* assure that the smallest usable SD frequency (Fmin = 400KHz) can be * assure that the smallest usable SD frequency (Fmin = 400KHz) can be
* attained without overflowing the final 8-bit divider (SDDIV). That is: * attained without overflowing the final 8-bit divider (SDDIV). That is:
* *
@@ -436,8 +436,8 @@
#define GPIO_SD_POW_EN GPIO_SD_POW_EN_2 /* P2.5 */ #define GPIO_SD_POW_EN GPIO_SD_POW_EN_2 /* P2.5 */
#define GPIO_SD_WR_PRT GPIO_SD_WR_PRT_2 /* P2.15 */ #define GPIO_SD_WR_PRT GPIO_SD_WR_PRT_2 /* P2.15 */
/* Due to a chip errata, DAT4-7 must also be configured. Otherwise the SD /* REVISIT: Due to chip errata, Rev. 1.7, Issue 3.7, DAT4-7 must also be
* interface will not work. * configured. Otherwise the SD interface will not work.
*/ */
#define GPIO_SD_D4 (GPIO_SD_D4_3 | GPIO_PULLUP) /* P4.29 */ #define GPIO_SD_D4 (GPIO_SD_D4_3 | GPIO_PULLUP) /* P4.29 */