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stm32f20xxx: add BOARD_DISABLE_USBOTG_HSULPI flag
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@@ -195,7 +195,13 @@ static inline void rcc_enableahb1(void)
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#ifdef CONFIG_STM32_OTGHS
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#ifdef CONFIG_STM32_OTGHS
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/* USB OTG HS */
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/* USB OTG HS */
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#ifndef BOARD_DISABLE_USBOTG_HSULPI
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/* Enable clocking for OTG and external PHY */
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regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN);
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regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN);
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#else
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regval |= (RCC_AHB1ENR_OTGHSEN);
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#endif
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#endif
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#endif
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putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */
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putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */
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@@ -146,6 +146,10 @@
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#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
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/* USB OTG HS definitions ***********************************************************/
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/* Do not enable external PHY clock or OTG_HS module will not work */
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#define BOARD_DISABLE_USBOTG_HSULPI 1
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/* Alternate function pin selections ************************************************/
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/* Alternate function pin selections ************************************************/
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/* UART1 */
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/* UART1 */
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