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stm32h7:ethernet add timeout on MAC reset

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This commit is contained in:
David Sidrane
2021-07-08 13:11:50 -07:00
committed by Xiang Xiao
parent bf4e97177a
commit 70c9cd1508
1 changed files with 10 additions and 1 deletions
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arch/arm/src/stm32h7/stm32_ethernet.c
+10 -1
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@@ -297,6 +297,10 @@
#define PHY_WRITE_TIMEOUT (0x0004ffff) #define PHY_WRITE_TIMEOUT (0x0004ffff)
#define PHY_RETRY_TIMEOUT (0x0004ffff) #define PHY_RETRY_TIMEOUT (0x0004ffff)
/* MAC reset ready delays in loop counts */
#define MAC_READY_USTIMEOUT (200)
/* Register values **********************************************************/ /* Register values **********************************************************/
/* Clear the MACCR bits that will be setup during MAC initialization (or that /* Clear the MACCR bits that will be setup during MAC initialization (or that
@@ -3913,6 +3917,7 @@ static inline void stm32_ethgpioconfig(struct stm32_ethmac_s *priv)
static void stm32_ethreset(struct stm32_ethmac_s *priv) static void stm32_ethreset(struct stm32_ethmac_s *priv)
{ {
uint32_t regval; uint32_t regval;
volatile uint32_t timeout;
/* Reset the Ethernet on the AHB1 bus */ /* Reset the Ethernet on the AHB1 bus */
@@ -3937,7 +3942,11 @@ static void stm32_ethreset(struct stm32_ethmac_s *priv)
* core clock domains. * core clock domains.
*/ */
while ((stm32_getreg(STM32_ETH_DMAMR) & ETH_DMAMR_SWR) != 0); timeout = MAC_READY_USTIMEOUT;
while (timeout-- && (stm32_getreg(STM32_ETH_DMAMR) & ETH_DMAMR_SWR) != 0)
{
up_udelay(1);
}
/* According to the spec, these need to be done before creating /* According to the spec, these need to be done before creating
* the descriptor lists, so initialize these already here * the descriptor lists, so initialize these already here