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arch/arm/rtl8721dx: add shared Ameba PWM driver
Add a shared NuttX PWM lower-half for the Realtek Ameba PWM timer in arch/arm/src/common/ameba, driven through the SDK fwlib. TIM8 provides a single time base feeding eight compare channels (CCR0..CCR7) that share one frequency while each carries its own duty, so a single /dev/pwm0 exposes the multichannel output via CONFIG_PWM_NCHANNELS. The fwlib PWM routines are split ROM/RAM: the time-base calls resolve from on-chip ROM, while the capture/compare calls live in fwlib ram_common/ameba_tim.c, which the build pulls into AMEBA_FWLIB_SRCS when CONFIG_AMEBA_PWM is set. Per-chip wiring (timer index, channel count, register base, input clock, IRQ, clock masks and the crossbar pad-mux code table) lives in arch/arm/src/rtl8721dx/ameba_pwm_chip.h so a port to another Ameba chip only supplies a same-named header; the pad-mux codes are a per-channel table (AMEBA_PWM_PINMUX_FIDS) rather than a computed base, so chips with a single shared code or codes grouped per timer are expressed by the header alone. The timer registers as /dev/pwm0 from pke8721daf bring-up through the stock PWM character driver; a dedicated `pwm` defconfig drives examples/pwm for validation. Signed-off-by: dechao_gong <dechao_gong@realsil.com.cn> Assisted-by: Claude <noreply@anthropic.com>
This commit is contained in:
committed by
Alan C. Assis
parent
0790b52e64
commit
6f2e17c113
@@ -41,6 +41,8 @@ Supported in this NuttX port:
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on the SDK fwlib register layer
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* SPI master buses exposed as ``/dev/spiN`` character devices, driven directly
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on the SDK fwlib register layer
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* PWM output exposed as a ``/dev/pwm0`` character device, driven directly on
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the SDK fwlib timer register layer
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Buttons and LEDs
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================
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@@ -134,6 +136,23 @@ tool::
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nsh> spi exch -b 1 -x 4 deadbeef # full-duplex transfer on /dev/spi1
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pwm
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---
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Minimal NSH with the PWM driver and the ``pwm`` example
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(``examples/pwm``) enabled (no Wi-Fi). The board registers one timer at
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``/dev/pwm0`` (see ``boards/arm/rtl8721dx/pke8721daf/src/rtl8721dx_pwm.c``):
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TIM8 drives up to eight compare channels off one shared time base, so every
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channel shares one frequency and each carries its own duty cycle. The example
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table routes channel 1 to PB18 and channel 2 to PB19; edit it -- one pad per
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channel, ``AMEBA_PWM_PIN_NC`` for the unused ones -- to match a board's
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wiring. The pads use the same ``AMEBA_PA()`` / ``AMEBA_PB()`` encoding as the
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GPIO table and are muxed to the PWM function through the crossbar. Set
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``CONFIG_PWM_NCHANNELS`` to the number of channels used. Exercise it with the
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example::
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nsh> pwm -d 25 -f 1000 # 1 kHz, 25% duty on /dev/pwm0
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Wi-Fi
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=====
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