diff --git a/COPYING b/COPYING index 1c82d0ca202..a8113ab027c 100644 --- a/COPYING +++ b/COPYING @@ -93,7 +93,7 @@ has a similar BSD style license: IGMP ^^^^ -IGMP support, if enabled in uIP, adds additional logic by Steve Reynolds: +IGMP support, if enabled, adds additional logic by Steve Reynolds: Copyright (c) 2002 CITEL Technologies Ltd. All rights reserved. diff --git a/ChangeLog b/ChangeLog index 91871e15aa7..7cfae89153f 100755 --- a/ChangeLog +++ b/ChangeLog @@ -11586,7 +11586,7 @@ * configs/stm32l476vg-disco: Add support for the STM32L476VG Discovery board. From Dave (2016-03-25). -7.16 2016-xx-xx Gregory Nutt +7.16 2016-06-01 Gregory Nutt * PM: Add activity domain to all PM interfaces and driver callbacks. If CONFIG_PM_NDOMAINS == 1, then the legacy behavior is preserved. If @@ -11615,7 +11615,7 @@ * STM3220G-EVAL: Add support for both the IAR and uVision GCC IDEs From Kha Vo (2016-04-08). * STM32F429I Discovery: Add support for the uVision GCC IDE. From - * Kha Vo (2016-04-08). + Kha Vo (2016-04-08). * libc/signal and include/signal.h: Rename sigset() to signal(). sigset() is the System V function; signal() is the obsoleted POSIX name. These seem to be equivalent. Neither are relevant in modern @@ -11640,7 +11640,7 @@ is interpreted as a packed dual frame exchange. Sebastien Lorquet (2016-04-13). * net/sockets/listen.c and accept.c and include/nuttx/net: Separate - out psock_listen() and psock_accepti() for internal OS usage + out psock_listen() and psock_accept() for internal OS usage (2016-04-14). * fs/inode/, fs/vfs/, and sched/task/: File and socket descriptors are no longer allocated for kernel threads. They must use SYSLOG for @@ -11750,3 +11750,211 @@ the watchdog driver by calling the appropriate, MCU-specific driver configuration function from your board initialization logic (2016-05-18). + * arch/srm/src/stm32l4: Add CAN support for STM32L4. From Sebastien + Lorquet (2016-05-19). + * arch/arm/src/samv7: Adds a JTAG config and ERASE config to Kconfig to + set the CCFG_SYSIO SYSIO Pins. From David Sidrane (2016-05-19). + * arch/sim/src: Enhance networking support for the simulation under Linux. + Includes updated support for Linux TUN/TAP, and the addition of support + for Linux bridge devices. From Steve (2016-05-20). + * configs/stm32f411e-disco: Add basic configuration for stm32f411e-disco + board with STM32F411VE chip. From Konstantin Berezenko (2016-05-20). + * i.MX6 Sabre-6Quad: Basic SMP NSH configuration is now working. But + this is probably only because the SMP NSH case does not stress the + logic. There are know outstanding SMP issues as noted in the + Sabre-6Quad README.txt file (2016-05-22). + * configs/sabre-6quad: Add an SMP configuration; Enable procfs in all + configurations (2016-05-22). + * include/nuttx/crypto/aes.h: Modifications to the crypto API needed + for LPC43xx. From Alexander Vasiljev (2016-05-23). + * arch/arm/src/lpc43xx: Add AES support. From Alexander Vasiljev + (2016-05-24). + * configs/*/src/tiva_timer.c: Tiva boards: Fix a naming collision, + rename board-specific function from tiva_timer_initialize() to + tiva_timer_configure() to remove conflict (2016-05-23). + * arch/arm/src/sam*: Ensure that the TWIHS (i2c) hw get's its clock + set when the sequence of sam_i2cbus_initialize(), + sam_i2cbus_uninitialize(), then sam_i2cbus_initialize() or twi_reset() + is called. I found this a while back in the stm32 family, so there + may be more arch-es with this sort of bug. I suppose any driver that + has the notion of "do not set the freq if it is already set" could be + suspect. From David Sidrane (2016-05-23). + * arch/arm/src/samv7: Add the up_systemreset interface to the samv7 + arch. The approach is slightly different in that: 1) It enables + ARCH_HAVE_RESET and allows the user to set if, and for how long, to + drive External nRST signal. It also does not contain a default + board_reset, as that really should be done in the config's src if + CONFIG_BOARDCTL_RESET is defined. From David Sidrane (2016-05-23). + * arch/arm/include/lpc43xx and src/lpc43xx: Adds definitions for the + LPC4337jet100 chip. From Alexander Vasiljev (2016-05-24). + * Many files: board_app_initialize() now accepts an argument that may + be used to support initialization in different configurations + (2016-05-24). + * arch/arm/src/samv7: Remove disabling of whole USB on suspend of USBHS. + This fix removes the disabling of the whole USB peripheral on suspend + interrupt. Its enough to freeze the clock instead. When disabling the + whole peripheral, the next wakeup-interrupt comes up with an disabled + clocking. The unfreeze clock has no effect, because the master clock + is disabled. This makes all registers, including the IDR unwriteable + and the IRQ falls in an endless loop blocking the whole system. + Furthermore the disabling of the peripheral clock prevents hotplugging + or reconnecting the USB. From Frank Benkert (2015-05-25). + * drivers/lcd: Add support for PCF8574 LCD Backpack driver. This driver + supports an interface board that is based on the PCF8574 io expander + and supports the HD44780-based (or compatible) LCD modules. There + are a myriad of different vendors of such, but they are principally + the same, save wiring and minor features like jumpers for I2C + addresses. This driver supports known and unknown variants. From + Dave (ziggurat29, 2013-6-26). + * arch/arm/stm32: Add support for a custom 1-wire driver. The serial + driver already supports a 1-wire interface, but this driver uses the + same serial logic to implement a lower half driver much like the I2C + lower half driver. From Aleksandr Vyhovanec (2015-05-25). + * fs/: Add logic to detach a file structure from a file descriptor. + This is for use only within the OS. It permits an open file or driver + to be used across multiple threads (2016-05-26). + * arch/arm/src/stm32l4: Get I2C working for STM32L4. From Dave + (ziggurat29) (2016-05-25). + * fs/ and include/nuttx/fs: Add logic to detach a file structure from a + file descriptor. This is for use only within the OS. It permits an + open file or driver to be used across multiple threads. (2016-05-26). + * drivers/analog/adc.c, include/nuttx/analog/adc.h, and all ADC lower + half drivers: No longer uses global adc_receive() call. Added a new + bind() method to the ADC interface. Now the ADC upper half driver + will register its receipt-of-data callback. This change allows the + ADC lower half driver to be used with a differ ADC upper half + (2016-05-26). + * drivers/analog/ads1255.c: Must not do SPI access from interrupt + handler. Use the worker thread instead. Must also lock the SPI bus + before using it. (2015-05-26). + * drivers/: Several SPI-based drivers modified. All drivers that use + SPI must call SPI_LOCK and SPI_UNLOCK. This is not optional + (2016-05-26). + * drivers/sensors: Fix a bug in crc computation for ms583730. + Implement POSIX read (2016-05-27). + * arch/arm/src/samv7: This is a fix to a problem in the handling of the + oneshot timer. Due to a wrong assumption concerning the behavior + directly after the start of the timer/counter the function + sam_oneshot_cancel(…) calculates the wrong remaining time. The code + assumes that the counter register is zero directly after the start of + the timer, but this is not true. To start the time/counter a software + trigger is invoked, this trigger starts the timer/count and sets the + counter register to zero, but the reset of the counter register is not + performed instantly. According to the datasheet: "The counter can be + reset by a trigger. In this case, the counter value passes to zero on + the next valid edge of the selected clock." Thus the counter is set to + zero between 0 and USEC_PER_TICK microseconds after the clock was + started. + In my fix I use the freerun count value to determine if at least one + tick passed since the start of the timer and thus if the value of the + oneshot counter is correct. I also tried to use the function + up_timer_gettime(…) to achieve this but, at least if compiled with no + optimization the problem vanishes without using the value of the + function, the function call takes too long. + Another problem treated in the fix is that if the oneshot timer/counter + is canceled, we only know the remaining time with a precision of + USEC_PER_TICK microseconds. This means the calculated remaining time + is between 0 and USEC_PER_TICK microseconds too long. To fix this I + subtract one tick if the calculated remaining time is greater than one + tick and otherwise set the remaining time to zero. By doing so the + measured times are much more precise as without it. From Stefan Kolb + (2016-05-27). + * arch/arm/src/sama5: Stefan Kolb's change to the SAMV7 Oneshot Timer + should also be applied to the SAMA5 oneshot time since the drivers are + identical (2016-05-27). + * arch/arm/src/stm32l4: Add support for SPI 4 and 5 on stm32f411 chips. + From Konstantin Berezenko (2016-05-27). + * arch/arm/src/sam34: Stefan Kolb's change to the SAMV7 Oneshot Timer + should also be applied to the SAM3/4 oneshot time since the drivers + are identical (2016-05-29). + * arch/arm/src/stm32: Allow to not use all channel in a lower part of + PWM. From Pierre-noel Bouteville (2016-05-30). + * libc/math: Add a NAN test on 'x' in asin function of lib_asin.c. + Suggested by Pierre-noel Bouteville (2016-05-31). + * arch/arm/src/stm32: Fix logic in F4 RTCC driver that prevent ALARM + interrupt. From Neil Hancock (2016-05-31). + * arch/arm/src/stm32: Fix STM32 ValueLine ADC IRQ number selection. + From David Sidrane (2016-05-31). + * arch/arm/src/samv7: Fix missing unlock of device in MCAN + mcan_txempty(). From Frank Benkert (2016-06-01). + +7.17 2016-xx-xx Gregory Nutt + + * drivers/mtd/flash_eraseall.c: Removed. This is no longer used + in the OS and is simply a wrapper around the MDIOC_BULKERASE + IOCTL command. It used to be called (only) from + apps/system/flash_eraseall, but that has been removed because it + violated the OS/application interface -- by calling flash_eraseall(). + The old code can be found in the Obsoleted' repository (and a revised + version can be found at apps/fsutils/flash_eraseall) (2016-06-03). + * arch/arm/src/stm32: STM32 Timer Driver: Change calculation of per- + timer pre-scaler value. Add support for all timers (2016-6-03) + * drivers/lcd: Correct conditional compilation in ST7565 driver. From + Pierre-noel Bouteville (2016-6-03) + * arch/arm/src/stm32: Correct conditional compilation in STM32 timer + capture logic. From Pierre-noel Bouteville (2016-6-03) + * arch/arm/src/efm32: Fix EFM32 FLASH conditional compilation. From + Pierre-noel Bouteville (2016-6-03) + * arch/arm/src/lpc43xx: Fix errors in GPIO interrupt logic. From v01d + (phreakuencies) (2016-06-04) + * arch/arm/src/kl and lpc11xx: rename xyz_lowputc to up_putc. Remove + all references to up_lowputc, everywhere (2016-06-04). + * configs/stm32f103-minimum: Add minnsh configuration. From Alan + Carvalho de Assis (2016-06-04). + * arch/arm/src/stm32: Add the up_getc() function to STM32 in order to + support the minnsh configuration. From Alan Carvalho de Assis + (2016-06-04). + * include/sys/boardctl.h: Needs to be usable with C++ files (2016-06-05). + * tools/tesbuild.sh will now build NxWM configurations (2016-06-05). + * arch/arm/src/stm32: In PWM driver, just update duty if frequency is + not changed and PSM started. This removeis glitch or blinking when + only duty is frequently changed. From Pierre-noel Bouteville (2016-06-05). + * arch/arm/src/kinetis: Add a USB device controller driver. Derived from + the pic32mx usb driver, which uses the same usb controller. From kfazz + (2016-06). + * configs/teensy-3.x: Add USB support and a usbnsh configuration. From + kfazz (2016-06). + * arch/arm/src/stm32: Add support for the STM32F105R. From Konstantin + Berezenko (2016-06-06). + * include/signal.h: Change type of SIG_ERR, SIG_IGN, ... to + _sa_handler_t. They type void does not work with the IAR toolchain. + From Aleksandr Vyhovanec (2016-06-07). + * arch/arm/src/stm32f7 and include/stm32f7: Added STM32FF76xxx and + STM32FF7xx families. From David Sidrane (2016-06-08). + * Refactoring configs/nucleo-144 sub-directories to support additional + nucleo-144 board. Add support for the Nucleo-F767ZI board. From David + Sidrane (2016-06-08). + * arch/arm/src/kinetis: Add a USB device controller driver for kinetis. + Derived from pic32mx usb driver, which uses the same usb controller. + From kfazz (2016-06-06). + * configs/teensy-3.x: Add USB device support and usbnsh configuration. + From kfazz (2016-06-06. + * arch/arm/src/stm32: Add STM32F105R support. From Konstantin Berezenko + (2016-06-06). + * include/signal.h: Change type of SIG_IGN and related defines to + _sa_handler_t. From Aleksandr Vyhovanec (2016-06-07). + * configs/nucleo-144: Refactored configs/nucleo-144 sub-directories to + support additional nucleo-144 board. Add support for the Nucleo-F767ZI + board. From David Sidrane (2016-06-07). + * arch/arm/src/stm32f7: Add support for STM32FF76xxx and STM32FF7xx + families. From David Sidrane (2016-06-08). + * include/assert.h: Check if NDEBUG is defined. From Paul Alexander + Patience (2016-06-08). + * arch/arm/src/stm32: Fix STM32 DMA code and configuration for STM32F37X + chips. From Marten Svanfeldt (2016-06-08). + * drivers/mtd: Add a driver of IS25xP SPI flash devices. From Marten + Svanfeldt (2016-06-09). + * arch/arm/src/Kconfig and configs/teensy-3.x: Teensy clock fixes. The + High Gain bit in MCG_C1 was preventing teensy from booting except + after a programming session. The second change doesn't appear to + change any functionality, but complies with restrictions in the k20 + family reference manual on FEI -> FBE clock transiions. From kfazz + (2016-06-09). + * configs/*/include/board.h: Fix timer input clock definitions. From + David Sidrane (2016-06-09). + * Networking: In both IPv6 and IPv4 incoming logic: (1) Should check + if the packet size is large enough before trying to access the packet + length in the IP header. (2) In the comparison between the IP length + and the full packet length, need to subtract the size of the link + layer header before making the comparison or we will get false + positives (i.e., the packet is really too small) (2016-06-09) diff --git a/Documentation/NuttX.html b/Documentation/NuttX.html index 9910e4c275d..83c42c61cfd 100644 --- a/Documentation/NuttX.html +++ b/Documentation/NuttX.html @@ -8,7 +8,7 @@

NuttX RTOS

-

Last Updated: April 12, 2016

+

Last Updated: June 1, 2016

@@ -1340,11 +1340,11 @@

Released Versions

In addition to the ever-changing GIT repository, there are frozen released versions of NuttX available. - The current release is NuttX 7.15. - NuttX 7.15 is the 115th release of NuttX. - It was released on March 27, 2016, and is available for download from the + The current release is NuttX 7.16. + NuttX 7.16 is the 116th release of NuttX. + It was released on June 1, 2016, and is available for download from the Bitbucket.org website. - Note that the release consists of two tarballs: nuttx-7.15.tar.gz and apps-7.15.tar.gz. + Note that the release consists of two tarballs: nuttx-7.16.tar.gz and apps-7.16.tar.gz. Both may be needed (see the top-level nuttx/README.txt file for build information).

@@ -1353,7 +1353,7 @@
  • nuttx.

      - Release notes for NuttX 7.15 are available here. + Release notes for NuttX 7.16 are available here. Release notes for all released versions on NuttX are available in the Bitbucket GIT. The ChangeLog for all releases of NuttX is available in the ChangeLog file that can viewed in the Bitbucket GIT. The ChangeLog for the current release is at the bottom of that file. @@ -1361,7 +1361,7 @@

  • apps.
  • Atmel AVR @@ -2257,7 +2257,7 @@

    NXP/Freescale i.MX6. - A port is underway for the following i.MX6 board + The basic port has been completed for the following i.MX6 board

    • @@ -2268,9 +2268,13 @@

      STATUS: - The basic, minimal port is code complete and introduced in NuttX-7.15, but has not yet been tested. - I am still waiting for the reciept of the Sabre board. - Expect to see the verified Sabre-6Quad support (with SMP!) in NuttX-7.16. + The basic, minimal port is code complete and introduced in NuttX-7.15, but had not yet been tested at that time due to the inavailability of hardware. + This basic port was verified in the NuttX-7.16 release, however. + The port is still mininal and more device drivers are needed to make the port usable. +

      +

      + Basic support of NuttX running in SMP mode on the i.MX6Q was also accomplished in NuttX-7.16. + However, there are still known issues with SMP support on this platform as described in the README file for the board.

    @@ -2907,13 +2911,26 @@ nsh>

    STMicro STM32F103C4/8 (STM32 F1 Low- and Medium-Density Family). - This port is for "STM32 Tiny" development board. - This board is available from several vendors on the net, and may be sold under different names. - It is based on a STM32 F103C8T6 MCU, and is bundled with a nRF24L01 wireless communication module. + There are two ports available for this family:

      -

      - STATUS: +

    • +

      + One port is for "STM32 Tiny" development board. + This board is available from several vendors on the net, and may be sold under different names. + It is based on a STM32 F103C8T6 MCU, and is bundled with a nRF24L01 wireless communication module. +

      +
      • +
    • +

      + The other port is for a generic minimual STM32F103CBT6 "blue" board contributed by Alan Carvalho de Assis. +

      +
      • +
    +

    + STATUS: + +

      The basic STM32F103C8 port was released in NuttX version 6.28. This work was contributed by Laurent Latil. Refer to the NuttX board README file for further information. @@ -3160,11 +3177,17 @@ nsh>

      - STATUS: - The peripherals of the STM32 F2 family are compatible with the STM32 F4 family. - See discussion of the STM3240G-EVAL board below for further information. - Refer also to the NuttX board README file for further information. -
    +

    + STATUS: + The peripherals of the STM32 F2 family are compatible with the STM32 F4 family. + See discussion of the STM3240G-EVAL board below for further information. + Refer also to the NuttX board README file for further information. +

    +

    + Support for both the IAR and uVision GCC IDEs added for the STM3220G-EVAL board in NuttX 7.16. + From Kha Vo. +

    +
@@ -3779,6 +3802,10 @@ nsh> In Nutt-7.7, Marco Krahl included support for a framebuffer based driver using the LTDC and DMA2D. Marcos's implementation included extensions to support more advance LTDC functions through an auxiliary interface. +
  • + Support for the uVision GCC IDE added for theSTM32F429I-Discovery board in NuttX 7.16. + From Kha Vo. +

    • Refer to the STM32F429I-Discovery board README file for further information. @@ -3853,6 +3880,15 @@ nsh>

  • UART, USART, Serial Console
  • GPIO, DMA, I2C, RNG, SPI
    • +

    + NuttX-7.16. + Additional drivers were contributed: +

    +
      +
    • QSPI with DMA and memory mapped support. From Dave (ziggurat29).
      • +
    • CAN contributed by Sebastien Lorquet.
      • +
    • I2C made functional by Dave (ziggurat29).
      • +
    @@ -3968,6 +4004,13 @@ nsh> The NXP WaveShare LPC4337-WS port is was contributed by Lok Tep and first released in NuttX-7.14.

    +
  • +

    NuttX-7.16 + Support for the LPC4337JET100 chip was contribed by Alexander Vasiljev. + Alexander also contributed an LPC43xx AES driver available in NuttX-7.16. +

    +
    • + @@ -4407,13 +4450,24 @@ Mem: 29232 5920 23312 23312

    STMicro STM32 F745/F746. - This port uses the STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash. - Refer to the STMicro web site for further information about this board. + Two boards are supported for this MCU:

      - STATUS: - The basic port is complete and there are two, verified configurations available. + STM32F746G Discovery. + One port uses the STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash. + Refer to the STMicro web site for further information about this board. +

      +

      + A basic port for the Nucleo-144 board with the STM32F746ZG MCU was contribued in NuttX-7.16 by Kconstantin Berezenko. +

      +
    +

    + STATUS: +

    +
      +

      + The basic STM32F746G-DISCO port is complete and there are two, verified configurations available. Both configurations use the NuttShell (NSH) and a serial console; one includes Ethernet support. DMA supports is available. The STM32 F7 peripherals are very similar to some members of the STM32 F4 and additional drivers can easily be ported the F7 as discussed in this Wiki page: Porting Drivers to the STM32 F7 diff --git a/Documentation/NuttxPortingGuide.html b/Documentation/NuttxPortingGuide.html index ff3990c9d9b..9fc2e5e9e29 100644 --- a/Documentation/NuttxPortingGuide.html +++ b/Documentation/NuttxPortingGuide.html @@ -4901,8 +4901,7 @@ int kbd_decode(FAR struct lib_instream_s *stream, FAR struct kbd_getstate_s *sta

      include/nuttx/net/netdev.h. All structures and APIs needed to work with Ethernet drivers are provided in this header file. - The structure struct net_driver_s defines the interface and is passed to uIP via - netdev_register(). + The structure struct net_driver_s defines the interface and is passed to the network via netdev_register().

    • diff --git a/Documentation/NuttxUserGuide.html b/Documentation/NuttxUserGuide.html index a91959e198d..3766eba646f 100644 --- a/Documentation/NuttxUserGuide.html +++ b/Documentation/NuttxUserGuide.html @@ -8755,9 +8755,8 @@ FAR void *mmap(FAR void *start, size_t length, int prot, int flags, int fd, off_

      - NuttX includes a simple interface layer based on uIP (see http://www.sics.se). - NuttX supports subset of a standard socket interface to uIP. - These network feature can be enabled by settings in the architecture configuration file. + NuttX supports a BSD-compatible socket interface layer. + These socket interface can be enabled by settings in the architecture configuration file. Those socket APIs are discussed in the following paragraphs.

        diff --git a/Documentation/README.html b/Documentation/README.html index 735edf031d4..1c13c8abdd8 100644 --- a/Documentation/README.html +++ b/Documentation/README.html @@ -8,7 +8,7 @@

        NuttX README Files

        -

        Last Updated: May 20, 2016

        +

        Last Updated: May 26, 2016

        @@ -316,7 +316,8 @@ nuttx/ | |- eeprom/ | | `- README.txt | |- lcd/ - | | `- README.txt + | | |- README.txt + | | `- pcf8574_lcd_backpack_readme.txt | |- mtd/ | | `- README.txt | |- sensors/ diff --git a/README.txt b/README.txt index 130626fd7d5..b3cb19a407d 100644 --- a/README.txt +++ b/README.txt @@ -960,10 +960,13 @@ Native Windows Build In this build, you cannot use a Cygwin or MSYS shell. Rather the build must be performed in a Windows console window. Here is a better terminal than the standard issue, CMD.exe terminal: ConEmu which can be downloaded from: - http://code.google.com/p/conemu-maximus5/ + https://sourceforge.net/projects/conemu/ or https://conemu.github.io/ . Build Tools. The build still relies on some Unix-like commands. I use - the GNUWin32 tools that can be downloaded from http://gnuwin32.sourceforge.net/. + the GNUWin32 tools that can be downloaded from http://gnuwin32.sourceforge.net/ + using the 'Download all' selection. Individual packages can be download + instead if you know what you are doing and want a faster download (No, I + can't tell you which packages you should or should not download). Host Compiler: I use the MingGW GCC compiler which can be downloaded from http://www.mingw.org/. If you are using GNUWin32, then it is recommended @@ -971,12 +974,13 @@ Native Windows Build This capability should still be considered a work in progress because: - (1) It has not been verified on all targets and tools, and - (2) it still lacks some of the creature-comforts of the more mature environments. + (1) It has not been verified on all targets and tools, and + (2) it still lacks some of the creature-comforts of the more mature + environments. - There is an alternative to the setenv.sh script available for the Windows - native environment: tools/configure.bat. See tools/README.txt for additional - information. + There is an alternative to the setenv.sh script available for the Windows + native environment: tools/configure.bat. See tools/README.txt for additional + information. Installing GNUWin32 ------------------- @@ -1491,7 +1495,8 @@ nuttx/ | |- eeprom/ | | `- README.txt | |- lcd/ - | | `- README.txt + | | | README.txt + | | `- pcf8574_lcd_backpack_readme.txt | |- mtd/ | | `- README.txt | |- sensors/ diff --git a/ReleaseNotes b/ReleaseNotes index 89cf4119a4d..c760fca7372 100644 --- a/ReleaseNotes +++ b/ReleaseNotes @@ -5303,7 +5303,8 @@ Additional new features and extended functionality: can be re-enabled if needed via configuration option. - NXFFS: Make the start up scan of the media a configuration option. It just takes to long and is not really necessary! Those rare cases - where the scan was helpful can be fixed using flash_eraseall(). + where the scan was helpful can be fixed using MDIOC_BULKERASE IOCTL + command. * General Drivers: @@ -10716,3 +10717,365 @@ detailed bugfix information): - Moved C++ initialization logic out of the RTOS and into the application space, specifically to apps/platform/board, where it belongs. + +NuttX-7.16 Release Notes +------------------------ + +The 116th release of NuttX, Version 7.16, was made on June 1, 2016, +and is available for download from the Bitbucket.org website. Note +that release consists of two tarballs: nuttx-7.16.tar.gz and +apps-7.16.tar.gz. These are available from: + + https://bitbucket.org/nuttx/nuttx/downloads + https://bitbucket.org/nuttx/apps/downloads + +Both may be needed (see the top-level nuttx/README.txt file for build +information). + +Additional new features and extended functionality: + + * Core OS: + + - Power Management: Add activity domain to all PM interfaces and + driver callbacks. If CONFIG_PM_NDOMAINS == 1, then the legacy + behavior is preserved. If CONFIG_PM_NDOMAINS > 1, then multiple + PM domains are supported. This will allow separate control for + certain power management groups. For example, a network can be + shut down without affect an ongoing UI (and vice versa). + - board_app_initialize(): board_app_initialize() now accepts an + argument that may be used to support initialization in different + configurations. + + * File System and Block and MTD Drivers: + + - N25Qxxx: Add MTD support for Micron N25Qxxx family of QSPI flash. + From Dave (ziggurat29). + - SST26F: Add an MTD driver for SST26F spi/qspi flash devices (SPI + mode only). From Sebastien Lorquet. + - File Descriptor Detach: Add logic to detach a file structure from a + file descriptor. This is for use only within the OS. It permits an + open file or driver to be used across multiple threads. + + * Networking and Network Drivers: + + - listen()/accept(): Separate out psock_listen() and psock_accepti() + for internal, thread independent OS usage (i.e., without a socket + descriptor). + - VNC Server: Add support for a VNC server. This logic is code + complete and functional, but not well tested. + + * Graphics and Graphic Drivers: + + - Framebuffer driver: Add a display number to each interface in order + to support multiple display devices. + - VNC Server: Add support for a VNC server. This logic is code + complete and functional, but not well tested. + - LCD Backpack: Add support for PCF8574 LCD Backpack driver. This + driver supports an interface board that is based on the PCF8574 I/O + expander and supports the HD44780-based (or compatible) LCD modules. + There are a myriad of different vendors of such, but they are + principally the same, save wiring and minor features like jumpers + for I2C addresses. This driver supports known and unknown variants. + From Dave (ziggurat29). + + * Common Device Drivers: + + - RTC: Simplify the RTC interface. The old interface was way too + complex and was not fully implemented anywhere. + - BH1750FVI: Add a character driver for Rohm Ambient Light Sensor + BH1750FVI. From Alan Carvalho de Assis. + - CAN: Improve CAN error reporting. From Frank Benkert. + - aes.h: Modifications to the crypto API needed for LPC43xx. From + Alexander Vasiljev. + - ADC: Interface no longer uses global adc_receive() call. Added a + new bind() method to the ADC interface. Now the ADC upper half + driver will register its receipt-of-data callback. This change + allows the ADC lower half driver to be used with a differ ADC upper + half. + + * Simulation Platform: + + - Linux Host Networking: Enhance networking support for the + simulation under Linux. Includes updated support for Linux TUN/TAP, + and the addition of support for Linux bridge devices. From Steve. + + * ARMv7-A, ARMv7-R, and ARMv7-M: + + - ARMv7-M: Convert more assembly language files for use with the IAR + toolchain. From Kha Vo. + - ARMv7-A: Complete re-design of SMP-related logic to initialize each + CPUn, n > 0, when CONFIG_SMP=y. + + * Atmel SAMV7: + + - Add a JTAG config and ERASE config to Kconfig to set the + CCFG_SYSIO SYSIO Pins. From David Sidrane. + - System Reset: Add the up_systemreset interface to the samv7 arch. The + approach is slightly different in that: 1) It enables ARCH_HAVE_RESET + and allows the user to set if, and for how long, to drive External + nRST signal. It also does not contain a default board_reset, as that + really should be done in the config's src if CONFIG_BOARDCTL_RESET + is defined. From David Sidrane. + + * Atmel SAMV7 Boards: + + - SAMV71-XULT: Add configuration(s) that were be used to verify VNC + graphics output as well as mouse and keyboard input. + + * NXP Freescale i.MX6 Boards: + + - Sabre-6Quad: The basic i.MX6 port is complete. This is a minimal + port at present and probably still has some as-of-yet-undiscovered + issues. + - Sabre-6Quad: Basic SMP NSH configuration is now working. But this + is probably only because the SMP test case does not stress the + logic. There are know outstanding SMP issues as noted in the + Sabre-6Quad README.txt file. + + * NXP Freescale LPC43xx: + + - LPC4337jet100: Add definitions for the LPC4337jet100 chip. From + Alexander Vasiljev. + + * NXP Freescale LPC43xx Drivers: + + - AES: Add AES support. From Alexander Vasiljev. + + * STMicro STM32: + + - STM32 L4: Add configuration options to allow SRAM2 to be used for + heap, or not at all, and to zero-initialize it on OS start, or not + at all. From Dave dev@ziggurat29.com. + - STM32 L4: Add support for HSE and MSI clocks, and auto trim of MSI + to LSE (needed for USB). From Dave (ziggurat29) + - STM32 L4: Add support for unique id function to arch; modified board + to support unique id boardctl. From Dave (ziggurat29) + + * STMicro STM32 Drivers: + + - STM32 F4 RTC: Add a custom RTC driver with support for alarms. From + Neil Hancock. + - STM32 L4 QSPI: Add a QSPI driver with DMA support and (optional + memory mapped mode support. From Dave ziggurat29). + - STM32, STM32 L4, and STM32 F7 Serial: Add support for compliant + SD-style breaks. From David Sidrane. + - STM32 L4 CAN: Add CAN support for STM32L4. From Sebastien Lorquet. + - STM32 1-Wire: Add support for a custom 1-wire driver. The serial + driver already supports a 1-wire interface, but this driver uses the + same serial logic to implement a lower half driver much like the + I2C lower half driver. From Aleksandr Vyhovanec. + - STM32 L4 SPI: Add support for SPI 4 and 5 on stm32f411 chips. From + Konstantin Berezenko. + - STM32 ADC: Allow omitting use of channels in a lower part of PWM. + From Pierre-noel Bouteville. + - STM32 L4 I2C: Get I2C working for STM32L4. From Dave (ziggurat29). + + * STMicro STM32 Boards: + + - STM3220G-EVAL: Add support for both the IAR and uVision GCC IDEs. + From Kha Vo. + - STM32F429I Discovery: Add support for the uVision GCC IDE. From + Kha Vo. + - STM32F4 Discovery: Integrate BH1750FVI driver in the STM32F4 Discovery + board. From Alan Carvalho de Assis. + - STM32L476VG Discovery: Add support for QSPI based N25Qxxx flash. + From Dave (ziggurat29) + - STM32L476VG Discovery: Add board ioctls for allowing user application + to cause QSPI memory mapped mode to be engaged and disengaged. Also + partitioned QSPI flash for file system and other (eventually xip). + From Dave (ziggurat29) + - Nucleo-144: Basic port for the Nucleo-144 board with the STM32F746ZG + MCU. From Kconstantin Berezenko. + - STM32F103 Minimum: Add support for this minimual STM32F103CBT6 "blue" + board. From Alan Carvalho de Assis. + - STM32F411E Discovery: Add basic configuration for stm32f411e-disco + board with STM32F411VE chip. From Konstantin Berezenko. + + * Build/Configuration System: + + - Moved NuttX repository to https://bitbucket.org/nuttx/nuttx. + Eliminated use of sub-modules. + - Add support for the IAR toolchain for the limited case of the ARMv7-M + architecture and the STM32 chip. From Aleksandr Vyhovanec. + - make export: Pass top-level make to the script to allow -j greater + than 1. From David Sidrane. + - fs/Kconfig: Allow CONFIG_FS_WRITABLE to be manually selectable. This + is needed when there are no writable file systems, but write support + is still needed in BCH or FTL. + - arch/*/Makefile: Add definitions that can be overrided to use GCC + instead of LD in the final link. From Paul Alexander Patience . + + * Applications: apps/netutils: + + - apps/netutils/esp8266: ESP8266 driver application. From Pierre-noel + Bouteville. + + * Applications: apps/examples: + + - apps/examples/alarm: Add a simple test of the ALARM iotcl calls of + the RTC driver. + - apps/examples/nximage: Add a configuration option to select + greyscale. + + * Platforms: apps/platform: + + - apps/platform/nucleo-144: Add platform files for NUCLEO-144 + (NUCLEO-F746ZG). From Mark Olsson. + - apps/examples/media: You can now override the default device driver + path by providing an alternal path on the command line. From + Sébastien Lorquet. + +Works-In-Progress: + + * IEEE802.14.5/6LowPAN. Hooks and framework for this effort were + introduced in NuttX-7.15. Work has continued on this effort on + forks from the main repositories, albeit with many interruptions. + The completion of this wireless feature will postponed until at + least NuttX-7.17. + + * i.MX6 SMP. Partially functional, but there is more that still + needs to be done. + +Bugfixes. Only the most critical bugfixes are listed here (see the +ChangeLog for the complete list of bugfixes and for additional, more +detailed bugfix information): + + * Core OS: + + - Various places: Search for places where a stray semicolon following + an if condition cause the if body to be executed unconditionally. + Fixes in all SAM DMA logic, unionfs, OS signalling logic, and others. + - enter/leave_critical_section() may attempt to access task lists + before they have been initialized in the SMP configuration. + + * File System/Block Drivers: + + - SMART MTD: Return code of smart_scan not checked, can cause success + result in failure case, leading to 'dev' pointer being invalid. From + Dave (ziggurat29) + - mount: Fix a backward debug assertion. Noted by David Sidrane. + + * Common Drivers: + + - NRF24L01: Fix backward calculation of relative frequency. Noted by + Henry Zhang. + - PCA9555 I/O expander: Fix an error in the PCA9555 driver: Under + certain error conditions, interrupts were not being re-enabled. + Sebastien Lorquet. + - ADS1255: Must not do SPI access from interrupt handler. Use the + worker thread instead. Must also lock the SPI bus before using it. + - Several SPI-based drivers modified. All drivers that use SPI must + call SPI_LOCK and SPI_UNLOCK. This is not optional. + - MS583730: Fix a bug in crc computation for ms583730. Implement + POSIX read. + + * Atmel SAMV7: + + - Fix typo in MATRIX register definitions. From Stefan Kolb. + - SAMV7 Tickless Mode: This is a fix to a problem in the handling of + the oneshot timer. Due to a wrong assumption concerning the behavior + directly after the start of the timer/counter the function + sam_oneshot_cancel(…) calculates the wrong remaining time. The code + assumes that the counter register is zero directly after the start + of the timer, but this is not true. To start the time/counter a + software trigger is invoked, this trigger starts the timer/count and + sets the counter register to zero, but the reset of the counter + register is not performed instantly. According to the datasheet: + "The counter can be reset by a trigger. In this case, the counter + value passes to zero on the next valid edge of the selected clock." + Thus the counter is set to zero between 0 and USEC_PER_TICK + microseconds after the clock was started. + In my fix I use the freerun count value to determine if at least one + tick passed since the start of the timer and thus if the value of + the oneshot counter is correct. I also tried to use the function + up_timer_gettime(…) to achieve this but, at least if compiled with + no optimization the problem vanishes without using the value of the + function, the function call takes too long. + Another problem treated in the fix is that if the oneshot timer/counter + is canceled, we only know the remaining time with a precision of + USEC_PER_TICK microseconds. This means the calculated remaining time + is between 0 and USEC_PER_TICK microseconds too long. To fix this I + subtract one tick if the calculated remaining time is greater than + one tick and otherwise set the remaining time to zero. By doing so + the measured times are much more precise as without it. From Stefan + Kolb. + + * Atmel SAMA5: + + - SAMA5: Stefan Kolb's change to the SAMV7 Oneshot Timer should also + be applied to the SAMA5 oneshot time since the drivers are identical. + + * Atmel SAM3/4: + + - SAM3/4: Stefan Kolb's change to the SAMV7 Oneshot Timer should also + be applied to the SAM3/4 oneshot time since the drivers are identical. + + * Atmel SAMV7 Drivers: + + - SAMV7 TWIHS (as well as SAM3/4 and SAMA5: Ensure that the TWIHS + (i2c) hw get's its clock set when the sequence of + sam_i2cbus_initialize(), sam_i2cbus_uninitialize(), then + sam_i2cbus_initialize() or twi_reset() is called. I found this a + while back in the stm32 family, so there may be more arch-es with + this sort of bug. I suppose any driver that has the notion of "do + not set the freq if it is already set" could be suspect. From David + Sidrane. + - USBHS Device: Remove disabling of whole USB on suspend of USBHS. + This fix removes the disabling of the whole USB peripheral on + suspend interrupt. Its enough to freeze the clock instead. When + disabling the whole peripheral, the next wakeup-interrupt comes up + with an disabled clocking. The unfreeze clock has no effect, because + the master clock is disabled. This makes all registers, including + the IDR unwriteable and the IRQ falls in an endless loop blocking + the whole system. Furthermore the disabling of the peripheral clock + prevents hotplugging or reconnecting the USB. From Frank Benkert. + - MCAN: Fix missing unlock of device in MCAN mcan_txempty(). From + Frank Benkert. + + * STMicro STM32: + + - STM32 L4 Clocking: Problem with resetting backup domain clears + clocking options set up before in *rcc.c use INITS flag to avoid + magic reg value to detect power up reset state of RTC correct a + problem clearing interrupt flags (they weren't) which prevented an + alarm from ever being used more than once per reset cycle. From + Dave (ziggurat29) + + * STMicro STM32 Drivers: + + - STM32L4 SPI: That STM32Lr SPI driver is quite different. They now + handle frames of arbitrary size between 4 and 16 bits. It was broken + before a new bit has to be set (RX fifo threshold) to handle <= 8-bit + transactions. If not set, the default is 16-bit packed >=8-bit + frames and the RXNE bit is never set (it is set when 16-bits are + received). weird things as always. This also add 8-bit access + routines to the data register, because a 16-bit access to the data + register when the frame size is below 9 bits is interpreted as a + packed dual frame exchange. Sebastien Lorquet. + - STM32: Correct some bad commits that broke the LTDC display example. + From Marco Krahl. + - STM32 F4 RTC: Fix logic in F4 RTCC driver that prevent ALARM + interrupt. From Neil Hancock. + - STM32 F1 ADC: Fix STM32 ValueLine ADC IRQ number selection. From + David Sidrane. + + * STMicro STM32 Boards: + + - STM32F429I Discovery: Correct some bad commits that broke the LTDC + display example. From Marco Krahl. + + * TI Tiva: + + - GPIO Interrupts: Fix a bug of GPIO falling-edge interrupt for tiva. + From Young. + + * C Library: + + - math: Add a NAN test on 'x' in asin function of lib_asin.c. Suggested + by Pierre-noel Bouteville. + + * Build/Configuration System: + + - Several Makefiles: Add .PHONY definitions to prevent 'clean up to date' + message weirdness when 'make clean' is done with no .config or + Make.defs file. diff --git a/TODO b/TODO index 290dc13ef46..a4c960e2e18 100644 --- a/TODO +++ b/TODO @@ -1,20 +1,20 @@ -NuttX TODO List (Last updated March 31, 2016) +NuttX TODO List (Last updated June 6, 2016) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ This file summarizes known NuttX bugs, limitations, inconsistencies with standards, things that could be improved, and ideas for enhancements. This TODO list does not include issues associated with individual boar ports. See -altheso individual README.txt files in the configs/ sub-directories for -issues reated to each board port. +also the individual README.txt files in the configs/ sub-directories for +issues related to each board port. -nuttx/ +nuttx/: (13) Task/Scheduler (sched/) (1) Memory Management (mm/) (3) Signals (sched/signal, arch/) (2) pthreads (sched/pthread) (0) Message Queues (sched/mqueue) - (8) Kernel/Protected Build + (9) Kernel/Protected Build (3) C++ Support (6) Binary loaders (binfmt/) (12) Network (net/, drivers/net) @@ -23,16 +23,16 @@ nuttx/ (11) Libraries (libc/, libm/) (11) File system/Generic drivers (fs/, drivers/) (8) Graphics subsystem (graphics/) - (1) Pascal add-on (pcode/) - (1) Build system / Toolchains - (4) Linux/Cywgin simulation (arch/sim) + (2) Build system / Toolchains + (3) Linux/Cywgin simulation (arch/sim) (4) ARM (arch/arm/) -apps/ +apps/ and other Add-Ons: (3) Network Utilities (apps/netutils/) (2) NuttShell (NSH) (apps/nshlib) (1) System libraries apps/system (apps/system) + (1) Pascal add-on (pcode/) (4) Other Applications & Tests (apps/examples/) o Task/Scheduler (sched/) @@ -70,7 +70,7 @@ o Task/Scheduler (sched/) Title: GET_ENVIRON_PTR() Description: get_environ_ptr() (sched/sched_getenvironptr.c) is not implemented. The representation of the environment strings selected for - NutX is not compatible with the operation. Some significant + NuttX is not compatible with the operation. Some significant re-design would be required to implement this function and that effort is thought to be not worth the result. Status: Open. No change is planned. @@ -81,7 +81,7 @@ o Task/Scheduler (sched/) Status: Open Priority: Low -- There is no plan to implement this. - Title: INCOMPATIBILITES WITH execv() AND execl() + Title: INCOMPATIBILITIES WITH execv() AND execl() Description: Simplified 'execl()' and 'execv()' functions are provided by NuttX. NuttX does not support processes and hence the concept of overlaying a tasks process image with a new process image @@ -175,7 +175,7 @@ o Task/Scheduler (sched/) Yahoo! Groups message 7726: "I think that the system should be required to handle pthread_cancel safely in all cases. In the NuttX model, a task is like a Unix - process and a pthread is like a Unix thread. Cancelling + process and a pthread is like a Unix thread. Canceling threads should always be safe (or at least as unsafe) as under Unix because the model is complete for pthreads... @@ -188,7 +188,7 @@ o Task/Scheduler (sched/) "The patch I just incorporated is also insufficient. It works only if the serial driver is shut down when the - thread is cancelled. But what if there are other open + thread is canceled. But what if there are other open references to the driver? Then the driver will not be shut down, the semaphores will not be re-initialized, and the semaphore counts will still be off by one. @@ -202,7 +202,7 @@ o Task/Scheduler (sched/) hooks so that given a semaphore it can traverse all holders. What is needed would be logic so that given a task, you can traverse all semaphores held by the task, - releasing each semaphore cound held by the exiting task. + releasing each semaphore count held by the exiting task. Nothing like this exists now so that solution is not imminent. @@ -228,16 +228,15 @@ o Task/Scheduler (sched/) hidden behind simple accessor functions and so the internal data structures can be changed if need with very little impact. - - Explicity refereence to the list strucutre are hidden behnid + Explicitly reference to the list structure are hidden behind the macro this_task(). Status: Open Priority: Low. Things are just the way that we want them for the way that NuttX is used today. -o Memory Managment (mm/) - ^^^^^^^^^^^^^^^^^^^^^^ +o Memory Management (mm/) + ^^^^^^^^^^^^^^^^^^^^^^^ Title: FREE MEMORY ON TASK EXIT Description: Add an option to free all memory allocated by a task when the @@ -390,7 +389,7 @@ o pthreads (sched/pthreads) Priority: Low -- about zero, probably not that useful. Priority inheritance is already supported and is a much better solution. And it turns out that priority protection is just about as complex as priority inheritance. - Exerpted from my post in a Linked-In discussion: + Excerpted from my post in a Linked-In discussion: "I started to implement this HLS/"PCP" semaphore in an RTOS that I work with (http://www.nuttx.org) and I discovered after doing the @@ -589,8 +588,27 @@ o Kernel/Protected Build interrupt level callbacks into applications. This, of course, will never work in anything but a non-secure, flat build. Status: Open - Priority: Medium. The driver is only usable with all of its features in a FLAT build. - + Priority: Medium. The driver is only usable with all of its features + in a FLAT build. + + Title: USER MODE TASKS CAN MODIFY PRIVILEGED TASKS + Description: Certain interfaces, such as sched_setparam(), + sched_setscheduler(), etc. can be used by user mode tasks to + modify the behavior of priviledged kernel threads. + task_delete() could even be used to kill a kernel thread. + For a truly secure system. Privileges need to be checked in + every interface that permits one thread to modify the + properties of another thread. + + NOTE: It would be a simple matter to simply disable user + threads from modifying privileged threads. However, you + might also want to be able to modify privileged threads from + user tasks with certain permissions. Permissions is a much + more complex issue. + Status: Open + Priority: Low for most embedded systems but would be a critical need if + NuttX were used in a secure system. + o C++ Support ^^^^^^^^^^^ @@ -784,7 +802,7 @@ o Binary loaders (binfmt/) to get fixed as needed for Windows native tool builds. Title: TOOLCHAIN COMPATIBILITY PROBLEM - Descripton: The older 4.3.3 compiler generates GOTOFF relocations to the constant + Description: The older 4.3.3 compiler generates GOTOFF relocations to the constant strings, like: .L3: @@ -794,7 +812,7 @@ o Binary loaders (binfmt/) .word .LC3(GOTOFF) .word .LC4(GOTOFF) - Where .LC0, LC1, LC2, LC3, and .LC4 are the labels correponding to strings in + Where .LC0, LC1, LC2, LC3, and .LC4 are the labels corresponding to strings in the .rodata.str1.1 section. One consequence of this is that .rodata must reside in D-Space since it will addressed relative to the GOT (see the section entitled "Read-Only Data in RAM" at @@ -880,7 +898,7 @@ o Network (net/, drivers/net) RFC3678 (IGMPv3) suggests ioctl() commands to do this (SIOCSIPMSFILTER) but also status that those APIs are historic. NuttX implements these ioctl commands, but is non-standard because: (1) It does not support IGMPv3, and - (2) it looks up drivers by their device name (eg., "eth0") vs IP address. + (2) it looks up drivers by their device name (e.g., "eth0") vs IP address. Linux uses setsockopt() to control multicast group membership using the IP_ADD_MEMBERSHIP and IP_DROP_MEMBERSHIP options. It also looks up drivers @@ -896,7 +914,7 @@ o Network (net/, drivers/net) that connection may time out. How should this be handled? Should the connection be removed from the backlog if it is times out or is closed? Or should it remain in the backlog with a status indication so that accept() - can fail when it encounteres the invalid connection? + can fail when it encounters the invalid connection? Status: Open Priority: Medium. Important on slow applications that will not accept connections promptly. @@ -975,7 +993,7 @@ o Network (net/, drivers/net) it is no longer needed. Perhaps there should be a delayed call to unlink() (using a watchdog or the work queue). If the driver is re-opened, the delayed unlink could be - cancelled? Needs more thought. + canceled? Needs more thought. NOTE: This is not an issue for Unix domain streams sockets: The end-of-life of the FIFO is well determined when sockets are disconnected and support for that case is fully implemented. @@ -1020,7 +1038,7 @@ o USB (drivers/usbdev, drivers/usbhost) that involves delays. This needs to be redesigned to eliminate these delays. See logic conditioned on CONFIG_USBMSC_RACEWAR. - If queuing of stall requests is supported by DCD then this workaround + If queuing of stall requests is supported by the DCD then this workaround is not required. In this case, (1) the stall is not sent until all write requests preceding the stall request are sent, (2) the stall is sent, and then after the stall is cleared, (3) all write requests @@ -1135,7 +1153,7 @@ o USB (drivers/usbdev, drivers/usbhost) Priority: Medium-Low Title: USB CDC/ACM HOST CLASS DRIVER - Desciption: A CDC/ACM host class driver has been added. This has been + Description: A CDC/ACM host class driver has been added. This has been testing by running the USB CDC/ACM host on an Olimex LPC1766STK and using the configs/stm3210e-eval/usbserial configuration (using the CDC/ACM device side driver). There @@ -1374,7 +1392,7 @@ o File system / Generic drivers (fs/, drivers/) Priority: Medium Title: UNIFIED DESCRIPTOR REPRESENTATION - Descripton: There are two separate ranges of descriptors for file and + Description: There are two separate ranges of descriptors for file and socket descriptors: if a descriptor is in one range then it is recognized as a file descriptor; if it is in another range then it is recognized as a socket descriptor. These separate @@ -1410,7 +1428,7 @@ o File system / Generic drivers (fs/, drivers/) Status: Open Priority: Low - Title: FAT LONG FILENAME COMPATIBILTY + Title: FAT LONG FILENAME COMPATIBILITY Description: Recently there have been reports that file with long file names created by NuttX don't have long file names when viewed on Windows. The long file name support has been around for a @@ -1423,7 +1441,7 @@ o File system / Generic drivers (fs/, drivers/) Description: I have seen cases where (1) long file names are enabled, but (2) a short file name is created like: - nsh> echo "This is another thest" >/mnt/sdcard/another.txt + nsh> echo "This is another test" >/mnt/sdcard/another.txt But then on subsequent 'ls' operations, the file does not appear: @@ -1472,7 +1490,7 @@ o File system / Generic drivers (fs/, drivers/) 4) When comparing the checksum in the long file name entry with the checksum of the short file name, the - checksum fails and the entire directlry sequence is + checksum fails and the entire directory sequence is ignored by readder() logic. This the file does not appear in the 'ls'. @@ -1539,7 +1557,7 @@ o Graphics subsystem (graphics/) Priority: Low, the need has not yet arisen. Title: PER-WINDOW FRAMEBUFFERS - Description: One of the most awkard things to handle in the NX windowing + Description: One of the most awkward things to handle in the NX windowing system is the re-draw callback. This is difficult because it requires ad hoc, custom logic to be able to do the redrawing in most cases. @@ -1567,26 +1585,6 @@ o Graphics subsystem (graphics/) Priority: Low, not a serious issue but worth noting. There is no plan to change this behavior. -o Pascal Add-On (pcode/) - ^^^^^^^^^^^^^^^^^^^^^^ - - Title: P-CODES IN MEMORY UNTESTED - Description: Need APIs to verify execution of P-Code from memory buffer. - Status: Open - Priority: Low - - Title: SMALLER LOADER AND OBJECT FORMAT - Description: Loader and object format may be too large for some small - memory systems. Consider ways to reduce memory footprint. - Status: Open - Priority: Medium - - Title: PDBG - Description: Move the the pascal p-code debugger into the NuttX apps/ tree - where it can be used from the NSH command line. - Status: Open - Priority: Low - o Build system ^^^^^^^^^^^^ @@ -1603,21 +1601,25 @@ o Build system Status: Open Priority: Low. + Title: NATIVE WINDOWS BUILD BROKEN + Description: The way that apps/ no generates Kmenu files depends on changes added + to apps/tools/mkkconfig.sh. Similar changes need to be made to + apps/tools/mkkconfig.bat to restore the Windows Native build. + UPDATE: The mkkconfig.bat script has been updated and appears to work. + A native build has still not been attempted and there could likely be + issues the carriage returns in Kconfig files. There are also some + issues the interpreters/ficl and bas directories during 'make menuconfig' + that still need to be investigated. + Status: Open + Priority: Low, since I am not aware of anyone using the Windows Native build. + But, of course, very high if you want to use it. + o Other drivers (drivers/) ^^^^^^^^^^^^^^^^^^^^^^^^ o Linux/Cywgin simulation (arch/sim) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ - Title: SIMULATOR NETWORKING SUPPORT - Description: I never did get networking to work on the sim Linux target. On Linux, - it tries to use the tap device (/dev/net/tun) to emulate an Ethernet - NIC, but I never got it correctly integrated with the NuttX networking. - NOTE: On Cygwin, the build uses the Cygwin WPCAP library and is, at - least, partially functional (it has never been rigorously tested). - Status: Open - Priority: Low (unless you want to test networking features on the simulation). - Title: SIMULATOR HAS NO INTERRUPTS (NON-PREMPTIBLE) Description: The current simulator implementation is has no interrupts and, hence, is non-preemptible. Also, without simulated interrupt, there can @@ -1765,7 +1767,7 @@ o ARM (arch/arm/) But this has not been proven to be a solution. - UPDATE: Other ARM architectures have a similer issue. + UPDATE: Other ARM architectures have a similar issue. Status: Open Priority: Low. The conditions of continuous interrupts is really the problem. @@ -1823,7 +1825,7 @@ o NuttShell (NSH) (apps/nshlib) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ Title: IFCONFIG AND MULTIPLE NETWORK INTERFACES - Descripton: The ifconfig command will not behave correctly if an interface + Description: The ifconfig command will not behave correctly if an interface is provided and there are multiple interfaces. It should only show status for the single interface on the command line; it will still show status for all interfaces. @@ -1848,6 +1850,26 @@ o System libraries apps/system (apps/system) Priority: Low (unless you are using mixed C-buffered I/O with readline and fgetc, for example). +o Pascal Add-On (pcode/) + ^^^^^^^^^^^^^^^^^^^^^^ + + Title: P-CODES IN MEMORY UNTESTED + Description: Need APIs to verify execution of P-Code from memory buffer. + Status: Open + Priority: Low + + Title: SMALLER LOADER AND OBJECT FORMAT + Description: Loader and object format may be too large for some small + memory systems. Consider ways to reduce memory footprint. + Status: Open + Priority: Medium + + Title: PDBG + Description: Move the the pascal p-code debugger into the NuttX apps/ tree + where it can be used from the NSH command line. + Status: Open + Priority: Low + o Other Applications & Tests (apps/examples/) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/arch/README.txt b/arch/README.txt index df34133df9c..114f2f6f1e7 100644 --- a/arch/README.txt +++ b/arch/README.txt @@ -134,6 +134,8 @@ src/Makefile Supported Architectures ^^^^^^^^^^^^^^^^^^^^^^^ +NOTE: nuttx/Documentation/NuttX.html for current information about the +state of these MCU ports. arch/sim - Linux/Cygwin simulation A user-mode port of NuttX to the x86 Linux platform is available. @@ -145,135 +147,68 @@ arch/arm - ARM-based micro-controllers This directory holds common ARM architectures. At present, this includes the following subdirectories: - arch/arm/include and arch/arm/src/common - Common ARM/Cortex-M3 logic. + Architecture Support + arch/arm/include and arch/arm/src/common + arch/arm/src/arm and arch/arm/include/arm + arch/arm/src/armv7-a and arch/arm/include/armv7-a + arch/arm/src/armv7-m and arch/arm/include/armv7-m + arch/arm/src/armv7-r and arch/arm/include/armv7-4 - arch/arm/src/arm and arch/arm/include/arm - Common ARM-specific logic - - arch/arm/src/armv7-m and arch/arm/include/armv7-m - Common ARMv7-M logic (Cortex-M3 and Cortex-M4) - - arch/arm/include/c5471 and arch/arm/src/c5471 - TI TMS320C5471 (also called TMS320DM180 or just C5471). - NuttX operates on the ARM7 of this dual core processor. This port - complete, verified, and included in the NuttX release 0.1.1. - - arch/arm/include/calypso and arch/arm/src/calypso - TI "Calypso" MCU used in various cell phones (and, in particular, - by the Osmocom-bb project). Like the c5471, NuttX operates on the - ARM7 of this dual core processor. This port was contributed by - Denis Carilki and includes the work of Denis, Alan Carvalho de Assis, - and Stefan Richter. Calypso support first appeared in NuttX-6.17. - - arch/arm/include/dm320 and arch/arm/src/dm320 - TI TMS320DM320 (also called just DM320). - NuttX operates on the ARM9EJS of this dual core processor. This port - complete, verified, and included in the NuttX release 0.2.1. - - arch/arm/include/imx and arch/arm/src/imx - Freescale MC9328MX1 or i.MX1. This port uses the Freescale MX1ADS - development board with a GNU arm-elf toolchain* under either Linux or Cygwin. - STATUS: This port has stalled because of development tool issues. Coding - is complete on the basic port (timer, serial console, SPI). - - arch/arm/include/lm and arch/arm/src/lm - These directories contain support for the Luminary LM3S/4F family. The - initial, release of this port was included in NuttX version 0.4.6. The - current port includes timer, serial console, Ethernet, SSI, and microSD - support. There are working configurations the NuttX OS test, to run the - NuttShell (NSH), the NuttX networking test, and the uIP web server. - - arch/arm/include/lpc214x and arch/arm/src/lpc214x - These directories provide support for NXP LPC214x family of - ARM7TDMI processors. This port boots and passes the OS test (examples/ostest). - The port is complete and verifed. As of NuttX 0.3.17, the port includes: - timer interrupts, serial console, USB driver, and SPI-based MMC/SD card - support. A verifed NuttShell (NSH) configuration is also available. - - arch/arm/include/lpc2378 and arch/arm/src/lpc2378. - NXP LPC2378. Support is provided for the NXP LPC2378 MCU. This port was - contributed by Rommel Marcelo is was first released in NuttX-5.3. - STATUS: This port boots and passes the OS test (examples/ostest) and - includes a working implementation of the NuttShell (NSH). The port is - complete and verified. As of NuttX 5.3, the port includes only basic - timer interrupts and serial console support. - - arch/arm/include/lpc31xx and arch/arm/src/lpc31xx - These directories provide support for NXP LPC31xx family of - ARM926EJ-S processors. The port for the NXP LPC3131 was first - released in NuttX-5.1 (but was not functional until NuttX-5.2). - STATUS: The basic EA3131 port is complete and verified in NuttX-5.2 - This basic port includes basic boot-up, serial console, and timer - interrupts. This port was extended in NuttX 5.3 with a USB high - speed driver contributed by David Hewson. This port has been - verified using the NuttX OS test, USB serial and mass storage tests - and includes a working implementation of the NuttShell ((NSH)). - - This port was later extended to support additional members of the - LPC31xx family including, specifically, the LPC3152. - - arch/arm/include/sam3u and arch/arm/src/sam3u - Atmel AT91SAM3U. This port is for Atmel AT91SAM3U4E MCU. - STATUS: The basic AT91SAM3U port was released in NuttX version 5.1. - The basic port includes boot-up logic, interrupt driven serial - console, and system timer interrupts. That release passes the - NuttX OS test and is proven to have a valid OS implementation. A - onfiguration to support the NuttShell is also included. - - arch/arm/include/stm32 and arch/arm/src/stm32 - These directories contain support for the STMicro STM32 F1, F2, and - F4 families. - - STATUS: The basic STM32 F1 port was released in NuttX version 0.4.12. - and has continued to develop consistently over time. It now includes - support for the F2 and F4 families and a rich offering of peripheral - drivers. - - arch/arm/include/str71x and arch/arm/src/str71x - These directories provide support for the STMicro STR71x processors. - Coding is complete on the basic port (boot logic, system time, serial console), - but no testing has been performed due to some problems I am having with my - JTAG wiggler and OpenOCD on Linux. + MCU support + arch/arm/include/c5471 and arch/arm/src/c5471 + arch/arm/include/calypso and arch/arm/src/calypso + arch/arm/include/dm320 and arch/arm/src/dm320 + arch/arm/include/efm32 and arch/arm/src/efm32 + arch/arm/include/imx1 and arch/arm/src/imx1 + arch/arm/include/imx6 and arch/arm/src/imx6 + arch/arm/include/kinetis and arch/arm/src/kinetis + arch/arm/include/kl and arch/arm/src/kl + arch/arm/include/lpc11xx and arch/arm/src/lpc11xx + arch/arm/include/lpc17xx and arch/arm/src/lpc17xx + arch/arm/include/lpc214x and arch/arm/src/lpc214x + arch/arm/include/lpc2378 and arch/arm/src/lpc2378. + arch/arm/include/lpc31xx and arch/arm/src/lpc31xx + arch/arm/include/lpc43xx and arch/arm/src/lpc43xx + arch/arm/include/moxart and arch/arm/src/moxart + arch/arm/include/nuc1xx and arch/arm/src/nuc1xx + arch/arm/include/sam34 and arch/arm/src/sam34 + arch/arm/include/sama45 and arch/arm/src/sama5 + arch/arm/include/samdl and arch/arm/src/samdl + arch/arm/include/samv7 and arch/arm/src/samv7 + arch/arm/include/stm32 and arch/arm/src/stm32 + arch/arm/include/stm32f7 and arch/arm/src/stm32f7 + arch/arm/include/stm32l4 and arch/arm/src/stm32l4 + arch/arm/include/str71x and arch/arm/src/str71x + arch/arm/include/tiva and arch/arm/src/tiva + arch/arm/include/tms570 and arch/arm/src/tms570 arch/avr This directory is dedicated to ports to the Atmel AVR (8-bit) and AVR32 (32-bit) MCU families. STATUS: Under development. - arch/avr/include/avr and arch/avr/src/avr - Common support for all 8-bit AVR MCUs + Architecture Support + arch/avr/include/avr and arch/avr/src/avr + arch/avr/include/avr32 and arch/avr/src/avr32 - arch/avr/include/atmega and arch/avr/src/atmega - Support specifically for the AVR ATMega family (specifically only for - the ATMega128 at the moment). - - arch/avr/include/at90usb and arch/avr/src/at90usb - Support specifically for the AVR AT90USB646, 647, 1286, and 1287 family. - - arch/avr/include/avr32 and arch/avr/src/avr32 - Common support for all AVR32 MCUs - - arch/avr/include/at32uc3 and arch/avr/src/at32uc3 - Support specifically for the AT32UC3Bxxx family (specifically only for - the AT32UC3B0256 at the moment). + MCU support + arch/avr/include/atmega and arch/avr/src/atmega + arch/avr/include/at90usb and arch/avr/src/at90usb + arch/avr/include/at32uc3 and arch/avr/src/at32uc3 arch/hc This directory is dedicated to ports to the Freescale HC family. arch/arm/include/m9s12 and arch/arm/src/m9s12 - These directories provide support for the Freescale mc9s12x family. - STATUS: Fragments of this port were first released in nuttx-5.0 and - the port was "code-complete" as nuttx-5.18. However, the final - verification effort has been stalled because of higher priority tasks. arch/mips This directory is dedicated to ports to the MIPS family. - arch/mips/include/mips32 and arch/mips/src/mips32 - Common support for all MIPS32 architectures + Architecture Support + arch/mips/include/mips32 and arch/mips/src/mips32 - arch/mips/include/pic32mx and arch/mips/src/pic32mx - Support for all MicroChip PIC32MX architectures + MCU support + arch/mips/include/pic32mx and arch/mips/src/pic32mx + arch/mips/include/pic32mz and arch/mips/src/pic32mz arch/rgmp @@ -288,52 +223,42 @@ arch/rgmp arch/sh - SuperH and related Hitachi/Renesas microcontrollers - arch/sh/include and arch/sh/src/common - Common SuperH logic. + Architecture Support + arch/sh/include and arch/sh/src/common - arch/sh/include/shs and arch/sh/src/sh1 - Support for the SH-1 processor. + MCU support + arch/sh/include/m16c and arch/sh/src/m16c + arch/sh/include/sh1 and arch/sh/src/sh1 arch/x86 - Intel x86 architectures This directory holds related, 32- and 64-bit architectures from Intel. At present, this includes the following subdirectories: - arch/x86/include and arch/x86/src/common - Common x86 logic. + Architecture Support + arch/x86/include and arch/x86/src/common - arch/x86/include/i486 and arch/x86/src/i486 - These directories hold definitions and logic appropriate for any - instantiation of the 32-bit i486 architecture. - - arch/x86/include/qemu and arch/x86/src/qemu - This is the implementation of NuttX on the QEMU x86 simulation. + MCU support + arch/x86/include/i486 and arch/x86/src/i486 + arch/x86/include/qemu and arch/x86/src/qemu arch/z16 - ZiLOG 16-bit processors This directory holds related, 16-bit architectures from ZiLOG. At present, this includes the following subdirectories: - arch/z16/include and arch/z16/src/common - Common microcontroller logic. + Architecture Support + arch/z16/include and arch/z16/src/common - arch/z16/include/z16f and arch/z16/src/z16f - ZiLOG z16f Microcontroller. - STATUS: Released in nuttx-0.3.7. Fully functional other than issues - addressed in ${TOPDIR}/TODO. + MCU support + arch/z16/include/z16f and arch/z16/src/z16f arch/z80 - ZiLOG 8-bit microcontrollers This directory holds related, 8-bit architectures from ZiLOG. At present, this includes the following subdirectories: - arch/z80/include and arch/z80/src/common - Common microcontroller logic. + Architecture Support + arch/z80/include and arch/z80/src/common - arch/z80/include/z80 and arch/z80/src/z80 - Classic ZiLOG z80 Microcontroller. - STATUS: Functional with no known defects. There are still several - OS features that have not yet been tested (e.g., networking). - - arch/z80/include/z8 and arch/z80/src/z8 - ZiLOG Z8Encore! Microcontroller - - arch/z80/include/ez80 and arch/z80/src/ez80 - ZiLOG ez80 Acclaim! Microcontroller + MCU support + arch/z80/include/z80 and arch/z80/src/z80 + arch/z80/include/z8 and arch/z80/src/z8 + arch/z80/include/ez80 and arch/z80/src/ez80 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index fd960282a1d..6b6c046060d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -27,7 +27,7 @@ config ARCH_CHIP_C5471 bool "TMS320 C5471" select ARCH_ARM7TDMI select ARCH_HAVE_LOWVECTORS - select ARCH_HAVE_OTHER_UART + select OTHER_UART_SERIALDRIVER ---help--- TI TMS320 C5471, A180, or DA180 (ARM7TDMI) @@ -36,7 +36,7 @@ config ARCH_CHIP_CALYPSO select ARCH_ARM7TDMI select ARCH_HAVE_HEAP2 select ARCH_HAVE_LOWVECTORS - select ARCH_HAVE_OTHER_UART + select OTHER_UART_SERIALDRIVER select ARCH_HAVE_POWEROFF ---help--- TI Calypso-based cell phones (ARM7TDMI) diff --git a/arch/arm/include/lpc43xx/chip.h b/arch/arm/include/lpc43xx/chip.h index 56db6292937..4592117de18 100644 --- a/arch/arm/include/lpc43xx/chip.h +++ b/arch/arm/include/lpc43xx/chip.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/include/lpc43xx/chip.h * - * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -167,7 +167,7 @@ # warning "Data sheet and user manual are consistement for the LPC4320" # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -194,7 +194,7 @@ # warning "Data sheet and user manual are consistement for the LPC4320" # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 168Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (16*1024) /* 32Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -220,7 +220,7 @@ #elif defined(CONFIG_ARCH_CHIP_LPC4330FBD144) # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (72*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -246,7 +246,7 @@ #elif defined(CONFIG_ARCH_CHIP_LPC4330FET100) # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (72*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -272,7 +272,7 @@ #elif defined(CONFIG_ARCH_CHIP_LPC4330FET180) # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (72*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -298,7 +298,7 @@ #elif defined(CONFIG_ARCH_CHIP_LPC4330FET256) # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (72*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -322,9 +322,9 @@ # define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */ # undef LPC43_NADC12 /* No 12-bit ADC controllers */ #elif defined(CONFIG_ARCH_CHIP_LPC4337JBD144) -# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */ -# define LPC43_FLASH_BANKB_SIZE (512*1025) -# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/ +# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */ +# define LPC43_FLASH_BANKB_SIZE (512*1024) +# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -350,7 +350,7 @@ #elif defined(CONFIG_ARCH_CHIP_LPC4350FBD208) # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (72*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -376,7 +376,7 @@ #elif defined(CONFIG_ARCH_CHIP_LPC4350FET180) # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (72*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -402,7 +402,7 @@ #elif defined(CONFIG_ARCH_CHIP_LPC4350FET256) # define LPC43_FLASH_BANKA_SIZE (0) /* Flashless */ # define LPC43_FLASH_BANKB_SIZE (0) -# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM*/ +# define LPC43_LOCSRAM_BANK0_SIZE (128*1024) /* 200Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (72*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -426,9 +426,9 @@ # define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */ # undef LPC43_NADC12 /* No 12-bit ADC controllers */ #elif defined(CONFIG_ARCH_CHIP_LPC4353FBD208) -# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */ -# define LPC43_FLASH_BANKB_SIZE (256*1025) -# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/ +# define LPC43_FLASH_BANKA_SIZE (256*1024) /* 512Kb FLASH */ +# define LPC43_FLASH_BANKB_SIZE (256*1024) +# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -452,9 +452,9 @@ # define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */ # undef LPC43_NADC12 /* No 12-bit ADC controllers */ #elif defined(CONFIG_ARCH_CHIP_LPC4353FET180) -# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */ -# define LPC43_FLASH_BANKB_SIZE (256*1025) -# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/ +# define LPC43_FLASH_BANKA_SIZE (256*1024) /* 512Kb FLASH */ +# define LPC43_FLASH_BANKB_SIZE (256*1024) +# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -478,9 +478,9 @@ # define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */ # undef LPC43_NADC12 /* No 12-bit ADC controllers */ #elif defined(CONFIG_ARCH_CHIP_LPC4353FET256) -# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */ -# define LPC43_FLASH_BANKB_SIZE (256*1025) -# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/ +# define LPC43_FLASH_BANKA_SIZE (256*1024) /* 512Kb FLASH */ +# define LPC43_FLASH_BANKB_SIZE (256*1024) +# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -504,9 +504,9 @@ # define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */ # undef LPC43_NADC12 /* No 12-bit ADC controllers */ #elif defined(CONFIG_ARCH_CHIP_LPC4357FET180) -# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */ -# define LPC43_FLASH_BANKB_SIZE (512*1025) -# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/ +# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */ +# define LPC43_FLASH_BANKB_SIZE (512*1024) +# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -530,9 +530,9 @@ # define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */ # undef LPC43_NADC12 /* No 12-bit ADC controllers */ #elif defined(CONFIG_ARCH_CHIP_LPC4357FBD208) -# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */ -# define LPC43_FLASH_BANKB_SIZE (512*1025) -# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/ +# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */ +# define LPC43_FLASH_BANKB_SIZE (512*1024) +# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -556,9 +556,9 @@ # define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */ # undef LPC43_NADC12 /* No 12-bit ADC controllers */ #elif defined(CONFIG_ARCH_CHIP_LPC4357FET256) -# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */ -# define LPC43_FLASH_BANKB_SIZE (512*1025) -# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM*/ +# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */ +# define LPC43_FLASH_BANKB_SIZE (512*1024) +# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */ # define LPC43_LOCSRAM_BANK1_SIZE (40*1024) # define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ # define LPC43_AHBSRAM_BANK1_SIZE (0) @@ -632,6 +632,31 @@ # define LPC43_NDAC (1) /* One 10-bit DAC */ # define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels (per ADC)*/ # define LPC43_NADC12 (1) /* ONne 12-bit ADC controllers (ADCHS)*/ +#elif defined(CONFIG_ARCH_CHIP_LPC4337JET100) +# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */ +# define LPC43_FLASH_BANKB_SIZE (512*1024) +# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */ +# define LPC43_LOCSRAM_BANK1_SIZE (40*1024) +# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */ +# define LPC43_AHBSRAM_BANK1_SIZE (0) +# define LPC43_AHBSRAM_BANK2_SIZE (16*1024) +# define LPC43_EEPROM_SIZE (16*1024) /* 16Kb EEPROM */ +# define LPC43_NLCD (0) /* Has LCD controller */ +# define LPC43_ETHERNET (1) /* One Ethernet controller */ +# define LPC43_USB0 (1) /* Have USB0 (Host, Device, OTG) */ +# define LPC43_USB1 (1) /* Have USB1 (Host, Device) */ +# define LPC43_USB1_ULPI (0) /* Have USB1 (Host, Device) with ULPI I/F */ +# define LPC43_MCPWM (0) /* One PWM interface */ +# define LPC43_QEI (0) /* One Quadrature Encoder interface */ +# define LPC43_NUSARTS (4) /* Three USARTs + 1 UART */ +# define LPC43_NSSP (2) /* Two SSP controllers */ +# define LPC43_NTIMERS (4) /* Four Timers */ +# define LPC43_NI2C (2) /* Two I2C controllers */ +# define LPC43_NI2S (2) /* Two I2S controllers */ +# define LPC43_NCAN (2) /* Two CAN controllers */ +# define LPC43_NDAC (1) /* One 10-bit DAC */ +# define LPC43_NADC (2) /* Two 10-bit ADC controllers */ +# define LPC43_NADC_CHANNELS (4) /* Four ADC channels */ #else # error "Unsupported LPC43xx chip" #endif diff --git a/arch/arm/include/stm32/chip.h b/arch/arm/include/stm32/chip.h index 94e572b0ad2..e476bff892e 100644 --- a/arch/arm/include/stm32/chip.h +++ b/arch/arm/include/stm32/chip.h @@ -903,6 +903,43 @@ # define STM32_NRNG 0 /* No random number generator (RNG) */ # define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ +#elif defined(CONFIG_ARCH_CHIP_STM32F105RB) +# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */ +# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */ +# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */ +# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */ +# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ +# undef CONFIG_STM32_MEDIUMPLUSDENSITY /* STM32L15xxC w/ 32/256 Kbytes */ +# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */ +# undef CONFIG_STM32_VALUELINE /* STM32F100x */ +# define CONFIG_STM32_CONNECTIVITYLINE 1 /* STM32F105x and STM32F107x */ +# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */ +# undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */ +# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */ +# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx */ +# define STM32_NFSMC 1 /* FSMC */ +# define STM32_NATIM 1 /* One advanced timers TIM1 */ +# define STM32_NGTIM 4 /* 16-bit general timers TIM2-5 with DMA */ +# define STM32_NGTIMNDMA 0 /* No 16-bit general timers without DMA */ +# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */ +# define STM32_NDMA 2 /* DMA1-2 */ +# define STM32_NSPI 3 /* SPI1-3 */ +# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ +# define STM32_NUSART 5 /* USART1-3, UART 4-5 */ +# define STM32_NI2C 2 /* I2C1-2 */ +# define STM32_NCAN 2 /* CAN1-2 */ +# define STM32_NSDIO 0 /* No SDIO */ +# define STM32_NLCD 0 /* No LCD */ +# define STM32_NUSBOTG 1 /* USB OTG FS/HS */ +# define STM32_NGPIO 51 /* GPIOA-E */ +# define STM32_NADC 2 /* ADC1-2 */ +# define STM32_NDAC 2 /* DAC1-2 */ +# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */ +# define STM32_NCRC 1 /* CRC */ +# define STM32_NETHERNET 0 /* 100/100 Ethernet MAC */ +# define STM32_NRNG 0 /* No random number generator (RNG) */ +# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */ + #elif defined(CONFIG_ARCH_CHIP_STM32F107VC) # undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */ # undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */ @@ -1568,7 +1605,7 @@ # define STM32_NGTIMNDMA 3 /* 16-bit general timers TIM9-11 without DMA */ # define STM32_NBTIM 0 /* No basic timers */ # define STM32_NDMA 2 /* DMA1-2 with 8 streams each*/ -# define STM32_NSPI 4 /* SPI1-4 */ +# define STM32_NSPI 5 /* SPI1-5 */ # define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ # define STM32_NUSART 6 /* Actually only 3: USART1, 2 and 6 */ # define STM32_NI2C 3 /* I2C1-3 */ @@ -1606,7 +1643,7 @@ # define STM32_NGTIMNDMA 3 /* 16-bit general timers TIM9-11 without DMA */ # define STM32_NBTIM 0 /* No basic timers */ # define STM32_NDMA 2 /* DMA1-2 with 8 streams each*/ -# define STM32_NSPI 4 /* SPI1-4 */ +# define STM32_NSPI 5 /* SPI1-5 */ # define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */ # define STM32_NUSART 6 /* Actually only 3: USART1, 2 and 6 */ # define STM32_NI2C 3 /* I2C1-3 */ @@ -2430,7 +2467,7 @@ # if defined(CONFIG_ARCH_CHIP_STM32F469A) # define STM32_NETHERNET 0 /* No Ethernet MAC */ # elif defined(CONFIG_ARCH_CHIP_STM32F469I) || \ -# defined(CONFIG_ARCH_CHIP_STM32F469B) || \ + defined(CONFIG_ARCH_CHIP_STM32F469B) || \ defined(CONFIG_ARCH_CHIP_STM32F469N) # define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */ # endif diff --git a/arch/arm/include/stm32/stm32f10xxx_irq.h b/arch/arm/include/stm32/stm32f10xxx_irq.h index 3c62e1e2ea3..29f07b0fd88 100644 --- a/arch/arm/include/stm32/stm32f10xxx_irq.h +++ b/arch/arm/include/stm32/stm32f10xxx_irq.h @@ -120,7 +120,7 @@ # define STM32_IRQ_TIM5 (66) /* 50: TIM5 global interrupt */ # define STM32_IRQ_SPI3 (67) /* 51: SPI3 global interrupt */ # define STM32_IRQ_UART4 (68) /* 52: USART2 global interrupt */ -# define STM32_IRQ_UART5 (69) /* 53: USART5 global interrupt */ +# define STM32_IRQ_UART5 (69) /* 53: UART5 global interrupt */ # define STM32_IRQ_TIM6 (70) /* 54: TIM6 global interrupt */ # define STM32_IRQ_TIM7 (71) /* 55: TIM7 global interrupt */ # define STM32_IRQ_DMA2CH1 (72) /* 56: DMA2 Channel 1 global interrupt */ diff --git a/arch/arm/include/stm32f7/chip.h b/arch/arm/include/stm32f7/chip.h index 372bd1143f4..d30937541e8 100644 --- a/arch/arm/include/stm32f7/chip.h +++ b/arch/arm/include/stm32f7/chip.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/include/stm32f7/chip.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,99 +45,272 @@ /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ -/* STM32F745xx, STM32F746xx, and STM32F56xx. Differences between family members: +/* STM32F745xx, STM32F746xx, STM32F756xx, STM32F765xx, STM32F767xx, STM32F768xx, + * STM32F769xx, STM32F777xx and STM32F779xx Differences between family members: * - * ----------- ---------------- ----- -------- ------------ -------- - * PART PACKAGE GPIOs SPI/I2S ADC CHANNELS LCD-TFT? - * ----------- ---------------- ----- -------- ------------ -------- - * STM32F745Vx LQFP100 82 4/3 16 No - * STM32F745Zx WLCSP143/LQFP144 114 6/3 24 No - * STM32F745Ix UFBGA176/LQFP176 140 6/3 24 No - * STM32F745Bx LQFP208 168 6/3 24 No - * STM32F745Nx TFBGA216 68 6/3 24 No + * ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------ + * SPI ADC LCD + * PART PACKAGE GPIOs I2S CHAN TFT MIPI JPEG CAN ETH DFSDM CRYPTO FPU RAM L1 + * ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------ + * STM32F745Vx LQFP100 82 4/3 16 No No No 2 Yes No No SFPU (240+16+64) 4+4 + * STM32F745Zx WLCSP143/LQFP144 114 6/3 24 No No No 2 Yes No No SFPU (240+16+64) 4+4 + * STM32F745Ix UFBGA176/LQFP176 140 6/3 24 No No No 2 Yes No No SFPU (240+16+64) 4+4 + * STM32F745Bx LQFP208 168 6/3 24 No No No 2 Yes No No SFPU (240+16+64) 4+4 + * STM32F745Nx TFBGA216 68 6/3 24 No No No 2 Yes No No SFPU (240+16+64) 4+4 * - * STM32F746Vx LQFP100 82 4/3 16 Yes - * STM32F746Zx WLCSP143/LQFP144 114 6/3 24 Yes - * STM32F746Ix UFBGA176/LQFP176 140 6/3 24 Yes - * STM32F746Bx LQFP208 168 6/3 24 Yes - * STM32F746Nx TFBGA216 168 6/3 24 Yes + * STM32F746Vx LQFP100 82 4/3 16 Yes No No 2 Yes No No SFPU (240+16+64) 4+4 + * STM32F746Zx WLCSP143/LQFP144 114 6/3 24 Yes No No 2 Yes No No SFPU (240+16+64) 4+4 + * STM32F746Ix UFBGA176/LQFP176 140 6/3 24 Yes No No 2 Yes No No SFPU (240+16+64) 4+4 + * STM32F746Bx LQFP208 168 6/3 24 Yes No No 2 Yes No No SFPU (240+16+64) 4+4 + * STM32F746Nx TFBGA216 168 6/3 24 Yes No No 2 Yes No No SFPU * - * STM32F756Vx LQFP100 82 4/3 16 Yes - * STM32F756Zx WLCSP143/LQFP144 114 6/3 24 Yes - * STM32F756Ix UFBGA176/LQFP176 140 6/3 24 Yes - * STM32F756Bx LQFP208 168 6/3 24 Yes - * STM32F756Nx TFBGA216 168 6/3 24 Yes - * ----------- ---------------- ----- -------- ------------ -------- + * STM32F756Vx LQFP100 82 4/3 16 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4 + * STM32F756Zx WLCSP143/LQFP144 114 6/3 24 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4 + * STM32F756Ix UFBGA176/LQFP176 140 6/3 24 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4 + * STM32F756Bx LQFP208 168 6/3 24 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4 + * STM32F756Nx TFBGA216 168 6/3 24 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4 + * + * STM32F765Vx LQFP100 82 4/3 16 No No No 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F765Zx WLCSP143/LQFP144 114 6/3 24 No No No 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F765Ix UFBGA176/LQFP176 140 6/3 24 No No No 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F765Bx LQFP208 168 6/3 24 No No No 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F765Nx TFBGA216 168 6/3 24 No No No 3 Yes Yes No DFPU (368+16+128) 16+16 + * + * STM32F767Vx LQFP100 82 4/3 16 Yes No Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F767Zx WLCSP143/LQFP144 114 6/3 24 Yes No Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F767Ix UFBGA176/LQFP176 132 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F767Bx LQFP208 168 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F767Nx TFBGA216 159 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * + * STM32F768Ax WLCSP180 129 6/3 24 Yes Yes Yes 3 No Yes No DFPU (368+16+128) 16+16 + * + * STM32F769Vx LQFP100 82 4/3 16 Yes No Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F769Zx LQFP144 114 6/3 24 Yes No Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F769Ix UFBGA176/LQFP176 132 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F769Bx LQFP208 168 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * STM32F769Nx TFBGA216 159 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16 + * + * STM32F769Ax WLCSP180 129 6/3 24 Yes Yes Yes 3 No Yes No DFPU (368+16+128) 16+16 + * + * STM32F777Vx LQFP100 82 4/3 16 Yes No Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16 + * STM32F777Zx LQFP144 114 6/3 24 Yes No Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16 + * STM32F777Ix UFBGA176/LQFP176 132 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16 + * STM32F777Bx LQFP208 159 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16 + * STM32F777Nx TFBGA216 159 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16 + * + * STM32F778Ax WLCSP180 129 6/3 24 Yes Yes Yes 3 No Yes Yes DFPU (368+16+128) 16+16 + * + * STM32F779Ix UFBGA176/LQFP176 132 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16 + * STM32F779Bx LQFP208 159 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16 + * STM32F779Nx TFBGA216 159 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16 + + * STM32F779Ax WLCSP180 129 6/3 24 Yes Yes Yes 3 No Yes Yes DFPU (368+16+128) 16+16 + * ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------ * * Parts STM32F74xxE have 512Kb of FLASH * Parts STM32F74xxG have 1024Kb of FLASH + * Parts STM32F74xxI have 2048Kb of FLASH + * + * The correct FLASH size will be set CONFIG_STM32F7_FLASH_CONFIG_x or overridden + * with CONFIG_STM32F7_FLASH_OVERRIDE_x * - * The correct FLASH size must be set with a CONFIG_STM32F7_FLASH_*KB - * selection. */ - -#if defined(CONFIG_ARCH_CHIP_STM32F745) || defined(CONFIG_ARCH_CHIP_STM32F746) || \ - defined(CONFIG_ARCH_CHIP_STM32F756) - -#if defined(CONFIG_ARCH_CHIP_STM32F745) -# define STM32F7_STM32F745XX 1 /* STM32F745xx family */ -# undef STM32F7_STM32F746XX /* Not STM32F746xx family */ -# undef STM32F7_STM32F756XX /* Not STM32F756xx family */ - -# define STM32F7_NLCDTFT 0 /* No LCD-TFT */ - -#elif defined(CONFIG_ARCH_CHIP_STM32F746) - -# undef STM32F7_STM32F745XX /* Not STM32F745xx family */ -# define STM32F7_STM32F746XX 1 /* STM32F746xx family */ -# undef STM32F7_STM32F756XX /* Not STM32F756xx family */ - -# define STM32F7_NLCDTFT 1 /* One LCD-TFT */ - -#else /* if defined(CONFIG_ARCH_CHIP_STM32F746) */ - -# undef STM32F7_STM32F745XX /* Not STM32F745xx family */ -# undef STM32F7_STM32F746XX /* Not STM32F746xx family */ -# define STM32F7_STM32F756XX 1 /* STM32F756xx family */ - -# define STM32F7_NLCDTFT 1 /* One LCD-TFT */ +#if defined(CONFIG_ARCH_CHIP_STM32F745VG) || \ + defined(CONFIG_ARCH_CHIP_STM32F745VE) || \ + defined(CONFIG_ARCH_CHIP_STM32F745IG) || \ + defined(CONFIG_ARCH_CHIP_STM32F745IE) || \ + defined(CONFIG_ARCH_CHIP_STM32F745ZE) || \ + defined(CONFIG_ARCH_CHIP_STM32F745ZG) || \ + defined(CONFIG_ARCH_CHIP_STM32F746BG) || \ + defined(CONFIG_ARCH_CHIP_STM32F746VG) || \ + defined(CONFIG_ARCH_CHIP_STM32F746VE) || \ + defined(CONFIG_ARCH_CHIP_STM32F746BE) || \ + defined(CONFIG_ARCH_CHIP_STM32F746ZG) || \ + defined(CONFIG_ARCH_CHIP_STM32F746IE) || \ + defined(CONFIG_ARCH_CHIP_STM32F746NG) || \ + defined(CONFIG_ARCH_CHIP_STM32F746NE) || \ + defined(CONFIG_ARCH_CHIP_STM32F746ZE) || \ + defined(CONFIG_ARCH_CHIP_STM32F746IG) || \ + defined(CONFIG_ARCH_CHIP_STM32F756NG) || \ + defined(CONFIG_ARCH_CHIP_STM32F756BG) || \ + defined(CONFIG_ARCH_CHIP_STM32F756IG) || \ + defined(CONFIG_ARCH_CHIP_STM32F756VG) || \ + defined(CONFIG_ARCH_CHIP_STM32F756ZG) || \ + defined(CONFIG_ARCH_CHIP_STM32F765NI) || \ + defined(CONFIG_ARCH_CHIP_STM32F765VI) || \ + defined(CONFIG_ARCH_CHIP_STM32F765VG) || \ + defined(CONFIG_ARCH_CHIP_STM32F765BI) || \ + defined(CONFIG_ARCH_CHIP_STM32F765NG) || \ + defined(CONFIG_ARCH_CHIP_STM32F765ZG) || \ + defined(CONFIG_ARCH_CHIP_STM32F765ZI) || \ + defined(CONFIG_ARCH_CHIP_STM32F765IG) || \ + defined(CONFIG_ARCH_CHIP_STM32F765BG) || \ + defined(CONFIG_ARCH_CHIP_STM32F765II) || \ + defined(CONFIG_ARCH_CHIP_STM32F767NG) || \ + defined(CONFIG_ARCH_CHIP_STM32F767IG) || \ + defined(CONFIG_ARCH_CHIP_STM32F767VG) || \ + defined(CONFIG_ARCH_CHIP_STM32F767ZG) || \ + defined(CONFIG_ARCH_CHIP_STM32F767NI) || \ + defined(CONFIG_ARCH_CHIP_STM32F767VI) || \ + defined(CONFIG_ARCH_CHIP_STM32F767BG) || \ + defined(CONFIG_ARCH_CHIP_STM32F767ZI) || \ + defined(CONFIG_ARCH_CHIP_STM32F767II) || \ + defined(CONFIG_ARCH_CHIP_STM32F769BI) || \ + defined(CONFIG_ARCH_CHIP_STM32F769II) || \ + defined(CONFIG_ARCH_CHIP_STM32F769BG) || \ + defined(CONFIG_ARCH_CHIP_STM32F769NI) || \ + defined(CONFIG_ARCH_CHIP_STM32F769AI) || \ + defined(CONFIG_ARCH_CHIP_STM32F769NG) || \ + defined(CONFIG_ARCH_CHIP_STM32F769IG) || \ + defined(CONFIG_ARCH_CHIP_STM32F777ZI) || \ + defined(CONFIG_ARCH_CHIP_STM32F777VI) || \ + defined(CONFIG_ARCH_CHIP_STM32F777NI) || \ + defined(CONFIG_ARCH_CHIP_STM32F777BI) || \ + defined(CONFIG_ARCH_CHIP_STM32F777II) || \ + defined(CONFIG_ARCH_CHIP_STM32F778AI) || \ + defined(CONFIG_ARCH_CHIP_STM32F779II) || \ + defined(CONFIG_ARCH_CHIP_STM32F779NI) || \ + defined(CONFIG_ARCH_CHIP_STM32F779BI) || \ + defined(CONFIG_ARCH_CHIP_STM32F779AI) +#else +# error STM32 F7 chip not identified #endif -# define STM32F7_SRAM1_SIZE (240*1024) /* 240Kb SRAM1 on AHB bus Matrix */ -# define STM32F7_SRAM2_SIZE (16*1024) /* 16Kb SRAM2 on AHB bus Matrix */ -# define STM32F7_DTCM_SRAM_SIZE (64*1024) /* 64Kb DTCM SRAM on TCM inerface */ -# define STM32F7_ITCM_SRAM_SIZE (16*1024) /* 16Kb ITCM SRAM on TCM inerface */ +/* Size SRAM */ + +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) +# define STM32F7_SRAM1_SIZE (240*1024) /* 240Kb SRAM1 on AHB bus Matrix */ +# define STM32F7_SRAM2_SIZE (16*1024) /* 16Kb SRAM2 on AHB bus Matrix */ +# if defined(CONFIG_ARMV7M_HAVE_DTCM) +# define STM32F7_DTCM_SRAM_SIZE (64*1024) /* 64Kb DTCM SRAM on TCM interface */ +# else +# define STM32F7_DTCM_SRAM_SIZE (0) /* No DTCM SRAM on TCM interface */ +# endif +# if defined(CONFIG_ARMV7M_HAVE_ITCM) +# define STM32F7_ITCM_SRAM_SIZE (16*1024) /* 16Kb ITCM SRAM on TCM interface */ +# else +# define STM32F7_ITCM_SRAM_SIZE (0) /* No ITCM SRAM on TCM interface */ +# endif +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77X) +# define STM32F7_SRAM1_SIZE (368*1024) /* 368Kb SRAM1 on AHB bus Matrix */ +# define STM32F7_SRAM2_SIZE (16*1024) /* 16Kb SRAM2 on AHB bus Matrix */ +# if defined(CONFIG_ARMV7M_HAVE_DTCM) +# define STM32F7_DTCM_SRAM_SIZE (128*1024) /* 128Kb DTCM SRAM on TCM interface */ +# else +# define STM32F7_DTCM_SRAM_SIZE (0) /* No DTCM SRAM on TCM interface */ +# endif +# if defined(CONFIG_ARMV7M_HAVE_ITCM) +# define STM32F7_ITCM_SRAM_SIZE (16*1024) /* 16Kb ITCM SRAM on TCM interface */ +# else +# define STM32F7_ITCM_SRAM_SIZE (0) /* No ITCM SRAM on TCM interface */ +# endif +#else +# error STM32 F7 chip Family not identified +#endif + +/* Common to all Family members */ -# define STM32F7_NFSMC 1 /* Have FSMC memory controller */ -# define STM32F7_NETHERNET 1 /* 100/100 Ethernet MAC */ # define STM32F7_NATIM 2 /* Two advanced timers TIM1 and 8 */ # define STM32F7_NGTIM32 2 /* 32-bit general timers TIM2 and 5 with DMA */ # define STM32F7_NGTIM16 2 /* 16-bit general timers TIM3 and 4 with DMA */ # define STM32F7_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */ # define STM32F7_NBTIM 2 /* Two basic timers, TIM6-7 */ -# define STM32F7_NRNG 1 /* Random number generator (RNG) */ # define STM32F7_NUART 4 /* UART 4-5 and 7-8 */ # define STM32F7_NUSART 4 /* USART1-3 and 6 */ -# define STM32F7_NSPI 6 /* SPI1-6 (Except V series) */ # define STM32F7_NI2S 3 /* I2S1-2 (multiplexed with SPI1-3) */ # define STM32F7_NI2C 4 /* I2C1-4 */ # define STM32F7_NUSBOTGFS 1 /* USB OTG FS */ # define STM32F7_NUSBOTGHS 1 /* USB OTG HS */ -# define STM32F7_NCAN 2 /* CAN1-2 */ # define STM32F7_NSAI 2 /* SAI1-2 */ # define STM32F7_NSPDIFRX 4 /* 4 SPDIFRX inputs */ -# define STM32F7_NSDMMC 1 /* SDMMC interface */ -# define STM32F7_NDCMI 1 /* Digital camera interface (DCMI) */ # define STM32F7_NDMA 2 /* DMA1-2 */ -# define STM32F7_NDMA2D 1 /* DChrom-ART Acceleratorâ„¢ (DMA2D) */ # define STM32F7_NGPIO 11 /* 11 GPIO ports, GPIOA-K */ # define STM32F7_NADC 3 /* 12-bit ADC1-3, 24 channels *except V series) */ # define STM32F7_NDAC 2 /* 12-bit DAC1-2 */ # define STM32F7_NCAPSENSE 0 /* No capacitive sensing channels */ # define STM32F7_NCRC 1 /* CRC */ +/* TBD FPU Configuration */ + +#if defined(CONFIG_ARCH_HAVE_FPU) #else -# error STM32 F7 chip not identified +#endif + +#if defined(CONFIG_ARCH_HAVE_DPFPU) +#else +#endif + +/* Diversification based on Family and package */ + +#if defined(CONFIG_STM32F7_HAVE_FSMC) +# define STM32F7_NFSMC 1 /* Have FSMC memory controller */ +#else +# define STM32F7_NFSMC 0 /* No FSMC memory controller */ +#endif +#if defined(CONFIG_STM32F7_HAVE_ETHRNET) +# define STM32F7_NETHERNET 1 /* 100/100 Ethernet MAC */ +#else +# define STM32F7_NETHERNET 0 /* No 100/100 Ethernet MAC */ +#endif +#if defined(CONFIG_STM32F7_HAVE_RNG) +# define STM32F7_NRNG 1 /* Random number generator (RNG) */ +#else +# define STM32F7_NRNG 0 /* No Random number generator (RNG) */ +#endif +#if defined(CONFIG_STM32F7_HAVE_SPI5) && defined(CONFIG_STM32F7_HAVE_SPI6) +# define STM32F7_NSPI 6 /* SPI1-6 (Except V series) */ +#else +# define STM32F7_NSPI 4 /* SPI1-4 V series */ +#endif +#if defined(CONFIG_STM32F7_HAVE_SDMMC2) +# define STM32F7_NSDMMC 2 /* 2 SDMMC interfaces */ +#else +# define STM32F7_NSDMMC 1 /* 1 SDMMC interface */ +#endif +#if defined(CONFIG_STM32F7_HAVE_CAN3) +# define STM32F7_NCAN 3 /* CAN1-3 */ +#else +# define STM32F7_NCAN 2 /* CAN1-2 */ +#endif +#if defined(CONFIG_STM32F7_HAVE_DCMI) +# define STM32F7_NDCMI 1 /* Digital camera interface (DCMI) */ +#else +# define STM32F7_NDCMI 0 /* No Digital camera interface (DCMI) */ +#endif +#if defined(CONFIG_STM32F7_HAVE_DSIHOST) +# define STM32F7_NDSIHOST 1 /* Have MIPI DSI Host */ +#else +# define STM32F7_NDSIHOST 0 /* No MIPI DSI Host */ +#endif +#if defined (CONFIG_STM32F7_HAVE_LTDC) +# define STM32F7_NLCDTFT 1 /* One LCD-TFT */ +#else +# define STM32F7_NLCDTFT 0 /* No LCD-TFT */ +#endif +#if defined(CONFIG_STM32F7_HAVE_DMA2D) +# define STM32F7_NDMA2D 0 /* No DChrom-ART Acceleratorâ„¢ (DMA2D) */ +#else +# define STM32F7_NDMA2D 1 /* DChrom-ART Acceleratorâ„¢ (DMA2D) */ +#endif +#if defined(CONFIG_STM32F7_HAVE_JPEG) +#define STM32F7_NJPEG 1 /* One JPEG Converter */ +#else +#define STM32F7_NJPEG 0 /* No JPEG Converter */ +#endif +#if defined(CONFIG_STM32F7_HAVE_CRYP) +#define STM32F7_NCRYP 1 /* One CRYP engine */ +#else +#define STM32F7_NCRYP 0 /* No CRYP engine */ +#endif +#if defined(CONFIG_STM32F7_HAVE_HASH) +#define STM32F7_NHASH 1 /* One HASH engine */ +#else +#define STM32F7_NHASH 0 /* No HASH engine */ +#endif +#if defined(CONFIG_STM32F7_HAVE_DFSDM) +#define STM32F7_NDFSDM 4 /* One set of 4 Digital filters */ +#else +#define STM32F7_NDFSDM 0 /* No Digital filters */ #endif /* NVIC priority levels *************************************************************/ diff --git a/arch/arm/include/stm32f7/irq.h b/arch/arm/include/stm32f7/irq.h index 5a5c7108036..205d06b6440 100644 --- a/arch/arm/include/stm32f7/irq.h +++ b/arch/arm/include/stm32f7/irq.h @@ -78,6 +78,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include #else # error "Unsupported STM32 F7 chip" #endif diff --git a/arch/arm/include/stm32f7/stm32f76xx77xx_irq.h b/arch/arm/include/stm32f7/stm32f76xx77xx_irq.h new file mode 100644 index 00000000000..6c0461f9ef2 --- /dev/null +++ b/arch/arm/include/stm32f7/stm32f76xx77xx_irq.h @@ -0,0 +1,215 @@ +/**************************************************************************************************** + * arch/arm/include/stm32f7/stm32f76xx77xx_irq.h.h + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly through arch/irq.h */ + +#ifndef __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H +#define __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ + +/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to bits in the + * NVIC. This does, however, waste several words of memory in the IRQ to handle mapping tables. + * + * Processor Exceptions (vectors 0-15). These common definitions can be found in the file + * nuttx/arch/arm/include/stm32f7/irq.h which includes this file + * + * External interrupts (vectors >= 16) + */ + +#define STM32_IRQ_WWDG (STM32_IRQ_FIRST+0) /* 0: Window Watchdog interrupt */ +#define STM32_IRQ_PVD (STM32_IRQ_FIRST+1) /* 1: PVD through EXTI Line detection interrupt */ +#define STM32_IRQ_TAMPER (STM32_IRQ_FIRST+2) /* 2: Tamper and time stamp interrupts */ +#define STM32_IRQ_TIMESTAMP (STM32_IRQ_FIRST+2) /* 2: Tamper and time stamp interrupts */ +#define STM32_IRQ_RTC_WKUP (STM32_IRQ_FIRST+3) /* 3: RTC global interrupt */ +#define STM32_IRQ_FLASH (STM32_IRQ_FIRST+4) /* 4: Flash global interrupt */ +#define STM32_IRQ_RCC (STM32_IRQ_FIRST+5) /* 5: RCC global interrupt */ +#define STM32_IRQ_EXTI0 (STM32_IRQ_FIRST+6) /* 6: EXTI Line 0 interrupt */ +#define STM32_IRQ_EXTI1 (STM32_IRQ_FIRST+7) /* 7: EXTI Line 1 interrupt */ +#define STM32_IRQ_EXTI2 (STM32_IRQ_FIRST+8) /* 8: EXTI Line 2 interrupt */ +#define STM32_IRQ_EXTI3 (STM32_IRQ_FIRST+9) /* 9: EXTI Line 3 interrupt */ +#define STM32_IRQ_EXTI4 (STM32_IRQ_FIRST+10) /* 10: EXTI Line 4 interrupt */ +#define STM32_IRQ_DMA1S0 (STM32_IRQ_FIRST+11) /* 11: DMA1 Stream 0 global interrupt */ +#define STM32_IRQ_DMA1S1 (STM32_IRQ_FIRST+12) /* 12: DMA1 Stream 1 global interrupt */ +#define STM32_IRQ_DMA1S2 (STM32_IRQ_FIRST+13) /* 13: DMA1 Stream 2 global interrupt */ +#define STM32_IRQ_DMA1S3 (STM32_IRQ_FIRST+14) /* 14: DMA1 Stream 3 global interrupt */ +#define STM32_IRQ_DMA1S4 (STM32_IRQ_FIRST+15) /* 15: DMA1 Stream 4 global interrupt */ +#define STM32_IRQ_DMA1S5 (STM32_IRQ_FIRST+16) /* 16: DMA1 Stream 5 global interrupt */ +#define STM32_IRQ_DMA1S6 (STM32_IRQ_FIRST+17) /* 17: DMA1 Stream 6 global interrupt */ +#define STM32_IRQ_ADC (STM32_IRQ_FIRST+18) /* 18: ADC1, ADC2, and ADC3 global interrupt */ +#define STM32_IRQ_CAN1TX (STM32_IRQ_FIRST+19) /* 19: CAN1 TX interrupts */ +#define STM32_IRQ_CAN1RX0 (STM32_IRQ_FIRST+20) /* 20: CAN1 RX0 interrupts */ +#define STM32_IRQ_CAN1RX1 (STM32_IRQ_FIRST+21) /* 21: CAN1 RX1 interrupt */ +#define STM32_IRQ_CAN1SCE (STM32_IRQ_FIRST+22) /* 22: CAN1 SCE interrupt */ +#define STM32_IRQ_EXTI95 (STM32_IRQ_FIRST+23) /* 23: EXTI Line[9:5] interrupts */ +#define STM32_IRQ_TIM1BRK (STM32_IRQ_FIRST+24) /* 24: TIM1 Break interrupt */ +#define STM32_IRQ_TIM9 (STM32_IRQ_FIRST+24) /* 24: TIM9 global interrupt */ +#define STM32_IRQ_TIM1UP (STM32_IRQ_FIRST+25) /* 25: TIM1 Update interrupt */ +#define STM32_IRQ_TIM10 (STM32_IRQ_FIRST+25) /* 25: TIM10 global interrupt */ +#define STM32_IRQ_TIM1TRGCOM (STM32_IRQ_FIRST+26) /* 26: TIM1 Trigger and Commutation interrupts */ +#define STM32_IRQ_TIM11 (STM32_IRQ_FIRST+26) /* 26: TIM11 global interrupt */ +#define STM32_IRQ_TIM1CC (STM32_IRQ_FIRST+27) /* 27: TIM1 Capture Compare interrupt */ +#define STM32_IRQ_TIM2 (STM32_IRQ_FIRST+28) /* 28: TIM2 global interrupt */ +#define STM32_IRQ_TIM3 (STM32_IRQ_FIRST+29) /* 29: TIM3 global interrupt */ +#define STM32_IRQ_TIM4 (STM32_IRQ_FIRST+30) /* 30: TIM4 global interrupt */ +#define STM32_IRQ_I2C1EV (STM32_IRQ_FIRST+31) /* 31: I2C1 event interrupt */ +#define STM32_IRQ_I2C1ER (STM32_IRQ_FIRST+32) /* 32: I2C1 error interrupt */ +#define STM32_IRQ_I2C2EV (STM32_IRQ_FIRST+33) /* 33: I2C2 event interrupt */ +#define STM32_IRQ_I2C2ER (STM32_IRQ_FIRST+34) /* 34: I2C2 error interrupt */ +#define STM32_IRQ_SPI1 (STM32_IRQ_FIRST+35) /* 35: SPI1 global interrupt */ +#define STM32_IRQ_SPI2 (STM32_IRQ_FIRST+36) /* 36: SPI2 global interrupt */ +#define STM32_IRQ_USART1 (STM32_IRQ_FIRST+37) /* 37: USART1 global interrupt */ +#define STM32_IRQ_USART2 (STM32_IRQ_FIRST+38) /* 38: USART2 global interrupt */ +#define STM32_IRQ_USART3 (STM32_IRQ_FIRST+39) /* 39: USART3 global interrupt */ +#define STM32_IRQ_EXTI1510 (STM32_IRQ_FIRST+40) /* 40: EXTI Line[15:10] interrupts */ +#define STM32_IRQ_RTCALRM (STM32_IRQ_FIRST+41) /* 41: RTC alarm through EXTI line interrupt */ +#define STM32_IRQ_OTGFSWKUP (STM32_IRQ_FIRST+42) /* 42: USB On-The-Go FS Wakeup through EXTI line interrupt */ +#define STM32_IRQ_TIM8BRK (STM32_IRQ_FIRST+43) /* 43: TIM8 Break interrupt */ +#define STM32_IRQ_TIM12 (STM32_IRQ_FIRST+43) /* 43: TIM12 global interrupt */ +#define STM32_IRQ_TIM8UP (STM32_IRQ_FIRST+44) /* 44: TIM8 Update interrupt */ +#define STM32_IRQ_TIM13 (STM32_IRQ_FIRST+44) /* 44: TIM13 global interrupt */ +#define STM32_IRQ_TIM8TRGCOM (STM32_IRQ_FIRST+45) /* 45: TIM8 Trigger and Commutation interrupts */ +#define STM32_IRQ_TIM14 (STM32_IRQ_FIRST+45) /* 45: TIM14 global interrupt */ +#define STM32_IRQ_TIM8CC (STM32_IRQ_FIRST+46) /* 46: TIM8 Capture Compare interrupt */ +#define STM32_IRQ_DMA1S7 (STM32_IRQ_FIRST+47) /* 47: DMA1 Stream 7 global interrupt */ +#define STM32_IRQ_FSMC (STM32_IRQ_FIRST+48) /* 48: FSMC global interrupt */ +#define STM32_IRQ_SDMMC1 (STM32_IRQ_FIRST+49) /* 49: SDMMC1 global interrupt */ +#define STM32_IRQ_TIM5 (STM32_IRQ_FIRST+50) /* 50: TIM5 global interrupt */ +#define STM32_IRQ_SPI3 (STM32_IRQ_FIRST+51) /* 51: SPI3 global interrupt */ +#define STM32_IRQ_UART4 (STM32_IRQ_FIRST+52) /* 52: UART4 global interrupt */ +#define STM32_IRQ_UART5 (STM32_IRQ_FIRST+53) /* 53: UART5 global interrupt */ +#define STM32_IRQ_TIM6 (STM32_IRQ_FIRST+54) /* 54: TIM6 global interrupt */ +#define STM32_IRQ_DAC (STM32_IRQ_FIRST+54) /* 54: DAC1 and DAC2 underrun error interrupts */ +#define STM32_IRQ_TIM7 (STM32_IRQ_FIRST+55) /* 55: TIM7 global interrupt */ +#define STM32_IRQ_DMA2S0 (STM32_IRQ_FIRST+56) /* 56: DMA2 Stream 0 global interrupt */ +#define STM32_IRQ_DMA2S1 (STM32_IRQ_FIRST+57) /* 57: DMA2 Stream 1 global interrupt */ +#define STM32_IRQ_DMA2S2 (STM32_IRQ_FIRST+58) /* 58: DMA2 Stream 2 global interrupt */ +#define STM32_IRQ_DMA2S3 (STM32_IRQ_FIRST+59) /* 59: DMA2 Stream 3 global interrupt */ +#define STM32_IRQ_DMA2S4 (STM32_IRQ_FIRST+60) /* 60: DMA2 Stream 4 global interrupt */ +#define STM32_IRQ_ETH (STM32_IRQ_FIRST+61) /* 61: Ethernet global interrupt */ +#define STM32_IRQ_ETHWKUP (STM32_IRQ_FIRST+62) /* 62: Ethernet Wakeup through EXTI line interrupt */ +#define STM32_IRQ_CAN2TX (STM32_IRQ_FIRST+63) /* 63: CAN2 TX interrupts */ +#define STM32_IRQ_CAN2RX0 (STM32_IRQ_FIRST+64) /* 64: CAN2 RX0 interrupts */ +#define STM32_IRQ_CAN2RX1 (STM32_IRQ_FIRST+65) /* 65: CAN2 RX1 interrupt */ +#define STM32_IRQ_CAN2SCE (STM32_IRQ_FIRST+66) /* 66: CAN2 SCE interrupt */ +#define STM32_IRQ_OTGFS (STM32_IRQ_FIRST+67) /* 67: USB On The Go FS global interrupt */ +#define STM32_IRQ_DMA2S5 (STM32_IRQ_FIRST+68) /* 68: DMA2 Stream 5 global interrupt */ +#define STM32_IRQ_DMA2S6 (STM32_IRQ_FIRST+69) /* 69: DMA2 Stream 6 global interrupt */ +#define STM32_IRQ_DMA2S7 (STM32_IRQ_FIRST+70) /* 70: DMA2 Stream 7 global interrupt */ +#define STM32_IRQ_USART6 (STM32_IRQ_FIRST+71) /* 71: USART6 global interrupt */ +#define STM32_IRQ_I2C3EV (STM32_IRQ_FIRST+72) /* 72: I2C3 event interrupt */ +#define STM32_IRQ_I2C3ER (STM32_IRQ_FIRST+73) /* 73: I2C3 error interrupt */ +#define STM32_IRQ_OTGHSEP1OUT (STM32_IRQ_FIRST+74) /* 74: USB On The Go HS End Point 1 Out global interrupt */ +#define STM32_IRQ_OTGHSEP1IN (STM32_IRQ_FIRST+75) /* 75: USB On The Go HS End Point 1 In global interrupt */ +#define STM32_IRQ_OTGHSWKUP (STM32_IRQ_FIRST+76) /* 76: USB On The Go HS Wakeup through EXTI interrupt */ +#define STM32_IRQ_OTGHS (STM32_IRQ_FIRST+77) /* 77: USB On The Go HS global interrupt */ +#define STM32_IRQ_DCMI (STM32_IRQ_FIRST+78) /* 78: DCMI global interrupt */ +#define STM32_IRQ_CRYP (STM32_IRQ_FIRST+79) /* 79: CRYP crypto global interrupt */ +#define STM32_IRQ_HASH (STM32_IRQ_FIRST+80) /* 80: Hash and Rng global interrupt */ +#define STM32_IRQ_RNG (STM32_IRQ_FIRST+80) /* 80: Hash and Rng global interrupt */ +#define STM32_IRQ_FPU (STM32_IRQ_FIRST+81) /* 81: FPU global interrupt */ +#define STM32_IRQ_UART7 (STM32_IRQ_FIRST+82) /* 82: UART7 global interrupt */ +#define STM32_IRQ_UART8 (STM32_IRQ_FIRST+83) /* 83: UART8 global interrupt */ +#define STM32_IRQ_SPI4 (STM32_IRQ_FIRST+84) /* 84: SPI4 global interrupt */ +#define STM32_IRQ_SPI5 (STM32_IRQ_FIRST+85) /* 85: SPI5 global interrupt */ +#define STM32_IRQ_SPI6 (STM32_IRQ_FIRST+86) /* 86: SPI6 global interrupt */ +#define STM32_IRQ_SAI1 (STM32_IRQ_FIRST+87) /* 87: SAI1 global interrupt */ +#define STM32_IRQ_LTDCINT (STM32_IRQ_FIRST+88) /* 88: LCD-TFT global interrupt */ +#define STM32_IRQ_LTDCERRINT (STM32_IRQ_FIRST+89) /* 89: LCD-TFT global Error interrupt */ +#define STM32_IRQ_DMA2D (STM32_IRQ_FIRST+90) /* 90: DMA2D global interrupt */ +#define STM32_IRQ_SAI2 (STM32_IRQ_FIRST+91) /* 91: SAI2 global interrupt */ +#define STM32_IRQ_QUADSPI (STM32_IRQ_FIRST+92) /* 92: QuadSPI global interrupt */ +#define STM32_IRQ_LPTIMER1 (STM32_IRQ_FIRST+93) /* 93: LP Timer1 global interrupt */ +#define STM32_IRQ_HDMICEC (STM32_IRQ_FIRST+94) /* 94: HDMI-CEC global interrupt */ +#define STM32_IRQ_I2C4EV (STM32_IRQ_FIRST+95) /* 95: I2C4 event interrupt */ +#define STM32_IRQ_I2C4ER (STM32_IRQ_FIRST+96) /* 96: I2C4 Error interrupt */ +#define STM32_IRQ_SPDIFRX (STM32_IRQ_FIRST+97) /* 97: SPDIFRX global interrupt */ +#define STM32_IRQ_DSIHOST (STM32_IRQ_FIRST+98) /* 98: DSI host global interrupt */ +#define STM32_IRQ_DFSDM1FLT0 (STM32_IRQ_FIRST+99) /* 99: DFSDM1 Filter 0 global interrupt */ +#define STM32_IRQ_DFSDM1FLT1 (STM32_IRQ_FIRST+100) /* 100: DFSDM1 Filter 1 global interrupt */ +#define STM32_IRQ_DFSDM1FLT2 (STM32_IRQ_FIRST+101) /* 101: DFSDM1 Filter 2 global interrupt */ +#define STM32_IRQ_DFSDM1FLT3 (STM32_IRQ_FIRST+102) /* 102: DFSDM1 Filter 3 global interrupt */ +#define STM32_IRQ_SDMMC2 (STM32_IRQ_FIRST+103) /* 103: SDMMC2 global interrupt */ +#define STM32_IRQ_CAN3TX (STM32_IRQ_FIRST+104) /* 104: CAN3 TX interrupt */ +#define STM32_IRQ_CAN3RX0 (STM32_IRQ_FIRST+105) /* 105: CAN3 RX0 interrupt */ +#define STM32_IRQ_CAN3RX1 (STM32_IRQ_FIRST+106) /* 106: CAN3 RX1 interrupt */ +#define STM32_IRQ_CAN3SCE (STM32_IRQ_FIRST+107) /* 107: CAN3 SCE interrupt */ +#define STM32_IRQ_JPEG (STM32_IRQ_FIRST+108) /* 108: JPEG global interrupt */ +#define STM32_IRQ_MDIOS (STM32_IRQ_FIRST+109) /* 109: MDIO slave global interrupt */ + +#define NR_INTERRUPTS 110 +#define NR_VECTORS (STM32_IRQ_FIRST+NR_INTERRUPTS) + +/* EXTI interrupts (Do not use IRQ numbers) */ + +#define NR_IRQS NR_VECTORS + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public Data + ****************************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#endif /* __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H */ diff --git a/arch/arm/src/a1x/Kconfig b/arch/arm/src/a1x/Kconfig index 41414352212..c66753d5381 100644 --- a/arch/arm/src/a1x/Kconfig +++ b/arch/arm/src/a1x/Kconfig @@ -21,49 +21,49 @@ menu "Allwinner A1X Peripheral Support" config A1X_UART0 bool "UART 0" default n - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config A1X_UART1 bool "UART 1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config A1X_UART2 bool "UART 2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config A1X_UART3 bool "UART 3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config A1X_UART4 bool "UART 4" default n - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config A1X_UART5 bool "UART 5" default n - select ARCH_HAVE_UART5 + select UART5_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config A1X_UART6 bool "UART 6" default n - select ARCH_HAVE_UART6 + select UART6_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config A1X_UART7 bool "UART 7" default n - select ARCH_HAVE_UART7 + select UART7_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config A1X_IR0 diff --git a/arch/arm/src/armv7-a/arm_assert.c b/arch/arm/src/armv7-a/arm_assert.c index 00c730919c7..ab3bd4c9081 100644 --- a/arch/arm/src/armv7-a/arm_assert.c +++ b/arch/arm/src/armv7-a/arm_assert.c @@ -334,7 +334,13 @@ static void up_dumpstate(void) } #endif - /* Then dump the registers (if available) */ +#ifdef CONFIG_SMP + /* Show the CPU number */ + + lldbg("CPU%d:\n", up_cpu_index()); +#endif + + /* Then dump the CPU registers (if available) */ up_registerdump(); diff --git a/arch/arm/src/armv7-a/arm_cpustart.c b/arch/arm/src/armv7-a/arm_cpustart.c index 00addb818d9..1ec95da855a 100644 --- a/arch/arm/src/armv7-a/arm_cpustart.c +++ b/arch/arm/src/armv7-a/arm_cpustart.c @@ -51,6 +51,37 @@ #ifdef CONFIG_SMP +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: arm_registerdump + ****************************************************************************/ + +#if 0 /* Was useful in solving some startup problems */ +static inline void arm_registerdump(FAR struct tcb_s *tcb) +{ + int regndx; + + lldbg("CPU%d:\n", up_cpu_index()); + + /* Dump the startup registers */ + + for (regndx = REG_R0; regndx <= REG_R15; regndx += 8) + { + uint32_t *ptr = (uint32_t *)&tcb->xcp.regs[regndx]; + lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n", + regndx, ptr[0], ptr[1], ptr[2], ptr[3], + ptr[4], ptr[5], ptr[6], ptr[7]); + } + + lldbg("CPSR: %08x\n", tcb->xcp.regs[REG_CPSR]); +} +#else +# define arm_registerdump(tcb) +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -75,15 +106,17 @@ int arm_start_handler(int irq, FAR void *context) { FAR struct tcb_s *tcb; - /* Invalidate CPUn L1 so that is will be reloaded from coherent L2. */ - - cp15_invalidate_dcache_all(); + sllvdbg("CPU%d Started\n", up_cpu_index()); /* Reset scheduler parameters */ tcb = this_task(); sched_resume_scheduler(tcb); + /* Dump registers so that we can see what is going to happen on return */ + + arm_registerdump(tcb); + /* Then switch contexts. This instantiates the exception context of the * tcb at the head of the assigned task list. In this case, this should * be the CPUs NULL task. @@ -122,6 +155,8 @@ int arm_start_handler(int irq, FAR void *context) int up_cpu_start(int cpu) { + sllvdbg("Starting CPU%d\n", cpu); + DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu()); /* Make the content of CPU0 L1 cache has been written to coherent L2 */ diff --git a/arch/arm/src/c5471/c5471_ethernet.c b/arch/arm/src/c5471/c5471_ethernet.c index 11c157f35f4..5d1ddb68632 100644 --- a/arch/arm/src/c5471/c5471_ethernet.c +++ b/arch/arm/src/c5471/c5471_ethernet.c @@ -331,9 +331,9 @@ struct c5471_driver_s uint32_t c_rxdropped; /* Packets dropped because of size */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s c_dev; /* Interface understood by uIP */ + struct net_driver_s c_dev; /* Interface understood by the network */ }; /**************************************************************************** @@ -960,7 +960,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471) * Function: c5471_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -1162,7 +1162,7 @@ static void c5471_receive(struct c5471_driver_s *c5471) int j = 0; /* Walk the newly received packet contained within the EIM and transfer - * its contents to the uIP buffer. This frees up the memory contained within + * its contents to the network buffer. This frees up the memory contained within * the EIM for additional packets that might be received later from the network. */ @@ -1185,7 +1185,7 @@ static void c5471_receive(struct c5471_driver_s *c5471) framelen = (getreg32(c5471->c_txcpudesc) & EIM_TXDESC_BYTEMASK); packetlen += framelen; - /* Check if the received packet will fit within the uIP packet buffer */ + /* Check if the received packet will fit within the network packet buffer */ if (packetlen < (CONFIG_NET_ETH_MTU + 4)) { @@ -1234,7 +1234,7 @@ static void c5471_receive(struct c5471_driver_s *c5471) c5471_inctxcpu(c5471); } - /* Adjust the packet length to remove the CRC bytes that uIP doesn't care about. */ + /* Adjust the packet length to remove the CRC bytes that the network doesn't care about. */ packetlen -= 4; @@ -1244,8 +1244,8 @@ static void c5471_receive(struct c5471_driver_s *c5471) c5471->c_rxpackets++; #endif - /* If we successfully transferred the data into the uIP buffer, then pass it on - * to uIP for processing. + /* If we successfully transferred the data into the network buffer, then pass it on + * to the network for processing. */ if (packetlen > 0 && packetlen < CONFIG_NET_ETH_MTU) @@ -1496,7 +1496,7 @@ static void c5471_txdone(struct c5471_driver_s *c5471) wd_cancel(c5471->c_txtimeout); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&c5471->c_dev, c5471_txpoll); } @@ -1615,7 +1615,7 @@ static void c5471_txtimeout(int argc, uint32_t arg, ...) c5471_ifdown(&c5471->c_dev); c5471_ifup(&c5471->c_dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&c5471->c_dev, c5471_txpoll); } @@ -1647,7 +1647,7 @@ static void c5471_polltimer(int argc, uint32_t arg, ...) if ((EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc)) == 0) { - /* If so, update TCP timing states and poll uIP for new XMIT data */ + /* If so, update TCP timing states and poll the network for new XMIT data */ (void)devif_timer(&c5471->c_dev, c5471_txpoll); } @@ -1811,7 +1811,7 @@ static int c5471_txavail(struct net_driver_s *dev) if ((EIM_TXDESC_OWN_HOST & getreg32(c5471->c_rxcpudesc)) == 0) { - /* If so, then poll uIP for new XMIT data */ + /* If so, then poll the network for new XMIT data */ (void)devif_poll(&c5471->c_dev, c5471_txpoll); } diff --git a/arch/arm/src/common/up_createstack.c b/arch/arm/src/common/up_createstack.c index 12d4575e3dd..c3aa9d7adb9 100644 --- a/arch/arm/src/common/up_createstack.c +++ b/arch/arm/src/common/up_createstack.c @@ -220,7 +220,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) if (tcb->stack_alloc_ptr) { #if defined(CONFIG_TLS) && defined(CONFIG_STACK_COLORATION) - uinptr_t stack_base; + uintptr_t stack_base; #endif size_t top_of_stack; size_t size_of_stack; @@ -264,7 +264,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) * water marks. */ - stackbase = (uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s); + stack_base = (uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s); stack_size = tcb->adj_stack_size - sizeof(struct tls_info_s); up_stack_color((FAR void *)stack_base, stack_size); diff --git a/arch/arm/src/common/up_usestack.c b/arch/arm/src/common/up_usestack.c index 5dea96be4e9..887387976ae 100644 --- a/arch/arm/src/common/up_usestack.c +++ b/arch/arm/src/common/up_usestack.c @@ -174,7 +174,13 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size) * value that we can use later to test for high water marks. */ -# warning Missing logic +#ifdef CONFIG_TLS + up_stack_color( + (FAR void *)((uintptr_t)tcb->stack_alloc_ptr + sizeof(struct tls_info_s)), + tcb->adj_stack_size - sizeof(struct tls_info_s)); +#else + up_stack_color(tcb->stack_alloc_ptr, tcb->adj_stack_size); +#endif #endif return OK; diff --git a/arch/arm/src/dm320/Kconfig b/arch/arm/src/dm320/Kconfig index cc0de49494c..ff6356ff5f5 100644 --- a/arch/arm/src/dm320/Kconfig +++ b/arch/arm/src/dm320/Kconfig @@ -11,12 +11,12 @@ menu "DM320 Peripheral Selections" config DM320_UART0 bool default y - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER config DM320_UART1 bool default y - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER endmenu # DM320 Peripheral Selections endif # ARCH_CHIP_DM320 diff --git a/arch/arm/src/efm32/Kconfig b/arch/arm/src/efm32/Kconfig index 0b90826e5ed..ad1abfbfa06 100644 --- a/arch/arm/src/efm32/Kconfig +++ b/arch/arm/src/efm32/Kconfig @@ -157,45 +157,42 @@ config EFM32_BITBAND config EFM32_USART0 bool "USART0" default n - select ARCH_HAVE_USART0 select ARCH_HAVE_SERIAL_TERMIOS config EFM32_USART1 bool "USART1" default n - select ARCH_HAVE_USART1 select ARCH_HAVE_SERIAL_TERMIOS config EFM32_USART2 bool "USART2" default n depends on EFM32_HAVE_USART2 - select ARCH_HAVE_USART2 select ARCH_HAVE_SERIAL_TERMIOS config EFM32_UART0 bool "UART0" default n - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER select EFM32_UART config EFM32_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select EFM32_UART config EFM32_LEUART0 bool "Low energy UART0" default n - select ARCH_HAVE_OTHER_UART + select OTHER_UART_SERIALDRIVER select EFM32_LEUART config EFM32_LEUART1 bool "Low energy UART1" default n depends on EFM32_HAVE_LEUART1 - select ARCH_HAVE_OTHER_UART + select OTHER_UART_SERIALDRIVER select EFM32_LEUART config EFM32_OTGFS @@ -261,7 +258,7 @@ choice config EFM32_USART0_ISUART bool "USART0 is a UART" - select USART0_ISUART + select USART0_SERIALDRIVER select EFM32_USART_ISUART config EFM32_USART0_ISSPI @@ -277,7 +274,7 @@ choice config EFM32_USART1_ISUART bool "USART1 is a UART" - select USART1_ISUART + select USART1_SERIALDRIVER select EFM32_USART_ISUART config EFM32_USART1_ISSPI @@ -293,7 +290,7 @@ choice config EFM32_USART2_ISUART bool "USART2 is a UART" - select USART2_ISUART + select USART2_SERIALDRIVER select EFM32_USART_ISUART config EFM32_USART2_ISSPI diff --git a/arch/arm/src/efm32/efm32_adc.c b/arch/arm/src/efm32/efm32_adc.c index 102384ff3de..53cb731ad60 100644 --- a/arch/arm/src/efm32/efm32_adc.c +++ b/arch/arm/src/efm32/efm32_adc.c @@ -2,7 +2,9 @@ * arch/arm/src/efm32/efm32_adc.c * * Copyright (C) 2014 Bouteville Pierre-Noel. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Authors: Bouteville Pierre-Noel + * Gregory Nutt * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -63,9 +65,9 @@ #include "efm32.h" #include "efm32_adc.h" -/* ADC "upper half" support must be enabled */ +/* ADC "lower half" support must be enabled */ -#ifdef CONFIG_ADC +#ifdef CONFIG_EFM32_ADC /* Some ADC peripheral must be enabled */ @@ -100,6 +102,7 @@ struct efm32_dev_s { + FAR const struct adc_callback_s *cb; uint8_t irq; /* Interrupt generated by this ADC block */ uint8_t nchannels; /* Number of channels */ uint8_t current; /* Current ADC channel being converted */ @@ -124,6 +127,8 @@ static int adc_interrupt(FAR struct adc_dev_s *dev); /* ADC Driver Methods */ +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); static void adc_reset(FAR struct adc_dev_s *dev); static int adc_setup(FAR struct adc_dev_s *dev); static void adc_shutdown(FAR struct adc_dev_s *dev); @@ -148,6 +153,7 @@ static void adc_startconv(FAR struct efm32_dev_s *priv, bool enable); static const struct adc_ops_s g_adcops = { + .ao_bind = adc_bind, .ao_reset = adc_reset, .ao_setup = adc_setup, .ao_shutdown = adc_shutdown, @@ -790,7 +796,7 @@ static void adc_startconv(struct efm32_dev_s *priv, bool enable) #endif /**************************************************************************** - * Name: adc_reset + * Name: adc_hw_reset * * Description: * Deinitializes the ADCx peripheral registers to their default @@ -873,6 +879,25 @@ static void adc_enable(FAR struct efm32_dev_s *priv, bool enable) adc_putreg(priv, EFM32_ADC_CR2_OFFSET, regval); } +/**************************************************************************** + * Name: adc_bind + * + * Description: + * Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + * + ****************************************************************************/ + +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback) +{ + FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + priv->cb = callback; + return OK; +} + /**************************************************************************** * Name: adc_reset * @@ -1180,14 +1205,21 @@ static int adc_interrupt(FAR struct adc_dev_s *dev) value = adc_getreg(priv, EFM32_ADC_DR_OFFSET); value &= ADC_DR_DATA_MASK; - /* Give the ADC data to the ADC driver. adc_receive accepts 3 parameters: - * - * 1) The first is the ADC device instance for this ADC block. - * 2) The second is the channel number for the data, and - * 3) The third is the converted data for the channel. - */ + /* Verify that the upper-half driver has bound its callback functions */ - adc_receive(dev, priv->chanlist[priv->current], value); + if (priv->cb != NULL) + { + /* Give the ADC data to the ADC driver. The ADC receive method + * accepts 3 parameters: + * + * 1) The first is the ADC device instance for this ADC block. + * 2) The second is the channel number for the data, and + * 3) The third is the converted data for the channel. + */ + + DEBUGASSERT(priv->cb->au_receive != NULL); + priv->cb->au_receive(dev, priv->chanlist[priv->current], value); + } /* Set the channel number of the next channel that will complete conversion */ @@ -1272,7 +1304,8 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch /* Configure the selected ADC */ - priv = dev->ad_priv; + priv = dev->ad_priv; + priv->cb = NULL; DEBUGASSERT(nchannels <= ADC_MAX_SAMPLES); priv->nchannels = nchannels; @@ -1283,4 +1316,4 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch #endif /* CONFIG_EFM32_EFM32GG */ #endif /* CONFIG_EFM32_ADC1 */ -#endif /* CONFIG_ADC */ +#endif /* CONFIG_EFM32_ADC */ diff --git a/arch/arm/src/efm32/efm32_flash.c b/arch/arm/src/efm32/efm32_flash.c index a35422b73da..1353bbbdb12 100644 --- a/arch/arm/src/efm32/efm32_flash.c +++ b/arch/arm/src/efm32/efm32_flash.c @@ -845,7 +845,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size) bitband_set_peripheral(EFM32_MSC_WRITECTRL, _MSC_WRITECTRL_WREN_SHIFT, 0); -#if (defined(CONFIG_EFM32_EFM32GG) || defined(CONFIG_EFM32_EFM32WG)) && (2==WORDS_PER_DATA_PHASE) +#if (defined(CONFIG_EFM32_EFM32GG) || defined(CONFIG_EFM32_EFM32WG)) /* Turn off double word write cycle support. */ diff --git a/arch/arm/src/imx1/Kconfig b/arch/arm/src/imx1/Kconfig index e138090e457..aa2b6bb6932 100644 --- a/arch/arm/src/imx1/Kconfig +++ b/arch/arm/src/imx1/Kconfig @@ -12,17 +12,17 @@ menu "iMX.1 Peripheral Selection" config IMX1_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER config IMX1_UART2 bool "UART2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER config IMX1_UART3 bool "UART3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER config IMX1_SPI1 bool "SPI1" diff --git a/arch/arm/src/imx1/imx_cspi.h b/arch/arm/src/imx1/imx_cspi.h index 4a43e554694..842a4ca1116 100644 --- a/arch/arm/src/imx1/imx_cspi.h +++ b/arch/arm/src/imx1/imx_cspi.h @@ -74,7 +74,7 @@ #define IMX_CSPI1_SPIDMA (IMX_CSPI1_VBASE + CSPI_DMA_OFFSET) #define IMX_CSPI1_SPIRESET (IMX_CSPI1_VBASE + CSPI_RESET_OFFSET) -/* CSPI1 */ +/* CSPI2 */ #define IMX_CSPI2_RXD (IMX_CSPI2_VBASE + CSPI_RXD_OFFSET) #define IMX_CSPI2_TXD (IMX_CSPI2_VBASE + CSPI_TXD_OFFSET) @@ -138,7 +138,7 @@ /* CSPI Sample Period Control Register */ #define CSPI_SPCR_WAIT_SHIFT 0 -#define CSPI_SPCR_WAIT_MASK (0x7ff << CSPI_CTRL_DATARATE_SHIFT) +#define CSPI_SPCR_WAIT_MASK (0x7ff << CSPI_SPCR_WAIT_SHIFT) #define CSPI_SPCR_CSRC (1 << 15) /* Bit 15: 1:32768 or 32 kHz clock source */ /* CSPI DMA Control Register */ diff --git a/arch/arm/src/imx6/Kconfig b/arch/arm/src/imx6/Kconfig index 7250001d562..f49dde32bf6 100644 --- a/arch/arm/src/imx6/Kconfig +++ b/arch/arm/src/imx6/Kconfig @@ -54,32 +54,61 @@ config IMX6_HAVE_HDCP endmenu # "iMX.6 Chip Selection" +config IMX6_ECSPI + bool + default n + menu "iMX.6 Peripheral Selection" +config IMX6_ECSPI1 + bool "ECSPI1" + default n + select IMX6_ECSPI + +config IMX6_ECSPI2 + bool "ECSPI2" + default n + select IMX6_ECSPI + +config IMX6_ECSPI3 + bool "ECSPI3" + default n + select IMX6_ECSPI + +config IMX6_ECSPI4 + bool "ECSPI4" + default n + select IMX6_ECSPI + +config IMX6_ECSPI5 + bool "ECSPI5" + default n + select IMX6_ECSPI + config IMX6_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER config IMX6_UART2 bool "UART2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER config IMX6_UART3 bool "UART3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER config IMX6_UART4 bool "UART4" default n - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER config IMX6_UART5 bool "UART5" default n - select ARCH_HAVE_UART5 + select UART5_SERIALDRIVER config IMX6_SPI1 bool "SPI1" diff --git a/arch/arm/src/imx6/Make.defs b/arch/arm/src/imx6/Make.defs index 3f949158e36..47b36a5f1af 100644 --- a/arch/arm/src/imx6/Make.defs +++ b/arch/arm/src/imx6/Make.defs @@ -150,3 +150,7 @@ CHIP_CSRCS += imx_serial.c imx_lowputc.c ifeq ($(CONFIG_SMP),y) CHIP_CSRCS += imx_cpuboot.c endif + +ifeq ($(CONFIG_IMX6_ECSPI),y) +CHIP_CSRCS += imx_ecspi.c +endif diff --git a/arch/arm/src/imx6/chip/imx_ecspi.h b/arch/arm/src/imx6/chip/imx_ecspi.h new file mode 100644 index 00000000000..2d7864132d0 --- /dev/null +++ b/arch/arm/src/imx6/chip/imx_ecspi.h @@ -0,0 +1,290 @@ +/************************************************************************************ + * arch/arm/src/imx6/imx_ecspi.h + * + * Copyright (C) 2009-2010, 2015-2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_IMX6_CHIP_ECSPI_H +#define __ARCH_ARM_IMX6_CHIP_ECSPI_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include "chip/imx_memorymap.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* ECSPI Register Offsets ***********************************************************/ + +#define ECSPI_RXDATA_OFFSET 0x0000 /* Receive Data Register */ +#define ECSPI_TXDATA_OFFSET 0x0004 /* Transmit Data Register */ +#define ECSPI_CONREG_OFFSET 0x0008 /* Control Register */ +#define ECSPI_CONFIGREG_OFFSET 0x000c /* Configuration Register */ +#define ECSPI_INTREG_OFFSET 0x0010 /* Interrupt Control Register */ +#define ECSPI_DMAREG_OFFSET 0x0014 /* DMA Control Register */ +#define ECSPI_STATREG_OFFSET 0x0018 /* Status Register */ +#define ECSPI_PERIODREG_OFFSET 0x001c /* Sample Period Control Register */ +#define ECSPI_TESTREG_OFFSET 0x0020 /* Test Control Register */ +#define ECSPI_MSGDATA_OFFSET 0x0040 /* Message Data Register */ + +/* ECSPI Register Addresses *********************************************************/ + +/* ECSPI1 */ + +#define IMX_ECSPI1_RXDATA (IMX_ECSPI1_VBASE + ECSPI_RXDATA_OFFSET) +#define IMX_ECSPI1_TXDATA (IMX_ECSPI1_VBASE + ECSPI_TXDATA_OFFSET) +#define IMX_ECSPI1_CONREG (IMX_ECSPI1_VBASE + ECSPI_CONREG_OFFSET) +#define IMX_ECSPI1_CONFIGREG (IMX_ECSPI1_VBASE + ECSPI_CONFIGREG_OFFSET) +#define IMX_ECSPI1_INTREG (IMX_ECSPI1_VBASE + ECSPI_INTREG_OFFSET) +#define IMX_ECSPI1_DMAREG (IMX_ECSPI1_VBASE + ECSPI_DMAREG_OFFSET) +#define IMX_ECSPI1_STATREG (IMX_ECSPI1_VBASE + ECSPI_STATREG_OFFSET) +#define IMX_ECSPI1_PERIODREG (IMX_ECSPI1_VBASE + ECSPI_PERIODREG_OFFSET) +#define IMX_ECSPI1_TESTREG (IMX_ECSPI1_VBASE + ECSPI_TESTREG_OFFSET) +#define IMX_ECSPI1_MSGDATA (IMX_ECSPI1_VBASE + ECSPI_MSGDATA_OFFSET) + +/* ECSPI2 */ + +#define IMX_ECSPI2_RXDATA (IMX_ECSPI2_VBASE + ECSPI_RXDATA_OFFSET) +#define IMX_ECSPI2_TXDATA (IMX_ECSPI2_VBASE + ECSPI_TXDATA_OFFSET) +#define IMX_ECSPI2_CONREG (IMX_ECSPI2_VBASE + ECSPI_CONREG_OFFSET) +#define IMX_ECSPI2_CONFIGREG (IMX_ECSPI2_VBASE + ECSPI_CONFIGREG_OFFSET) +#define IMX_ECSPI2_INTREG (IMX_ECSPI2_VBASE + ECSPI_INTREG_OFFSET) +#define IMX_ECSPI2_DMAREG (IMX_ECSPI2_VBASE + ECSPI_DMAREG_OFFSET) +#define IMX_ECSPI2_STATREG (IMX_ECSPI2_VBASE + ECSPI_STATREG_OFFSET) +#define IMX_ECSPI2_PERIODREG (IMX_ECSPI2_VBASE + ECSPI_PERIODREG_OFFSET) +#define IMX_ECSPI2_TESTREG (IMX_ECSPI2_VBASE + ECSPI_TESTREG_OFFSET) +#define IMX_ECSPI2_MSGDATA (IMX_ECSPI2_VBASE + ECSPI_MSGDATA_OFFSET) + +/* ECSPI3 */ + +#define IMX_ECSPI3_RXDATA (IMX_ECSPI3_VBASE + ECSPI_RXDATA_OFFSET) +#define IMX_ECSPI3_TXDATA (IMX_ECSPI3_VBASE + ECSPI_TXDATA_OFFSET) +#define IMX_ECSPI3_CONREG (IMX_ECSPI3_VBASE + ECSPI_CONREG_OFFSET) +#define IMX_ECSPI3_CONFIGREG (IMX_ECSPI3_VBASE + ECSPI_CONFIGREG_OFFSET) +#define IMX_ECSPI3_INTREG (IMX_ECSPI3_VBASE + ECSPI_INTREG_OFFSET) +#define IMX_ECSPI3_DMAREG (IMX_ECSPI3_VBASE + ECSPI_DMAREG_OFFSET) +#define IMX_ECSPI3_STATREG (IMX_ECSPI3_VBASE + ECSPI_STATREG_OFFSET) +#define IMX_ECSPI3_PERIODREG (IMX_ECSPI3_VBASE + ECSPI_PERIODREG_OFFSET) +#define IMX_ECSPI3_TESTREG (IMX_ECSPI3_VBASE + ECSPI_TESTREG_OFFSET) +#define IMX_ECSPI3_MSGDATA (IMX_ECSPI3_VBASE + ECSPI_MSGDATA_OFFSET) + +/* ECSPI4 */ + +#define IMX_ECSPI4_RXDATA (IMX_ECSPI4_VBASE + ECSPI_RXDATA_OFFSET) +#define IMX_ECSPI4_TXDATA (IMX_ECSPI4_VBASE + ECSPI_TXDATA_OFFSET) +#define IMX_ECSPI4_CONREG (IMX_ECSPI4_VBASE + ECSPI_CONREG_OFFSET) +#define IMX_ECSPI4_CONFIGREG (IMX_ECSPI4_VBASE + ECSPI_CONFIGREG_OFFSET) +#define IMX_ECSPI4_INTREG (IMX_ECSPI4_VBASE + ECSPI_INTREG_OFFSET) +#define IMX_ECSPI4_DMAREG (IMX_ECSPI4_VBASE + ECSPI_DMAREG_OFFSET) +#define IMX_ECSPI4_STATREG (IMX_ECSPI4_VBASE + ECSPI_STATREG_OFFSET) +#define IMX_ECSPI4_PERIODREG (IMX_ECSPI4_VBASE + ECSPI_PERIODREG_OFFSET) +#define IMX_ECSPI4_TESTREG (IMX_ECSPI4_VBASE + ECSPI_TESTREG_OFFSET) +#define IMX_ECSPI4_MSGDATA (IMX_ECSPI4_VBASE + ECSPI_MSGDATA_OFFSET) + +/* ECSPI5 */ + +#define IMX_ECSPI5_RXDATA (IMX_ECSPI5_VBASE + ECSPI_RXDATA_OFFSET) +#define IMX_ECSPI5_TXDATA (IMX_ECSPI5_VBASE + ECSPI_TXDATA_OFFSET) +#define IMX_ECSPI5_CONREG (IMX_ECSPI5_VBASE + ECSPI_CONREG_OFFSET) +#define IMX_ECSPI5_CONFIGREG (IMX_ECSPI5_VBASE + ECSPI_CONFIGREG_OFFSET) +#define IMX_ECSPI5_INTREG (IMX_ECSPI5_VBASE + ECSPI_INTREG_OFFSET) +#define IMX_ECSPI5_DMAREG (IMX_ECSPI5_VBASE + ECSPI_DMAREG_OFFSET) +#define IMX_ECSPI5_STATREG (IMX_ECSPI5_VBASE + ECSPI_STATREG_OFFSET) +#define IMX_ECSPI5_PERIODREG (IMX_ECSPI5_VBASE + ECSPI_PERIODREG_OFFSET) +#define IMX_ECSPI5_TESTREG (IMX_ECSPI5_VBASE + ECSPI_TESTREG_OFFSET) +#define IMX_ECSPI5_MSGDATA (IMX_ECSPI5_VBASE + ECSPI_MSGDATA_OFFSET) + +/* ECSPI Register Bit Definitions ***************************************************/ + +/* Control Register */ + +#define ECSPI_CONREG_EN (1 << 0) /* Bit 0: SPI Block enable control */ +#define ECSPI_CONREG_HT (1 << 1) /* Bit 1: Hardware trigger enable */ +#define ECSPI_CONREG_XCH (1 << 2) /* Bit 2: SPI Exchange bit */ +#define ECSPI_CONREG_SMC (1 << 3) /* Bit 3: Start mode control */ +#define ECSPI_CONREG_CHMODE_SHIFT (4) /* Bits 4-7: SPI Channel mode */ +#define ECSPI_CONREG_CHMODE_MASK (15 << ECSPI_CONREG_CHMODE_SHIFT) +# define ECSPI_CONREG_CH0MASTER (1 << ECSPI_CONREG_CHMODE_SHIFT) /* Channel 0 master mode */ +# define ECSPI_CONREG_CH1MASTER (2 << ECSPI_CONREG_CHMODE_SHIFT) /* Channel 1 master mode */ +# define ECSPI_CONREG_CH2MASTER (4 << ECSPI_CONREG_CHMODE_SHIFT) /* Channel 2 master mode */ +# define ECSPI_CONREG_CH3MASTER (8 << ECSPI_CONREG_CHMODE_SHIFT) /* Channel 3 master mode */ +#define ECSPI_CONREG_POSTDIV_SHIFT (8) /* Bits 8-11: SPI Post divider (exponent) */ +#define ECSPI_CONREG_POSTDIV_MASK (15 << ECSPI_CONREG_POSTDIV_SHIFT) +# define ECSPI_CONREG_POSTDIV_EXP(n) ((uint32_t)(n) << ECSPI_CONREG_POSTDIV_SHIFT) +# define ECSPI_CONREG_POSTDIV_1 (0 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*0 */ +# define ECSPI_CONREG_POSTDIV_2 (1 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*1 */ +# define ECSPI_CONREG_POSTDIV_4 (2 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*2 */ +# define ECSPI_CONREG_POSTDIV_8 (3 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*3 */ +# define ECSPI_CONREG_POSTDIV_16 (4 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*4 */ +# define ECSPI_CONREG_POSTDIV_32 (5 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*5 */ +# define ECSPI_CONREG_POSTDIV_64 (6 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*6 */ +# define ECSPI_CONREG_POSTDIV_128 (7 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*7 */ +# define ECSPI_CONREG_POSTDIV_256 (8 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*8 */ +# define ECSPI_CONREG_POSTDIV_512 (9 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*9 */ +# define ECSPI_CONREG_POSTDIV_1024 (10 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*10 */ +# define ECSPI_CONREG_POSTDIV_2048 (11 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*11 */ +# define ECSPI_CONREG_POSTDIV_4096 (12 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*12 */ +# define ECSPI_CONREG_POSTDIV_8192 (13 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*13 */ +# define ECSPI_CONREG_POSTDIV_16384 (14 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*14 */ +# define ECSPI_CONREG_POSTDIV_32768 (15 << ECSPI_CONREG_POSTDIV_SHIFT) /* Divide by 2*15 */ +#define ECSPI_CONREG_PREDIV_SHIFT (12) /* Bits 12-15: SPI Pre divider (minus 1) */ +#define ECSPI_CONREG_PREDIV_MASK (15 << ECSPI_CONREG_PREDIV_SHIFT) +# define ECSPI_CONREG_PREDIV(n) ((uint32_t)(n) << ECSPI_CONREG_PREDIV_SHIFT) +#define ECSPI_CONREG_DRCTL_SHIFT 16 /* Bits 16-17: SPI Data ready control */ +#define ECSPI_CONREG_DRCTL_MASK (3 << ECSPI_CONREG_DRCTL_SHIFT) +# define ECSPI_CONREG_DRCTL_IGNRDY (0 << ECSPI_CONREG_DRCTL_SHIFT) +# define ECSPI_CONREG_DRCTL_FALLING (1 << ECSPI_CONREG_DRCTL_SHIFT) +# define ECSPI_CONREG_DRCTL_ACTVLOW (2 << ECSPI_CONREG_DRCTL_SHIFT) +#define ECSPI_CONREG_CHSEL_SHIFT (18) /* Bits 18-19: SPI Channel select bits */ +#define ECSPI_CONREG_CHSEL_MASK (3 << ECSPI_CONREG_CHSEL_SHIFT) +# define ECSPI_CONREG_CHSEL_SS0 (0 << ECSPI_CONREG_CHSEL_SHIFT) /* Channel 0 select (SS0) */ +# define ECSPI_CONREG_CHSEL_SS1 (1 << ECSPI_CONREG_CHSEL_SHIFT) /* Channel 1 select (SS1) */ +# define ECSPI_CONREG_CHSEL_SS2 (2 << ECSPI_CONREG_CHSEL_SHIFT) /* Channel 2 select (SS2) */ +# define ECSPI_CONREG_CHSEL_SS3 (3 << ECSPI_CONREG_CHSEL_SHIFT) /* Channel 3 select (SS3) */ +#define ECSPI_CONREG_BURSTLEN_SHIFT (20) /* Bits 20-31: Burst length */ +#define ECSPI_CONREG_BURSTLEN_MASK (0xfff << ECSPI_CONREG_BURSTLEN_SHIFT) +# define ECSPI_CONREG_BURSTLEN(n) ((uint32_t)(n) << ECSPI_CONREG_BURSTLEN_SHIFT) + +/* Configuration Register */ + +#define ECSPI_CONFIGREG_SCLKPHA_SHIFT (0) /* Bits 0-3: SPI Clock/Data Phase Control */ +#define ECSPI_CONFIGREG_SCLKPHA_MASK (15 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) +# define ECSPI_CONFIGREG_CH0PHA (1 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) /* Channel 0 SCLK Phase */ +# define ECSPI_CONFIGREG_CH1PHA (2 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) /* Channel 1 SCLK Phase */ +# define ECSPI_CONFIGREG_CH2PHA (4 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) /* Channel 2 SCLK Phase */ +# define ECSPI_CONFIGREG_CH3PHA (8 << ECSPI_CONFIGREG_SCLKPHA_SHIFT) /* Channel 3 SCLK Phase */ +#define ECSPI_CONFIGREG_SCLKPOL_SHIFT (4) /* Bits 4-7: SPI Clock polarity control */ +#define ECSPI_CONFIGREG_SCLKPOL_MASK (15 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) +# define ECSPI_CONFIGREG_CH0POL (1 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) /* Channel 0 SCLK polarity */ +# define ECSPI_CONFIGREG_CH1POL (2 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) /* Channel 1 SCLK polarity */ +# define ECSPI_CONFIGREG_CH2POL (4 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) /* Channel 2 SCLK polarity */ +# define ECSPI_CONFIGREG_CH3POL (8 << ECSPI_CONFIGREG_SCLKPOL_SHIFT) /* Channel 3 SCLK polarity */ +#define ECSPI_CONFIGREG_SSCTL_SHIFT (8) /* Bits 8-11: SPI SS Wave form select */ +#define ECSPI_CONFIGREG_SSCTL_MASK (15 << ECSPI_CONFIGREG_SSCTL_SHIFT) +# define ECSPI_CONFIGREG_CH0SSCTRL (1 << ECSPI_CONFIGREG_SSCTL_SHIFT) /* Channel 0 SS control */ +# define ECSPI_CONFIGREG_CH1SSCTRL (2 << ECSPI_CONFIGREG_SSCTL_SHIFT) /* Channel 1 SS control */ +# define ECSPI_CONFIGREG_CH2SSCTRL (4 << ECSPI_CONFIGREG_SSCTL_SHIFT) /* Channel 2 SS control */ +# define ECSPI_CONFIGREG_CH3SSCTRL (8 << ECSPI_CONFIGREG_SSCTL_SHIFT) /* Channel 3 SS control */ +#define ECSPI_CONFIGREG_SSPOL_SHIFT (12) /* Bits 12-15: SPI SS Polarity select */ +#define ECSPI_CONFIGREG_SSPOL_MASK (15 << ECSPI_CONFIGREG_SSPOL_SHIFT) +# define ECSPI_CONFIGREG_CH0SSPOL (1 << ECSPI_CONFIGREG_CHMODE_SHIFT) /* Channel 0 SS polarity */ +# define ECSPI_CONFIGREG_CH1SSPOL (2 << ECSPI_CONFIGREG_CHMODE_SHIFT) /* Channel 1 SS polarity */ +# define ECSPI_CONFIGREG_CH2SSPOL (4 << ECSPI_CONFIGREG_CHMODE_SHIFT) /* Channel 2 SS polarity */ +# define ECSPI_CONFIGREG_CH3SSPOL (8 << ECSPI_CONFIGREG_CHMODE_SHIFT) /* Channel 3 SS polarity */ +#define ECSPI_CONFIGREG_DATCTL_SHIFT (16) /* Bits 16-19: Data control */ +#define ECSPI_CONFIGREG_DATCTL_MASK (15 << ECSPI_CONFIGREG_DATCTL_SHIFT) +# define ECSPI_CONFIGREG_CH0DATLOW (1 << ECSPI_CONFIGREG_DATCTL_SHIFT) /* Channel 0 SS low when inactive */ +# define ECSPI_CONFIGREG_CH1DATLOW (2 << ECSPI_CONFIGREG_DATCTL_SHIFT) /* Channel 1 SS low when inactive */ +# define ECSPI_CONFIGREG_CH2DATLOW (4 << ECSPI_CONFIGREG_DATCTL_SHIFT) /* Channel 2 SS low when inactive */ +# define ECSPI_CONFIGREG_CH3DATLOW (8 << ECSPI_CONFIGREG_DATCTL_SHIFT) /* Channel 3 SS low when inactive */ +#define ECSPI_CONFIGREG_SCLKCTL_SHIFT (20) /* Bits 20-23: SCLK Control */ +#define ECSPI_CONFIGREG_SCLKCTL_MASK (15 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) +# define ECSPI_CONFIGREG_CH0SCLKLOW (1 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) /* Channel 0 SCLK low when inactive */ +# define ECSPI_CONFIGREG_CH1SCLKLOW (2 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) /* Channel 1 SCLK low when inactive */ +# define ECSPI_CONFIGREG_CH2SCLKLOW (4 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) /* Channel 2 SCLK low when inactive */ +# define ECSPI_CONFIGREG_CH3SCLKLOW (8 << ECSPI_CONFIGREG_SCLKCTL_SHIFT) /* Channel 3 SCLK low when inactive */ +#define ECSPI_CONFIGREG_HTLEN_SHIFT (24) /* Bits 24-28: HT Length */ +#define ECSPI_CONFIGREG_HTLEN_MASK (15 << ECSPI_CONFIGREG_HTLEN_SHIFT) +# define ECSPI_CONFIGREG_HTLEN(n) ((uint32_t)(n) << ECSPI_CONFIGREG_HTLEN_SHIFT) + /* Bits 29-31: Reserved */ + +/* Common Interrupt Control Register and Status Register */ + +#define ECSPI_INT_TE (1 << 0) /* Bit 0: TXFIFO Empty Interrupt */ +#define ECSPI_INT_TDR (1 << 1) /* Bit 1: TXFIFO Data Request Interrupt */ +#define ECSPI_INT_TF (1 << 2) /* Bit 2: TXFIFO Full Interrupt */ +#define ECSPI_INT_RR (1 << 3) /* Bit 3: RXFIFO Data Ready Interrupt */ +#define ECSPI_INT_RDR (1 << 4) /* Bit 4: RXFIFO Data Request Interrupt enable */ +#define ECSPI_INT_RF (1 << 5) /* Bit 5: RXFIFO Full Interrupt */ +#define ECSPI_INT_RO (1 << 6) /* Bit 6: RXFIFO Overflow Interrupt */ +#define ECSPI_INT_TC (1 << 7) /* Bit 7: Transfer Completed Interrupt enable */ + /* Bits 8-31: Reserved */ + +#define ECSPI_INT_ALL 0x000000ff + +/* ECSPI DMA Control Register */ + +#define ECSPI_DMAREG_TXTHRES_SHIFT (0) /* Bits 0-5: TX Threshold */ +#define ECSPI_DMAREG_TXTHRES_MASK (0x3f << ECSPI_DMAREG_TXTHRES_SHIFT) +# define ECSPI_DMAREG_TXTHRES(n) ((uint32_t)(n) << ECSPI_DMAREG_TXTHRES_SHIFT) + /* Bit 6: Reserved */ +#define ECSPI_DMAREG_TEDEN (1 << 7) /* Bit 7: TXFIFO Empty DMA request enable */ + /* Bits 8-15: Reserved */ +#define ECSPI_DMAREG_RXTHRES_SHIFT (16) /* Bits 16-21: RX Threshold */ +#define ECSPI_DMAREG_RXTHRES_MASK (0x3f << ECSPI_DMAREG_RXTHRES_SHIFT) +# define ECSPI_DMAREG_RXTHRES(n) ((uint32_t)(n) << ECSPI_DMAREG_RXTHRES_SHIFT) + /* Bit 22: Reserved */ +#define ECSPI_DMAREG_RXDEN (1 << 23) /* Bit 23: RXFIFO DMA request enable */ +#define ECSPI_DMAREG_RXLEN_SHIFT (24) /* Bits 24-29: RX DMA length */ +#define ECSPI_DMAREG_RXLEN_MASK (0x3f << ECSPI_DMAREG_RXLEN_SHIFT) +# define ECSPI_DMAREG_RXLEN(n) ((uint32_t)(n) << ECSPI_DMAREG_RXLEN_SHIFT) + /* Bit 30: Reserved */ +#define ECSPI_DMAREG_RXTDEN (1 << 31) /* Bit 31: RXFIFO Tail DMA request enable */ + +/* ECSPI Sample Period Control Register */ + +#define ECSPI_PERIODREG_PERIOD_SHIFT (0) /* Bits 0-14: Sample Period Control */ +#define ECSPI_PERIODREG_PERIOD_MASK (0x7fff << ECSPI_PERIODREG_PERIOD_SHIFT) +# define ECSPI_PERIODREG_PERIOD(n) ((uint32_t)(n) << ECSPI_PERIODREG_PERIOD_SHIFT) +#define ECSPI_PERIODREG_CSRC (1 << 15) /* Bit 15: Clock source control */ +#define ECSPI_PERIODREG_CSDCTL_SHIFT (16) /* Bits 16-21: Chip Select delay control */ +#define ECSPI_PERIODREG_CSDCTL_MASK (0x3f << ECSPI_PERIODREG_CSDCTL_SHIFT) +# define ECSPI_PERIODREG_CSDCTL(n) ((uint32_t)(n) << ECSPI_PERIODREG_CSDCTL_SHIFT) + /* Bits 22-31: Reserved */ + +/* Test Control Register */ + +#define ECSPI_TESTREG_TXCNT_SHIFT (0) /* Bits 0-6: TXFIFO Counter */ +#define ECSPI_TESTREG_TXCNT_MASK (0x7f << ECSPI_TESTREG_TXCNT_SHIFT) +# define ECSPI_TESTREG_TXCNT(n) ((uint32_t)(n) << ECSPI_TESTREG_TXCNT_SHIFT) + /* Bit 7: Reserved */ +#define ECSPI_TESTREG_RXCNT_SHIFT (8) /* Bits 8-14: RXFIFO Counter */ +#define ECSPI_TESTREG_RXCNT_MASK (0x7f << ECSPI_TESTREG_RXCNT_SHIFT) +# define ECSPI_TESTREG_RXCNT(n) ((uint32_t)(n) << ECSPI_TESTREG_RXCNT_SHIFT) + /* Bits 15-30: Reserved */ +#define ECSPI_TESTREG_LBC (1 << 31) /* Bit 31: Loop Back Control */ + +/* Message Data Register (32-bit message data) */ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +#endif /* __ARCH_ARM_IMX6_CHIP_ECSPI_H */ diff --git a/arch/arm/src/imx6/imx_cpuboot.c b/arch/arm/src/imx6/imx_cpuboot.c index 5aca8d33bb0..50b23b5c1d4 100644 --- a/arch/arm/src/imx6/imx_cpuboot.c +++ b/arch/arm/src/imx6/imx_cpuboot.c @@ -53,6 +53,7 @@ #include "smp.h" #include "fpu.h" #include "gic.h" +#include "cp15_cacheops.h" #ifdef CONFIG_SMP @@ -69,44 +70,44 @@ typedef CODE void (*cpu_start_t)(void); #if 0 /* Not used */ static const uint32_t g_cpu_reset[CONFIG_SMP_NCPUS] = { - 0, + SRC_SCR_CORE0_RST #if CONFIG_SMP_NCPUS > 1 - SRC_SCR_CORE1_RST, + , SRC_SCR_CORE1_RST #endif #if CONFIG_SMP_NCPUS > 2 - SRC_SCR_CORE2_RST, + , SRC_SCR_CORE2_RST #endif #if CONFIG_SMP_NCPUS > 3 - SRC_SCR_CORE3_RST + , SRC_SCR_CORE3_RST #endif }; #endif static const uint32_t g_cpu_ctrl[CONFIG_SMP_NCPUS] = { - 0, + 0 #if CONFIG_SMP_NCPUS > 1 - SRC_SCR_CORE1_ENABLE, + , SRC_SCR_CORE1_ENABLE #endif #if CONFIG_SMP_NCPUS > 2 - SRC_SCR_CORE2_ENABLE, + , SRC_SCR_CORE2_ENABLE #endif #if CONFIG_SMP_NCPUS > 3 - SRC_SCR_CORE3_ENABLE + , SRC_SCR_CORE3_ENABLE #endif }; static const uintptr_t g_cpu_gpr[CONFIG_SMP_NCPUS] = { - 0, + IMX_SRC_GPR1 #if CONFIG_SMP_NCPUS > 1 - IMX_SRC_GPR3, + , IMX_SRC_GPR3 #endif #if CONFIG_SMP_NCPUS > 2 - IMX_SRC_GPR5, + , IMX_SRC_GPR5 #endif #if CONFIG_SMP_NCPUS > 3 - IMX_SRC_GPR7 + , IMX_SRC_GPR7 #endif }; @@ -296,6 +297,10 @@ void arm_cpu_boot(int cpu) (void)up_irq_enable(); #endif + /* Invalidate CPUn L1 so that is will be reloaded from coherent L2. */ + + cp15_invalidate_dcache_all(); + /* The next thing that we expect to happen is for logic running on CPU0 * to call up_cpu_start() which generate an SGI and a context switch to * the configured NuttX IDLE task. diff --git a/arch/arm/src/imx6/imx_ecspi.h b/arch/arm/src/imx6/imx_ecspi.h new file mode 100644 index 00000000000..40ca57c465c --- /dev/null +++ b/arch/arm/src/imx6/imx_ecspi.h @@ -0,0 +1,166 @@ +/************************************************************************************ + * arch/arm/src/imx6/imx_ecspi.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_IMX6_ECSPI_H +#define __ARCH_ARM_IMX6_ECSPI_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include + +#include "chip/imx_ecspi.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif /* __cplusplus */ + +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ + +struct spi_dev_s; /* Forward reference */ +enum spi_dev_e; /* Forward reference */ + +/************************************************************************************ + * Name: imx_spibus_initialize + * + * Description: + * Initialize common parts the selected SPI port. Initialization of + * chip select GPIOs must have been performed by board specific logic + * prior to calling this function. Specifically: GPIOs should have + * been configured for output, and all chip selects disabled. + * + * One GPIO, SS (PB2 on the eZ8F091) is reserved as a chip select. However, + * If multiple devices on on the bus, then multiple chip selects will be + * required. Theregore, all GPIO chip management is deferred to board- + * specific logic. + * + * Input Parameter: + * Port number (for hardware that has mutiple SPI interfaces) + * + * Returned Value: + * Valid SPI device structre reference on succcess; a NULL on failure + * + ************************************************************************************/ + +FAR struct spi_dev_s *imx_spibus_initialize(int port); + +/************************************************************************************ + * The external functions, imx_spiselect, imx_spistatus, and imx_cmddaa must be + * provided by board-specific logic. These are implementations of the select and + * status methods of the SPI interface defined by struct spi_ops_s (see + * include/nuttx/spi/spi.h). All other methods (including imx_spibus_initialize()) are + * provided by common logic. To use this common SPI logic on your board: + * + * 1. Provide imx_spiselect() and imx_spistatus() functions in your board-specific + * logic. This function will perform chip selection and status operations using + * GPIOs in the way your board is configured. + * 2. If CONFIG_SPI_CMDDATA is defined in your NuttX configuration, provide the + * imx_spicmddata() function in your board-specific logic. This function will + * perform cmd/data selection operations using GPIOs in the way your board is + * configured. + * 3. Add a call to imx_spibus_initialize() in your low level initialization logic + * 4. The handle returned by imx_spibus_initialize() may then be used to bind the + * SPI driver to higher level logic (e.g., calling mmcsd_spislotinitialize(), + * for example, will bind the SPI driver to the SPI MMC/SD driver). + * + ************************************************************************************/ + +#ifdef CONFIG_IMX6_ECSPI1 +void imx_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +uint8_t imx_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +int imx_spi1cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +#endif +#endif + +#ifdef CONFIG_IMX6_ECSPI2 +void imx_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +uint8_t imx_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +int imx_spi2cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +#endif +#endif + +#ifdef CONFIG_IMX6_ECSPI3 +void imx_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +uint8_t imx_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +int imx_spi3cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +#endif +#endif + +#ifdef CONFIG_IMX6_ECSPI4 +void imx_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +uint8_t imx_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +int imx_spi4cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +#endif +#endif + +#ifdef CONFIG_IMX6_ECSPI5 +void imx_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected); +uint8_t imx_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid); +#ifdef CONFIG_SPI_CMDDATA +int imx_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd); +#endif +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif /* __cplusplus */ +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_ARM_IMX6_ECSPI_H */ diff --git a/arch/arm/src/kinetis/Kconfig b/arch/arm/src/kinetis/Kconfig index 9540050b668..fdf54e1941c 100644 --- a/arch/arm/src/kinetis/Kconfig +++ b/arch/arm/src/kinetis/Kconfig @@ -131,42 +131,42 @@ config KINETIS_FLEXBUS config KINETIS_UART0 bool "UART0" default n - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER ---help--- Support UART0 config KINETIS_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER ---help--- Support UART1 config KINETIS_UART2 bool "UART2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER ---help--- Support UART2 config KINETIS_UART3 bool "UART3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER ---help--- Support UART3 config KINETIS_UART4 bool "UART4" default n - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER ---help--- Support UART4 config KINETIS_UART5 bool "UART5" default n - select ARCH_HAVE_UART5 + select UART5_SERIALDRIVER ---help--- Support UART5 diff --git a/arch/arm/src/kinetis/kinetis_clockconfig.c b/arch/arm/src/kinetis/kinetis_clockconfig.c index dc2fe0482bf..7221b9dc6e7 100644 --- a/arch/arm/src/kinetis/kinetis_clockconfig.c +++ b/arch/arm/src/kinetis/kinetis_clockconfig.c @@ -1,8 +1,7 @@ /**************************************************************************** * arch/arm/src/kinetis/kinetis_clockconfig.c - * arch/arm/src/chip/kinetis_clockconfig.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -66,14 +65,6 @@ void __ramfunc__ kinesis_setdividers(uint32_t div1, uint32_t div2, uint32_t div3, uint32_t div4); -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - /**************************************************************************** * Private Functions ****************************************************************************/ @@ -133,7 +124,11 @@ void kinetis_pllconfig(void) * RANGE = 2 (Oscillator of 8 MHz to 32 MHz) */ +#ifdef BOARD_EXTAL_LP + putreg8(MCG_C2_EREFS | MCG_C2_RANGE_VHIGH, KINETIS_MCG_C2); +#else putreg8(MCG_C2_EREFS | MCG_C2_HGO | MCG_C2_RANGE_VHIGH, KINETIS_MCG_C2); +#endif /* BOARD_EXTAL_LP */ #endif /* Released latched state of oscillator and GPIO */ @@ -156,7 +151,11 @@ void kinetis_pllconfig(void) * CLKS = 2 (Clock Source Select, External reference clock) */ +#ifdef BOARD_FRDIV + putreg8(BOARD_FRDIV | MCG_C1_CLKS_EXTREF, KINETIS_MCG_C1); +#else putreg8(MCG_C1_FRDIV_DIV256 | MCG_C1_CLKS_EXTREF, KINETIS_MCG_C1); +#endif /* If we aren't using an oscillator input we don't need to wait for the * oscillator to initialize diff --git a/arch/arm/src/kinetis/kinetis_enet.c b/arch/arm/src/kinetis/kinetis_enet.c index 95e511546ff..0a05346055e 100644 --- a/arch/arm/src/kinetis/kinetis_enet.c +++ b/arch/arm/src/kinetis/kinetis_enet.c @@ -165,9 +165,9 @@ struct kinetis_driver_s struct enet_desc_s *txdesc; /* A pointer to the list of TX descriptor */ struct enet_desc_s *rxdesc; /* A pointer to the list of RX descriptors */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ /* The DMA descriptors. A unaligned uint8_t is used to allocate the * memory; 16 is added to assure that we can meet the descriptor alignment @@ -435,7 +435,7 @@ static int kinetis_transmit(FAR struct kinetis_driver_s *priv) * Function: kinetis_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -731,7 +731,7 @@ static void kinetis_txdone(FAR struct kinetis_driver_s *priv) putreg32(regval, KINETIS_ENET_EIMR); } - /* There should be space for a new TX in any event. Poll uIP for new XMIT + /* There should be space for a new TX in any event. Poll the network for new XMIT * data */ @@ -848,7 +848,7 @@ static void kinetis_txtimeout(int argc, uint32_t arg, ...) (void)kinetis_ifdown(&priv->dev); (void)kinetis_ifup(&priv->dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->dev, kinetis_txpoll); } @@ -881,7 +881,7 @@ static void kinetis_polltimer(int argc, uint32_t arg, ...) if (!kinetics_txringfull(priv)) { - /* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm.. + /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm.. * might be bug here. Does this mean if there is a transmit in progress, * we will missing TCP time state updates? */ @@ -1112,7 +1112,7 @@ static int kinetis_txavail(struct net_driver_s *dev) if (!kinetics_txringfull(priv)) { - /* No, there is space for another transfer. Poll uIP for new + /* No, there is space for another transfer. Poll the network for new * XMIT data. */ diff --git a/arch/arm/src/kinetis/kinetis_usbdev.c b/arch/arm/src/kinetis/kinetis_usbdev.c new file mode 100644 index 00000000000..6bb47d5e3bb --- /dev/null +++ b/arch/arm/src/kinetis/kinetis_usbdev.c @@ -0,0 +1,4692 @@ +/**************************************************************************** + * arch/arm/src/kinetis/kinetis_usbdev.c + * + * Copyright (C) 2011-2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * References: + * This file derives from the STM32 USB device driver with modifications + * based on additional information from: + * + * - "USB On-The-Go (OTG)", DS61126E, Microchip Technology Inc., 2009 + * - Sample code provided with the Sure Electronics PIC32 board + * (which seems to have derived from Microchip PICDEM PIC18 code). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include + +#include "up_arch.h" +#include "kinetis.h" +#include "kinetis_usbotg.h" +#include "kinetis_sim.h" +#include "kinetis_fmc.h" + +#if defined(CONFIG_USBDEV) && defined(CONFIG_KINETIS_USBOTG) + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configuration ************************************************************/ + +#ifndef CONFIG_USBDEV_EP0_MAXSIZE +# define CONFIG_USBDEV_EP0_MAXSIZE 64 +#endif + +/* Extremely detailed register/BDT debug that you would normally never want + * enabled. + */ + +#ifndef CONFIG_DEBUG +# undef CONFIG_KHCI_USBDEV_REGDEBUG +# undef CONFIG_KHCI_USBDEV_BDTDEBUG +#endif + +/* Disable this logic because it is buggy. It works most of the time but + * has some lurking issues that keep this higher performance solution from + * being usable. + */ + +#undef CONFIG_USBDEV_NOREADAHEAD /* Makes no difference */ + +#undef CONFIG_USBDEV_NOWRITEAHEAD +#define CONFIG_USBDEV_NOWRITEAHEAD 1 /* Fixes some problems with IN transfers */ + +/* Interrupts ***************************************************************/ +/* Initial interrupt sets */ + +#ifdef CONFIG_USB_SOFINTS +# define USB_SOF_INTERRUPT USB_INT_SOFTOK +#else +# define USB_SOF_INTERRUPT 0 +#endif + +#define ERROR_INTERRUPTS (USB_ERRSTAT_PIDERR | USB_ERRSTAT_CRC5EOF | \ + USB_ERRSTAT_CRC16 | USB_ERRSTAT_DFN8 | USB_ERRSTAT_BTOERR | \ + USB_ERRSTAT_BTSERR) + +#define NORMAL_INTERRUPTS (USB_INT_USBRST | USB_INT_ERROR | USB_SOF_INTERRUPT | \ + USB_INT_TOKDNE | USB_INT_SLEEP | USB_INT_STALL) + +/* Endpoints ****************************************************************/ + +#define USB_STAT_ENDPT(n) ((n) << USB_STAT_ENDP_SHIFT) /* Endpoint n, n=0..15 */ + +#define USB_STAT_ODD_ODD USB_STAT_ODD /* The last transaction was to the ODD BD bank */ +#define USB_STAT_ODD_EVEN 0 /* The last transaction was to the EVEN BD bank */ + +#define USB_STAT_TX_IN USB_STAT_TX /* Last transaction was a transmit transfer (TX) */ +#define USB_STAT_TX_OUT 0 /* Last transaction was a receive transfer (RX) */ + +#define KHCI_NENDPOINTS (16) +#define EP0 (0) + +#define KHCI_ENDP_BIT(ep) (1 << (ep)) +#define KHCI_ENDP_ALLSET 0xffff + +#define SIM_CLKDIV2_USBDIV(n) (uint32_t)(((n) & 0x07) << 1) + +/* BDT Table Indexing. The BDT is addressed in the hardware as follows: + * + * Bits 9-31: These come the BDT address bits written into the BDTP3, + * BDTP2, and BDTP1 registers + * Bits 5-8: The endpoint number + * Bit 4: Direction: + * 1 = Transmit: SETUP/OUT for host, IN for function + * 0 = Receive: IN for host, SETUP/OUT for function + * Bit 3: PPBI, the ping point buffer index bit (0=EVEN, 1=ODD) + * Bits 0-2: Supports 8-byte BDT entries + */ + +#define EP0_OUT_EVEN (0) +#define EP0_OUT_ODD (1) +#define EP0_IN_EVEN (2) +#define EP0_IN_ODD (3) +#define EP_OUT_EVEN(ep) ((int)(ep) << 2) +#define EP_OUT_ODD(ep) (((int)(ep) << 2) + 1) +#define EP_IN_EVEN(ep) (((int)(ep) << 2) + 2) +#define EP_IN_ODD(ep) (((int)(ep) << 2) + 3) + +#define EP(ep,dir,pp) (((int)(ep) << 2) + ((int)(dir) << 1) + (int)(pp)) +#define EP_DIR_OUT 0 +#define EP_DIR_IN 1 +#define EP_PP_EVEN 0 +#define EP_PP_ODD 1 + +/* Packet sizes. We use a fixed 64 max packet size for all endpoint types */ + +#define KHCI_MAXPACKET_SHIFT (6) +#define KHCI_MAXPACKET_SIZE (1 << (KHCI_MAXPACKET_SHIFT)) + +#define KHCI_EP0MAXPACKET KHCI_MAXPACKET_SIZE + +/* Endpoint register initialization parameters */ + +#define KHCI_EP_CONTROL (USB_ENDPT_EPHSHK | USB_ENDPT_EPTXEN | USB_ENDPT_EPRXEN) +#define KHCI_EP_BULKIN (USB_ENDPT_EPTXEN | USB_ENDPT_EPCTLDIS | USB_ENDPT_EPHSHK) +#define KHCI_EP_BULKOUT (USB_ENDPT_EPRXEN | USB_ENDPT_EPCTLDIS | USB_ENDPT_EPHSHK) +#define KHCI_EP_INTIN (USB_ENDPT_EPTXEN | USB_ENDPT_EPCTLDIS | USB_ENDPT_EPHSHK) +#define KHCI_EP_INTOUT (USB_ENDPT_EPRXEN | USB_ENDPT_EPCTLDIS | USB_ENDPT_EPHSHK) +#define KHCI_EP_ISOCIN (USB_ENDPT_EPTXEN | USB_ENDPT_EPCTLDIS) +#define KHCI_EP_ISOCOUT (USB_ENDPT_EPRXEN | USB_ENDPT_EPCTLDIS) + +/* USB-related masks */ + +#define REQRECIPIENT_MASK (USB_REQ_TYPE_MASK | USB_REQ_RECIPIENT_MASK) + +/* Request queue operations *************************************************/ + +#define khci_rqempty(q) ((q)->head == NULL) +#define khci_rqhead(q) ((q)->head) +#define khci_rqtail(q) ((q)->tail) + +#define RESTART_DELAY (150 * CLOCKS_PER_SEC / 1000) + +/* USB trace ****************************************************************/ +/* Trace error codes */ + +#define KHCI_TRACEERR_ALLOCFAIL 0x0001 +#define KHCI_TRACEERR_BADCLEARFEATURE 0x0002 +#define KHCI_TRACEERR_BADDEVGETSTATUS 0x0003 +#define KHCI_TRACEERR_BADEPGETSTATUS 0x0004 +#define KHCI_TRACEERR_BADEPNO 0x0005 +#define KHCI_TRACEERR_BADEPTYPE 0x0006 +#define KHCI_TRACEERR_BADGETCONFIG 0x0007 +#define KHCI_TRACEERR_BADGETSETDESC 0x0008 +#define KHCI_TRACEERR_BADGETSTATUS 0x0009 +#define KHCI_TRACEERR_BADSETADDRESS 0x000a +#define KHCI_TRACEERR_BADSETCONFIG 0x000b +#define KHCI_TRACEERR_BADSETFEATURE 0x000c +#define KHCI_TRACEERR_BINDFAILED 0x000d +#define KHCI_TRACEERR_DISPATCHSTALL 0x000e +#define KHCI_TRACEERR_DRIVER 0x000f +#define KHCI_TRACEERR_DRIVERREGISTERED 0x0010 +#define KHCI_TRACEERR_EP0SETUPSTALLED 0x0011 +#define KHCI_TRACEERR_EPDISABLED 0x0012 +#define KHCI_TRACEERR_EPOUTNULLPACKET 0x0013 +#define KHCI_TRACEERR_EPRESERVE 0x0014 +#define KHCI_TRACEERR_INVALIDCTRLREQ 0x0015 +#define KHCI_TRACEERR_INVALIDPARMS 0x0016 +#define KHCI_TRACEERR_IRQREGISTRATION 0x0017 +#define KHCI_TRACEERR_NOTCONFIGURED 0x0018 +#define KHCI_TRACEERR_REQABORTED 0x0019 +#define KHCI_TRACEERR_INVALIDSTATE 0x001a + +/* Trace interrupt codes */ + +#define KHCI_TRACEINTID_CLEARFEATURE 0x0001 +#define KHCI_TRACEINTID_DEVGETSTATUS 0x0002 +#define KHCI_TRACEINTID_DISPATCH 0x0003 +#define KHCI_TRACEINTID_EP0IN 0x0004 +#define KHCI_TRACEINTID_EP0INDONE 0x0005 +#define KHCI_TRACEINTID_EP0OUTDONE 0x0006 +#define KHCI_TRACEINTID_EP0SETUPDONE 0x0007 +#define KHCI_TRACEINTID_EP0SETUPSETADDRESS 0x0008 +#define KHCI_TRACEINTID_EP0ADDRESSSET 0x0009 +#define KHCI_TRACEINTID_EPGETSTATUS 0x000a +#define KHCI_TRACEINTID_EPINDONE 0x000b +#define KHCI_TRACEINTID_EPINQEMPTY 0x000c +#define KHCI_TRACEINTID_EPOUTDONE 0x000d +#define KHCI_TRACEINTID_EPOUTQEMPTY 0x000e +#define KHCI_TRACEINTID_SOF 0x000f +#define KHCI_TRACEINTID_GETCONFIG 0x0010 +#define KHCI_TRACEINTID_GETSETDESC 0x0011 +#define KHCI_TRACEINTID_GETSETIF 0x0012 +#define KHCI_TRACEINTID_GETSTATUS 0x0013 +#define KHCI_TRACEINTID_IFGETSTATUS 0x0014 +#define KHCI_TRACEINTID_TRNC 0x0015 +#define KHCI_TRACEINTID_TRNCS 0x0016 +#define KHCI_TRACEINTID_INTERRUPT 0x0017 +#define KHCI_TRACEINTID_NOSTDREQ 0x0018 +#define KHCI_TRACEINTID_RESET 0x0019 +#define KHCI_TRACEINTID_SETCONFIG 0x001a +#define KHCI_TRACEINTID_SETFEATURE 0x001b +#define KHCI_TRACEINTID_IDLE 0x001c +#define KHCI_TRACEINTID_SYNCHFRAME 0x001d +#define KHCI_TRACEINTID_WKUP 0x001e +#define KHCI_TRACEINTID_T1MSEC 0x001f +#define KHCI_TRACEINTID_OTGID 0x0020 +#define KHCI_TRACEINTID_STALL 0x0021 +#define KHCI_TRACEINTID_UERR 0x0022 +#define KHCI_TRACEINTID_SUSPENDED 0x0023 +#define KHCI_TRACEINTID_WAITRESET 0x0024 + +#ifdef CONFIG_USBDEV_TRACE_STRINGS +const struct trace_msg_t g_usb_trace_strings_intdecode[] = +{ + TRACE_STR(KHCI_TRACEINTID_CLEARFEATURE ), /* 0x0001 */ + TRACE_STR(KHCI_TRACEINTID_DEVGETSTATUS ), /* 0x0002 */ + TRACE_STR(KHCI_TRACEINTID_DISPATCH ), /* 0x0003 */ + TRACE_STR(KHCI_TRACEINTID_EP0IN ), /* 0x0004 */ + TRACE_STR(KHCI_TRACEINTID_EP0INDONE ), /* 0x0005 */ + TRACE_STR(KHCI_TRACEINTID_EP0OUTDONE ), /* 0x0006 */ + TRACE_STR(KHCI_TRACEINTID_EP0SETUPDONE ), /* 0x0007 */ + TRACE_STR(KHCI_TRACEINTID_EP0SETUPSETADDRESS ), /* 0x0008 */ + TRACE_STR(KHCI_TRACEINTID_EP0ADDRESSSET ), /* 0x0009 */ + TRACE_STR(KHCI_TRACEINTID_EPGETSTATUS ), /* 0x000a */ + TRACE_STR(KHCI_TRACEINTID_EPINDONE ), /* 0x000b */ + TRACE_STR(KHCI_TRACEINTID_EPINQEMPTY ), /* 0x000c */ + TRACE_STR(KHCI_TRACEINTID_EPOUTDONE ), /* 0x000d */ + TRACE_STR(KHCI_TRACEINTID_EPOUTQEMPTY ), /* 0x000e */ + TRACE_STR(KHCI_TRACEINTID_SOF ), /* 0x000f */ + TRACE_STR(KHCI_TRACEINTID_GETCONFIG ), /* 0x0010 */ + TRACE_STR(KHCI_TRACEINTID_GETSETDESC ), /* 0x0011 */ + TRACE_STR(KHCI_TRACEINTID_GETSETIF ), /* 0x0012 */ + TRACE_STR(KHCI_TRACEINTID_GETSTATUS ), /* 0x0013 */ + TRACE_STR(KHCI_TRACEINTID_IFGETSTATUS ), /* 0x0014 */ + TRACE_STR(KHCI_TRACEINTID_TRNC ), /* 0x0015 */ + TRACE_STR(KHCI_TRACEINTID_TRNCS ), /* 0x0016 */ + TRACE_STR(KHCI_TRACEINTID_INTERRUPT ), /* 0x0017 */ + TRACE_STR(KHCI_TRACEINTID_NOSTDREQ ), /* 0x0018 */ + TRACE_STR(KHCI_TRACEINTID_RESET ), /* 0x0019 */ + TRACE_STR(KHCI_TRACEINTID_SETCONFIG ), /* 0x001a */ + TRACE_STR(KHCI_TRACEINTID_SETFEATURE ), /* 0x001b */ + TRACE_STR(KHCI_TRACEINTID_IDLE ), /* 0x001c */ + TRACE_STR(KHCI_TRACEINTID_SYNCHFRAME ), /* 0x001d */ + TRACE_STR(KHCI_TRACEINTID_WKUP ), /* 0x001e */ + TRACE_STR(KHCI_TRACEINTID_T1MSEC ), /* 0x001f */ + TRACE_STR(KHCI_TRACEINTID_OTGID ), /* 0x0020 */ + TRACE_STR(KHCI_TRACEINTID_STALL ), /* 0x0021 */ + TRACE_STR(KHCI_TRACEINTID_UERR ), /* 0x0022 */ + TRACE_STR(KHCI_TRACEINTID_SUSPENDED ), /* 0x0023 */ + TRACE_STR(KHCI_TRACEINTID_WAITRESET ), /* 0x0024 */ + TRACE_STR_END +}; +#endif + +#ifdef CONFIG_USBDEV_TRACE_STRINGS +const struct trace_msg_t g_usb_trace_strings_deverror[] = +{ + TRACE_STR(KHCI_TRACEERR_ALLOCFAIL ), /* 0x0001 */ + TRACE_STR(KHCI_TRACEERR_BADCLEARFEATURE ), /* 0x0002 */ + TRACE_STR(KHCI_TRACEERR_BADDEVGETSTATUS ), /* 0x0003 */ + TRACE_STR(KHCI_TRACEERR_BADEPGETSTATUS ), /* 0x0004 */ + TRACE_STR(KHCI_TRACEERR_BADEPNO ), /* 0x0005 */ + TRACE_STR(KHCI_TRACEERR_BADEPTYPE ), /* 0x0006 */ + TRACE_STR(KHCI_TRACEERR_BADGETCONFIG ), /* 0x0007 */ + TRACE_STR(KHCI_TRACEERR_BADGETSETDESC ), /* 0x0008 */ + TRACE_STR(KHCI_TRACEERR_BADGETSTATUS ), /* 0x0009 */ + TRACE_STR(KHCI_TRACEERR_BADSETADDRESS ), /* 0x000a */ + TRACE_STR(KHCI_TRACEERR_BADSETCONFIG ), /* 0x000b */ + TRACE_STR(KHCI_TRACEERR_BADSETFEATURE ), /* 0x000c */ + TRACE_STR(KHCI_TRACEERR_BINDFAILED ), /* 0x000d */ + TRACE_STR(KHCI_TRACEERR_DISPATCHSTALL ), /* 0x000e */ + TRACE_STR(KHCI_TRACEERR_DRIVER ), /* 0x000f */ + TRACE_STR(KHCI_TRACEERR_DRIVERREGISTERED ), /* 0x0010 */ + TRACE_STR(KHCI_TRACEERR_EP0SETUPSTALLED ), /* 0x0011 */ + TRACE_STR(KHCI_TRACEERR_EPDISABLED ), /* 0x0012 */ + TRACE_STR(KHCI_TRACEERR_EPOUTNULLPACKET ), /* 0x0013 */ + TRACE_STR(KHCI_TRACEERR_EPRESERVE ), /* 0x0014 */ + TRACE_STR(KHCI_TRACEERR_INVALIDCTRLREQ ), /* 0x0015 */ + TRACE_STR(KHCI_TRACEERR_INVALIDPARMS ), /* 0x0016 */ + TRACE_STR(KHCI_TRACEERR_IRQREGISTRATION ), /* 0x0017 */ + TRACE_STR(KHCI_TRACEERR_NOTCONFIGURED ), /* 0x0018 */ + TRACE_STR(KHCI_TRACEERR_REQABORTED ), /* 0x0019 */ + TRACE_STR(KHCI_TRACEERR_INVALIDSTATE ), /* 0x001a */ + TRACE_STR_END +}; +#endif + +/* Misc Helper Macros *******************************************************/ + +/* Ever-present MIN and MAX macros */ + +#ifndef MIN +# define MIN(a,b) (a < b ? a : b) +#endif + +#ifndef MAX +# define MAX(a,b) (a > b ? a : b) +#endif + +/* Byte ordering in host-based values */ + +#ifdef CONFIG_ENDIAN_BIG +# define LSB 1 +# define MSB 0 +#else +# define LSB 0 +# define MSB 1 +#endif + +/* Debug ********************************************************************/ +/* CONFIG_KHCI_USBDEV_REGDEBUG enables dumping of all low-level register + * access and BDT accesses. Normally, this generates so much debug output + * that USB may not even be functional. + */ + +#ifdef CONFIG_KHCI_USBDEV_REGDEBUG + +# undef CONFIG_KHCI_USBDEV_BDTDEBUG +# define CONFIG_KHCI_USBDEV_BDTDEBUG 1 + +# define regdbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define regvdbg lldbg +# else +# define regvdbg(x...) +# endif + +#else + +# define khci_getreg(addr) getreg8(addr) +# define khci_putreg(val,addr) putreg8(val,addr) +# define regdbg(x...) +# define regvdbg(x...) + +#endif + +/* CONFIG_KHCI_USBDEV_BDTDEBUG dumps most BDT settings */ + +#ifdef CONFIG_KHCI_USBDEV_BDTDEBUG + +# define bdtdbg lldbg +# ifdef CONFIG_DEBUG_VERBOSE +# define bdtvdbg lldbg +# else +# define bdtvdbg(x...) +# endif + +#else + +# define bdtdbg(x...) +# define bdtvdbg(x...) + +#endif + +/**************************************************************************** + * Private Type Definitions + ****************************************************************************/ + +/* Overvall device state */ + +enum khci_devstate_e +{ + DEVSTATE_DETACHED = 0, /* Not connected to a host */ + DEVSTATE_ATTACHED, /* Connected to a host */ + DEVSTATE_POWERED, /* Powered */ + DEVSTATE_DEFAULT, /* Default state */ + DEVSTATE_ADDRPENDING, /* Waiting for an address */ + DEVSTATE_ADDRESS, /* Address received */ + DEVSTATE_CONFIGURED, /* Configuration received */ +}; + +/* The various states of the control pipe */ + +enum khci_ctrlstate_e +{ + CTRLSTATE_WAITSETUP = 0, /* No request in progress, waiting for setup */ + CTRLSTATE_RDREQUEST, /* Read request (OUT) in progress */ + CTRLSTATE_WRREQUEST, /* Write request (IN) in progress */ + CTRLSTATE_STALL, /* EP0 stall requested */ + CTRLSTATE_STALLED /* EP0 is stalled */ +}; + +union wb_u +{ + uint16_t w; + uint8_t b[2]; +}; + +/* A container for a request so that the request make be retained in a + * singly-linked list. + */ + +struct khci_req_s +{ + struct usbdev_req_s req; /* Standard USB request */ +#ifdef CONFIG_USBDEV_NOWRITEAHEAD + uint16_t inflight[1]; /* The number of bytes "in-flight" */ +#else + uint16_t inflight[2]; /* The number of bytes "in-flight" */ +#endif + struct khci_req_s *flink; /* Supports a singly linked list */ +}; + +/* This structure represents the 'head' of a singly linked list of requests */ + +struct khci_queue_s +{ + struct khci_req_s *head; /* Head of the request queue */ + struct khci_req_s *tail; /* Tail of the request queue */ +}; + +/* This is the internal representation of an endpoint */ + +struct khci_ep_s +{ + /* Common endpoint fields. This must be the first thing defined in the + * structure so that it is possible to simply cast from struct usbdev_ep_s + * to struct khci_ep_s. + */ + + struct usbdev_ep_s ep; /* Standard endpoint structure */ + + /* KHCI-specific fields */ + + struct khci_usbdev_s *dev; /* Reference to private driver data */ + struct khci_queue_s pend; /* List of pending (inactive) requests for this endpoint */ + struct khci_queue_s active; /* List of active requests for this endpoint */ + uint8_t stalled:1; /* true: Endpoint is stalled */ + uint8_t halted:1; /* true: Endpoint feature halted */ + uint8_t txnullpkt:1; /* Null packet needed at end of TX transfer */ + uint8_t txdata1:1; /* Data0/1 of next TX transfer */ + uint8_t rxdata1:1; /* Data0/1 of next RX transfer */ + volatile struct usbotg_bdtentry_s *bdtin; /* BDT entry for the IN transaction */ + volatile struct usbotg_bdtentry_s *bdtout; /* BDT entry for the OUT transaction */ +}; + +struct khci_usbdev_s +{ + /* Common device fields. This must be the first thing defined in the + * structure so that it is possible to simply cast from struct usbdev_s + * to structkhci_usbdev_s. + */ + + struct usbdev_s usbdev; + + /* The bound device class driver */ + + struct usbdevclass_driver_s *driver; + + /* KHCI-specific fields */ + + struct usb_ctrlreq_s ctrl; /* Last EP0 request */ + uint8_t devstate; /* Driver state (see enum khci_devstate_e) */ + uint8_t ctrlstate; /* Control EP state (see enum khci_ctrlstate_e) */ + uint8_t selfpowered:1; /* 1: Device is self powered */ + uint8_t rwakeup:1; /* 1: Device supports remote wakeup */ + uint8_t attached:1; /* Device is attached to the host */ + uint8_t ep0done:1; /* EP0 OUT already prepared */ + uint8_t rxbusy:1; /* EP0 OUT data transfer in progress */ + uint16_t epavail; /* Bitset of available endpoints */ + uint16_t epstalled; /* Bitset of stalled endpoints */ + WDOG_ID wdog; /* Supports the restart delay */ + + /* The endpoint list */ + + struct khci_ep_s eplist[KHCI_NENDPOINTS]; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Register operations ******************************************************/ + +#ifdef CONFIG_KHCI_USBDEV_REGDEBUG +static uint16_t khci_getreg(uint32_t addr); +static void khci_putreg(uint32_t val, uint32_t addr); +#endif + +/* Suspend/Resume Helpers ***************************************************/ + +static void khci_suspend(struct khci_usbdev_s *priv); +static void khci_resume(struct khci_usbdev_s *priv); + +/* Request Queue Management *************************************************/ + +static struct khci_req_s *khci_remfirst(struct khci_queue_s *queue); +static struct khci_req_s *khci_remlast(struct khci_queue_s *queue); +static void khci_addlast(struct khci_queue_s *queue, + struct khci_req_s *req); +static void khci_addfirst(struct khci_queue_s *queue, + struct khci_req_s *req); + +/* Request Helpers **********************************************************/ + +static void khci_reqreturn(struct khci_ep_s *privep, + struct khci_req_s *privreq, int16_t result); +static void khci_reqcomplete(struct khci_ep_s *privep, + int16_t result); +static void khci_epwrite(struct khci_ep_s *privep, + volatile struct usbotg_bdtentry_s *bdt, + const uint8_t *src, uint32_t nbytes); +static void khci_wrcomplete(struct khci_usbdev_s *priv, + struct khci_ep_s *privep); +static void khci_rqrestart(int argc, uint32_t arg1, ...); +static void khci_delayedrestart(struct khci_usbdev_s *priv, + uint8_t epno); +static void khci_rqstop(struct khci_ep_s *privep); +static int khci_wrstart(struct khci_usbdev_s *priv, + struct khci_ep_s *privep); +static int khci_wrrequest(struct khci_usbdev_s *priv, + struct khci_ep_s *privep); +static int khci_rdcomplete(struct khci_usbdev_s *priv, + struct khci_ep_s *privep); +static int khci_ep0rdsetup(struct khci_usbdev_s *priv, + uint8_t *dest, int readlen); +static int khci_rdsetup(struct khci_ep_s *privep, uint8_t *dest, + int readlen); +static int khci_rdrequest(struct khci_usbdev_s *priv, + struct khci_ep_s *privep); +static void khci_cancelrequests(struct khci_ep_s *privep, + int16_t result); + +/* Interrupt level processing ***********************************************/ + +static void khci_dispatchrequest(struct khci_usbdev_s *priv); +static void khci_ep0stall(struct khci_usbdev_s *priv); +static void khci_eptransfer(struct khci_usbdev_s *priv, uint8_t epno, + uint16_t ustat); +static void khci_ep0nextsetup(struct khci_usbdev_s *priv); +static void khci_ep0rdcomplete(struct khci_usbdev_s *priv); +static void khci_ep0setup(struct khci_usbdev_s *priv); +static void khci_ep0outcomplete(struct khci_usbdev_s *priv); +static void khci_ep0incomplete(struct khci_usbdev_s *priv); +static void khci_ep0transfer(struct khci_usbdev_s *priv, + uint16_t ustat); +static int khci_interrupt(int irq, void *context); + +/* Endpoint helpers *********************************************************/ + +static inline struct khci_ep_s * + khci_epreserve(struct khci_usbdev_s *priv, uint8_t epset); +static inline void + khci_epunreserve(struct khci_usbdev_s *priv, + struct khci_ep_s *privep); +static inline bool + khci_epreserved(struct khci_usbdev_s *priv, int epno); +static void khci_ep0configure(struct khci_usbdev_s *priv); + +/* Endpoint operations ******************************************************/ + +static int khci_epconfigure(struct usbdev_ep_s *ep, + const struct usb_epdesc_s *desc, bool last); +static int khci_epdisable(struct usbdev_ep_s *ep); +static struct usbdev_req_s * + khci_epallocreq(struct usbdev_ep_s *ep); +static void khci_epfreereq(struct usbdev_ep_s *ep, + struct usbdev_req_s *); +static int khci_epsubmit(struct usbdev_ep_s *ep, + struct usbdev_req_s *req); +static int khci_epcancel(struct usbdev_ep_s *ep, + struct usbdev_req_s *req); +static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, + bool epin); +static int khci_epstall(struct usbdev_ep_s *ep, bool resume); + +/* USB device controller operations *****************************************/ + +static struct usbdev_ep_s * + khci_allocep(struct usbdev_s *dev, uint8_t epno, bool in, + uint8_t eptype); +static void khci_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep); +static int khci_getframe(struct usbdev_s *dev); +static int khci_wakeup(struct usbdev_s *dev); +static int khci_selfpowered(struct usbdev_s *dev, bool selfpowered); + +/* Initialization/Reset *****************************************************/ + +static void khci_reset(struct khci_usbdev_s *priv); +static void khci_attach(struct khci_usbdev_s *priv); +static void khci_detach(struct khci_usbdev_s *priv); +static void khci_swreset(struct khci_usbdev_s *priv); +static void khci_hwreset(struct khci_usbdev_s *priv); +static void khci_stateinit(struct khci_usbdev_s *priv); +static void khci_hwshutdown(struct khci_usbdev_s *priv); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Since there is only a single USB interface, all status information can be + * be simply retained in a single global instance. + */ + +static struct khci_usbdev_s g_usbdev; + +static const struct usbdev_epops_s g_epops = +{ + .configure = khci_epconfigure, + .disable = khci_epdisable, + .allocreq = khci_epallocreq, + .freereq = khci_epfreereq, + .submit = khci_epsubmit, + .cancel = khci_epcancel, + .stall = khci_epstall, +}; + +static const struct usbdev_ops_s g_devops = +{ + .allocep = khci_allocep, + .freeep = khci_freeep, + .getframe = khci_getframe, + .wakeup = khci_wakeup, + .selfpowered = khci_selfpowered, + .pullup = kinetis_usbpullup, +}; + +/* Buffer Descriptor Table. Four BDT entries per endpoint + * + * The BDT is addressed in the hardware as follows: + * + * Bits 9-31: These come the BDT address bits written into the BDTP3, BDTP2 + * and BDTP1 registers + * Bits 5-8: The endpoint number + * Bit 4: Direction (0=IN/Tx, 1 = OUT/Rx) + * Bit 3: PPBI, the ping point buffer index bit. + * Bits 0-2: Supports 8-byte BDT entries + */ + +static volatile struct usbotg_bdtentry_s g_bdt[4*KHCI_NENDPOINTS] + __attribute__ ((aligned(512))); + +/**************************************************************************** + * Private Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Register Operations + ****************************************************************************/ + + /**************************************************************************** + * Name: khci_getreg + ****************************************************************************/ + +#ifdef CONFIG_KHCI_USBDEV_REGDEBUG +static uint16_t khci_getreg(uint32_t addr) +{ + static uint32_t prevaddr = 0; + static uint32_t preval = 0; + static uint32_t count = 0; + + /* Read the value from the register */ + + uint16_t val = getreg8(addr); + + /* Is this the same value that we read from the same register last time? + * Are we polling the register? If so, suppress some of the output. + */ + + if (addr == prevaddr && val == preval) + { + if (count == 0xffffffff || ++count > 3) + { + if (count == 4) + { + lldbg("...\n"); + } + return val; + } + } + + /* No this is a new address or value */ + + else + { + /* Did we print "..." for the previous value? */ + + if (count > 3) + { + /* Yes.. then show how many times the value repeated */ + + lldbg("[repeats %d more times]\n", count-3); + } + + /* Save the new address, value, and count */ + + prevaddr = addr; + preval = val; + count = 1; + } + + /* Show the register value read */ + + lldbg("%08x->%04x\n", addr, val); + return val; +} +#endif + +/**************************************************************************** + * Name: khci_putreg + ****************************************************************************/ + +#ifdef CONFIG_KHCI_USBDEV_REGDEBUG +static void khci_putreg(uint32_t val, uint32_t addr) +{ + /* Show the register value being written */ + + lldbg("%08x<-%04x\n", addr, val); + + /* Write the value */ + + putreg8(val, addr); +} +#endif + +/**************************************************************************** + * Request Helpers + ****************************************************************************/ + +/**************************************************************************** + * Name: khci_remfirst + ****************************************************************************/ + +static struct khci_req_s *khci_remfirst(struct khci_queue_s *queue) +{ + struct khci_req_s *ret = queue->head; + + if (ret) + { + queue->head = ret->flink; + if (!queue->head) + { + queue->tail = NULL; + } + + ret->flink = NULL; + } + + return ret; +} + + +/**************************************************************************** + * Name: khci_remlast + ****************************************************************************/ + +static struct khci_req_s *khci_remlast(struct khci_queue_s *queue) +{ + struct khci_req_s *prev; + struct khci_req_s *ret = queue->tail; + + ret = queue->tail; + if (ret) + { + if (queue->head == queue->tail) + { + queue->head = NULL; + queue->tail = NULL; + } + else + { + for (prev = queue->head; + prev && prev->flink != ret; + prev = prev->flink); + + if (prev) + { + prev->flink = NULL; + queue->tail = prev; + } + } + + ret->flink = NULL; + } + + return ret; +} + +/**************************************************************************** + * Name: khci_addlast + ****************************************************************************/ + +static void khci_addlast(struct khci_queue_s *queue, struct khci_req_s *req) +{ + req->flink = NULL; + if (!queue->head) + { + queue->head = req; + queue->tail = req; + } + else + { + queue->tail->flink = req; + queue->tail = req; + } +} + +/**************************************************************************** + * Name: khci_addfirst + ****************************************************************************/ + +static void khci_addfirst(struct khci_queue_s *queue, struct khci_req_s *req) +{ + req->flink = queue->head; + if (!queue->head) + { + queue->tail = req; + } + + queue->head = req; +} + +/**************************************************************************** + * Name: khci_reqreturn + ****************************************************************************/ + +static void khci_reqreturn(struct khci_ep_s *privep, + struct khci_req_s *privreq, int16_t result) +{ + /* If endpoint 0, temporarily reflect the state of protocol stalled + * in the callback. + */ + + bool stalled = privep->stalled; + if (USB_EPNO(privep->ep.eplog) == EP0) + { + privep->stalled = (privep->dev->ctrlstate == CTRLSTATE_STALLED); + } + + /* Save the result in the request structure */ + + privreq->req.result = result; + + /* Callback to the request completion handler */ + + privreq->flink = NULL; + privreq->req.callback(&privep->ep, &privreq->req); + + /* Restore the stalled indication */ + + privep->stalled = stalled; +} + +/**************************************************************************** + * Name: khci_reqcomplete + ****************************************************************************/ + +static void khci_reqcomplete(struct khci_ep_s *privep, int16_t result) +{ + struct khci_req_s *privreq; + irqstate_t flags; + + /* Remove the completed request at the head of the endpoint's active + * request list. + */ + + flags = enter_critical_section(); + privreq = khci_remfirst(&privep->active); + leave_critical_section(flags); + + if (privreq) + { + /* Return the request to the class driver */ + + khci_reqreturn(privep, privreq, result); + } +} + +/**************************************************************************** + * Name: khci_epwrite + ****************************************************************************/ + +static void khci_epwrite(struct khci_ep_s *privep, + volatile struct usbotg_bdtentry_s *bdt, + const uint8_t *src, uint32_t nbytes) +{ + uint32_t status; + + usbtrace(TRACE_WRITE(USB_EPNO(privep->ep.eplog)), nbytes); + + /* Clear all bits in the status (assuring that we own the BDT) */ + + bdt->status = 0; + + /* Get the correct data toggle (as well as other BDT bits) */ + + if (privep->txdata1) + { + status = (USB_BDT_UOWN | USB_BDT_DATA1 | USB_BDT_DTS); + privep->txdata1 = 0; + } + else + { + status = (USB_BDT_UOWN | USB_BDT_DATA0 | USB_BDT_DTS); + privep->txdata1 = 1; + } + + /* Set the data pointer and data length */ + + bdt->addr = (uint8_t *)src; + status |= (nbytes << USB_BDT_BYTECOUNT_SHIFT) | USB_BDT_DTS; + + /* And, finally, give the BDT to the USB */ + + bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", + USB_EPNO(privep->ep.eplog), bdt, status, bdt->addr); + + bdt->status = status; +} + +/**************************************************************************** + * Name: khci_wrcomplete + ****************************************************************************/ + +static void khci_wrcomplete(struct khci_usbdev_s *priv, + struct khci_ep_s *privep) +{ + volatile struct usbotg_bdtentry_s *bdtin; + struct khci_req_s *privreq; + int bytesleft; + int epno; + + /* Check the request at the head of the endpoint's active request queue. + * Since we got here from a write completion event, the active request queue + * should not be empty. + */ + + privreq = khci_rqhead(&privep->active); + DEBUGASSERT(privreq != NULL); + + /* An outgoing IN packet has completed. bdtin should point to the BDT + * that just completed. + */ + + bdtin = privep->bdtin; + epno = USB_EPNO(privep->ep.eplog); + +#ifdef CONFIG_USBDEV_NOWRITEAHEAD + ullvdbg("EP%d: len=%d xfrd=%d inflight=%d\n", + epno, privreq->req.len, privreq->req.xfrd, privreq->inflight[0]); +#else + ullvdbg("EP%d: len=%d xfrd=%d inflight={%d, %d}\n", + epno, privreq->req.len, privreq->req.xfrd, + privreq->inflight[0], privreq->inflight[1]); +#endif + bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", + epno, bdtin, bdtin->status, bdtin->addr); + + /* We should own the BDT that just completed. But NULLify the entire BDT IN. + * Why? So that we can tell later that the BDT available. No, it is not + * sufficient to look at the UOWN bit. If UOWN==0, then the transfer has + * been completed BUT it may not yet have been processed. But a completely + * NULLified BDT is a sure indication + */ + + DEBUGASSERT((bdtin->status & USB_BDT_UOWN) == USB_BDT_COWN); + bdtin->status = 0; + bdtin->addr = 0; + + /* Toggle bdtin to the other BDT. Is the current bdtin the EVEN bdt? */ + + privep->bdtin = &g_bdt[EP_IN_EVEN(epno)]; + if (bdtin == privep->bdtin) + { + /* Yes.. Then the other BDT is the ODD BDT */ + + privep->bdtin++; + } + + /* Update the number of bytes transferred. */ + + privreq->req.xfrd += privreq->inflight[0]; +#ifdef CONFIG_USBDEV_NOWRITEAHEAD + privreq->inflight[0] = 0; +#else + privreq->inflight[0] = privreq->inflight[1]; + privreq->inflight[1] = 0; +#endif + bytesleft = privreq->req.len - privreq->req.xfrd; + + /* If all of the bytes were sent (bytesleft == 0) and no NULL packet is + * needed (!txnullpkt), then we are finished with the transfer + */ + + if (bytesleft == 0 && !privep->txnullpkt) + { + /* The transfer is complete. Give the completed request back to + * the class driver. + */ + + usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); + khci_reqcomplete(privep, OK); + + /* Special case writes to endpoint zero. If there is no transfer in + * progress, then we need to configure to received the next SETUP packet. + */ + + if (USB_EPNO(privep->ep.eplog) == 0) + { + priv->ctrlstate = CTRLSTATE_WAITSETUP; + } + } +} + +/**************************************************************************** + * Name: khci_rqrestart + ****************************************************************************/ + +static void khci_rqrestart(int argc, uint32_t arg1, ...) +{ + struct khci_usbdev_s *priv; + struct khci_ep_s *privep; + struct khci_req_s *privreq; + uint16_t epstalled; + uint16_t mask; + int epno; + + /* Recover the pointer to the driver structure */ + + priv = (struct khci_usbdev_s *)((uintptr_t)arg1); + DEBUGASSERT(priv != NULL); + + /* Sample and clear the set of endpoints that have recovered from a stall */ + + epstalled = priv->epstalled; + priv->epstalled = 0; + + /* Loop, checking each bit in the epstalled bit set */ + + for (epno = 0; epstalled && epno < KHCI_NENDPOINTS; epno++) + { + /* Has this encpoint recovered from a stall? */ + + mask = (1 << epno); + if ((epstalled & mask) != 0) + { + /* Yes, this endpoint needs to be restarteed */ + + epstalled &= ~mask; + privep = &priv->eplist[epno]; + + /* Reset some endpoint state variables */ + + privep->stalled = false; + privep->txnullpkt = false; + + /* Check the request at the head of the endpoint's pending request queue */ + + privreq = khci_rqhead(&privep->pend); + if (privreq) + { + /* Restart transmission after we have recovered from a stall */ + + privreq->req.xfrd = 0; + privreq->inflight[0] = 0; +#ifndef CONFIG_USBDEV_NOWRITEAHEAD + privreq->inflight[1] = 0; +#endif + (void)khci_wrrequest(priv, privep); + } + } + } +} + +/**************************************************************************** + * Name: khci_delayedrestart + ****************************************************************************/ + +static void khci_delayedrestart(struct khci_usbdev_s *priv, uint8_t epno) +{ + /* Add endpoint to the set of endpoints that need to be restarted */ + + priv->epstalled |= (1 << epno); + + /* And start (or re-start) the watchdog timer */ + + wd_start(priv->wdog, RESTART_DELAY, khci_rqrestart, 1, (uint32_t)priv); +} + +/**************************************************************************** + * Name: khci_rqstop + ****************************************************************************/ + +static void khci_rqstop(struct khci_ep_s *privep) +{ + struct khci_req_s *privreq; + + /* Move all of the active requests back to the pending request queue */ + + while ((privreq = khci_remlast(&privep->active))) + { + /* Move the request back to the head of the pending list */ + + khci_addfirst(&privep->pend, privreq); + } +} + +/**************************************************************************** + * Name: khci_wrstart + ****************************************************************************/ + +static int khci_wrstart(struct khci_usbdev_s *priv, + struct khci_ep_s *privep) +{ + volatile struct usbotg_bdtentry_s *bdt; + struct khci_req_s *privreq; + uint8_t *buf; + uint8_t epno; + int nbytes; + int bytesleft; + int xfrd; + int index; + + /* We get here when either (1) an IN endpoint completion interrupt occurs, + * or (2) a new write request is reqeived from the class. + */ + + /* Get the endpoint number that we are servicing */ + + epno = USB_EPNO(privep->ep.eplog); + + /* Decide which BDT to use. bdtin points to the "current" BDT. That is, + * the one that either (1) available for next transfer, or (2) the one + * that is currently busy with the current transfer. If the current + * BDT is busy, we have the option of setting up the other BDT in advance + * in order to improve data transfer performance. + */ + + bdt = privep->bdtin; + index = 0; + + if (bdt->status || bdt->addr) + { +#ifdef CONFIG_USBDEV_NOWRITEAHEAD + /* The current BDT is not available and write ahead is disabled. There + * is nothing we can do now. Return -EBUSY to indicate this condition. + */ + + return -EBUSY; +#else + /* The current BDT is not available, check the other BDT */ + + volatile struct usbotg_bdtentry_s *otherbdt; + otherbdt = &g_bdt[EP(epno, EP_DIR_IN, EP_PP_EVEN)]; + if (otherbdt == bdt) + { + otherbdt++; + } + + /* Is it available? */ + + if (otherbdt->status || otherbdt->addr) + { + /* No, neither are available. We cannot perform the transfer now. + * Return -EBUSY to indicate this condition. + */ + + return -EBUSY; + } + + /* Yes... use the other BDT */ + + bdt = otherbdt; + index = 1; +#endif + } + + /* A BDT is available. Which request should we be operating on? The last + * incomplete, active request would be at the tail of the active list. + */ + + privreq = khci_rqtail(&privep->active); + + /* This request would be NULL if there is no incomplete, active request. */ + + if (privreq) + { + /* Get the number of bytes left to be transferred in the request */ + + xfrd = privreq->req.xfrd; + bytesleft = privreq->req.len - xfrd; + + /* Even if the request is incomplete, transfer of all the requested + * bytes may already been started. NOTE: inflight[1] should be zero + * because we know that there is a BDT available. + */ + +#ifndef CONFIG_USBDEV_NOWRITEAHEAD + DEBUGASSERT(privreq->inflight[1] == 0); +#endif + /* Has the transfer been initiated for all of the bytes? */ + + if (bytesleft > privreq->inflight[0]) + { + /* No.. we have more work to do with this request */ + + xfrd += privreq->inflight[0]; + bytesleft -= privreq->inflight[0]; + } + + /* Do we need to send a null packet after this packet? */ + + else if (privep->txnullpkt) + { + /* Yes... set up for the NULL packet transfer */ + + xfrd = privreq->req.len; + bytesleft = 0; + } + else + { + /* No.. We are finished with this request. We need to get the + * next request from the head of the pending request list. + */ + + privreq = NULL; + } + } + + /* If privreq is NULL here then either (1) there is no active request, or + * (2) the (only) active request is fully queued. In either case, we need + * to get the next request from the head of the pending request list. + */ + + if (!privreq) + { + /* Remove the next request from the head of the pending request list */ + + privreq = khci_remfirst(&privep->pend); + if (!privreq) + { + /* The pending request list is empty. There are no queued TX + * requests to be sent. + */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPINQEMPTY), epno); + + /* Return -ENODATA to indicate that there are no further requests + * to be processed. + */ + + return -ENODATA; + } + + /* Add this request to the tail of the active request list */ + + khci_addlast(&privep->active, privreq); + + /* Set up the first transfer for this request */ + + xfrd = 0; + bytesleft = privreq->req.len; + } + + ullvdbg("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n", + epno, privreq, privreq->req.len, xfrd, index, privep->txnullpkt); + + /* Get the number of bytes left to be sent in the packet */ + + nbytes = bytesleft; + if (nbytes > 0 || privep->txnullpkt) + { + /* Either send the maxpacketsize or all of the remaining data in + * the request. + */ + + privep->txnullpkt = 0; + if (nbytes >= privep->ep.maxpacket) + { + nbytes = privep->ep.maxpacket; + + /* Handle the case where this packet is exactly the + * maxpacketsize. Do we need to send a zero-length packet + * in this case? + */ + + if (bytesleft == privep->ep.maxpacket && + (privreq->req.flags & USBDEV_REQFLAGS_NULLPKT) != 0) + { + privep->txnullpkt = 1; + } + } + } + + /* Send the packet (might be a null packet with nbytes == 0) */ + + buf = privreq->req.buf + xfrd; + + /* Setup the writes to the endpoints */ + + khci_epwrite(privep, bdt, buf, nbytes); + + /* Special case endpoint 0 state information. The write request is in + * progress. + */ + + if (epno == 0) + { + priv->ctrlstate = CTRLSTATE_WRREQUEST; + } + + /* Update for the next data IN interrupt */ + + privreq->inflight[index] = nbytes; + return OK; +} + +/**************************************************************************** + * Name: khci_wrrequest + ****************************************************************************/ + +static int khci_wrrequest(struct khci_usbdev_s *priv, struct khci_ep_s *privep) +{ + int ret; + + /* Always try to start two transfers in order to take advantage of the + * KHCI's ping pong buffering. + */ + + ret = khci_wrstart(priv, privep); +#ifndef CONFIG_USBDEV_NOWRITEAHEAD + if (ret == OK) + { + /* Note: We need to return the error condition only if nothing was + * queued + */ + + (void)khci_wrstart(priv, privep); + } +#else + UNUSED(ret); +#endif + + /* We return OK to indicate that a write request is still in progress */ + + return khci_rqhead(&privep->active) == NULL ? -ENODATA : OK; +} + +/**************************************************************************** + * Name: khci_rdcomplete + ****************************************************************************/ + +static int khci_rdcomplete(struct khci_usbdev_s *priv, + struct khci_ep_s *privep) +{ + volatile struct usbotg_bdtentry_s *bdtout; + struct khci_req_s *privreq; + int epno; + + /* Check the request at the head of the endpoint's active request queue */ + + privreq = khci_rqhead(&privep->active); + if (!privreq) + { + /* There is no active packet waiting to receive any data. Then why are + * we here? + */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPOUTQEMPTY), + USB_EPNO(privep->ep.eplog)); + return -EINVAL; + } + + /* bdtout should point to the BDT that just completed */ + + bdtout = privep->bdtout; + epno = USB_EPNO(privep->ep.eplog); + + ullvdbg("EP%d: len=%d xfrd=%d\n", + epno, privreq->req.len, privreq->req.xfrd); + bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", + epno, bdtout, bdtout->status, bdtout->addr); + + /* We should own the BDT that just completed */ + + DEBUGASSERT((bdtout->status & USB_BDT_UOWN) == USB_BDT_COWN); + + /* Get the length of the data received from the BDT. */ + + privreq->req.xfrd = (bdtout->status & USB_BDT_BYTECOUNT_MASK) >> USB_BDT_BYTECOUNT_SHIFT; + + /* Complete the transfer and return the request to the class driver. */ + + usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); + khci_reqcomplete(privep, OK); + + /* Nullify the BDT entry that just completed. Why? So that we can tell later + * that the BDT has been processed. No, it is not sufficient to look at the + * UOWN bit. If UOWN==0, then the transfer has been completed BUT it may not + * yet have been processed. + */ + + bdtout->status = 0; + bdtout->addr = 0; + + /* Toggle bdtout to the other BDT. Is the current bdtout the EVEN bdt? */ + + privep->bdtout = &g_bdt[EP_OUT_EVEN(epno)]; + if (bdtout == privep->bdtout) + { + /* Yes.. Then the other BDT is the ODD BDT */ + + privep->bdtout++; + } + + /* Set up the next read operation */ + + return khci_rdrequest(priv, privep); +} + +/**************************************************************************** + * Name: khci_ep0rdsetup + ****************************************************************************/ + +static int khci_ep0rdsetup(struct khci_usbdev_s *priv, uint8_t *dest, + int readlen) +{ + volatile struct usbotg_bdtentry_s *bdtout; + volatile struct usbotg_bdtentry_s *otherbdt; + struct khci_ep_s *privep; + uint32_t status; + + /* bdtout refers to the next ping-pong BDT to use. */ + + privep = &priv->eplist[EP0]; + bdtout = privep->bdtout; + + /* Get the other BDT. Check if the current BDT the EVEN BDT? */ + + otherbdt = &g_bdt[EP_OUT_EVEN(EP0)]; + if (bdtout == otherbdt) + { + /* Yes.. then the other BDT is the ODD BDT. */ + + otherbdt++; + } + + /* If there is no RX transfer in progress, then the other BDT is setup + * to receive the next setup packet. There is a race condition here! + * Stop any setup packet. + */ + + if (!priv->rxbusy) + { + /* Nullify all BDT OUT entries. Why? So that we can tell later + * that the BDT available. No, it is not sufficient to look at the + * UOWN bit. If UOWN==0, then the transfer has been completed BUT + * it may not yet have been processed. But a completely NULLified + * BDT is a sure indication + */ + + bdtout->status = 0; + bdtout->addr = 0; + otherbdt->status = 0; + otherbdt->addr = 0; + + /* Reset the other BDT to zero... this will cause any attempted use + * of the other BDT to be NAKed. Set the first DATA0/1 value to 1. + */ + + privep->rxdata1 = 1; + } + + /* Otherwise, there are RX transfers in progress. bdtout may be + * unavailable now. In that case, we are free to setup the other BDT + * in order to improve performance. NOTE: That we check if the + * entire BDT has been NULLified. That is the only sure indication + * that the BDT is available (see above). + */ + + if (bdtout->status || bdtout->addr) + { +#ifdef CONFIG_USBDEV_NOREADAHEAD + /* We will not try to read ahead */ + + return -EBUSY; +#else + /* bdtout is not available. Is the other BDT available? */ + + if (otherbdt->status || otherbdt->addr) + { + /* Neither are available... we cannot accept the request now */ + + return -EBUSY; + } + + /* Use the other BDT */ + + bdtout = otherbdt; +#endif + } + + usbtrace(TRACE_READ(EP0), readlen); + + /* Get the correct data toggle (as well as other BDT bits) */ + + if (privep->rxdata1) + { + status = (USB_BDT_UOWN | USB_BDT_DATA1 | USB_BDT_DTS); + privep->rxdata1 = 0; + } + else + { + status = (USB_BDT_UOWN | USB_BDT_DATA0 | USB_BDT_DTS); + privep->rxdata1 = 1; + } + + /* Set the data pointer, data length, and enable the endpoint */ + + bdtout->addr = (uint8_t *)dest; + status |= ((uint32_t)readlen << USB_BDT_BYTECOUNT_SHIFT); + + /* Then give the BDT to the USB */ + + bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdtout, status, bdtout->addr); + bdtout->status = status; + + priv->ctrlstate = CTRLSTATE_RDREQUEST; + priv->rxbusy = 1; + return OK; +} + +/**************************************************************************** + * Name: khci_rdsetup + ****************************************************************************/ + +static int khci_rdsetup(struct khci_ep_s *privep, uint8_t *dest, int readlen) +{ + volatile struct usbotg_bdtentry_s *bdtout; + uint32_t status; + int epno; + + /* Select a BDT. Check both the even and the ODD BDT and use the first one + * that we own. + */ + + epno = USB_EPNO(privep->ep.eplog); + + /* bdtout refers to the next ping-pong BDT to use. However, bdtout may be + * unavailable now. But, in that case, we are free to setup the other BDT + * in order to improve performance. + * + * Note that we NULLify the BDT OUT entries. This is so that we can tell + * that the BDT readlly available. No, it is not sufficient to look at the + * UOWN bit. If UOWN==0, then the transfer has been completed BUT it may + * not yet have been processed. But a completely NULLified BDT is a sure + * indication + */ + + bdtout = privep->bdtout; + if (bdtout->status || bdtout->addr) + { +#ifdef CONFIG_USBDEV_NOREADAHEAD + /* We will not try to read-ahead */ + + return -EBUSY; +#else + volatile struct usbotg_bdtentry_s *otherbdt; + + /* Is the current BDT the EVEN BDT? */ + + otherbdt = &g_bdt[EP_OUT_EVEN(epno)]; + if (bdtout == otherbdt) + { + /* Yes.. select the ODD BDT */ + + otherbdt++; + } + + /* Is the other BDT available? */ + + if (otherbdt->status || otherbdt->addr) + { + /* Neither are available... we cannot accept the request now */ + + return -EBUSY; + } + + /* Use the other BDT */ + + bdtout = otherbdt; +#endif + } + + usbtrace(TRACE_READ(USB_EPNO(privep->ep.eplog)), readlen); + + /* Clear status bits (making sure that UOWN is cleared before doing anything + * else). + */ + + bdtout->status = 0; + + /* Set the data pointer, data length, and enable the endpoint */ + + bdtout->addr = (uint8_t *)dest; + + /* Get the correct data toggle. */ + + if (privep->rxdata1) + { + status = (USB_BDT_UOWN | USB_BDT_DATA1 | USB_BDT_DTS); + privep->rxdata1 = 0; + } + else + { + status = (USB_BDT_UOWN | USB_BDT_DATA0 | USB_BDT_DTS); + privep->rxdata1 = 1; + } + + /* Set the data length (preserving the data toggle). */ + + status |= ((uint32_t)readlen << USB_BDT_BYTECOUNT_SHIFT); + + /* Then give the BDT to the USB */ + + bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdtout, status, bdtout->addr); + + bdtout->status = status; + return OK; +} + +/**************************************************************************** + * Name: khci_rdrequest + ****************************************************************************/ + +static int khci_rdrequest(struct khci_usbdev_s *priv, + struct khci_ep_s *privep) +{ + struct khci_req_s *privreq; + int readlen; + int ret; + + /* Check the request at the head of the endpoint request queue */ + + privreq = khci_rqhead(&privep->pend); + if (!privreq) + { + /* There is no packet to receive any data. */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPOUTQEMPTY), + USB_EPNO(privep->ep.eplog)); + + /* Special case reads from to endpoint zero. If there is no transfer in + * progress, then we need to configure to received the next SETUP packet. + */ + + if (USB_EPNO(privep->ep.eplog) == 0 && + priv->ctrlstate == CTRLSTATE_RDREQUEST) + { + priv->ctrlstate = CTRLSTATE_WAITSETUP; + priv->rxbusy = 0; + } + + return OK; + } + + ullvdbg("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len); + + /* Ignore any attempt to receive a zero length packet */ + + if (privreq->req.len == 0) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_EPOUTNULLPACKET), 0); + khci_reqcomplete(privep, OK); + return OK; + } + + /* Limit the size of the transfer to either the buffer size or the max + * packet size of the endpoint. + */ + + readlen = MIN(privreq->req.len, privep->ep.maxpacket); + + /* Handle EP0 in a few special ways */ + + if (USB_EPNO(privep->ep.eplog) == EP0) + { + ret = khci_ep0rdsetup(priv, privreq->req.buf, readlen); + } + else + { + ret = khci_rdsetup(privep, privreq->req.buf, readlen); + } + + /* If the read request was successfully setup, then move the request from + * the head of the pending request queue to the tail of the active request + * queue. + */ + + if (ret == OK) + { + privreq = khci_remfirst(&privep->pend); + DEBUGASSERT(privreq != NULL); + khci_addlast(&privep->active, privreq); + } + + return ret; +} + +/**************************************************************************** + * Name: khci_cancelrequests + ****************************************************************************/ + +static void khci_cancelrequests(struct khci_ep_s *privep, int16_t result) +{ + struct khci_req_s *privreq; + + while ((privreq = khci_remfirst(&privep->active))) + { + usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); + khci_reqreturn(privep, privreq, result); + } + + while ((privreq = khci_remfirst(&privep->pend))) + { + usbtrace(TRACE_COMPLETE(USB_EPNO(privep->ep.eplog)), privreq->req.xfrd); + khci_reqreturn(privep, privreq, result); + } +} + +/**************************************************************************** + * Interrupt Level Processing + ****************************************************************************/ + +/**************************************************************************** + * Name: khci_dispatchrequest + ****************************************************************************/ + +static void khci_dispatchrequest(struct khci_usbdev_s *priv) +{ + int ret; + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_DISPATCH), 0); + if (priv && priv->driver) + { + /* Forward to the control request to the class driver implementation */ + + ret = CLASS_SETUP(priv->driver, &priv->usbdev, &priv->ctrl, NULL, 0); + if (ret < 0) + { + /* Stall on failure */ + + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_DISPATCHSTALL), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + } +} + +/**************************************************************************** + * Name: khci_ep0stall + ****************************************************************************/ + +static void khci_ep0stall(struct khci_usbdev_s *priv) +{ + uint32_t regval; + + /* Check if EP0 is stalled */ + + regval = khci_getreg(KINETIS_USB0_ENDPT0); + if ((regval & USB_ENDPT_EPSTALL) != 0) + { + /* If so, clear the EP0 stall status */ + + regval &= ~USB_ENDPT_EPSTALL; + khci_putreg(regval, KINETIS_USB0_ENDPT0); + } +} + +/**************************************************************************** + * Name: khci_eptransfer + ****************************************************************************/ + +static void khci_eptransfer(struct khci_usbdev_s *priv, uint8_t epno, + uint16_t ustat) +{ + struct khci_ep_s *privep; + int ret; + + /* Decode and service non control endpoints interrupt */ + + privep = &priv->eplist[epno]; + + /* Check if the last transaction was an EP0 OUT transaction */ + + if ((ustat & USB_STAT_TX) == USB_STAT_TX_OUT) + { + /* OUT: host-to-device */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPOUTDONE), ustat); + + /* Handle read requests. Call khci_rdcomplete() to complete the OUT + * transfer and setup the next out transfer. + */ + + ret = khci_rdcomplete(priv, privep); +#ifdef CONFIG_USBDEV_NOREADAHEAD + if (ret == OK) + { + /* If that succeeds, then try to set up another OUT transfer. */ + + (void)khci_rdrequest(priv, privep); + } +#else + UNUSED(ret); +#endif + } + else + { + /* IN: device-to-host */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPINDONE), ustat); + + /* An outgoing IN packet has completed. Update the number of bytes transferred + * and check for completion of the transfer. + */ + + khci_wrcomplete(priv, privep); + + /* Handle additional queued write requests */ + + (void)khci_wrrequest(priv, privep); + } +} + +/**************************************************************************** + * Name: khci_ep0nextsetup + * + * Description: + * This function is called (1) after sucessful completion of an EP0 Setup + * command, or (2) after receipt of the OUT complete event (for simple + * transfers). It simply sets up the single BDT to accept the next + * SETUP commend. + * + ****************************************************************************/ + +static void khci_ep0nextsetup(struct khci_usbdev_s *priv) +{ + volatile struct usbotg_bdtentry_s *bdt = priv->eplist[EP0].bdtout; + uint32_t bytecount; + + /* This operation should be performed no more than once per OUT transaction. + * priv->ep0done is set to zero at the beginning of processing of each EP0 + * transfer. It is set the first time that this function runs after the EP0 + * transfer. + */ + + if (!priv->ep0done) + { + bytecount = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT); + bdt->addr = (uint8_t *)&priv->ctrl; + bdt->status = (USB_BDT_UOWN | bytecount); + priv->ep0done = 1; + } +} + +/**************************************************************************** + * Name: khci_ep0rdcomplete + * + * Description: + * This function is called after a sequence of read sequence. In this + * context, only one BDT is used. Both BDTs must be prepared to receive + * SETUP packets. + * + ****************************************************************************/ + +static void khci_ep0rdcomplete(struct khci_usbdev_s *priv) +{ + volatile struct usbotg_bdtentry_s *bdt; + struct khci_ep_s *ep0; + uint32_t physaddr; + uint32_t bytecount; + + /* This operation should be performed no more than once per OUT transaction. + * priv->ep0done is set to zero at the beginning of processing of each EP0 + * transfer. It is set the first time that this function runs after the EP0 + * transfer. + */ + + if (!priv->ep0done) + { + bytecount = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT); + physaddr = (uint32_t)&priv->ctrl; + + bdt = &g_bdt[EP0_OUT_EVEN]; + bdt->addr = (uint8_t *)physaddr; + bdt->status = (USB_BDT_UOWN | bytecount); + + bdt = &g_bdt[EP0_OUT_ODD]; + bdt->addr = (uint8_t *)physaddr; + bdt->status = (USB_BDT_UOWN | bytecount); + + priv->ep0done = 1; + + /* Data toggling is not used on SETUP transfers. And IN transfer + * resulting from a SETUP command should begin with DATA1. + */ + + ep0 = &priv->eplist[EP0]; + ep0->rxdata1 = 0; + ep0->txdata1 = 1; + } +} + +/**************************************************************************** + * Name: khci_ep0setup + ****************************************************************************/ + +static void khci_ep0setup(struct khci_usbdev_s *priv) +{ + volatile struct usbotg_bdtentry_s *bdt; + struct khci_ep_s *ep0; + struct khci_ep_s *privep; + union wb_u value; + union wb_u index; + union wb_u len; + union wb_u response; + uint32_t regval; + bool dispatched = false; + uint8_t epno; + int nbytes = 0; /* Assume zero-length packet */ + int ret; + + /* Cancel any pending requests. */ + + ep0 = &priv->eplist[EP0]; + khci_cancelrequests(ep0, -EPROTO); + + /* Assume NOT stalled; no TX in progress; no RX overrun. Data 0/1 toggling + * is not used on SETUP packets, but any following EP0 IN transfer should + * beginning with DATA1. + */ + + ep0->stalled = false; + ep0->rxdata1 = 0; + ep0->txdata1 = 1; + + /* Initialize for the SETUP */ + + priv->ctrlstate = CTRLSTATE_WAITSETUP; + + /* And extract the little-endian 16-bit values to host order */ + + value.w = GETUINT16(priv->ctrl.value); + index.w = GETUINT16(priv->ctrl.index); + len.w = GETUINT16(priv->ctrl.len); + + ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n", + priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w); + + /* Dispatch any non-standard requests */ + + if ((priv->ctrl.type & USB_REQ_TYPE_MASK) != USB_REQ_TYPE_STANDARD) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_NOSTDREQ), priv->ctrl.type); + + /* Let the class implementation handle all non-standar requests */ + + khci_dispatchrequest(priv); + dispatched = true; + goto resume_packet_processing; /* Sorry about the goto */ + } + + /* Handle standard request. Pick off the things of interest to the + * USB device controller driver; pass what is left to the class driver + */ + + switch (priv->ctrl.req) + { + case USB_REQ_GETSTATUS: + { + /* type: device-to-host; recipient = device, interface, endpoint + * value: 0 + * index: zero interface endpoint + * len: 2; data = status + */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_GETSTATUS), priv->ctrl.type); + if (len.w != 2 || (priv->ctrl.type & USB_REQ_DIR_IN) == 0 || + index.b[MSB] != 0 || value.w != 0) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADEPGETSTATUS), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + else + { + switch (priv->ctrl.type & USB_REQ_RECIPIENT_MASK) + { + case USB_REQ_RECIPIENT_ENDPOINT: + { + epno = USB_EPNO(index.b[LSB]); + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EPGETSTATUS), epno); + if (epno >= KHCI_NENDPOINTS) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADEPGETSTATUS), epno); + priv->ctrlstate = CTRLSTATE_STALL; + } + else + { + privep = &priv->eplist[epno]; + response.w = 0; /* Not stalled */ + nbytes = 2; /* Response size: 2 bytes */ + + if (USB_ISEPIN(index.b[LSB])) + { + /* IN endpoint */ + + bdt = privep->bdtin; + } + else + { + /* OUT endpoint */ + + bdt = privep->bdtout; + } + + /* BSTALL set if stalled */ + + if ((bdt->status & USB_BDT_BSTALL) != 0) + { + response.b[LSB] = 1; /* Stalled, set bit 0 */ + } + } + } + break; + + case USB_REQ_RECIPIENT_DEVICE: + { + if (index.w == 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_DEVGETSTATUS), 0); + + /* Features: Remote Wakeup=YES; selfpowered=? */ + + response.w = 0; + response.b[LSB] = (priv->selfpowered << USB_FEATURE_SELFPOWERED) | + (priv->rwakeup << USB_FEATURE_REMOTEWAKEUP); + nbytes = 2; /* Response size: 2 bytes */ + } + else + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADDEVGETSTATUS), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + } + break; + + case USB_REQ_RECIPIENT_INTERFACE: + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_IFGETSTATUS), 0); + response.w = 0; + nbytes = 2; /* Response size: 2 bytes */ + } + break; + + default: + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADGETSTATUS), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + break; + } + } + } + break; + + case USB_REQ_CLEARFEATURE: + { + /* type: host-to-device; recipient = device, interface or endpoint + * value: feature selector + * index: zero interface endpoint; + * len: zero, data = none + */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_CLEARFEATURE), priv->ctrl.type); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) + { + /* Disable B device from performing HNP */ + +#ifdef CONFIG_USBOTG + if (value.w == USBOTG_FEATURE_B_HNP_ENABLE) + { + /* Disable HNP */ +#warning Missing Logic + } + + /* Disable A device HNP support */ + + else if (value.w == USBOTG_FEATURE_A_HNP_SUPPORT) + { + /* Disable HNP support */ +#warning Missing Logic + } + + /* Disable alternate HNP support */ + + else if (value.w == USBOTG_FEATURE_A_ALT_HNP_SUPPORT) + { + /* Disable alternate HNP */ +#warning Missing Logic + } + else +#endif + /* Disable remote wakeup */ + + if (value.w == USB_FEATURE_REMOTEWAKEUP) + { + priv->rwakeup = 0; + } + else + { + /* Let the class implementation handle all other device features */ + + khci_dispatchrequest(priv); + dispatched = true; + } + } + else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_ENDPOINT) + { + epno = USB_EPNO(index.b[LSB]); + if (epno > 0 && epno < KHCI_NENDPOINTS && index.b[MSB] == 0 && + value.w == USB_FEATURE_ENDPOINTHALT && len.w == 0) + { + privep = &priv->eplist[epno]; + privep->halted = false; + ret = khci_epstall(&privep->ep, true); + UNUSED(ret); + } + else + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADCLEARFEATURE), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + } + else + { + /* Let the class implementation handle all other recipients. */ + + khci_dispatchrequest(priv); + dispatched = true; + } + } + break; + + case USB_REQ_SETFEATURE: + { + /* type: host-to-device; recipient = device, interface, endpoint + * value: feature selector + * index: zero interface endpoint; + * len: 0; data = none + */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SETFEATURE), priv->ctrl.type); + + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) + { + /* Enable B device to perform HNP */ + +#ifdef CONFIG_USBOTG + if (value.w == USBOTG_FEATURE_B_HNP_ENABLE) + { + /* Enable HNP */ +#warning "Missing logic" + } + + /* Enable A device HNP supports */ + + else if (value.w == USBOTG_FEATURE_A_HNP_SUPPORT) + { + /* Enable HNP support */ +#warning "Missing logic" + } + + /* Another port on the A device supports HNP */ + + else if (value.w == USBOTG_FEATURE_A_ALT_HNP_SUPPORT) + { + /* Enable alternate HNP */ +#warning "Missing logic" + } + else +#endif + + if (value.w == USB_FEATURE_REMOTEWAKEUP) + { + priv->rwakeup = 0; + } + else if (value.w == USB_FEATURE_TESTMODE) + { + /* Special case recipient=device test mode */ + + ullvdbg("test mode: %d\n", index.w); + } + else + { + /* Let the class implementation handle all other device features */ + + khci_dispatchrequest(priv); + dispatched = true; + } + } + else if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_ENDPOINT) + { + /* Handler recipient=endpoint */ + + epno = USB_EPNO(index.b[LSB]); + if (epno < KHCI_NENDPOINTS && index.b[MSB] == 0 && + value.w == USB_FEATURE_ENDPOINTHALT && len.w == 0) + { + privep = &priv->eplist[epno]; + privep->halted = true; + ret = khci_epstall(&privep->ep, false); + UNUSED(ret); + } + else + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADSETFEATURE), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + } + else + { + /* The class driver handles all recipients except recipient=endpoint */ + + khci_dispatchrequest(priv); + dispatched = true; + } + } + break; + + case USB_REQ_SETADDRESS: + { + /* type: host-to-device; recipient = device + * value: device address + * index: 0 + * len: 0; data = none + */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0SETUPSETADDRESS), value.w); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) != USB_REQ_RECIPIENT_DEVICE || + index.w != 0 || len.w != 0 || value.w > 127) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADSETADDRESS), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + else + { + /* Note that setting of the device address will be deferred. A zero-length + * packet will be sent and the device address will be set when the zero- + * length packet transfer completes. + */ + + priv->devstate = DEVSTATE_ADDRPENDING; + } + } + break; + + case USB_REQ_GETDESCRIPTOR: + /* type: device-to-host; recipient = device + * value: descriptor type and index + * index: 0 or language ID; + * len: descriptor len; data = descriptor + */ + case USB_REQ_SETDESCRIPTOR: + /* type: host-to-device; recipient = device + * value: descriptor type and index + * index: 0 or language ID; + * len: descriptor len; data = descriptor + */ + + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_GETSETDESC), priv->ctrl.type); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE) + { + /* The request seems valid... let the class implementation handle it */ + + khci_dispatchrequest(priv); + dispatched = true; + } + else + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADGETSETDESC), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + } + break; + + case USB_REQ_GETCONFIGURATION: + /* type: device-to-host; recipient = device + * value: 0; + * index: 0; + * len: 1; data = configuration value + */ + + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_GETCONFIG), priv->ctrl.type); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && + value.w == 0 && index.w == 0 && len.w == 1) + { + /* The request seems valid... let the class implementation handle it */ + + khci_dispatchrequest(priv); + dispatched = true; + } + else + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADGETCONFIG), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + } + break; + + case USB_REQ_SETCONFIGURATION: + /* type: host-to-device; recipient = device + * value: configuration value + * index: 0; + * len: 0; data = none + */ + + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SETCONFIG), priv->ctrl.type); + if ((priv->ctrl.type & USB_REQ_RECIPIENT_MASK) == USB_REQ_RECIPIENT_DEVICE && + index.w == 0 && len.w == 0) + { + /* The request seems valid... let the class implementation handle it */ + + khci_dispatchrequest(priv); + dispatched = true; + } + else + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADSETCONFIG), 0); + priv->ctrlstate = CTRLSTATE_STALL; + } + } + break; + + case USB_REQ_GETINTERFACE: + /* type: device-to-host; recipient = interface + * value: 0 + * index: interface; + * len: 1; data = alt interface + */ + case USB_REQ_SETINTERFACE: + /* type: host-to-device; recipient = interface + * value: alternate setting + * index: interface; + * len: 0; data = none + */ + + { + /* Let the class implementation handle the request */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_GETSETIF), priv->ctrl.type); + khci_dispatchrequest(priv); + dispatched = true; + } + break; + + case USB_REQ_SYNCHFRAME: + /* type: device-to-host; recipient = endpoint + * value: 0 + * index: endpoint; + * len: 2; data = frame number + */ + + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SYNCHFRAME), 0); + } + break; + + default: + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDCTRLREQ), priv->ctrl.req); + priv->ctrlstate = CTRLSTATE_STALL; + } + break; + } + + /* PKTDIS bit is set when a Setup Transaction is received. Clear to resume + * packet processing. + */ + +resume_packet_processing: + regval = khci_getreg(KINETIS_USB0_CTL); + regval &= ~USB_CTL_TXSUSPENDTOKENBUSY; + khci_putreg(regval, KINETIS_USB0_CTL); + + /* At this point, the request has been handled and there are three possible + * outcomes: + * + * 1. The setup request was successfully handled above and a response packet + * must be sent (may be a zero length packet). + * 2. The request was successfully handled by the class implementation. In + * case, the EP0 IN response has already been queued and the local variable + * 'dispatched' will be set to true and ctrlstate != CTRLSTATE_STALL; + * 3. An error was detected in either the above logic or by the class implementation + * logic. In either case, priv->state will be set CTRLSTATE_STALL + * to indicate this case. + * + * NOTE: Non-standard requests are a special case. They are handled by the + * class implementation and this function returned early above, skipping this + * logic altogether. + */ + + if (!dispatched && (priv->ctrlstate != CTRLSTATE_STALL)) + { + /* The SETUP command was not dispatched to the class driver and the SETUP + * command did not cause a stall. We will respond. First, restrict the + * data length to the length requested in the setup packet + */ + + if (nbytes > len.w) + { + nbytes = len.w; + } + + /* Send the EP0 SETUP response (might be a zero-length packet) */ + + khci_epwrite(ep0, ep0->bdtin, response.b, nbytes); + priv->ctrlstate = CTRLSTATE_WAITSETUP; + } + + /* Did we stall? This might have occurred from the above logic OR the stall + * condition may have been set less obviously in khci_dispatchrequest(). + * In either case, we handle the stall condition the same. + * + * However, bad things happen if we try to stall a SETUP packet. So lets + * not. If we wait a bit, things will recover. Hmmm.. If we completed + * the data phase (perhaps by sending a NULL packet), then I think we + * could stall the endpoint and perhaps speed things up a bit???. + */ + + /* Set up the BDT to accept the next setup commend. */ + + khci_ep0nextsetup(priv); + priv->ctrlstate = CTRLSTATE_WAITSETUP; +} + +/**************************************************************************** + * Name: khci_ep0incomplete + ****************************************************************************/ + +static void khci_ep0incomplete(struct khci_usbdev_s *priv) +{ + struct khci_ep_s *ep0 = &priv->eplist[EP0]; + volatile struct usbotg_bdtentry_s *bdtlast; + int ret; + + /* Get the last BDT and make sure that we own it. */ + + bdtlast = ep0->bdtin; + + /* Make sure that we own the last BDT. */ + + bdtlast->status = 0; + bdtlast->addr = 0; + + /* Are we processing the completion of one packet of an outgoing request + * from the class driver? + */ + + if (priv->ctrlstate == CTRLSTATE_WRREQUEST) + { + /* An outgoing EP0 transfer has completed. Update the byte count and + * check for the completion of the transfer. + * + * NOTE: khci_wrcomplete() will toggle bdtin to the other buffer so + * we do not need to that for this case. + */ + + khci_wrcomplete(priv, &priv->eplist[EP0]); + + /* Handle the next queue IN transfer. If there are no further queued + * IN transfers, khci_wrrequest will return -ENODATA and that is the + * only expected error return value in this context. + */ + + ret = khci_wrrequest(priv, &priv->eplist[EP0]); + if (ret < 0) + { + DEBUGASSERT(ret == -ENODATA); + + /* If there is nothing to be sent, then we need to configure to + * receive the next SETUP packet. + */ + + priv->ctrlstate = CTRLSTATE_WAITSETUP; + } + } + + /* No.. Are we processing the completion of a status response? */ + + else if (priv->ctrlstate == CTRLSTATE_WAITSETUP) + { + /* Get the next IN BDT */ + + if (bdtlast == &g_bdt[EP0_IN_EVEN]) + { + ep0->bdtin = &g_bdt[EP0_IN_ODD]; + } + else + { + DEBUGASSERT(bdtlast == &g_bdt[EP0_IN_ODD]); + ep0->bdtin = &g_bdt[EP0_IN_EVEN]; + } + + /* Look at the saved SETUP command. Was it a SET ADDRESS request? + * If so, then now is the time to set the address. + */ + + if (priv->devstate == DEVSTATE_ADDRPENDING) + { + uint16_t addr = GETUINT16(priv->ctrl.value); + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0ADDRESSSET), addr); + + /* This should be the equivalent state */ + + DEBUGASSERT(priv->ctrl.req == USB_REQ_SETADDRESS && + (priv->ctrl.type & REQRECIPIENT_MASK) == + (USB_REQ_TYPE_STANDARD | USB_REQ_RECIPIENT_DEVICE)); + + /* Set (or clear) the address */ + + khci_putreg(addr, KINETIS_USB0_ADDR); + if (addr > 0) + { + priv->devstate = DEVSTATE_ADDRESS; + } + else + { + priv->devstate = DEVSTATE_DEFAULT; + } + } + } + + /* No other state is expected in this context */ + + else + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDSTATE), priv->ctrlstate); + priv->ctrlstate = CTRLSTATE_STALL; + } +} + +/**************************************************************************** + * Name: khci_ep0outcomplete + ****************************************************************************/ + +static void khci_ep0outcomplete(struct khci_usbdev_s *priv) +{ + struct khci_ep_s *ep0 = &priv->eplist[EP0]; + + switch (priv->ctrlstate) + { + /* Read request in progress */ + + case CTRLSTATE_RDREQUEST: + + /* Process the next read request for EP0 */ + + khci_rdcomplete(priv, ep0); + + /* Was this the end of the OUT transfer? */ + + if (priv->ctrlstate == CTRLSTATE_WAITSETUP) + { + /* Prepare EP0 OUT for the next SETUP transaction. */ + + khci_ep0rdcomplete(priv); + } + break; + + /* No transfer in progress, waiting for SETUP */ + + case CTRLSTATE_WAITSETUP: + { + /* In this case the last OUT transaction must have been a status + * stage of a CTRLSTATE_WRREQUEST: Prepare EP0 OUT for the next SETUP + * transaction. + */ + + khci_ep0nextsetup(priv); + } + break; + + /* Unexpected state OR host aborted the OUT transfer before it completed, + * STALL the endpoint in either case + */ + + default: + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDSTATE), priv->ctrlstate); + priv->ctrlstate = CTRLSTATE_STALL; + } + break; + } +} + +/**************************************************************************** + * Name: khci_ep0transfer + ****************************************************************************/ + +static void khci_ep0transfer(struct khci_usbdev_s *priv, uint16_t ustat) +{ + volatile struct usbotg_bdtentry_s *bdt; + + /* The following information is available in the status register : + * + * ENDPT - The 4 bit endpoint number that cause the interrupt. + * DIR - The direction of the endpoint. + * PPBI - The ping-pong buffer used in the transaction. + */ + + priv->ep0done = 0; + + /* Check if the last transaction was an EP0 OUT transaction */ + + if ((ustat & USB_STAT_TX) == USB_STAT_TX_OUT) + { + int index; + + /* It was an EP0 OUT transaction. Get the index to the BDT. */ + + index = ((ustat & USB_STAT_ODD) == 0 ? EP0_OUT_EVEN : EP0_OUT_ODD); + bdt = &g_bdt[index]; + priv->eplist[0].bdtout = bdt; + + bdtdbg("EP0 BDT OUT [%p] {%08x, %08x}\n", bdt, bdt->status, bdt->addr); + + /* Check the current EP0 OUT buffer contains a SETUP packet */ + + if (((bdt->status & USB_BDT_PID_MASK) >> USB_BDT_PID_SHIFT) == USB_PID_SETUP_TOKEN) + { + /* Check if the SETUP transaction data went into the priv->ctrl + * buffer. If not, then we will need to copy it. + */ + + if (bdt->addr != (uint8_t *)&priv->ctrl) + { + void *src = (void *)bdt->addr; + void *dest = &priv->ctrl; + + memcpy(dest, src, USB_SIZEOF_CTRLREQ); + bdt->addr = (uint8_t *)&priv->ctrl; + } + + /* Handle the control OUT transfer */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0SETUPDONE), bdt->status); + khci_ep0setup(priv); + } + else + { + /* Handle the data OUT transfer */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0OUTDONE), ustat); + khci_ep0outcomplete(priv); + } + } + + /* No.. it was an EP0 IN transfer */ + + else /* if ((status & USB_STAT_TX) == USB_STAT_TX_IN) */ + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_EP0INDONE), ustat); + + /* Handle the IN transfer complete */ + + khci_ep0incomplete(priv); + } + + /* Check for a request to stall EP0 */ + + if (priv->ctrlstate == CTRLSTATE_STALL) + { + /* Stall EP0 */ + + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_EP0SETUPSTALLED), priv->ctrlstate); + (void)khci_epstall(&priv->eplist[EP0].ep, false); + } +} + +/**************************************************************************** + * Name: khci_interrupt + ****************************************************************************/ + +static int khci_interrupt(int irq, void *context) +{ + /* For now there is only one USB controller, but we will always refer to + * it using a pointer to make any future ports to multiple USB controllers + * easier. + */ + + struct khci_usbdev_s *priv = &g_usbdev; + uint16_t usbir; + uint16_t otgir; + uint32_t regval; + int i; + + /* Get the set of pending USB and OTG interrupts interrupts */ + + usbir = khci_getreg(KINETIS_USB0_ISTAT) & khci_getreg(KINETIS_USB0_INTEN); + otgir = khci_getreg(KINETIS_USB0_OTGISTAT) & khci_getreg(KINETIS_USB0_OTGICR); + + usbtrace(TRACE_INTENTRY(KHCI_TRACEINTID_INTERRUPT), usbir | otgir); + +#ifdef CONFIG_USBOTG + /* Session Request Protocol (SRP) Time Out Check */ + + /* if USB OTG SRP is ready */ +# warning "Missing logic" + { + /* Check if the 1 millisecond timer has expired */ + + if ((otgir & USBOTG_INT_T1MSEC) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_T1MSEC), otgir); + + /* Check for the USB OTG SRP timeout */ +# warning "Missing logic" + { + /* Handle OTG events of the SRP timeout has expired */ +# warning "Missing logic" + } + + /* Clear Interrupt 1 msec timer Flag */ + + khci_putreg(USBOTG_INT_T1MSEC, KINETIS_USB0_ISTAT); + } + } +#endif + + /* Handle events while we are in the attached state */ + + if (priv->devstate == DEVSTATE_ATTACHED) + { + /* Clear all USB interrupts */ + + khci_putreg(USB_INT_ALL, KINETIS_USB0_ISTAT); + + /* Make sure that the USE reset and IDLE detect interrupts are enabled */ + + regval = khci_getreg(KINETIS_USB0_INTEN); + regval |= (USB_INT_USBRST | USB_INT_SLEEP); + khci_putreg(regval, KINETIS_USB0_INTEN); + + /* Now were are in the powered state */ + + priv->devstate = DEVSTATE_POWERED; + } + +#ifdef CONFIG_USBOTG + /* Check if the ID Pin Changed State */ + + if ((otgir & USBOTG_INT_ID) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_OTGID), otgir); + + /* Re-detect and re-initialize */ +#warning "Missing logic" + + khci_putreg(USBOTG_INT_ID, KINETIS_USB0_ISTAT); + } +#endif +#if 0 + /* Service the USB Activity Interrupt */ + + if ((otgir & USBOTG_INT_ACTV) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_WKUP), otgir); + + /* Wake-up from susepnd mode */ + + khci_putreg(USBOTG_INT_ACTV, KINETIS_USB0_ISTAT); + khci_resume(priv); + } + + /* It is pointless to continue servicing if the device is in suspend mode. */ +x + if ((khci_getreg(KINETIS_USB0_CTL) & USB_USBCTRL_SUSP) != 0) + { + /* Just clear the interrupt and return */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SUSPENDED), khci_getreg(KINETIS_USB0_CTL)); + goto interrupt_exit; + } +#endif + + /* Service USB Bus Reset Interrupt. When bus reset is received during + * suspend, ACTVIF will be set first, once the UCONbits.SUSPND is clear, + * then the URSTIF bit will be asserted. This is why URSTIF is checked + * after ACTVIF. The USB reset flag is masked when the USB state is in + * DEVSTATE_DETACHED or DEVSTATE_ATTACHED, and therefore cannot cause a + * USB reset event during these two states. + */ + + if ((usbir & USB_INT_USBRST) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_RESET), usbir); + + /* Reset interrupt received. Restore our initial state. NOTE: the + * hardware automatically resets the USB address, so we really just + * need reset any existing configuration/transfer states. + */ + khci_reset(priv); + priv->devstate = DEVSTATE_DEFAULT; + +#ifdef CONFIG_USBOTG + /* Disable and deactivate HNP */ +#warning Missing Logic +#endif + /* Acknowlege the reset interrupt */ + + khci_putreg(USB_INT_USBRST, KINETIS_USB0_ISTAT); + goto interrupt_exit; + } + + /* Service IDLE interrupts */ + + if ((usbir & USB_INT_SLEEP) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_IDLE), usbir); + +#ifdef CONFIG_USBOTG + /* If Suspended, Try to switch to Host */ +#warning "Missing logic" +#else + khci_suspend(priv); + +#endif + khci_putreg(USB_INT_SLEEP, KINETIS_USB0_ISTAT); + } + + /* Service SOF interrupts */ + +#ifdef CONFIG_USB_SOFINTS + if ((usbir & USB_INT_SOFTOK) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_SOF), 0); + + /* I am not sure why you would ever enable SOF interrupts */ + + khci_putreg(USB_INT_SOFTOK, KINETIS_USB0_ISTAT); + } +#endif + + /* Service stall interrupts */ + + if ((usbir & USB_INT_STALL) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_STALL), usbir); + + khci_ep0stall(priv); + + /* Clear the pending STALL interrupt */ + + khci_putreg(USB_INT_STALL, KINETIS_USB0_ISTAT); + } + + /* Service error interrupts */ + + if ((usbir & USB_INT_ERROR) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_UERR), usbir); + ulldbg("Error: EIR=%04x\n", khci_getreg(KINETIS_USB0_ERRSTAT)); + + /* Clear all pending USB error interrupts */ + + khci_putreg(USB_EINT_ALL, KINETIS_USB0_ERRSTAT); + } + + /* There is no point in continuing if the host has not sent a bus reset. + * Once bus reset is received, the device transitions into the DEFAULT + * state and is ready for communication. + */ + +#if 0 + if (priv->devstate < DEVSTATE_DEFAULT) + { + /* Just clear the interrupt and return */ + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_WAITRESET), priv->devstate); + goto interrupt_exit; + } +#endif + + /* Service USB Transaction Complete Interrupt */ + + if ((usbir & USB_INT_TOKDNE) != 0) + { + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_TRNC), usbir); + + /* Drain the USAT FIFO entries. If the USB FIFO ever gets full, USB + * bandwidth utilization can be compromised, and the device won't be + * able to receive SETUP packets. + */ + + for (i = 0; i < 4; i++) + { + uint8_t epno; + + /* Check the pending interrupt register. Is token processing complete. */ + + if ((khci_getreg(KINETIS_USB0_ISTAT) & USB_INT_TOKDNE) != 0) + { + regval = khci_getreg(KINETIS_USB0_STAT); + khci_putreg(USB_INT_TOKDNE, KINETIS_USB0_ISTAT); + + usbtrace(TRACE_INTDECODE(KHCI_TRACEINTID_TRNCS), regval); + + /* Handle the endpoint transfer complete event. */ + + epno = (regval & USB_STAT_ENDP_MASK) >> USB_STAT_ENDP_SHIFT; + if (epno == 0) + { + khci_ep0transfer(priv, regval); + } + else + { + khci_eptransfer(priv, epno, regval); + } + } + else + { + /* USTAT FIFO must be empty. */ + + break; + } + } + } + + /* Clear the pending USB interrupt. Goto is used in the above to assure + * that all interrupt exists pass through this logic. + */ + +interrupt_exit: + kinetis_clrpend(KINETIS_IRQ_USBOTG); + usbtrace(TRACE_INTEXIT(KHCI_TRACEINTID_INTERRUPT), usbir | otgir); + return OK; +} + +/**************************************************************************** + * Suspend/Resume Helpers + ****************************************************************************/ +/**************************************************************************** + * Name: khci_suspend + ****************************************************************************/ + +static void khci_suspend(struct khci_usbdev_s *priv) +{ +#if 0 + uint32_t regval; +#endif + + /* Notify the class driver of the suspend event */ + + if (priv->driver) + { + CLASS_SUSPEND(priv->driver, &priv->usbdev); + } + +#if 0 + /* Enable the ACTV interrupt. + * + * NOTE: Do not clear UIRbits.ACTVIF here! Reason: ACTVIF is only + * generated once an IDLEIF has been generated. This is a 1:1 ratio + * interrupt generation. For every IDLEIF, there will be only one ACTVIF + * regardless of the number of subsequent bus transitions. If the ACTIF + * is cleared here, a problem could occur. The driver services IDLEIF + * first because ACTIVIE=0. If this routine clears the only ACTIVIF, + * then it can never get out of the suspend mode. + */ + + regval = khci_getreg(KINETIS_USB0_OTGICR); + regval |= USBOTG_INT_ACTV; + khci_putreg(regval, KINETIS_USB0_OTGICR); + + /* Disable further IDLE interrupts. Once is enough. */ + + regval = khci_getreg(KINETIS_USB0_INTEN); + regval &= ~USB_INT_SLEEP; + khci_putreg(regval, KINETIS_USB0_INTEN); +#endif + + /* Invoke a callback into board-specific logic. The board-specific logic + * may enter into sleep or idle modes or switch to a slower clock, etc. + */ + + kinetis_usbsuspend((struct usbdev_s *)priv, false); +} + +/**************************************************************************** + * Name: khci_resume + ****************************************************************************/ + +static void khci_resume(struct khci_usbdev_s *priv) +{ + irqstate_t flags; + uint32_t regval; + + flags = enter_critical_section(); + + /* Start RESUME signaling */ + + regval = khci_getreg(KINETIS_USB0_CTL); + regval |= USB_CTL_RESUME; + khci_putreg(regval, KINETIS_USB0_CTL); + + /* Keep the RESUME line set for 1-13 ms */ + + up_mdelay(10); + + regval &= ~USB_CTL_RESUME; + khci_putreg(regval, KINETIS_USB0_CTL); + + /* This function is called when the USB activity interrupt occurs. + * If using clock switching, this is the place to call out to + * logic to restore the original MCU core clock frequency. + */ + + kinetis_usbsuspend((struct usbdev_s *)priv, true); + + /* Disable further activity interrupts */ +#if 0 + regval = khci_getreg(KINETIS_USB0_OTGICR); + regval &= ~USBOTG_INT_ACTV; + khci_putreg(regval, KINETIS_USB0_OTGICR); +#endif + + /* The ACTVIF bit cannot be cleared immediately after the USB module wakes + * up from Suspend or while the USB module is suspended. A few clock cycles + * are required to synchronize the internal hardware state machine before + * the ACTIVIF bit can be cleared by firmware. Clearing the ACTVIF bit + * before the internal hardware is synchronized may not have an effect on + * the value of ACTVIF. Additionally, if the USB module uses the clock from + * the 96 MHz PLL source, then after clearing the SUSPND bit, the USB + * module may not be immediately operational while waiting for the 96 MHz + * PLL to lock. + */ + + khci_putreg(USB_INT_SLEEP, KINETIS_USB0_ISTAT); + + /* Notify the class driver of the resume event */ + + if (priv->driver) + { + CLASS_RESUME(priv->driver, &priv->usbdev); + } + + leave_critical_section(flags); +} + +/**************************************************************************** + * Endpoint Helpers + ****************************************************************************/ +/**************************************************************************** + * Name: khci_epreserve + ****************************************************************************/ + +static inline struct khci_ep_s * +khci_epreserve(struct khci_usbdev_s *priv, uint8_t epset) +{ + struct khci_ep_s *privep = NULL; + irqstate_t flags; + int epndx = 0; + + flags = enter_critical_section(); + epset &= priv->epavail; + if (epset) + { + /* Select the lowest bit in the set of matching, available endpoints + * (skipping EP0) + */ + + for (epndx = 1; epndx < KHCI_NENDPOINTS; epndx++) + { + uint8_t bit = KHCI_ENDP_BIT(epndx); + if ((epset & bit) != 0) + { + /* Mark the endpoint no longer available */ + + priv->epavail &= ~bit; + + /* And return the pointer to the standard endpoint structure */ + + privep = &priv->eplist[epndx]; + break; + } + } + } + + leave_critical_section(flags); + return privep; +} + +/**************************************************************************** + * Name: khci_epunreserve + ****************************************************************************/ + +static inline void +khci_epunreserve(struct khci_usbdev_s *priv, struct khci_ep_s *privep) +{ + irqstate_t flags = enter_critical_section(); + priv->epavail |= KHCI_ENDP_BIT(USB_EPNO(privep->ep.eplog)); + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: khci_epreserved + ****************************************************************************/ + +static inline bool +khci_epreserved(struct khci_usbdev_s *priv, int epno) +{ + return ((priv->epavail & KHCI_ENDP_BIT(epno)) == 0); +} + +/**************************************************************************** + * Name: khci_ep0configure + ****************************************************************************/ + +static void khci_ep0configure(struct khci_usbdev_s *priv) +{ + volatile struct usbotg_bdtentry_s *bdt; + struct khci_ep_s *ep0; + uint32_t bytecount; + + /* Enable the EP0 endpoint */ + + khci_putreg(KHCI_EP_CONTROL, KINETIS_USB0_ENDPT0); + + /* Configure the OUT BDTs. We assume that the ping-poing buffer index has + * just been reset and we expect to receive on the EVEN BDT first. Data + * toggle synchronization is not needed for SETUP packets. + */ + + ep0 = &priv->eplist[EP0]; + bytecount = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT); + + bdt = &g_bdt[EP0_OUT_EVEN]; + bdt->addr = (uint8_t *)&priv->ctrl; + bdt->status = (USB_BDT_UOWN | bytecount); + ep0->bdtout = bdt; + + bdt++; + bdt->status = (USB_BDT_UOWN | bytecount); + bdt->addr = (uint8_t *)&priv->ctrl; + + /* Configure the IN BDTs. */ + + bdt = &g_bdt[EP0_IN_EVEN]; + bdt->status = 0; + bdt->addr = 0; + ep0->bdtin = bdt; + + bdt++; + bdt->status = 0; + bdt->addr = 0; + + /* Data toggling is not used on SETUP transfers. And IN transfer resulting + * from a SETUP command should begin with DATA1. + */ + + ep0->rxdata1 = 0; + ep0->txdata1 = 1; +} + +/**************************************************************************** + * Endpoint operations + ****************************************************************************/ + +/**************************************************************************** + * Name: khci_epconfigure + ****************************************************************************/ + +static int khci_epconfigure(struct usbdev_ep_s *ep, + const struct usb_epdesc_s *desc, + bool last) +{ + struct khci_ep_s *privep = (struct khci_ep_s *)ep; + volatile struct usbotg_bdtentry_s *bdt; + uint16_t maxpacket; + uint32_t regval; + uint8_t epno; + bool epin; + bool bidi; + int index; + +#ifdef CONFIG_DEBUG + if (!ep || !desc) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + ulldbg("ERROR: ep=%p desc=%p\n"); + return -EINVAL; + } +#endif + + /* Get the unadorned endpoint address */ + + epno = USB_EPNO(desc->addr); + epin = USB_ISEPIN(desc->addr); + + usbtrace(TRACE_EPCONFIGURE, (uint16_t)epno); + DEBUGASSERT(epno == USB_EPNO(ep->eplog)); + + /* Set the requested type */ + + switch (desc->attr & USB_EP_ATTR_XFERTYPE_MASK) + { + case USB_EP_ATTR_XFER_INT: /* Interrupt endpoint */ + regval = epin ? KHCI_EP_INTIN : KHCI_EP_INTOUT; + break; + + case USB_EP_ATTR_XFER_BULK: /* Bulk endpoint */ + regval = epin ? KHCI_EP_BULKIN : KHCI_EP_BULKOUT; + break; + + case USB_EP_ATTR_XFER_ISOC: /* Isochronous endpoint */ + regval = epin ? KHCI_EP_ISOCIN : KHCI_EP_ISOCOUT; + break; + + case USB_EP_ATTR_XFER_CONTROL: /* Control endpoint */ + regval = KHCI_EP_CONTROL; + bidi = true; + break; + + default: + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADEPTYPE), (uint16_t)desc->type); + return -EINVAL; + } + + /* Enable the endpoint */ + + khci_putreg(regval, KINETIS_USB0_ENDPT(epno)); + + /* Setup up buffer descriptor table (BDT) entry/ies for this endpoint */ + + if (epin || bidi) + { + /* Get the pointer to BDT entry */ + + index = EP(epno, EP_DIR_IN, EP_PP_EVEN); + bdt = &g_bdt[index]; + privep->bdtin = bdt; + + /* Mark that we own the entry */ + + bdt->status = 0; + bdt->addr = 0; + + bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr); + + /* Now do the same for the other buffer. */ + + bdt++; + bdt->status = 0; + bdt->addr = 0; + + bdtdbg("EP%d BDT IN [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr); + } + + if (!epin || bidi) + { + index = EP(epno, EP_DIR_OUT, EP_PP_EVEN); + bdt = &g_bdt[index]; + privep->bdtout = bdt; + + /* Mark that we own the entry */ + + bdt->status = 0; + bdt->addr = 0; + + bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr); + + /* Now do the same for the other buffer. */ + + bdt++; + bdt->status = 0; + bdt->addr = 0; + + bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n", epno, bdt, bdt->status, bdt->addr); + } + + /* Get the maxpacket size of the endpoint. */ + + maxpacket = GETUINT16(desc->mxpacketsize); + DEBUGASSERT(maxpacket <= KHCI_MAXPACKET_SIZE); + ep->maxpacket = maxpacket; + + /* Set the full, logic EP number (that includes direction encoded in bit 7) */ + + if (epin) + { + ep->eplog = USB_EPIN(epno); + } + else + { + ep->eplog = USB_EPOUT(epno); + } + + return OK; +} + +/**************************************************************************** + * Name: khci_epdisable + ****************************************************************************/ + +static int khci_epdisable(struct usbdev_ep_s *ep) +{ + struct khci_ep_s *privep; + volatile uint32_t *ptr; + int epno; + int i; + irqstate_t flags; + +#ifdef CONFIG_DEBUG + if (!ep) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + ulldbg("ERROR: ep=%p\n", ep); + return -EINVAL; + } +#endif + + privep = (struct khci_ep_s *)ep; + epno = USB_EPNO(ep->eplog); + usbtrace(TRACE_EPDISABLE, epno); + + /* Cancel any ongoing activity */ + + flags = enter_critical_section(); + khci_cancelrequests(privep, -ESHUTDOWN); + + /* Disable the endpoint */ + + khci_putreg(0, KINETIS_USB0_ENDPT(epno)); + + /* Reset the BDTs for the endpoint. Four BDT entries per endpoint; Two + * 32-bit words per BDT. + */ + + ptr = (uint32_t *)&g_bdt[EP(epno, EP_DIR_OUT, EP_PP_EVEN)]; + for (i = 0; i < USB_BDT_WORD_SIZE * USB_NBDTS_PER_EP; i++) + { + *ptr++ = 0; + } + + leave_critical_section(flags); + return OK; +} + +/**************************************************************************** + * Name: khci_epallocreq + ****************************************************************************/ + +static struct usbdev_req_s *khci_epallocreq(struct usbdev_ep_s *ep) +{ + struct khci_req_s *privreq; + +#ifdef CONFIG_DEBUG + if (!ep) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return NULL; + } +#endif + + usbtrace(TRACE_EPALLOCREQ, USB_EPNO(ep->eplog)); + + privreq = (struct khci_req_s *)kmm_malloc(sizeof(struct khci_req_s)); + if (!privreq) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_ALLOCFAIL), 0); + return NULL; + } + + memset(privreq, 0, sizeof(struct khci_req_s)); + return &privreq->req; +} + +/**************************************************************************** + * Name: khci_epfreereq + ****************************************************************************/ + +static void khci_epfreereq(struct usbdev_ep_s *ep, struct usbdev_req_s *req) +{ + struct khci_req_s *privreq = (struct khci_req_s *)req; + +#ifdef CONFIG_DEBUG + if (!ep || !req) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return; + } +#endif + + usbtrace(TRACE_EPFREEREQ, USB_EPNO(ep->eplog)); + + kmm_free(privreq); +} + +/**************************************************************************** + * Name: khci_epsubmit + ****************************************************************************/ + +static int khci_epsubmit(struct usbdev_ep_s *ep, struct usbdev_req_s *req) +{ + struct khci_req_s *privreq = (struct khci_req_s *)req; + struct khci_ep_s *privep = (struct khci_ep_s *)ep; + struct khci_usbdev_s *priv; + irqstate_t flags; + uint8_t epno; + int ret = OK; + +#ifdef CONFIG_DEBUG + if (!req || !req->callback || !req->buf || !ep) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + ulldbg("ERROR: req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep); + return -EINVAL; + } +#endif + + usbtrace(TRACE_EPSUBMIT, USB_EPNO(ep->eplog)); + priv = privep->dev; + +#ifdef CONFIG_DEBUG + if (!priv->driver) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_NOTCONFIGURED), priv->usbdev.speed); + ulldbg("ERROR: driver=%p\n", priv->driver); + return -ESHUTDOWN; + } +#endif + + /* Handle the request from the class driver */ + + epno = USB_EPNO(ep->eplog); + req->result = -EINPROGRESS; + req->xfrd = 0; + privreq->inflight[0] = 0; +#ifndef CONFIG_USBDEV_NOWRITEAHEAD + privreq->inflight[1] = 0; +#endif + flags = enter_critical_section(); + + /* Add the new request to the request queue for the OUT endpoint */ + + khci_addlast(&privep->pend, privreq); + + /* Handle IN (device-to-host) requests. NOTE: If the class device is + * using the bi-directional EP0, then we assume that they intend the EP0 + * IN functionality. + */ + + if (USB_ISEPIN(ep->eplog) || epno == EP0) + { + usbtrace(TRACE_INREQQUEUED(epno), req->len); + + /* If the endpoint is not stalled and an IN endpoint BDT is available, + * then transfer the data now. + */ + + if (!privep->stalled) + { + (void)khci_wrrequest(priv, privep); + } + } + + /* Handle OUT (host-to-device) requests */ + + else + { + usbtrace(TRACE_OUTREQQUEUED(epno), req->len); + + /* Set up the read operation (unless the endpoint is stalled). Because + * the KHCI supports ping-pong* buffering. There may be two pending + * read requests. The following call will attempt to setup a read + * using this request for this endpoint. It is not harmful if this + * fails. + */ + + if (!privep->stalled) + { + (void)khci_rdrequest(priv, privep); + } + } + + leave_critical_section(flags); + return ret; +} + +/**************************************************************************** + * Name: khci_epcancel + ****************************************************************************/ + +static int khci_epcancel(struct usbdev_ep_s *ep, struct usbdev_req_s *req) +{ + struct khci_ep_s *privep = (struct khci_ep_s *)ep; + irqstate_t flags; + +#ifdef CONFIG_DEBUG + if (!ep || !req) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return -EINVAL; + } +#endif + + usbtrace(TRACE_EPCANCEL, USB_EPNO(ep->eplog)); + + flags = enter_critical_section(); + khci_cancelrequests(privep, -EAGAIN); + leave_critical_section(flags); + return OK; +} + +/**************************************************************************** + * Name: khci_epbdtstall + ****************************************************************************/ + +static int khci_epbdtstall(struct usbdev_ep_s *ep, bool resume, bool epin) +{ + struct khci_ep_s *privep; + struct khci_usbdev_s *priv; + volatile struct usbotg_bdtentry_s *bdt; + volatile struct usbotg_bdtentry_s *otherbdt; + uint32_t regaddr; + uint32_t regval; + uint8_t epno; + + /* Recover pointers */ + + privep = (struct khci_ep_s *)ep; + priv = (struct khci_usbdev_s *)privep->dev; + epno = USB_EPNO(ep->eplog); + + /* Check for an IN endpoint */ + + if (epin) + { + /* Get a pointer to the current IN BDT */ + + bdt = privep->bdtin; + + /* Get the other BDT */ + + otherbdt = &g_bdt[EP(epno, EP_DIR_IN, EP_PP_EVEN)]; + if (otherbdt == bdt) + { + otherbdt++; + } + + /* Reset the data toggle */ + + privep->txdata1 = false; + } + + /* Otherwise it is an an OUT endpoint. */ + + else + { + /* Get a pointer to the current OUT BDT */ + + bdt = privep->bdtout; + + /* Get a pointer to the other BDT */ + + otherbdt = &g_bdt[EP(epno, EP_DIR_OUT, EP_PP_EVEN)]; + if (otherbdt == bdt) + { + otherbdt++; + } + + /* Reset the data toggle */ + + privep->rxdata1 = false; + } + + /* Handle the resume condition */ + + if (resume) + { + /* Resuming a stalled endpoint */ + + usbtrace(TRACE_EPRESUME, epno); + + /* Point to the appropriate EP register */ + + regaddr = KINETIS_USB0_ENDPT(epno); + + /* Clear the STALL bit in the UEP register */ + + regval = khci_getreg(regaddr); + regval &= ~USB_ENDPT_EPSTALL; + khci_putreg(regval, regaddr); + + /* Check for the EP0 OUT endpoint. This is a special case because we + * need to set it up to receive the next setup packet (Hmmm... what + * if there are queued outgoing reponses. We need to revisit this.) + */ + + if (epno == 0 && !epin) + { + uint32_t bytecount = (USB_SIZEOF_CTRLREQ << USB_BDT_BYTECOUNT_SHIFT); + uint32_t physaddr = (uint32_t)&priv->ctrl; + + /* Configure the other BDT to receive a SETUP command. */ + + otherbdt->addr = (uint8_t *)physaddr; + otherbdt->status = (USB_BDT_UOWN | bytecount); + + /* Configure the current BDT to receive a SETUP command. */ + + bdt->addr = (uint8_t *)physaddr; + bdt->status = (USB_BDT_UOWN | bytecount); + + bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n", + bdt, bdt->status, bdt->addr); + bdtdbg("EP0 BDT IN [%p] {%08x, %08x}\n", + otherbdt, otherbdt->status, otherbdt->addr); + } + else + { + /* Return the other BDT to the CPU. */ + + otherbdt->addr = 0; + otherbdt->status = 0; + + /* Return the current BDT to the CPU. */ + + bdt->addr = 0; + bdt->status = 0; + + bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n", + epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr); + bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n", + epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr); + + /* Restart any queued requests (after a delay so that we can be assured + * that the hardware has recovered from the stall -- I don't know of any + * other way to assure this.). + */ + + khci_delayedrestart(priv, epno); + } + } + + /* Handle the stall condition */ + + else + { + usbtrace(TRACE_EPSTALL, epno); + privep->stalled = true; + + /* Stall the other BDT. */ + + otherbdt->status = (USB_BDT_UOWN | USB_BDT_BSTALL); + otherbdt->addr = 0; + + /* Stall the current BDT. */ + + bdt->status = (USB_BDT_UOWN | USB_BDT_BSTALL); + bdt->addr = 0; + + /* Stop any queued requests. Hmmm.. is there a race condition here? */ + + khci_rqstop(privep); + + bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n", + epno, epin ? "IN" : "OUT", bdt, bdt->status, bdt->addr); + bdtdbg("EP%d BDT %s [%p] {%08x, %08x}\n", + epno, epin ? "IN" : "OUT", otherbdt, otherbdt->status, otherbdt->addr); + } + + return OK; +} + +/**************************************************************************** + * Name: khci_epstall + ****************************************************************************/ + +static int khci_epstall(struct usbdev_ep_s *ep, bool resume) +{ + struct khci_ep_s *privep; + irqstate_t flags; + int ret; + +#ifdef CONFIG_DEBUG + if (!ep) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return -EINVAL; + } +#endif + + /* Recover pointers */ + + privep = (struct khci_ep_s *)ep; + + /* STALL or RESUME the endpoint */ + + flags = enter_critical_section(); + + /* Special case EP0. When we stall EP0 we have to stall both the IN and + * OUT BDTs. + */ + + if (USB_EPNO(ep->eplog) == 0) + { + ret = khci_epbdtstall(ep, resume, true); + if (ret == OK) + { + ret = khci_epbdtstall(ep, resume, false); + } + + /* Set the EP0 control state appropriately */ + + privep->dev->ctrlstate = resume ? CTRLSTATE_WAITSETUP : CTRLSTATE_STALLED; + } + + /* Otherwise, select the BDT for the endpoint direction */ + + else + { + /* It is a unidirectional endpoint */ + + ret = khci_epbdtstall(ep, resume, USB_ISEPIN(ep->eplog)); + } + + leave_critical_section(flags); + return ret; +} + +/**************************************************************************** + * Device Controller Operations + ****************************************************************************/ +/**************************************************************************** + * Name: khci_allocep + ****************************************************************************/ + +static struct usbdev_ep_s *khci_allocep(struct usbdev_s *dev, uint8_t epno, + bool epin, uint8_t eptype) +{ + struct khci_usbdev_s *priv = (struct khci_usbdev_s *)dev; + struct khci_ep_s *privep = NULL; + uint16_t epset = KHCI_ENDP_ALLSET; + + usbtrace(TRACE_DEVALLOCEP, (uint16_t)epno); +#ifdef CONFIG_DEBUG + if (!dev) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return NULL; + } +#endif + + /* Ignore any direction bits in the logical address */ + + epno = USB_EPNO(epno); + + /* A logical address of 0 means that any endpoint will do */ + + if (epno > 0) + { + /* Otherwise, we will return the endpoint structure only for the requested + * 'logical' endpoint. All of the other checks will still be performed. + * + * First, verify that the logical endpoint is in the range supported by + * by the hardware. + */ + + if (epno >= KHCI_NENDPOINTS) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BADEPNO), (uint16_t)epno); + return NULL; + } + + /* Convert the logical address to a physical OUT endpoint address and + * remove all of the candidate endpoints from the bitset except for the + * the IN/OUT pair for this logical address. + */ + + epset = KHCI_ENDP_BIT(epno); + } + + /* Check if the selected endpoint number is available */ + + privep = khci_epreserve(priv, epset); + if (!privep) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_EPRESERVE), (uint16_t)epset); + return NULL; + } + + return &privep->ep; +} + +/**************************************************************************** + * Name: khci_freeep + ****************************************************************************/ + +static void khci_freeep(struct usbdev_s *dev, struct usbdev_ep_s *ep) +{ + struct khci_usbdev_s *priv; + struct khci_ep_s *privep; + +#ifdef CONFIG_DEBUG + if (!dev || !ep) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return; + } +#endif + + priv = (struct khci_usbdev_s *)dev; + privep = (struct khci_ep_s *)ep; + usbtrace(TRACE_DEVFREEEP, (uint16_t)USB_EPNO(ep->eplog)); + DEBUGASSERT(priv && privep); + + /* Disable the endpoint */ + + (void)khci_epdisable(ep); + + /* Mark the endpoint as available */ + + khci_epunreserve(priv, privep); +} + +/**************************************************************************** + * Name: khci_getframe + ****************************************************************************/ + +static int khci_getframe(struct usbdev_s *dev) +{ + uint16_t frml; + uint16_t frmh; + uint16_t tmp; + +#ifdef CONFIG_DEBUG + if (!dev) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return -EINVAL; + } +#endif + + /* Return the last frame number detected by the hardware. Thr FRMH/L + * registers are updated with the current frame number whenever a SOF + * TOKEN is received. + */ + + do + { + /* Loop until we can be sure that there was no wrap from the FRML + * to the FRMH register. + */ + + frmh = khci_getreg(KINETIS_USB0_FRMNUMH) & USB_FRMNUMH_MASK; + frml = khci_getreg(KINETIS_USB0_FRMNUML) & USB_FRMNUML_MASK; + tmp = khci_getreg(KINETIS_USB0_FRMNUMH) & USB_FRMNUMH_MASK; + } + while (frmh != tmp); + + /* Combine to for the full 11-bit value */ + + tmp = (frmh) << 8 | frml; + usbtrace(TRACE_DEVGETFRAME, tmp); + return tmp; +} + +/**************************************************************************** + * Name: khci_wakeup + ****************************************************************************/ + +static int khci_wakeup(struct usbdev_s *dev) +{ + struct khci_usbdev_s *priv = (struct khci_usbdev_s *)dev; + + usbtrace(TRACE_DEVWAKEUP, 0); +#ifdef CONFIG_DEBUG + if (!dev) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return -EINVAL; + } +#endif + + /* Resume normal operation. */ + + khci_resume(priv); + return OK; +} + +/**************************************************************************** + * Name: khci_selfpowered + ****************************************************************************/ + +static int khci_selfpowered(struct usbdev_s *dev, bool selfpowered) +{ + struct khci_usbdev_s *priv = (struct khci_usbdev_s *)dev; + + usbtrace(TRACE_DEVSELFPOWERED, (uint16_t)selfpowered); + +#ifdef CONFIG_DEBUG + if (!dev) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return -ENODEV; + } +#endif + + priv->selfpowered = selfpowered; + return OK; +} + +/**************************************************************************** + * Initialization/Reset + ****************************************************************************/ + +/**************************************************************************** + * Name: khci_reset + * + * Description: + * Reset the software and hardware states. If the USB controller has been + * attached to a host, then connect to the bus as well. At the end of + * this reset, the hardware should be in the full up, ready-to-run state. + * + ****************************************************************************/ + +static void khci_reset(struct khci_usbdev_s *priv) +{ + /* Reset the software configuration */ + + khci_swreset(priv); + + /* Re-configure the USB controller in its initial, unconnected state */ + + khci_hwreset(priv); + + /* khci_attach() was called, then the attach flag will be set and we + * should also attach to the USB bus. + */ + + if (priv->attached) + { + /* usbdev_attach() has already been called.. attach to the bus + * now + */ + + khci_attach(priv); + } +} + +/**************************************************************************** + * Name: khci_attach + ****************************************************************************/ + +static void khci_attach(struct khci_usbdev_s *priv) +{ + uint32_t regval; + + /* Check if we are in the detached state */ + + if (priv->devstate == DEVSTATE_DETACHED) + { + /* Disable USB interrupts at the interrupt controller */ + + up_disable_irq(KINETIS_IRQ_USBOTG); + + /* Initialize registers to known states. */ + +#if 1 + khci_putreg(0x1,KINETIS_USB0_CTL); + khci_putreg(0,KINETIS_USB0_USBCTRL); +#endif + + /* Enable interrupts at the USB controller */ + + khci_putreg(ERROR_INTERRUPTS, KINETIS_USB0_ERREN); + khci_putreg(NORMAL_INTERRUPTS, KINETIS_USB0_INTEN); + + /* Configure EP0 */ + + khci_ep0configure(priv); + + /* Flush any pending transactions */ +#if 1 + while ((khci_getreg(KINETIS_USB0_ISTAT) & USB_INT_TOKDNE) != 0) + { + khci_putreg(USB_INT_TOKDNE, KINETIS_USB0_ISTAT); + } + + /* Make sure packet processing is enabled */ + + regval = khci_getreg(KINETIS_USB0_CTL); + regval &= ~USB_CTL_TXSUSPENDTOKENBUSY; + khci_putreg(regval, KINETIS_USB0_CTL); + + /* Enable the USB module and attach to bus */ + + do + { + regval = khci_getreg(KINETIS_USB0_CTL); + if ((regval & USB_CTL_USBENSOFEN) == 0) + { + khci_putreg(regval | USB_CTL_USBENSOFEN, KINETIS_USB0_CTL); + } + } + while ((regval & USB_CTL_USBENSOFEN) == 0); + + /* Enable OTG */ + +#ifdef CONFIG_USBOTG + regval = khci_getreg(KINETIS_USB0_OTGCTL); + regval |= (USBOTG_CON_DPPULUP | USBOTG_CON_OTGEN); + khci_putreg(regval, KINETIS_USB0_OTGCTL); +#endif + + /* Transition to the attached state */ + + priv->devstate = DEVSTATE_ATTACHED; + priv->usbdev.speed = USB_SPEED_FULL; + + /* Clear all pending USB interrupts */ + + khci_putreg(USB_EINT_ALL, KINETIS_USB0_ERRSTAT); + khci_putreg(USB_INT_ALL, KINETIS_USB0_ISTAT); +#endif + + /* Enable USB interrupts at the interrupt controller */ + + up_enable_irq(KINETIS_IRQ_USBOTG); + + /* Enable pull-up to connect the device. The host should enumerate us + * some time after this + */ + + kinetis_usbpullup(&priv->usbdev, true); + } +} + +/**************************************************************************** + * Name: khci_detach + ****************************************************************************/ + +static void khci_detach(struct khci_usbdev_s *priv) +{ +#ifdef CONFIG_USBOTG + uint32_t regval; +#endif + + /* Disable USB interrupts at the interrupt controller */ + + up_disable_irq(KINETIS_IRQ_USBOTG); + + /* Disable the USB controller and detach from the bus. */ + + khci_putreg(0, KINETIS_USB0_CTL); + + /* Mask all USB interrupts */ + + khci_putreg(0, KINETIS_USB0_INTEN); + + /* We are now in the detached state */ + + priv->attached = 0; + priv->devstate = DEVSTATE_DETACHED; + +#ifdef CONFIG_USBOTG + /* Disable the D+ Pullup */ + + regval = khci_getreg(KINETIS_USB0_OTGCTL); + regval &= ~USBOTG_CON_DPPULUP; + khci_putreg(regval, KINETIS_USB0_OTGCTL); + + /* Disable and deactivate HNP */ +#warning Missing Logic + + /* Check if the ID Pin Changed State */ + + if ((khci_getreg(KINETIS_USB0_ISTAT) & khci_getreg(KINETIS_USB0_OTGICR) & USBOTG_INT_ID) != 0) + { + /* Re-detect & Initialize */ +#warning "Missing logic" + + /* Clear ID Interrupt Flag */ + + khci_putreg(USBOTG_INT_ID, KINETIS_USB0_ISTAT); + } +#endif +} + +/**************************************************************************** + * Name: khci_swreset + ****************************************************************************/ + +static void khci_swreset(struct khci_usbdev_s *priv) +{ + int epno; + + /* Tell the class driver that we are disconnected. The class driver + * should then accept any new configurations. + */ + + if (priv->driver) + { + CLASS_DISCONNECT(priv->driver, &priv->usbdev); + } + + /* Flush and reset endpoint states (except EP0) */ + + for (epno = 1; epno < KHCI_NENDPOINTS; epno++) + { + struct khci_ep_s *privep = &priv->eplist[epno]; + + /* Cancel any queued requests. Since they are canceled + * with status -ESHUTDOWN, then will not be requeued + * until the configuration is reset. NOTE: This should + * not be necessary... the CLASS_DISCONNECT above should + * result in the class implementation calling khci_epdisable + * for each of its configured endpoints. + */ + + khci_cancelrequests(privep, -EAGAIN); + + /* Reset endpoint status */ + + privep->stalled = false; + privep->halted = false; + privep->txnullpkt = false; + } + + /* Reset to the default address */ + + khci_putreg(0, KINETIS_USB0_ADDR); + + /* Unconfigure each endpoint by clearing the endpoint control registers + * (except EP0) + */ + + for (epno = 1; epno < KHCI_NENDPOINTS; epno++) + { + khci_putreg(0, KINETIS_USB0_ENDPT(epno)); + } + + /* Reset the control state */ + + priv->ctrlstate = CTRLSTATE_WAITSETUP; + priv->rxbusy = 0; +} + +/**************************************************************************** + * Name: khci_hwreset + * + * Description: + * Reset the hardware and leave it in a known, unready state. + * + ****************************************************************************/ + +static void khci_hwreset(struct khci_usbdev_s *priv) +{ + uint32_t regval; + +#define USB_FLASH_ACCESS +#ifdef USB_FLASH_ACCESS + /* Allow USBOTG-FS Controller to Read from FLASH */ + + regval = getreg32(KINETIS_FMC_PFAPR); + regval &= ~(FMC_PFAPR_M4AP_MASK); + regval |= (FMC_PFAPR_RDONLY << FMC_PFAPR_M4AP_SHIFT); + putreg32(regval, KINETIS_FMC_PFAPR); +#endif + + /* Clear all of the buffer descriptor table (BDT) entries */ + + memset((void *)g_bdt, 0, sizeof(g_bdt)); + + /* Soft reset the USB Module */ + + regval = khci_getreg(KINETIS_USB0_USBTRC0); + regval |= USB_USBTRC0_USBRESET; + khci_putreg(regval,KINETIS_USB0_USBTRC0); + + /* Is this really necessary? */ + + while (khci_getreg(KINETIS_USB0_USBTRC0) & USB_USBTRC0_USBRESET); + + /* Set the address of the buffer descriptor table (BDT) + * + * BDTP1: Bit 1-7: Bits 9-15 of the BDT base address + * BDTP2: Bit 0-7: Bits 16-23 of the BDT base address + * BDTP3: Bit 0-7: Bits 24-31 of the BDT base address + */ + + khci_putreg((uint8_t)((uint32_t)g_bdt >> 24), KINETIS_USB0_BDTPAGE3); + khci_putreg((uint8_t)((uint32_t)g_bdt >> 16), KINETIS_USB0_BDTPAGE2); + khci_putreg((uint8_t)(((uint32_t)g_bdt >> 8) & USB_BDTPAGE1_MASK), KINETIS_USB0_BDTPAGE1); + + ulldbg("BDT Address %hhx \n" ,&g_bdt); + ulldbg("BDTPAGE3 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE3)); + ulldbg("BDTPAGE2 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE2)); + ulldbg("BDTPAGE1 %hhx\n",khci_getreg(KINETIS_USB0_BDTPAGE1)); + + /* Clear any pending interrupts */ + + khci_putreg(0xFF, KINETIS_USB0_ERRSTAT); + khci_putreg(0xFF, KINETIS_USB0_ISTAT); + khci_putreg(0xFF,KINETIS_USB0_OTGISTAT); + +#if 1 + /* Assert reset request to all of the Ping Pong buffer pointers. This + * will reset all Even/Odd buffer pointers to the EVEN BD banks. + */ + + regval = khci_getreg(KINETIS_USB0_CTL); + regval |= USB_CTL_ODDRST; + khci_putreg(regval, KINETIS_USB0_CTL); + + /* Bring the ping pong buffer pointers out of reset */ + + regval &= ~USB_CTL_ODDRST; + khci_putreg(regval, KINETIS_USB0_CTL); +#endif + +#if 1 + /* Undocumented bit */ + + regval = khci_getreg(KINETIS_USB0_USBTRC0); + regval |= 0x40; + khci_putreg(regval,KINETIS_USB0_USBTRC0); +#endif + + priv->devstate = DEVSTATE_DETACHED; +} + +/**************************************************************************** + * Name: khci_stateinit + ****************************************************************************/ + +static void khci_stateinit(struct khci_usbdev_s *priv) +{ + int epno; + + /* Disconnect the device / disable the pull-up. We don't want the + * host to enumerate us until the class driver is registered. + */ + + kinetis_usbpullup(&priv->usbdev, false); + + /* Initialize the device state structure. NOTE: many fields + * have the initial value of zero and, hence, are not explicitly + * initialized here. + */ + + memset(priv, 0, sizeof(struct khci_usbdev_s)); + priv->usbdev.ops = &g_devops; + priv->usbdev.ep0 = &priv->eplist[EP0].ep; + priv->epavail = KHCI_ENDP_ALLSET & ~KHCI_ENDP_BIT(EP0); + priv->rwakeup = 1; + + /* Initialize the endpoint list */ + + for (epno = 0; epno < KHCI_NENDPOINTS; epno++) + { + struct khci_ep_s *privep = &priv->eplist[epno]; + + /* Set endpoint operations, reference to driver structure (not + * really necessary because there is only one controller), and + * the (physical) endpoint number which is just the index to the + * endpoint. + */ + + privep->ep.ops = &g_epops; + privep->dev = priv; + privep->ep.eplog = epno; + + /* We will use a fixed maxpacket size for all endpoints (perhaps + * ISOC endpoints could have larger maxpacket???). A smaller + * packet size can be selected when the endpoint is configured. + */ + + privep->ep.maxpacket = KHCI_MAXPACKET_SIZE; + } + + /* Select a smaller endpoint size for EP0 */ + +#if KHCI_EP0MAXPACKET < KHCI_MAXPACKET_SIZE + priv->eplist[EP0].ep.maxpacket = KHCI_EP0MAXPACKET; +#endif +} + +/**************************************************************************** + * Name: khci_hwshutdown + ****************************************************************************/ + +static void khci_hwshutdown(struct khci_usbdev_s *priv) +{ +#if 0 + uint32_t regval; +#endif + + /* Put the hardware and driver in its initial, unconnected state */ + + khci_swreset(priv); + khci_hwreset(priv); + priv->usbdev.speed = USB_SPEED_UNKNOWN; + + /* Disable all interrupts and force the USB controller into reset */ + + khci_putreg(0, KINETIS_USB0_ERREN); + khci_putreg(0, KINETIS_USB0_INTEN); + + /* Clear any pending interrupts */ + + khci_putreg(USB_EINT_ALL, KINETIS_USB0_ERRSTAT); + khci_putreg(USB_INT_ALL, KINETIS_USB0_ISTAT); + + /* Disconnect the device / disable the pull-up */ + + kinetis_usbpullup(&priv->usbdev, false); + + /* Power down the USB controller */ +#warning FIXME powerdown USB Controller + +#if 0 + regval = khci_getreg(KHCI_USB_PWRC); + regval &= ~USB_PWRC_USBPWR; + khci_putreg(regval, KHCI_USB_PWRC); +#endif +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_usbinitialize + * + * Description: + * Initialize the USB driver + * + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void up_usbinitialize(void) +{ + struct khci_usbdev_s *priv = &g_usbdev; + uint32_t regval; + + /* For now there is only one USB controller, but we will always refer to + * it using a pointer to make any future ports to multiple USB controllers + * easier. + */ +#if 1 + /* 1: Select clock source */ + + regval = getreg32(KINETIS_SIM_SOPT2); + regval |= SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_USBSRC; + putreg32(regval, KINETIS_SIM_SOPT2); + + regval = getreg32(KINETIS_SIM_CLKDIV2); +#if defined(CONFIG_TEENSY_3X_OVERCLOCK) + /* (USBFRAC + 0)/(USBDIV + 1) = (1 + 0)/(1 + 1) = 1/2 for 96Mhz clock */ + + regval = SIM_CLKDIV2_USBDIV(1); +#else + /* 72Mhz */ + + regval = SIM_CLKDIV2_USBDIV(2) | SIM_CLKDIV2_USBFRAC; +#endif + putreg32(regval, KINETIS_SIM_CLKDIV2); + + /* 2: Gate USB clock */ + + regval = getreg32(KINETIS_SIM_SCGC4); + regval |= SIM_SCGC4_USBOTG; + putreg32(regval, KINETIS_SIM_SCGC4); + +#endif + + usbtrace(TRACE_DEVINIT, 0); + + /* Initialize the driver state structure */ + + khci_stateinit(priv); + + /* Then perform a few one-time initialization operstions. First, initialize + * the watchdog timer that is used to perform a delayed queue restart + * after recovering from a stall. + */ + + priv->epstalled = 0; + priv->wdog = wd_create(); + + /* Attach USB controller interrupt handler. The hardware will not be + * initialized and interrupts will not be enabled until the class device + * driver is bound. Getting the IRQs here only makes sure that we have + * them when we need them later. + */ + + if (irq_attach(KINETIS_IRQ_USBOTG, khci_interrupt) != 0) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_IRQREGISTRATION), + (uint16_t)KINETIS_IRQ_USBOTG); + up_usbuninitialize(); + } + +#ifdef CONFIG_ARCH_IRQPRIO + /* Set the interrupt priority */ + + up_prioritize_irq(KINETIS_IRQ_USBOTG, 112); +#endif +} + +/**************************************************************************** + * Name: up_usbuninitialize + * Description: + * Initialize the USB driver + * Input Parameters: + * None + * + * Returned Value: + * None + * + ****************************************************************************/ + +void up_usbuninitialize(void) +{ + /* For now there is only one USB controller, but we will always refer to + * it using a pointer to make any future ports to multiple USB controllers + * easier. + */ + + struct khci_usbdev_s *priv = &g_usbdev; + irqstate_t flags; + + flags = enter_critical_section(); + usbtrace(TRACE_DEVUNINIT, 0); + + /* Disable and detach the USB IRQs */ + + up_disable_irq(KINETIS_IRQ_USBOTG); + irq_detach(KINETIS_IRQ_USBOTG); + + if (priv->driver) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_DRIVERREGISTERED), 0); + usbdev_unregister(priv->driver); + } + + /* Put the hardware in an inactive state */ + + khci_hwshutdown(priv); + leave_critical_section(flags); +} + +/**************************************************************************** + * Name: usbdev_register + * + * Description: + * Register a USB device class driver. The class driver's bind() method + * will be called to bind it to a USB device driver. + * + ****************************************************************************/ + +int usbdev_register(struct usbdevclass_driver_s *driver) +{ + /* For now there is only one USB controller, but we will always refer to + * it using a pointer to make any future ports to multiple USB controllers + * easier. + */ + + struct khci_usbdev_s *priv = &g_usbdev; + int ret; + + usbtrace(TRACE_DEVREGISTER, 0); + +#ifdef CONFIG_DEBUG + if (!driver || !driver->ops->bind || !driver->ops->unbind || + !driver->ops->disconnect || !driver->ops->setup) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return -EINVAL; + } + + if (priv->driver) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_DRIVER), 0); + return -EBUSY; + } +#endif + + /* First hook up the driver */ + + priv->driver = driver; + + /* Then bind the class driver */ + + ret = CLASS_BIND(driver, &priv->usbdev); + if (ret) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_BINDFAILED), (uint16_t)-ret); + priv->driver = NULL; + } + + /* The class driver has been successfully bound. */ + + else + { + /* Setup the USB controller in it initial ready-to-run state (might + * be connected or unconnected, depending on usbdev_attach() has + * been called). + */ + + DEBUGASSERT(priv->devstate == DEVSTATE_DETACHED); + khci_reset(priv); + } + + return ret; +} + +/**************************************************************************** + * Name: usbdev_unregister + * + * Description: + * Un-register usbdev class driver. If the USB device is connected to a + * USB host, it will first disconnect(). The driver is also requested to + * unbind() and clean up any device state, before this procedure finally + * returns. + * + ****************************************************************************/ + +int usbdev_unregister(struct usbdevclass_driver_s *driver) +{ + /* For now there is only one USB controller, but we will always refer to + * it using a pointer to make any future ports to multiple USB controllers + * easier. + */ + + struct khci_usbdev_s *priv = &g_usbdev; + irqstate_t flags; + + usbtrace(TRACE_DEVUNREGISTER, 0); + +#ifdef CONFIG_DEBUG + if (driver != priv->driver) + { + usbtrace(TRACE_DEVERROR(KHCI_TRACEERR_INVALIDPARMS), 0); + return -EINVAL; + } +#endif + + /* Reset the hardware and cancel all requests. All requests must be + * canceled while the class driver is still bound. This will put + * the hardware back into its initial, unconnected state. + */ + + flags = enter_critical_section(); + khci_swreset(priv); + khci_hwreset(priv); + + /* Unbind the class driver */ + + CLASS_UNBIND(driver, &priv->usbdev); + + /* Disable USB controller interrupts (but keep them attached) */ + + up_disable_irq(KINETIS_IRQ_USBOTG); + + /* Put the hardware in an inactive state. Then bring the hardware back up + * in the reset state (this is probably not necessary, the khci_hwreset() + * call above was probably sufficient). + */ + + khci_hwshutdown(priv); + khci_stateinit(priv); + + /* Unhook the driver */ + + priv->driver = NULL; + leave_critical_section(flags); + return OK; +} + +/**************************************************************************** + * Name: khci_usbattach and khci_usbdetach + * + * Description: + * The USB stack must be notified when the device is attached or detached + * by calling one of these functions. + * + ****************************************************************************/ + +void khci_usbattach(void) +{ + /* For now there is only one USB controller, but we will always refer to + * it using a pointer to make any future ports to multiple USB controllers + * easier. + */ + + struct khci_usbdev_s *priv = &g_usbdev; + + /* Mark that we are attached */ + + priv->attached = 1; + + /* This API may be called asynchronously from other initialization + * interfaces. In particular, we may not want to attach the bus yet... + * that should only be done when the class driver is attached. Has + * the class driver been attached? + */ + + if (priv->driver) + { + /* Yes.. then attach to the bus */ + + khci_attach(priv); + } +} + +void khci_usbdetach(void) +{ + /* For now there is only one USB controller, but we will always refer to + * it using a pointer to make any future ports to multiple USB controllers + * easier. + */ + + struct khci_usbdev_s *priv = &g_usbdev; + + /* Detach from the bus */ + + khci_detach(priv); +} + +#endif /* CONFIG_USBDEV && CONFIG_KHCI_USB */ diff --git a/arch/arm/src/kinetis/kinetis_usbotg.h b/arch/arm/src/kinetis/kinetis_usbotg.h index 127c718312d..de53d512933 100644 --- a/arch/arm/src/kinetis/kinetis_usbotg.h +++ b/arch/arm/src/kinetis/kinetis_usbotg.h @@ -1,7 +1,7 @@ /******************************************************************************************** * arch/arm/src/kinetis/kinetis_usbotg.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -217,6 +217,8 @@ #define USB_INT_ATTACH (1 << 6) /* Bit 6: Attach Interrupt */ #define USB_INT_STALL (1 << 7) /* Bit 7: Stall Interrupt */ +#define USB_INT_ALL 0xFF + /* Error Interrupt Status Register and Error Interrupt Enable Register (8-bit) */ #define USB_ERRSTAT_PIDERR (1 << 0) /* Bit 0: This bit is set when the PID check field fails */ @@ -228,6 +230,8 @@ /* Bit 6: Reserved */ #define USB_ERRSTAT_BTSERR (1 << 7) /* Bit 7: Bit stuff error is detected */ +#define USB_EINT_ALL 0xBF + /* Status Register (8-bit) */ /* Bits 0-1: Reserved */ @@ -259,6 +263,7 @@ #define USB_BDTPAGE1_MASK (0x7f << USB_BDTPAGE1_SHIFT) /* Frame Number Register Low (8-bit, bits 0-7 of the 11 bit frame number) */ +#define USB_FRMNUML_MASK 0xFF /* Frame Number Register High (8-bit) */ /* Bits 3-7: Reserved */ #define USB_FRMNUMH_SHIFT (0) /* Bits 0-2: Bits 8-10 of the 11-bit frame number */ @@ -313,16 +318,58 @@ #define USB_USBTRC0_SYNC_DET (1 << 1) /* Bit 1: Synchronous USB Interrupt Detect */ #define USB_USBTRC0_RESUME_INT (1 << 0) /* Bit 0: USB Asynchronous Interrupt */ -/******************************************************************************************** - * Public Types - ********************************************************************************************/ +/* Buffer Descriptor Table (BDT) ****************************************************/ +/* Offset 0: On write (software->hardware) */ -/******************************************************************************************** - * Public Data - ********************************************************************************************/ +#define USB_BDT_STATUS_MASK 0xfc /* Bits 2-7: Status bits */ +#define USB_BDT_BSTALL (1 << 2) /* Bit 2: Buffer Stall Enable bit */ +#define USB_BDT_DTS (1 << 3) /* Bit 3: Data Toggle Synchronization Enable bit */ +#define USB_BDT_NINC (1 << 4) /* Bit 4: DMA Address Increment Disable bit */ +#define USB_BDT_KEEP (1 << 5) /* Bit 5: BD Keep Enable bit */ +#define USB_BDT_DATA01 (1 << 6) /* Bit 6: Data Toggle Packet bit */ +#define USB_BDT_UOWN (1 << 7) /* Bit 7: USB Own bit */ +#define USB_BDT_BYTECOUNT_SHIFT (16) /* Bits 16-25: Byte Count bits */ +#define USB_BDT_BYTECOUNT_MASK (0x3ff << USB_BDT_BYTECOUNT_SHIFT) + +#define USB_BDT_DATA0 0 /* DATA0 packet expected next */ +#define USB_BDT_DATA1 USB_BDT_DATA01 /* DATA1 packet expected next */ +#define USB_BDT_COWN 0 /* CPU owns the descriptor */ + +/* Offset 0: On read (hardware->software) */ + +#define USB_BDT_PID_SHIFT (2) /* Bits 2-5: Packet Identifier bits */ +#define USB_BDT_PID_MASK (15 << USB_BDT_PID_SHIFT) + /* Bit 7: USB Own bit (same) */ + /* Bits 16-25: Byte Count bits (same) */ + +/* Offset 4: BUFFER_ADDRESS, 32-bit Buffer Address bits */ + +#define USB_BDT_BYTES_SIZE 8 /* Eight bytes per BDT */ +#define USB_BDT_WORD_SIZE 2 /* Two 32-bit words per BDT */ +#define USB_NBDTS_PER_EP 4 /* Number of BDTS per endpoint: IN/OUT and EVEN/ODD */ + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* Buffer Descriptor Status Register layout. */ + +struct usbotg_bdtentry_s +{ + uint32_t status; /* Status, byte count, and PID */ + uint8_t *addr; /* Buffer address */ +}; +#endif /******************************************************************************************** * Public Functions ********************************************************************************************/ +struct usbdev_s; +int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable); +void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume); +void khci_usbattach(void); + #endif /* __ARCH_ARM_SRC_KINETIS_KINETIS_USBOTG_H */ diff --git a/arch/arm/src/kl/Kconfig b/arch/arm/src/kl/Kconfig index 4505fc3e67c..bfa40491538 100644 --- a/arch/arm/src/kl/Kconfig +++ b/arch/arm/src/kl/Kconfig @@ -47,21 +47,21 @@ config KL_FLEXBUS config KL_UART0 bool "UART0" default n - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER ---help--- Support UART0 config KL_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER ---help--- Support UART1 config KL_UART2 bool "UART2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER ---help--- Support UART2 diff --git a/arch/arm/src/kl/Make.defs b/arch/arm/src/kl/Make.defs index 68c58af802e..39308b6948c 100644 --- a/arch/arm/src/kl/Make.defs +++ b/arch/arm/src/kl/Make.defs @@ -70,7 +70,7 @@ CMN_CSRCS += up_dumpnvic.c endif CHIP_ASRCS = -CHIP_CSRCS = kl_clockconfig.c kl_gpio.c kl_idle.c kl_irq.c kl_lowgetc.c +CHIP_CSRCS = kl_clockconfig.c kl_gpio.c kl_idle.c kl_irq.c kl_getc.c CHIP_CSRCS += kl_lowputc.c kl_serial.c kl_start.c kl_cfmconfig.c ifneq ($(CONFIG_SCHED_TICKLESS),y) diff --git a/arch/arm/src/kl/kl_lowgetc.c b/arch/arm/src/kl/kl_getc.c similarity index 63% rename from arch/arm/src/kl/kl_lowgetc.c rename to arch/arm/src/kl/kl_getc.c index f1c02981d2c..8b63ec217d6 100644 --- a/arch/arm/src/kl/kl_lowgetc.c +++ b/arch/arm/src/kl/kl_getc.c @@ -1,7 +1,7 @@ /**************************************************************************** - * arch/arm/src/kl/kl_lowgetc.c + * arch/arm/src/kl/kl_getc.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -41,75 +41,42 @@ #include -#include -#include - -#include "up_internal.h" #include "up_arch.h" #include "kl_config.h" -#include "kl_lowgetc.h" - -#include "chip/kl_uart.h" +#include "kl_getc.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Select UART parameters for the selected console */ #if defined(CONFIG_UART0_SERIAL_CONSOLE) # define CONSOLE_BASE KL_UART0_BASE -# define CONSOLE_FREQ BOARD_CORECLK_FREQ -# define CONSOLE_BAUD CONFIG_UART0_BAUD -# define CONSOLE_BITS CONFIG_UART0_BITS -# define CONSOLE_PARITY CONFIG_UART0_PARITY #elif defined(CONFIG_UART1_SERIAL_CONSOLE) # define CONSOLE_BASE KL_UART1_BASE -# define CONSOLE_FREQ BOARD_BUSCLK_FREQ -# define CONSOLE_BAUD CONFIG_UART1_BAUD -# define CONSOLE_BITS CONFIG_UART1_BITS -# define CONSOLE_PARITY CONFIG_UART1_PARITY #elif defined(CONFIG_UART2_SERIAL_CONSOLE) # define CONSOLE_BASE KL_UART2_BASE -# define CONSOLE_FREQ BOARD_BUSCLK_FREQ -# define CONSOLE_BAUD CONFIG_UART2_BAUD -# define CONSOLE_BITS CONFIG_UART2_BITS -# define CONSOLE_PARITY CONFIG_UART2_PARITY #endif -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ /**************************************************************************** - * Name: up_lowgetc + * Name: up_getc * * Description: * Input one byte from the serial console * + * REVIST: If used with the serial driver enabled, then this could + * interfere with the serial driver operations. Serial interrupts should + * be disabled when this function executes in that case. + * ****************************************************************************/ -int kl_lowgetc(void) +int up_getc(void) { uint8_t ch = 0; @@ -118,11 +85,11 @@ int kl_lowgetc(void) * we have data in the buffer to read. */ - while ((getreg8(CONSOLE_BASE+KL_UART_S1_OFFSET) & UART_S1_RDRF) == 0); + while ((getreg8(CONSOLE_BASE + KL_UART_S1_OFFSET) & UART_S1_RDRF) == 0); /* Then read a character from the UART data register */ - ch = getreg8(CONSOLE_BASE+KL_UART_D_OFFSET); + ch = getreg8(CONSOLE_BASE + KL_UART_D_OFFSET); #endif return (int)ch; diff --git a/arch/arm/src/kl/kl_getc.h b/arch/arm/src/kl/kl_getc.h new file mode 100644 index 00000000000..aff6b2a0b37 --- /dev/null +++ b/arch/arm/src/kl/kl_getc.h @@ -0,0 +1,48 @@ +/************************************************************************************ + * arch/arm/src/kl/kl_getc.h + * + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_KL_KINETIS_GETC_H +#define __ARCH_ARM_SRC_KL_KINETIS_GETC_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "kl_config.h" +#include "chip/kl_uart.h" + +#endif /* __ARCH_ARM_SRC_KL_KINETIS_GETC_H */ diff --git a/arch/arm/src/kl/kl_serial.c b/arch/arm/src/kl/kl_serial.c index fb135ca7955..fab56a34d5e 100644 --- a/arch/arm/src/kl/kl_serial.c +++ b/arch/arm/src/kl/kl_serial.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/arm/src/kl/kl_serial.c * - * Copyright (C) 2013-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -59,15 +59,14 @@ #include "kl_config.h" #include "kl_lowputc.h" -#include "kl_lowgetc.h" #include "chip.h" #include "kl_gpio.h" #include "chip/kl_uart.h" - /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Some sanity checks *******************************************************/ /* Is there at least one UART enabled and configured as a RS-232 device? */ @@ -958,18 +957,4 @@ int up_putc(int ch) return ch; } -/**************************************************************************** - * Name: up_getc - * - * Description: - * Provide priority, low-level access to support OS debug writes - * - ****************************************************************************/ - -int up_getc(void) -{ - /* Check for LF */ - - return kl_lowgetc(); -} #endif /* USE_SERIALDRIVER */ diff --git a/arch/arm/src/lpc11xx/Kconfig b/arch/arm/src/lpc11xx/Kconfig index 127f3f0db89..45bb842a302 100644 --- a/arch/arm/src/lpc11xx/Kconfig +++ b/arch/arm/src/lpc11xx/Kconfig @@ -55,7 +55,7 @@ config LPC11_PLL config LPC11_UART0 bool "UART0" - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER default y config LPC11_CAN0 diff --git a/arch/arm/src/lpc11xx/Make.defs b/arch/arm/src/lpc11xx/Make.defs index a40c1435455..fd0e046964d 100644 --- a/arch/arm/src/lpc11xx/Make.defs +++ b/arch/arm/src/lpc11xx/Make.defs @@ -71,7 +71,7 @@ endif CHIP_ASRCS = CHIP_CSRCS = lpc11_clockconfig.c lpc11_gpio.c lpc11_i2c.c lpc11_idle.c -CHIP_CSRCS += lpc11_irq.c lpc11_lowputc.c lpc11_lowgetc.c lpc11_serial.c +CHIP_CSRCS += lpc11_irq.c lpc11_lowputc.c lpc11_getc.c lpc11_serial.c CHIP_CSRCS += lpc11_spi.c lpc11_ssp.c lpc11_start.c # Configuration-dependent LPC11xx files diff --git a/arch/arm/src/lpc11xx/lpc11_lowgetc.c b/arch/arm/src/lpc11xx/lpc11_getc.c similarity index 65% rename from arch/arm/src/lpc11xx/lpc11_lowgetc.c rename to arch/arm/src/lpc11xx/lpc11_getc.c index a0a12b61080..f809e9d3438 100644 --- a/arch/arm/src/lpc11xx/lpc11_lowgetc.c +++ b/arch/arm/src/lpc11xx/lpc11_getc.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/arm/src/lpc11/lpc11_lowgetc.c + * arch/arm/src/lpc11/lpc11_getc.c * * Copyright (C) 2015 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -41,77 +41,41 @@ #include -#include -#include - -#include "up_internal.h" #include "up_arch.h" -#include "chip/lpc11_syscon.h" -#include "chip/lpc11_uart.h" - -#include "lpc11_gpio.h" -#include "lpc11_lowgetc.h" -#include "lpc11_serial.h" +#include "lpc11_getc.h" /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ + /* Select UART parameters for the selected console */ #if defined(CONFIG_UART0_SERIAL_CONSOLE) # define CONSOLE_BASE LPC11_UART0_BASE -# define CONSOLE_FREQ BOARD_CORECLK_FREQ -# define CONSOLE_BAUD CONFIG_UART0_BAUD -# define CONSOLE_BITS CONFIG_UART0_BITS -# define CONSOLE_PARITY CONFIG_UART0_PARITY #elif defined(CONFIG_UART1_SERIAL_CONSOLE) # define CONSOLE_BASE LPC11_UART1_BASE -# define CONSOLE_FREQ BOARD_BUSCLK_FREQ -# define CONSOLE_BAUD CONFIG_UART1_BAUD -# define CONSOLE_BITS CONFIG_UART1_BITS -# define CONSOLE_PARITY CONFIG_UART1_PARITY #elif defined(CONFIG_UART2_SERIAL_CONSOLE) # define CONSOLE_BASE LPC11_UART2_BASE -# define CONSOLE_FREQ BOARD_BUSCLK_FREQ -# define CONSOLE_BAUD CONFIG_UART2_BAUD -# define CONSOLE_BITS CONFIG_UART2_BITS -# define CONSOLE_PARITY CONFIG_UART2_PARITY #endif -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ /**************************************************************************** - * Name: up_lowgetc + * Name: up_getc * * Description: - * Input one byte from the serial console + * Input one byte from the serial console. + * + * REVIST: If used with the serial driver enabled, then this could + * interfere with the serial driver operations. Serial interrupts should + * be disabled when this function executes in that case. * ****************************************************************************/ -int lpc11_lowgetc(void) +int up_getc(void) { uint8_t ch = 0; diff --git a/arch/arm/src/lpc11xx/lpc11_getc.h b/arch/arm/src/lpc11xx/lpc11_getc.h new file mode 100644 index 00000000000..e00864bfc48 --- /dev/null +++ b/arch/arm/src/lpc11xx/lpc11_getc.h @@ -0,0 +1,47 @@ +/************************************************************************************ + * arch/arm/src/lpc11/lpc11_getc.h + * + * Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_LPC11XX_LPC11_GETC_H +#define __ARCH_ARM_SRC_LPC11XX_LPC11_GETC_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include "lpc11_serial.h" +#include "chip/lpc11_uart.h" + +#endif /* __ARCH_ARM_SRC_LPC11XX_LPC11_GETC_H */ diff --git a/arch/arm/src/lpc11xx/lpc11_serial.c b/arch/arm/src/lpc11xx/lpc11_serial.c index 6bbd488a3ee..86e3feb11c5 100644 --- a/arch/arm/src/lpc11xx/lpc11_serial.c +++ b/arch/arm/src/lpc11xx/lpc11_serial.c @@ -64,7 +64,6 @@ #include "chip.h" #include "chip/lpc11_uart.h" #include "lpc11_gpio.h" -#include "lpc11_lowgetc.h" #include "lpc11_serial.h" /**************************************************************************** @@ -1041,19 +1040,4 @@ int up_putc(int ch) return ch; } -/**************************************************************************** - * Name: up_getc - * - * Description: - * Provide priority, low-level access to support OS debug writes - * - ****************************************************************************/ - -int up_getc(void) -{ - /* Check for LF */ - - return lpc11_lowgetc(); -} - #endif /* USE_SERIALDRIVER */ diff --git a/arch/arm/src/lpc17xx/Kconfig b/arch/arm/src/lpc17xx/Kconfig index e8ac3d3a22f..4bb53068bb6 100644 --- a/arch/arm/src/lpc17xx/Kconfig +++ b/arch/arm/src/lpc17xx/Kconfig @@ -172,36 +172,36 @@ config LPC17_SDCARD config LPC17_UART0 bool "UART0" default n - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC17_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC17_UART2 bool "UART2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC17_UART3 bool "UART3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC17_UART4 bool "UART4" default n - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC17_CAN1 bool "CAN1" - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER default n config LPC17_CAN2 diff --git a/arch/arm/src/lpc17xx/lpc17_adc.c b/arch/arm/src/lpc17xx/lpc17_adc.c index 9d761c6afad..490b25bf800 100644 --- a/arch/arm/src/lpc17xx/lpc17_adc.c +++ b/arch/arm/src/lpc17xx/lpc17_adc.c @@ -2,8 +2,9 @@ * arch/arm/src/lpc17xx/lpc17_adc.c * * Copyright (C) 2011 Li Zhuoyi. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Li Zhuoyi - * History: 0.1 2011-08-05 initial version + * Gregory Nutt * * This file is a part of NuttX: * @@ -50,6 +51,7 @@ #include #include #include +#include #include #include @@ -87,6 +89,7 @@ struct up_dev_s { + FAR const struct adc_callback_s *cb; uint8_t mask; uint32_t sps; int irq; @@ -98,8 +101,12 @@ struct up_dev_s * Private Function Prototypes ****************************************************************************/ +static void adc_receive(FAR struct up_dev_s *priv, uint8_t ch, int32_t data); + /* ADC methods */ +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); static void adc_reset(FAR struct adc_dev_s *dev); static int adc_setup(FAR struct adc_dev_s *dev); static void adc_shutdown(FAR struct adc_dev_s *dev); @@ -113,6 +120,7 @@ static int adc_interrupt(int irq, void *context); static const struct adc_ops_s g_adcops = { + .ao_bind = adc_bind, .ao_reset = adc_reset, .ao_setup = adc_setup, .ao_shutdown = adc_shutdown, @@ -137,6 +145,46 @@ static struct adc_dev_s g_adcdev = * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: adc_receive + * + * Description: + * Provide received ADC dat to the upper-half driver. + * + ****************************************************************************/ + +static void adc_receive(FAR struct up_dev_s *priv, uint8_t ch, int32_t data) +{ + /* Verify that the upper-half driver has bound its callback functions. */ + + if (priv->cb != NULL) + { + /* Perform the data received callback */ + + DEBUGASSERT(priv->cb->au_receive != NULL); + priv->cb->au_receive(&g_adcdev, ch, data); + } +} + +/**************************************************************************** + * Name: adc_bind + * + * Description: + * Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + * + ****************************************************************************/ + +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback) +{ + FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + priv->cb = callback; + return OK; +} + /**************************************************************************** * Name: adc_reset * @@ -384,7 +432,7 @@ static int adc_interrupt(int irq, void *context) { value = priv->buf[ch] / priv->count[ch]; value <<= 15; - adc_receive(&g_adcdev, ch, value); + adc_receive(priv, ch, value); priv->buf[ch] = 0; priv->count[ch] = 0; } @@ -409,7 +457,7 @@ static int adc_interrupt(int irq, void *context) { value = priv->buf[ch] / priv->count[ch]; value <<= 15; - adc_receive(&g_adcdev, ch, value); + adc_receive(priv, ch, value); priv->buf[ch] = 0; priv->count[ch] = 0; } @@ -446,7 +494,7 @@ static int adc_interrupt(int irq, void *context) #else /* CONFIG_ADC_WORKER_THREAD */ if ((regVal) & (1 << 31)) { - adc_receive(&g_adcdev, 0, (regVal >> 4) & 0xFFF); + adc_receive(priv, 0, (regVal >> 4) & 0xFFF); } #endif /* CONFIG_ADC_WORKER_THREAD */ @@ -473,7 +521,7 @@ static int adc_interrupt(int irq, void *context) #else /* CONFIG_ADC_WORKER_THREAD */ if ((regVal) & (1 << 31)) { - adc_receive(&g_adcdev, 1, (regVal >> 4) & 0xFFF); + adc_receive(priv, 1, (regVal >> 4) & 0xFFF); } #endif /* CONFIG_ADC_WORKER_THREAD */ @@ -500,7 +548,7 @@ static int adc_interrupt(int irq, void *context) #else /* CONFIG_ADC_WORKER_THREAD */ if ((regVal) & (1 << 31)) { - adc_receive(&g_adcdev, 2, (regVal >> 4) & 0xFFF); + adc_receive(priv, 2, (regVal >> 4) & 0xFFF); } #endif /* CONFIG_ADC_WORKER_THREAD */ @@ -512,7 +560,7 @@ static int adc_interrupt(int irq, void *context) regVal = getreg32(LPC17_ADC_DR3); if ((regVal) & (1 << 31)) { - adc_receive(&g_adcdev, 3, (regVal >> 4) & 0xFFF); + adc_receive(priv, 3, (regVal >> 4) & 0xFFF); } } @@ -521,7 +569,7 @@ static int adc_interrupt(int irq, void *context) regVal = getreg32(LPC17_ADC_DR4); if ((regVal) & (1 << 31)) { - adc_receive(&g_adcdev, 4, (regVal >> 4) & 0xFFF); + adc_receive(priv, 4, (regVal >> 4) & 0xFFF); } } @@ -530,7 +578,7 @@ static int adc_interrupt(int irq, void *context) regVal = getreg32(LPC17_ADC_DR5); if ((regVal) & (1 << 31)) { - adc_receive(&g_adcdev, 5, (regVal >> 4) & 0xFFF); + adc_receive(priv, 5, (regVal >> 4) & 0xFFF); } } @@ -539,7 +587,7 @@ static int adc_interrupt(int irq, void *context) regVal = getreg32(LPC17_ADC_DR6); if ((regVal) & (1 << 31)) { - adc_receive(&g_adcdev, 6, (regVal >> 4) & 0xFFF); + adc_receive(priv, 6, (regVal >> 4) & 0xFFF); } } @@ -548,7 +596,7 @@ static int adc_interrupt(int irq, void *context) regVal = getreg32(LPC17_ADC_DR7); if ((regVal) & (1 << 31)) { - adc_receive(&g_adcdev, 7, (regVal >> 4) & 0xFFF); + adc_receive(priv, 7, (regVal >> 4) & 0xFFF); } } diff --git a/arch/arm/src/lpc214x/Kconfig b/arch/arm/src/lpc214x/Kconfig index 857b5f54d0e..68926095cf0 100644 --- a/arch/arm/src/lpc214x/Kconfig +++ b/arch/arm/src/lpc214x/Kconfig @@ -92,12 +92,12 @@ menu "LPC214x Peripheral Support" config LPC214X_UART0 bool default y - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER config LPC214X_UART1 bool default y - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER config LPC214X_USBDEV bool "USB Device" diff --git a/arch/arm/src/lpc2378/Kconfig b/arch/arm/src/lpc2378/Kconfig index 4e153df4013..08197970c66 100644 --- a/arch/arm/src/lpc2378/Kconfig +++ b/arch/arm/src/lpc2378/Kconfig @@ -118,22 +118,22 @@ menu "LPC2378 Peripheral Support" config LPC2378_UART0 bool "UART0" default n - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER config LPC2378_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER config LPC2378_UART2 bool "UART2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER config LPC2378_UART3 bool "UART3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER config LPC2378_USBDEV bool "USB Device" diff --git a/arch/arm/src/lpc31xx/Kconfig b/arch/arm/src/lpc31xx/Kconfig index bb3f9435068..ffdaa811460 100644 --- a/arch/arm/src/lpc31xx/Kconfig +++ b/arch/arm/src/lpc31xx/Kconfig @@ -51,7 +51,7 @@ menu "LPC31xx Peripheral Support" config LPC31_UART bool "UART" default n - select ARCH_HAVE_UART + select UART_SERIALDRIVER config LPC31_SPI bool "SPI" diff --git a/arch/arm/src/lpc43xx/Kconfig b/arch/arm/src/lpc43xx/Kconfig index b0385a9d3c3..9a2bcad916f 100644 --- a/arch/arm/src/lpc43xx/Kconfig +++ b/arch/arm/src/lpc43xx/Kconfig @@ -37,6 +37,9 @@ config ARCH_CHIP_LPC4330FET256 config ARCH_CHIP_LPC4337JBD144 bool "LPC4337JBD144" +config ARCH_CHIP_LPC4337JET100 + bool "LPC4337JET100" + config ARCH_CHIP_LPC4350FBD208 bool "LPC4350FBD208" @@ -81,7 +84,7 @@ config ARCH_FAMILY_LPC4320 config ARCH_FAMILY_LPC4330 bool - default y if ARCH_CHIP_LPC4330FBD144 || ARCH_CHIP_LPC4330FET100 || ARCH_CHIP_LPC4330FET180 || ARCH_CHIP_LPC4330FET256 + default y if ARCH_CHIP_LPC4330FBD144 || ARCH_CHIP_LPC4330FET100 || ARCH_CHIP_LPC4330FET180 || ARCH_CHIP_LPC4330FET256 || ARCH_CHIP_LPC4337JET100 select ARCH_HAVE_TICKLESS config ARCH_FAMILY_LPC4337 @@ -271,25 +274,25 @@ config LPC43_TMR3 config LPC43_USART0 bool "USART0" default n - select ARCH_HAVE_USART0 + select USART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC43_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC43_USART2 bool "USART2" default n - select ARCH_HAVE_USART2 + select USART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC43_USART3 bool "USART3" default n - select ARCH_HAVE_USART3 + select USART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config LPC43_USBOTG @@ -311,6 +314,12 @@ config LPC43_WWDT endmenu # LPC43xx Peripheral Support +config LPC43_GPIO_IRQ + bool "GPIO interrupt support" + default n + ---help--- + Enable support for GPIO interrupts + if LPC43_ETHERNET menu "Ethernet MAC configuration" diff --git a/arch/arm/src/lpc43xx/Make.defs b/arch/arm/src/lpc43xx/Make.defs index 2ec96995545..60e0ad3ed0f 100644 --- a/arch/arm/src/lpc43xx/Make.defs +++ b/arch/arm/src/lpc43xx/Make.defs @@ -118,7 +118,7 @@ ifeq ($(CONFIG_LPC43_GPDMA),y) CHIP_CSRCS += lpc43_gpdma.c endif -ifeq ($(CONFIG_GPIO_IRQ),y) +ifeq ($(CONFIG_LPC43_GPIO_IRQ),y) CHIP_CSRCS += lpc43_gpioint.c endif @@ -182,6 +182,10 @@ ifeq ($(CONFIG_LPC43_USBOTG),y) CHIP_CSRCS += lpc43_ehci.c endif +ifeq ($(CONFIG_CRYPTO_AES),y) +CHIP_CSRCS += lpc43_aes.c +endif + ifeq ($(CONFIG_LPC43_USB0),y) ifeq ($(CONFIG_USBDEV),y) CHIP_CSRCS += lpc43_usb0dev.c diff --git a/arch/arm/src/lpc43xx/chip.h b/arch/arm/src/lpc43xx/chip.h index 08ef7217a52..630bdcb1909 100644 --- a/arch/arm/src/lpc43xx/chip.h +++ b/arch/arm/src/lpc43xx/chip.h @@ -141,6 +141,10 @@ # define ARMV7M_PERIPHERAL_INTERRUPTS 53 # include "chip/lpc435357_memorymap.h" # include "chip/lpc4357fet256_pinconfig.h" +#elif defined(CONFIG_ARCH_CHIP_LPC4337JET100) +# define ARMV7M_PERIPHERAL_INTERRUPTS 53 +# include "chip/lpc435357_memorymap.h" +# include "chip/lpc4337jet100_pinconfig.h" #else # error "Unsupported LPC43xx chip" #endif diff --git a/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h b/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h new file mode 100644 index 00000000000..cf3fcd22132 --- /dev/null +++ b/arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h @@ -0,0 +1,982 @@ +/**************************************************************************************************** + * arch/arm/src/lpc43xx/chip/lpc4337jet100_pinconfig.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_LPC43XX_CHIP_LPC4337JET100_PINCONF_H +#define __ARCH_ARM_SRC_LPC43XX_CHIP_LPC4337JET100_PINCONF_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ +/* NOTES: + * + * 1. These settings were taken from the LPC43_10_20_30_50 data sheet and may not be applicable to + * any other family members. + * + * 2. Settings taken from the data sheet include only function, pin set, and pin number. Additional + * settings must be verified before using these pin configurations (like pull-ups, open-drain, + * drive strength, input buffering, etc.). + * + * 3. Alternative pin selections are provided with a numeric suffix like _1, _2, etc. Drivers, + * however, will use the pin selection without the numeric suffix. Additional definitions are + * required in the board.h file to select between the alternative pins. For example, if CAN1_RD + * connects via Pins1[18], then the following definition should appear in the board.h header file + * for that board: + * + * 4. For ADC pins (PINCONF_ADCNpM), the pin must first be configured configured as a GPIO input. + * Then SCU's ADC function select register can be used to select the ADC. + * + * #define PINCONF_CAN1_RD PINCONF_CAN1_RD_1 + * + * The driver will then automatically configre Pins1[18] as the CAN1 RD pin. + */ + +#define PINCONF_ADC0p0 (PINCONF_FUNC0|PINCONF_PINS4|PINCONF_PIN_3) +#define PINCONF_ADC0p1 (PINCONF_FUNC0|PINCONF_PINS4|PINCONF_PIN_1) +#define PINCONF_ADC0p2 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_8) +#define PINCONF_ADC0p3 (PINCONF_FUNC0|PINCONF_PINS7|PINCONF_PIN_5) +#define PINCONF_ADC0p4 (PINCONF_FUNC0|PINCONF_PINS7|PINCONF_PIN_4) +#define PINCONF_ADC0p5 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_10) +#define PINCONF_ADC0p6 (PINCONF_FUNC0|PINCONF_PINSB|PINCONF_PIN_6) + +#define PINCONF_ADC1p0 (PINCONF_FUNC4|PINCONF_PINSC|PINCONF_PIN_3) +#define PINCONF_ADC1p1 (PINCONF_FUNC0|PINCONF_PINSC|PINCONF_PIN_0) +#define PINCONF_ADC1p2 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_9) +#define PINCONF_ADC1p3 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_6) +#define PINCONF_ADC1p4 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_5) +#define PINCONF_ADC1p5 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_11) +#define PINCONF_ADC1p6 (PINCONF_FUNC0|PINCONF_PINS7|PINCONF_PIN_7) +#define PINCONF_ADC1p7 (PINCONF_FUNC4|PINCONF_PINSF|PINCONF_PIN_7) + +#define PINCONF_ADCTRIG0 (PINCONF_FUNC0|PINCONF_PINSE|PINCONF_PIN_2) +#define PINCONF_ADCTRIG1_1 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_3) +#define PINCONF_ADCTRIG1_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_5) + +#define PINCONF_CAN0_RD_1 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_2) +#define PINCONF_CAN0_RD_2 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_1) +#define PINCONF_CAN0_TD_1 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_3) +#define PINCONF_CAN0_TD_2 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_2) + +#define PINCONF_CAN1_RD_1 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_18) +#define PINCONF_CAN1_RD_2 (PINCONF_FUNC5|PINCONF_PINSE|PINCONF_PIN_1) +#define PINCONF_CAN1_RD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_9) +#define PINCONF_CAN1_TD_1 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_17) +#define PINCONF_CAN1_TD_2 (PINCONF_FUNC5|PINCONF_PINSE|PINCONF_PIN_0) +#define PINCONF_CAN1_TD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_8) + +#define PINCONF_CGU_OUT0 (PINCONF_FUNC6|PINCONF_PINS8|PINCONF_PIN_8) +#define PINCONF_CGU_OUT1_1 (PINCONF_FUNC4|PINCONF_PINS3|PINCONF_PIN_3) +#define PINCONF_CGU_OUT1_2 (PINCONF_FUNC6|PINCONF_PINSA|PINCONF_PIN_0) + +#define PINCONF_CLKOUT (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_19) + +#define PINCONF_CTIN0_1 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_13) +#define PINCONF_CTIN0_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_4) +#define PINCONF_CTIN1_1 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_10) +#define PINCONF_CTIN1_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_3) +#define PINCONF_CTIN2_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_5) +#define PINCONF_CTIN2_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_10) +#define PINCONF_CTIN2_3 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_8) +#define PINCONF_CTIN3_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_0) +#define PINCONF_CTIN3_2 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_3) +#define PINCONF_CTIN3_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_10) +#define PINCONF_CTIN4_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_13) +#define PINCONF_CTIN4_2 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_2) +#define PINCONF_CTIN4_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_9) +#define PINCONF_CTIN5_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_6) +#define PINCONF_CTIN5_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_8) +#define PINCONF_CTIN5_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_7) +#define PINCONF_CTIN5_4 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_4) +#define PINCONF_CTIN6_1 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_9) +#define PINCONF_CTIN6_2 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_4) +#define PINCONF_CTIN6_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_8) +#define PINCONF_CTIN6_4 (PINCONF_FUNC5|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_CTIN6_5 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_6) +#define PINCONF_CTIN7_1 (PINCONF_FUNC5|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_CTIN7_2 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_5) + +#define PINCONF_CTOUT0_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_8) +#define PINCONF_CTOUT0_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_2) +#define PINCONF_CTOUT0_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_15) +#define PINCONF_CTOUT1_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_7) +#define PINCONF_CTOUT1_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_1) +#define PINCONF_CTOUT1_3 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_9) +#define PINCONF_CTOUT2_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_10) +#define PINCONF_CTOUT2_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_4) +#define PINCONF_CTOUT2_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_6) +#define PINCONF_CTOUT3_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_9) +#define PINCONF_CTOUT3_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_3) +#define PINCONF_CTOUT3_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_5) +#define PINCONF_CTOUT4_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_12) +#define PINCONF_CTOUT4_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_6) +#define PINCONF_CTOUT4_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_8) +#define PINCONF_CTOUT5_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_11) +#define PINCONF_CTOUT5_2 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_5) +#define PINCONF_CTOUT5_3 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_7) +#define PINCONF_CTOUT6_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_2) +#define PINCONF_CTOUT6_2 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_5) +#define PINCONF_CTOUT6_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_3) +#define PINCONF_CTOUT6_4 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_1) +#define PINCONF_CTOUT7_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_1) +#define PINCONF_CTOUT7_2 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_12) +#define PINCONF_CTOUT7_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_2) +#define PINCONF_CTOUT7_4 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_2) +#define PINCONF_CTOUT8_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_3) +#define PINCONF_CTOUT8_2 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_7) +#define PINCONF_CTOUT8_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_4) +#define PINCONF_CTOUT8_4 (PINCONF_FUNC5|PINCONF_PINSB|PINCONF_PIN_3) +#define PINCONF_CTOUT8_5 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_15) +#define PINCONF_CTOUT9_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_4) +#define PINCONF_CTOUT9_2 (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_4) +#define PINCONF_CTOUT9_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_5) +#define PINCONF_CTOUT10_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_5) +#define PINCONF_CTOUT10_2 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_0) +#define PINCONF_CTOUT10_3 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_6) +#define PINCONF_CTOUT10_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_12) +#define PINCONF_CTOUT11_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_6) +#define PINCONF_CTOUT11_2 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_12) +#define PINCONF_CTOUT11_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_9) +#define PINCONF_CTOUT11_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_14) +#define PINCONF_CTOUT12_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_5) +#define PINCONF_CTOUT12_2 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_11) +#define PINCONF_CTOUT12_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_8) +#define PINCONF_CTOUT12_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_16) +#define PINCONF_CTOUT13_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_4) +#define PINCONF_CTOUT13_2 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_9) +#define PINCONF_CTOUT13_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_7) +#define PINCONF_CTOUT13_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_13) +#define PINCONF_CTOUT14_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_0) +#define PINCONF_CTOUT14_2 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_13) +#define PINCONF_CTOUT14_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_10) +#define PINCONF_CTOUT14_4 (PINCONF_FUNC6|PINCONF_PINSD|PINCONF_PIN_11) +#define PINCONF_CTOUT15_1 (PINCONF_FUNC1|PINCONF_PINS7|PINCONF_PIN_1) +#define PINCONF_CTOUT15_2 (PINCONF_FUNC1|PINCONF_PINSD|PINCONF_PIN_0) +#define PINCONF_CTOUT15_3 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_11) + +#define PINCONF_EMC_A0 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_9) +#define PINCONF_EMC_A1 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_10) +#define PINCONF_EMC_A2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_11) +#define PINCONF_EMC_A3 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_12) +#define PINCONF_EMC_A4 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_13) +#define PINCONF_EMC_A5 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_0) +#define PINCONF_EMC_A6 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_1) +#define PINCONF_EMC_A7 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_2) +#define PINCONF_EMC_A8 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_8) +#define PINCONF_EMC_A9 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_7) +#define PINCONF_EMC_A10 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_EMC_A11 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_EMC_A12 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_EMC_A13 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_EMC_A14 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_8) +#define PINCONF_EMC_A15 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_7) +#define PINCONF_EMC_A16 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_16) +#define PINCONF_EMC_A17 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_15) +#define PINCONF_EMC_A18 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_0) +#define PINCONF_EMC_A19 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_1) +#define PINCONF_EMC_A20 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_2) +#define PINCONF_EMC_A21 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_3) +#define PINCONF_EMC_A22 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_4) +#define PINCONF_EMC_A23 (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_4) +#define PINCONF_EMC_BLS0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_4) +#define PINCONF_EMC_BLS1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_6) +#define PINCONF_EMC_BLS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_13) +#define PINCONF_EMC_BLS3 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_10) +#define PINCONF_EMC_CAS (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_4) +#define PINCONF_EMC_CKEOUT0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_11) +#define PINCONF_EMC_CKEOUT1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_2) +#define PINCONF_EMC_CKEOUT2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_1) +#define PINCONF_EMC_CKEOUT3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_15) +#define PINCONF_EMC_CS0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_5) +#define PINCONF_EMC_CS1 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_3) +#define PINCONF_EMC_CS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_12) +#define PINCONF_EMC_CS3 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_11) +#define PINCONF_EMC_D0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_7) +#define PINCONF_EMC_D1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_8) +#define PINCONF_EMC_D2 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_9) +#define PINCONF_EMC_D3 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_10) +#define PINCONF_EMC_D4 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_11) +#define PINCONF_EMC_D5 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_EMC_D6 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_EMC_D7 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_14) +#define PINCONF_EMC_D8 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_4) +#define PINCONF_EMC_D9 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_5) +#define PINCONF_EMC_D10 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_6) +#define PINCONF_EMC_D11 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_7) +#define PINCONF_EMC_D12 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_0) +#define PINCONF_EMC_D13 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_1) +#define PINCONF_EMC_D14 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_2) +#define PINCONF_EMC_D15 (PINCONF_FUNC2|PINCONF_PINS5|PINCONF_PIN_3) +#define PINCONF_EMC_D16 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_2) +#define PINCONF_EMC_D17 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_3) +#define PINCONF_EMC_D18 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_4) +#define PINCONF_EMC_D19 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_5) +#define PINCONF_EMC_D20 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_6) +#define PINCONF_EMC_D21 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_7) +#define PINCONF_EMC_D22 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_8) +#define PINCONF_EMC_D23 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_9) +#define PINCONF_EMC_D24 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_5) +#define PINCONF_EMC_D25 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_6) +#define PINCONF_EMC_D26 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_7) +#define PINCONF_EMC_D27 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_8) +#define PINCONF_EMC_D28 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_9) +#define PINCONF_EMC_D29 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_10) +#define PINCONF_EMC_D30 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_11) +#define PINCONF_EMC_D31 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_12) +#define PINCONF_EMC_DQMOUT0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_12) +#define PINCONF_EMC_DQMOUT1 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_10) +#define PINCONF_EMC_DQMOUT2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_0) +#define PINCONF_EMC_DQMOUT3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_13) +#define PINCONF_EMC_DYCS0 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_9) +#define PINCONF_EMC_DYCS1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_1) +#define PINCONF_EMC_DYCS2 (PINCONF_FUNC2|PINCONF_PINSD|PINCONF_PIN_14) +#define PINCONF_EMC_DYCS3 (PINCONF_FUNC3|PINCONF_PINSE|PINCONF_PIN_14) +#define PINCONF_EMC_OE (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_3) +#define PINCONF_EMC_RAS (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_5) +#define PINCONF_EMC_WE (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_6) + +#define PINCONF_ENET_COL_1 (PINCONF_FUNC2|PINCONF_PINS0|PINCONF_PIN_1) +#define PINCONF_ENET_COL_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_6) +#define PINCONF_ENET_COL_3 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_1) +#define PINCONF_ENET_CRS_1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_16) +#define PINCONF_ENET_CRS_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_0) +#define PINCONF_ENET_MDC_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_1) +#define PINCONF_ENET_MDC_2 (PINCONF_FUNC6|PINCONF_PINS7|PINCONF_PIN_7) +#define PINCONF_ENET_MDC_3 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_ENET_MDIO (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_17|PINCONF_FLOAT|PINCONF_INBUFFER|PINCONF_GLITCH) +#define PINCONF_ENET_REF_CLK (PINCONF_FUNC0|PINCONF_PINS1|PINCONF_PIN_19|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_FLOAT) +#define PINCONF_ENET_RXD0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_15|PINCONF_FLOAT|PINCONF_INBUFFER|PINCONF_GLITCH) +#define PINCONF_ENET_RXD1 (PINCONF_FUNC2|PINCONF_PINS0|PINCONF_PIN_0|PINCONF_FLOAT|PINCONF_INBUFFER|PINCONF_GLITCH) +#define PINCONF_ENET_RXD2_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_6) +#define PINCONF_ENET_RXD2_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_3) +#define PINCONF_ENET_RXD3_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_7) +#define PINCONF_ENET_RXD3_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_2) +#define PINCONF_ENET_RX_CLK (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_0) +#define PINCONF_ENET_RX_DV_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_8) +#define PINCONF_ENET_RX_DV_2 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_16|PINCONF_FLOAT|PINCONF_INBUFFER|PINCONF_GLITCH) +#define PINCONF_ENET_RX_ER_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_9) +#define PINCONF_ENET_RX_ER_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_1) +#define PINCONF_ENET_TXD0 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_18|PINCONF_FLOAT|PINCONF_GLITCH) +#define PINCONF_ENET_TXD1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_20|PINCONF_FLOAT|PINCONF_GLITCH) +#define PINCONF_ENET_TXD2_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_2) +#define PINCONF_ENET_TXD2_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_4) +#define PINCONF_ENET_TXD3_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_3) +#define PINCONF_ENET_TXD3_2 (PINCONF_FUNC5|PINCONF_PINS9|PINCONF_PIN_5) +#define PINCONF_ENET_TXEN (PINCONF_FUNC6|PINCONF_PINS0|PINCONF_PIN_1|PINCONF_FLOAT|PINCONF_GLITCH) +#define PINCONF_ENET_TX_CLK (PINCONF_FUNC0|PINCONF_PINS1|PINCONF_PIN_19) +#define PINCONF_ENET_TX_EN (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_4) +#define PINCONF_ENET_TX_ER_1 (PINCONF_FUNC3|PINCONF_PINSC|PINCONF_PIN_5) +#define PINCONF_ENET_TX_ER_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_14) + +#define PINCONF_GPIO0p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS0|PINCONF_PIN_0) +#define PINCONF_GPIO0p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS0|PINCONF_PIN_1) +#define PINCONF_GPIO0p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_15) +#define PINCONF_GPIO0p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_16) +#define PINCONF_GPIO0p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_0) +#define PINCONF_GPIO0p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_6) +#define PINCONF_GPIO0p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_6) +#define PINCONF_GPIO0p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_7) +#define PINCONF_GPIO0p8 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_1) +#define PINCONF_GPIO0p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_2) +#define PINCONF_GPIO0p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_3) +#define PINCONF_GPIO0p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_4) +#define PINCONF_GPIO0p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_17) +#define PINCONF_GPIO0p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_18) +#define PINCONF_GPIO0p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_10) +#define PINCONF_GPIO0p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_20) +#define PINCONF_GPIO1p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_7) +#define PINCONF_GPIO1p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_8) +#define PINCONF_GPIO1p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_9) +#define PINCONF_GPIO1p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_10) +#define PINCONF_GPIO1p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_11) +#define PINCONF_GPIO1p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_GPIO1p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_GPIO1p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_14) +#define PINCONF_GPIO1p8 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_5) +#define PINCONF_GPIO1p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_6) +#define PINCONF_GPIO1p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_9) +#define PINCONF_GPIO1p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_11) +#define PINCONF_GPIO1p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_12) +#define PINCONF_GPIO1p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_13) +#define PINCONF_GPIO1p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_4) +#define PINCONF_GPIO1p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_5) +#define PINCONF_GPIO2p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_0) +#define PINCONF_GPIO2p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_1) +#define PINCONF_GPIO2p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_2) +#define PINCONF_GPIO2p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_3) +#define PINCONF_GPIO2p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_4) +#define PINCONF_GPIO2p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_5) +#define PINCONF_GPIO2p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_6) +#define PINCONF_GPIO2p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_7) +#define PINCONF_GPIO2p8 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_12) +#define PINCONF_GPIO2p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_0) +#define PINCONF_GPIO2p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_1) +#define PINCONF_GPIO2p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_2) +#define PINCONF_GPIO2p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_3) +#define PINCONF_GPIO2p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_4) +#define PINCONF_GPIO2p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_5) +#define PINCONF_GPIO2p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_6) +#define PINCONF_GPIO3p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_1) +#define PINCONF_GPIO3p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_2) +#define PINCONF_GPIO3p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_3) +#define PINCONF_GPIO3p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_4) +#define PINCONF_GPIO3p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_5) +#define PINCONF_GPIO3p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_9) +#define PINCONF_GPIO3p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_10) +#define PINCONF_GPIO3p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_11) +#define PINCONF_GPIO3p8 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_0) +#define PINCONF_GPIO3p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_1) +#define PINCONF_GPIO3p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_2) +#define PINCONF_GPIO3p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_3) +#define PINCONF_GPIO3p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_4) +#define PINCONF_GPIO3p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_5) +#define PINCONF_GPIO3p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_6) +#define PINCONF_GPIO3p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS7|PINCONF_PIN_7) +#define PINCONF_GPIO4p0 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_0) +#define PINCONF_GPIO4p1 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_1) +#define PINCONF_GPIO4p2 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_2) +#define PINCONF_GPIO4p3 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_3) +#define PINCONF_GPIO4p4 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_4) +#define PINCONF_GPIO4p5 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_5) +#define PINCONF_GPIO4p6 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_6) +#define PINCONF_GPIO4p7 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS8|PINCONF_PIN_7) +#define PINCONF_GPIO4p8 (PINCONF_FUNC0|PINCONF_PINSA|PINCONF_PIN_1) +#define PINCONF_GPIO4p9 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINSA|PINCONF_PIN_2) +#define PINCONF_GPIO4p10 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINSA|PINCONF_PIN_3) +#define PINCONF_GPIO4p11 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_6) +#define PINCONF_GPIO4p12 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_0) +#define PINCONF_GPIO4p13 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_1) +#define PINCONF_GPIO4p14 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_2) +#define PINCONF_GPIO4p15 (PINCONF_FUNC0|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_3) +#define PINCONF_GPIO5p0 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_GPIO5p1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_GPIO5p2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_GPIO5p3 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_3) +#define PINCONF_GPIO5p4 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_4) +#define PINCONF_GPIO5p5 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_5) +#define PINCONF_GPIO5p6 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_GPIO5p7 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_8) +#define PINCONF_GPIO5p8 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_1) +#define PINCONF_GPIO5p9 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_2) +#define PINCONF_GPIO5p10 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_7) +#define PINCONF_GPIO5p11 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_8) +#define PINCONF_GPIO5p12 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_8) +#define PINCONF_GPIO5p13 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_9) +#define PINCONF_GPIO5p14 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS4|PINCONF_PIN_10) +#define PINCONF_GPIO5p15 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_7) +#define PINCONF_GPIO5p16 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_8) +#define PINCONF_GPIO5p17 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_4) +#define PINCONF_GPIO5p18 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_5) +#define PINCONF_GPIO5p19 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSA|PINCONF_PIN_4) +#define PINCONF_GPIO5p20 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_0) +#define PINCONF_GPIO5p21 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_1) +#define PINCONF_GPIO5p22 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_2) +#define PINCONF_GPIO5p23 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_3) +#define PINCONF_GPIO5p24 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_4) +#define PINCONF_GPIO5p25 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_5) +#define PINCONF_GPIO5p26 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSB|PINCONF_PIN_6) +#define PINCONF_GPIO6p0 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_1) +#define PINCONF_GPIO6p1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_2) +#define PINCONF_GPIO6p2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_3) +#define PINCONF_GPIO6p3 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_4) +#define PINCONF_GPIO6p4 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_5) +#define PINCONF_GPIO6p5 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_6) +#define PINCONF_GPIO6p6 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_7) +#define PINCONF_GPIO6p7 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_8) +#define PINCONF_GPIO6p8 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_9) +#define PINCONF_GPIO6p9 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_10) +#define PINCONF_GPIO6p10 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_11) +#define PINCONF_GPIO6p11 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_12) +#define PINCONF_GPIO6p12 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_13) +#define PINCONF_GPIO6p13 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_14) +#define PINCONF_GPIO6p14 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_0) +#define PINCONF_GPIO6p15 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_1) +#define PINCONF_GPIO6p16 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_2) +#define PINCONF_GPIO6p17 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_3) +#define PINCONF_GPIO6p18 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_4) +#define PINCONF_GPIO6p19 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_5) +#define PINCONF_GPIO6p20 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_6) +#define PINCONF_GPIO6p21 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_7) +#define PINCONF_GPIO6p22 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_8) +#define PINCONF_GPIO6p23 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_9) +#define PINCONF_GPIO6p24 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_10) +#define PINCONF_GPIO6p25 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_11) +#define PINCONF_GPIO6p26 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_12) +#define PINCONF_GPIO6p27 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_13) +#define PINCONF_GPIO6p28 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_14) +#define PINCONF_GPIO6p29 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_15) +#define PINCONF_GPIO6p30 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSD|PINCONF_PIN_16) +#define PINCONF_GPIO7p0 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_0) +#define PINCONF_GPIO7p1 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_1) +#define PINCONF_GPIO7p2 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_2) +#define PINCONF_GPIO7p3 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_3) +#define PINCONF_GPIO7p4 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_4) +#define PINCONF_GPIO7p5 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_5) +#define PINCONF_GPIO7p6 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_6) +#define PINCONF_GPIO7p7 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_7) +#define PINCONF_GPIO7p8 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_8) +#define PINCONF_GPIO7p9 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_9) +#define PINCONF_GPIO7p10 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_10) +#define PINCONF_GPIO7p11 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_11) +#define PINCONF_GPIO7p12 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_12) +#define PINCONF_GPIO7p13 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_13) +#define PINCONF_GPIO7p14 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_14) +#define PINCONF_GPIO7p15 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_15) +#define PINCONF_GPIO7p16 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_1) +#define PINCONF_GPIO7p17 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_2) +#define PINCONF_GPIO7p18 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_3) +#define PINCONF_GPIO7p19 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_5) +#define PINCONF_GPIO7p20 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_6) +#define PINCONF_GPIO7p21 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_7) +#define PINCONF_GPIO7p22 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_8) +#define PINCONF_GPIO7p23 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_9) +#define PINCONF_GPIO7p24 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_10) +#define PINCONF_GPIO7p25 (PINCONF_FUNC4|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_11) + +#define PINCONF_GP_CLKIN_1 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_7) +#define PINCONF_GP_CLKIN_2 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_0) +#define PINCONF_GP_CLKIN_3 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_4) + +#define PINCONF_I2C1_SCL_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_4) +#define PINCONF_I2C1_SCL_2 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_15) +#define PINCONF_I2C1_SDA_1 (PINCONF_FUNC1|PINCONF_PINS2|PINCONF_PIN_3) +#define PINCONF_I2C1_SDA_2 (PINCONF_FUNC2|PINCONF_PINSE|PINCONF_PIN_13) + +#define PINCONF_I2S0_RX_MCLK_1 (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_0) +#define PINCONF_I2S0_RX_MCLK_2 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_0) +#define PINCONF_I2S0_RX_MCLK_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_19) +#define PINCONF_I2S0_RX_SCK_1 (PINCONF_FUNC0|PINCONF_PINS3|PINCONF_PIN_0) +#define PINCONF_I2S0_RX_SCK_2 (PINCONF_FUNC4|PINCONF_PINS6|PINCONF_PIN_0) +#define PINCONF_I2S0_RX_SCK_3 (PINCONF_FUNC7|PINCONF_PINSF|PINCONF_PIN_4) +#define PINCONF_I2S0_RX_SDA_1 (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_2) +#define PINCONF_I2S0_RX_SDA_2 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_2) +#define PINCONF_I2S0_RX_WS_1 (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_1) +#define PINCONF_I2S0_RX_WS_2 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_1) +#define PINCONF_I2S0_TXWS (PINCONF_FUNC6|PINCONF_PINS0|PINCONF_PIN_0) +#define PINCONF_I2S0_TX_MCLK_1 (PINCONF_FUNC3|PINCONF_PINS3|PINCONF_PIN_0) +#define PINCONF_I2S0_TX_MCLK_2 (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_3) +#define PINCONF_I2S0_TX_MCLK_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_4) +#define PINCONF_I2S0_TX_SCK_1 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_0) +#define PINCONF_I2S0_TX_SCK_2 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_7) +#define PINCONF_I2S0_TX_SDA_1 (PINCONF_FUNC0|PINCONF_PINS3|PINCONF_PIN_2) +#define PINCONF_I2S0_TX_SDA_2 (PINCONF_FUNC2|PINCONF_PINS7|PINCONF_PIN_2) +#define PINCONF_I2S0_TX_SDA_3 (PINCONF_FUNC4|PINCONF_PINS9|PINCONF_PIN_2) +#define PINCONF_I2S0_TX_SDA_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_5) +#define PINCONF_I2S0_TX_SDA_5 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_12) +#define PINCONF_I2S0_TX_WS_1 (PINCONF_FUNC0|PINCONF_PINS3|PINCONF_PIN_1) +#define PINCONF_I2S0_TX_WS_2 (PINCONF_FUNC2|PINCONF_PINS7|PINCONF_PIN_1) +#define PINCONF_I2S0_TX_WS_3 (PINCONF_FUNC4|PINCONF_PINS9|PINCONF_PIN_1) +#define PINCONF_I2S0_TX_WS_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_4) +#define PINCONF_I2S0_TX_WS_5 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_13) + +#define PINCONF_I2S1_RX_MCLK (PINCONF_FUNC5|PINCONF_PINSA|PINCONF_PIN_0) +#define PINCONF_I2S1_RX_SDA (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_4) +#define PINCONF_I2S1_RX_WS (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_5) +#define PINCONF_I2S1_TXSDA (PINCONF_FUNC7|PINCONF_PINS0|PINCONF_PIN_1) +#define PINCONF_I2S1_TXWS (PINCONF_FUNC7|PINCONF_PINS0|PINCONF_PIN_0) +#define PINCONF_I2S1_TX_MCLK_1 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_8) +#define PINCONF_I2S1_TX_MCLK_2 (PINCONF_FUNC7|PINCONF_PINSF|PINCONF_PIN_0) +#define PINCONF_I2S1_TX_SCK_1 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_7) +#define PINCONF_I2S1_TX_SCK_2 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_19) +#define PINCONF_I2S1_TX_SCK_3 (PINCONF_FUNC7|PINCONF_PINS3|PINCONF_PIN_3) +#define PINCONF_I2S1_TX_SDA (PINCONF_FUNC7|PINCONF_PINSF|PINCONF_PIN_6) +#define PINCONF_I2S1_TX_WS (PINCONF_FUNC7|PINCONF_PINSF|PINCONF_PIN_7) + +#define PINCONF_LCD_DCLK_1 (PINCONF_FUNC0|PINCONF_PINS4|PINCONF_PIN_7) +#define PINCONF_LCD_DCLK_2 (PINCONF_FUNC4|PINCONF_PINSC|PINCONF_PIN_0) +#define PINCONF_LCD_ENAB (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_6) +#define PINCONF_LCD_FP (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_5) +#define PINCONF_LCD_LCDM (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_6) +#define PINCONF_LCD_LE (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_0) +#define PINCONF_LCD_LP_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_6) +#define PINCONF_LCD_LP_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_6) +#define PINCONF_LCD_PWR_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_7) +#define PINCONF_LCD_PWR_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_7) +#define PINCONF_LCD_PWR_3 (PINCONF_FUNC6|PINCONF_PINSB|PINCONF_PIN_5) +#define PINCONF_LCD_VD0 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_1) +#define PINCONF_LCD_VD1 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_4) +#define PINCONF_LCD_VD2 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_3) +#define PINCONF_LCD_VD3 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_2) +#define PINCONF_LCD_VD4_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_7) +#define PINCONF_LCD_VD4_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_4) +#define PINCONF_LCD_VD5_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_6) +#define PINCONF_LCD_VD5_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_3) +#define PINCONF_LCD_VD6_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_5) +#define PINCONF_LCD_VD6_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_2) +#define PINCONF_LCD_VD7_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_4) +#define PINCONF_LCD_VD7_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_1) +#define PINCONF_LCD_VD8_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_5) +#define PINCONF_LCD_VD8_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_5) +#define PINCONF_LCD_VD9 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_8) +#define PINCONF_LCD_VD10 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_10) +#define PINCONF_LCD_VD11 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_9) +#define PINCONF_LCD_VD12_1 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_3) +#define PINCONF_LCD_VD12_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_2) +#define PINCONF_LCD_VD12_3 (PINCONF_FUNC7|PINCONF_PINS3|PINCONF_PIN_5) +#define PINCONF_LCD_VD13_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_6) +#define PINCONF_LCD_VD13_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_0) +#define PINCONF_LCD_VD13_3 (PINCONF_FUNC7|PINCONF_PINS3|PINCONF_PIN_4) +#define PINCONF_LCD_VD14_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_5) +#define PINCONF_LCD_VD14_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_10) +#define PINCONF_LCD_VD14_3 (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_2) +#define PINCONF_LCD_VD15_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_4) +#define PINCONF_LCD_VD15_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_9) +#define PINCONF_LCD_VD15_3 (PINCONF_FUNC6|PINCONF_PINS3|PINCONF_PIN_1) +#define PINCONF_LCD_VD16_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_4) +#define PINCONF_LCD_VD16_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_4) +#define PINCONF_LCD_VD17 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_3) +#define PINCONF_LCD_VD18 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_2) +#define PINCONF_LCD_VD19_1 (PINCONF_FUNC3|PINCONF_PINS7|PINCONF_PIN_1) +#define PINCONF_LCD_VD19_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_3) +#define PINCONF_LCD_VD19_3 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_1) +#define PINCONF_LCD_VD19_4 (PINCONF_FUNC6|PINCONF_PINSB|PINCONF_PIN_6) +#define PINCONF_LCD_VD20_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_3) +#define PINCONF_LCD_VD20_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_4) +#define PINCONF_LCD_VD21_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_2) +#define PINCONF_LCD_VD21_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_3) +#define PINCONF_LCD_VD22_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_1) +#define PINCONF_LCD_VD22_2 (PINCONF_FUNC5|PINCONF_PINS4|PINCONF_PIN_8) +#define PINCONF_LCD_VD23_1 (PINCONF_FUNC2|PINCONF_PINSB|PINCONF_PIN_0) +#define PINCONF_LCD_VD23_2 (PINCONF_FUNC4|PINCONF_PINS7|PINCONF_PIN_5) + +#define PINCONF_MCABORT_1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_10) +#define PINCONF_MCABORT_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_0) +#define PINCONF_MCI0_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_3) +#define PINCONF_MCI0_2 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_2) +#define PINCONF_MCI1_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_2) +#define PINCONF_MCI1_2 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_1) +#define PINCONF_MCI2_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_1) +#define PINCONF_MCI2_2 (PINCONF_FUNC3|PINCONF_PINS8|PINCONF_PIN_0) +#define PINCONF_MCOA0_1 (PINCONF_FUNC1|PINCONF_PINS4|PINCONF_PIN_0) +#define PINCONF_MCOA0_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_3) +#define PINCONF_MCOA1_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_5) +#define PINCONF_MCOA1_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_5) +#define PINCONF_MCOA2_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_7) +#define PINCONF_MCOA2_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_1) +#define PINCONF_MCOB0_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_4) +#define PINCONF_MCOB0_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_4) +#define PINCONF_MCOB1_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_6) +#define PINCONF_MCOB1_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_6) +#define PINCONF_MCOB2_1 (PINCONF_FUNC1|PINCONF_PINS5|PINCONF_PIN_0) +#define PINCONF_MCOB2_2 (PINCONF_FUNC1|PINCONF_PINS9|PINCONF_PIN_2) + +#define PINCONF_NMI_1 (PINCONF_FUNC1|PINCONF_PINSE|PINCONF_PIN_4) +#define PINCONF_NMI_2 (PINCONF_FUNC2|PINCONF_PINS4|PINCONF_PIN_0) + +#define PINCONF_QEI_IDX (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_1) +#define PINCONF_QEI_PHA (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_3) +#define PINCONF_QEI_PHB (PINCONF_FUNC1|PINCONF_PINSA|PINCONF_PIN_2) + +#define PINCONF_SD_CD_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_SD_CD_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_8) +#define PINCONF_SD_CLK (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_0) +#define PINCONF_SD_CMD_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_6) +#define PINCONF_SD_CMD_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_10) +#define PINCONF_SD_DAT0_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_9) +#define PINCONF_SD_DAT0_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_4) +#define PINCONF_SD_DAT1_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_10) +#define PINCONF_SD_DAT1_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_5) +#define PINCONF_SD_DAT2_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_11) +#define PINCONF_SD_DAT2_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_6) +#define PINCONF_SD_DAT3_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_SD_DAT3_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_7) +#define PINCONF_SD_DAT4 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_11) +#define PINCONF_SD_DAT5 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_12) +#define PINCONF_SD_DAT6 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_13) +#define PINCONF_SD_DAT7 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_14) +#define PINCONF_SD_POW_1 (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_1) +#define PINCONF_SD_POW_2 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_5) +#define PINCONF_SD_POW_3 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_9) +#define PINCONF_SD_RST_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_3) +#define PINCONF_SD_RST_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_2) +#define PINCONF_SD_VOLT0_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_8) +#define PINCONF_SD_VOLT0_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_1) +#define PINCONF_SD_VOLT1_1 (PINCONF_FUNC7|PINCONF_PINS1|PINCONF_PIN_4) +#define PINCONF_SD_VOLT1_2 (PINCONF_FUNC7|PINCONF_PINSC|PINCONF_PIN_3) +#define PINCONF_SD_VOLT2_1 (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_16) +#define PINCONF_SD_VOLT2_2 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_11) +#define PINCONF_SD_WP_1 (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_15) +#define PINCONF_SD_WP_2 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_10) + +#define PINCONF_SGPIO0_1 (PINCONF_FUNC3|PINCONF_PINS0|PINCONF_PIN_0) +#define PINCONF_SGPIO0_2 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_0) +#define PINCONF_SGPIO0_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_1) +#define PINCONF_SGPIO1_1 (PINCONF_FUNC3|PINCONF_PINS0|PINCONF_PIN_1) +#define PINCONF_SGPIO1_2 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_1) +#define PINCONF_SGPIO1_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_2) +#define PINCONF_SGPIO2_1 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_15) +#define PINCONF_SGPIO2_2 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_2) +#define PINCONF_SGPIO2_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_3) +#define PINCONF_SGPIO3_1 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_16) +#define PINCONF_SGPIO3_2 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_5) +#define PINCONF_SGPIO3_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_9) +#define PINCONF_SGPIO4_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_SGPIO4_2 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_3) +#define PINCONF_SGPIO4_3 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_4) +#define PINCONF_SGPIO4_4 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_5) +#define PINCONF_SGPIO4_5 (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_0) +#define PINCONF_SGPIO4_6 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_0) +#define PINCONF_SGPIO5_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_SGPIO5_2 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_6) +#define PINCONF_SGPIO5_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_6) +#define PINCONF_SGPIO5_4 (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_1) +#define PINCONF_SGPIO5_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_1) +#define PINCONF_SGPIO6_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_SGPIO6_2 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_7) +#define PINCONF_SGPIO6_3 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_7) +#define PINCONF_SGPIO6_4 (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_2) +#define PINCONF_SGPIO6_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_2) +#define PINCONF_SGPIO7_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_SGPIO7_2 (PINCONF_FUNC2|PINCONF_PINS6|PINCONF_PIN_8) +#define PINCONF_SGPIO7_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_0) +#define PINCONF_SGPIO7_4 (PINCONF_FUNC6|PINCONF_PINSF|PINCONF_PIN_8) +#define PINCONF_SGPIO7_5 (PINCONF_FUNC7|PINCONF_PINS7|PINCONF_PIN_7) +#define PINCONF_SGPIO7_6 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_3) +#define PINCONF_SGPIO8_1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_1) +#define PINCONF_SGPIO8_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_0) +#define PINCONF_SGPIO8_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_SGPIO8_4 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_6) +#define PINCONF_SGPIO8_5 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_2) +#define PINCONF_SGPIO8_6 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_4) +#define PINCONF_SGPIO9_1 (PINCONF_FUNC3|PINCONF_PINS1|PINCONF_PIN_2) +#define PINCONF_SGPIO9_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_1) +#define PINCONF_SGPIO9_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_SGPIO9_4 (PINCONF_FUNC6|PINCONF_PINS9|PINCONF_PIN_3) +#define PINCONF_SGPIO9_5 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_3) +#define PINCONF_SGPIO9_6 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_5) +#define PINCONF_SGPIO10_1 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_3) +#define PINCONF_SGPIO10_2 (PINCONF_FUNC4|PINCONF_PINS8|PINCONF_PIN_2) +#define PINCONF_SGPIO10_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_14) +#define PINCONF_SGPIO10_4 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_4) +#define PINCONF_SGPIO10_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_6) +#define PINCONF_SGPIO11_1 (PINCONF_FUNC2|PINCONF_PINS1|PINCONF_PIN_4) +#define PINCONF_SGPIO11_2 (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_12) +#define PINCONF_SGPIO11_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_17) +#define PINCONF_SGPIO11_4 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_5) +#define PINCONF_SGPIO11_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_7) +#define PINCONF_SGPIO12_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_3) +#define PINCONF_SGPIO12_2 (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_13) +#define PINCONF_SGPIO12_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_18) +#define PINCONF_SGPIO12_4 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_6) +#define PINCONF_SGPIO12_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_8) +#define PINCONF_SGPIO13_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_4) +#define PINCONF_SGPIO13_2 (PINCONF_FUNC5|PINCONF_PINSC|PINCONF_PIN_14) +#define PINCONF_SGPIO13_3 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_20) +#define PINCONF_SGPIO13_4 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_8) +#define PINCONF_SGPIO13_5 (PINCONF_FUNC7|PINCONF_PINSD|PINCONF_PIN_9) +#define PINCONF_SGPIO14_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_5) +#define PINCONF_SGPIO14_2 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_6) +#define PINCONF_SGPIO14_3 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_9) +#define PINCONF_SGPIO15_1 (PINCONF_FUNC0|PINCONF_PINS2|PINCONF_PIN_8) +#define PINCONF_SGPIO15_2 (PINCONF_FUNC6|PINCONF_PINS1|PINCONF_PIN_5) +#define PINCONF_SGPIO15_3 (PINCONF_FUNC7|PINCONF_PINS4|PINCONF_PIN_10) + +#define PINCONF_SPIFI_CS (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_PINS3|PINCONF_PIN_8) +#define PINCONF_SPIFI_MISO (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_6) +#define PINCONF_SPIFI_MOSI (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_7) +#define PINCONF_SPIFI_SCK (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_3) +#define PINCONF_SPIFI_SIO2 (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_5) +#define PINCONF_SPIFI_SIO3 (PINCONF_FUNC3|PINCONF_SLEW_FAST|PINCONF_INBUFFER|PINCONF_GLITCH|PINCONF_PINS3|PINCONF_PIN_4) + +#define PINCONF_SPI_MISO (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_6) +#define PINCONF_SPI_MOSI (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_7) +#define PINCONF_SPI_SCK (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_3) +#define PINCONF_SPI_SSEL (PINCONF_FUNC1|PINCONF_PINS3|PINCONF_PIN_8) + +#define PINCONF_SSP0_MISO_1 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_7) +#define PINCONF_SSP0_MISO_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_2) +#define PINCONF_SSP0_MISO_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_1) +#define PINCONF_SSP0_MISO_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_6) +#define PINCONF_SSP0_MISO_5 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_1) +#define PINCONF_SSP0_MOSI_1 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_8) +#define PINCONF_SSP0_MOSI_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_3) +#define PINCONF_SSP0_MOSI_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_2) +#define PINCONF_SSP0_MOSI_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_7) +#define PINCONF_SSP0_MOSI_5 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_2) +#define PINCONF_SSP0_SCK_1 (PINCONF_FUNC0|PINCONF_PINSF|PINCONF_PIN_0) +#define PINCONF_SSP0_SCK_2 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_3) +#define PINCONF_SSP0_SCK_3 (PINCONF_FUNC4|PINCONF_PINS3|PINCONF_PIN_0) +#define PINCONF_SSP0_SSEL_1 (PINCONF_FUNC2|PINCONF_PINS3|PINCONF_PIN_6) +#define PINCONF_SSP0_SSEL_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_1) +#define PINCONF_SSP0_SSEL_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_0) +#define PINCONF_SSP0_SSEL_4 (PINCONF_FUNC5|PINCONF_PINS3|PINCONF_PIN_8) +#define PINCONF_SSP0_SSEL_5 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_0) + +#define PINCONF_SSP1_MISO_1 (PINCONF_FUNC1|PINCONF_PINS0|PINCONF_PIN_0) +#define PINCONF_SSP1_MISO_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_6) +#define PINCONF_SSP1_MISO_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_3) +#define PINCONF_SSP1_MOSI_1 (PINCONF_FUNC1|PINCONF_PINS0|PINCONF_PIN_1) +#define PINCONF_SSP1_MOSI_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_7) +#define PINCONF_SSP1_MOSI_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_4) +#define PINCONF_SSP1_SCK_1 (PINCONF_FUNC0|PINCONF_PINSF|PINCONF_PIN_4) +#define PINCONF_SSP1_SCK_2 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_19) +#define PINCONF_SSP1_SSEL_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_20) +#define PINCONF_SSP1_SSEL_2 (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_5) +#define PINCONF_SSP1_SSEL_3 (PINCONF_FUNC5|PINCONF_PINS1|PINCONF_PIN_5) + +#define PINCONF_T0_CAP0_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_T0_CAP0_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_4) +#define PINCONF_T0_CAP1_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_T0_CAP1_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_5) +#define PINCONF_T0_CAP2_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_20) +#define PINCONF_T0_CAP2_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_6) +#define PINCONF_T0_CAP3_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_17) +#define PINCONF_T0_CAP3_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_7) +#define PINCONF_T0_MAT0_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_16) +#define PINCONF_T0_MAT0_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_0) +#define PINCONF_T0_MAT1_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_15) +#define PINCONF_T0_MAT1_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_1) +#define PINCONF_T0_MAT2_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_14) +#define PINCONF_T0_MAT2_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_2) +#define PINCONF_T0_MAT3_1 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_18) +#define PINCONF_T0_MAT3_2 (PINCONF_FUNC7|PINCONF_PINS8|PINCONF_PIN_3) + +#define PINCONF_T1_CAP0 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_0) +#define PINCONF_T1_CAP1 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_1) +#define PINCONF_T1_CAP2 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_2) +#define PINCONF_T1_CAP3 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_3) +#define PINCONF_T1_MAT0 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_4) +#define PINCONF_T1_MAT1 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_5) +#define PINCONF_T1_MAT2 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_6) +#define PINCONF_T1_MAT3 (PINCONF_FUNC5|PINCONF_PINS5|PINCONF_PIN_7) + +#define PINCONF_T2_CAP0 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_1) +#define PINCONF_T2_CAP1 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_2) +#define PINCONF_T2_CAP2 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_3) +#define PINCONF_T2_CAP3 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_6) +#define PINCONF_T2_MAT0 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_7) +#define PINCONF_T2_MAT1 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_8) +#define PINCONF_T2_MAT2 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_9) +#define PINCONF_T2_MAT3 (PINCONF_FUNC5|PINCONF_PINS6|PINCONF_PIN_11) + +#define PINCONF_T3_CAP0_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_T3_CAP0_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_1) +#define PINCONF_T3_CAP1_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_T3_CAP1_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_4) +#define PINCONF_T3_CAP2_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_T3_CAP2_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_5) +#define PINCONF_T3_CAP3_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_T3_CAP3_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_6) +#define PINCONF_T3_MAT0_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_3) +#define PINCONF_T3_MAT0_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_7) +#define PINCONF_T3_MAT1_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_4) +#define PINCONF_T3_MAT1_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_8) +#define PINCONF_T3_MAT2_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_5) +#define PINCONF_T3_MAT2_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_9) +#define PINCONF_T3_MAT3_1 (PINCONF_FUNC6|PINCONF_PINS2|PINCONF_PIN_7) +#define PINCONF_T3_MAT3_2 (PINCONF_FUNC6|PINCONF_PINSC|PINCONF_PIN_10) + +#define PINCONF_TRACECLK (PINCONF_FUNC2|PINCONF_PINSF|PINCONF_PIN_4) +#define PINCONF_TRACEDATA0_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_5) +#define PINCONF_TRACEDATA0_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_4) +#define PINCONF_TRACEDATA1_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_6) +#define PINCONF_TRACEDATA1_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_5) +#define PINCONF_TRACEDATA2_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_7) +#define PINCONF_TRACEDATA2_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_6) +#define PINCONF_TRACEDATA3_1 (PINCONF_FUNC3|PINCONF_PINSF|PINCONF_PIN_8) +#define PINCONF_TRACEDATA3_2 (PINCONF_FUNC5|PINCONF_PINS7|PINCONF_PIN_7) + +#define PINCONF_U0_DIR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_U0_DIR_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_9) +#define PINCONF_U0_DIR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_2) +#define PINCONF_U0_RXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_U0_RXD_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_11) +#define PINCONF_U0_RXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_5) +#define PINCONF_U0_RXD_4 (PINCONF_FUNC7|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_6) +#define PINCONF_U0_TXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_U0_TXD_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_10) +#define PINCONF_U0_TXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_4) +#define PINCONF_U0_TXD_4 (PINCONF_FUNC7|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS9|PINCONF_PIN_5) +#define PINCONF_U0_UCLK_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_U0_UCLK_2 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSF|PINCONF_PIN_8) +#define PINCONF_U0_UCLK_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS6|PINCONF_PIN_1) + +#define PINCONF_U1_CTS_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_11) +#define PINCONF_U1_CTS_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_2) +#define PINCONF_U1_CTS_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_7) +#define PINCONF_U1_CTS_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_4) +#define PINCONF_U1_DCD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_12) +#define PINCONF_U1_DCD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_11) +#define PINCONF_U1_DCD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_9) +#define PINCONF_U1_DCD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_5) +#define PINCONF_U1_DSR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_7) +#define PINCONF_U1_DSR_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_10) +#define PINCONF_U1_DSR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_8) +#define PINCONF_U1_DSR_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_0) +#define PINCONF_U1_DTR_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_8) +#define PINCONF_U1_DTR_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_12) +#define PINCONF_U1_DTR_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_10) +#define PINCONF_U1_DTR_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_1) +#define PINCONF_U1_RI_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_10) +#define PINCONF_U1_RI_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_1) +#define PINCONF_U1_RI_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_6) +#define PINCONF_U1_RI_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_3) +#define PINCONF_U1_RTS_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_9) +#define PINCONF_U1_RTS_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_3) +#define PINCONF_U1_RTS_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_5) +#define PINCONF_U1_RTS_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_2) +#define PINCONF_U1_RXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_14) +#define PINCONF_U1_RXD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_14) +#define PINCONF_U1_RXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_12) +#define PINCONF_U1_RXD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_5) +#define PINCONF_U1_RXD_5 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_7) +#define PINCONF_U1_TXD_1 (PINCONF_FUNC1|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS1|PINCONF_PIN_13) +#define PINCONF_U1_TXD_2 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSC|PINCONF_PIN_13) +#define PINCONF_U1_TXD_3 (PINCONF_FUNC2|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINSE|PINCONF_PIN_11) +#define PINCONF_U1_TXD_4 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS3|PINCONF_PIN_4) +#define PINCONF_U1_TXD_5 (PINCONF_FUNC4|PINCONF_PULLUP|PINCONF_INBUFFER|PINCONF_PINS5|PINCONF_PIN_6) + +#define PINCONF_U2_DIR_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_18) +#define PINCONF_U2_DIR_2 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_13) +#define PINCONF_U2_RXD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_16) +#define PINCONF_U2_RXD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_11) +#define PINCONF_U2_RXD_3 (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_2) +#define PINCONF_U2_RXD_4 (PINCONF_FUNC6|PINCONF_PINS7|PINCONF_PIN_2) +#define PINCONF_U2_TXD_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_15) +#define PINCONF_U2_TXD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_10) +#define PINCONF_U2_TXD_3 (PINCONF_FUNC3|PINCONF_PINSA|PINCONF_PIN_1) +#define PINCONF_U2_TXD_4 (PINCONF_FUNC6|PINCONF_PINS7|PINCONF_PIN_1) +#define PINCONF_U2_UCLK_1 (PINCONF_FUNC1|PINCONF_PINS1|PINCONF_PIN_17) +#define PINCONF_U2_UCLK_2 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_12) + +#define PINCONF_U3_BAUD_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_7) +#define PINCONF_U3_BAUD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_9) +#define PINCONF_U3_BAUD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_3) +#define PINCONF_U3_DIR_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_6) +#define PINCONF_U3_DIR_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_8) +#define PINCONF_U3_DIR_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_4) +#define PINCONF_U3_RXD_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_3) +#define PINCONF_U3_RXD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_4) +#define PINCONF_U3_RXD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_2) +#define PINCONF_U3_RXD_4 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_4) +#define PINCONF_U3_TXD_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_2) +#define PINCONF_U3_TXD_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_3) +#define PINCONF_U3_TXD_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_1) +#define PINCONF_U3_TXD_4 (PINCONF_FUNC7|PINCONF_PINS9|PINCONF_PIN_3) +#define PINCONF_U3_UCLK_1 (PINCONF_FUNC1|PINCONF_PINSF|PINCONF_PIN_5) +#define PINCONF_U3_UCLK_2 (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_7) +#define PINCONF_U3_UCLK_3 (PINCONF_FUNC6|PINCONF_PINS4|PINCONF_PIN_0) + +#define PINCONF_USB0_IND0_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_2) +#define PINCONF_USB0_IND0_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_6) +#define PINCONF_USB0_IND0_3 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_8) +#define PINCONF_USB0_IND0_4 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_4) +#define PINCONF_USB0_IND0_5 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_5) +#define PINCONF_USB0_IND1_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_1) +#define PINCONF_USB0_IND1_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_2) +#define PINCONF_USB0_IND1_3 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_7) +#define PINCONF_USB0_IND1_4 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_3) +#define PINCONF_USB0_PPWR_1 (PINCONF_FUNC1|PINCONF_PINS6|PINCONF_PIN_3) +#define PINCONF_USB0_PPWR_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_0) +#define PINCONF_USB0_PPWR_3 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_7) +#define PINCONF_USB0_PPWR_4 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_3) +#define PINCONF_USB0_PWR_FAULT_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_0) +#define PINCONF_USB0_PWR_FAULT_2 (PINCONF_FUNC3|PINCONF_PINS2|PINCONF_PIN_1) +#define PINCONF_USB0_PWR_FAULT_3 (PINCONF_FUNC3|PINCONF_PINS6|PINCONF_PIN_6) +#define PINCONF_USB0_PWR_FAULT_4 (PINCONF_FUNC4|PINCONF_PINS1|PINCONF_PIN_5) +#define PINCONF_USB0_PWR_FAULT_5 (PINCONF_FUNC7|PINCONF_PINS2|PINCONF_PIN_4) + +#define PINCONF_USB1_IND0_1 (PINCONF_FUNC2|PINCONF_PINS9|PINCONF_PIN_4) +#define PINCONF_USB1_IND0_2 (PINCONF_FUNC3|PINCONF_PINS3|PINCONF_PIN_2) +#define PINCONF_USB1_IND1_1 (PINCONF_FUNC2|PINCONF_PINS9|PINCONF_PIN_3) +#define PINCONF_USB1_IND1_2 (PINCONF_FUNC3|PINCONF_PINS3|PINCONF_PIN_1) +#define PINCONF_USB1_PPWR (PINCONF_FUNC2|PINCONF_PINS9|PINCONF_PIN_5) +#define PINCONF_USB1_PWR_FAULT (PINCONF_FUNC2|PINCONF_PINS9|PINCONF_PIN_6) +#define PINCONF_USB1_ULPI_CLK_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_8) +#define PINCONF_USB1_ULPI_CLK_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_0) +#define PINCONF_USB1_ULPI_D0_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_5) +#define PINCONF_USB1_ULPI_D0_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_8) +#define PINCONF_USB1_ULPI_D0_3 (PINCONF_FUNC5|PINCONF_PINSD|PINCONF_PIN_11) +#define PINCONF_USB1_ULPI_D1_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_4) +#define PINCONF_USB1_ULPI_D1_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_7) +#define PINCONF_USB1_ULPI_D2_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_3) +#define PINCONF_USB1_ULPI_D2_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_6) +#define PINCONF_USB1_ULPI_D3_1 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_6) +#define PINCONF_USB1_ULPI_D3_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_5) +#define PINCONF_USB1_ULPI_D4_1 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_5) +#define PINCONF_USB1_ULPI_D4_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_4) +#define PINCONF_USB1_ULPI_D5_1 (PINCONF_FUNC0|PINCONF_PINSC|PINCONF_PIN_3) +#define PINCONF_USB1_ULPI_D5_2 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_4) +#define PINCONF_USB1_ULPI_D6_1 (PINCONF_FUNC0|PINCONF_PINSC|PINCONF_PIN_2) +#define PINCONF_USB1_ULPI_D6_2 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_3) +#define PINCONF_USB1_ULPI_D7_1 (PINCONF_FUNC0|PINCONF_PINSC|PINCONF_PIN_1) +#define PINCONF_USB1_ULPI_D7_2 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_2) +#define PINCONF_USB1_ULPI_DIR_1 (PINCONF_FUNC1|PINCONF_PINSB|PINCONF_PIN_1) +#define PINCONF_USB1_ULPI_DIR_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_11) +#define PINCONF_USB1_ULPI_NXT_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_6) +#define PINCONF_USB1_ULPI_NXT_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_9) +#define PINCONF_USB1_ULPI_STP_1 (PINCONF_FUNC1|PINCONF_PINS8|PINCONF_PIN_7) +#define PINCONF_USB1_ULPI_STP_2 (PINCONF_FUNC1|PINCONF_PINSC|PINCONF_PIN_10) +#define PINCONF_USB1_VBUS (PINCONF_FUNC2|PINCONF_PINS2|PINCONF_PIN_5) + +#define CLKCONF_CGU_OUT0 (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK1) +#define CLKCONF_CGU_OUT1 (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK3) +#define CLKCONF_CLKOUT_1 (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK0) +#define CLKCONF_CLKOUT_2 (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK1) +#define CLKCONF_CLKOUT_3 (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK2) +#define CLKCONF_CLKOUT_4 (PINCONFIG_DIGITAL|PINCONF_FUNC1|PINCONF_CLK3) +#define CLKCONF_EMC_CLK0 (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK0) +#define CLKCONF_EMC_CLK01 (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK0) +#define CLKCONF_EMC_CLK1 (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK1) +#define CLKCONF_EMC_CLK2 (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK3) +#define CLKCONF_EMC_CLK23 (PINCONFIG_DIGITAL|PINCONF_FUNC5|PINCONF_CLK2) +#define CLKCONF_EMC_CLK3 (PINCONFIG_DIGITAL|PINCONF_FUNC0|PINCONF_CLK2) +#define CLKCONF_ENET_REF_CLK (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0) +#define CLKCONF_ENET_TX_CLK (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK0) +#define CLKCONF_I2S0_TX_MCLK (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK2) +#define CLKCONF_I2S1_RX_SCK_1 (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK2) +#define CLKCONF_I2S1_RX_SCK_2 (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK3) +#define CLKCONF_I2S1_TX_MCLK (PINCONFIG_DIGITAL|PINCONF_FUNC7|PINCONF_CLK1) +#define CLKCONF_SD_CLK_1 (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK0) +#define CLKCONF_SD_CLK_2 (PINCONFIG_DIGITAL|PINCONF_FUNC4|PINCONF_CLK2) +#define CLKCONF_SSP1_SCK (PINCONFIG_DIGITAL|PINCONF_FUNC6|PINCONF_CLK0) + +/**************************************************************************************************** + * Public Types + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public Data + ****************************************************************************************************/ + +/**************************************************************************************************** + * Public Functions + ****************************************************************************************************/ + +#endif /* __ARCH_ARM_SRC_LPC43XX_CHIP_LPC4337JET100_PINCONF_H */ diff --git a/arch/arm/src/lpc43xx/chip/lpc43_aes.h b/arch/arm/src/lpc43xx/chip/lpc43_aes.h index e5f66d5f1ff..fbd557f3d48 100644 --- a/arch/arm/src/lpc43xx/chip/lpc43_aes.h +++ b/arch/arm/src/lpc43xx/chip/lpc43_aes.h @@ -1,7 +1,7 @@ /************************************************************************************ * arch/arm/src/lpc43xx/chip/lpc43_aes.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ /************************************************************************************ * Pre-processor Definitions ************************************************************************************/ + /* The AES is controlled through a set of simple API calls located in the LPC43xx * ROM. This value holds the pointer to the AES driver table. */ @@ -86,17 +87,32 @@ struct lpc43_aes_s /* Loads 128-bit AES software defined user key (16 bytes) */ - void (*aes_LoadKeySW)(unsigned char *key); + void (*aes_LoadKeySW)(const unsigned char *key); /* Loads 128-bit AES initialization vector (16 bytes) */ - void (*aes_LoadIV_SW)(unsigned char *iv); + void (*aes_LoadIV_SW)(const unsigned char *iv); /* Loads 128-bit AES IC specific initialization vector, which is used to decrypt * a boot image. */ void (*aes_LoadIV_IC)(void); + + /* Process data */ + + unsigned int (*aes_Operate)(unsigned char* out, const unsigned char* in, unsigned blocks); +}; + +enum lpc43_aes_errorcodes_e +{ + AES_API_ERR_BASE = 0x30000, + AES_API_ERR_WRONG_CMD, + AES_API_ERR_NOT_SUPPORTED, + AES_API_ERR_KEY_ALREADY_PROGRAMMED, + AES_API_ERR_DMA_CHANNEL_CFG, + AES_API_ERR_DMA_MUX_CFG, + AES_API_ERR_DMA_BUSY }; /************************************************************************************ diff --git a/arch/arm/src/lpc43xx/lpc43_adc.c b/arch/arm/src/lpc43xx/lpc43_adc.c index 487c0b5cf37..4286451f11e 100644 --- a/arch/arm/src/lpc43xx/lpc43_adc.c +++ b/arch/arm/src/lpc43xx/lpc43_adc.c @@ -7,8 +7,9 @@ * Ported from from the LPC17 version: * * Copyright(C) 2011 Li Zhuoyi. All rights reserved. + * Copyright(C) 2016 Gregory Nutt. All rights reserved. * Author: Li Zhuoyi - * History: 0.1 2011-08-05 initial version + * Gregory Nutt * * This file is a part of NuttX: * @@ -55,6 +56,7 @@ #include #include #include +#include #include #include @@ -112,6 +114,7 @@ struct up_dev_s { + FAR const struct adc_callback_s *cb; uint8_t mask; uint8_t mask_int; uint32_t freq; @@ -126,6 +129,8 @@ struct up_dev_s /* ADC methods */ +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); static void adc_reset(FAR struct adc_dev_s *dev); static int adc_setup(FAR struct adc_dev_s *dev); static void adc_shutdown(FAR struct adc_dev_s *dev); @@ -139,6 +144,7 @@ static int adc_interrupt(int irq, void *context); static const struct adc_ops_s g_adcops = { + .ao_bind = adc_bind, .ao_reset = adc_reset, .ao_setup = adc_setup, .ao_shutdown = adc_shutdown, @@ -166,6 +172,25 @@ static struct adc_dev_s g_adcdev = * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: adc_bind + * + * Description: + * Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + * + ****************************************************************************/ + +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback) +{ + FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + priv->cb = callback; + return OK; +} + /**************************************************************************** * Name: adc_reset * @@ -454,8 +479,20 @@ static int adc_interrupt(int irq, void *context) { if (priv->mask & (1 << i)) { + int32_t data; + regval = getreg32(LPC43_ADC0_DR(i)); - adc_receive(&g_adcdev, i,(regval&ADC_DR_VVREF_MASK)>>ADC_DR_VVREF_SHIFT); + data = (regval & ADC_DR_VVREF_MASK) >> ADC_DR_VVREF_SHIFT; + + /* Verify that the upper-half driver has bound its callback functions */ + + if (priv->cb != NULL) + { + /* Perform the data received callback */ + + DEBUGASSERT(priv->cb->au_receive != NULL); + priv->cb->au_receive(&g_adcdev, i, data); + } } } diff --git a/arch/arm/src/lpc43xx/lpc43_aes.c b/arch/arm/src/lpc43xx/lpc43_aes.c new file mode 100644 index 00000000000..3f9af5ada39 --- /dev/null +++ b/arch/arm/src/lpc43xx/lpc43_aes.c @@ -0,0 +1,209 @@ +/**************************************************************************** + * arch/arm/src/lpc43xx/lpc43_aes.c + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Alexander Vasiljev + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "up_internal.h" +#include "up_arch.h" + +#include "chip.h" +#include + +#define AES_BLOCK_SIZE 16 + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static struct lpc43_aes_s *g_aes; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +int aes_cypher(void *out, const void *in, uint32_t size, const void *iv, + const void *key, uint32_t keysize, int mode, int encrypt) +{ + unsigned int ret = 0; + uint32_t outl = size; + + ret = aes_init(iv, key, keysize, mode, encrypt); + + if (ret != OK) + { + return ret; + } + + return aes_update(out, &outl, in, size); +} + +int up_aesreset(void) +{ + return OK; +} + +int aes_init(FAR const void *iv, FAR const void *key, uint32_t keysize, + int mode, int encrypt) +{ + unsigned int cmd = 0; + unsigned int ret = 0; + + if (g_aes == NULL) + { + return -ENOSYS; + } + + /* The LPC43 aes engine can load two keys from otp and one random + * generated key. This behavior doesn't fit current api. So if + * key == NULL, we will usr keysize as identifier of the special key. + */ + + if (keysize != 16 && key) + { + return -EINVAL; + } + + if (mode != AES_MODE_ECB && mode != AES_MODE_CBC) + { + return -EINVAL; + } + + if (encrypt == CYPHER_ENCRYPT) + { + cmd = mode == AES_MODE_ECB ? AES_API_CMD_ENCODE_ECB : AES_API_CMD_ENCODE_CBC; + } + else + { + cmd = mode == AES_MODE_ECB ? AES_API_CMD_DECODE_ECB : AES_API_CMD_DECODE_CBC; + } + + g_aes->aes_Init(); + + if (key != NULL) + { + g_aes->aes_LoadKeySW(key); + } + else + { + switch (keysize) + { + case 0: + g_aes->aes_LoadKey1(); + break; + + case 1: + g_aes->aes_LoadKey2(); + break; + + case 2: + g_aes->aes_LoadKeyRNG(); + break; + } + } + + g_aes->aes_LoadIV_SW((const unsigned char*)iv); + + ret = g_aes->aes_SetMode(cmd); + switch (ret) + { + case AES_API_ERR_WRONG_CMD: + case AES_API_ERR_NOT_SUPPORTED: + case AES_API_ERR_KEY_ALREADY_PROGRAMMED: + ret = -EINVAL; + break; + + case AES_API_ERR_DMA_CHANNEL_CFG: + case AES_API_ERR_DMA_MUX_CFG: + case AES_API_ERR_DMA_BUSY: + ret = -EBUSY; + break; + } + + return 0; +} + +int aes_update(FAR const void *out, uint32_t *outl, FAR const void *in, + uint32_t inl) +{ + if (g_aes == NULL) + { + return -ENOSYS; + } + + if ((inl & (AES_BLOCK_SIZE-1)) != 0) + { + return -EINVAL; + } + + if (inl > *outl) + { + return -EINVAL; + } + + return g_aes->aes_Operate((unsigned char*)out, + (unsigned char*)in, inl / 16); +} + +int up_aesinitialize(void) +{ + g_aes = (struct lpc43_g_aes*)*((uint32_t*)LPC43_ROM_AES_DRIVER_TABLE); + if (g_aes != NULL) + { + return OK; + } + + return -ENOSYS; +} + +int up_aesuninitialize(void) +{ + return OK; +} diff --git a/arch/arm/src/lpc43xx/lpc43_ethernet.c b/arch/arm/src/lpc43xx/lpc43_ethernet.c index 733a161c2be..cca1e897666 100644 --- a/arch/arm/src/lpc43xx/lpc43_ethernet.c +++ b/arch/arm/src/lpc43xx/lpc43_ethernet.c @@ -522,9 +522,9 @@ struct lpc43_ethmac_s struct work_s work; /* For deferring work to the work queue */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ /* Used to track transmit and receive descriptors */ @@ -928,7 +928,7 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv) struct eth_txdesc_s *txdesc; struct eth_txdesc_s *txfirst; - /* The internal (optimal) uIP buffer size may be configured to be larger + /* The internal (optimal) network buffer size may be configured to be larger * than the Ethernet buffer size. */ @@ -1114,7 +1114,7 @@ static int lpc43_transmit(FAR struct lpc43_ethmac_s *priv) * Function: lpc43_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -1520,7 +1520,7 @@ static int lpc43_recvframe(FAR struct lpc43_ethmac_s *priv) buffer = lpc43_allocbuffer(priv); /* Take the buffer from the RX descriptor of the first free - * segment, put it into the uIP device structure, then replace + * segment, put it into the network device structure, then replace * the buffer in the RX descriptor with the newly allocated * buffer. */ @@ -1602,7 +1602,7 @@ static void lpc43_receive(FAR struct lpc43_ethmac_s *priv) pkt_input(&priv->dev); #endif - /* Check if the packet is a valid size for the uIP buffer configuration + /* Check if the packet is a valid size for the network buffer configuration * (this should not happen) */ @@ -1888,7 +1888,7 @@ static void lpc43_txdone(FAR struct lpc43_ethmac_s *priv) lpc43_disableint(priv, ETH_DMAINT_TI); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ lpc43_dopoll(priv); } @@ -2120,7 +2120,7 @@ static inline void lpc43_txtimeout_process(FAR struct lpc43_ethmac_s *priv) lpc43_ifdown(&priv->dev); lpc43_ifup(&priv->dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ lpc43_dopoll(priv); } diff --git a/arch/arm/src/lpc43xx/lpc43_gpio.c b/arch/arm/src/lpc43xx/lpc43_gpio.c index 3d5db11b7e4..cda1757cd37 100644 --- a/arch/arm/src/lpc43xx/lpc43_gpio.c +++ b/arch/arm/src/lpc43xx/lpc43_gpio.c @@ -49,6 +49,10 @@ #include "up_arch.h" #include "lpc43_gpio.h" +#ifdef CONFIG_LPC43_GPIO_IRQ +#include "lpc43_gpioint.h" +#endif + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -181,14 +185,14 @@ int lpc43_gpio_config(uint16_t gpiocfg) case GPIO_MODE_PININTR: /* GPIO pin interrupt */ lpc43_configinput(gpiocfg, port, pin); -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC43_GPIO_IRQ ret = lpc43_gpioint_pinconfig(gpiocfg); #endif break; case GPIO_MODE_GRPINTR: /* GPIO group interrupt */ lpc43_configinput(gpiocfg, port, pin); -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC43_GPIO_IRQ ret = lpc43_gpioint_grpconfig(gpiocfg); #endif break; diff --git a/arch/arm/src/lpc43xx/lpc43_gpio.h b/arch/arm/src/lpc43xx/lpc43_gpio.h index 1ee14fac639..4f16c841de4 100644 --- a/arch/arm/src/lpc43xx/lpc43_gpio.h +++ b/arch/arm/src/lpc43xx/lpc43_gpio.h @@ -143,7 +143,7 @@ * ..CC C... .... .... */ -#define GPIO_PININT_SHIFT (10) /* Bits 11-13: Pin interrupt number */ +#define GPIO_PININT_SHIFT (11) /* Bits 11-13: Pin interrupt number */ #define GPIO_PININT_MASK (7 << GPIO_PININT_SHIFT) # define GPIO_PININT0 (0 << GPIO_PININT_SHIFT) # define GPIO_PININT1 (1 << GPIO_PININT_SHIFT) @@ -162,9 +162,9 @@ * .... .III .... .... */ -#define _GPIO_INT_LEVEL (1 << 10) /* Bit 10: 1=Level (vs edge) */ -#define _GPIO_INT_HIGH (1 << 9) /* Bit 9: 1=High level or rising edge */ -#define _GPIO_INT_LOW (1 << 8) /* Bit 8: 1=Low level or falling edge */ +#define _GPIO_INT_EDGE (1 << 10) /* Bit 10: 1=Edge (vs level) */ +#define _GPIO_INT_LOW (1 << 9) /* Bit 9: 1=Low level or falling edge */ +#define _GPIO_INT_HIGH (1 << 8) /* Bit 8: 1=High level or rising edge */ #define GPIO_INT_SHIFT (8) /* Bits 8-10: Interrupt mode */ #define GPIO_INT_MASK (7 << GPIO_INT_SHIFT) @@ -176,8 +176,8 @@ #define GPIO_IS_ACTIVE_HI(p) (((p) & _GPIO_INT_HIGH) != 0) #define GPIO_IS_ACTIVE_LOW(p) (((p) & _GPIO_INT_LOW) != 0) -#define GPIO_IS_EDGE(p) (((p) & _GPIO_INT_LEVEL) == 0) -#define GPIO_IS_LEVEL(p) (((p) & _GPIO_INT_LEVEL) != 0) +#define GPIO_IS_LEVEL(p) (((p) & _GPIO_INT_EDGE) == 0) +#define GPIO_IS_EDGE(p) (((p) & _GPIO_INT_EDGE) != 0) /* GPIO Port Number: * diff --git a/arch/arm/src/lpc43xx/lpc43_gpioint.c b/arch/arm/src/lpc43xx/lpc43_gpioint.c index 51e010ba330..e8726420c15 100644 --- a/arch/arm/src/lpc43xx/lpc43_gpioint.c +++ b/arch/arm/src/lpc43xx/lpc43_gpioint.c @@ -57,6 +57,7 @@ #include #include +#include #include @@ -70,7 +71,7 @@ #include "lpc43_gpio.h" #include "lpc43_gpioint.h" -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC43_GPIO_IRQ /**************************************************************************** * Pre-processor Definitions @@ -176,10 +177,13 @@ int lpc43_gpioint_grpinitialize(int group, bool anded, bool level) int lpc43_gpioint_pinconfig(uint16_t gpiocfg) { unsigned int port = ((gpiocfg & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT); - unsigned int pin = ((gpiocfg & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT); + unsigned int pin = ((gpiocfg & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT); unsigned int pinint = ((gpiocfg & GPIO_PININT_MASK) >> GPIO_PININT_SHIFT); uint32_t bitmask = (1 << pinint); - uint32_t regval; + uint32_t pinsel; + uint32_t isel; + uint32_t einr; + uint32_t einf; DEBUGASSERT(port < NUM_GPIO_PORTS && pin < NUM_GPIO_PINS && GPIO_IS_PININT(gpiocfg)); @@ -196,62 +200,69 @@ int lpc43_gpioint_pinconfig(uint16_t gpiocfg) if (pinint < 4) { - regval = getreg32(LPC43_SCU_PINTSEL0); - regval &= ~SCU_PINTSEL0_MASK(pinint); - regval |= ((pin << SCU_PINTSEL0_INTPIN_SHIFT(pinint)) | + pinsel = getreg32(LPC43_SCU_PINTSEL0); + pinsel &= ~SCU_PINTSEL0_MASK(pinint); + pinsel |= ((pin << SCU_PINTSEL0_INTPIN_SHIFT(pinint)) | (port << SCU_PINTSEL0_PORTSEL_SHIFT(pinint))); - putreg32(regval, LPC43_SCU_PINTSEL0); + putreg32(pinsel, LPC43_SCU_PINTSEL0); } else { - regval = getreg32(LPC43_SCU_PINTSEL1); - regval &= ~SCU_PINTSEL1_MASK(pinint); - regval |= ((pin << SCU_PINTSEL1_INTPIN_SHIFT(pinint)) | + pinsel = getreg32(LPC43_SCU_PINTSEL1); + pinsel &= ~SCU_PINTSEL1_MASK(pinint); + pinsel |= ((pin << SCU_PINTSEL1_INTPIN_SHIFT(pinint)) | (port << SCU_PINTSEL1_PORTSEL_SHIFT(pinint))); - putreg32(regval, LPC43_SCU_PINTSEL1); + putreg32(pinsel, LPC43_SCU_PINTSEL1); } - /* Set level or edge sensitive */ + /* Configure the active level or rising/falling edge + * + * ISEL + * 0 = Edge sensitive + * 1 = Level sensitive + * EINR 0-7: + * 0 = Disable rising edge or level interrupt. + * 1 = Enable rising edge or level interrupt. + * EINF 0-7: + * 0 = Disable falling edge interrupt or set active interrupt level + * LOW. + * 1 = Enable falling edge interrupt enabled or set active interrupt + * level HIGH + */ - regval = getreg32(LPC43_GPIOINT_ISEL); - if (GPIO_IS_LEVEL(gpiocfg)) + isel = getreg32(LPC43_GPIOINT_ISEL) & ~bitmask; + einr = getreg32(LPC43_GPIOINT_IENR) & ~bitmask; + einf = getreg32(LPC43_GPIOINT_IENF) & ~bitmask; + + switch (gpiocfg & GPIO_INT_MASK) { - regval |= bitmask; - } - else - { - regval &= ~bitmask; + case GPIO_INT_LEVEL_HI: + einf |= bitmask; /* Enable active level HI */ + case GPIO_INT_LEVEL_LOW: + isel |= bitmask; /* Level sensitive */ + einr |= bitmask; /* Enable level interrupt */ + break; + + case GPIO_INT_EDGE_RISING: + einr |= bitmask; /* Enable rising edge interrupt */ + break; + + case GPIO_INT_EDGE_BOTH: + einr |= bitmask; /* Enable rising edge interrupt */ + case GPIO_INT_EDGE_FALLING: + einf |= bitmask; /* Enable falling edge interrupt */ + break; + + /* Default is edge sensitive but with both edges disabled. */ + + default: + break; } - putreg32(regval, LPC43_GPIOINT_ISEL); + putreg32(isel, LPC43_GPIOINT_ISEL); + putreg32(einr, LPC43_GPIOINT_IENR); + putreg32(einf, LPC43_GPIOINT_IENF); - /* Configure the active high level or rising edge */ - - regval = getreg32(LPC43_GPIOINT_IENR); - if (GPIO_IS_ACTIVE_HI(gpiocfg)) - { - regval |= bitmask; - } - else - { - regval &= ~bitmask; - } - - putreg32(regval, LPC43_GPIOINT_IENR); - - /* Configure the active high low or falling edge */ - - regval = getreg32(LPC43_GPIOINT_IENF); - if (GPIO_IS_ACTIVE_LOW(gpiocfg)) - { - regval |= bitmask; - } - else - { - regval &= ~bitmask; - } - - putreg32(regval, LPC43_GPIOINT_IENF); return OK; } @@ -321,4 +332,29 @@ int lpc43_gpioint_grpconfig(uint16_t gpiocfg) return OK; } -#endif /* CONFIG_GPIO_IRQ */ +/**************************************************************************** + * Name: lpc43_gpioint_ack + * + * Description: + * Acknowledge the interrupt for a given pint interrupt number. Call this + * inside the interrupt handler. For edge sensitive interrupts, the interrupt + * status is cleared. For level sensitive interrupts, the active-high/-low + * sensitivity is inverted. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +int lpc43_gpioint_ack(uint8_t intnumber) +{ + uint32_t regval; + + regval = getreg32(LPC43_GPIOINT_IST); + regval |= (1 << intnumber); + putreg32(regval, LPC43_GPIOINT_IST); + + return OK; +} + +#endif /* CONFIG_LPC43_GPIO_IRQ */ diff --git a/arch/arm/src/lpc43xx/lpc43_gpioint.h b/arch/arm/src/lpc43xx/lpc43_gpioint.h index 35b22f7c7f2..ae479f83c67 100644 --- a/arch/arm/src/lpc43xx/lpc43_gpioint.h +++ b/arch/arm/src/lpc43xx/lpc43_gpioint.h @@ -1,7 +1,7 @@ -/************************************************************************************ +/**************************************************************************** * arch/arm/src/lpc43xx/lpc43_gpioint.h * - * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -31,7 +31,8 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ************************************************************************************/ + ****************************************************************************/ + /* GPIO pin interrupts * * From all available GPIO pins, up to eight pins can be selected in the system @@ -52,31 +53,19 @@ #ifndef __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H #define __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include #include "chip.h" #include "chip/lpc43_gpio.h" -#ifdef CONFIG_GPIO_IRQ +#ifdef CONFIG_LPC43_GPIO_IRQ -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Public Types - ************************************************************************************/ - -/************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Functions - ************************************************************************************/ +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ /**************************************************************************** * Name: lpc43_gpioint_grpinitialize @@ -136,5 +125,21 @@ int lpc43_gpioint_pinconfig(uint16_t gpiocfg); int lpc43_gpioint_grpconfig(uint16_t gpiocfg); -#endif /* CONFIG_GPIO_IRQ */ +/**************************************************************************** + * Name: lpc43_gpioint_ack + * + * Description: + * Acknowledge the interrupt for a given pint interrupt number. Call this + * inside the interrupt handler. For edge sensitive interrupts, the interrupt + * status is cleared. For level sensitive interrupts, the active-high/-low + * sensitivity is inverted. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + * + ****************************************************************************/ + +int lpc43_gpioint_ack(uint8_t intnumber); + +#endif /* CONFIG_LPC43_GPIO_IRQ */ #endif /* __ARCH_ARM_SRC_LPC43XX_LPC43_GPIOINT_H */ diff --git a/arch/arm/src/lpc43xx/lpc43_irq.c b/arch/arm/src/lpc43xx/lpc43_irq.c index 73ca6d3bc7c..a6e54b51f04 100644 --- a/arch/arm/src/lpc43xx/lpc43_irq.c +++ b/arch/arm/src/lpc43xx/lpc43_irq.c @@ -246,18 +246,45 @@ static int lpc43_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit, if (irq >= LPC43_IRQ_EXTINT) { + /* NOTE: We assume that there are at least 32 interrupts */ + if (irq < (LPC43_IRQ_EXTINT + 32)) { + /* Interrupt in range {0-31} */ + *regaddr = (NVIC_IRQ0_31_ENABLE + offset); *bit = 1 << (irq - LPC43_IRQ_EXTINT); } - else if (irq < LPC43M4_IRQ_NIRQS) +#if LPC43M4_IRQ_NEXTINT > 95 +# error Extension to interrupt logic needed +#elif LPC43M4_IRQ_NEXTINT > 63 + else if (irq < (LPC43_IRQ_EXTINT + 64)) { + /* Interrupt in range {32-63} */ + *regaddr = (NVIC_IRQ32_63_ENABLE + offset); *bit = 1 << (irq - LPC43_IRQ_EXTINT - 32); } + else if (irq < LPC43M4_IRQ_NIRQS) + { + /* Interrupt in range {64-LPC43M4_IRQ_NIRQS}, LPC43M4_IRQ_NIRQS <= 95 */ + + *regaddr = (NVIC_IRQ64_95_ENABLE + offset); + *bit = 1 << (irq - LPC43_IRQ_EXTINT - 64); + } +#else /* if LPC43M4_IRQ_NEXTINT > 31 */ + else if (irq < LPC43M4_IRQ_NIRQS) + { + /* Interrupt in range {32-LPC43M4_IRQ_NIRQS}, LPC43M4_IRQ_NIRQS <= 63 */ + + *regaddr = (NVIC_IRQ32_63_ENABLE + offset); + *bit = 1 << (irq - LPC43_IRQ_EXTINT - 32); + } +#endif else { + /* Interrupt >= LPC43M4_IRQ_NIRQS */ + return ERROR; /* Invalid interrupt */ } } @@ -317,7 +344,12 @@ void up_irqinitialize(void) /* Disable all interrupts */ putreg32(0, NVIC_IRQ0_31_ENABLE); +#if LPC43M4_IRQ_NEXTINT > 31 putreg32(0, NVIC_IRQ32_63_ENABLE); +#if LPC43M4_IRQ_NEXTINT > 63 + putreg32(0, NVIC_IRQ64_95_ENABLE); +#endif +#endif /* Make sure that we are using the correct vector table. The default * vector address is 0x0000:0000 but if we are executing code that is diff --git a/arch/arm/src/nuc1xx/Kconfig b/arch/arm/src/nuc1xx/Kconfig index 50cddcbdee1..3571b4b6260 100644 --- a/arch/arm/src/nuc1xx/Kconfig +++ b/arch/arm/src/nuc1xx/Kconfig @@ -314,20 +314,20 @@ config NUC_PWM7 config NUC_UART0 bool "UART0" default y - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config NUC_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config NUC_UART2 bool "UART2" default n depends on NUC_HAVE_UART2 - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config NUC_USBD diff --git a/arch/arm/src/sam34/Kconfig b/arch/arm/src/sam34/Kconfig index bb400e649ce..b704da5674f 100644 --- a/arch/arm/src/sam34/Kconfig +++ b/arch/arm/src/sam34/Kconfig @@ -453,7 +453,7 @@ config SAM34_PICOUART bool "PicoUART" default n depends on ARCH_CHIP_SAM4L - select ARCH_HAVE_UART + select UART_SERIALDRIVER config SAM34_PWM bool "Pulse Width Modulation (PWM) Controller" @@ -609,14 +609,14 @@ config SAM34_UART0 bool "UART 0" default y depends on ARCH_CHIP_SAM3U || ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A || ARCH_CHIP_SAM4CM || ARCH_CHIP_SAM4S || ARCH_CHIP_SAM4E - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAM34_UART1 bool "UART 1" default n depends on ARCH_CHIP_SAM4CM || ARCH_CHIP_SAM4S || ARCH_CHIP_SAM4E - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS if SAM34_UART1 && ARCH_CHIP_SAM4CM @@ -651,27 +651,27 @@ config SAM34_USBC config SAM34_USART0 bool "USART 0" default n - select ARCH_HAVE_USART0 + select USART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAM34_USART1 bool "USART 1" default n - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAM34_USART2 bool "USART 2" default n depends on ARCH_CHIP_SAM3U || ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A || ARCH_CHIP_SAM4CM || ARCH_CHIP_SAM4L - select ARCH_HAVE_USART2 + select USART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAM34_USART3 bool "USART 3" default n depends on ARCH_CHIP_SAM3U || ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A || ARCH_CHIP_SAM4CM || ARCH_CHIP_SAM4L - select ARCH_HAVE_USART3 + select USART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAM34_WDT @@ -1060,6 +1060,7 @@ config SAM34_TC5_TIOB config SAM34_ONESHOT bool "TC one-shot wrapper" + depends on SAM34_FREERUN default n if !SCHED_TICKLESS default y if SCHED_TICKLESS ---help--- diff --git a/arch/arm/src/sam34/sam4cm_oneshot.c b/arch/arm/src/sam34/sam4cm_oneshot.c index a793350d66c..eeda41bc8ee 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot.c +++ b/arch/arm/src/sam34/sam4cm_oneshot.c @@ -58,6 +58,7 @@ #include #include "sam4cm_oneshot.h" +#include "sam4cm_freerun.h" #ifdef CONFIG_SAM34_ONESHOT @@ -106,10 +107,11 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr) /* Forward the event, clearing out any vestiges */ - oneshot_handler = (oneshot_handler_t)oneshot->handler; - oneshot->handler = NULL; - oneshot_arg = (void *)oneshot->arg; - oneshot->arg = NULL; + oneshot_handler = (oneshot_handler_t)oneshot->handler; + oneshot->handler = NULL; + oneshot_arg = (void *)oneshot->arg; + oneshot->arg = NULL; + oneshot->start_count = 0; oneshot_handler(oneshot_arg); } @@ -206,10 +208,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * success. */ - oneshot->chan = chan; - oneshot->running = false; - oneshot->handler = NULL; - oneshot->arg = NULL; + oneshot->chan = chan; + oneshot->running = false; + oneshot->handler = NULL; + oneshot->arg = NULL; + oneshot->start_count = 0; return OK; } @@ -248,8 +251,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec) * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, - void *arg, const struct timespec *ts) +int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, const struct timespec *ts) { uint64_t usec; uint64_t regval; @@ -267,7 +270,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, /* Yes.. then cancel it */ tcvdbg("Already running... cancelling\n"); - (void)sam_oneshot_cancel(oneshot, NULL); + (void)sam_oneshot_cancel(oneshot, freerun, NULL); } /* Save the new handler and its argument */ @@ -306,6 +309,26 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, sam_tc_start(oneshot->tch); + /* The function sam_tc_start() starts the timer/counter by setting the + * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register. + * The first one enables the timer/counter the latter performs an + * software trigger, which starts the clock and sets the counter + * register to zero. This reset is performed with the next valid edge + * of the selected clock. Thus it can take up USEC_PER_TICK microseconds + * until the counter register becomes zero. + * + * If the timer is canceled within this period the counter register holds + * the counter value for the last timer/counter run. To circumvent this + * the counter value of the freerun timer/counter is stored at each start + * of the oneshot timer/counter. + * + * The function up_timer_gettime() could also be used for this but it takes + * too long. If up_timer_gettime() is called within this function the problem + * vanishes at least if compiled with no optimisation. + */ + + oneshot->start_count = sam_tc_getcounter(freerun->tch); + /* Enable interrupts. We should get the callback when the interrupt * occurs. */ @@ -340,7 +363,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + struct timespec *ts) { irqstate_t flags; uint64_t usec; @@ -381,6 +405,17 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) count = sam_tc_getcounter(oneshot->tch); rc = sam_tc_getregister(oneshot->tch, TC_REGC); + /* In the case the timer/counter was canceled very short after its start, + * the counter register can hold the wrong value (the value of the last + * run). To prevent this the counter value is set to zero if not at + * least on tick passed since the start of the timer/counter. + */ + + if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count) + { + count = 0; + } + /* Now we can disable the interrupt and stop the timer. */ sam_tc_attach(oneshot->tch, NULL, NULL, 0); @@ -429,6 +464,14 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) usec = (((uint64_t)(rc - count)) * USEC_PER_SEC) / sam_tc_divfreq(oneshot->tch); + /* Each time the timer/counter is canceled the time calculated from + * the two registers (counter and REGC) is accurate up to an error + * between 0 and USEC_PER_TICK microseconds. To correct this error + * one tick which means USEC_PER_TICK microseconds are subtracted. + */ + + usec = usec > USEC_PER_TICK ? usec - USEC_PER_TICK : 0; + /* Return the time remaining in the correct form */ sec = usec / USEC_PER_SEC; diff --git a/arch/arm/src/sam34/sam4cm_oneshot.h b/arch/arm/src/sam34/sam4cm_oneshot.h index 3c3266b5db6..d7dc7a18ee0 100644 --- a/arch/arm/src/sam34/sam4cm_oneshot.h +++ b/arch/arm/src/sam34/sam4cm_oneshot.h @@ -46,6 +46,7 @@ #include #include "sam4cm_tc.h" +#include "sam4cm_freerun.h" #ifdef CONFIG_SAM34_ONESHOT @@ -82,6 +83,11 @@ struct sam_oneshot_s volatile oneshot_handler_t handler; /* Oneshot expiration callback */ volatile void *arg; /* The argument that will accompany * the callback */ + volatile uint32_t start_count; /* Stores the value of the freerun counter, + * at each start of the onshot timer. Is neccesary + * to find out if the onshot counter was updated + * correctly at the time of the call to + * sam_oneshot_cancel or not. */ }; /**************************************************************************** @@ -136,6 +142,9 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to * sam_oneshot_initialize(); + * freerun Caller allocated instance of the freerun state structure. This + * structure must have been previously initialized via a call to + * sam_freerun_initialize(); * handler The function to call when when the oneshot timer expires. * arg An opaque argument that will accompany the callback. * ts Provides the duration of the one shot timer. @@ -146,8 +155,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, - void *arg, const struct timespec *ts); +int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, const struct timespec *ts); /**************************************************************************** * Name: sam_oneshot_cancel @@ -162,6 +171,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to * sam_oneshot_initialize(); + * freerun Caller allocated instance of the freerun state structure. This + * structure must have been previously initialized via a call to + * sam_freerun_initialize(); * ts The location in which to return the time remaining on the * oneshot timer. A time of zero is returned if the timer is * not running. @@ -173,7 +185,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts); +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + struct timespec *ts); #undef EXTERN #ifdef __cplusplus diff --git a/arch/arm/src/sam34/sam4cm_tickless.c b/arch/arm/src/sam34/sam4cm_tickless.c index 04952413314..7d13e8756ef 100644 --- a/arch/arm/src/sam34/sam4cm_tickless.c +++ b/arch/arm/src/sam34/sam4cm_tickless.c @@ -365,8 +365,8 @@ int up_timer_gettime(FAR struct timespec *ts) int up_timer_cancel(FAR struct timespec *ts) { - return ONESHOT_INITIALIZED(&g_tickless.oneshot) ? - sam_oneshot_cancel(&g_tickless.oneshot, ts) : + return ONESHOT_INITIALIZED(&g_tickless.oneshot) && FREERUN_INITIALIZED(&g_tickless.freerun) ? + sam_oneshot_cancel(&g_tickless.oneshot, &g_tickless.freerun, ts) : -EAGAIN; } @@ -398,7 +398,7 @@ int up_timer_cancel(FAR struct timespec *ts) int up_timer_start(FAR const struct timespec *ts) { return ONESHOT_INITIALIZED(&g_tickless.oneshot) ? - sam_oneshot_start(&g_tickless.oneshot, sam_oneshot_handler, NULL, ts) : + sam_oneshot_start(&g_tickless.oneshot, &g_tickless.freerun, sam_oneshot_handler, NULL, ts) : -EAGAIN; } #endif /* CONFIG_SCHED_TICKLESS */ diff --git a/arch/arm/src/sam34/sam_emac.c b/arch/arm/src/sam34/sam_emac.c index d33f1d8aabb..c11332586ae 100644 --- a/arch/arm/src/sam34/sam_emac.c +++ b/arch/arm/src/sam34/sam_emac.c @@ -278,9 +278,9 @@ struct sam_emac_s struct work_s work; /* For deferring work to the work queue */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ /* Used to track transmit and receive descriptors */ @@ -841,7 +841,7 @@ static int sam_transmit(struct sam_emac_s *priv) * Function: sam_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -951,7 +951,7 @@ static void sam_dopoll(struct sam_emac_s *priv) if (sam_txfree(priv) > 0) { - /* If we have the descriptor, then poll uIP for new XMIT data. */ + /* If we have the descriptor, then poll the network for new XMIT data. */ (void)devif_poll(dev, sam_txpoll); } @@ -1201,7 +1201,7 @@ static void sam_receive(struct sam_emac_s *priv) { sam_dumppacket("Received packet", dev->d_buf, dev->d_len); - /* Check if the packet is a valid size for the uIP buffer configuration + /* Check if the packet is a valid size for the network buffer configuration * (this should not happen) */ @@ -1403,7 +1403,7 @@ static void sam_txdone(struct sam_emac_s *priv) sam_putreg(priv, SAM_EMAC_IER, EMAC_INT_RCOMP); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ sam_dopoll(priv); } @@ -1734,7 +1734,7 @@ static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv) sam_ifdown(&priv->dev); sam_ifup(&priv->dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ sam_dopoll(priv); } @@ -1844,7 +1844,7 @@ static inline void sam_poll_process(FAR struct sam_emac_s *priv) if (sam_txfree(priv) > 0) { - /* Update TCP timing states and poll uIP for new XMIT data. */ + /* Update TCP timing states and poll the network for new XMIT data. */ (void)devif_timer(dev, sam_txpoll); } @@ -2083,7 +2083,7 @@ static inline void sam_txavail_process(FAR struct sam_emac_s *priv) if (priv->ifup) { - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ sam_dopoll(priv); } diff --git a/arch/arm/src/sam34/sam_lowputc.c b/arch/arm/src/sam34/sam_lowputc.c index 88be9f0752c..13d5046ef08 100644 --- a/arch/arm/src/sam34/sam_lowputc.c +++ b/arch/arm/src/sam34/sam_lowputc.c @@ -75,16 +75,16 @@ * for our purposes. */ -#ifndef CONFIG_USART0_ISUART +#ifndef CONFIG_USART0_SERIALDRIVER # undef CONFIG_SAM34_USART0 #endif -#ifndef CONFIG_USART1_ISUART +#ifndef CONFIG_USART1_SERIALDRIVER # undef CONFIG_SAM34_USART1 #endif -#ifndef CONFIG_USART2_ISUART +#ifndef CONFIG_USART2_SERIALDRIVER # undef CONFIG_SAM34_USART2 #endif -#ifndef CONFIG_USART3_ISUART +#ifndef CONFIG_USART3_SERIALDRIVER # undef CONFIG_SAM34_USART3 #endif diff --git a/arch/arm/src/sam34/sam_serial.c b/arch/arm/src/sam34/sam_serial.c index 306a1210ea5..46df27954a1 100644 --- a/arch/arm/src/sam34/sam_serial.c +++ b/arch/arm/src/sam34/sam_serial.c @@ -84,16 +84,16 @@ * for our purposes. */ -#ifndef CONFIG_USART0_ISUART +#ifndef CONFIG_USART0_SERIALDRIVER # undef CONFIG_SAM34_USART0 #endif -#ifndef CONFIG_USART1_ISUART +#ifndef CONFIG_USART1_SERIALDRIVER # undef CONFIG_SAM34_USART1 #endif -#ifndef CONFIG_USART2_ISUART +#ifndef CONFIG_USART2_SERIALDRIVER # undef CONFIG_SAM34_USART2 #endif -#ifndef CONFIG_USART3_ISUART +#ifndef CONFIG_USART3_SERIALDRIVER # undef CONFIG_SAM34_USART3 #endif diff --git a/arch/arm/src/sam34/sam_twi.c b/arch/arm/src/sam34/sam_twi.c index a71525b6276..f8c2f7f7caf 100644 --- a/arch/arm/src/sam34/sam_twi.c +++ b/arch/arm/src/sam34/sam_twi.c @@ -901,6 +901,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid, /* Set the initial TWI data transfer frequency */ + priv->i2cfreq = 0; twi_setfrequency(priv, frequency); } diff --git a/arch/arm/src/sama5/Kconfig b/arch/arm/src/sama5/Kconfig index 351a5bebe85..b2701131bc2 100644 --- a/arch/arm/src/sama5/Kconfig +++ b/arch/arm/src/sama5/Kconfig @@ -387,7 +387,7 @@ config SAMA5_AESB config SAMA5_DBGU bool "Debug Unit (DBGU)" default n - select ARCH_HAVE_OTHER_UART + select OTHER_UART_SERIALDRIVER config SAMA5_PIT bool "Periodic Interval Timer (PIT)" @@ -432,70 +432,70 @@ config SAMA5_UART0 bool "UART 0" default y depends on SAMA5_HAVE_UART0 - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_UART1 bool "UART 1" default n depends on SAMA5_HAVE_UART1 - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_UART2 bool "UART 2" default n depends on SAMA5_HAVE_UART2 - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_UART3 bool "UART 3" default n depends on SAMA5_HAVE_UART3 - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_UART4 bool "UART 4" default n depends on SAMA5_HAVE_UART4 - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_USART0 bool "USART 0" default n depends on SAMA5_HAVE_USART0 - select ARCH_HAVE_USART0 + select USART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_USART1 bool "USART 1" default n depends on SAMA5_HAVE_USART1 - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_USART2 bool "USART 2" default n depends on SAMA5_HAVE_USART2 - select ARCH_HAVE_USART2 + select USART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_USART3 bool "USART 3" default n depends on SAMA5_HAVE_USART3 - select ARCH_HAVE_USART3 + select USART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_USART4 bool "USART 4" default n depends on SAMA5_HAVE_USART4 - select ARCH_HAVE_USART4 + select USART4_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_FLEXCOM0 @@ -786,7 +786,7 @@ choice config SAMA5_FLEXCOM0_USART bool "USART" select SAMA5_FLEXCOM_USART - select ARCH_HAVE_USART0 + select USART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_FLEXCOM0_SPI @@ -807,7 +807,7 @@ choice config SAMA5_FLEXCOM1_USART bool "USART" select SAMA5_FLEXCOM_USART - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_FLEXCOM1_SPI @@ -828,7 +828,7 @@ choice config SAMA5_FLEXCOM2_USART bool "USART" select SAMA5_FLEXCOM_USART - select ARCH_HAVE_USART2 + select USART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_FLEXCOM2_SPI @@ -853,7 +853,7 @@ config SAMA5_FLEXCOM3_USART config SAMA5_FLEXCOM3_SPI bool "SPI" select SAMA5_FLEXCOM_SPI - select ARCH_HAVE_USART3 + select USART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_FLEXCOM3_SPI @@ -870,7 +870,7 @@ choice config SAMA5_FLEXCOM4_USART bool "USART" select SAMA5_FLEXCOM_USART - select ARCH_HAVE_USART4 + select USART4_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMA5_FLEXCOM4_SPI @@ -3866,6 +3866,7 @@ endif # SAMA5_TC2 config SAMA5_ONESHOT bool "TC one-shot wrapper" + depends on SAMA5_FREERUN default n if !SCHED_TICKLESS default y if SCHED_TICKLESS ---help--- diff --git a/arch/arm/src/sama5/sam_adc.c b/arch/arm/src/sama5/sam_adc.c index 261434229e6..68565bc502f 100644 --- a/arch/arm/src/sama5/sam_adc.c +++ b/arch/arm/src/sama5/sam_adc.c @@ -57,6 +57,7 @@ #include #include #include +#include #include #include @@ -378,6 +379,7 @@ struct sam_adc_s { + FAR const struct adc_callback_s *cb; sem_t exclsem; /* Supports exclusive access to the ADC interface */ bool initialized; /* The ADC driver is already initialized */ uint32_t frequency; /* ADC clock frequency */ @@ -446,6 +448,8 @@ static int sam_adc_interrupt(int irq, void *context); /* ADC methods */ #ifdef SAMA5_ADC_HAVE_CHANNELS +static int sam_adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); static void sam_adc_reset(struct adc_dev_s *dev); static int sam_adc_setup(struct adc_dev_s *dev); static void sam_adc_shutdown(struct adc_dev_s *dev); @@ -477,6 +481,7 @@ static void sam_adc_channels(struct sam_adc_s *priv); static const struct adc_ops_s g_adcops = { + .ao_bind = sam_adc_bind, .ao_reset = sam_adc_reset, .ao_setup = sam_adc_setup, .ao_shutdown = sam_adc_shutdown, @@ -664,9 +669,15 @@ static void sam_adc_dmadone(void *arg) chan = (int)((*buffer & ADC_LCDR_CHANB_MASK) >> ADC_LCDR_CHANB_SHIFT); sample = ((*buffer & ADC_LCDR_DATA_MASK) >> ADC_LCDR_DATA_SHIFT); - /* And give the sample data to the ADC upper half */ + /* Verify that the upper-half driver has bound its callback functions */ - (void)adc_receive(priv->dev, chan, sample); + if (priv->cb != NULL) + { + /* Give the sample data to the ADC upper half */ + + DEBUGASSERT(priv->cb->au_receive != NULL); + priv->cb->au_receive(priv->dev, chan, sample); + } } } @@ -858,7 +869,17 @@ static void sam_adc_endconversion(void *arg) /* Read the ADC sample and pass it to the upper half */ regval = sam_adc_getreg(priv, SAM_ADC_CDR(chan)); - (void)adc_receive(priv->dev, chan, regval & ADC_CDR_DATA_MASK); + + /* Verify that the upper-half driver has bound its callback functions */ + + if (priv->cb != NULL) + { + /* Perform the data received callback */ + + DEBUGASSERT(priv->cb->au_receive != NULL); + priv->cb->au_receive(priv->dev, chan, regval & ADC_CDR_DATA_MASK); + } + pending &= ~bit; } } @@ -954,6 +975,26 @@ static int sam_adc_interrupt(int irq, void *context) /**************************************************************************** * ADC methods ****************************************************************************/ + +/**************************************************************************** + * Name: sam_adc_bind + * + * Description: + * Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + * + ****************************************************************************/ + +static int sam_adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback) +{ + struct sam_adc_s *priv = (struct sam_adc_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + priv->cb = callback; + return OK; +} + /**************************************************************************** * Name: sam_adc_reset * @@ -1980,6 +2021,7 @@ struct adc_dev_s *sam_adc_initialize(void) /* Initialize the private ADC device data structure */ sem_init(&priv->exclsem, 0, 1); + priv->cb = NULL; priv->dev = &g_adcdev; #ifdef CONFIG_SAMA5_ADC_DMA diff --git a/arch/arm/src/sama5/sam_config.h b/arch/arm/src/sama5/sam_config.h index 650d6c15032..14ab9b8dcfa 100644 --- a/arch/arm/src/sama5/sam_config.h +++ b/arch/arm/src/sama5/sam_config.h @@ -52,27 +52,27 @@ * for our purposes. */ -#ifndef CONFIG_USART0_ISUART +#ifndef CONFIG_USART0_SERIALDRIVER # undef CONFIG_SAMA5_USART0 # undef CONFIG_SAMA5_FLEXCOM0_USART # undef CONFIG_USART0_SERIAL_CONSOLE #endif -#ifndef CONFIG_USART1_ISUART +#ifndef CONFIG_USART1_SERIALDRIVER # undef CONFIG_SAMA5_USART1 # undef CONFIG_SAMA5_FLEXCOM1_USART # undef CONFIG_USART1_SERIAL_CONSOLE #endif -#ifndef CONFIG_USART2_ISUART +#ifndef CONFIG_USART2_SERIALDRIVER # undef CONFIG_SAMA5_USART2 # undef CONFIG_SAMA5_FLEXCOM2_USART # undef CONFIG_USART2_SERIAL_CONSOLE #endif -#ifndef CONFIG_USART3_ISUART +#ifndef CONFIG_USART3_SERIALDRIVER # undef CONFIG_SAMA5_USART3 # undef CONFIG_SAMA5_FLEXCOM3_USART # undef CONFIG_USART3_SERIAL_CONSOLE #endif -#ifndef CONFIG_USART4_ISUART +#ifndef CONFIG_USART4_SERIALDRIVER # undef CONFIG_SAMA5_USART4 # undef CONFIG_SAMA5_FLEXCOM4_USART # undef CONFIG_USART4_SERIAL_CONSOLE @@ -212,7 +212,7 @@ # define SAMA5_HAVE_UART_CONSOLE 1 # undef SAMA5_HAVE_USART_CONSOLE # undef SAMA5_HAVE_FLEXCOM_CONSOLE -#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_USART0_ISUART) +#elif defined(CONFIG_USART0_SERIAL_CONSOLE) && defined(CONFIG_USART0_SERIALDRIVER) # undef CONFIG_SAMA5_DBGU_CONSOLE # undef CONFIG_UART0_SERIAL_CONSOLE # undef CONFIG_UART1_SERIAL_CONSOLE @@ -227,7 +227,7 @@ # undef SAMA5_HAVE_UART_CONSOLE # define SAMA5_HAVE_USART_CONSOLE 1 # undef SAMA5_HAVE_FLEXCOM_CONSOLE -#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_USART1_ISUART) +#elif defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_USART1_SERIALDRIVER) # undef CONFIG_SAMA5_DBGU_CONSOLE # undef CONFIG_UART0_SERIAL_CONSOLE # undef CONFIG_UART1_SERIAL_CONSOLE @@ -242,7 +242,7 @@ # undef SAMA5_HAVE_UART_CONSOLE # define SAMA5_HAVE_USART_CONSOLE 1 # undef SAMA5_HAVE_FLEXCOM_CONSOLE -#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_USART2_ISUART) +#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_USART2_SERIALDRIVER) # undef CONFIG_SAMA5_DBGU_CONSOLE # undef CONFIG_UART0_SERIAL_CONSOLE # undef CONFIG_UART1_SERIAL_CONSOLE @@ -257,7 +257,7 @@ # undef SAMA5_HAVE_UART_CONSOLE # define SAMA5_HAVE_USART_CONSOLE 1 # undef SAMA5_HAVE_FLEXCOM_CONSOLE -#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_USART3_ISUART) +#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_USART3_SERIALDRIVER) # undef CONFIG_SAMA5_DBGU_CONSOLE # undef CONFIG_UART0_SERIAL_CONSOLE # undef CONFIG_UART1_SERIAL_CONSOLE @@ -272,7 +272,7 @@ # undef SAMA5_HAVE_UART_CONSOLE # define SAMA5_HAVE_USART_CONSOLE 1 # undef SAMA5_HAVE_FLEXCOM_CONSOLE -#elif defined(CONFIG_USART4_SERIAL_CONSOLE) && defined(CONFIG_USART4_ISUART) +#elif defined(CONFIG_USART4_SERIAL_CONSOLE) && defined(CONFIG_USART4_SERIALDRIVER) # undef CONFIG_SAMA5_DBGU_CONSOLE # undef CONFIG_UART0_SERIAL_CONSOLE # undef CONFIG_UART1_SERIAL_CONSOLE diff --git a/arch/arm/src/sama5/sam_emaca.c b/arch/arm/src/sama5/sam_emaca.c index 5d3ad03e60b..a4f895760d1 100644 --- a/arch/arm/src/sama5/sam_emaca.c +++ b/arch/arm/src/sama5/sam_emaca.c @@ -267,9 +267,9 @@ struct sam_emac_s WDOG_ID txpoll; /* TX poll timer */ WDOG_ID txtimeout; /* TX timeout timer */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ /* Used to track transmit and receive descriptors */ @@ -817,7 +817,7 @@ static int sam_transmit(struct sam_emac_s *priv) * Function: sam_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -926,7 +926,7 @@ static void sam_dopoll(struct sam_emac_s *priv) if (sam_txfree(priv) > 0) { - /* If we have the descriptor, then poll uIP for new XMIT data. */ + /* If we have the descriptor, then poll the network for new XMIT data. */ (void)devif_poll(dev, sam_txpoll); } @@ -1206,7 +1206,7 @@ static void sam_receive(struct sam_emac_s *priv) { sam_dumppacket("Received packet", dev->d_buf, dev->d_len); - /* Check if the packet is a valid size for the uIP buffer configuration + /* Check if the packet is a valid size for the network buffer configuration * (this should not happen) */ @@ -1410,7 +1410,7 @@ static void sam_txdone(struct sam_emac_s *priv) sam_putreg(priv, SAM_EMAC_IER, EMAC_INT_RCOMP); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ sam_dopoll(priv); } @@ -1633,7 +1633,7 @@ static void sam_txtimeout(int argc, uint32_t arg, ...) sam_ifdown(&priv->dev); sam_ifup(&priv->dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ sam_dopoll(priv); } @@ -1667,7 +1667,7 @@ static void sam_polltimer(int argc, uint32_t arg, ...) if (sam_txfree(priv) > 0) { - /* Update TCP timing states and poll uIP for new XMIT data. */ + /* Update TCP timing states and poll the network for new XMIT data. */ (void)devif_timer(dev, sam_txpoll); } @@ -1837,7 +1837,7 @@ static int sam_txavail(struct net_driver_s *dev) if (priv->ifup) { - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ sam_dopoll(priv); } diff --git a/arch/arm/src/sama5/sam_emacb.c b/arch/arm/src/sama5/sam_emacb.c index fccc2d51f03..270acd635b5 100644 --- a/arch/arm/src/sama5/sam_emacb.c +++ b/arch/arm/src/sama5/sam_emacb.c @@ -421,9 +421,9 @@ struct sam_emac_s struct work_s work; /* For deferring work to the work queue */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ /* Constant and configured attributes of the EMAC */ @@ -1180,7 +1180,7 @@ static int sam_transmit(struct sam_emac_s *priv) * Function: sam_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -1290,7 +1290,7 @@ static void sam_dopoll(struct sam_emac_s *priv) if (sam_txfree(priv) > 0) { - /* If we have the descriptor, then poll uIP for new XMIT data. */ + /* If we have the descriptor, then poll the network for new XMIT data. */ (void)devif_poll(dev, sam_txpoll); } @@ -1569,7 +1569,7 @@ static void sam_receive(struct sam_emac_s *priv) { sam_dumppacket("Received packet", dev->d_buf, dev->d_len); - /* Check if the packet is a valid size for the uIP buffer configuration + /* Check if the packet is a valid size for the network buffer configuration * (this should not happen) */ @@ -1797,7 +1797,7 @@ static void sam_txdone(struct sam_emac_s *priv) sam_putreg(priv, SAM_EMAC_IER_OFFSET, EMAC_INT_RCOMP); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ sam_dopoll(priv); } @@ -2154,7 +2154,7 @@ static inline void sam_txtimeout_process(FAR struct sam_emac_s *priv) sam_ifdown(&priv->dev); sam_ifup(&priv->dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ sam_dopoll(priv); } @@ -2264,7 +2264,7 @@ static inline void sam_poll_process(FAR struct sam_emac_s *priv) if (sam_txfree(priv) > 0) { - /* Update TCP timing states and poll uIP for new XMIT data. */ + /* Update TCP timing states and poll the network for new XMIT data. */ (void)devif_timer(dev, sam_txpoll); } @@ -2511,7 +2511,7 @@ static inline void sam_txavail_process(FAR struct sam_emac_s *priv) if (priv->ifup) { - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ sam_dopoll(priv); } diff --git a/arch/arm/src/sama5/sam_flexcom_serial.c b/arch/arm/src/sama5/sam_flexcom_serial.c index c65c1aab474..c0d4693ac86 100644 --- a/arch/arm/src/sama5/sam_flexcom_serial.c +++ b/arch/arm/src/sama5/sam_flexcom_serial.c @@ -120,19 +120,19 @@ # define FLEXUS4_ASSIGNED 1 #else # undef CONSOLE_DEV /* No console */ -# if defined(CONFIG_USART0_ISUART) +# if defined(CONFIG_USART0_SERIALDRIVER) # define TTYFC0_DEV g_flexus0port /* FLEXUS0 is ttyFC0 */ # define FLEXUS0_ASSIGNED 1 -# elif defined(CONFIG_USART1_ISUART) +# elif defined(CONFIG_USART1_SERIALDRIVER) # define TTYFC0_DEV g_flexus1port /* FLEXUS1 is ttyFC0 */ # define FLEXUS1_ASSIGNED 1 -# elif defined(CONFIG_USART2_ISUART) +# elif defined(CONFIG_USART2_SERIALDRIVER) # define TTYFC0_DEV g_flexus2port /* FLEXUS2 is ttyFC0 */ # define FLEXUS2_ASSIGNED 1 -# elif defined(CONFIG_USART3_ISUART) +# elif defined(CONFIG_USART3_SERIALDRIVER) # define TTYFC0_DEV g_flexus3port /* FLEXUS3 is ttyFC0 */ # define FLEXUS3_ASSIGNED 1 -# elif defined(CONFIG_USART4_ISUART) +# elif defined(CONFIG_USART4_SERIALDRIVER) # define TTYFC0_DEV g_flexus4port /* FLEXUS4 is ttyFC0 */ # define FLEXUS4_ASSIGNED 4 # endif @@ -140,19 +140,19 @@ /* Pick ttyFC1. This could be any of USART0-4 excluding the console UART. */ -#if defined(CONFIG_USART0_ISUART) && !defined(FLEXUS0_ASSIGNED) +#if defined(CONFIG_USART0_SERIALDRIVER) && !defined(FLEXUS0_ASSIGNED) # define TTYFC1_DEV g_flexus0port /* FLEXUS0 is ttyFC1 */ # define FLEXUS0_ASSIGNED 1 -#elif defined(CONFIG_USART1_ISUART) && !defined(FLEXUS1_ASSIGNED) +#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(FLEXUS1_ASSIGNED) # define TTYFC1_DEV g_flexus1port /* FLEXUS1 is ttyFC1 */ # define FLEXUS1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(FLEXUS2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(FLEXUS2_ASSIGNED) # define TTYFC1_DEV g_flexus2port /* FLEXUS2 is ttyFC1 */ # define FLEXUS2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(FLEXUS3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(FLEXUS3_ASSIGNED) # define TTYFC1_DEV g_flexus3port /* FLEXUS3 is ttyFC1 */ # define FLEXUS3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(FLEXUS4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(FLEXUS4_ASSIGNED) # define TTYFC1_DEV g_flexus4port /* FLEXUS4 is ttyFC1 */ # define FLEXUS4_ASSIGNED 1 #endif @@ -162,16 +162,16 @@ * could also be the console. */ -#if defined(CONFIG_USART1_ISUART) && !defined(FLEXUS1_ASSIGNED) +#if defined(CONFIG_USART1_SERIALDRIVER) && !defined(FLEXUS1_ASSIGNED) # define TTYFC2_DEV g_flexus1port /* FLEXUS1 is ttyFC2 */ # define FLEXUS1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(FLEXUS2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(FLEXUS2_ASSIGNED) # define TTYFC2_DEV g_flexus2port /* FLEXUS2 is ttyFC2 */ # define FLEXUS2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(FLEXUS3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(FLEXUS3_ASSIGNED) # define TTYFC2_DEV g_flexus3port /* FLEXUS3 is ttyFC2 */ # define FLEXUS3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYFC2_DEV g_flexus4port /* FLEXUS4 is ttyFC2 */ # define FLEXUS4_ASSIGNED 1 #endif @@ -181,13 +181,13 @@ * FLEXUS2-4 could also be the console. */ -#if defined(CONFIG_USART2_ISUART) && !defined(FLEXUS2_ASSIGNED) +#if defined(CONFIG_USART2_SERIALDRIVER) && !defined(FLEXUS2_ASSIGNED) # define TTYFC3_DEV g_flexus2port /* FLEXUS2 is ttyFC3 */ # define FLEXUS2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(FLEXUS3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(FLEXUS3_ASSIGNED) # define TTYFC3_DEV g_flexus3port /* FLEXUS3 is ttyFC3 */ # define FLEXUS3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(FLEXUS4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(FLEXUS4_ASSIGNED) # define TTYFC3_DEV g_flexus4port /* FLEXUS4 is ttyFC3 */ # define FLEXUS4_ASSIGNED 1 #endif @@ -197,10 +197,10 @@ * USART3-4 could also be the console. */ -#if defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#if defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYFC4_DEV g_flexus3port /* USART3 is ttyFC4 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYFC4_DEV g_flexus4port /* USART4 is ttyFC4 */ # define USART4_ASSIGNED 1 #endif @@ -234,19 +234,19 @@ struct flexus_dev_s ****************************************************************************/ static int flexus_interrupt(struct uart_dev_s *dev); -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER static int flexus0_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART1_ISUART +#ifdef CONFIG_USART1_SERIALDRIVER static int flexus1_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART2_ISUART +#ifdef CONFIG_USART2_SERIALDRIVER static int flexus2_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART3_ISUART +#ifdef CONFIG_USART3_SERIALDRIVER static int flexus3_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART4_ISUART +#ifdef CONFIG_USART4_SERIALDRIVER static int flexus4_interrupt(int irq, void *context); #endif @@ -288,30 +288,30 @@ static const struct uart_ops_s g_flexus_ops = /* I/O buffers */ -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER static char g_flexus0rxbuffer[CONFIG_USART0_RXBUFSIZE]; static char g_flexus0txbuffer[CONFIG_USART0_TXBUFSIZE]; #endif -#ifdef CONFIG_USART1_ISUART +#ifdef CONFIG_USART1_SERIALDRIVER static char g_flexus1rxbuffer[CONFIG_USART1_RXBUFSIZE]; static char g_flexus1txbuffer[CONFIG_USART1_TXBUFSIZE]; #endif -#ifdef CONFIG_USART2_ISUART +#ifdef CONFIG_USART2_SERIALDRIVER static char g_flexus2rxbuffer[CONFIG_USART2_RXBUFSIZE]; static char g_flexus2txbuffer[CONFIG_USART2_TXBUFSIZE]; #endif -#ifdef CONFIG_USART3_ISUART +#ifdef CONFIG_USART3_SERIALDRIVER static char g_flexus3rxbuffer[CONFIG_USART3_RXBUFSIZE]; static char g_flexus3txbuffer[CONFIG_USART3_TXBUFSIZE]; #endif -#ifdef CONFIG_USART4_ISUART +#ifdef CONFIG_USART4_SERIALDRIVER static char g_flexus4rxbuffer[CONFIG_USART4_RXBUFSIZE]; static char g_flexus4txbuffer[CONFIG_USART4_TXBUFSIZE]; #endif /* This describes the state of the USART0 port. */ -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER static struct flexus_dev_s g_flexus0priv = { .handler = flexus0_interrupt, @@ -345,7 +345,7 @@ static uart_dev_t g_flexus0port = /* This describes the state of the USART1 port. */ -#ifdef CONFIG_USART1_ISUART +#ifdef CONFIG_USART1_SERIALDRIVER static struct flexus_dev_s g_flexus1priv = { .handler = flexus1_interrupt, @@ -379,7 +379,7 @@ static uart_dev_t g_flexus1port = /* This describes the state of the USART2 port. */ -#ifdef CONFIG_USART2_ISUART +#ifdef CONFIG_USART2_SERIALDRIVER static struct flexus_dev_s g_flexus2priv = { .handler = flexus2_interrupt, @@ -413,7 +413,7 @@ static uart_dev_t g_flexus2port = /* This describes the state of the USART3 port. */ -#ifdef CONFIG_USART3_ISUART +#ifdef CONFIG_USART3_SERIALDRIVER static struct flexus_dev_s g_flexus3priv = { .handler = flexus3_interrupt, @@ -447,7 +447,7 @@ static uart_dev_t g_flexus3port = /* This describes the state of the USART4 port. */ -#ifdef CONFIG_USART4_ISUART +#ifdef CONFIG_USART4_SERIALDRIVER static struct flexus_dev_s g_flexus4priv = { .handler = flexus4_interrupt, @@ -613,31 +613,31 @@ static int flexus_interrupt(struct uart_dev_s *dev) * ****************************************************************************/ -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER static int flexus0_interrupt(int irq, void *context) { return flexus_interrupt(&g_flexus0port); } #endif -#ifdef CONFIG_USART1_ISUART +#ifdef CONFIG_USART1_SERIALDRIVER static int flexus1_interrupt(int irq, void *context) { return flexus_interrupt(&g_flexus1port); } #endif -#ifdef CONFIG_USART2_ISUART +#ifdef CONFIG_USART2_SERIALDRIVER static int flexus2_interrupt(int irq, void *context) { return flexus_interrupt(&g_flexus2port); } #endif -#ifdef CONFIG_USART3_ISUART +#ifdef CONFIG_USART3_SERIALDRIVER static int flexus3_interrupt(int irq, void *context) { return flexus_interrupt(&g_flexus3port); } #endif -#ifdef CONFIG_USART4_ISUART +#ifdef CONFIG_USART4_SERIALDRIVER static int flexus4_interrupt(int irq, void *context) { return flexus_interrupt(&g_flexus4port); diff --git a/arch/arm/src/sama5/sam_gmac.c b/arch/arm/src/sama5/sam_gmac.c index 8426e7dcb3b..7db62d10dba 100644 --- a/arch/arm/src/sama5/sam_gmac.c +++ b/arch/arm/src/sama5/sam_gmac.c @@ -193,9 +193,9 @@ struct sam_gmac_s WDOG_ID txpoll; /* TX poll timer */ WDOG_ID txtimeout; /* TX timeout timer */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ /* Used to track transmit and receive descriptors */ @@ -749,7 +749,7 @@ static int sam_transmit(struct sam_gmac_s *priv) * Function: sam_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -858,7 +858,7 @@ static void sam_dopoll(struct sam_gmac_s *priv) if (sam_txfree(priv) > 0) { - /* If we have the descriptor, then poll uIP for new XMIT data. */ + /* If we have the descriptor, then poll the network for new XMIT data. */ (void)devif_poll(dev, sam_txpoll); } @@ -1136,7 +1136,7 @@ static void sam_receive(struct sam_gmac_s *priv) { sam_dumppacket("Received packet", dev->d_buf, dev->d_len); - /* Check if the packet is a valid size for the uIP buffer configuration + /* Check if the packet is a valid size for the network buffer configuration * (this should not happen) */ @@ -1338,7 +1338,7 @@ static void sam_txdone(struct sam_gmac_s *priv) sam_putreg(priv, SAM_GMAC_IER, GMAC_INT_RCOMP); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ sam_dopoll(priv); } @@ -1585,7 +1585,7 @@ static void sam_txtimeout(int argc, uint32_t arg, ...) sam_ifdown(&priv->dev); sam_ifup(&priv->dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ sam_dopoll(priv); } @@ -1619,7 +1619,7 @@ static void sam_polltimer(int argc, uint32_t arg, ...) if (sam_txfree(priv) > 0) { - /* Update TCP timing states and poll uIP for new XMIT data. */ + /* Update TCP timing states and poll the network for new XMIT data. */ (void)devif_timer(dev, sam_txpoll); } @@ -1792,7 +1792,7 @@ static int sam_txavail(struct net_driver_s *dev) if (priv->ifup) { - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ sam_dopoll(priv); } diff --git a/arch/arm/src/sama5/sam_lowputc.c b/arch/arm/src/sama5/sam_lowputc.c index 84e7a37d213..f94f6f05167 100644 --- a/arch/arm/src/sama5/sam_lowputc.c +++ b/arch/arm/src/sama5/sam_lowputc.c @@ -379,7 +379,7 @@ void sam_lowsetup(void) #ifdef CONFIG_SAMA5_UART4 sam_uart4_enableclk(); #endif -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER sam_usart0_enableclk(); #endif #ifdef CONFIG_SAMA5_USART1 @@ -436,7 +436,7 @@ void sam_lowsetup(void) (void)sam_configpio(PIO_UART4_TXD); #endif -#if defined(CONFIG_USART0_ISUART) && defined(CONFIG_SAMA5_USART0) +#if defined(CONFIG_USART0_SERIALDRIVER) && defined(CONFIG_SAMA5_USART0) (void)sam_configpio(PIO_USART0_RXD); (void)sam_configpio(PIO_USART0_TXD); #ifdef CONFIG_USART0_OFLOWCONTROL @@ -447,7 +447,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART1_ISUART) && defined(CONFIG_SAMA5_USART1) +#if defined(CONFIG_USART1_SERIALDRIVER) && defined(CONFIG_SAMA5_USART1) (void)sam_configpio(PIO_USART1_RXD); (void)sam_configpio(PIO_USART1_TXD); #ifdef CONFIG_USART1_OFLOWCONTROL @@ -458,7 +458,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART2_ISUART) && defined(CONFIG_SAMA5_USART2) +#if defined(CONFIG_USART2_SERIALDRIVER) && defined(CONFIG_SAMA5_USART2) (void)sam_configpio(PIO_USART2_RXD); (void)sam_configpio(PIO_USART2_TXD); #ifdef CONFIG_USART2_OFLOWCONTROL @@ -469,7 +469,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART3_ISUART) && defined(CONFIG_SAMA5_USART3) +#if defined(CONFIG_USART3_SERIALDRIVER) && defined(CONFIG_SAMA5_USART3) (void)sam_configpio(PIO_USART3_RXD); (void)sam_configpio(PIO_USART3_TXD); #ifdef CONFIG_USART3_OFLOWCONTROL @@ -480,7 +480,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART4_ISUART) && defined(CONFIG_SAMA5_USART4) +#if defined(CONFIG_USART4_SERIALDRIVER) && defined(CONFIG_SAMA5_USART4) (void)sam_configpio(PIO_USART4_RXD); (void)sam_configpio(PIO_USART4_TXD); #ifdef CONFIG_USART4_OFLOWCONTROL @@ -500,7 +500,7 @@ void sam_lowsetup(void) * FLEXCOM_IO4 = RTS */ -#if defined(CONFIG_USART0_ISUART) && defined(CONFIG_SAMA5_FLEXCOM0_USART) +#if defined(CONFIG_USART0_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM0_USART) (void)sam_configpio(PIO_FLEXCOM0_IO0); (void)sam_configpio(PIO_FLEXCOM0_IO1); #ifdef CONFIG_USART0_OFLOWCONTROL @@ -511,7 +511,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART1_ISUART) && defined(CONFIG_SAMA5_FLEXCOM1_USART) +#if defined(CONFIG_USART1_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM1_USART) (void)sam_configpio(PIO_FLEXCOM1_IO0); (void)sam_configpio(PIO_FLEXCOM1_IO1); #ifdef CONFIG_USART1_OFLOWCONTROL @@ -522,7 +522,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART2_ISUART) && defined(CONFIG_SAMA5_FLEXCOM2_USART) +#if defined(CONFIG_USART2_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM2_USART) (void)sam_configpio(PIO_FLEXCOM2_IO0); (void)sam_configpio(PIO_FLEXCOM2_IO1); #ifdef CONFIG_USART2_OFLOWCONTROL @@ -533,7 +533,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART3_ISUART) && defined(CONFIG_SAMA5_FLEXCOM3_USART) +#if defined(CONFIG_USART3_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM3_USART) (void)sam_configpio(PIO_FLEXCOM3_IO0); (void)sam_configpio(PIO_FLEXCOM3_IO1); #ifdef CONFIG_USART3_OFLOWCONTROL @@ -544,7 +544,7 @@ void sam_lowsetup(void) #endif #endif -#if defined(CONFIG_USART4_ISUART) && defined(CONFIG_SAMA5_FLEXCOM4_USART) +#if defined(CONFIG_USART4_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM4_USART) (void)sam_configpio(PIO_FLEXCOM4_IO0); (void)sam_configpio(PIO_FLEXCOM4_IO1); #ifdef CONFIG_USART4_OFLOWCONTROL diff --git a/arch/arm/src/sama5/sam_oneshot.c b/arch/arm/src/sama5/sam_oneshot.c index c86224155af..c6d0a79ef58 100644 --- a/arch/arm/src/sama5/sam_oneshot.c +++ b/arch/arm/src/sama5/sam_oneshot.c @@ -59,6 +59,7 @@ #include #include "sam_oneshot.h" +#include "sam_freerun.h" #ifdef CONFIG_SAMA5_ONESHOT @@ -123,10 +124,11 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr) /* Forward the event, clearing out any vestiges */ - oneshot_handler = (oneshot_handler_t)oneshot->handler; - oneshot->handler = NULL; - oneshot_arg = (void *)oneshot->arg; - oneshot->arg = NULL; + oneshot_handler = (oneshot_handler_t)oneshot->handler; + oneshot->handler = NULL; + oneshot_arg = (void *)oneshot->arg; + oneshot->arg = NULL; + oneshot->start_count = 0; oneshot_handler(oneshot_arg); } @@ -223,10 +225,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * success. */ - oneshot->chan = chan; - oneshot->running = false; - oneshot->handler = NULL; - oneshot->arg = NULL; + oneshot->chan = chan; + oneshot->running = false; + oneshot->handler = NULL; + oneshot->arg = NULL; + oneshot->start_count = 0; return OK; } @@ -250,8 +253,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, - void *arg, const struct timespec *ts) +int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, const struct timespec *ts) { uint64_t usec; uint64_t regval; @@ -269,7 +272,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, /* Yes.. then cancel it */ tcvdbg("Already running... cancelling\n"); - (void)sam_oneshot_cancel(oneshot, NULL); + (void)sam_oneshot_cancel(oneshot, freerun, NULL); } /* Save the new handler and its argument */ @@ -308,6 +311,26 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, sam_tc_start(oneshot->tch); + /* The function sam_tc_start() starts the timer/counter by setting the + * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register. + * The first one enables the timer/counter the latter performs an + * software trigger, which starts the clock and sets the counter + * register to zero. This reset is performed with the next valid edge + * of the selected clock. Thus it can take up USEC_PER_TICK microseconds + * until the counter register becomes zero. + * + * If the timer is canceled within this period the counter register holds + * the counter value for the last timer/counter run. To circumvent this + * the counter value of the freerun timer/counter is stored at each start + * of the oneshot timer/counter. + * + * The function up_timer_gettime() could also be used for this but it takes + * too long. If up_timer_gettime() is called within this function the problem + * vanishes at least if compiled with no optimisation. + */ + + oneshot->start_count = sam_tc_getcounter(freerun->tch); + /* Enable interrupts. We should get the callback when the interrupt * occurs. */ @@ -342,7 +365,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + struct timespec *ts) { irqstate_t flags; uint64_t usec; @@ -383,6 +407,17 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) count = sam_tc_getcounter(oneshot->tch); rc = sam_tc_getregister(oneshot->tch, TC_REGC); + /* In the case the timer/counter was canceled very short after its start, + * the counter register can hold the wrong value (the value of the last + * run). To prevent this the counter value is set to zero if not at + * least on tick passed since the start of the timer/counter. + */ + + if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count) + { + count = 0; + } + /* Now we can disable the interrupt and stop the timer. */ sam_tc_attach(oneshot->tch, NULL, NULL, 0); @@ -431,6 +466,14 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) usec = (((uint64_t)(rc - count)) * USEC_PER_SEC) / sam_tc_divfreq(oneshot->tch); + /* Each time the timer/counter is canceled the time calculated from + * the two registers (counter and REGC) is accurate up to an error + * between 0 and USEC_PER_TICK microseconds. To correct this error + * one tick which means USEC_PER_TICK microseconds are subtracted. + */ + + usec = usec > USEC_PER_TICK ? usec - USEC_PER_TICK : 0; + /* Return the time remaining in the correct form */ sec = usec / USEC_PER_SEC; diff --git a/arch/arm/src/sama5/sam_oneshot.h b/arch/arm/src/sama5/sam_oneshot.h index 4fefe9fe11b..0443fcd693d 100644 --- a/arch/arm/src/sama5/sam_oneshot.h +++ b/arch/arm/src/sama5/sam_oneshot.h @@ -46,6 +46,7 @@ #include #include "sam_tc.h" +#include "sam_freerun.h" #ifdef CONFIG_SAMA5_ONESHOT @@ -82,6 +83,11 @@ struct sam_oneshot_s volatile oneshot_handler_t handler; /* Oneshot expiration callback */ volatile void *arg; /* The argument that will accompany * the callback */ + volatile uint32_t start_count; /* Stores the value of the freerun counter, + * at each start of the onshot timer. Is neccesary + * to find out if the onshot counter was updated + * correctly at the time of the call to + * sam_oneshot_cancel or not. */ }; /**************************************************************************** @@ -134,6 +140,9 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to * sam_oneshot_initialize(); + * freerun Caller allocated instance of the freerun state structure. This + * structure must have been previously initialized via a call to + * sam_freerun_initialize(); * handler The function to call when when the oneshot timer expires. * arg An opaque argument that will accompany the callback. * ts Provides the duration of the one shot timer. @@ -144,8 +153,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, - void *arg, const struct timespec *ts); +int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, const struct timespec *ts); /**************************************************************************** * Name: sam_oneshot_cancel @@ -160,6 +169,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to * sam_oneshot_initialize(); + * freerun Caller allocated instance of the freerun state structure. This + * structure must have been previously initialized via a call to + * sam_freerun_initialize(); * ts The location in which to return the time remaining on the * oneshot timer. A time of zero is returned if the timer is * not running. @@ -171,7 +183,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts); +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + struct timespec *ts); #undef EXTERN #ifdef __cplusplus diff --git a/arch/arm/src/sama5/sam_serial.c b/arch/arm/src/sama5/sam_serial.c index 0083606dba1..a73ac33cd24 100644 --- a/arch/arm/src/sama5/sam_serial.c +++ b/arch/arm/src/sama5/sam_serial.c @@ -167,19 +167,19 @@ # elif defined(CONFIG_SAMA5_UART4) # define TTYS0_DEV g_uart1port /* UART4 is ttyS0 */ # define UART4_ASSIGNED 1 -# elif defined(CONFIG_USART0_ISUART) +# elif defined(CONFIG_USART0_SERIALDRIVER) # define TTYS0_DEV g_usart0port /* USART0 is ttyS0 */ # define USART0_ASSIGNED 1 -# elif defined(CONFIG_USART1_ISUART) +# elif defined(CONFIG_USART1_SERIALDRIVER) # define TTYS0_DEV g_usart1port /* USART1 is ttyS0 */ # define USART1_ASSIGNED 1 -# elif defined(CONFIG_USART2_ISUART) +# elif defined(CONFIG_USART2_SERIALDRIVER) # define TTYS0_DEV g_usart2port /* USART2 is ttyS0 */ # define USART2_ASSIGNED 1 -# elif defined(CONFIG_USART3_ISUART) +# elif defined(CONFIG_USART3_SERIALDRIVER) # define TTYS0_DEV g_usart3port /* USART3 is ttyS0 */ # define USART3_ASSIGNED 1 -# elif defined(CONFIG_USART4_ISUART) +# elif defined(CONFIG_USART4_SERIALDRIVER) # define TTYS0_DEV g_usart4port /* USART4 is ttyS0 */ # define USART4_ASSIGNED 4 # endif @@ -202,19 +202,19 @@ #elif defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED) # define TTYS1_DEV g_uart1port /* UART4 is ttyS1 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED) +#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED) # define TTYS1_DEV g_usart0port /* USART0 is ttyS1 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED) +#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED) # define TTYS1_DEV g_usart1port /* USART1 is ttyS1 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED) # define TTYS1_DEV g_usart2port /* USART2 is ttyS1 */ # define USART2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS1_DEV g_usart3port /* USART3 is ttyS1 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS1_DEV g_usart4port /* USART4 is ttyS1 */ # define USART4_ASSIGNED 1 #endif @@ -236,19 +236,19 @@ #elif defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED) # define TTYS2_DEV g_uart1port /* UART4 is ttyS2 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED) +#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED) # define TTYS2_DEV g_usart0port /* USART0 is ttyS2 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED) +#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED) # define TTYS2_DEV g_usart1port /* USART1 is ttyS2 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED) # define TTYS2_DEV g_usart2port /* USART2 is ttyS2 */ # define USART2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS2_DEV g_usart3port /* USART3 is ttyS2 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS2_DEV g_usart4port /* USART4 is ttyS2 */ # define USART4_ASSIGNED 1 #endif @@ -267,19 +267,19 @@ #elif defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED) # define TTYS3_DEV g_uart1port /* UART4 is ttyS3 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED) +#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED) # define TTYS3_DEV g_usart0port /* USART0 is ttyS3 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED) +#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED) # define TTYS3_DEV g_usart1port /* USART1 is ttyS3 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED) # define TTYS3_DEV g_usart2port /* USART2 is ttyS3 */ # define USART2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS3_DEV g_usart3port /* USART3 is ttyS3 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS3_DEV g_usart4port /* USART4 is ttyS3 */ # define USART4_ASSIGNED 1 #endif @@ -295,19 +295,19 @@ #elif defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED) # define TTYS4_DEV g_uart1port /* UART4 is ttyS4 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED) +#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED) # define TTYS4_DEV g_usart0port /* USART0 is ttyS4 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED) +#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED) # define TTYS4_DEV g_usart1port /* USART1 is ttyS4 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED) # define TTYS4_DEV g_usart2port /* USART2 is ttyS4 */ # define USART2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS4_DEV g_usart3port /* USART3 is ttyS4 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS4_DEV g_usart4port /* USART4 is ttyS4 */ # define USART4_ASSIGNED 1 #endif @@ -320,19 +320,19 @@ #if defined(CONFIG_SAMA5_UART4) && !defined(UART4_ASSIGNED) # define TTYS5_DEV g_uart4port /* UART4 is ttyS5 */ # define UART1_ASSIGNED 1 -#elif defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED) +#elif defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED) # define TTYS5_DEV g_usart0port /* USART0 is ttyS5 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED) +#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED) # define TTYS5_DEV g_usart1port /* USART1 is ttyS5 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED) # define TTYS5_DEV g_usart2port /* USART2 is ttyS5 */ # define USART2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS5_DEV g_usart3port /* USART3 is ttyS5 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS5_DEV g_usart4port /* USART4 is ttyS5 */ # define USART4_ASSIGNED 1 #endif @@ -342,19 +342,19 @@ * could also be the console. */ -#if defined(CONFIG_USART0_ISUART) && !defined(USART0_ASSIGNED) +#if defined(CONFIG_USART0_SERIALDRIVER) && !defined(USART0_ASSIGNED) # define TTYS6_DEV g_usart0port /* USART0 is ttyS6 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED) +#elif defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED) # define TTYS6_DEV g_usart1port /* USART1 is ttyS6 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED) # define TTYS6_DEV g_usart2port /* USART2 is ttyS6 */ # define USART2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS6_DEV g_usart3port /* USART3 is ttyS6 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS6_DEV g_usart4port /* USART4 is ttyS6 */ # define USART4_ASSIGNED 1 #endif @@ -364,16 +364,16 @@ * USART1-4 could also be the console. */ -#if defined(CONFIG_USART1_ISUART) && !defined(USART1_ASSIGNED) +#if defined(CONFIG_USART1_SERIALDRIVER) && !defined(USART1_ASSIGNED) # define TTYS7_DEV g_usart1port /* USART1 is ttyS7 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED) +#elif defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED) # define TTYS7_DEV g_usart2port /* USART2 is ttyS7 */ # define USART2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS7_DEV g_usart3port /* USART3 is ttyS7 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS7_DEV g_usart4port /* USART4 is ttyS7 */ # define USART4_ASSIGNED 1 #endif @@ -383,13 +383,13 @@ * USART2-4 could also be the console. */ -#if defined(CONFIG_USART2_ISUART) && !defined(USART2_ASSIGNED) +#if defined(CONFIG_USART2_SERIALDRIVER) && !defined(USART2_ASSIGNED) # define TTYS8_DEV g_usart2port /* USART2 is ttyS8 */ # define USART2_ASSIGNED 1 -#elif defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#elif defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS8_DEV g_usart3port /* USART3 is ttyS8 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS8_DEV g_usart4port /* USART4 is ttyS8 */ # define USART4_ASSIGNED 1 #endif @@ -399,10 +399,10 @@ * USART3-4 could also be the console. */ -#if defined(CONFIG_USART3_ISUART) && !defined(USART3_ASSIGNED) +#if defined(CONFIG_USART3_SERIALDRIVER) && !defined(USART3_ASSIGNED) # define TTYS9_DEV g_usart3port /* USART3 is ttyS9 */ # define USART3_ASSIGNED 1 -#elif defined(CONFIG_USART4_ISUART) && !defined(USART4_ASSIGNED) +#elif defined(CONFIG_USART4_SERIALDRIVER) && !defined(USART4_ASSIGNED) # define TTYS9_DEV g_usart4port /* USART4 is ttyS9 */ # define USART4_ASSIGNED 1 #endif @@ -451,19 +451,19 @@ static int up_uart3_interrupt(int irq, void *context); #ifdef CONFIG_SAMA5_UART4 static int up_uart4_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER static int up_usart0_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART1_ISUART +#ifdef CONFIG_USART1_SERIALDRIVER static int up_usart1_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART2_ISUART +#ifdef CONFIG_USART2_SERIALDRIVER static int up_usart2_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART3_ISUART +#ifdef CONFIG_USART3_SERIALDRIVER static int up_usart3_interrupt(int irq, void *context); #endif -#ifdef CONFIG_USART4_ISUART +#ifdef CONFIG_USART4_SERIALDRIVER static int up_usart4_interrupt(int irq, void *context); #endif @@ -525,23 +525,23 @@ static char g_uart3txbuffer[CONFIG_UART3_TXBUFSIZE]; static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE]; static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE]; #endif -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER static char g_usart0rxbuffer[CONFIG_USART0_RXBUFSIZE]; static char g_usart0txbuffer[CONFIG_USART0_TXBUFSIZE]; #endif -#ifdef CONFIG_USART1_ISUART +#ifdef CONFIG_USART1_SERIALDRIVER static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE]; static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE]; #endif -#ifdef CONFIG_USART2_ISUART +#ifdef CONFIG_USART2_SERIALDRIVER static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE]; static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE]; #endif -#ifdef CONFIG_USART3_ISUART +#ifdef CONFIG_USART3_SERIALDRIVER static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE]; static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE]; #endif -#ifdef CONFIG_USART4_ISUART +#ifdef CONFIG_USART4_SERIALDRIVER static char g_usart4rxbuffer[CONFIG_USART4_RXBUFSIZE]; static char g_usart4txbuffer[CONFIG_USART4_TXBUFSIZE]; #endif @@ -753,7 +753,7 @@ static uart_dev_t g_uart4port = /* This describes the state of the USART0 port. */ -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER static struct up_dev_s g_usart0priv = { .handler = up_usart0_interrupt, @@ -787,7 +787,7 @@ static uart_dev_t g_usart0port = /* This describes the state of the USART1 port. */ -#ifdef CONFIG_USART1_ISUART +#ifdef CONFIG_USART1_SERIALDRIVER static struct up_dev_s g_usart1priv = { .handler = up_usart1_interrupt, @@ -821,7 +821,7 @@ static uart_dev_t g_usart1port = /* This describes the state of the USART2 port. */ -#ifdef CONFIG_USART2_ISUART +#ifdef CONFIG_USART2_SERIALDRIVER static struct up_dev_s g_usart2priv = { .handler = up_usart2_interrupt, @@ -855,7 +855,7 @@ static uart_dev_t g_usart2port = /* This describes the state of the USART3 port. */ -#ifdef CONFIG_USART3_ISUART +#ifdef CONFIG_USART3_SERIALDRIVER static struct up_dev_s g_usart3priv = { .handler = up_usart3_interrupt, @@ -889,7 +889,7 @@ static uart_dev_t g_usart3port = /* This describes the state of the USART4 port. */ -#ifdef CONFIG_USART4_ISUART +#ifdef CONFIG_USART4_SERIALDRIVER static struct up_dev_s g_usart4priv = { .handler = up_usart4_interrupt, @@ -1073,31 +1073,31 @@ static int up_uart4_interrupt(int irq, void *context) return up_interrupt(&g_uart4port); } #endif -#ifdef CONFIG_USART0_ISUART +#ifdef CONFIG_USART0_SERIALDRIVER static int up_usart0_interrupt(int irq, void *context) { return up_interrupt(&g_usart0port); } #endif -#ifdef CONFIG_USART1_ISUART +#ifdef CONFIG_USART1_SERIALDRIVER static int up_usart1_interrupt(int irq, void *context) { return up_interrupt(&g_usart1port); } #endif -#ifdef CONFIG_USART2_ISUART +#ifdef CONFIG_USART2_SERIALDRIVER static int up_usart2_interrupt(int irq, void *context) { return up_interrupt(&g_usart2port); } #endif -#ifdef CONFIG_USART3_ISUART +#ifdef CONFIG_USART3_SERIALDRIVER static int up_usart3_interrupt(int irq, void *context) { return up_interrupt(&g_usart3port); } #endif -#ifdef CONFIG_USART4_ISUART +#ifdef CONFIG_USART4_SERIALDRIVER static int up_usart4_interrupt(int irq, void *context) { return up_interrupt(&g_usart4port); diff --git a/arch/arm/src/sama5/sam_tickless.c b/arch/arm/src/sama5/sam_tickless.c index a785266a5dd..70cecb1217a 100644 --- a/arch/arm/src/sama5/sam_tickless.c +++ b/arch/arm/src/sama5/sam_tickless.c @@ -377,8 +377,8 @@ int up_timer_gettime(FAR struct timespec *ts) int up_timer_cancel(FAR struct timespec *ts) { - return ONESHOT_INITIALIZED(&g_tickless.oneshot) ? - sam_oneshot_cancel(&g_tickless.oneshot, ts) : + return ONESHOT_INITIALIZED(&g_tickless.oneshot) && FREERUN_INITIALIZED(&g_tickless.freerun) ? + sam_oneshot_cancel(&g_tickless.oneshot, &g_tickless.freerun, ts) : -EAGAIN; } @@ -410,7 +410,7 @@ int up_timer_cancel(FAR struct timespec *ts) int up_timer_start(FAR const struct timespec *ts) { return ONESHOT_INITIALIZED(&g_tickless.oneshot) ? - sam_oneshot_start(&g_tickless.oneshot, sam_oneshot_handler, NULL, ts) : + sam_oneshot_start(&g_tickless.oneshot, &g_tickless.freerun, sam_oneshot_handler, NULL, ts) : -EAGAIN; } #endif /* CONFIG_SCHED_TICKLESS */ diff --git a/arch/arm/src/sama5/sam_twi.c b/arch/arm/src/sama5/sam_twi.c index 8944de9ed4b..14df0f62a42 100644 --- a/arch/arm/src/sama5/sam_twi.c +++ b/arch/arm/src/sama5/sam_twi.c @@ -1200,6 +1200,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency) /* Set the initial TWI data transfer frequency */ + priv->frequency = 0; twi_setfrequency(priv, frequency); /* Enable Interrupts */ diff --git a/arch/arm/src/samdl/Kconfig b/arch/arm/src/samdl/Kconfig index 68ea979f909..a890db6a0fd 100644 --- a/arch/arm/src/samdl/Kconfig +++ b/arch/arm/src/samdl/Kconfig @@ -589,8 +589,7 @@ config SAMDL_SERCOM0_ISSPI config SAMDL_SERCOM0_ISUSART bool "USART" - select ARCH_HAVE_USART0 - select USART0_ISUART + select USART0_SERIALDRIVER endchoice @@ -623,8 +622,7 @@ config SAMDL_SERCOM1_ISSPI config SAMDL_SERCOM1_ISUSART bool "USART" - select ARCH_HAVE_USART1 - select USART1_ISUART + select USART1_SERIALDRIVER endchoice @@ -643,8 +641,7 @@ config SAMDL_SERCOM2_ISSPI config SAMDL_SERCOM2_ISUSART bool "USART" - select ARCH_HAVE_USART2 - select USART2_ISUART + select USART2_SERIALDRIVER endchoice @@ -663,8 +660,7 @@ config SAMDL_SERCOM3_ISSPI config SAMDL_SERCOM3_ISUSART bool "USART" - select ARCH_HAVE_USART3 - select USART3_ISUART + select USART3_SERIALDRIVER endchoice @@ -683,8 +679,7 @@ config SAMDL_SERCOM4_ISSPI config SAMDL_SERCOM4_ISUSART bool "USART" - select ARCH_HAVE_USART4 - select USART4_ISUART + select USART4_SERIALDRIVER endchoice @@ -703,8 +698,7 @@ config SAMDL_SERCOM5_ISSPI config SAMDL_SERCOM5_ISUSART bool "USART" - select ARCH_HAVE_USART5 - select USART5_ISUART + select USART5_SERIALDRIVER endchoice diff --git a/arch/arm/src/samdl/sam_config.h b/arch/arm/src/samdl/sam_config.h index 846e3291d31..db85694e5d2 100644 --- a/arch/arm/src/samdl/sam_config.h +++ b/arch/arm/src/samdl/sam_config.h @@ -56,7 +56,7 @@ #define SAMDL_HAVE_USART5 1 #if !defined(CONFIG_SAMDL_SERCOM0) || !defined(CONFIG_SAMDL_SERCOM0_ISUSART) || \ - !defined(CONFIG_USART0_ISUART) + !defined(CONFIG_USART0_SERIALDRIVER) # undef SAMDL_HAVE_USART0 # undef CONFIG_SAMDL_SERCOM0_ISUSART # undef CONFIG_USART0_SERIAL_CONSOLE @@ -66,7 +66,7 @@ #endif #if !defined(CONFIG_SAMDL_SERCOM1) || !defined(CONFIG_SAMDL_SERCOM1_ISUSART) || \ - !defined(CONFIG_USART1_ISUART) + !defined(CONFIG_USART1_SERIALDRIVER) # undef SAMDL_HAVE_USART1 # undef CONFIG_SAMDL_SERCOM1_ISUSART # undef CONFIG_USART1_SERIAL_CONSOLE @@ -76,7 +76,7 @@ #endif #if !defined(CONFIG_SAMDL_SERCOM2) || !defined(CONFIG_SAMDL_SERCOM2_ISUSART) || \ - !defined(CONFIG_USART2_ISUART) + !defined(CONFIG_USART2_SERIALDRIVER) # undef SAMDL_HAVE_USART2 # undef CONFIG_SAMDL_SERCOM2_ISUSART # undef CONFIG_USART2_SERIAL_CONSOLE @@ -86,7 +86,7 @@ #endif #if !defined(CONFIG_SAMDL_SERCOM3) || !defined(CONFIG_SAMDL_SERCOM3_ISUSART) || \ - !defined(CONFIG_USART3_ISUART) + !defined(CONFIG_USART3_SERIALDRIVER) # undef SAMDL_HAVE_USART3 # undef CONFIG_SAMDL_SERCOM3_ISUSART # undef CONFIG_USART3_SERIAL_CONSOLE @@ -96,7 +96,7 @@ #endif #if !defined(CONFIG_SAMDL_SERCOM4) || !defined(CONFIG_SAMDL_SERCOM4_ISUSART) || \ - !defined(CONFIG_USART4_ISUART) + !defined(CONFIG_USART4_SERIALDRIVER) # undef SAMDL_HAVE_USART4 # undef CONFIG_SAMDL_SERCOM4_ISUSART # undef CONFIG_USART4_SERIAL_CONSOLE @@ -106,7 +106,7 @@ #endif #if !defined(CONFIG_SAMDL_SERCOM5) || !defined(CONFIG_SAMDL_SERCOM5_ISUSART) || \ - !defined(CONFIG_USART5_ISUART) + !defined(CONFIG_USART5_SERIALDRIVER) # undef SAMDL_HAVE_USART5 # undef CONFIG_SAMDL_SERCOM5_ISUSART # undef CONFIG_USART5_SERIAL_CONSOLE diff --git a/arch/arm/src/samv7/Kconfig b/arch/arm/src/samv7/Kconfig index 61186d7b20b..7a7d75c8408 100644 --- a/arch/arm/src/samv7/Kconfig +++ b/arch/arm/src/samv7/Kconfig @@ -465,31 +465,31 @@ config SAMV7_TWIHS2 config SAMV7_UART0 bool "UART 0" default y - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMV7_UART1 bool "UART 1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMV7_UART2 bool "UART 2" default y - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMV7_UART3 bool "UART 3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMV7_UART4 bool "UART 4" default y - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMV7_USBDEVFS @@ -520,21 +520,21 @@ config SAMV7_USART0 bool "USART 0" default n depends on SAMV7_HAVE_USART0 - select ARCH_HAVE_USART0 + select USART0_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMV7_USART1 bool "USART 1" default n depends on SAMV7_HAVE_USART1 - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMV7_USART2 bool "USART 2" default n depends on SAMV7_HAVE_USART2 - select ARCH_HAVE_USART2 + select USART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config SAMV7_WDT @@ -618,6 +618,28 @@ config SAMV7_ERASE_ENABLE endchoice +menuconfig SAMV7_SYSTEMRESET + bool "Enable System Reset" + select ARCH_HAVE_RESET + ---help--- + Enable up_systemreset + +if SAMV7_SYSTEMRESET + +config SAMV7_EXTRESET_ERST + int "Drive External nRST duration" + default 0 + range 0 16 + ---help--- + Define if the external reset (nRST) will be generated in up_systemreset + and for how long: + + - A value of 0 will not drive the external reset + - A value of 1-6 will drive the external reset for 2^SAMV7_EXTRESET_ERST + slow clock cycles. + +endif # SAMV7_SYSTEMRESET + menuconfig SAMV7_GPIO_IRQ bool "GPIO pin interrupts" ---help--- @@ -1492,6 +1514,7 @@ endif # SAMV7_TC3 config SAMV7_ONESHOT bool "TC one-shot wrapper" + depends on SAMV7_FREERUN default n if !SCHED_TICKLESS default y if SCHED_TICKLESS ---help--- diff --git a/arch/arm/src/samv7/Make.defs b/arch/arm/src/samv7/Make.defs index 5d3dfc437bd..fbd88a6e7f4 100644 --- a/arch/arm/src/samv7/Make.defs +++ b/arch/arm/src/samv7/Make.defs @@ -150,6 +150,10 @@ ifeq ($(CONFIG_SAMV7_RSWDT),y) CHIP_CSRCS += sam_rswdt.c endif +ifeq ($(CONFIG_SAMV7_SYSTEMRESET),y) +CHIP_CSRCS += sam_systemreset.c +endif + ifeq ($(CONFIG_SAMV7_SPI_MASTER),y) CHIP_CSRCS += sam_spi.c endif diff --git a/arch/arm/src/samv7/sam_config.h b/arch/arm/src/samv7/sam_config.h index 242c2eb5037..05e6db84f11 100644 --- a/arch/arm/src/samv7/sam_config.h +++ b/arch/arm/src/samv7/sam_config.h @@ -113,19 +113,19 @@ * enabled for our purposes. */ -#if !defined(CONFIG_USART0_ISUART) && !defined(CONFIG_USART0_ISSPI) +#if !defined(CONFIG_USART0_SERIALDRIVER) && !defined(CONFIG_USART0_ISSPI) # undef CONFIG_SAMV7_USART0 # undef CONFIG_USART0_SERIAL_CONSOLE # undef CONFIG_USART0_IFLOWCONTROL #endif -#if !defined(CONFIG_USART1_ISUART) && !defined(CONFIG_USART1_ISSPI) +#if !defined(CONFIG_USART1_SERIALDRIVER) && !defined(CONFIG_USART1_ISSPI) # undef CONFIG_SAMV7_USART1 # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART1_IFLOWCONTROL #endif -#if !defined(CONFIG_USART2_ISUART) && !defined(CONFIG_USART2_ISSPI) +#if !defined(CONFIG_USART2_SERIALDRIVER) && !defined(CONFIG_USART2_ISSPI) # undef CONFIG_SAMV7_USART2 # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART2_IFLOWCONTROL diff --git a/arch/arm/src/samv7/sam_mcan.c b/arch/arm/src/samv7/sam_mcan.c index f1f8f788a2f..f7b9e31592b 100644 --- a/arch/arm/src/samv7/sam_mcan.c +++ b/arch/arm/src/samv7/sam_mcan.c @@ -2905,6 +2905,7 @@ static bool mcan_txempty(FAR struct can_dev_s *dev) regval = mcan_getreg(priv, SAM_MCAN_TXFQS_OFFSET); if (((regval & MCAN_TXFQS_TFQF) != 0)) { + mcan_dev_unlock(priv); return false; } diff --git a/arch/arm/src/samv7/sam_oneshot.c b/arch/arm/src/samv7/sam_oneshot.c index 34fa89843e3..76c4ee1a41b 100644 --- a/arch/arm/src/samv7/sam_oneshot.c +++ b/arch/arm/src/samv7/sam_oneshot.c @@ -60,6 +60,7 @@ #include #include "sam_oneshot.h" +#include "sam_freerun.h" #ifdef CONFIG_SAMV7_ONESHOT @@ -124,10 +125,11 @@ static void sam_oneshot_handler(TC_HANDLE tch, void *arg, uint32_t sr) /* Forward the event, clearing out any vestiges */ - oneshot_handler = (oneshot_handler_t)oneshot->handler; - oneshot->handler = NULL; - oneshot_arg = (void *)oneshot->arg; - oneshot->arg = NULL; + oneshot_handler = (oneshot_handler_t)oneshot->handler; + oneshot->handler = NULL; + oneshot_arg = (void *)oneshot->arg; + oneshot->arg = NULL; + oneshot->start_count = 0; oneshot_handler(oneshot_arg); } @@ -224,10 +226,11 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * success. */ - oneshot->chan = chan; - oneshot->running = false; - oneshot->handler = NULL; - oneshot->arg = NULL; + oneshot->chan = chan; + oneshot->running = false; + oneshot->handler = NULL; + oneshot->arg = NULL; + oneshot->start_count = 0; return OK; } @@ -251,8 +254,8 @@ int sam_oneshot_initialize(struct sam_oneshot_s *oneshot, int chan, * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, - void *arg, const struct timespec *ts) +int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, const struct timespec *ts) { uint64_t usec; uint64_t regval; @@ -270,7 +273,7 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, /* Yes.. then cancel it */ tcvdbg("Already running... cancelling\n"); - (void)sam_oneshot_cancel(oneshot, NULL); + (void)sam_oneshot_cancel(oneshot, freerun, NULL); } /* Save the new handler and its argument */ @@ -309,6 +312,26 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, sam_tc_start(oneshot->tch); + /* The function sam_tc_start() starts the timer/counter by setting the + * bits TC_CCR_CLKEN and TC_CCR_SWTRG in the channel control register. + * The first one enables the timer/counter the latter performs an + * software trigger, which starts the clock and sets the counter + * register to zero. This reset is performed with the next valid edge + * of the selected clock. Thus it can take up USEC_PER_TICK microseconds + * until the counter register becomes zero. + * + * If the timer is canceled within this period the counter register holds + * the counter value for the last timer/counter run. To circumvent this + * the counter value of the freerun timer/counter is stored at each start + * of the oneshot timer/counter. + * + * The function up_timer_gettime() could also be used for this but it takes + * too long. If up_timer_gettime() is called within this function the problem + * vanishes at least if compiled with no optimisation. + */ + + oneshot->start_count = sam_tc_getcounter(freerun->tch); + /* Enable interrupts. We should get the callback when the interrupt * occurs. */ @@ -343,7 +366,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + struct timespec *ts) { irqstate_t flags; uint64_t usec; @@ -384,6 +408,17 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) count = sam_tc_getcounter(oneshot->tch); rc = sam_tc_getregister(oneshot->tch, TC_REGC); + /* In the case the timer/counter was canceled very short after its start, + * the counter register can hold the wrong value (the value of the last + * run). To prevent this the counter value is set to zero if not at + * least on tick passed since the start of the timer/counter. + */ + + if (count > 0 && sam_tc_getcounter(freerun->tch) == oneshot->start_count) + { + count = 0; + } + /* Now we can disable the interrupt and stop the timer. */ sam_tc_attach(oneshot->tch, NULL, NULL, 0); @@ -432,6 +467,14 @@ int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts) usec = (((uint64_t)(rc - count)) * USEC_PER_SEC) / sam_tc_divfreq(oneshot->tch); + /* Each time the timer/counter is canceled the time calculated from + * the two registers (counter and REGC) is accurate up to an error + * between 0 and USEC_PER_TICK microseconds. To correct this error + * one tick which means USEC_PER_TICK microseconds are subtracted. + */ + + usec = usec > USEC_PER_TICK ? usec - USEC_PER_TICK : 0; + /* Return the time remaining in the correct form */ sec = usec / USEC_PER_SEC; diff --git a/arch/arm/src/samv7/sam_oneshot.h b/arch/arm/src/samv7/sam_oneshot.h index 62efde8047d..6c4e42337f1 100644 --- a/arch/arm/src/samv7/sam_oneshot.h +++ b/arch/arm/src/samv7/sam_oneshot.h @@ -46,6 +46,7 @@ #include #include "sam_tc.h" +#include "sam_freerun.h" #ifdef CONFIG_SAMV7_ONESHOT @@ -82,6 +83,11 @@ struct sam_oneshot_s volatile oneshot_handler_t handler; /* Oneshot expiration callback */ volatile void *arg; /* The argument that will accompany * the callback */ + volatile uint32_t start_count; /* Stores the value of the freerun counter, + * at each start of the onshot timer. Is neccesary + * to find out if the onshot counter was updated + * correctly at the time of the call to + * sam_oneshot_cancel or not. */ }; /**************************************************************************** @@ -157,6 +163,9 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to * sam_oneshot_initialize(); + * freerun Caller allocated instance of the freerun state structure. This + * structure must have been previously initialized via a call to + * sam_freerun_initialize(); * handler The function to call when when the oneshot timer expires. * arg An opaque argument that will accompany the callback. * ts Provides the duration of the one shot timer. @@ -167,8 +176,8 @@ int sam_oneshot_max_delay(struct sam_oneshot_s *oneshot, uint64_t *usec); * ****************************************************************************/ -int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, - void *arg, const struct timespec *ts); +int sam_oneshot_start(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + oneshot_handler_t handler, void *arg, const struct timespec *ts); /**************************************************************************** * Name: sam_oneshot_cancel @@ -183,6 +192,9 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * oneshot Caller allocated instance of the oneshot state structure. This * structure must have been previously initialized via a call to * sam_oneshot_initialize(); + * freerun Caller allocated instance of the freerun state structure. This + * structure must have been previously initialized via a call to + * sam_freerun_initialize(); * ts The location in which to return the time remaining on the * oneshot timer. A time of zero is returned if the timer is * not running. @@ -194,7 +206,8 @@ int sam_oneshot_start(struct sam_oneshot_s *oneshot, oneshot_handler_t handler, * ****************************************************************************/ -int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct timespec *ts); +int sam_oneshot_cancel(struct sam_oneshot_s *oneshot, struct sam_freerun_s *freerun, + struct timespec *ts); #undef EXTERN #ifdef __cplusplus diff --git a/arch/arm/src/samv7/sam_serial.c b/arch/arm/src/samv7/sam_serial.c index bb7827ea636..6744a72ce2e 100644 --- a/arch/arm/src/samv7/sam_serial.c +++ b/arch/arm/src/samv7/sam_serial.c @@ -123,13 +123,13 @@ # elif defined(CONFIG_SAMV7_UART4) # define TTYS0_DEV g_uart4port /* UART4 is ttyS0 */ # define UART4_ASSIGNED 1 -# elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) +# elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) # define TTYS0_DEV g_usart0port /* USART0 is ttyS0 */ # define USART0_ASSIGNED 1 -# elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) +# elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) # define TTYS0_DEV g_usart1port /* USART1 is ttyS0 */ # define USART1_ASSIGNED 1 -# elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) +# elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) # define TTYS0_DEV g_usart2port /* USART2 is ttyS0 */ # define USART2_ASSIGNED 1 # endif @@ -154,15 +154,15 @@ #elif defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED) # define TTYS1_DEV g_uart4port /* UART4 is ttyS1 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \ !defined(USART0_ASSIGNED) # define TTYS1_DEV g_usart0port /* USART0 is ttyS1 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \ !defined(USART1_ASSIGNED) # define TTYS1_DEV g_usart1port /* USART1 is ttyS1 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \ !defined(USART2_ASSIGNED) # define TTYS1_DEV g_usart2port /* USART2 is ttyS1 */ # define USART2_ASSIGNED 1 @@ -185,15 +185,15 @@ #elif defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED) # define TTYS2_DEV g_uart4port /* UART4 is ttyS2 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \ !defined(USART0_ASSIGNED) # define TTYS2_DEV g_usart0port /* USART0 is ttyS2 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \ !defined(USART1_ASSIGNED) # define TTYS2_DEV g_usart1port /* USART1 is ttyS2 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \ !defined(USART2_ASSIGNED) # define TTYS2_DEV g_usart2port /* USART2 is ttyS2 */ # define USART2_ASSIGNED 1 @@ -213,15 +213,15 @@ #elif defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED) # define TTYS3_DEV g_uart4port /* UART4 is ttyS3 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \ !defined(USART0_ASSIGNED) # define TTYS3_DEV g_usart0port /* USART0 is ttyS3 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \ !defined(USART1_ASSIGNED) # define TTYS3_DEV g_usart1port /* USART1 is ttyS3 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \ !defined(USART2_ASSIGNED) # define TTYS3_DEV g_usart2port /* USART2 is ttyS3 */ # define USART2_ASSIGNED 1 @@ -238,15 +238,15 @@ #elif defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED) # define TTYS4_DEV g_uart4port /* UART4 is ttyS4 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \ !defined(USART0_ASSIGNED) # define TTYS4_DEV g_usart0port /* USART0 is ttyS4 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \ !defined(USART1_ASSIGNED) # define TTYS4_DEV g_usart1port /* USART1 is ttyS4 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \ !defined(USART2_ASSIGNED) # define TTYS4_DEV g_usart2port /* USART2 is ttyS4 */ # define USART2_ASSIGNED 1 @@ -260,15 +260,15 @@ #if defined(CONFIG_SAMV7_UART4) && !defined(UART4_ASSIGNED) # define TTYS5_DEV g_uart4port /* UART4 is ttyS5 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \ !defined(USART0_ASSIGNED) # define TTYS5_DEV g_usart0port /* USART0 is ttyS5 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \ !defined(USART1_ASSIGNED) # define TTYS5_DEV g_usart1port /* USART1 is ttyS5 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \ !defined(USART2_ASSIGNED) # define TTYS5_DEV g_usart2port /* USART2 is ttyS5 */ # define USART2_ASSIGNED 1 @@ -279,15 +279,15 @@ * One of USART0-2 could also be the console. */ -#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) && \ +#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) && \ !defined(USART0_ASSIGNED) # define TTYS6_DEV g_usart0port /* USART0 is ttyS6 */ # define USART0_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \ !defined(USART1_ASSIGNED) # define TTYS6_DEV g_usart1port /* USART1 is ttyS6 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \ !defined(USART2_ASSIGNED) # define TTYS6_DEV g_usart2port /* USART2 is ttyS6 */ # define USART2_ASSIGNED 1 @@ -298,11 +298,11 @@ * One of of USART1-2 could also be the console. */ -#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) && \ +#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) && \ !defined(USART1_ASSIGNED) # define TTYS7_DEV g_usart1port /* USART1 is ttyS7 */ # define USART1_ASSIGNED 1 -#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) && \ +#elif defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) && \ !defined(USART2_ASSIGNED) # define TTYS7_DEV g_usart2port /* USART2 is ttyS7 */ # define USART2_ASSIGNED 1 @@ -369,13 +369,13 @@ static int sam_uart3_interrupt(int irq, void *context); #ifdef CONFIG_SAMV7_UART4 static int sam_uart4_interrupt(int irq, void *context); #endif -#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) +#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) static int sam_usart0_interrupt(int irq, void *context); #endif -#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) +#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) static int sam_usart1_interrupt(int irq, void *context); #endif -#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) +#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) static int sam_usart2_interrupt(int irq, void *context); #endif static int sam_ioctl(struct file *filep, int cmd, unsigned long arg); @@ -432,15 +432,15 @@ static char g_uart3txbuffer[CONFIG_UART3_TXBUFSIZE]; static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE]; static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE]; #endif -#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) +#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) static char g_usart0rxbuffer[CONFIG_USART0_RXBUFSIZE]; static char g_usart0txbuffer[CONFIG_USART0_TXBUFSIZE]; #endif -#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) +#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE]; static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE]; #endif -#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) +#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE]; static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE]; #endif @@ -602,7 +602,7 @@ static uart_dev_t g_uart4port = /* This describes the state of the USART0 port. */ -#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) +#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) static struct sam_dev_s g_usart0priv = { .usartbase = SAM_USART0_BASE, @@ -636,7 +636,7 @@ static uart_dev_t g_usart0port = /* This describes the state of the USART1 port. */ -#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) +#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) static struct sam_dev_s g_usart1priv = { .usartbase = SAM_USART1_BASE, @@ -670,7 +670,7 @@ static uart_dev_t g_usart1port = /* This describes the state of the USART2 port. */ -#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) +#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) static struct sam_dev_s g_usart2priv = { .usartbase = SAM_USART2_BASE, @@ -1115,19 +1115,19 @@ static int sam_uart4_interrupt(int irq, void *context) * ****************************************************************************/ -#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_ISUART) +#if defined(CONFIG_SAMV7_USART0) && defined(CONFIG_USART0_SERIALDRIVER) static int sam_usart0_interrupt(int irq, void *context) { return sam_interrupt(&g_usart0port); } #endif -#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_ISUART) +#if defined(CONFIG_SAMV7_USART1) && defined(CONFIG_USART1_SERIALDRIVER) static int sam_usart1_interrupt(int irq, void *context) { return sam_interrupt(&g_usart1port); } #endif -#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_ISUART) +#if defined(CONFIG_SAMV7_USART2) && defined(CONFIG_USART2_SERIALDRIVER) static int sam_usart2_interrupt(int irq, void *context) { return sam_interrupt(&g_usart2port); diff --git a/arch/arm/src/kl/kl_lowgetc.h b/arch/arm/src/samv7/sam_systemreset.c similarity index 65% rename from arch/arm/src/kl/kl_lowgetc.h rename to arch/arm/src/samv7/sam_systemreset.c index 4ed52365a2a..fbc9f19daf2 100644 --- a/arch/arm/src/kl/kl_lowgetc.h +++ b/arch/arm/src/samv7/sam_systemreset.c @@ -1,8 +1,9 @@ -/************************************************************************************ - * arch/arm/src/kl/kl_lowgetc.h +/**************************************************************************** + * arch/arm/src/samv7/sam_systemreset.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -31,52 +32,59 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ************************************************************************************/ + ****************************************************************************/ -#ifndef __ARCH_ARM_SRC_KL_KINETIS_LOWGETC_H -#define __ARCH_ARM_SRC_KL_KINETIS_LOWGETC_H - -/************************************************************************************ +/**************************************************************************** * Included Files - ************************************************************************************/ + ****************************************************************************/ #include -#include "kl_config.h" -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ +#include +#include -/************************************************************************************ - * Public Types - ************************************************************************************/ +#include +#include -/************************************************************************************ - * Public Data - ************************************************************************************/ +#include "up_arch.h" +#include "chip/sam_rstc.h" -#ifndef __ASSEMBLY__ +#ifdef CONFIG_SAMV7_SYSTEMRESET -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" +/**************************************************************************** + * Public functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_systemreset + * + * Description: + * Internal reset logic. + * + ****************************************************************************/ + +void up_systemreset(void) { -#else -#define EXTERN extern + uint32_t rstcr; +#if defined(CONFIG_SAMV7_EXTRESET_ERST) && CONFIG_SAMV7_EXTRESET_ERST != 0 + uint32_t rstmr; #endif -/************************************************************************************ - * Public Functions - ************************************************************************************/ + rstcr = (RSTC_CR_PROCRST | RSTC_CR_KEY); -#ifdef HAVE_SERIAL_CONSOLE -int kl_lowgetc(void); +#if defined(CONFIG_SAMV7_EXTRESET_ERST) && CONFIG_SAMV7_EXTRESET_ERST != 0 + rstcr |= RSTC_CR_EXTRST; + + rstmr = getreg32(SAM_RSTC_MR); + rstmr &= ~RSTC_MR_ERSTL_MASK; + rstmr &= RSTC_MR_ERSTL(CONFIG_SAMV7_EXTRESET_ERST-1) | RSTC_MR_KEY; + putreg32(rstmr, SAM_RSTC_MR); #endif -#undef EXTERN -#if defined(__cplusplus) + putreg32(rstcr, SAM_RSTC_CR); + + /* Wait for the reset */ + + for (; ; ); } -#endif -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_KL_KINETIS_LOWGETC_H */ +#endif /* CONFIG_SAMV7_SYSTEMRESET */ diff --git a/arch/arm/src/samv7/sam_tickless.c b/arch/arm/src/samv7/sam_tickless.c index 33cbc948c1b..3d1a7ad95ac 100644 --- a/arch/arm/src/samv7/sam_tickless.c +++ b/arch/arm/src/samv7/sam_tickless.c @@ -363,8 +363,8 @@ int up_timer_gettime(FAR struct timespec *ts) int up_timer_cancel(FAR struct timespec *ts) { - return ONESHOT_INITIALIZED(&g_tickless.oneshot) ? - sam_oneshot_cancel(&g_tickless.oneshot, ts) : + return ONESHOT_INITIALIZED(&g_tickless.oneshot) && FREERUN_INITIALIZED(&g_tickless.freerun) ? + sam_oneshot_cancel(&g_tickless.oneshot, &g_tickless.freerun, ts) : -EAGAIN; } @@ -396,7 +396,7 @@ int up_timer_cancel(FAR struct timespec *ts) int up_timer_start(FAR const struct timespec *ts) { return ONESHOT_INITIALIZED(&g_tickless.oneshot) ? - sam_oneshot_start(&g_tickless.oneshot, sam_oneshot_handler, NULL, ts) : + sam_oneshot_start(&g_tickless.oneshot, &g_tickless.freerun, sam_oneshot_handler, NULL, ts) : -EAGAIN; } #endif /* CONFIG_SCHED_TICKLESS */ diff --git a/arch/arm/src/samv7/sam_twihs.c b/arch/arm/src/samv7/sam_twihs.c index f11ae78cbb3..fa5a8b2a525 100644 --- a/arch/arm/src/samv7/sam_twihs.c +++ b/arch/arm/src/samv7/sam_twihs.c @@ -1230,6 +1230,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, uint32_t frequency) /* Set the initial TWIHS data transfer frequency */ + priv->frequency = 0; twi_setfrequency(priv, frequency); /* Enable Interrupts */ diff --git a/arch/arm/src/samv7/sam_usbdevhs.c b/arch/arm/src/samv7/sam_usbdevhs.c index 80bf1619c59..de6872e92ee 100644 --- a/arch/arm/src/samv7/sam_usbdevhs.c +++ b/arch/arm/src/samv7/sam_usbdevhs.c @@ -3259,15 +3259,6 @@ static void sam_suspend(struct sam_usbdev_s *priv) priv->prevstate = priv->devstate; priv->devstate = USBHS_DEVSTATE_SUSPENDED; - /* Disable clocking to the USBHS peripheral - * - * NOTE: The Atmel sample code disables USB clocking here (via the PMC - * CKGR_UCKR). However, we cannot really do that here because that - * clocking is also needed by the UHPHS host. - */ - - sam_usbhs_disableclk(); - /* Let the board-specific logic know that we have entered the * suspend state. This may trigger additional reduced power * consumption measures. diff --git a/arch/arm/src/stm32/Kconfig b/arch/arm/src/stm32/Kconfig index 4c7ed9fa2a4..a9b89773ead 100644 --- a/arch/arm/src/stm32/Kconfig +++ b/arch/arm/src/stm32/Kconfig @@ -484,6 +484,16 @@ config ARCH_CHIP_STM32F105VB select STM32_HAVE_I2C2 select STM32_HAVE_TIM4 +config ARCH_CHIP_STM32F105RB + bool "STM32F105RB" + select ARCH_CORTEXM3 + select STM32_STM32F10XX + select STM32_CONNECTIVITYLINE + select STM32_HAVE_DAC1 + select STM32_HAVE_DAC2 + select STM32_HAVE_I2C2 + select STM32_HAVE_TIM4 + config ARCH_CHIP_STM32F107VC bool "STM32F107VC" select ARCH_CORTEXM3 @@ -1182,7 +1192,6 @@ config STM32_VALUELINE select STM32_HAVE_TIM15 select STM32_HAVE_TIM16 select STM32_HAVE_TIM17 - select STM32_HAVE_ADC2 select STM32_HAVE_SPI2 if STM32_HIGHDENSITY select STM32_HAVE_SPI3 if STM32_HIGHDENSITY @@ -2160,63 +2169,47 @@ config STM32_TSC config STM32_USART1 bool "USART1" default n - select ARCH_HAVE_USART1 - select ARCH_HAVE_SERIAL_TERMIOS select STM32_USART config STM32_USART2 bool "USART2" default n - select ARCH_HAVE_USART2 - select ARCH_HAVE_SERIAL_TERMIOS select STM32_USART config STM32_USART3 bool "USART3" default n depends on STM32_HAVE_USART3 - select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_USART3 select STM32_USART config STM32_UART4 bool "UART4" default n depends on STM32_HAVE_UART4 - select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART4 select STM32_USART config STM32_UART5 bool "UART5" default n depends on STM32_HAVE_UART5 - select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART5 select STM32_USART config STM32_USART6 bool "USART6" default n depends on STM32_HAVE_USART6 - select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_USART6 select STM32_USART config STM32_UART7 bool "UART7" default n depends on STM32_HAVE_UART7 - select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART7 select STM32_USART config STM32_UART8 bool "UART8" default n depends on STM32_HAVE_UART8 - select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART8 select STM32_USART config STM32_USB @@ -2549,6 +2542,8 @@ config STM32_FSMC_SRAM ---help--- In addition to internal SRAM, SRAM may also be available through the FSMC. +menu "Timer Configuration" + config STM32_TIM1_PWM bool "TIM1 PWM" default n @@ -5316,6 +5311,8 @@ config STM32_TIM14_CAP Timer devices may be used for different purposes. One special purpose is to capture input. +endmenu # Timer Configuration + menu "ADC Configuration" depends on STM32_ADC @@ -5414,13 +5411,39 @@ endmenu config STM32_USART bool +config STM32_SERIALDRIVER + bool + +config STM32_1WIREDRIVER + bool + menu "U[S]ART Configuration" depends on STM32_USART +comment "U[S]ART Device Configuration" + +choice + prompt "USART1 Driver Configuration" + default STM32_USART1_SERIALDRIVER + depends on STM32_USART1 + +config STM32_USART1_SERIALDRIVER + bool "Standard serial driver" + select USART1_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + select STM32_SERIALDRIVER + +config STM32_USART1_1WIREDRIVER + bool "1-Wire driver" + select STM32_1WIREDRIVER + +endchoice # USART1 Driver Configuration + +if STM32_USART1_SERIALDRIVER + config USART1_RS485 bool "RS-485 on USART1" default n - depends on STM32_USART1 ---help--- Enable RS-485 interface on USART1. Your board config will have to provide GPIO_USART1_RS485_DIR pin definition. Currently it cannot be @@ -5438,14 +5461,34 @@ config USART1_RS485_DIR_POLARITY config USART1_RXDMA bool "USART1 Rx DMA" default n - depends on STM32_USART1 && (((STM32_STM32F10XX || STM32_STM32L15XX) && STM32_DMA1) || (!STM32_STM32F10XX && STM32_DMA2)) + depends on (((STM32_STM32F10XX || STM32_STM32L15XX) && STM32_DMA1) || (!STM32_STM32F10XX && STM32_DMA2)) ---help--- In high data rate usage, Rx DMA may eliminate Rx overrun errors +endif # STM32_USART1_SERIALDRIVER + +choice + prompt "USART2 Driver Configuration" + default STM32_USART2_SERIALDRIVER + depends on STM32_USART2 + +config STM32_USART2_SERIALDRIVER + bool "Standard serial driver" + select USART2_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + select STM32_SERIALDRIVER + +config STM32_USART2_1WIREDRIVER + bool "1-Wire driver" + select STM32_1WIREDRIVER + +endchoice # USART2 Driver Configuration + +if STM32_USART2_SERIALDRIVER + config USART2_RS485 bool "RS-485 on USART2" default n - depends on STM32_USART2 ---help--- Enable RS-485 interface on USART2. Your board config will have to provide GPIO_USART2_RS485_DIR pin definition. Currently it cannot be @@ -5463,14 +5506,34 @@ config USART2_RS485_DIR_POLARITY config USART2_RXDMA bool "USART2 Rx DMA" default n - depends on STM32_USART2 && STM32_DMA1 + depends on STM32_DMA1 ---help--- In high data rate usage, Rx DMA may eliminate Rx overrun errors +endif # STM32_USART2_SERIALDRIVER + +choice + prompt "USART3 Driver Configuration" + default STM32_USART3_SERIALDRIVER + depends on STM32_USART3 + +config STM32_USART3_SERIALDRIVER + bool "Standard serial driver" + select USART3_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + select STM32_SERIALDRIVER + +config STM32_USART3_1WIREDRIVER + bool "1-Wire driver" + select STM32_1WIREDRIVER + +endchoice # USART3 Driver Configuration + +if STM32_USART3_SERIALDRIVER + config USART3_RS485 bool "RS-485 on USART3" default n - depends on STM32_USART3 ---help--- Enable RS-485 interface on USART3. Your board config will have to provide GPIO_USART3_RS485_DIR pin definition. Currently it cannot be @@ -5488,14 +5551,34 @@ config USART3_RS485_DIR_POLARITY config USART3_RXDMA bool "USART3 Rx DMA" default n - depends on STM32_USART3 && STM32_DMA1 + depends on STM32_DMA1 ---help--- In high data rate usage, Rx DMA may eliminate Rx overrun errors +endif # STM32_USART3_SERIALDRIVER + +choice + prompt "UART4 Driver Configuration" + default STM32_UART4_SERIALDRIVER + depends on STM32_UART4 + +config STM32_UART4_SERIALDRIVER + bool "Standard serial driver" + select UART4_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + select STM32_SERIALDRIVER + +config STM32_UART4_1WIREDRIVER + bool "1-Wire driver" + select STM32_1WIREDRIVER + +endchoice # UART1 Driver Configuration + +if STM32_UART4_SERIALDRIVER + config UART4_RS485 bool "RS-485 on UART4" default n - depends on STM32_UART4 ---help--- Enable RS-485 interface on UART4. Your board config will have to provide GPIO_UART4_RS485_DIR pin definition. Currently it cannot be @@ -5513,14 +5596,34 @@ config UART4_RS485_DIR_POLARITY config UART4_RXDMA bool "UART4 Rx DMA" default n - depends on STM32_UART4 && STM32_DMA1 + depends on STM32_DMA1 ---help--- In high data rate usage, Rx DMA may eliminate Rx overrun errors +endif # STM32_UART4_SERIALDRIVER + +choice + prompt "UART5 Driver Configuration" + default STM32_UART5_SERIALDRIVER + depends on STM32_UART5 + +config STM32_UART5_SERIALDRIVER + bool "Standard serial driver" + select UART5_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + select STM32_SERIALDRIVER + +config STM32_UART5_1WIREDRIVER + bool "1-Wire driver" + select STM32_1WIREDRIVER + +endchoice # UART5 Driver Configuration + +if STM32_UART5_SERIALDRIVER + config UART5_RS485 bool "RS-485 on UART5" default n - depends on STM32_UART5 ---help--- Enable RS-485 interface on UART5. Your board config will have to provide GPIO_UART5_RS485_DIR pin definition. Currently it cannot be @@ -5538,14 +5641,34 @@ config UART5_RS485_DIR_POLARITY config UART5_RXDMA bool "UART5 Rx DMA" default n - depends on STM32_UART5 && STM32_DMA1 + depends on STM32_DMA1 ---help--- In high data rate usage, Rx DMA may eliminate Rx overrun errors +endif # STM32_UART5_SERIALDRIVER + +choice + prompt "USART6 Driver Configuration" + default STM32_USART6_SERIALDRIVER + depends on STM32_USART6 + +config STM32_USART6_SERIALDRIVER + bool "Standard serial driver" + select USART6_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + select STM32_SERIALDRIVER + +config STM32_USART6_1WIREDRIVER + bool "1-Wire driver" + select STM32_1WIREDRIVER + +endchoice # USART6 Driver Configuration + +if STM32_USART6_SERIALDRIVER + config USART6_RS485 bool "RS-485 on USART6" default n - depends on STM32_USART6 ---help--- Enable RS-485 interface on USART6. Your board config will have to provide GPIO_USART6_RS485_DIR pin definition. Currently it cannot be @@ -5563,14 +5686,34 @@ config USART6_RS485_DIR_POLARITY config USART6_RXDMA bool "USART6 Rx DMA" default n - depends on STM32_USART6 && STM32_DMA2 + depends on STM32_DMA2 ---help--- In high data rate usage, Rx DMA may eliminate Rx overrun errors +endif # STM32_USART6_SERIALDRIVER + +choice + prompt "UART7 Driver Configuration" + default STM32_UART7_SERIALDRIVER + depends on STM32_UART7 + +config STM32_UART7_SERIALDRIVER + bool "Standard serial driver" + select UART7_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + select STM32_SERIALDRIVER + +config STM32_UART7_1WIREDRIVER + bool "1-Wire driver" + select STM32_1WIREDRIVER + +endchoice # UART7 Driver Configuration + +if STM32_UART7_SERIALDRIVER + config UART7_RS485 bool "RS-485 on UART7" default n - depends on STM32_UART7 ---help--- Enable RS-485 interface on UART7. Your board config will have to provide GPIO_UART7_RS485_DIR pin definition. Currently it cannot be @@ -5588,14 +5731,34 @@ config UART7_RS485_DIR_POLARITY config UART7_RXDMA bool "UART7 Rx DMA" default n - depends on STM32_UART7 && STM32_DMA2 + depends on STM32_DMA2 ---help--- In high data rate usage, Rx DMA may eliminate Rx overrun errors +endif # STM32_UART7_SERIALDRIVER + +choice + prompt "UART8 Driver Configuration" + default STM32_UART8_SERIALDRIVER + depends on STM32_UART7 + +config STM32_UART8_SERIALDRIVER + bool "Standard serial driver" + select UART8_SERIALDRIVER + select ARCH_HAVE_SERIAL_TERMIOS + select STM32_SERIALDRIVER + +config STM32_UART8_1WIREDRIVER + bool "1-Wire driver" + select STM32_1WIREDRIVER + +endchoice # UART8 Driver Configuration + +if STM32_UART8_SERIALDRIVER + config UART8_RS485 bool "RS-485 on UART8" default n - depends on STM32_UART8 ---help--- Enable RS-485 interface on UART8. Your board config will have to provide GPIO_UART8_RS485_DIR pin definition. Currently it cannot be @@ -5613,10 +5776,16 @@ config UART8_RS485_DIR_POLARITY config UART8_RXDMA bool "UART8 Rx DMA" default n - depends on STM32_UART8 && STM32_DMA2 + depends on STM32_DMA2 ---help--- In high data rate usage, Rx DMA may eliminate Rx overrun errors +endif # STM32_UART8_SERIALDRIVER + +if STM32_SERIALDRIVER + +comment "Serial Driver Configuration" + config SERIAL_DISABLE_REORDERING bool "Disable reordering of ttySx devices." depends on STM32_USART1 || STM32_USART2 || STM32_USART3 || STM32_UART4 || STM32_UART5 || STM32_USART6 || STM32_UART7 || STM32_UART8 @@ -5661,8 +5830,6 @@ config STM32_SERIALBRK_BSDCOMPAT on because the SW starts the break and then the HW automatically clears the break. This makes it is difficult to sent a long break. -endmenu # U[S]ART Configuration - config STM32_USART_SINGLEWIRE bool "Single Wire Support" default n @@ -5671,6 +5838,9 @@ config STM32_USART_SINGLEWIRE Enable single wire UART support. The option enables support for the TIOCSSINGLEWIRE ioctl in the STM32 serial driver. +endif # STM32_SERIALDRIVER +endmenu # U[S]ART Configuration + menu "SPI Configuration" depends on STM32_SPI diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs index 64034976b5a..0b691c270d2 100644 --- a/arch/arm/src/stm32/Make.defs +++ b/arch/arm/src/stm32/Make.defs @@ -109,10 +109,10 @@ endif CHIP_ASRCS = CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c -CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c stm32_irq.c -CHIP_CSRCS += stm32_dma.c stm32_lowputc.c stm32_serial.c stm32_spi.c -CHIP_CSRCS += stm32_sdio.c stm32_tim.c stm32_waste.c stm32_ccm.c stm32_uid.c -CHIP_CSRCS += stm32_capture.c +CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c +CHIP_CSRCS += stm32_irq.c stm32_dma.c stm32_lowputc.c stm32_getc.c +CHIP_CSRCS += stm32_serial.c stm32_spi.c stm32_sdio.c stm32_tim.c +CHIP_CSRCS += stm32_waste.c stm32_ccm.c stm32_uid.c stm32_capture.c ifeq ($(CONFIG_TIMER),y) CHIP_CSRCS += stm32_tim_lowerhalf.c @@ -203,7 +203,7 @@ CHIP_CSRCS += stm32_rtc_lowerhalf.c endif endif -ifeq ($(CONFIG_ADC),y) +ifeq ($(CONFIG_STM32_ADC),y) CHIP_CSRCS += stm32_adc.c endif @@ -211,6 +211,10 @@ ifeq ($(CONFIG_DAC),y) CHIP_CSRCS += stm32_dac.c endif +ifeq ($(CONFIG_STM32_1WIREDRIVER),y) +CHIP_CSRCS += stm32_1wire.c +endif + ifeq ($(CONFIG_STM32_RNG),y) CHIP_CSRCS += stm32_rng.c endif diff --git a/arch/arm/src/stm32/chip.h b/arch/arm/src/stm32/chip.h index bba330edfaf..4542a3885f0 100644 --- a/arch/arm/src/stm32/chip.h +++ b/arch/arm/src/stm32/chip.h @@ -109,6 +109,9 @@ # elif defined(CONFIG_ARCH_CHIP_STM32F105VB) # include "chip/stm32f105v_pinmap.h" +# elif defined(CONFIG_ARCH_CHIP_STM32F105RB) +# include "chip/stm32f105r_pinmap.h" + # elif defined(CONFIG_ARCH_CHIP_STM32F107VC) # include "chip/stm32f107v_pinmap.h" # else diff --git a/arch/arm/src/stm32/chip/stm32_adc.h b/arch/arm/src/stm32/chip/stm32_adc.h index 3a59ba25a88..b0990a37bef 100644 --- a/arch/arm/src/stm32/chip/stm32_adc.h +++ b/arch/arm/src/stm32/chip/stm32_adc.h @@ -1,7 +1,7 @@ /**************************************************************************************************** * arch/arm/src/stm32/chip/stm32_adc.h * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -261,6 +261,7 @@ # define ADC_CR1_RES_8BIT (2 << ADC_CR1_RES_SHIFT) /* 11 ADCCLK cycles. For STM32L15XX: 9 ADCCLK cycles */ # define ADC_CR1_RES_6BIT (3 << ADC_CR1_RES_SHIFT) /* 9 ADCCLK cycles. For STM32L15XX: 7 ADCCLK cycles */ # define ADC_CR1_OVRIE (1 << 26) /* Bit 26: Overrun interrupt enable */ +# define ADC_CR1_RESERVED (0xfb3f0000) #endif /* ADC control register 2 */ @@ -391,7 +392,7 @@ # define ADC_CR2_EXTEN_BOTH (3 << ADC_CR2_EXTEN_SHIFT) /* 11: Trigger detection on both the rising and falling edges */ # define ADC_CR2_SWSTART (1 << 30) /* Bit 30: Start Conversion of regular channels */ - +# define ADC_CR2_RESERVED (0x8080f0fc) #else # define ADC_CR2_JEXTSEL_SHIFT (12) /* Bits 12-14: External event select for injected group */ # define ADC_CR2_JEXTSEL_MASK (7 << ADC_CR2_JEXTSEL_SHIFT) diff --git a/arch/arm/src/stm32/chip/stm32_can.h b/arch/arm/src/stm32/chip/stm32_can.h index d64332d1d93..6b4a12a855e 100644 --- a/arch/arm/src/stm32/chip/stm32_can.h +++ b/arch/arm/src/stm32/chip/stm32_can.h @@ -75,8 +75,11 @@ #define STM32_CAN_MCR_OFFSET 0x0000 /* CAN master control register */ #define STM32_CAN_MSR_OFFSET 0x0004 /* CAN master status register */ #define STM32_CAN_TSR_OFFSET 0x0008 /* CAN transmit status register */ + +#define STM32_CAN_RFR_OFFSET(m) (0x000c+((m)<<2)) #define STM32_CAN_RF0R_OFFSET 0x000c /* CAN receive FIFO 0 register */ #define STM32_CAN_RF1R_OFFSET 0x0010 /* CAN receive FIFO 1 register */ + #define STM32_CAN_IER_OFFSET 0x0014 /* CAN interrupt enable register */ #define STM32_CAN_ESR_OFFSET 0x0018 /* CAN error status register */ #define STM32_CAN_BTR_OFFSET 0x001c /* CAN bit timing register */ @@ -127,8 +130,8 @@ #define STM32_CAN_FFA1R_OFFSET 0x0214 /* CAN filter FIFO assignment register */ #define STM32_CAN_FA1R_OFFSET 0x021c /* CAN filter activation register */ -/* There are 14 or 28 filter banks (depending) on the device. Each filter bank is - * composed of two 32-bit registers, CAN_FiR: +/* There are 14 or 28 filter banks (depending) on the device. + * Each filter bank is composed of two 32-bit registers, CAN_FiR: * F0R1 Offset 0x240 * F0R2 Offset 0x244 * F1R1 Offset 0x248 @@ -445,7 +448,7 @@ /* CAN filter master register */ -#define CAN_FMR_FINIT (1 << 0) /* Bit 0: Filter Init Mode */ +#define CAN_FMR_FINIT (1 << 0) /* Bit 0: Filter Init Mode */ #if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) # define CAN_FMR_CAN2SB_SHIFT (8) /* Bits 13-8: CAN2 start bank */ # define CAN_FMR_CAN2SB_MASK (0x3f << CAN_FMR_CAN2SB_SHIFT) diff --git a/arch/arm/src/stm32/chip/stm32_flash.h b/arch/arm/src/stm32/chip/stm32_flash.h index c0314927527..70e6d62d976 100644 --- a/arch/arm/src/stm32/chip/stm32_flash.h +++ b/arch/arm/src/stm32/chip/stm32_flash.h @@ -3,7 +3,7 @@ * * Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved. * Author: Gregory Nutt - * David Sidrane + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/arch/arm/src/stm32/chip/stm32f105r_pinmap.h b/arch/arm/src/stm32/chip/stm32f105r_pinmap.h new file mode 100644 index 00000000000..ffd3ef35c45 --- /dev/null +++ b/arch/arm/src/stm32/chip/stm32f105r_pinmap.h @@ -0,0 +1,328 @@ +/************************************************************************************ + * arch/arm/src/stm32/chip/stm32f105r_pinmap.h + * + * Copyright (C) 2009, 2011, 2014, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F105R_PINMAP_H +#define __ARCH_ARM_SRC_STM32_CHIP_STM32F105R_PINMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "stm32_gpio.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Alternate Pin Functions: */ + +#define GPIO_ADC12_IN0 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0) +#define GPIO_ADC12_IN1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1) +#define GPIO_ADC12_IN10 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN0) +#define GPIO_ADC12_IN11 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN1) +#define GPIO_ADC12_IN12 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN2) +#define GPIO_ADC12_IN13 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN3) +#define GPIO_ADC12_IN14 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN4) +#define GPIO_ADC12_IN15 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN5) +#define GPIO_ADC12_IN2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2) +#define GPIO_ADC12_IN3 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3) +#define GPIO_ADC12_IN4 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4) +#define GPIO_ADC12_IN5 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5) +#define GPIO_ADC12_IN6 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6) +#define GPIO_ADC12_IN7 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7) +#define GPIO_ADC12_IN8 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0) +#define GPIO_ADC12_IN9 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1) + +#if defined(CONFIG_STM32_CAN1_REMAP1) +# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8) +# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9) +#else +# define GPIO_CAN1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11) +# define GPIO_CAN1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12) +#endif + +#if defined(CONFIG_STM32_CAN2_REMAP) +# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5) +# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6) +#else +# define GPIO_CAN2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12) +# define GPIO_CAN2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) +#endif + +#if 0 /* Needs further investigation */ +#define GPIO_DAC_OUT1 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4) +#define GPIO_DAC_OUT2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5) +#endif + +#if defined(CONFIG_STM32_I2C1_REMAP) +# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8) +# define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9) +#else +# define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6) +# define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7) +#endif +#define GPIO_I2C1_SMBA (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) + +#define GPIO_I2C2_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10) +#define GPIO_I2C2_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11) +#define GPIO_I2C2_SMBA (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) +#define GPIO_I2S2_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) +#define GPIO_I2S2_MCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN6) +#define GPIO_I2S2_WS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) + +#define GPIO_I2S3_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3) +#define GPIO_I2S3_MCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN7) +#define GPIO_I2S3_SD (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) +#define GPIO_I2S3_WS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15) + +#define GPIO_MCO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) + +#define GPIO_OTGFS_DM (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11) +#define GPIO_OTGFS_DP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12) +#define GPIO_OTGFS_ID (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10) +#define GPIO_OTGFS_SOF (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) +#define GPIO_OTGFS_VBUS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9) + +#if defined(CONFIG_STM32_SPI1_REMAP) +# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) +# define GPIO_SPI1_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3) +# define GPIO_SPI1_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4) +# define GPIO_SPI1_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) +#else +# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4) +# define GPIO_SPI1_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN5) +# define GPIO_SPI1_MISO (GPIO_INPUT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6) +# define GPIO_SPI1_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) +#endif + +#define GPIO_SPI2_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12) +#define GPIO_SPI2_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) +#define GPIO_SPI2_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN14) +#define GPIO_SPI2_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15) + +#if defined(CONFIG_STM32_SPI3_REMAP) +# define GPIO_SPI3_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN4) +# define GPIO_SPI3_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10) +# define GPIO_SPI3_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11) +# define GPIO_SPI3_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12) +#else +# define GPIO_SPI3_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) +# define GPIO_SPI3_SCK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3) +# define GPIO_SPI3_MISO (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4) +# define GPIO_SPI3_MOSI (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) +#endif + +#if 0 /* Needs further investigation */ +#define GPIO_TAMPER_RTC (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN13) +#endif + +#if defined(CONFIG_STM32_TIM1_PARTIAL_REMAP) +# define GPIO_TIM1_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12) +# define GPIO_TIM1_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN8) +# define GPIO_TIM1_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) +# define GPIO_TIM1_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN9) +# define GPIO_TIM1_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9) +# define GPIO_TIM1_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10) +# define GPIO_TIM1_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10) +# define GPIO_TIM1_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11) +# define GPIO_TIM1_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11) +# define GPIO_TIM1_BKIN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6) +# define GPIO_TIM1_CH1N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) +# define GPIO_TIM1_CH2N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0) +# define GPIO_TIM1_CH3N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1) +#else +# define GPIO_TIM1_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN12) +# define GPIO_TIM1_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN8) +# define GPIO_TIM1_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) +# define GPIO_TIM1_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN9) +# define GPIO_TIM1_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9) +# define GPIO_TIM1_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10) +# define GPIO_TIM1_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10) +# define GPIO_TIM1_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11) +# define GPIO_TIM1_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11) +# define GPIO_TIM1_BKIN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN12) +# define GPIO_TIM1_CH1N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) +# define GPIO_TIM1_CH2N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14) +# define GPIO_TIM1_CH3N (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN15) +#endif + +#if defined(CONFIG_STM32_TIM2_FULL_REMAP) +# define GPIO_TIM2_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) +# define GPIO_TIM2_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) +# define GPIO_TIM2_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15) +# define GPIO_TIM2_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN3) +# define GPIO_TIM2_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3) +# define GPIO_TIM2_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10) +# define GPIO_TIM2_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10) +# define GPIO_TIM2_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11) +# define GPIO_TIM2_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11) +#elif defined(CONFIG_STM32_TIM2_PARTIAL_REMAP_1) +# define GPIO_TIM2_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) +# define GPIO_TIM2_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) +# define GPIO_TIM2_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15) +# define GPIO_TIM2_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN3) +# define GPIO_TIM2_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3) +# define GPIO_TIM2_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2) +# define GPIO_TIM2_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2) +# define GPIO_TIM2_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3) +# define GPIO_TIM2_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3) +#elif defined(CONFIG_STM32_TIM2_PARTIAL_REMAP_2) +# define GPIO_TIM2_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0) +# define GPIO_TIM2_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0) +# define GPIO_TIM2_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0) +# define GPIO_TIM2_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1) +# define GPIO_TIM2_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) +# define GPIO_TIM2_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN10) +# define GPIO_TIM2_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10) +# define GPIO_TIM2_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11) +# define GPIO_TIM2_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11) +#else +# define GPIO_TIM2_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0) +# define GPIO_TIM2_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0) +# define GPIO_TIM2_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0) +# define GPIO_TIM2_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1) +# define GPIO_TIM2_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) +# define GPIO_TIM2_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2) +# define GPIO_TIM2_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2) +# define GPIO_TIM2_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3) +# define GPIO_TIM2_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3) +#endif + +#if defined(CONFIG_STM32_TIM3_FULL_REMAP) +# define GPIO_TIM3_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN6) +# define GPIO_TIM3_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN6) +# define GPIO_TIM3_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN7) +# define GPIO_TIM3_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN7) +# define GPIO_TIM3_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN8) +# define GPIO_TIM3_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN8) +# define GPIO_TIM3_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN9) +# define GPIO_TIM3_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN9) +#elif defined(CONFIG_STM32_TIM3_PARTIAL_REMAP) +# define GPIO_TIM3_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN4) +# define GPIO_TIM3_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN4) +# define GPIO_TIM3_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN5) +# define GPIO_TIM3_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) +# define GPIO_TIM3_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0) +# define GPIO_TIM3_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0) +# define GPIO_TIM3_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1) +# define GPIO_TIM3_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1) +#else +# define GPIO_TIM3_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN6) +# define GPIO_TIM3_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN6) +# define GPIO_TIM3_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN7) +# define GPIO_TIM3_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) +# define GPIO_TIM3_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN0) +# define GPIO_TIM3_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0) +# define GPIO_TIM3_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1) +# define GPIO_TIM3_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1) +#endif +#define GPIO_TIM3_ETR (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN2) + +#define GPIO_TIM4_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN6) +#define GPIO_TIM4_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN6) +#define GPIO_TIM4_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN7) +#define GPIO_TIM4_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN7) +#define GPIO_TIM4_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN8) +#define GPIO_TIM4_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8) +#define GPIO_TIM4_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN9) +#define GPIO_TIM4_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9) + +#define GPIO_TIM5_CH1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM5_CH1OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM5_CH2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN1) +#define GPIO_TIM5_CH2OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) +#define GPIO_TIM5_CH3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM5_CH3OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM5_CH4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM5_CH4OUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3) + +#if 0 /* Needs further investigation */ +#if defined(CONFIG_STM32_TRACESWO_REMAP) +# define GPIO_TRACESWO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3) +#endif +#endif + +#define GPIO_USART1_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN11) +#define GPIO_USART1_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12) +#define GPIO_USART1_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) +#if defined(CONFIG_STM32_USART1_REMAP) +# define GPIO_USART1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9) +# define GPIO_USART1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10) +#else +# define GPIO_USART1_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9) +# define GPIO_USART1_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN10) +#endif + +#define GPIO_USART2_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN0) +#define GPIO_USART2_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) +#define GPIO_USART2_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2) +#define GPIO_USART2_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN3) +#define GPIO_USART2_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN4) + +#if defined(CONFIG_STM32_USART3_PARTIAL_REMAP) +# define GPIO_USART3_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10) +# define GPIO_USART3_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11) +# define GPIO_USART3_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12) +# define GPIO_USART3_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13) +# define GPIO_USART3_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14) +#else +# define GPIO_USART3_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10) +# define GPIO_USART3_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN11) +# define GPIO_USART3_CK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) +# define GPIO_USART3_CTS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN13) +# define GPIO_USART3_RTS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN14) +#endif + +#define GPIO_UART4_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTC|GPIO_PIN11) +#define GPIO_UART4_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN10) + +#define GPIO_UART5_RX (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTD|GPIO_PIN2) +#define GPIO_UART5_TX (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN12) + +#define GPIO_WKUP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0) + +/* Some GPIOs are accessible only as remapped, alternate functions */ + +#if 0 /* Needs further investigation */ +#define GPIO_PA13 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN13) +#define GPIO_PA14 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN14) +#define GPIO_PA15 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15) +#define GPIO_PB3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN3) +#define GPIO_PB4 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN4) +#endif + +#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F105R_PINMAP_H */ diff --git a/arch/arm/src/stm32/chip/stm32f105v_pinmap.h b/arch/arm/src/stm32/chip/stm32f105v_pinmap.h index 71ffe846487..5fd7029e2c1 100644 --- a/arch/arm/src/stm32/chip/stm32f105v_pinmap.h +++ b/arch/arm/src/stm32/chip/stm32f105v_pinmap.h @@ -91,44 +91,6 @@ #define GPIO_DAC_OUT2 (GPIO_INPUT|GPIO_CNF_ANALOGIN|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN5) #endif -#if 0 /* Needs further investigation */ -#define GPIO_ETH_MDC (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN1) -#define GPIO_ETH_MDIO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN2) -#define GPIO_ETH_MIICOL (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN3) -#define GPIO_ETH_MIICRSWKUP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN0) -#define GPIO_ETH_MIIRXCLK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) - -#if defined(CONFIG_STM32_ETH_REMAP) -# define GPIO_ETH_MIIRXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN9) -# define GPIO_ETH_MIIRXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN10) -# define GPIO_ETH_MIIRXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN11) -# define GPIO_ETH_MIIRXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN12) -# define GPIO_ETH_MIIRXDV (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTD|GPIO_PIN8) -#else -# define GPIO_ETH_MIIRXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4) -# define GPIO_ETH_MIIRXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5) -# define GPIO_ETH_MIIRXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN0) -# define GPIO_ETH_MIIRXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN1) -# define GPIO_ETH_MIIRXDV (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) -#endif - -#define GPIO_ETH_MIIRXER (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN10) -#define GPIO_ETH_MIITXCLK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN3) -#define GPIO_ETH_MIITXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) -#define GPIO_ETH_MIITXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) -#define GPIO_ETH_MIITXD2 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN2) -#define GPIO_ETH_MIITXD3 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8) -#define GPIO_ETH_MIITXEN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11) -#define GPIO_ETH_PPSOUT (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) -#define GPIO_ETH_RMIICRSDV (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN7) -#define GPIO_ETH_RMIIREFCLK (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN1) -#define GPIO_ETH_RMIIRXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN4) -#define GPIO_ETH_RMIIRXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTC|GPIO_PIN5) -#define GPIO_ETH_RMIITXD0 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN12) -#define GPIO_ETH_RMIITXD1 (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN13) -#define GPIO_ETH_RMIITXEN (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN11) -#endif - #if defined(CONFIG_STM32_I2C1_REMAP) # define GPIO_I2C1_SCL (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN8) # define GPIO_I2C1_SDA (GPIO_ALT|GPIO_CNF_AFOD|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN9) diff --git a/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h b/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h index 24822c37d3e..0af150638a0 100644 --- a/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h +++ b/arch/arm/src/stm32/chip/stm32f10xxx_vectors.h @@ -110,7 +110,7 @@ UNUSED(STM32_IRQ_RESERVED6) /* Vector 16+49: Reserved 6 */ VECTOR(stm32_tim5, STM32_IRQ_TIM5) /* Vector 16+50: TIM5 global interrupt */ VECTOR(stm32_spi3, STM32_IRQ_SPI3) /* Vector 16+51: SPI3 global interrupt */ VECTOR(stm32_uart4, STM32_IRQ_UART4) /* Vector 16+52: USART2 global interrupt */ -VECTOR(stm32_uart5, STM32_IRQ_UART5) /* Vector 16+53: USART5 global interrupt */ +VECTOR(stm32_uart5, STM32_IRQ_UART5) /* Vector 16+53: UART5 global interrupt */ VECTOR(stm32_tim6, STM32_IRQ_TIM6) /* Vector 16+54: TIM6 global interrupt */ VECTOR(stm32_tim7, STM32_IRQ_TIM7) /* Vector 16+55: TIM7 global interrupt */ VECTOR(stm32_dma2ch1, STM32_IRQ_DMA2CH1) /* Vector 16+56: DMA2 Channel 1 global interrupt */ diff --git a/arch/arm/src/stm32/chip/stm32f20xxx_uart.h b/arch/arm/src/stm32/chip/stm32f20xxx_uart.h index 5e5b4449de0..4da5c0af2e0 100644 --- a/arch/arm/src/stm32/chip/stm32f20xxx_uart.h +++ b/arch/arm/src/stm32/chip/stm32f20xxx_uart.h @@ -199,7 +199,7 @@ #define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */ #define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */ #define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */ -#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */ +#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */ /* Guard time and prescaler register */ diff --git a/arch/arm/src/stm32/chip/stm32f30xxx_uart.h b/arch/arm/src/stm32/chip/stm32f30xxx_uart.h index 9a55a921a72..5593e6848ff 100644 --- a/arch/arm/src/stm32/chip/stm32f30xxx_uart.h +++ b/arch/arm/src/stm32/chip/stm32f30xxx_uart.h @@ -218,19 +218,19 @@ #define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */ #define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */ #define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */ -#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */ -#define USART_CR1_OVRDIS (1 << 12) /* Bit 12: Overrun Disable */ -#define USART_CR1_DDRE (1 << 13) /* Bit 13: DMA Disable on Reception Error */ -#define USART_CR1_DEM (1 << 14) /* Bit 14: Driver enable mode */ -#define USART_CR1_DEP (1 << 15) /* Bit 15: Driver enable polarity selection */ -#define USART_CR1_SCARCNT_SHIFT (17) /* Bit 17-19: Smartcard auto-retry count */ -#define USART_CR1_SCARCNT_MASK (7 << USART_CR1_SCARCNT_SHIFT) -#define USART_CR1_WUS_SHIFT (20) /* Bit 20-21: Wakeup from Stop mode interrupt */ -#define USART_CR1_WUS_MASK (3 << USART_CR1_WUS_SHIFT) -# define USART_CR1_WUS_ADDRMAT (0 << USART_CR1_WUS_SHIFT) /* Active on address match */ -# define USART_CR1_WUS_STARTBIT (2 << USART_CR1_WUS_SHIFT) /* Active on Start bit */ -# define USART_CR1_WUS_RXNE (3 << USART_CR1_WUS_SHIFT) /* Active on RXNE */ -#define USART_CR1_WUFIE (1 << 22) /* Bit 22: Wakeup from Stop mode interrupt enable */ +#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */ +#define USART_CR3_OVRDIS (1 << 12) /* Bit 12: Overrun Disable */ +#define USART_CR3_DDRE (1 << 13) /* Bit 13: DMA Disable on Reception Error */ +#define USART_CR3_DEM (1 << 14) /* Bit 14: Driver enable mode */ +#define USART_CR3_DEP (1 << 15) /* Bit 15: Driver enable polarity selection */ +#define USART_CR3_SCARCNT_SHIFT (17) /* Bit 17-19: Smartcard auto-retry count */ +#define USART_CR3_SCARCNT_MASK (7 << USART_CR3_SCARCNT_SHIFT) +#define USART_CR3_WUS_SHIFT (20) /* Bit 20-21: Wakeup from Stop mode interrupt */ +#define USART_CR3_WUS_MASK (3 << USART_CR3_WUS_SHIFT) +# define USART_CR3_WUS_ADDRMAT (0 << USART_CR3_WUS_SHIFT) /* Active on address match */ +# define USART_CR3_WUS_STARTBIT (2 << USART_CR3_WUS_SHIFT) /* Active on Start bit */ +# define USART_CR3_WUS_RXNE (3 << USART_CR3_WUS_SHIFT) /* Active on RXNE */ +#define USART_CR3_WUFIE (1 << 22) /* Bit 22: Wakeup from Stop mode interrupt enable */ /* Baud Rate Register */ diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h index d8fbe7346cc..c0f675aa023 100644 --- a/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h +++ b/arch/arm/src/stm32/chip/stm32f40xxx_pinmap.h @@ -628,7 +628,8 @@ #endif #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ - defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) + defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) || \ + defined(CONFIG_STM32_STM32F411) # define GPIO_SPI4_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN5) # define GPIO_SPI4_MISO_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN13) # define GPIO_SPI4_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN6) @@ -643,7 +644,7 @@ #endif #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ - defined(CONFIG_STM32_STM32F469) + defined(CONFIG_STM32_STM32F469) || defined(CONFIG_STM32_STM32F411) # define GPIO_SPI5_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN8) # define GPIO_SPI5_MISO_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN7) # define GPIO_SPI5_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN9) @@ -652,7 +653,10 @@ # define GPIO_SPI5_NSS_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN5) # define GPIO_SPI5_SCK_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN7) # define GPIO_SPI5_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN6) +#endif +#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ + defined(CONFIG_STM32_STM32F469) # define GPIO_SPI6_MISO (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN12) # define GPIO_SPI6_MOSI (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN14) # define GPIO_SPI6_NSS (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN8) diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_rcc.h b/arch/arm/src/stm32/chip/stm32f40xxx_rcc.h index a81f798c18b..cccbedbf505 100644 --- a/arch/arm/src/stm32/chip/stm32f40xxx_rcc.h +++ b/arch/arm/src/stm32/chip/stm32f40xxx_rcc.h @@ -356,7 +356,8 @@ #define RCC_APB2RSTR_SDIORST (1 << 11) /* Bit 11: SDIO reset */ #define RCC_APB2RSTR_SPI1RST (1 << 12) /* Bit 12: SPI1 reset */ #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ - defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) + defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) || \ + defined(CONFIG_STM32_STM32F411) # define RCC_APB2RSTR_SPI4RST (1 << 13) /* Bit 13: SPI4 reset */ #endif #define RCC_APB2RSTR_SYSCFGRST (1 << 14) /* Bit 14: System configuration controller reset */ @@ -364,8 +365,11 @@ #define RCC_APB2RSTR_TIM10RST (1 << 17) /* Bit 17: TIM10 reset */ #define RCC_APB2RSTR_TIM11RST (1 << 18) /* Bit 18: TIM11 reset */ #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ - defined(CONFIG_STM32_STM32F469) + defined(CONFIG_STM32_STM32F469) || defined(CONFIG_STM32_STM32F411) # define RCC_APB2RSTR_SPI5RST (1 << 20) /* Bit 20: SPI 5 reset */ +#endif +#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ + defined(CONFIG_STM32_STM32F469) # define RCC_APB2RSTR_SPI6RST (1 << 21) /* Bit 21: SPI 6 reset */ #endif #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ @@ -500,7 +504,8 @@ #define RCC_APB2ENR_SDIOEN (1 << 11) /* Bit 11: SDIO clock enable */ #define RCC_APB2ENR_SPI1EN (1 << 12) /* Bit 12: SPI1 clock enable */ #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ - defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) + defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) || \ + defined(CONFIG_STM32_STM32F411) # define RCC_APB2ENR_SPI4EN (1 << 13) /* Bit 13: SPI4 clock enable */ #endif #define RCC_APB2ENR_SYSCFGEN (1 << 14) /* Bit 14: System configuration controller clock enable */ @@ -508,8 +513,11 @@ #define RCC_APB2ENR_TIM10EN (1 << 17) /* Bit 17: TIM10 clock enable */ #define RCC_APB2ENR_TIM11EN (1 << 18) /* Bit 18: TIM11 clock enable */ #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ - defined(CONFIG_STM32_STM32F469) + defined(CONFIG_STM32_STM32F469) || defined(CONFIG_STM32_STM32F411) # define RCC_APB2ENR_SPI5EN (1 << 20) /* Bit 20: SPI5 clock enable */ +#endif +#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ + defined(CONFIG_STM32_STM32F469) # define RCC_APB2ENR_SPI6EN (1 << 21) /* Bit 21: SPI6 clock enable */ #endif #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ @@ -649,7 +657,8 @@ #define RCC_APB2LPENR_SDIOLPEN (1 << 11) /* Bit 11: SDIO clock enable during Sleep mode */ #define RCC_APB2LPENR_SPI1LPEN (1 << 12) /* Bit 12: SPI1 clock enable during Sleep mode */ #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ - defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) + defined(CONFIG_STM32_STM32F446) || defined(CONFIG_STM32_STM32F469) || \ + defined(CONFIG_STM32_STM32F411) # define RCC_APB2LPENR_SPI4LPEN (1 << 13) /* Bit 13: SPI4 clock enable during Sleep mode */ #endif #define RCC_APB2LPENR_SYSCFGLPEN (1 << 14) /* Bit 14: System configuration controller clock enable during Sleep mode */ @@ -657,8 +666,11 @@ #define RCC_APB2LPENR_TIM10LPEN (1 << 17) /* Bit 17: TIM10 clock enable during Sleep mode */ #define RCC_APB2LPENR_TIM11LPEN (1 << 18) /* Bit 18: TIM11 clock enable during Sleep mode */ #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ - defined(CONFIG_STM32_STM32F469) + defined(CONFIG_STM32_STM32F469) || defined(CONFIG_STM32_STM32F411) # define RCC_APB2LPENR_SPI5LPEN (1 << 20) /* Bit 20: SPI5 clock enable during Sleep mode */ +#endif +#if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ + defined(CONFIG_STM32_STM32F469) # define RCC_APB2LPENR_SPI6LPEN (1 << 21) /* Bit 21: SPI6 clock enable during Sleep mode */ #endif #if defined(CONFIG_STM32_STM32F427) || defined(CONFIG_STM32_STM32F429) || \ diff --git a/arch/arm/src/stm32/chip/stm32f40xxx_uart.h b/arch/arm/src/stm32/chip/stm32f40xxx_uart.h index 824ea9515b5..9693baa5077 100644 --- a/arch/arm/src/stm32/chip/stm32f40xxx_uart.h +++ b/arch/arm/src/stm32/chip/stm32f40xxx_uart.h @@ -217,7 +217,7 @@ #define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */ #define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */ #define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */ -#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */ +#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */ /* Guard time and prescaler register */ diff --git a/arch/arm/src/stm32/chip/stm32l15xxx_uart.h b/arch/arm/src/stm32/chip/stm32l15xxx_uart.h index dff92449335..4b85b837c76 100644 --- a/arch/arm/src/stm32/chip/stm32l15xxx_uart.h +++ b/arch/arm/src/stm32/chip/stm32l15xxx_uart.h @@ -191,7 +191,7 @@ #define USART_CR3_RTSE (1 << 8) /* Bit 8: RTS Enable */ #define USART_CR3_CTSE (1 << 9) /* Bit 9: CTS Enable */ #define USART_CR3_CTSIE (1 << 10) /* Bit 10: CTS Interrupt Enable */ -#define USART_CR1_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */ +#define USART_CR3_ONEBIT (1 << 11) /* Bit 11: One sample bit method enable */ /* Guard time and prescaler register */ diff --git a/arch/arm/src/stm32/stm32.h b/arch/arm/src/stm32/stm32.h index ee5a6497f80..7ae058ee053 100644 --- a/arch/arm/src/stm32/stm32.h +++ b/arch/arm/src/stm32/stm32.h @@ -92,6 +92,7 @@ #include "stm32_usbdev.h" #include "stm32_wdg.h" #include "stm32_lowputc.h" +#include "stm32_getc.h" #include "stm32_eth.h" #endif /* __ARCH_ARM_SRC_STM32_STM32_H */ diff --git a/arch/arm/src/stm32/stm32_1wire.c b/arch/arm/src/stm32/stm32_1wire.c new file mode 100644 index 00000000000..4c0fa6c0f77 --- /dev/null +++ b/arch/arm/src/stm32/stm32_1wire.c @@ -0,0 +1,1354 @@ +/**************************************************************************** + * arch/arm/src/stm32/stm32_1wire.c + * + * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. + * Author: Aleksandr Vyhovanec + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* Links: + * https://www.maximintegrated.com/en/app-notes/index.mvp/id/214 + */ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include "up_arch.h" + +#include "stm32_rcc.h" +#include "stm32_1wire.h" + +#ifdef HAVE_1WIREDRIVER + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define BUS_TIMEOUT 5 /* tv_sec */ + +#define RESET_BAUD 9600 +#define RESET_TX 0xF0 +#define TIMESLOT_BAUD 115200 +#define READ_TX 0xFF +#define READ_RX1 0xFF +#define WRITE_TX0 0x00 +#define WRITE_TX1 0xFF + +#define PIN_OPENDRAIN(GPIO) ((GPIO) | GPIO_OPENDRAIN) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/* 1-Wire bus task */ + +enum stm32_1wire_msg_e +{ + ONEWIRETASK_NONE = 0, + ONEWIRETASK_RESET, + ONEWIRETASK_WRITE, + ONEWIRETASK_READ +}; + +struct stm32_1wire_msg_s +{ + enum stm32_1wire_msg_e task; /* Task */ + uint8_t *buffer; /* Task buffer */ + int buflen; /* Buffer length */ +}; + +/* 1-Wire device hardware configuration */ + +struct stm32_1wire_config_s +{ + const uint32_t usartbase; /* Base address of USART registers */ + const uint32_t apbclock; /* PCLK 1 or 2 frequency */ + const uint32_t data_pin; /* GPIO configuration for DATA */ + const uint8_t irq; /* IRQ associated with this USART */ + int (*const vector)(int irq, void *context); /* Interrupt handler */ +}; + +/* 1-Wire device Private Data */ + +struct stm32_1wire_priv_s +{ + const struct stm32_1wire_config_s *config; /* Port configuration */ + volatile int refs; /* Referernce count */ + sem_t sem_excl; /* Mutual exclusion semaphore */ + sem_t sem_isr; /* Interrupt wait semaphore */ + int baud; /* Baud rate */ + const struct stm32_1wire_msg_s *msgs; /* Messages data */ + uint8_t *byte; /* Current byte */ + uint8_t bit; /* Current bit */ + volatile int result; /* Exchange result */ +}; + +/* 1-Wire device, Instance */ + +struct stm32_1wire_inst_s +{ + const struct onewire_ops_s *ops; /* Standard 1-Wire operations */ + struct stm32_1wire_priv_s *priv; /* Common driver private data structure */ +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +static inline uint32_t stm32_1wire_in(struct stm32_1wire_priv_s *priv, int offset); +static inline void stm32_1wire_out(struct stm32_1wire_priv_s *priv, int offset, uint32_t value); +static int stm32_1wire_recv(struct stm32_1wire_priv_s *priv); +static void stm32_1wire_send(struct stm32_1wire_priv_s *priv, int ch); +static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv); +static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv, bool on); +static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv); +static int stm32_1wire_deinit(FAR struct stm32_1wire_priv_s *priv); +static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv); +static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv); +static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv); +static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv); +static int stm32_1wire_process(struct stm32_1wire_priv_s *priv, + FAR const struct stm32_1wire_msg_s *msgs, int count); +static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv); + +#ifdef CONFIG_STM32_USART1_1WIREDRIVER +static int stm32_interrupt_1wire1(int irq, void *context); +#endif +#ifdef CONFIG_STM32_USART2_1WIREDRIVER +static int stm32_interrupt_1wire2(int irq, void *context); +#endif +#ifdef CONFIG_STM32_USART3_1WIREDRIVER +static int stm32_interrupt_1wire3(int irq, void *context); +#endif +#ifdef CONFIG_STM32_UART4_1WIREDRIVER +static int stm32_interrupt_1wire4(int irq, void *context); +#endif +#ifdef CONFIG_STM32_UART5_1WIREDRIVER +static int stm32_interrupt_1wire5(int irq, void *context); +#endif +#ifdef CONFIG_STM32_USART6_1WIREDRIVER +static int stm32_interrupt_1wire6(int irq, void *context); +#endif +#ifdef CONFIG_STM32_UART7_1WIREDRIVER +static int stm32_interrupt_1wire7(int irq, void *context); +#endif +#ifdef CONFIG_STM32_UART8_1WIREDRIVER +static int stm32_interrupt_1wire8(int irq, void *context); +#endif + +static int stm32_1wire_reset(FAR struct onewire_dev_s *dev); +static int stm32_1wire_write(FAR struct onewire_dev_s *dev, + const uint8_t *buffer, int buflen); +static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, + int buflen); +static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset, + const uint8_t *txbuffer, int txbuflen, + uint8_t *rxbuffer, int rxbuflen); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* 1-Wire device structures */ + +#ifdef CONFIG_STM32_USART1_1WIREDRIVER + +static const struct stm32_1wire_config_s stm32_1wire1_config = +{ + .usartbase = STM32_USART1_BASE, + .apbclock = STM32_PCLK2_FREQUENCY, + .data_pin = PIN_OPENDRAIN(GPIO_USART1_TX), + .irq = STM32_IRQ_USART1, + .vector = stm32_interrupt_1wire1, +}; + +static struct stm32_1wire_priv_s stm32_1wire1_priv = +{ + .config = &stm32_1wire1_config, + .refs = 0, + .msgs = NULL +}; + +#endif + +#ifdef CONFIG_STM32_USART2_1WIREDRIVER + +static const struct stm32_1wire_config_s stm32_1wire2_config = +{ + .usartbase = STM32_USART2_BASE, + .apbclock = STM32_PCLK1_FREQUENCY, + .data_pin = PIN_OPENDRAIN(GPIO_USART2_TX), + .irq = STM32_IRQ_USART2, + .vector = stm32_interrupt_1wire2, +}; + +static struct stm32_1wire_priv_s stm32_1wire2_priv = +{ + .config = &stm32_1wire2_config, + .refs = 0, + .msgs = NULL +}; + +#endif + +#ifdef CONFIG_STM32_USART3_1WIREDRIVER + +static const struct stm32_1wire_config_s stm32_1wire3_config = +{ + .usartbase = STM32_USART3_BASE, + .apbclock = STM32_PCLK1_FREQUENCY, + .data_pin = PIN_OPENDRAIN(GPIO_USART3_TX), + .irq = STM32_IRQ_USART3, + .vector = stm32_interrupt_1wire3, +}; + +static struct stm32_1wire_priv_s stm32_1wire3_priv = +{ + .config = &stm32_1wire3_config, + .refs = 0, + .msgs = NULL +}; + +#endif + +#ifdef CONFIG_STM32_UART4_1WIREDRIVER + +static const struct stm32_1wire_config_s stm32_1wire4_config = +{ + .usartbase = STM32_UART4_BASE, + .apbclock = STM32_PCLK1_FREQUENCY, + .data_pin = PIN_OPENDRAIN(GPIO_UART4_TX), + .irq = STM32_IRQ_UART4, + .vector = stm32_interrupt_1wire4, +}; + +static struct stm32_1wire_priv_s stm32_1wire4_priv = +{ + .config = &stm32_1wire4_config, + .refs = 0, + .msgs = NULL +}; + +#endif + +#ifdef CONFIG_STM32_UART5_1WIREDRIVER + +static const struct stm32_1wire_config_s stm32_1wire5_config = +{ + .usartbase = STM32_UART5_BASE, + .apbclock = STM32_PCLK1_FREQUENCY, + .data_pin = PIN_OPENDRAIN(GPIO_UART5_TX), + .irq = STM32_IRQ_UART5, + .vector = stm32_interrupt_1wire5, +}; + +static struct stm32_1wire_priv_s stm32_1wire5_priv = +{ + .config = &stm32_1wire5_config, + .refs = 0, + .msgs = NULL +}; + +#endif + +#ifdef CONFIG_STM32_USART6_1WIREDRIVER + +static const struct stm32_1wire_config_s stm32_1wire6_config = +{ + .usartbase = STM32_USART6_BASE, + .apbclock = STM32_PCLK2_FREQUENCY, + .data_pin = PIN_OPENDRAIN(GPIO_USART6_TX), + .irq = STM32_IRQ_USART6, + .vector = stm32_interrupt_1wire6, +}; + +static struct stm32_1wire_priv_s stm32_1wire6_priv = +{ + .config = &stm32_1wire6_config, + .refs = 0, + .msgs = NULL +}; + +#endif + +#ifdef CONFIG_STM32_UART7_1WIREDRIVER + +static const struct stm32_1wire_config_s stm32_1wire7_config = +{ + .usartbase = STM32_UART7_BASE, + .apbclock = STM32_PCLK1_FREQUENCY, + .data_pin = PIN_OPENDRAIN(GPIO_UART7_TX), + .irq = STM32_IRQ_UART7, + .vector = stm32_interrupt_1wire7, +}; + +static struct stm32_1wire_priv_s stm32_1wire7_priv = +{ + .config = &stm32_1wire7_config, + .refs = 0, + .msgs = NULL +}; + +#endif + +#ifdef CONFIG_STM32_UART8_1WIREDRIVER + +static const struct stm32_1wire_config_s stm32_1wire8_config = +{ + .usartbase = STM32_UART8_BASE, + .apbclock = STM32_PCLK1_FREQUENCY, + .data_pin = PIN_OPENDRAIN(GPIO_UART8_TX), + .irq = STM32_IRQ_UART8, + .vector = stm32_interrupt_1wire8, +}; + +static struct stm32_1wire_priv_s stm32_1wire8_priv = +{ + .config = &stm32_1wire8_config, + .refs = 0, + .msgs = NULL +}; + +#endif + +/* Device Structures, Instantiation */ + +static const struct onewire_ops_s stm32_1wire_ops = +{ + .reset = stm32_1wire_reset, + .write = stm32_1wire_write, + .read = stm32_1wire_read, + .exchange = stm32_1wire_exchange +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_1wire_in + ****************************************************************************/ + +static inline uint32_t stm32_1wire_in(struct stm32_1wire_priv_s *priv, + int offset) +{ + return getreg32(priv->config->usartbase + offset); +} + +/**************************************************************************** + * Name: stm32_1wire_out + ****************************************************************************/ + +static inline void stm32_1wire_out(struct stm32_1wire_priv_s *priv, + int offset, uint32_t value) +{ + putreg32(value, priv->config->usartbase + offset); +} + +/**************************************************************************** + * Name: stm32_1wire_recv + * + * Description: + * This method will recv one byte on the USART + * + ****************************************************************************/ + +static int stm32_1wire_recv(struct stm32_1wire_priv_s *priv) +{ + return stm32_1wire_in(priv, STM32_USART_RDR_OFFSET) & 0xff; +} + +/**************************************************************************** + * Name: stm32_1wire_send + * + * Description: + * This method will send one byte on the USART + * + ****************************************************************************/ + +static void stm32_1wire_send(struct stm32_1wire_priv_s *priv, int ch) +{ + stm32_1wire_out(priv, STM32_USART_TDR_OFFSET, (uint32_t)(ch & 0xff)); +} + +/**************************************************************************** + * Name: stm32_1wire_set_baud + * + * Description: + * Set the serial line baud. + * + ****************************************************************************/ + +static void stm32_1wire_set_baud(struct stm32_1wire_priv_s *priv) +{ +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) + /* This first implementation is for U[S]ARTs that support oversampling + * by 8 in additional to the standard oversampling by 16. + */ + + uint32_t usartdiv8; + uint32_t cr1; + uint32_t brr; + + /* In case of oversampling by 8, the equation is: + * + * baud = 2 * fCK / usartdiv8 + * usartdiv8 = 2 * fCK / baud + */ + + usartdiv8 = ((priv->config->apbclock << 1) + (priv->baud >> 1)) / priv->baud; + + /* Baud rate for standard USART (SPI mode included): + * + * In case of oversampling by 16, the equation is: + * baud = fCK / usartdiv16 + * usartdiv16 = fCK / baud + * = 2 * usartdiv8 + */ + + /* Use oversamply by 8 only if the divisor is small. But what is small? */ + + cr1 = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET); + if (usartdiv8 > 100) + { + /* Use usartdiv16 */ + + brr = (usartdiv8 + 1) >> 1; + + /* Clear oversampling by 8 to enable oversampling by 16 */ + + cr1 &= ~USART_CR1_OVER8; + } + else + { + DEBUGASSERT(usartdiv8 >= 8); + + /* Perform mysterious operations on bits 0-3 */ + + brr = ((usartdiv8 & 0xfff0) | ((usartdiv8 & 0x000f) >> 1)); + + /* Set oversampling by 8 */ + + cr1 |= USART_CR1_OVER8; + } + + stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, cr1); + stm32_1wire_out(priv, STM32_USART_BRR_OFFSET, brr); + +#else + + /* This second implementation is for U[S]ARTs that support fractional + * dividers. + */ + + uint32_t usartdiv32; + uint32_t mantissa; + uint32_t fraction; + uint32_t brr; + + /* Configure the USART Baud Rate. The baud rate for the receiver and + * transmitter (Rx and Tx) are both set to the same value as programmed + * in the Mantissa and Fraction values of USARTDIV. + * + * baud = fCK / (16 * usartdiv) + * usartdiv = fCK / (16 * baud) + * + * Where fCK is the input clock to the peripheral (PCLK1 for USART2, 3, 4, 5 + * or PCLK2 for USART1) + * + * First calculate (NOTE: all stand baud values are even so dividing by two + * does not lose precision): + * + * usartdiv32 = 32 * usartdiv = fCK / (baud/2) + */ + + usartdiv32 = priv->config->apbclock / (priv->baud >> 1); + + /* The mantissa part is then */ + + mantissa = usartdiv32 >> 5; + brr = mantissa << USART_BRR_MANT_SHIFT; + + /* The fractional remainder (with rounding) */ + + fraction = (usartdiv32 - (mantissa << 5) + 1) >> 1; + brr |= fraction << USART_BRR_FRAC_SHIFT; + stm32_1wire_out(priv, STM32_USART_BRR_OFFSET, brr); +#endif +} + +/**************************************************************************** + * Name: stm32_1wire_set_apb_clock + * + * Description: + * Enable or disable APB clock for the USART peripheral + * + * Input parameters: + * priv - A reference to the 1-Wire driver state structure + * on - Enable clock if 'on' is 'true' and disable if 'false' + * + ****************************************************************************/ + +static void stm32_1wire_set_apb_clock(struct stm32_1wire_priv_s *priv, + bool on) +{ + const struct stm32_1wire_config_s *config = priv->config; + uint32_t rcc_en; + uint32_t regaddr; + + /* Determine which USART to configure */ + + switch (config->usartbase) + { + default: + return; + +#ifdef CONFIG_STM32_USART1_1WIREDRIVER + case STM32_USART1_BASE: + rcc_en = RCC_APB2ENR_USART1EN; + regaddr = STM32_RCC_APB2ENR; + break; +#endif +#ifdef CONFIG_STM32_USART2_1WIREDRIVER + case STM32_USART2_BASE: + rcc_en = RCC_APB1ENR_USART2EN; + regaddr = STM32_RCC_APB1ENR; + break; +#endif +#ifdef CONFIG_STM32_USART3_1WIREDRIVER + case STM32_USART3_BASE: + rcc_en = RCC_APB1ENR_USART3EN; + regaddr = STM32_RCC_APB1ENR; + break; +#endif +#ifdef CONFIG_STM32_UART4 + case STM32_UART4_BASE: + rcc_en = RCC_APB1ENR_UART4EN; + regaddr = STM32_RCC_APB1ENR; + break; +#endif +#ifdef CONFIG_STM32_UART5 + case STM32_UART5_BASE: + rcc_en = RCC_APB1ENR_UART5EN; + regaddr = STM32_RCC_APB1ENR; + break; +#endif +#ifdef CONFIG_STM32_USART6_1WIREDRIVER + case STM32_USART6_BASE: + rcc_en = RCC_APB2ENR_USART6EN; + regaddr = STM32_RCC_APB2ENR; + break; +#endif +#ifdef CONFIG_STM32_UART7 + case STM32_UART7_BASE: + rcc_en = RCC_APB1ENR_UART7EN; + regaddr = STM32_RCC_APB1ENR; + break; +#endif +#ifdef CONFIG_STM32_UART8 + case STM32_UART8_BASE: + rcc_en = RCC_APB1ENR_UART8EN; + regaddr = STM32_RCC_APB1ENR; + break; +#endif + } + + /* Enable/disable APB 1/2 clock for USART */ + + if (on) + { + modifyreg32(regaddr, 0, rcc_en); + } + else + { + modifyreg32(regaddr, rcc_en, 0); + } +} + +/**************************************************************************** + * Name: stm32_1wire_init + * + * Description: + * Setup the 1-Wire hardware, ready for operation with defaults + * + ****************************************************************************/ + +static int stm32_1wire_init(FAR struct stm32_1wire_priv_s *priv) +{ + const struct stm32_1wire_config_s *config = priv->config; + uint32_t regval; + int ret; + + /* Enable USART APB1/2 clock */ + + stm32_1wire_set_apb_clock(priv, true); + + /* Configure CR2 */ + /* Clear STOP, CLKEN, CPOL, CPHA, LBCL, and interrupt enable bits */ + /* Set LBDIE */ + + regval = stm32_1wire_in(priv, STM32_USART_CR2_OFFSET); + regval &= ~(USART_CR2_STOP_MASK | USART_CR2_CLKEN | USART_CR2_CPOL | + USART_CR2_CPHA | USART_CR2_LBCL | USART_CR2_LBDIE); + regval |= USART_CR2_LBDIE; + stm32_1wire_out(priv, STM32_USART_CR2_OFFSET, regval); + + /* Configure CR1 */ + /* Clear TE, REm, all interrupt enable bits, PCE, PS and M */ + /* Set RXNEIE */ + + regval = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET); + regval &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_ALLINTS | + USART_CR1_PCE | USART_CR1_PS | USART_CR1_M); + regval |= USART_CR1_RXNEIE; + stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, regval); + + /* Configure CR3 */ + /* Clear CTSE, RTSE, and all interrupt enable bits */ + /* Set ONEBIT, HDSEL and EIE */ + + regval = stm32_1wire_in(priv, STM32_USART_CR3_OFFSET); + regval &= ~(USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE); + regval |= (USART_CR3_ONEBIT | USART_CR3_HDSEL | USART_CR3_EIE); + stm32_1wire_out(priv, STM32_USART_CR3_OFFSET, regval); + + /* Set baud rate */ + + priv->baud = RESET_BAUD; + stm32_1wire_set_baud(priv); + + /* Enable Rx, Tx, and the USART */ + + regval = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET); + regval |= (USART_CR1_UE | USART_CR1_TE | USART_CR1_RE); + stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, regval); + + /* Configure pins for USART use */ + + stm32_configgpio(config->data_pin); + + ret = irq_attach(config->irq, config->vector); + if (ret == OK) + { + up_enable_irq(config->irq); + } + + return ret; +} + +/**************************************************************************** + * Name: stm32_1wire_deinit + * + * Description: + * Shutdown the 1-Wire hardware + * + ****************************************************************************/ + +static int stm32_1wire_deinit(FAR struct stm32_1wire_priv_s *priv) +{ + const struct stm32_1wire_config_s *config = priv->config; + uint32_t regval; + + up_disable_irq(config->irq); + irq_detach(config->irq); + + /* Unconfigure GPIO pins */ + + stm32_unconfiggpio(config->data_pin); + + /* Disable RXNEIE, Rx, Tx, and the USART */ + + regval = stm32_1wire_in(priv, STM32_USART_CR1_OFFSET); + regval &= ~(USART_CR1_UE | USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE); + stm32_1wire_out(priv, STM32_USART_CR1_OFFSET, regval); + + /* Clear LBDIE */ + + regval = stm32_1wire_in(priv, STM32_USART_CR2_OFFSET); + regval &= ~USART_CR2_LBDIE; + stm32_1wire_out(priv, STM32_USART_CR2_OFFSET, regval); + + /* Clear ONEBIT, HDSEL and EIE */ + + regval = stm32_1wire_in(priv, STM32_USART_CR3_OFFSET); + regval &= ~(USART_CR3_ONEBIT | USART_CR3_HDSEL | USART_CR3_EIE); + stm32_1wire_out(priv, STM32_USART_CR3_OFFSET, regval); + + /* Disable USART APB1/2 clock */ + + stm32_1wire_set_apb_clock(priv, false); + + return OK; +} + +/**************************************************************************** + * Name: stm32_1wire_sem_init + * + * Description: + * Initialize semaphores + * + ****************************************************************************/ + +static inline void stm32_1wire_sem_init(FAR struct stm32_1wire_priv_s *priv) +{ + sem_init(&priv->sem_excl, 0, 1); + sem_init(&priv->sem_isr, 0, 0); +} + +/**************************************************************************** + * Name: stm32_1wire_sem_destroy + * + * Description: + * Destroy semaphores. + * + ****************************************************************************/ + +static inline void stm32_1wire_sem_destroy(FAR struct stm32_1wire_priv_s *priv) +{ + sem_destroy(&priv->sem_excl); + sem_destroy(&priv->sem_isr); +} + +/**************************************************************************** + * Name: stm32_1wire_sem_wait + * + * Description: + * Take the exclusive access, waiting as necessary + * + ****************************************************************************/ + +static inline void stm32_1wire_sem_wait(FAR struct stm32_1wire_priv_s *priv) +{ + while (sem_wait(&priv->sem_excl) != 0) + { + ASSERT(errno == EINTR); + } +} + +/**************************************************************************** + * Name: stm32_1wire_sem_post + * + * Description: + * Release the mutual exclusion semaphore + * + ****************************************************************************/ + +static inline void stm32_1wire_sem_post(FAR struct stm32_1wire_priv_s *priv) +{ + sem_post(&priv->sem_excl); +} + +/**************************************************************************** + * Name: stm32_1wire_exec + * + * Description: + * Execute 1-Wire task + ****************************************************************************/ +static int stm32_1wire_process(struct stm32_1wire_priv_s *priv, + FAR const struct stm32_1wire_msg_s *msgs, + int count) +{ + irqstate_t irqs; + struct timespec abstime; + int indx; + int ret; + + /* Lock out other clients */ + + stm32_1wire_sem_wait(priv); + + priv->result = ERROR; + + for (indx = 0; indx < count; indx++) + { + switch (msgs[indx].task) + { + case ONEWIRETASK_NONE: + priv->result = OK; + break; + + case ONEWIRETASK_RESET: + /* Set baud rate */ + + priv->baud = RESET_BAUD; + stm32_1wire_set_baud(priv); + + /* Atomic */ + + irqs = enter_critical_section(); + priv->msgs = &msgs[indx]; + stm32_1wire_send(priv, RESET_TX); + leave_critical_section(irqs); + + /* Wait */ + + clock_gettime(CLOCK_REALTIME, &abstime); + abstime.tv_sec += BUS_TIMEOUT; + sem_timedwait(&priv->sem_isr, &abstime); /* break on timeout if TX line closed to GND */ + break; + + case ONEWIRETASK_WRITE: + /* Set baud rate */ + + priv->baud = TIMESLOT_BAUD; + stm32_1wire_set_baud(priv); + + /* Atomic */ + + irqs = enter_critical_section(); + priv->msgs = &msgs[indx]; + priv->byte = priv->msgs->buffer; + priv->bit = 0; + stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0); + leave_critical_section(irqs); + + /* Wait */ + + clock_gettime(CLOCK_REALTIME, &abstime); + abstime.tv_sec += BUS_TIMEOUT; + sem_timedwait(&priv->sem_isr, &abstime); /* break on timeout if TX line closed to GND */ + break; + + case ONEWIRETASK_READ: + /* Set baud rate */ + + priv->baud = TIMESLOT_BAUD; + stm32_1wire_set_baud(priv); + + /* Atomic */ + + irqs = enter_critical_section(); + priv->msgs = &msgs[indx]; + priv->byte = priv->msgs->buffer; + priv->bit = 0; + stm32_1wire_send(priv, READ_TX); + leave_critical_section(irqs); + + /* Wait */ + + clock_gettime(CLOCK_REALTIME, &abstime); + abstime.tv_sec += BUS_TIMEOUT; + sem_timedwait(&priv->sem_isr, &abstime); /* break on timeout if TX line closed to GND */ + break; + } + + if (priv->result != OK) /* break if error */ + { + break; + } + } + + /* Atomic */ + + irqs = enter_critical_section(); + priv->msgs = NULL; + ret = priv->result; + leave_critical_section(irqs); + + /* Release the port for re-use by other clients */ + + stm32_1wire_sem_post(priv); + + return ret; +} + +/**************************************************************************** + * Name: stm32_1wire_isr + * + * Description: + * Common Interrupt Service Routine + ****************************************************************************/ + +static int stm32_1wire_isr(struct stm32_1wire_priv_s *priv) +{ + uint32_t sr, dr; + + /* Get the masked USART status word. */ + + sr = stm32_1wire_in(priv, STM32_USART_SR_OFFSET); + + /* Receive loop */ + + if ((sr & USART_SR_RXNE) != 0) + { + dr = stm32_1wire_recv(priv); + + if (priv->msgs != NULL) + { + switch (priv->msgs->task) + { + case ONEWIRETASK_NONE: + break; + + case ONEWIRETASK_RESET: + priv->msgs = NULL; + priv->result = (dr != RESET_TX) ? OK : -ENODEV; /* if read RESET_TX then no slave */ + sem_post(&priv->sem_isr); + break; + + case ONEWIRETASK_WRITE: + if (++priv->bit >= 8) + { + priv->bit = 0; + if (++priv->byte >= (priv->msgs->buffer + priv->msgs->buflen)) /* Done? */ + { + priv->msgs = NULL; + priv->result = OK; + sem_post(&priv->sem_isr); + break; + } + } + + /* Send next bit */ + + stm32_1wire_send(priv, (*priv->byte & (1 << priv->bit)) ? WRITE_TX1 : WRITE_TX0); + break; + + case ONEWIRETASK_READ: + if (dr == READ_RX1) + { + *priv->byte |= (1 << priv->bit); + } + else + { + *priv->byte &= ~(1 << priv->bit); + } + + if (++priv->bit >= 8) + { + priv->bit = 0; + if (++priv->byte >= (priv->msgs->buffer + priv->msgs->buflen)) /* Done? */ + { + priv->msgs = NULL; + priv->result = OK; + sem_post(&priv->sem_isr); + break; + } + } + + /* Recv next bit */ + + stm32_1wire_send(priv, READ_TX); + break; + } + } + } + + /* Bounce check. */ + + if ((sr & (USART_SR_ORE | USART_SR_NE | USART_SR_FE)) != 0) + { +#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) + /* These errors are cleared by writing the corresponding bit to the + * interrupt clear register (ICR). + */ + + stm32_1wire_out(priv, STM32_USART_ICR_OFFSET, + (USART_ICR_NCF | USART_ICR_ORECF | USART_ICR_FECF)); +#else + /* If an error occurs, read from DR to clear the error (data has + * been lost). If ORE is set along with RXNE then it tells you + * that the byte *after* the one in the data register has been + * lost, but the data register value is correct. That case will + * be handled above if interrupts are enabled. Otherwise, that + * good byte will be lost. + */ + + (void)stm32_1wire_recv(priv); +#endif + + if (priv->msgs != NULL) + { + priv->msgs = NULL; + priv->result = ERROR; + sem_post(&priv->sem_isr); + } + } + + /* Bounce check. LIN break detection */ + + if ((sr & USART_SR_LBD) != 0) + { + sr &= ~USART_SR_LBD; + stm32_1wire_out(priv, STM32_USART_SR_OFFSET, sr); + + if (priv->msgs != NULL) + { + priv->msgs = NULL; + priv->result = ERROR; + sem_post(&priv->sem_isr); + } + } + + return OK; +} + +#ifdef CONFIG_STM32_USART1_1WIREDRIVER +static int stm32_interrupt_1wire1(int irq, void *context) +{ + return stm32_1wire_isr(&stm32_1wire1_priv); +} +#endif +#ifdef CONFIG_STM32_USART2_1WIREDRIVER +static int stm32_interrupt_1wire2(int irq, void *context) +{ + return stm32_1wire_isr(&stm32_1wire2_priv); +} +#endif +#ifdef CONFIG_STM32_USART3_1WIREDRIVER +static int stm32_interrupt_1wire3(int irq, void *context) +{ + return stm32_1wire_isr(&stm32_1wire3_priv); +} +#endif +#ifdef CONFIG_STM32_UART4_1WIREDRIVER +static int stm32_interrupt_1wire4(int irq, void *context) +{ + return stm32_1wire_isr(&stm32_1wire4_priv); +} +#endif +#ifdef CONFIG_STM32_UART5_1WIREDRIVER +static int stm32_interrupt_1wire5(int irq, void *context) +{ + return stm32_1wire_isr(&stm32_1wire5_priv); +} +#endif +#ifdef CONFIG_STM32_USART6_1WIREDRIVER +static int stm32_interrupt_1wire6(int irq, void *context) +{ + return stm32_1wire_isr(&stm32_1wire6_priv); +} +#endif +#ifdef CONFIG_STM32_UART7_1WIREDRIVER +static int stm32_interrupt_1wire7(int irq, void *context) +{ + return stm32_1wire_isr(&stm32_1wire7_priv); +} +#endif +#ifdef CONFIG_STM32_UART8_1WIREDRIVER +static int stm32_interrupt_1wire8(int irq, void *context) +{ + return stm32_1wire_isr(&stm32_1wire8_priv); +} +#endif + +/**************************************************************************** + * Name: stm32_1wire_reset + * + * Description: + * 1-Wire reset pulse and presence detect. + * + ****************************************************************************/ + +static int stm32_1wire_reset(FAR struct onewire_dev_s *dev) +{ + struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv; + const struct stm32_1wire_msg_s msgs[1] = + { + [0].task = ONEWIRETASK_RESET + }; + + return stm32_1wire_process(priv, msgs, 1); +} + +/**************************************************************************** + * Name: stm32_1wire_write + * + * Description: + * Write 1-Wire data + * + ****************************************************************************/ + +static int stm32_1wire_write(FAR struct onewire_dev_s *dev, const uint8_t *buffer, + int buflen) +{ + struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv; + const struct stm32_1wire_msg_s msgs[1] = + { + [0].task = ONEWIRETASK_WRITE, + [0].buffer = (uint8_t *)buffer, + [0].buflen = buflen + }; + + return stm32_1wire_process(priv, msgs, 1); +} + +/**************************************************************************** + * Name: stm32_1wire_read + * + * Description: + * Read 1-Wire data + * + ****************************************************************************/ + +static int stm32_1wire_read(FAR struct onewire_dev_s *dev, uint8_t *buffer, int buflen) +{ + struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv; + const struct stm32_1wire_msg_s msgs[1] = + { + [0].task = ONEWIRETASK_READ, + [0].buffer = buffer, + [0].buflen = buflen + }; + + return stm32_1wire_process(priv, msgs, 1); +} + +/**************************************************************************** + * Name: stm32_1wire_exchange + * + * Description: + * 1-Wire reset pulse and presence detect, + * Write 1-Wire data, + * Read 1-Wire data + * + ****************************************************************************/ + +static int stm32_1wire_exchange(FAR struct onewire_dev_s *dev, bool reset, + const uint8_t *txbuffer, int txbuflen, + uint8_t *rxbuffer, int rxbuflen) + +{ + int result = ERROR; + struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv; + + if (reset) + { + const struct stm32_1wire_msg_s msgs[3] = + { + [0].task = ONEWIRETASK_RESET, + + [1].task = ONEWIRETASK_WRITE, + [1].buffer = (uint8_t *)txbuffer, + [1].buflen = txbuflen, + + [2].task = ONEWIRETASK_READ, + [2].buffer = rxbuffer, + [2].buflen = rxbuflen + }; + + result = stm32_1wire_process(priv, msgs, 3); + } + else + { + const struct stm32_1wire_msg_s msgs[2] = + { + [0].task = ONEWIRETASK_WRITE, + [0].buffer = (uint8_t *)txbuffer, + [0].buflen = txbuflen, + + [1].task = ONEWIRETASK_READ, + [1].buffer = rxbuffer, + [1].buflen = rxbuflen + }; + + result = stm32_1wire_process(priv, msgs, 2); + } + return result; +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: stm32_1wireinitialize + * + * Description: + * Initialize the selected 1-Wire port. And return a unique instance of struct + * struct onewire_dev_s. This function may be called to obtain multiple + * instances of the interface, each of which may be set up with a + * different frequency and slave address. + * + * Input Parameter: + * Port number (for hardware that has multiple 1-Wire interfaces) + * + * Returned Value: + * Valid 1-Wire device structure reference on succcess; a NULL on failure + * + ****************************************************************************/ + +FAR struct onewire_dev_s *stm32_1wireinitialize(int port) +{ + struct stm32_1wire_priv_s *priv = NULL; /* Private data of device with multiple instances */ + struct stm32_1wire_inst_s *inst = NULL; /* Device, single instance */ + int irqs; + + /* Get 1-Wire private structure */ + + switch (port) + { +#ifdef CONFIG_STM32_USART1_1WIREDRIVER + case 1: + priv = &stm32_1wire1_priv; + break; +#endif +#ifdef CONFIG_STM32_USART2_1WIREDRIVER + case 2: + priv = &stm32_1wire2_priv; + break; +#endif +#ifdef CONFIG_STM32_USART3_1WIREDRIVER + case 3: + priv = &stm32_1wire3_priv; + break; +#endif +#ifdef CONFIG_STM32_UART4_1WIREDRIVER + case 4: + priv = &stm32_1wire4_priv; + break; +#endif +#ifdef CONFIG_STM32_UART5_1WIREDRIVER + case 5: + priv = &stm32_1wire5_priv; + break; +#endif +#ifdef CONFIG_STM32_USART6_1WIREDRIVER + case 6: + priv = &stm32_1wire6_priv; + break; +#endif +#ifdef CONFIG_STM32_UART7_1WIREDRIVER + case 7: + priv = &stm32_1wire7_priv; + break; +#endif +#ifdef CONFIG_STM32_UART8_1WIREDRIVER + case 8: + priv = &stm32_1wire8_priv; + break; +#endif + default: + return NULL; + } + + /* Allocate instance */ + + if (!(inst = kmm_malloc(sizeof(struct stm32_1wire_inst_s)))) + { + return NULL; + } + + /* Initialize instance */ + + inst->ops = &stm32_1wire_ops; + inst->priv = priv; + + /* Initialize private data for the first time, increment reference count, + * power-up hardware and configure GPIOs. + */ + + irqs = enter_critical_section(); + + if (priv->refs++ == 0) + { + stm32_1wire_sem_init(priv); + stm32_1wire_init(priv); + } + + leave_critical_section(irqs); + return (struct onewire_dev_s *)inst; +} + +/**************************************************************************** + * Name: stm32_1wireuninitialize + * + * Description: + * De-initialize the selected 1-Wire port, and power down the device. + * + * Input Parameter: + * Device structure as returned by the stm32_1wireinitialize() + * + * Returned Value: + * OK on success, ERROR when internal reference count mismatch or dev + * points to invalid hardware device. + * + ****************************************************************************/ + +int stm32_1wireuninitialize(FAR struct onewire_dev_s *dev) +{ + struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv; + int irqs; + + ASSERT(dev); + + /* Decrement reference count and check for underflow */ + + if (priv->refs == 0) + { + return ERROR; + } + + irqs = enter_critical_section(); + + if (--priv->refs) + { + leave_critical_section(irqs); + kmm_free(priv); + return OK; + } + + leave_critical_section(irqs); + + /* Disable power and other HW resource (GPIO's) */ + + stm32_1wire_deinit(priv); + + /* Release unused resources */ + + stm32_1wire_sem_destroy(priv); + + /* Free instance */ + + kmm_free(dev); + return OK; +} + +#endif /* HAVE_1WIREDRIVER */ diff --git a/arch/arm/src/lpc11xx/lpc11_lowgetc.h b/arch/arm/src/stm32/stm32_1wire.h similarity index 62% rename from arch/arm/src/lpc11xx/lpc11_lowgetc.h rename to arch/arm/src/stm32/stm32_1wire.h index 4c94f39b784..24cfe45592f 100644 --- a/arch/arm/src/lpc11xx/lpc11_lowgetc.h +++ b/arch/arm/src/stm32/stm32_1wire.h @@ -1,8 +1,8 @@ /************************************************************************************ - * arch/arm/src/lpc11/lpc11_lowgetc.h + * arch/arm/src/stm32/stm32_1wire.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. + * Author: Aleksandr Vyhovanec * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -33,50 +33,55 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_SRC_LPC11XX_LPC11_LOWGETC_H -#define __ARCH_ARM_SRC_LPC11XX_LPC11_LOWGETC_H +#ifndef __ARCH_ARM_SRC_STM32_STM32_1WIRE_H +#define __ARCH_ARM_SRC_STM32_STM32_1WIRE_H /************************************************************************************ * Included Files ************************************************************************************/ #include -#include "lpc11_serial.h" + +#include "stm32_uart.h" /************************************************************************************ - * Pre-processor Definitions + * Public Function Prototypes ************************************************************************************/ -/************************************************************************************ - * Public Types - ************************************************************************************/ +/**************************************************************************** + * Name: stm32_1wireinitialize + * + * Description: + * Initialize the selected 1-Wire port. And return a unique instance of struct + * struct onewire_dev_s. This function may be called to obtain multiple + * instances of the interface, each of which may be set up with a + * different frequency and slave address. + * + * Input Parameter: + * Port number (for hardware that has multiple 1-Wire interfaces) + * + * Returned Value: + * Valid 1-Wire device structure reference on succcess; a NULL on failure + * + ****************************************************************************/ -/************************************************************************************ - * Public Data - ************************************************************************************/ +FAR struct onewire_dev_s *stm32_1wireinitialize(int port); -#ifndef __ASSEMBLY__ +/**************************************************************************** + * Name: stm32_1wireuninitialize + * + * Description: + * De-initialize the selected 1-Wire port, and power down the device. + * + * Input Parameter: + * Device structure as returned by the stm32_1wireinitialize() + * + * Returned Value: + * OK on success, ERROR when internal reference count mismatch or dev + * points to invalid hardware device. + * + ****************************************************************************/ -#undef EXTERN -#if defined(__cplusplus) -#define EXTERN extern "C" -extern "C" -{ -#else -#define EXTERN extern -#endif +int stm32_1wireuninitialize(FAR struct onewire_dev_s *dev); -/************************************************************************************ - * Public Functions - ************************************************************************************/ - -#ifdef HAVE_SERIAL_CONSOLE -int lpc11_lowgetc(void); -#endif - -#undef EXTERN -#if defined(__cplusplus) -} -#endif -#endif /* __ASSEMBLY__ */ -#endif /* __ARCH_ARM_SRC_LPC11XX_LPC11_LOWGETC_H */ +#endif /* __ARCH_ARM_SRC_STM32_STM32_1WIRE_H */ diff --git a/arch/arm/src/stm32/stm32_adc.c b/arch/arm/src/stm32/stm32_adc.c index a2d97cf51cd..5e34110fc91 100644 --- a/arch/arm/src/stm32/stm32_adc.c +++ b/arch/arm/src/stm32/stm32_adc.c @@ -69,7 +69,7 @@ /* ADC "upper half" support must be enabled */ -#ifdef CONFIG_ADC +#ifdef CONFIG_STM32_ADC /* Some ADC peripheral must be enabled */ @@ -272,6 +272,7 @@ struct stm32_dev_s { + FAR const struct adc_callback_s *cb; uint8_t irq; /* Interrupt generated by this ADC block */ uint8_t nchannels; /* Number of channels */ uint8_t cchannels; /* Number of configured channels */ @@ -343,27 +344,27 @@ static void adc_rccreset(FAR struct stm32_dev_s *priv, bool reset); /* ADC Interrupt Handler */ static int adc_interrupt(FAR struct adc_dev_s *dev); -#ifdef CONFIG_STM32_STM32L15XX +#if defined(STM32_IRQ_ADC1) && defined(CONFIG_STM32_ADC1) static int adc1_interrupt(int irq, FAR void *context); #endif -#if (defined(CONFIG_STM32_STM32F10XX) || \ - defined(CONFIG_STM32_STM32F30XX)) && \ - (defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2)) +#if defined(STM32_IRQ_ADC12) && (defined(CONFIG_STM32_ADC1) || \ + defined(CONFIG_STM32_ADC2)) static int adc12_interrupt(int irq, FAR void *context); #endif -#if (defined(CONFIG_STM32_STM32F10XX) || \ - defined(CONFIG_STM32_STM32F30XX)) && defined(CONFIG_STM32_ADC3) +#if (defined(STM32_IRQ_ADC3) && defined(CONFIG_STM32_ADC3)) static int adc3_interrupt(int irq, FAR void *context); #endif -#if defined(CONFIG_STM32_STM32F30XX) && defined(CONFIG_STM32_ADC4) +#if defined(STM32_IRQ_ADC4) && defined(CONFIG_STM32_ADC4) static int adc4_interrupt(int irq, FAR void *context); #endif -#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#if defined(STM32_IRQ_ADC) static int adc123_interrupt(int irq, FAR void *context); #endif /* ADC Driver Methods */ +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); static void adc_reset(FAR struct adc_dev_s *dev); static int adc_setup(FAR struct adc_dev_s *dev); static void adc_shutdown(FAR struct adc_dev_s *dev); @@ -412,6 +413,7 @@ static void adc_startconv(FAR struct stm32_dev_s *priv, bool enable); static const struct adc_ops_s g_adcops = { + .ao_bind = adc_bind, #if defined(CONFIG_STM32_STM32L15XX) && \ (STM32_CFGR_PLLSRC != 0 || STM32_SYSCLK_SW != RCC_CFGR_SW_HSI) .ao_reset = adc_reset_hsi_disable, @@ -429,15 +431,17 @@ static const struct adc_ops_s g_adcops = #ifdef CONFIG_STM32_ADC1 static struct stm32_dev_s g_adcpriv1 = { -#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) - .irq = STM32_IRQ_ADC12, - .isr = adc12_interrupt, -#elif defined(CONFIG_STM32_STM32L15XX) +#if defined(STM32_IRQ_ADC1) .irq = STM32_IRQ_ADC1, .isr = adc1_interrupt, -#else +#elif defined(STM32_IRQ_ADC12) + .irq = STM32_IRQ_ADC12, + .isr = adc12_interrupt, +#elif defined(STM32_IRQ_ADC) .irq = STM32_IRQ_ADC, .isr = adc123_interrupt, +#else +# error "No STM32_IRQ_ADC1 STM32_IRQ_ADC12 or STM32_IRQ_ADC defined for CONFIG_STM32_ADC1" #endif .intf = 1, .base = STM32_ADC1_BASE, @@ -466,12 +470,14 @@ static struct adc_dev_s g_adcdev1 = #ifdef CONFIG_STM32_ADC2 static struct stm32_dev_s g_adcpriv2 = { -#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) +#if defined(STM32_IRQ_ADC12) .irq = STM32_IRQ_ADC12, .isr = adc12_interrupt, -#else +#elif defined(STM32_IRQ_ADC) .irq = STM32_IRQ_ADC, .isr = adc123_interrupt, +#else +# error "No STM32_IRQ_ADC12 or STM32_IRQ_ADC defined for CONFIG_STM32_ADC2" #endif .intf = 2, .base = STM32_ADC2_BASE, @@ -500,12 +506,14 @@ static struct adc_dev_s g_adcdev2 = #ifdef CONFIG_STM32_ADC3 static struct stm32_dev_s g_adcpriv3 = { -#if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) +#if defined(STM32_IRQ_ADC3) .irq = STM32_IRQ_ADC3, .isr = adc3_interrupt, -#else +#elif defined(STM32_IRQ_ADC) .irq = STM32_IRQ_ADC, .isr = adc123_interrupt, +#else +# error "No STM32_IRQ_ADC3 or STM32_IRQ_ADC defined for CONFIG_STM32_ADC3" #endif .intf = 3, .base = STM32_ADC3_BASE, @@ -1641,15 +1649,22 @@ static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg) FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv; int i; - for (i = 0; i < priv->nchannels; i++) - { - adc_receive(dev, priv->current, priv->dmabuffer[priv->current]); - priv->current++; - if (priv->current >= priv->nchannels) - { - /* Restart the conversion sequence from the beginning */ + /* Verify that the upper-half driver has bound its callback functions */ - priv->current = 0; + if (priv->cb != NULL) + { + DEBUGASSERT(priv->cb->au_receive != NULL); + + for (i = 0; i < priv->nchannels; i++) + { + priv->cb->au_receive(dev, priv->current, priv->dmabuffer[priv->current]); + priv->current++; + if (priv->current >= priv->nchannels) + { + /* Restart the conversion sequence from the beginning */ + + priv->current = 0; + } } } @@ -1660,6 +1675,25 @@ static void adc_dmaconvcallback(DMA_HANDLE handle, uint8_t isr, FAR void *arg) } #endif +/**************************************************************************** + * Name: adc_bind + * + * Description: + * Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + * + ****************************************************************************/ + +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback) +{ + FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + priv->cb = callback; + return OK; +} + /**************************************************************************** * Name: adc_reset * @@ -2702,15 +2736,21 @@ static int adc_interrupt(FAR struct adc_dev_s *dev) data = adc_getreg(priv, STM32_ADC_DR_OFFSET) & ADC_DR_RDATA_MASK; - /* Give the ADC data to the ADC driver. adc_receive() accepts 3 - * parameters: - * - * 1) The first is the ADC device instance for this ADC block. - * 2) The second is the channel number for the data, and - * 3) The third is the converted data for the channel. - */ + /* Verify that the upper-half driver has bound its callback functions */ - adc_receive(dev, priv->chanlist[priv->current], data); + if (priv->cb != NULL) + { + /* Give the ADC data to the ADC driver. The ADC receive() method + * accepts 3 parameters: + * + * 1) The first is the ADC device instance for this ADC block. + * 2) The second is the channel number for the data, and + * 3) The third is the converted data for the channel. + */ + + DEBUGASSERT(priv->cb->au_receive != NULL); + priv->cb->au_receive(dev, priv->chanlist[priv->current], data); + } /* Set the channel number of the next channel that will complete * conversion. @@ -2745,7 +2785,7 @@ static int adc_interrupt(FAR struct adc_dev_s *dev) * ****************************************************************************/ -#ifdef CONFIG_STM32_STM32L15XX +#if defined(STM32_IRQ_ADC1) static int adc1_interrupt(int irq, FAR void *context) { adc_interrupt(&g_adcdev1); @@ -2766,8 +2806,7 @@ static int adc1_interrupt(int irq, FAR void *context) * ****************************************************************************/ -#if (defined(CONFIG_STM32_STM32F10XX) || \ - defined(CONFIG_STM32_STM32F30XX)) && \ +#if defined(STM32_IRQ_ADC12) && \ (defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2)) static int adc12_interrupt(int irq, FAR void *context) { @@ -2795,8 +2834,7 @@ static int adc12_interrupt(int irq, FAR void *context) * ****************************************************************************/ -#if (defined(CONFIG_STM32_STM32F10XX) || \ - defined(CONFIG_STM32_STM32F30XX)) && defined(CONFIG_STM32_ADC3) +#if defined(STM32_IRQ_ADC3) && defined(CONFIG_STM32_ADC3) static int adc3_interrupt(int irq, FAR void *context) { adc_interrupt(&g_adcdev3); @@ -2817,13 +2855,10 @@ static int adc3_interrupt(int irq, FAR void *context) * ****************************************************************************/ -#if defined(CONFIG_STM32_STM32F30XX) && defined(CONFIG_STM32_ADC4) +#if defined(STM32_IRQ_ADC4) && defined(CONFIG_STM32_ADC4) static int adc4_interrupt(int irq, FAR void *context) { -#ifdef CONFIG_STM32_ADC4 adc_interrupt(&g_adcdev4); -#endif - return OK; } #endif @@ -2840,7 +2875,7 @@ static int adc4_interrupt(int irq, FAR void *context) * ****************************************************************************/ -#if defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX) +#if defined(STM32_IRQ_ADC) static int adc123_interrupt(int irq, FAR void *context) { #ifdef CONFIG_STM32_ADC1 @@ -2995,6 +3030,7 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist, DEBUGASSERT(cchannels <= ADC_MAX_SAMPLES); + priv->cb = NULL; priv->cchannels = cchannels; memcpy(priv->chanlist, chanlist, cchannels); @@ -3009,4 +3045,4 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist, #endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || * CONFIG_STM32_ADC3 || CONFIG_STM32_ADC4 */ -#endif /* CONFIG_ADC */ +#endif /* CONFIG_STM32_ADC */ diff --git a/arch/arm/src/stm32/stm32_can.c b/arch/arm/src/stm32/stm32_can.c index 8628b2fa79b..8cb61decf14 100644 --- a/arch/arm/src/stm32/stm32_can.c +++ b/arch/arm/src/stm32/stm32_can.c @@ -4,6 +4,9 @@ * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * + * Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved. + * Author: Paul Alexander Patience + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: @@ -103,13 +106,13 @@ struct stm32_can_s { - uint8_t port; /* CAN port number (1 or 2) */ - uint8_t canrx0; /* CAN RX FIFO 0 IRQ number */ - uint8_t cantx; /* CAN TX IRQ number */ - uint8_t filter; /* Filter number */ - uint32_t base; /* Base address of the CAN control registers */ - uint32_t fbase; /* Base address of the CAN filter registers */ - uint32_t baud; /* Configured baud */ + uint8_t port; /* CAN port number (1 or 2) */ + uint8_t canrx[2]; /* CAN RX FIFO 0/1 IRQ number */ + uint8_t cantx; /* CAN TX IRQ number */ + uint8_t filter; /* Filter number */ + uint32_t base; /* Base address of the CAN control registers */ + uint32_t fbase; /* Base address of the CAN filter registers */ + uint32_t baud; /* Configured baud */ }; /**************************************************************************** @@ -118,14 +121,19 @@ struct stm32_can_s /* CAN Register access */ -static uint32_t can_getreg(struct stm32_can_s *priv, int offset); -static uint32_t can_getfreg(struct stm32_can_s *priv, int offset); -static void can_putreg(struct stm32_can_s *priv, int offset, uint32_t value); -static void can_putfreg(struct stm32_can_s *priv, int offset, uint32_t value); +static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset); +static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset); +static void can_putreg(FAR struct stm32_can_s *priv, int offset, + uint32_t value); +static void can_putfreg(FAR struct stm32_can_s *priv, int offset, + uint32_t value); #ifdef CONFIG_CAN_REGDEBUG -static void can_dumpctrlregs(struct stm32_can_s *priv, FAR const char *msg); -static void can_dumpmbregs(struct stm32_can_s *priv, FAR const char *msg); -static void can_dumpfiltregs(struct stm32_can_s *priv, FAR const char *msg); +static void can_dumpctrlregs(FAR struct stm32_can_s *priv, + FAR const char *msg); +static void can_dumpmbregs(FAR struct stm32_can_s *priv, + FAR const char *msg); +static void can_dumpfiltregs(FAR struct stm32_can_s *priv, + FAR const char *msg); #else # define can_dumpctrlregs(priv,msg) # define can_dumpmbregs(priv,msg) @@ -147,14 +155,16 @@ static bool can_txempty(FAR struct can_dev_s *dev); /* CAN interrupt handling */ -static int can_rx0interrupt(int irq, void *context); -static int can_txinterrupt(int irq, void *context); +static int can_rxinterrupt(int irq, FAR void *context, int rxmb); +static int can_rx0interrupt(int irq, FAR void *context); +static int can_rx1interrupt(int irq, FAR void *context); +static int can_txinterrupt(int irq, FAR void *context); /* Initialization */ -static int can_bittiming(struct stm32_can_s *priv); -static int can_cellinit(struct stm32_can_s *priv); -static int can_filterinit(struct stm32_can_s *priv); +static int can_bittiming(FAR struct stm32_can_s *priv); +static int can_cellinit(FAR struct stm32_can_s *priv); +static int can_filterinit(FAR struct stm32_can_s *priv); /**************************************************************************** * Private Data @@ -178,7 +188,11 @@ static const struct can_ops_s g_canops = static struct stm32_can_s g_can1priv = { .port = 1, - .canrx0 = STM32_IRQ_CAN1RX0, + .canrx = + { + STM32_IRQ_CAN1RX0, + STM32_IRQ_CAN1RX1, + }, .cantx = STM32_IRQ_CAN1TX, .filter = 0, .base = STM32_CAN1_BASE, @@ -197,7 +211,11 @@ static struct can_dev_s g_can1dev = static struct stm32_can_s g_can2priv = { .port = 2, - .canrx0 = STM32_IRQ_CAN2RX0, + .canrx = + { + STM32_IRQ_CAN2RX0, + STM32_IRQ_CAN2RX1, + }, .cantx = STM32_IRQ_CAN2TX, .filter = CAN_NFILTERS / 2, .base = STM32_CAN2_BASE, @@ -285,23 +303,23 @@ static uint32_t can_vgetreg(uint32_t addr) return val; } -static uint32_t can_getreg(struct stm32_can_s *priv, int offset) +static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset) { return can_vgetreg(priv->base + offset); } -static uint32_t can_getfreg(struct stm32_can_s *priv, int offset) +static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset) { return can_vgetreg(priv->fbase + offset); } #else -static uint32_t can_getreg(struct stm32_can_s *priv, int offset) +static uint32_t can_getreg(FAR struct stm32_can_s *priv, int offset) { return getreg32(priv->base + offset); } -static uint32_t can_getfreg(struct stm32_can_s *priv, int offset) +static uint32_t can_getfreg(FAR struct stm32_can_s *priv, int offset) { return getreg32(priv->fbase + offset); } @@ -338,23 +356,27 @@ static void can_vputreg(uint32_t addr, uint32_t value) putreg32(value, addr); } -static void can_putreg(struct stm32_can_s *priv, int offset, uint32_t value) +static void can_putreg(FAR struct stm32_can_s *priv, int offset, + uint32_t value) { can_vputreg(priv->base + offset, value); } -static void can_putfreg(struct stm32_can_s *priv, int offset, uint32_t value) +static void can_putfreg(FAR struct stm32_can_s *priv, int offset, + uint32_t value) { can_vputreg(priv->fbase + offset, value); } #else -static void can_putreg(struct stm32_can_s *priv, int offset, uint32_t value) +static void can_putreg(FAR struct stm32_can_s *priv, int offset, + uint32_t value) { putreg32(value, priv->base + offset); } -static void can_putfreg(struct stm32_can_s *priv, int offset, uint32_t value) +static void can_putfreg(FAR struct stm32_can_s *priv, int offset, + uint32_t value) { putreg32(value, priv->fbase + offset); } @@ -375,7 +397,8 @@ static void can_putfreg(struct stm32_can_s *priv, int offset, uint32_t value) ****************************************************************************/ #ifdef CONFIG_CAN_REGDEBUG -static void can_dumpctrlregs(struct stm32_can_s *priv, FAR const char *msg) +static void can_dumpctrlregs(FAR struct stm32_can_s *priv, + FAR const char *msg) { if (msg) { @@ -419,7 +442,8 @@ static void can_dumpctrlregs(struct stm32_can_s *priv, FAR const char *msg) ****************************************************************************/ #ifdef CONFIG_CAN_REGDEBUG -static void can_dumpmbregs(struct stm32_can_s *priv, FAR const char *msg) +static void can_dumpmbregs(FAR struct stm32_can_s *priv, + FAR const char *msg) { if (msg) { @@ -479,7 +503,8 @@ static void can_dumpmbregs(struct stm32_can_s *priv, FAR const char *msg) ****************************************************************************/ #ifdef CONFIG_CAN_REGDEBUG -static void can_dumpfiltregs(struct stm32_can_s *priv, FAR const char *msg) +static void can_dumpfiltregs(FAR struct stm32_can_s *priv, + FAR const char *msg) { int i; @@ -553,8 +578,8 @@ static void can_reset(FAR struct can_dev_s *dev) return; } - /* Disable interrupts momentary to stop any ongoing CAN event processing and - * to prevent any concurrent access to the AHB1RSTR register. + /* Disable interrupts momentarily to stop any ongoing CAN event processing + * and to prevent any concurrent access to the AHB1RSTR register. */ flags = enter_critical_section(); @@ -592,7 +617,8 @@ static int can_setup(FAR struct can_dev_s *dev) FAR struct stm32_can_s *priv = dev->cd_priv; int ret; - canllvdbg("CAN%d RX0 irq: %d TX irq: %d\n", priv->port, priv->canrx0, priv->cantx); + canllvdbg("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n", + priv->port, priv->canrx[0], priv->canrx[1], priv->cantx); /* CAN cell initialization */ @@ -616,28 +642,41 @@ static int can_setup(FAR struct can_dev_s *dev) } can_dumpfiltregs(priv, "After filter initialization"); - /* Attach the CAN RX FIFO 0 interrupt and TX interrupts. The others are not used */ + /* Attach the CAN RX FIFO 0/1 interrupts and TX interrupts. + * The others are not used. + */ - ret = irq_attach(priv->canrx0, can_rx0interrupt); + ret = irq_attach(priv->canrx[0], can_rx0interrupt); if (ret < 0) { - canlldbg("Failed to attach CAN%d RX0 IRQ (%d)", priv->port, priv->canrx0); + canlldbg("Failed to attach CAN%d RX0 IRQ (%d)", + priv->port, priv->canrx[0]); + return ret; + } + + ret = irq_attach(priv->canrx[1], can_rx1interrupt); + if (ret < 0) + { + canlldbg("Failed to attach CAN%d RX1 IRQ (%d)", + priv->port, priv->canrx[1]); return ret; } ret = irq_attach(priv->cantx, can_txinterrupt); if (ret < 0) { - canlldbg("Failed to attach CAN%d TX IRQ (%d)", priv->port, priv->cantx); + canlldbg("Failed to attach CAN%d TX IRQ (%d)", + priv->port, priv->cantx); return ret; } - /* Enable the interrupts at the NVIC. Interrupts arestill disabled in + /* Enable the interrupts at the NVIC. Interrupts are still disabled in * the CAN module. Since we coming out of reset here, there should be * no pending interrupts. */ - up_enable_irq(priv->canrx0); + up_enable_irq(priv->canrx[0]); + up_enable_irq(priv->canrx[1]); up_enable_irq(priv->cantx); return OK; } @@ -663,14 +702,16 @@ static void can_shutdown(FAR struct can_dev_s *dev) canllvdbg("CAN%d\n", priv->port); - /* Disable the RX FIFO 0 and TX interrupts */ + /* Disable the RX FIFO 0/1 and TX interrupts */ - up_disable_irq(priv->canrx0); + up_disable_irq(priv->canrx[0]); + up_disable_irq(priv->canrx[1]); up_disable_irq(priv->cantx); - /* Detach the RX FIFO 0 and TX interrupts */ + /* Detach the RX FIFO 0/1 and TX interrupts */ - irq_detach(priv->canrx0); + irq_detach(priv->canrx[0]); + irq_detach(priv->canrx[1]); irq_detach(priv->cantx); /* And reset the hardware */ @@ -699,16 +740,16 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable) canllvdbg("CAN%d enable: %d\n", priv->port, enable); - /* Enable/disable the FIFO 0 message pending interrupt */ + /* Enable/disable the FIFO 0/1 message pending interrupt */ regval = can_getreg(priv, STM32_CAN_IER_OFFSET); if (enable) { - regval |= CAN_IER_FMPIE0; + regval |= CAN_IER_FMPIE0 | CAN_IER_FMPIE1; } else { - regval &= ~CAN_IER_FMPIE0; + regval &= ~(CAN_IER_FMPIE0 | CAN_IER_FMPIE1); } can_putreg(priv, STM32_CAN_IER_OFFSET, regval); } @@ -817,7 +858,8 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg) int dlc; int txmb; - canllvdbg("CAN%d ID: %d DLC: %d\n", priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc); + canllvdbg("CAN%d ID: %d DLC: %d\n", + priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc); /* Select one empty transmit mailbox */ @@ -843,7 +885,8 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg) /* Clear TXRQ, RTR, IDE, EXID, and STID fields */ regval = can_getreg(priv, STM32_CAN_TIR_OFFSET(txmb)); - regval &= ~(CAN_TIR_TXRQ | CAN_TIR_RTR | CAN_TIR_IDE | CAN_TIR_EXID_MASK | CAN_TIR_STID_MASK); + regval &= ~(CAN_TIR_TXRQ | CAN_TIR_RTR | CAN_TIR_IDE | + CAN_TIR_EXID_MASK | CAN_TIR_STID_MASK); can_putreg(priv, STM32_CAN_TIR_OFFSET(txmb), regval); /* Set up the ID, standard 11-bit or extended 29-bit. */ @@ -886,17 +929,17 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg) if (dlc > 1) { - tmp = (uint32_t)*ptr++; + tmp = (uint32_t)*ptr++; regval |= tmp << CAN_TDLR_DATA1_SHIFT; if (dlc > 2) { - tmp = (uint32_t)*ptr++; + tmp = (uint32_t)*ptr++; regval |= tmp << CAN_TDLR_DATA2_SHIFT; if (dlc > 3) { - tmp = (uint32_t)*ptr++; + tmp = (uint32_t)*ptr++; regval |= tmp << CAN_TDLR_DATA3_SHIFT; } } @@ -912,17 +955,17 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg) if (dlc > 5) { - tmp = (uint32_t)*ptr++; + tmp = (uint32_t)*ptr++; regval |= tmp << CAN_TDHR_DATA5_SHIFT; if (dlc > 6) { - tmp = (uint32_t)*ptr++; + tmp = (uint32_t)*ptr++; regval |= tmp << CAN_TDHR_DATA6_SHIFT; if (dlc > 7) { - tmp = (uint32_t)*ptr++; + tmp = (uint32_t)*ptr++; regval |= tmp << CAN_TDHR_DATA7_SHIFT; } } @@ -970,11 +1013,7 @@ static bool can_txready(FAR struct can_dev_s *dev) regval = can_getreg(priv, STM32_CAN_TSR_OFFSET); canllvdbg("CAN%d TSR: %08x\n", priv->port, regval); - if ((regval & CAN_ALL_MAILBOXES) != 0) - { - return true; - } - return false; + return (regval & CAN_ALL_MAILBOXES) != 0; } /**************************************************************************** @@ -1005,29 +1044,26 @@ static bool can_txempty(FAR struct can_dev_s *dev) regval = can_getreg(priv, STM32_CAN_TSR_OFFSET); canllvdbg("CAN%d TSR: %08x\n", priv->port, regval); - if ((regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES) - { - return true; - } - return false; + return (regval & CAN_ALL_MAILBOXES) == CAN_ALL_MAILBOXES; } /**************************************************************************** - * Name: can_rx0interrupt + * Name: can_rxinterrupt * * Description: - * CAN RX FIFO 0 interrupt handler + * CAN RX FIFO 0/1 interrupt handler * * Input Parameters: * irq - The IRQ number of the interrupt. * context - The register state save array at the time of the interrupt. + * rxmb - The RX mailbox number. * * Returned Value: * Zero on success; a negated errno on failure * ****************************************************************************/ -static int can_rx0interrupt(int irq, void *context) +static int can_rxinterrupt(int irq, FAR void *context, int rxmb) { FAR struct can_dev_s *dev = NULL; FAR struct stm32_can_s *priv; @@ -1038,11 +1074,11 @@ static int can_rx0interrupt(int irq, void *context) int ret; #if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2) - if (g_can1priv.canrx0 == irq) + if (g_can1priv.canrx[rxmb] == irq) { dev = &g_can1dev; } - else if (g_can2priv.canrx0 == irq) + else if (g_can2priv.canrx[rxmb] == irq) { dev = &g_can2dev; } @@ -1057,9 +1093,9 @@ static int can_rx0interrupt(int irq, void *context) #endif priv = dev->cd_priv; - /* Verify that a message is pending in FIFO 0 */ + /* Verify that a message is pending in the FIFO */ - regval = can_getreg(priv, STM32_CAN_RF0R_OFFSET); + regval = can_getreg(priv, STM32_CAN_RFR_OFFSET(rxmb)); npending = (regval & CAN_RFR_FMP_MASK) >> CAN_RFR_FMP_SHIFT; if (npending < 1) { @@ -1067,11 +1103,18 @@ static int can_rx0interrupt(int irq, void *context) return OK; } - can_dumpmbregs(priv, "RX0 interrupt"); + if (rxmb == 0) + { + can_dumpmbregs(priv, "RX0 interrupt"); + } + else + { + can_dumpmbregs(priv, "RX1 interrupt"); + } /* Get the CAN identifier. */ - regval = can_getreg(priv, STM32_CAN_RI0R_OFFSET); + regval = can_getreg(priv, STM32_CAN_RIR_OFFSET(rxmb)); #ifdef CONFIG_CAN_EXTID if ((regval & CAN_RIR_IDE) != 0) @@ -1104,22 +1147,22 @@ static int can_rx0interrupt(int irq, void *context) /* Extract the RTR bit */ - hdr.ch_rtr = (regval & CAN_RIR_RTR) != 0 ? true : false; + hdr.ch_rtr = (regval & CAN_RIR_RTR) != 0; /* Get the DLC */ - regval = can_getreg(priv, STM32_CAN_RDT0R_OFFSET); + regval = can_getreg(priv, STM32_CAN_RDTR_OFFSET(rxmb)); hdr.ch_dlc = (regval & CAN_RDTR_DLC_MASK) >> CAN_RDTR_DLC_SHIFT; /* Save the message data */ - regval = can_getreg(priv, STM32_CAN_RDL0R_OFFSET); + regval = can_getreg(priv, STM32_CAN_RDLR_OFFSET(rxmb)); data[0] = (regval & CAN_RDLR_DATA0_MASK) >> CAN_RDLR_DATA0_SHIFT; data[1] = (regval & CAN_RDLR_DATA1_MASK) >> CAN_RDLR_DATA1_SHIFT; data[2] = (regval & CAN_RDLR_DATA2_MASK) >> CAN_RDLR_DATA2_SHIFT; data[3] = (regval & CAN_RDLR_DATA3_MASK) >> CAN_RDLR_DATA3_SHIFT; - regval = can_getreg(priv, STM32_CAN_RDH0R_OFFSET); + regval = can_getreg(priv, STM32_CAN_RDHR_OFFSET(rxmb)); data[4] = (regval & CAN_RDHR_DATA4_MASK) >> CAN_RDHR_DATA4_SHIFT; data[5] = (regval & CAN_RDHR_DATA5_MASK) >> CAN_RDHR_DATA5_SHIFT; data[6] = (regval & CAN_RDHR_DATA6_MASK) >> CAN_RDHR_DATA6_SHIFT; @@ -1129,17 +1172,57 @@ static int can_rx0interrupt(int irq, void *context) ret = can_receive(dev, &hdr, data); - /* Release the FIFO0 */ + /* Release the FIFO */ #ifndef CONFIG_CAN_EXTID errout: #endif - regval = can_getreg(priv, STM32_CAN_RF0R_OFFSET); + regval = can_getreg(priv, STM32_CAN_RFR_OFFSET(rxmb)); regval |= CAN_RFR_RFOM; - can_putreg(priv, STM32_CAN_RF0R_OFFSET, regval); + can_putreg(priv, STM32_CAN_RFR_OFFSET(rxmb), regval); return ret; } +/**************************************************************************** + * Name: can_rx0interrupt + * + * Description: + * CAN RX FIFO 0 interrupt handler + * + * Input Parameters: + * irq - The IRQ number of the interrupt. + * context - The register state save array at the time of the interrupt. + * + * Returned Value: + * Zero on success; a negated errno on failure + * + ****************************************************************************/ + +static int can_rx0interrupt(int irq, FAR void *context) +{ + return can_rxinterrupt(irq, context, 0); +} + +/**************************************************************************** + * Name: can_rx1interrupt + * + * Description: + * CAN RX FIFO 1 interrupt handler + * + * Input Parameters: + * irq - The IRQ number of the interrupt. + * context - The register state save array at the time of the interrupt. + * + * Returned Value: + * Zero on success; a negated errno on failure + * + ****************************************************************************/ + +static int can_rx1interrupt(int irq, FAR void *context) +{ + return can_rxinterrupt(irq, context, 1); +} + /**************************************************************************** * Name: can_txinterrupt * @@ -1155,7 +1238,7 @@ errout: * ****************************************************************************/ -static int can_txinterrupt(int irq, void *context) +static int can_txinterrupt(int irq, FAR void *context) { FAR struct can_dev_s *dev = NULL; FAR struct stm32_can_s *priv; @@ -1304,7 +1387,7 @@ static int can_txinterrupt(int irq, void *context) * ****************************************************************************/ -static int can_bittiming(struct stm32_can_s *priv) +static int can_bittiming(FAR struct stm32_can_s *priv) { uint32_t tmp; uint32_t brp; @@ -1401,7 +1484,7 @@ static int can_bittiming(struct stm32_can_s *priv) * ****************************************************************************/ -static int can_cellinit(struct stm32_can_s *priv) +static int can_cellinit(FAR struct stm32_can_s *priv) { volatile uint32_t timeout; uint32_t regval; @@ -1415,11 +1498,6 @@ static int can_cellinit(struct stm32_can_s *priv) regval &= ~CAN_MCR_SLEEP; can_putreg(priv, STM32_CAN_MCR_OFFSET, regval); - /* Configure CAN behavior. Priority driven request order, not message ID. */ - - regval |= CAN_MCR_TXFP; - can_putreg(priv, STM32_CAN_MCR_OFFSET, regval); - /* Enter initialization mode */ regval |= CAN_MCR_INRQ; @@ -1457,7 +1535,8 @@ static int can_cellinit(struct stm32_can_s *priv) */ regval = can_getreg(priv, STM32_CAN_MCR_OFFSET); - regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART | CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM); + regval &= ~(CAN_MCR_TXFP | CAN_MCR_RFLM | CAN_MCR_NART | + CAN_MCR_AWUM | CAN_MCR_ABOM | CAN_MCR_TTCM); can_putreg(priv, STM32_CAN_MCR_OFFSET, regval); /* Configure bit timing. */ @@ -1492,7 +1571,8 @@ static int can_cellinit(struct stm32_can_s *priv) if (timeout < 1) { - canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n", regval); + canlldbg("ERROR: Timed out waiting to exit initialization mode: %08x\n", + regval); return -ETIMEDOUT; } return OK; @@ -1531,7 +1611,7 @@ static int can_cellinit(struct stm32_can_s *priv) * ****************************************************************************/ -static int can_filterinit(struct stm32_can_s *priv) +static int can_filterinit(FAR struct stm32_can_s *priv) { uint32_t regval; uint32_t bitmask; @@ -1540,7 +1620,7 @@ static int can_filterinit(struct stm32_can_s *priv) /* Get the bitmask associated with the filter used by this CAN block */ - bitmask = ((uint32_t)1) << priv->filter; + bitmask = (uint32_t)1 << priv->filter; /* Enter filter initialization mode */ @@ -1548,6 +1628,17 @@ static int can_filterinit(struct stm32_can_s *priv) regval |= CAN_FMR_FINIT; can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval); + /* Assign half the filters to CAN1, half to CAN2 */ + +#if defined(CONFIG_STM32_CONNECTIVITYLINE) || \ + defined(CONFIG_STM32_STM32F20XX) || \ + defined(CONFIG_STM32_STM32F40XX) + regval = can_getfreg(priv, STM32_CAN_FMR_OFFSET); + regval &= CAN_FMR_CAN2SB_MASK; + regval |= (CAN_NFILTERS / 2) << CAN_FMR_CAN2SB_SHIFT; + can_putfreg(priv, STM32_CAN_FMR_OFFSET, regval); +#endif + /* Disable the filter */ regval = can_getfreg(priv, STM32_CAN_FA1R_OFFSET); @@ -1560,12 +1651,12 @@ static int can_filterinit(struct stm32_can_s *priv) regval |= bitmask; can_putfreg(priv, STM32_CAN_FS1R_OFFSET, regval); - /* There are 14 or 28 filter banks (depending) on the device. Each filter bank is - * composed of two 32-bit registers, CAN_FiR: + /* There are 14 or 28 filter banks (depending) on the device. + * Each filter bank is composed of two 32-bit registers, CAN_FiR: */ - can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 1), 0); - can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 2), 0); + can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 1), 0); + can_putfreg(priv, STM32_CAN_FIR_OFFSET(priv->filter, 2), 0); /* Set Id/Mask mode for the filter */ @@ -1613,7 +1704,7 @@ static int can_filterinit(struct stm32_can_s *priv) FAR struct can_dev_s *stm32_caninitialize(int port) { - struct can_dev_s *dev = NULL; + FAR struct can_dev_s *dev = NULL; canvdbg("CAN%d\n", port); @@ -1662,4 +1753,3 @@ FAR struct can_dev_s *stm32_caninitialize(int port) } #endif /* CONFIG_CAN && (CONFIG_STM32_CAN1 || CONFIG_STM32_CAN2) */ - diff --git a/arch/arm/src/stm32/stm32_capture.c b/arch/arm/src/stm32/stm32_capture.c index 55864281a9c..e5fefa74cfc 100644 --- a/arch/arm/src/stm32/stm32_capture.c +++ b/arch/arm/src/stm32/stm32_capture.c @@ -185,7 +185,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, { switch(priv->base) { -#ifdef CONFIG_STM32_TIM1 +#ifdef CONFIG_STM32_TIM1_CAP case STM32_TIM1_BASE: switch (channel) { @@ -212,7 +212,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, } break; #endif -#ifdef CONFIG_STM32_TIM2 +#ifdef CONFIG_STM32_TIM2_CAP case STM32_TIM2_BASE: switch (channel) { @@ -239,7 +239,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, } break; #endif -#ifdef CONFIG_STM32_TIM3 +#ifdef CONFIG_STM32_TIM3_CAP case STM32_TIM3_BASE: switch (channel) { @@ -266,7 +266,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, } break; #endif -#ifdef CONFIG_STM32_TIM4 +#ifdef CONFIG_STM32_TIM4_CAP case STM32_TIM4_BASE: switch (channel) { @@ -293,7 +293,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, } break; #endif -#ifdef CONFIG_STM32_TIM5 +#ifdef CONFIG_STM32_TIM5_CAP case STM32_TIM5_BASE: switch (channel) { @@ -323,7 +323,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, /* TIM6 and TIM7 cannot be used in capture */ -#ifdef CONFIG_STM32_TIM8 +#ifdef CONFIG_STM32_TIM8_CAP case STM32_TIM8_BASE: switch (channel) { @@ -351,7 +351,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, break; #endif -#ifdef CONFIG_STM32_TIM9 +#ifdef CONFIG_STM32_TIM9_CAP case STM32_TIM9_BASE: switch (channel) { @@ -379,7 +379,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, break; #endif -#ifdef CONFIG_STM32_TIM10 +#ifdef CONFIG_STM32_TIM10_CAP case STM32_TIM10_BASE: switch (channel) { @@ -407,7 +407,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, break; #endif -#ifdef CONFIG_STM32_TIM11 +#ifdef CONFIG_STM32_TIM11_CAP case STM32_TIM11_BASE: switch (channel) { @@ -435,7 +435,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, break; #endif -#ifdef CONFIG_STM32_TIM12 +#ifdef CONFIG_STM32_TIM12_CAP case STM32_TIM12_BASE: switch (channel) { @@ -463,7 +463,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, break; #endif -#ifdef CONFIG_STM32_TIM13 +#ifdef CONFIG_STM32_TIM13_CAP case STM32_TIM13_BASE: switch (channel) { @@ -491,7 +491,7 @@ static inline uint32_t stm32_cap_gpio(FAR const struct stm32_cap_priv_s *priv, break; #endif -#ifdef CONFIG_STM32_TIM14 +#ifdef CONFIG_STM32_TIM14_CAP case STM32_TIM14_BASE: switch (channel) { @@ -531,31 +531,31 @@ static inline int stm32_cap_set_rcc(FAR const struct stm32_cap_priv_s *priv, switch (priv->base) { #ifdef CONFIG_STM32_TIM1_CAP - case 1: + case STM32_TIM1_BASE: offset = STM32_RCC_APB2ENR; mask = RCC_APB2ENR_TIM1EN; break; #endif #ifdef CONFIG_STM32_TIM2_CAP - case 2: + case STM32_TIM2_BASE: offset = STM32_RCC_APB1ENR; mask = RCC_APB1ENR_TIM2EN; break; #endif #ifdef CONFIG_STM32_TIM3_CAP - case 3: + case STM32_TIM3_BASE: offset = STM32_RCC_APB1ENR; mask = RCC_APB1ENR_TIM3EN; break; #endif #ifdef CONFIG_STM32_TIM4_CAP - case 4: + case STM32_TIM4_BASE: offset = STM32_RCC_APB1ENR; mask = RCC_APB1ENR_TIM4EN; break; #endif #ifdef CONFIG_STM32_TIM5_CAP - case 5: + case STM32_TIM5_BASE: offset = STM32_RCC_APB1ENR; mask = RCC_APB1ENR_TIM5EN; break; @@ -564,43 +564,43 @@ static inline int stm32_cap_set_rcc(FAR const struct stm32_cap_priv_s *priv, /* TIM6 and TIM7 cannot be used in capture */ #ifdef CONFIG_STM32_TIM8_CAP - case 8: + case STM32_TIM8_BASE: offset = STM32_RCC_APB2ENR; mask = RCC_APB2ENR_TIM8EN; break; #endif #ifdef CONFIG_STM32_TIM9_CAP - case 9: + case STM32_TIM9_BASE: offset = STM32_RCC_APB2ENR; mask = RCC_APB2ENR_TIM9EN; break; #endif #ifdef CONFIG_STM32_TIM10_CAP - case 10: + case STM32_TIM10_BASE: offset = STM32_RCC_APB2ENR; mask = RCC_APB2ENR_TIM10EN; break; #endif #ifdef CONFIG_STM32_TIM11_CAP - case 11: + case STM32_TIM11_BASE: offset = STM32_RCC_APB2ENR; mask = RCC_APB2ENR_TIM11EN; break; #endif #ifdef CONFIG_STM32_TIM12_CAP - case 12: + case STM32_TIM12_BASE: offset = STM32_RCC_APB1ENR; mask = RCC_APB2ENR_TIM12EN; break; #endif #ifdef CONFIG_STM32_TIM13_CAP - case 13: + case STM32_TIM13_BASE: offset = STM32_RCC_APB1ENR; mask = RCC_APB2ENR_TIM13EN; break; #endif #ifdef CONFIG_STM32_TIM14_CAP - case 14: + case STM32_TIM14_BASE: offset = STM32_RCC_APB1ENR; mask = RCC_APB2ENR_TIM14EN; break; @@ -1097,9 +1097,9 @@ const struct stm32_cap_priv_s stm32_tim1_priv = { .ops = &stm32_cap_ops, .base = STM32_TIM1_BASE, - .irq = STM32_IRQ_TIM1, + .irq = STM32_IRQ_TIM1CC, #ifdef USE_ADVENCED_TIM - .irg_of = STM32_IRQ_TIM1UP, + .irq_of = STM32_IRQ_TIM1UP, #endif }; #endif @@ -1111,7 +1111,7 @@ const struct stm32_cap_priv_s stm32_tim2_priv = .base = STM32_TIM2_BASE, .irq = STM32_IRQ_TIM2, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1123,7 +1123,7 @@ const struct stm32_cap_priv_s stm32_tim3_priv = .base = STM32_TIM3_BASE, .irq = STM32_IRQ_TIM3, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1135,7 +1135,7 @@ const struct stm32_cap_priv_s stm32_tim4_priv = .base = STM32_TIM4_BASE, .irq = STM32_IRQ_TIM4, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1147,7 +1147,7 @@ const struct stm32_cap_priv_s stm32_tim5_priv = .base = STM32_TIM5_BASE, .irq = STM32_IRQ_TIM5, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1159,9 +1159,9 @@ const struct stm32_cap_priv_s stm32_tim8_priv = { .ops = &stm32_cap_ops, .base = STM32_TIM8_BASE, - .irq = STM32_IRQ_TIM8, + .irq = STM32_IRQ_TIM8CC, #ifdef USE_ADVENCED_TIM - .irg_of = STM32_IRQ_TIM8UP, + .irq_of = STM32_IRQ_TIM8UP, #endif }; #endif @@ -1173,7 +1173,7 @@ const struct stm32_cap_priv_s stm32_tim9_priv = .base = STM32_TIM9_BASE, .irq = STM32_IRQ_TIM9, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1185,7 +1185,7 @@ const struct stm32_cap_priv_s stm32_tim10_priv = .base = STM32_TIM10_BASE, .irq = STM32_IRQ_TIM10, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1197,7 +1197,7 @@ const struct stm32_cap_priv_s stm32_tim11_priv = .base = STM32_TIM11_BASE, .irq = STM32_IRQ_TIM11, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1209,7 +1209,7 @@ const struct stm32_cap_priv_s stm32_tim12_priv = .base = STM32_TIM12_BASE, .irq = STM32_IRQ_TIM12, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1221,7 +1221,7 @@ const struct stm32_cap_priv_s stm32_tim13_priv = .base = STM32_TIM13_BASE, .irq = STM32_IRQ_TIM13, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif @@ -1233,7 +1233,7 @@ const struct stm32_cap_priv_s stm32_tim14_priv = .base = STM32_TIM14_BASE, .irq = STM32_IRQ_TIM14, #ifdef USE_ADVENCED_TIM - .irg_of = 0, + .irq_of = 0, #endif }; #endif diff --git a/arch/arm/src/stm32/stm32_dac.c b/arch/arm/src/stm32/stm32_dac.c index 77213af2649..4c1a985c322 100644 --- a/arch/arm/src/stm32/stm32_dac.c +++ b/arch/arm/src/stm32/stm32_dac.c @@ -848,7 +848,7 @@ static int dac_timinit(FAR struct stm32_chan_s *chan) case 8: regaddr = STM32_RCC_APB2ENR; setbits = RCC_APB2ENR_TIM8EN; - pclk = STM32_TIM18_FREQUENCY; + pclk = BOARD_TIM8_FREQUENCY; break; #endif default: diff --git a/arch/arm/src/stm32/stm32_dma.c b/arch/arm/src/stm32/stm32_dma.c index ff7135840e4..4b694e7ccb9 100644 --- a/arch/arm/src/stm32/stm32_dma.c +++ b/arch/arm/src/stm32/stm32_dma.c @@ -56,7 +56,7 @@ */ #if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || \ - defined(CONFIG_STM32_STM32F30XX) + defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F37XX) # include "stm32f10xxx_dma.c" #elif defined(CONFIG_STM32_STM32F20XX) # include "stm32f20xxx_dma.c" diff --git a/arch/arm/src/stm32/stm32_eth.c b/arch/arm/src/stm32/stm32_eth.c index 7b06b9a3680..c7a4abc044c 100644 --- a/arch/arm/src/stm32/stm32_eth.c +++ b/arch/arm/src/stm32/stm32_eth.c @@ -585,9 +585,9 @@ struct stm32_ethmac_s struct work_s work; /* For deferring work to the work queue */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ /* Used to track transmit and receive descriptors */ @@ -993,7 +993,7 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv) struct eth_txdesc_s *txdesc; struct eth_txdesc_s *txfirst; - /* The internal (optimal) uIP buffer size may be configured to be larger + /* The internal (optimal) network buffer size may be configured to be larger * than the Ethernet buffer size. */ @@ -1179,7 +1179,7 @@ static int stm32_transmit(FAR struct stm32_ethmac_s *priv) * Function: stm32_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -1321,7 +1321,7 @@ static void stm32_dopoll(FAR struct stm32_ethmac_s *priv) if ((priv->txhead->tdes0 & ETH_TDES0_OWN) == 0 && priv->txhead->tdes2 == 0) { - /* If we have the descriptor, then poll uIP for new XMIT data. + /* If we have the descriptor, then poll the network for new XMIT data. * Allocate a buffer for the poll. */ @@ -1585,7 +1585,7 @@ static int stm32_recvframe(FAR struct stm32_ethmac_s *priv) buffer = stm32_allocbuffer(priv); /* Take the buffer from the RX descriptor of the first free - * segment, put it into the uIP device structure, then replace + * segment, put it into the network device structure, then replace * the buffer in the RX descriptor with the newly allocated * buffer. */ @@ -1667,7 +1667,7 @@ static void stm32_receive(FAR struct stm32_ethmac_s *priv) pkt_input(&priv->dev); #endif - /* Check if the packet is a valid size for the uIP buffer configuration + /* Check if the packet is a valid size for the network buffer configuration * (this should not happen) */ @@ -1955,7 +1955,7 @@ static void stm32_txdone(FAR struct stm32_ethmac_s *priv) stm32_disableint(priv, ETH_DMAINT_TI); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ stm32_dopoll(priv); } @@ -2321,7 +2321,7 @@ static inline void stm32_poll_process(FAR struct stm32_ethmac_s *priv) if (dev->d_buf) { - /* Update TCP timing states and poll uIP for new XMIT data. + /* Update TCP timing states and poll the network for new XMIT data. */ (void)devif_timer(dev, stm32_txpoll); @@ -2551,7 +2551,7 @@ static inline void stm32_txavail_process(FAR struct stm32_ethmac_s *priv) if (priv->ifup) { - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ stm32_dopoll(priv); } diff --git a/arch/arm/src/stm32/stm32_getc.c b/arch/arm/src/stm32/stm32_getc.c new file mode 100644 index 00000000000..de9020bab40 --- /dev/null +++ b/arch/arm/src/stm32/stm32_getc.c @@ -0,0 +1,121 @@ +/**************************************************************************** + * arch/arm/src/stm32/stm32_getc.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include + +#include "up_internal.h" +#include "up_arch.h" + +#include "chip.h" + +#include "stm32.h" +#include "stm32_rcc.h" +#include "stm32_gpio.h" +#include "stm32_uart.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Select U[S]ART console base address */ + +#ifdef HAVE_CONSOLE +# if defined(CONFIG_USART1_SERIAL_CONSOLE) +# define STM32_CONSOLE_BASE STM32_USART1_BASE +# elif defined(CONFIG_USART2_SERIAL_CONSOLE) +# define STM32_CONSOLE_BASE STM32_USART2_BASE +# elif defined(CONFIG_USART3_SERIAL_CONSOLE) +# define STM32_CONSOLE_BASE STM32_USART3_BASE +# elif defined(CONFIG_UART4_SERIAL_CONSOLE) +# define STM32_CONSOLE_BASE STM32_UART4_BASE +# elif defined(CONFIG_UART5_SERIAL_CONSOLE) +# define STM32_CONSOLE_BASE STM32_UART5_BASE +# elif defined(CONFIG_USART6_SERIAL_CONSOLE) +# define STM32_CONSOLE_BASE STM32_USART6_BASE +# elif defined(CONFIG_UART7_SERIAL_CONSOLE) +# define STM32_CONSOLE_BASE STM32_UART7_BASE +# elif defined(CONFIG_UART8_SERIAL_CONSOLE) +# define STM32_CONSOLE_BASE STM32_UART8_BASE +# endif +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_getc + * + * Description: + * Read one byte from the serial console + * + * REVIST: If used with the serial driver enabled, then this could + * interfere with the serial driver operations. Serial interrupts should + * be disabled when this function executes in that case. + * + ****************************************************************************/ + +int up_getc(void) +{ + uint32_t ch = 0; + +#ifdef HAVE_CONSOLE + /* While there is any error, read and discard bytes to clear the errors */ + + while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_SR_OFFSET) & + (USART_SR_ORE | USART_SR_NE | USART_SR_FE | USART_SR_PE)) != 0) + { + (void)getreg32(STM32_CONSOLE_BASE + STM32_USART_RDR_OFFSET); + } + + /* Wait until the RX data register has a character to be read */ + + while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_SR_OFFSET) & USART_SR_RXNE) == 0); + + /* Then read the character */ + + ch = getreg32(STM32_CONSOLE_BASE + STM32_USART_RDR_OFFSET); +#endif /* HAVE_CONSOLE */ + + return (int)ch; +} diff --git a/arch/arm/src/stm32/stm32_getc.h b/arch/arm/src/stm32/stm32_getc.h new file mode 100644 index 00000000000..651165fba5e --- /dev/null +++ b/arch/arm/src/stm32/stm32_getc.h @@ -0,0 +1,47 @@ +/************************************************************************************ + * arch/arm/src/stm32/stm32_getc.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_STM32_GETC_H +#define __ARCH_ARM_SRC_STM32_STM32_GETC_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "chip.h" + +#endif /* __ARCH_ARM_SRC_STM32_STM32_GETC_H */ diff --git a/arch/arm/src/stm32/stm32_lowputc.c b/arch/arm/src/stm32/stm32_lowputc.c index 4307c45748e..0bffb74808a 100644 --- a/arch/arm/src/stm32/stm32_lowputc.c +++ b/arch/arm/src/stm32/stm32_lowputc.c @@ -273,9 +273,9 @@ # define USART_CR3_CLRBITS \ (USART_CR3_EIE | USART_CR3_IREN | USART_CR3_IRLP | USART_CR3_HDSEL | \ USART_CR3_NACK | USART_CR3_SCEN | USART_CR3_DMAR | USART_CR3_DMAT | \ - USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_CTSIE | USART_CR1_ONEBIT | \ - USART_CR1_OVRDIS | USART_CR1_DDRE | USART_CR1_DEM | USART_CR1_DEP | \ - USART_CR1_SCARCNT_MASK | USART_CR1_WUS_MASK | USART_CR1_WUFIE) + USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_CTSIE | USART_CR3_ONEBIT | \ + USART_CR3_OVRDIS | USART_CR3_DDRE | USART_CR3_DEM | USART_CR3_DEP | \ + USART_CR3_SCARCNT_MASK | USART_CR3_WUS_MASK | USART_CR3_WUFIE) # else # define USART_CR3_CLRBITS \ (USART_CR3_CTSIE | USART_CR3_CTSE | USART_CR3_RTSE | USART_CR3_EIE) @@ -436,7 +436,7 @@ void up_lowputc(char ch) void stm32_lowsetup(void) { -#if defined(HAVE_UART) +#if defined(HAVE_SERIALDRIVER) uint32_t mapr; #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) uint32_t cr; @@ -559,7 +559,7 @@ void stm32_lowsetup(void) putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); #endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */ -#endif /* HAVE_UART */ +#endif /* HAVE_SERIALDRIVER */ } #elif defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX) || \ @@ -568,7 +568,7 @@ void stm32_lowsetup(void) void stm32_lowsetup(void) { -#if defined(HAVE_UART) +#if defined(HAVE_SERIALDRIVER) #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) uint32_t cr; #endif @@ -638,7 +638,7 @@ void stm32_lowsetup(void) putreg32(cr, STM32_CONSOLE_BASE + STM32_USART_CR1_OFFSET); #endif /* HAVE_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */ -#endif /* HAVE_UART */ +#endif /* HAVE_SERIALDRIVER */ } #else diff --git a/arch/arm/src/stm32/stm32_pwm.c b/arch/arm/src/stm32/stm32_pwm.c index 8779d18692f..a6f3a5749bf 100644 --- a/arch/arm/src/stm32/stm32_pwm.c +++ b/arch/arm/src/stm32/stm32_pwm.c @@ -129,7 +129,7 @@ # define pwmllvdbg llvdbg # define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m) # else -# define pwmlldbg(x...) +# define pwmvdbg(x...) # define pwmllvdbg(x...) # define pwm_dumpgpio(p,m) # endif @@ -166,8 +166,8 @@ enum stm32_chanmode_e struct stm32_pwmchan_s { - uint8_t channel; /* Timer output channel: {1,..4} */ - uint32_t pincfg; /* Output pin configuration */ + uint8_t channel; /* Timer output channel: {1,..4} */ + uint32_t pincfg; /* Output pin configuration */ enum stm32_chanmode_e mode; }; @@ -176,21 +176,23 @@ struct stm32_pwmchan_s struct stm32_pwmtimer_s { FAR const struct pwm_ops_s *ops; /* PWM operations */ - uint8_t timid; /* Timer ID {1,...,17} */ - struct stm32_pwmchan_s channels[PWM_NCHANNELS]; - uint8_t timtype; /* See the TIMTYPE_* definitions */ - enum stm32_timmode_e mode; + uint8_t timid; /* Timer ID {1,...,17} */ + struct stm32_pwmchan_s channels[PWM_NCHANNELS]; + uint8_t timtype; /* See the TIMTYPE_* definitions */ + enum stm32_timmode_e mode; #ifdef CONFIG_PWM_PULSECOUNT - uint8_t irq; /* Timer update IRQ */ - uint8_t prev; /* The previous value of the RCR (pre-loaded) */ - uint8_t curr; /* The current value of the RCR (pre-loaded) */ - uint32_t count; /* Remaining pluse count */ + uint8_t irq; /* Timer update IRQ */ + uint8_t prev; /* The previous value of the RCR (pre-loaded) */ + uint8_t curr; /* The current value of the RCR (pre-loaded) */ + uint32_t count; /* Remaining pluse count */ +#else + uint32_t frequency; /* Current frequency setting */ #endif - uint32_t base; /* The base address of the timer */ - uint32_t pclk; /* The frequency of the peripheral clock + uint32_t base; /* The base address of the timer */ + uint32_t pclk; /* The frequency of the peripheral clock * that drives the timer module. */ #ifdef CONFIG_PWM_PULSECOUNT - FAR void *handle; /* Handle used for upper-half callback */ + FAR void *handle; /* Handle used for upper-half callback */ #endif }; @@ -758,7 +760,7 @@ static struct stm32_pwmtimer_s g_pwm13dev = .irq = STM32_IRQ_TIM13, #endif .base = STM32_TIM13_BASE, - .pclk = STM32_APB1_TIM13_CLKIN, + .pclk = STM32_APB1_TIM13_CLKIN, }; #endif @@ -1066,15 +1068,15 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, DEBUGASSERT(priv != NULL && info != NULL); #if defined(CONFIG_PWM_MULTICHAN) - pwmvdbg("TIM%d frequency: %d\n", + pwmvdbg("TIM%u frequency: %u\n", priv->timid, info->frequency); #elif defined(CONFIG_PWM_PULSECOUNT) - pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x count: %d\n", - priv->timid, priv->channel, info->frequency, + pwmvdbg("TIM%u channel: %u frequency: %u duty: %08x count: %u\n", + priv->timid, priv->channels[0].channel, info->frequency, info->duty, info->count); #else - pwmvdbg("TIM%d channel: %d frequency: %d duty: %08x\n", - priv->timid, priv->channel, info->frequency, info->duty); + pwmvdbg("TIM%u channel: %u frequency: %u duty: %08x\n", + priv->timid, priv->channels[0].channel, info->frequency, info->duty); #endif DEBUGASSERT(info->frequency > 0); @@ -1144,7 +1146,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, reload = 65535; } - pwmvdbg("TIM%d PCLK: %d frequency: %d TIMCLK: %d prescaler: %d reload: %d\n", + pwmvdbg("TIM%u PCLK: %u frequency: %u TIMCLK: %u prescaler: %u reload: %u\n", priv->timid, priv->pclk, info->frequency, timclk, prescaler, reload); /* Set up the timer CR1 register: @@ -1207,7 +1209,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, break; default: - pwmdbg("No such timer mode: %d\n", (int)priv->mode); + pwmdbg("No such timer mode: %u\n", (unsigned int)priv->mode); return -EINVAL; } } @@ -1314,6 +1316,15 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, duty = info->channels[i].duty; channel = info->channels[i].channel; + /* A value of zero means to skip this channel */ + + if (channel == 0) + { + continue; + } + + /* Find the channel */ + for (j = 0; j < PWM_NCHANNELS; j++) { if (priv->channels[j].channel == channel) @@ -1325,7 +1336,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, if (j >= PWM_NCHANNELS) { - pwmdbg("No such channel: %d\n", channel); + pwmdbg("No such channel: %u\n", channel); return -EINVAL; } #else @@ -1341,7 +1352,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, ccr = b16toi(duty * reload + b16HALF); - pwmvdbg("ccr: %d\n", ccr); + pwmvdbg("ccr: %u\n", ccr); switch (mode) { @@ -1376,7 +1387,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, #endif default: - pwmdbg("No such mode: %d\n", (int)mode); + pwmdbg("No such mode: %u\n", (unsigned int)mode); return -EINVAL; } @@ -1483,7 +1494,7 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, break; default: - pwmdbg("No such channel: %d\n", channel); + pwmdbg("No such channel: %u\n", channel); return -EINVAL; } } @@ -1625,6 +1636,89 @@ static int pwm_timer(FAR struct stm32_pwmtimer_s *priv, return OK; } +#ifndef CONFIG_PWM_PULSECOUNT +/**************************************************************************** + * Name: pwm_update_duty + * + * Description: + * Try to change only channel duty. + * + * Input parameters: + * priv - A reference to the lower half PWM driver state structure + * channel - Channel to by updated + * duty - New duty. + * + * Returned Value: + * Zero on success; a negated errno value on failure + * + ****************************************************************************/ + +static int pwm_update_duty(FAR struct stm32_pwmtimer_s *priv, uint8_t channel, + ub16_t duty) +{ + /* Register offset */ + + int ccr_offset; + + /* Calculated values */ + + uint32_t reload; + uint32_t ccr; + + DEBUGASSERT(priv != NULL); + + pwmvdbg("TIM%u channel: %u duty: %08x\n", + priv->timid, channel, duty); + +#ifndef CONFIG_PWM_MULTICHAN + DEBUGASSERT(channel == priv->channels[0].channel); + DEBUGASSERT(duty >= 0 && duty < uitoub16(100)); +#endif + + /* Get the reload values */ + + reload = pwm_getreg(priv, STM32_GTIM_ARR_OFFSET); + + /* Duty cycle: + * + * duty cycle = ccr / reload (fractional value) + */ + + ccr = b16toi(duty * reload + b16HALF); + + pwmvdbg("ccr: %u\n", ccr); + + switch (channel) + { + case 1: /* Register offset for Channel 1 */ + ccr_offset = STM32_GTIM_CCR1_OFFSET; + break; + + case 2: /* Register offset for Channel 2 */ + ccr_offset = STM32_GTIM_CCR2_OFFSET; + break; + + case 3: /* Register offset for Channel 3 */ + ccr_offset = STM32_GTIM_CCR3_OFFSET; + break; + + case 4: /* Register offset for Channel 4 */ + ccr_offset = STM32_GTIM_CCR4_OFFSET; + break; + + default: + pwmdbg("No such channel: %u\n", channel); + return -EINVAL; + } + + /* Set the duty cycle by writing to the CCR register for this channel */ + + pwm_putreg(priv, ccr_offset, (uint16_t)ccr); + + return OK; +} +#endif + /**************************************************************************** * Name: pwm_interrupt * @@ -1701,7 +1795,7 @@ static int pwm_interrupt(struct stm32_pwmtimer_s *priv) /* Now all of the time critical stuff is done so we can do some debug output */ - pwmllvdbg("Update interrupt SR: %04x prev: %d curr: %d count: %d\n", + pwmllvdbg("Update interrupt SR: %04x prev: %u curr: %u count: %u\n", regval, priv->prev, priv->curr, priv->count); return OK; @@ -1894,6 +1988,8 @@ static void pwm_set_apb_clock(FAR struct stm32_pwmtimer_s *priv, bool on) en_bit = RCC_APB2ENR_TIM17EN; break; #endif + default: + return; } /* Enable/disable APB 1/2 clock for timer */ @@ -1934,7 +2030,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev) uint32_t pincfg; int i; - pwmvdbg("TIM%d\n", priv->timid); + pwmvdbg("TIM%u\n", priv->timid); pwm_dumpregs(priv, "Initially"); /* Enable APB1/2 clocking for timer. */ @@ -1982,7 +2078,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev) uint32_t pincfg; int i; - pwmvdbg("TIM%d\n", priv->timid); + pwmvdbg("TIM%u\n", priv->timid); /* Make sure that the output has been stopped */ @@ -2053,7 +2149,7 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, if (priv->timtype != TIMTYPE_ADVANCED) { - pwmdbg("ERROR: TIM%d cannot support pulse count: %d\n", + pwmdbg("ERROR: TIM%u cannot support pulse count: %u\n", priv->timid, info->count); return -EPERM; } @@ -2071,8 +2167,42 @@ static int pwm_start(FAR struct pwm_lowerhalf_s *dev, static int pwm_start(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_s *info) { + int ret = OK; FAR struct stm32_pwmtimer_s *priv = (FAR struct stm32_pwmtimer_s *)dev; - return pwm_timer(priv, info); + +#ifndef CONFIG_PWM_PULSECOUNT + /* if frequency has not changed we just update duty */ + + if (info->frequency == priv->frequency) + { +#ifdef CONFIG_PWM_MULTICHAN + int i; + + for (i = 0; ret == OK && i < CONFIG_PWM_NCHANNELS; i++) + { + ret = pwm_update_duty(priv,info->channels[i].channel, + info->channels[i].duty); + } +#else + ret = pwm_update_duty(priv,priv->channels[0].channel,info->duty); +#endif + } + else +#endif + { + ret = pwm_timer(priv, info); + +#ifndef CONFIG_PWM_PULSECOUNT + /* Save current frequency */ + + if (ret == OK) + { + priv->frequency = info->frequency; + } +#endif + } + + return ret; } #endif @@ -2103,7 +2233,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) uint32_t regval; irqstate_t flags; - pwmvdbg("TIM%d\n", priv->timid); + pwmvdbg("TIM%u\n", priv->timid); /* Disable interrupts momentary to stop any ongoing timer processing and * to prevent any concurrent access to the reset register. @@ -2111,6 +2241,10 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) flags = enter_critical_section(); + /* Stopped so frequency is zero */ + + priv->frequency = 0; + /* Disable further interrupts and stop the timer */ pwm_putreg(priv, STM32_GTIM_DIER_OFFSET, 0); @@ -2210,6 +2344,8 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev) resetbit = RCC_APB2RSTR_TIM17RST; break; #endif + default: + return -EINVAL; } /* Reset the timer - stopping the output and putting the timer back @@ -2252,7 +2388,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg /* There are no platform-specific ioctl commands */ - pwmvdbg("TIM%d\n", priv->timid); + pwmvdbg("TIM%u\n", priv->timid); #endif return -ENOTTY; } @@ -2282,7 +2418,7 @@ FAR struct pwm_lowerhalf_s *stm32_pwminitialize(int timer) { FAR struct stm32_pwmtimer_s *lower; - pwmvdbg("TIM%d\n", timer); + pwmvdbg("TIM%u\n", timer); switch (timer) { diff --git a/arch/arm/src/stm32/stm32_rtc_lowerhalf.c b/arch/arm/src/stm32/stm32_rtc_lowerhalf.c index 20275ee9216..feaa3f53951 100644 --- a/arch/arm/src/stm32/stm32_rtc_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_rtc_lowerhalf.c @@ -178,7 +178,6 @@ static void stm32_alarm_callback(FAR void *arg, unsigned int alarmid) rtc_alarm_callback_t cb; FAR void *priv; - DEBUGASSERT(priv != NULL); DEBUGASSERT(alarmid == RTC_ALARMA || alarmid == RTC_ALARMB); lower = (struct stm32_lowerhalf_s *)arg; @@ -190,6 +189,7 @@ static void stm32_alarm_callback(FAR void *arg, unsigned int alarmid) cb = (rtc_alarm_callback_t)cbinfo->cb; priv = (FAR void *)cbinfo->priv; + DEBUGASSERT(priv != NULL); cbinfo->cb = NULL; cbinfo->priv = NULL; diff --git a/arch/arm/src/stm32/stm32_serial.c b/arch/arm/src/stm32/stm32_serial.c index f1fc2baf1b1..eeb5a846a7b 100644 --- a/arch/arm/src/stm32/stm32_serial.c +++ b/arch/arm/src/stm32/stm32_serial.c @@ -272,7 +272,7 @@ #endif #ifdef USE_SERIALDRIVER -#ifdef HAVE_UART +#ifdef HAVE_SERIALDRIVER /**************************************************************************** * Private Types @@ -386,28 +386,28 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain, enum pm_state_e pmstate); #endif -#ifdef CONFIG_STM32_USART1 +#ifdef CONFIG_STM32_USART1_SERIALDRIVER static int up_interrupt_usart1(int irq, void *context); #endif -#ifdef CONFIG_STM32_USART2 +#ifdef CONFIG_STM32_USART2_SERIALDRIVER static int up_interrupt_usart2(int irq, void *context); #endif -#ifdef CONFIG_STM32_USART3 +#ifdef CONFIG_STM32_USART3_SERIALDRIVER static int up_interrupt_usart3(int irq, void *context); #endif -#ifdef CONFIG_STM32_UART4 +#ifdef CONFIG_STM32_UART4_SERIALDRIVER static int up_interrupt_uart4(int irq, void *context); #endif -#ifdef CONFIG_STM32_UART5 +#ifdef CONFIG_STM32_UART5_SERIALDRIVER static int up_interrupt_uart5(int irq, void *context); #endif -#ifdef CONFIG_STM32_USART6 +#ifdef CONFIG_STM32_USART6_SERIALDRIVER static int up_interrupt_usart6(int irq, void *context); #endif -#ifdef CONFIG_STM32_UART7 +#ifdef CONFIG_STM32_UART7_SERIALDRIVER static int up_interrupt_uart7(int irq, void *context); #endif -#ifdef CONFIG_STM32_UART8 +#ifdef CONFIG_STM32_UART8_SERIALDRIVER static int up_interrupt_uart8(int irq, void *context); #endif @@ -459,7 +459,7 @@ static const struct uart_ops_s g_uart_dma_ops = /* I/O buffers */ -#ifdef CONFIG_STM32_USART1 +#ifdef CONFIG_STM32_USART1_SERIALDRIVER static char g_usart1rxbuffer[CONFIG_USART1_RXBUFSIZE]; static char g_usart1txbuffer[CONFIG_USART1_TXBUFSIZE]; # ifdef CONFIG_USART1_RXDMA @@ -467,7 +467,7 @@ static char g_usart1rxfifo[RXDMA_BUFFER_SIZE]; # endif #endif -#ifdef CONFIG_STM32_USART2 +#ifdef CONFIG_STM32_USART2_SERIALDRIVER static char g_usart2rxbuffer[CONFIG_USART2_RXBUFSIZE]; static char g_usart2txbuffer[CONFIG_USART2_TXBUFSIZE]; # ifdef CONFIG_USART2_RXDMA @@ -475,7 +475,7 @@ static char g_usart2rxfifo[RXDMA_BUFFER_SIZE]; # endif #endif -#ifdef CONFIG_STM32_USART3 +#ifdef CONFIG_STM32_USART3_SERIALDRIVER static char g_usart3rxbuffer[CONFIG_USART3_RXBUFSIZE]; static char g_usart3txbuffer[CONFIG_USART3_TXBUFSIZE]; # ifdef CONFIG_USART3_RXDMA @@ -483,7 +483,7 @@ static char g_usart3rxfifo[RXDMA_BUFFER_SIZE]; # endif #endif -#ifdef CONFIG_STM32_UART4 +#ifdef CONFIG_STM32_UART4_SERIALDRIVER static char g_uart4rxbuffer[CONFIG_UART4_RXBUFSIZE]; static char g_uart4txbuffer[CONFIG_UART4_TXBUFSIZE]; # ifdef CONFIG_UART4_RXDMA @@ -491,7 +491,7 @@ static char g_uart4rxfifo[RXDMA_BUFFER_SIZE]; # endif #endif -#ifdef CONFIG_STM32_UART5 +#ifdef CONFIG_STM32_UART5_SERIALDRIVER static char g_uart5rxbuffer[CONFIG_UART5_RXBUFSIZE]; static char g_uart5txbuffer[CONFIG_UART5_TXBUFSIZE]; # ifdef CONFIG_UART5_RXDMA @@ -499,7 +499,7 @@ static char g_uart5rxfifo[RXDMA_BUFFER_SIZE]; # endif #endif -#ifdef CONFIG_STM32_USART6 +#ifdef CONFIG_STM32_USART6_SERIALDRIVER static char g_usart6rxbuffer[CONFIG_USART6_RXBUFSIZE]; static char g_usart6txbuffer[CONFIG_USART6_TXBUFSIZE]; # ifdef CONFIG_USART6_RXDMA @@ -507,7 +507,7 @@ static char g_usart6rxfifo[RXDMA_BUFFER_SIZE]; # endif #endif -#ifdef CONFIG_STM32_UART7 +#ifdef CONFIG_STM32_UART7_SERIALDRIVER static char g_uart7rxbuffer[CONFIG_UART7_RXBUFSIZE]; static char g_uart7txbuffer[CONFIG_UART7_TXBUFSIZE]; # ifdef CONFIG_UART7_RXDMA @@ -515,7 +515,7 @@ static char g_uart7rxfifo[RXDMA_BUFFER_SIZE]; # endif #endif -#ifdef CONFIG_STM32_UART8 +#ifdef CONFIG_STM32_UART8_SERIALDRIVER static char g_uart8rxbuffer[CONFIG_UART8_RXBUFSIZE]; static char g_uart8txbuffer[CONFIG_UART8_TXBUFSIZE]; # ifdef CONFIG_UART8_RXDMA @@ -525,7 +525,7 @@ static char g_uart8rxfifo[RXDMA_BUFFER_SIZE]; /* This describes the state of the STM32 USART1 ports. */ -#ifdef CONFIG_STM32_USART1 +#ifdef CONFIG_STM32_USART1_SERIALDRIVER static struct up_dev_s g_usart1priv = { .dev = @@ -587,7 +587,7 @@ static struct up_dev_s g_usart1priv = /* This describes the state of the STM32 USART2 port. */ -#ifdef CONFIG_STM32_USART2 +#ifdef CONFIG_STM32_USART2_SERIALDRIVER static struct up_dev_s g_usart2priv = { .dev = @@ -649,7 +649,7 @@ static struct up_dev_s g_usart2priv = /* This describes the state of the STM32 USART3 port. */ -#ifdef CONFIG_STM32_USART3 +#ifdef CONFIG_STM32_USART3_SERIALDRIVER static struct up_dev_s g_usart3priv = { .dev = @@ -711,7 +711,7 @@ static struct up_dev_s g_usart3priv = /* This describes the state of the STM32 UART4 port. */ -#ifdef CONFIG_STM32_UART4 +#ifdef CONFIG_STM32_UART4_SERIALDRIVER static struct up_dev_s g_uart4priv = { .dev = @@ -777,7 +777,7 @@ static struct up_dev_s g_uart4priv = /* This describes the state of the STM32 UART5 port. */ -#ifdef CONFIG_STM32_UART5 +#ifdef CONFIG_STM32_UART5_SERIALDRIVER static struct up_dev_s g_uart5priv = { .dev = @@ -843,7 +843,7 @@ static struct up_dev_s g_uart5priv = /* This describes the state of the STM32 USART6 port. */ -#ifdef CONFIG_STM32_USART6 +#ifdef CONFIG_STM32_USART6_SERIALDRIVER static struct up_dev_s g_usart6priv = { .dev = @@ -905,7 +905,7 @@ static struct up_dev_s g_usart6priv = /* This describes the state of the STM32 UART7 port. */ -#ifdef CONFIG_STM32_UART7 +#ifdef CONFIG_STM32_UART7_SERIALDRIVER static struct up_dev_s g_uart7priv = { .dev = @@ -940,11 +940,11 @@ static struct up_dev_s g_uart7priv = .usartbase = STM32_UART7_BASE, .tx_gpio = GPIO_UART7_TX, .rx_gpio = GPIO_UART7_RX, -#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_USART7_OFLOWCONTROL) +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART7_OFLOWCONTROL) .oflow = true, .cts_gpio = GPIO_UART7_CTS, #endif -#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_USART7_IFLOWCONTROL) +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART7_IFLOWCONTROL) .iflow = true, .rts_gpio = GPIO_UART7_RTS, #endif @@ -967,7 +967,7 @@ static struct up_dev_s g_uart7priv = /* This describes the state of the STM32 UART8 port. */ -#ifdef CONFIG_STM32_UART8 +#ifdef CONFIG_STM32_UART8_SERIALDRIVER static struct up_dev_s g_uart8priv = { .dev = @@ -1002,11 +1002,11 @@ static struct up_dev_s g_uart8priv = .usartbase = STM32_UART8_BASE, .tx_gpio = GPIO_UART8_TX, .rx_gpio = GPIO_UART8_RX, -#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_USART8_OFLOWCONTROL) +#if defined(CONFIG_SERIAL_OFLOWCONTROL) && defined(CONFIG_UART8_OFLOWCONTROL) .oflow = true, .cts_gpio = GPIO_UART8_CTS, #endif -#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_USART8_IFLOWCONTROL) +#if defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_UART8_IFLOWCONTROL) .iflow = true, .rts_gpio = GPIO_UART8_RTS, #endif @@ -1031,28 +1031,28 @@ static struct up_dev_s g_uart8priv = static struct up_dev_s * const uart_devs[STM32_NUSART] = { -#ifdef CONFIG_STM32_USART1 +#ifdef CONFIG_STM32_USART1_SERIALDRIVER [0] = &g_usart1priv, #endif -#ifdef CONFIG_STM32_USART2 +#ifdef CONFIG_STM32_USART2_SERIALDRIVER [1] = &g_usart2priv, #endif -#ifdef CONFIG_STM32_USART3 +#ifdef CONFIG_STM32_USART3_SERIALDRIVER [2] = &g_usart3priv, #endif -#ifdef CONFIG_STM32_UART4 +#ifdef CONFIG_STM32_UART4_SERIALDRIVER [3] = &g_uart4priv, #endif -#ifdef CONFIG_STM32_UART5 +#ifdef CONFIG_STM32_UART5_SERIALDRIVER [4] = &g_uart5priv, #endif -#ifdef CONFIG_STM32_USART6 +#ifdef CONFIG_STM32_USART6_SERIALDRIVER [5] = &g_usart6priv, #endif -#ifdef CONFIG_STM32_UART7 +#ifdef CONFIG_STM32_UART7_SERIALDRIVER [6] = &g_uart7priv, #endif -#ifdef CONFIG_STM32_UART8 +#ifdef CONFIG_STM32_UART8_SERIALDRIVER [7] = &g_uart8priv, #endif }; @@ -1376,49 +1376,49 @@ static void up_set_apb_clock(struct uart_dev_s *dev, bool on) { default: return; -#ifdef CONFIG_STM32_USART1 +#ifdef CONFIG_STM32_USART1_SERIALDRIVER case STM32_USART1_BASE: rcc_en = RCC_APB2ENR_USART1EN; regaddr = STM32_RCC_APB2ENR; break; #endif -#ifdef CONFIG_STM32_USART2 +#ifdef CONFIG_STM32_USART2_SERIALDRIVER case STM32_USART2_BASE: rcc_en = RCC_APB1ENR_USART2EN; regaddr = STM32_RCC_APB1ENR; break; #endif -#ifdef CONFIG_STM32_USART3 +#ifdef CONFIG_STM32_USART3_SERIALDRIVER case STM32_USART3_BASE: rcc_en = RCC_APB1ENR_USART3EN; regaddr = STM32_RCC_APB1ENR; break; #endif -#ifdef CONFIG_STM32_UART4 +#ifdef CONFIG_STM32_UART4_SERIALDRIVER case STM32_UART4_BASE: rcc_en = RCC_APB1ENR_UART4EN; regaddr = STM32_RCC_APB1ENR; break; #endif -#ifdef CONFIG_STM32_UART5 +#ifdef CONFIG_STM32_UART5_SERIALDRIVER case STM32_UART5_BASE: rcc_en = RCC_APB1ENR_UART5EN; regaddr = STM32_RCC_APB1ENR; break; #endif -#ifdef CONFIG_STM32_USART6 +#ifdef CONFIG_STM32_USART6_SERIALDRIVER case STM32_USART6_BASE: rcc_en = RCC_APB2ENR_USART6EN; regaddr = STM32_RCC_APB2ENR; break; #endif -#ifdef CONFIG_STM32_UART7 +#ifdef CONFIG_STM32_UART7_SERIALDRIVER case STM32_UART7_BASE: rcc_en = RCC_APB1ENR_UART7EN; regaddr = STM32_RCC_APB1ENR; break; #endif -#ifdef CONFIG_STM32_UART8 +#ifdef CONFIG_STM32_UART8_SERIALDRIVER case STM32_UART8_BASE: rcc_en = RCC_APB1ENR_UART8EN; regaddr = STM32_RCC_APB1ENR; @@ -2579,56 +2579,56 @@ static bool up_txready(struct uart_dev_s *dev) * ****************************************************************************/ -#ifdef CONFIG_STM32_USART1 +#ifdef CONFIG_STM32_USART1_SERIALDRIVER static int up_interrupt_usart1(int irq, void *context) { return up_interrupt_common(&g_usart1priv); } #endif -#ifdef CONFIG_STM32_USART2 +#ifdef CONFIG_STM32_USART2_SERIALDRIVER static int up_interrupt_usart2(int irq, void *context) { return up_interrupt_common(&g_usart2priv); } #endif -#ifdef CONFIG_STM32_USART3 +#ifdef CONFIG_STM32_USART3_SERIALDRIVER static int up_interrupt_usart3(int irq, void *context) { return up_interrupt_common(&g_usart3priv); } #endif -#ifdef CONFIG_STM32_UART4 +#ifdef CONFIG_STM32_UART4_SERIALDRIVER static int up_interrupt_uart4(int irq, void *context) { return up_interrupt_common(&g_uart4priv); } #endif -#ifdef CONFIG_STM32_UART5 +#ifdef CONFIG_STM32_UART5_SERIALDRIVER static int up_interrupt_uart5(int irq, void *context) { return up_interrupt_common(&g_uart5priv); } #endif -#ifdef CONFIG_STM32_USART6 +#ifdef CONFIG_STM32_USART6_SERIALDRIVER static int up_interrupt_usart6(int irq, void *context) { return up_interrupt_common(&g_usart6priv); } #endif -#ifdef CONFIG_STM32_UART7 +#ifdef CONFIG_STM32_UART7_SERIALDRIVER static int up_interrupt_uart7(int irq, void *context) { return up_interrupt_common(&g_uart7priv); } #endif -#ifdef CONFIG_STM32_UART8 +#ifdef CONFIG_STM32_UART8_SERIALDRIVER static int up_interrupt_uart8(int irq, void *context) { return up_interrupt_common(&g_uart8priv); @@ -2771,7 +2771,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain, return OK; } #endif -#endif /* HAVE_UART */ +#endif /* HAVE_SERIALDRIVER */ #endif /* USE_SERIALDRIVER */ /**************************************************************************** @@ -2793,7 +2793,7 @@ static int up_pm_prepare(struct pm_callback_s *cb, int domain, #ifdef USE_EARLYSERIALINIT void up_earlyserialinit(void) { -#ifdef HAVE_UART +#ifdef HAVE_SERIALDRIVER unsigned i; /* Disable all USART interrupts */ @@ -2826,7 +2826,7 @@ void up_earlyserialinit(void) void up_serialinit(void) { -#ifdef HAVE_UART +#ifdef HAVE_SERIALDRIVER char devname[16]; unsigned i; unsigned minor = 0; diff --git a/arch/arm/src/stm32/stm32_tim.c b/arch/arm/src/stm32/stm32_tim.c index 14359625f88..62e2783e3a8 100644 --- a/arch/arm/src/stm32/stm32_tim.c +++ b/arch/arm/src/stm32/stm32_tim.c @@ -144,57 +144,137 @@ defined(CONFIG_STM32_TIM14_DAC) || defined(CONFIG_STM32_TIM14_QE) # undef CONFIG_STM32_TIM14 #endif +#if defined(CONFIG_STM32_TIM15_PWM) || defined (CONFIG_STM32_TIM15_ADC) || \ + defined(CONFIG_STM32_TIM15_DAC) || defined(CONFIG_STM32_TIM15_QE) +# undef CONFIG_STM32_TIM15 +#endif +#if defined(CONFIG_STM32_TIM16_PWM) || defined (CONFIG_STM32_TIM16_ADC) || \ + defined(CONFIG_STM32_TIM16_DAC) || defined(CONFIG_STM32_TIM16_QE) +# undef CONFIG_STM32_TIM16 +#endif +#if defined(CONFIG_STM32_TIM17_PWM) || defined (CONFIG_STM32_TIM17_ADC) || \ + defined(CONFIG_STM32_TIM17_DAC) || defined(CONFIG_STM32_TIM17_QE) +# undef CONFIG_STM32_TIM17 +#endif -#if defined(CONFIG_STM32_TIM1) +#if defined(CONFIG_STM32_TIM1) # if defined(GPIO_TIM1_CH1OUT) ||defined(GPIO_TIM1_CH2OUT)||\ defined(GPIO_TIM1_CH3OUT) ||defined(GPIO_TIM1_CH4OUT) # define HAVE_TIM1_GPIOCONFIG 1 #endif #endif -#if defined(CONFIG_STM32_TIM2) +#if defined(CONFIG_STM32_TIM2) # if defined(GPIO_TIM2_CH1OUT) ||defined(GPIO_TIM2_CH2OUT)||\ defined(GPIO_TIM2_CH3OUT) ||defined(GPIO_TIM2_CH4OUT) # define HAVE_TIM2_GPIOCONFIG 1 #endif #endif -#if defined(CONFIG_STM32_TIM3) +#if defined(CONFIG_STM32_TIM3) # if defined(GPIO_TIM3_CH1OUT) ||defined(GPIO_TIM3_CH2OUT)||\ defined(GPIO_TIM3_CH3OUT) ||defined(GPIO_TIM3_CH4OUT) # define HAVE_TIM3_GPIOCONFIG 1 #endif #endif -#if defined(CONFIG_STM32_TIM4) +#if defined(CONFIG_STM32_TIM4) # if defined(GPIO_TIM4_CH1OUT) ||defined(GPIO_TIM4_CH2OUT)||\ defined(GPIO_TIM4_CH3OUT) ||defined(GPIO_TIM4_CH4OUT) # define HAVE_TIM4_GPIOCONFIG 1 #endif #endif -#if defined(CONFIG_STM32_TIM5) +#if defined(CONFIG_STM32_TIM5) # if defined(GPIO_TIM5_CH1OUT) ||defined(GPIO_TIM5_CH2OUT)||\ defined(GPIO_TIM5_CH3OUT) ||defined(GPIO_TIM5_CH4OUT) # define HAVE_TIM5_GPIOCONFIG 1 #endif #endif -#if defined(CONFIG_STM32_TIM8) +#if defined(CONFIG_STM32_TIM8) # if defined(GPIO_TIM8_CH1OUT) ||defined(GPIO_TIM8_CH2OUT)||\ defined(GPIO_TIM8_CH3OUT) ||defined(GPIO_TIM8_CH4OUT) # define HAVE_TIM8_GPIOCONFIG 1 #endif #endif +#if defined(CONFIG_STM32_TIM9) +# if defined(GPIO_TIM9_CH1OUT) ||defined(GPIO_TIM9_CH2OUT)||\ + defined(GPIO_TIM9_CH3OUT) ||defined(GPIO_TIM9_CH4OUT) +# define HAVE_TIM9_GPIOCONFIG 1 +#endif +#endif + +#if defined(CONFIG_STM32_TIM10) +# if defined(GPIO_TIM10_CH1OUT) ||defined(GPIO_TIM10_CH2OUT)||\ + defined(GPIO_TIM10_CH3OUT) ||defined(GPIO_TIM10_CH4OUT) +# define HAVE_TIM10_GPIOCONFIG 1 +#endif +#endif + +#if defined(CONFIG_STM32_TIM11) +# if defined(GPIO_TIM11_CH1OUT) ||defined(GPIO_TIM11_CH2OUT)||\ + defined(GPIO_TIM11_CH3OUT) ||defined(GPIO_TIM11_CH4OUT) +# define HAVE_TIM11_GPIOCONFIG 1 +#endif +#endif + +#if defined(CONFIG_STM32_TIM12) +# if defined(GPIO_TIM12_CH1OUT) ||defined(GPIO_TIM12_CH2OUT)||\ + defined(GPIO_TIM12_CH3OUT) ||defined(GPIO_TIM12_CH4OUT) +# define HAVE_TIM12_GPIOCONFIG 1 +#endif +#endif + +#if defined(CONFIG_STM32_TIM13) +# if defined(GPIO_TIM13_CH1OUT) ||defined(GPIO_TIM13_CH2OUT)||\ + defined(GPIO_TIM13_CH3OUT) ||defined(GPIO_TIM13_CH4OUT) +# define HAVE_TIM13_GPIOCONFIG 1 +#endif +#endif + +#if defined(CONFIG_STM32_TIM14) +# if defined(GPIO_TIM14_CH1OUT) ||defined(GPIO_TIM14_CH2OUT)||\ + defined(GPIO_TIM14_CH3OUT) ||defined(GPIO_TIM14_CH4OUT) +# define HAVE_TIM14_GPIOCONFIG 1 +#endif +#endif + +#if defined(CONFIG_STM32_TIM15) +# if defined(GPIO_TIM15_CH1OUT) ||defined(GPIO_TIM15_CH2OUT)||\ + defined(GPIO_TIM15_CH3OUT) ||defined(GPIO_TIM15_CH4OUT) +# define HAVE_TIM15_GPIOCONFIG 1 +#endif +#endif + +#if defined(CONFIG_STM32_TIM16) +# if defined(GPIO_TIM16_CH1OUT) ||defined(GPIO_TIM16_CH2OUT)||\ + defined(GPIO_TIM16_CH3OUT) ||defined(GPIO_TIM16_CH4OUT) +# define HAVE_TIM16_GPIOCONFIG 1 +#endif +#endif + +#if defined(CONFIG_STM32_TIM17) +# if defined(GPIO_TIM17_CH1OUT) ||defined(GPIO_TIM17_CH2OUT)||\ + defined(GPIO_TIM17_CH3OUT) ||defined(GPIO_TIM17_CH4OUT) +# define HAVE_TIM17_GPIOCONFIG 1 +#endif +#endif /* This module then only compiles if there are enabled timers that are not intended for * some other purpose. */ -#if defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32_TIM2) || defined(CONFIG_STM32_TIM3) || \ - defined(CONFIG_STM32_TIM4) || defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32_TIM6) || \ - defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8) +#if defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32_TIM2) || \ + defined(CONFIG_STM32_TIM3) || defined(CONFIG_STM32_TIM4) || \ + defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32_TIM6) || \ + defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8) || \ + defined(CONFIG_STM32_TIM9) || defined(CONFIG_STM32_TIM10) || \ + defined(CONFIG_STM32_TIM11) || defined(CONFIG_STM32_TIM12) || \ + defined(CONFIG_STM32_TIM13) || defined(CONFIG_STM32_TIM14) || \ + defined(CONFIG_STM32_TIM15) || defined(CONFIG_STM32_TIM16) || \ + defined(CONFIG_STM32_TIM17) /************************************************************************************ * Private Types @@ -312,9 +392,10 @@ static void stm32_tim_gpioconfig(uint32_t cfg, stm32_tim_channel_t mode) static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq) { + uint32_t freqin; int prescaler; - ASSERT(dev); + DEBUGASSERT(dev != NULL); /* Disable Timer? */ @@ -324,20 +405,112 @@ static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq) return 0; } -#if STM32_NATIM > 0 - if (((struct stm32_tim_priv_s *)dev)->base == STM32_TIM1_BASE || - ((struct stm32_tim_priv_s *)dev)->base == STM32_TIM8_BASE) + /* Get the input clock frequency for this timer. These vary with + * different timer clock sources, MCU-specific timer configuration, and + * board-specific clock configuration. The correct input clock frequency + * must be defined in the board.h header file. + */ + + switch (((struct stm32_tim_priv_s *)dev)->base) { - prescaler = STM32_TIM18_FREQUENCY / freq; - } - else +#ifdef CONFIG_STM32_TIM1 + case STM32_TIM1_BASE: + freqin = BOARD_TIM1_FREQUENCY; + break; #endif - { - prescaler = STM32_TIM27_FREQUENCY / freq; +#ifdef CONFIG_STM32_TIM2 + case STM32_TIM2_BASE: + freqin = BOARD_TIM2_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM3 + case STM32_TIM3_BASE: + freqin = BOARD_TIM3_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM4 + case STM32_TIM4_BASE: + freqin = BOARD_TIM4_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM5 + case STM32_TIM5_BASE: + freqin = BOARD_TIM5_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM6 + case STM32_TIM6_BASE: + freqin = BOARD_TIM6_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM7 + case STM32_TIM7_BASE: + freqin = BOARD_TIM7_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM8 + case STM32_TIM8_BASE: + freqin = BOARD_TIM8_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM9 + case STM32_TIM9_BASE: + freqin = BOARD_TIM9_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM10 + case STM32_TIM10_BASE: + freqin = BOARD_TIM10_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM11 + case STM32_TIM11_BASE: + freqin = BOARD_TIM11_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM12 + case STM32_TIM12_BASE: + freqin = BOARD_TIM12_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM13 + case STM32_TIM13_BASE: + freqin = BOARD_TIM13_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM14 + case STM32_TIM14_BASE: + freqin = BOARD_TIM14_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM15 + case STM32_TIM15_BASE: + freqin = BOARD_TIM15_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM16 + case STM32_TIM16_BASE: + freqin = BOARD_TIM16_FREQUENCY; + break; +#endif +#ifdef CONFIG_STM32_TIM17 + case STM32_TIM17_BASE: + freqin = BOARD_TIM17_FREQUENCY; + break; +#endif + + default: + return -EINVAL; } - /* We need to decrement value for '1', but only, if we are allowed to - * not to cause underflow. Check for overflow. + /* Select a pre-scaler value for this timer using the input clock + * frequency. + */ + + prescaler = freqin / freq; + + /* We need to decrement value for '1', but only, if that will not to + * cause underflow. */ if (prescaler > 0) @@ -345,6 +518,8 @@ static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq) prescaler--; } + /* Check for overflow as well. */ + if (prescaler > 0xffff) { prescaler = 0xffff; @@ -359,7 +534,7 @@ static int stm32_tim_setclock(FAR struct stm32_tim_dev_s *dev, uint32_t freq) static void stm32_tim_setperiod(FAR struct stm32_tim_dev_s *dev, uint32_t period) { - ASSERT(dev); + DEBUGASSERT(dev != NULL); stm32_putreg32(dev, STM32_BTIM_ARR_OFFSET, period); } @@ -369,11 +544,16 @@ static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, { int vectorno; - ASSERT(dev); - ASSERT(source == 0); + DEBUGASSERT(dev != NULL); + DEBUGASSERT(source == 0); switch (((struct stm32_tim_priv_s *)dev)->base) { +#ifdef CONFIG_STM32_TIM1 + case STM32_TIM1_BASE: + vectorno = STM32_IRQ_TIM1UP; + break; +#endif #ifdef CONFIG_STM32_TIM2 case STM32_TIM2_BASE: vectorno = STM32_IRQ_TIM2; @@ -394,36 +574,69 @@ static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, vectorno = STM32_IRQ_TIM5; break; #endif -#if STM32_NBTIM > 0 #ifdef CONFIG_STM32_TIM6 case STM32_TIM6_BASE: vectorno = STM32_IRQ_TIM6; break; #endif -#endif -#if STM32_NBTIM > 1 #ifdef CONFIG_STM32_TIM7 case STM32_TIM7_BASE: vectorno = STM32_IRQ_TIM7; break; #endif -#endif -#if STM32_NATIM > 0 - /* TODO: add support for multiple sources and callbacks */ - -#ifdef CONFIG_STM32_TIM1 - case STM32_TIM1_BASE: - vectorno = STM32_IRQ_TIM1UP; - break; -#endif #ifdef CONFIG_STM32_TIM8 case STM32_TIM8_BASE: vectorno = STM32_IRQ_TIM8UP; break; #endif +#ifdef CONFIG_STM32_TIM9 + case STM32_TIM9_BASE: + vectorno = STM32_IRQ_TIM9; + break; #endif +#ifdef CONFIG_STM32_TIM10 + case STM32_TIM10_BASE: + vectorno = STM32_IRQ_TIM10; + break; +#endif +#ifdef CONFIG_STM32_TIM11 + case STM32_TIM11_BASE: + vectorno = STM32_IRQ_TIM11; + break; +#endif +#ifdef CONFIG_STM32_TIM12 + case STM32_TIM12_BASE: + vectorno = STM32_IRQ_TIM12; + break; +#endif +#ifdef CONFIG_STM32_TIM13 + case STM32_TIM13_BASE: + vectorno = STM32_IRQ_TIM13; + break; +#endif +#ifdef CONFIG_STM32_TIM14 + case STM32_TIM14_BASE: + vectorno = STM32_IRQ_TIM14; + break; +#endif +#ifdef CONFIG_STM32_TIM15 + case STM32_TIM15_BASE: + vectorno = STM32_IRQ_TIM15; + break; +#endif +#ifdef CONFIG_STM32_TIM16 + case STM32_TIM16_BASE: + vectorno = STM32_IRQ_TIM16; + break; +#endif +#ifdef CONFIG_STM32_TIM17 + case STM32_TIM17_BASE: + vectorno = STM32_IRQ_TIM17; + break; +#endif + default: - return ERROR; + return -EINVAL; } /* Disable interrupt when callback is removed */ @@ -451,13 +664,13 @@ static int stm32_tim_setisr(FAR struct stm32_tim_dev_s *dev, static void stm32_tim_enableint(FAR struct stm32_tim_dev_s *dev, int source) { - ASSERT(dev); + DEBUGASSERT(dev != NULL); stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, 0, ATIM_DIER_UIE); } static void stm32_tim_disableint(FAR struct stm32_tim_dev_s *dev, int source) { - ASSERT(dev); + DEBUGASSERT(dev != NULL); stm32_modifyreg16(dev, STM32_BTIM_DIER_OFFSET, ATIM_DIER_UIE, 0); } @@ -474,7 +687,7 @@ static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t m { uint16_t val = ATIM_CR1_CEN | ATIM_CR1_ARPE; - ASSERT(dev); + DEBUGASSERT(dev != NULL); /* This function is not supported on basic timers. To enable or * disable it, simply set its clock to valid frequency or zero. @@ -489,7 +702,7 @@ static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t m #if STM32_NBTIM > 0 ) { - return ERROR; + return -EINVAL; } #endif @@ -517,7 +730,7 @@ static int stm32_tim_setmode(FAR struct stm32_tim_dev_s *dev, stm32_tim_mode_t m break; default: - return ERROR; + return -EINVAL; } stm32_tim_reload_counter(dev); @@ -545,13 +758,13 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel uint16_t ccer_val = stm32_getreg16(dev, STM32_GTIM_CCER_OFFSET); uint8_t ccmr_offset = STM32_GTIM_CCMR1_OFFSET; - ASSERT(dev); + DEBUGASSERT(dev != NULL); /* Further we use range as 0..3; if channel=0 it will also overflow here */ if (--channel > 4) { - return ERROR; + return -EINVAL; } /* Assume that channel is disabled and polarity is active high */ @@ -571,7 +784,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel #if STM32_NBTIM > 0 ) { - return ERROR; + return -EINVAL; } #endif @@ -588,7 +801,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel break; default: - return ERROR; + return -EINVAL; } /* Set polarity */ @@ -621,6 +834,31 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel switch (((struct stm32_tim_priv_s *)dev)->base) { +#ifdef CONFIG_STM32_TIM1 + case STM32_TIM1_BASE: + switch (channel) + { +#if defined(GPIO_TIM1_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break; +#endif +#if defined(GPIO_TIM1_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break; +#endif +#if defined(GPIO_TIM1_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break; +#endif +#if defined(GPIO_TIM1_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break; +#endif + default: + return -EINVAL; + } + break; +#endif #ifdef CONFIG_STM32_TIM2 case STM32_TIM2_BASE: switch (channel) @@ -646,7 +884,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel break; #endif default: - return ERROR; + return -EINVAL; } break; #endif @@ -675,7 +913,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel break; #endif default: - return ERROR; + return -EINVAL; } break; #endif @@ -704,7 +942,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel break; #endif default: - return ERROR; + return -EINVAL; } break; #endif @@ -733,34 +971,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel break; #endif default: - return ERROR; - } - break; -#endif - -#if STM32_NATIM > 0 -#ifdef CONFIG_STM32_TIM1 - case STM32_TIM1_BASE: - switch (channel) - { -#if defined(GPIO_TIM1_CH1OUT) - case 0: - stm32_tim_gpioconfig(GPIO_TIM1_CH1OUT, mode); break; -#endif -#if defined(GPIO_TIM1_CH2OUT) - case 1: - stm32_tim_gpioconfig(GPIO_TIM1_CH2OUT, mode); break; -#endif -#if defined(GPIO_TIM1_CH3OUT) - case 2: - stm32_tim_gpioconfig(GPIO_TIM1_CH3OUT, mode); break; -#endif -#if defined(GPIO_TIM1_CH4OUT) - case 3: - stm32_tim_gpioconfig(GPIO_TIM1_CH4OUT, mode); break; -#endif - default: - return ERROR; + return -EINVAL; } break; #endif @@ -785,13 +996,273 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel stm32_tim_gpioconfig(GPIO_TIM8_CH4OUT, mode); break; #endif default: - return ERROR; + return -EINVAL; } break; #endif +#ifdef CONFIG_STM32_TIM9 + case STM32_TIM9_BASE: + switch (channel) + { +#if defined(GPIO_TIM9_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM9_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM9_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM9_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM9_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM9_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM9_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM9_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; +#endif +#ifdef CONFIG_STM32_TIM10 + case STM32_TIM10_BASE: + switch (channel) + { +#if defined(GPIO_TIM10_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM10_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM10_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM10_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM10_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM10_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM10_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM10_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; +#endif +#ifdef CONFIG_STM32_TIM11 + case STM32_TIM11_BASE: + switch (channel) + { +#if defined(GPIO_TIM11_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM11_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM11_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM11_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM11_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM11_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM11_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM11_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; +#endif +#ifdef CONFIG_STM32_TIM12 + case STM32_TIM12_BASE: + switch (channel) + { +#if defined(GPIO_TIM12_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM12_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM12_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM12_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM12_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM12_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM12_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM12_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; +#endif +#ifdef CONFIG_STM32_TIM13 + case STM32_TIM13_BASE: + switch (channel) + { +#if defined(GPIO_TIM13_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM13_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM13_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM13_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM13_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM13_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM13_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM13_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; +#endif +#ifdef CONFIG_STM32_TIM14 + case STM32_TIM14_BASE: + switch (channel) + { +#if defined(GPIO_TIM14_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM14_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM14_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM14_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM14_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM14_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM14_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM14_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; +#endif +#ifdef CONFIG_STM32_TIM15 + case STM32_TIM15_BASE: + switch (channel) + { +#if defined(GPIO_TIM15_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM15_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM15_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM15_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM15_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM15_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM15_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM15_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; +#endif +#ifdef CONFIG_STM32_TIM16 + case STM32_TIM16_BASE: + switch (channel) + { +#if defined(GPIO_TIM16_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM16_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM16_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM16_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM16_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM16_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM16_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM16_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; +#endif +#ifdef CONFIG_STM32_TIM17 + case STM32_TIM17_BASE: + switch (channel) + { +#if defined(GPIO_TIM17_CH1OUT) + case 0: + stm32_tim_gpioconfig(GPIO_TIM17_CH1OUT, mode); + break; +#endif +#if defined(GPIO_TIM17_CH2OUT) + case 1: + stm32_tim_gpioconfig(GPIO_TIM17_CH2OUT, mode); + break; +#endif +#if defined(GPIO_TIM17_CH3OUT) + case 2: + stm32_tim_gpioconfig(GPIO_TIM17_CH3OUT, mode); + break; +#endif +#if defined(GPIO_TIM17_CH4OUT) + case 3: + stm32_tim_gpioconfig(GPIO_TIM17_CH4OUT, mode); + break; +#endif + default: + return -EINVAL; + } + break; #endif default: - return ERROR; + return -EINVAL; } return OK; @@ -800,7 +1271,7 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel static int stm32_tim_setcompare(FAR struct stm32_tim_dev_s *dev, uint8_t channel, uint32_t compare) { - ASSERT(dev); + DEBUGASSERT(dev != NULL); switch (channel) { @@ -817,14 +1288,14 @@ static int stm32_tim_setcompare(FAR struct stm32_tim_dev_s *dev, uint8_t channel stm32_putreg32(dev, STM32_GTIM_CCR4_OFFSET, compare); break; default: - return ERROR; + return -EINVAL; } return OK; } static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel) { - ASSERT(dev); + DEBUGASSERT(dev != NULL); switch (channel) { @@ -838,7 +1309,7 @@ static int stm32_tim_getcapture(FAR struct stm32_tim_dev_s *dev, uint8_t channel return stm32_getreg32(dev, STM32_GTIM_CCR4_OFFSET); } - return ERROR; + return -EINVAL; } /************************************************************************************ @@ -865,6 +1336,14 @@ struct stm32_tim_ops_s stm32_tim_ops = .ackint = &stm32_tim_ackint }; +#ifdef CONFIG_STM32_TIM1 +struct stm32_tim_priv_s stm32_tim1_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM1_BASE, +}; +#endif #ifdef CONFIG_STM32_TIM2 struct stm32_tim_priv_s stm32_tim2_priv = { @@ -901,7 +1380,6 @@ struct stm32_tim_priv_s stm32_tim5_priv = }; #endif -#if STM32_NBTIM > 0 #ifdef CONFIG_STM32_TIM6 struct stm32_tim_priv_s stm32_tim6_priv = { @@ -910,9 +1388,7 @@ struct stm32_tim_priv_s stm32_tim6_priv = .base = STM32_TIM6_BASE, }; #endif -#endif -#if STM32_NBTIM > 1 #ifdef CONFIG_STM32_TIM7 struct stm32_tim_priv_s stm32_tim7_priv = { @@ -921,18 +1397,6 @@ struct stm32_tim_priv_s stm32_tim7_priv = .base = STM32_TIM7_BASE, }; #endif -#endif - -#if STM32_NATIM > 0 - -#ifdef CONFIG_STM32_TIM1 -struct stm32_tim_priv_s stm32_tim1_priv = -{ - .ops = &stm32_tim_ops, - .mode = STM32_TIM_MODE_UNUSED, - .base = STM32_TIM1_BASE, -}; -#endif #ifdef CONFIG_STM32_TIM8 struct stm32_tim_priv_s stm32_tim8_priv = @@ -943,6 +1407,85 @@ struct stm32_tim_priv_s stm32_tim8_priv = }; #endif +#ifdef CONFIG_STM32_TIM9 +struct stm32_tim_priv_s stm32_tim9_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM9_BASE, +}; +#endif + +#ifdef CONFIG_STM32_TIM10 +struct stm32_tim_priv_s stm32_tim10_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM10_BASE, +}; +#endif + +#ifdef CONFIG_STM32_TIM11 +struct stm32_tim_priv_s stm32_tim11_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM11_BASE, +}; +#endif + +#ifdef CONFIG_STM32_TIM12 +struct stm32_tim_priv_s stm32_tim12_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM12_BASE, +}; +#endif + +#ifdef CONFIG_STM32_TIM13 +struct stm32_tim_priv_s stm32_tim13_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM13_BASE, +}; +#endif + +#ifdef CONFIG_STM32_TIM14 +struct stm32_tim_priv_s stm32_tim14_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM14_BASE, +}; +#endif + +#ifdef CONFIG_STM32_TIM15 +struct stm32_tim_priv_s stm32_tim15_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM15_BASE, +}; +#endif + +#ifdef CONFIG_STM32_TIM16 +struct stm32_tim_priv_s stm32_tim16_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM16_BASE, +}; +#endif + +#ifdef CONFIG_STM32_TIM17 +struct stm32_tim_priv_s stm32_tim17_priv = +{ + .ops = &stm32_tim_ops, + .mode = STM32_TIM_MODE_UNUSED, + .base = STM32_TIM17_BASE, +}; #endif /************************************************************************************ @@ -957,6 +1500,12 @@ FAR struct stm32_tim_dev_s *stm32_tim_init(int timer) switch (timer) { +#ifdef CONFIG_STM32_TIM1 + case 1: + dev = (struct stm32_tim_dev_s *)&stm32_tim1_priv; + modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN); + break; +#endif #ifdef CONFIG_STM32_TIM2 case 2: dev = (struct stm32_tim_dev_s *)&stm32_tim2_priv; @@ -981,37 +1530,77 @@ FAR struct stm32_tim_dev_s *stm32_tim_init(int timer) modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM5EN); break; #endif - -#if STM32_NBTIM > 0 #ifdef CONFIG_STM32_TIM6 case 6: dev = (struct stm32_tim_dev_s *)&stm32_tim6_priv; modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM6EN); break; #endif -#endif -#if STM32_NBTIM > 1 #ifdef CONFIG_STM32_TIM7 case 7: dev = (struct stm32_tim_dev_s *)&stm32_tim7_priv; modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM7EN); break; #endif -#endif - -#if STM32_NATIM > 0 -#ifdef CONFIG_STM32_TIM1 - case 1: - dev = (struct stm32_tim_dev_s *)&stm32_tim1_priv; - modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM1EN); - break; -#endif #ifdef CONFIG_STM32_TIM8 case 8: dev = (struct stm32_tim_dev_s *)&stm32_tim8_priv; modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM8EN); break; #endif +#ifdef CONFIG_STM32_TIM9 + case 9: + dev = (struct stm32_tim_dev_s *)&stm32_tim9_priv; + modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM9EN); + break; +#endif +#ifdef CONFIG_STM32_TIM10 + case 10: + dev = (struct stm32_tim_dev_s *)&stm32_tim10_priv; + modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM10EN); + break; +#endif +#ifdef CONFIG_STM32_TIM11 + case 11: + dev = (struct stm32_tim_dev_s *)&stm32_tim11_priv; + modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM11EN); + break; +#endif +#ifdef CONFIG_STM32_TIM12 + case 12: + dev = (struct stm32_tim_dev_s *)&stm32_tim12_priv; + modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM12EN); + break; +#endif +#ifdef CONFIG_STM32_TIM13 + case 13: + dev = (struct stm32_tim_dev_s *)&stm32_tim13_priv; + modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM13EN); + break; +#endif +#ifdef CONFIG_STM32_TIM14 + case 14: + dev = (struct stm32_tim_dev_s *)&stm32_tim14_priv; + modifyreg32(STM32_RCC_APB1ENR, 0, RCC_APB1ENR_TIM14EN); + break; +#endif +#ifdef CONFIG_STM32_TIM15 + case 15: + dev = (struct stm32_tim_dev_s *)&stm32_tim15_priv; + modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM15EN); + break; +#endif +#ifdef CONFIG_STM32_TIM16 + case 16: + dev = (struct stm32_tim_dev_s *)&stm32_tim16_priv; + modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM16EN); + break; +#endif +#ifdef CONFIG_STM32_TIM17 + case 17: + dev = (struct stm32_tim_dev_s *)&stm32_tim17_priv; + modifyreg32(STM32_RCC_APB2ENR, 0, RCC_APB2ENR_TIM17EN); + break; #endif default: return NULL; @@ -1033,12 +1622,17 @@ FAR struct stm32_tim_dev_s *stm32_tim_init(int timer) int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev) { - ASSERT(dev); + DEBUGASSERT(dev != NULL); /* Disable power */ switch (((struct stm32_tim_priv_s *)dev)->base) { +#ifdef CONFIG_STM32_TIM1 + case STM32_TIM1_BASE: + modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM1EN, 0); + break; +#endif #ifdef CONFIG_STM32_TIM2 case STM32_TIM2_BASE: modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM2EN, 0); @@ -1059,35 +1653,68 @@ int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev) modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM5EN, 0); break; #endif -#if STM32_NBTIM > 0 #ifdef CONFIG_STM32_TIM6 case STM32_TIM6_BASE: modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM6EN, 0); break; #endif -#endif -#if STM32_NBTIM > 1 #ifdef CONFIG_STM32_TIM7 case STM32_TIM7_BASE: modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM7EN, 0); break; #endif -#endif - -#if STM32_NATIM > 0 -#ifdef CONFIG_STM32_TIM1 - case STM32_TIM1_BASE: - modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM1EN, 0); - break; -#endif #ifdef CONFIG_STM32_TIM8 case STM32_TIM8_BASE: modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM8EN, 0); break; #endif +#ifdef CONFIG_STM32_TIM9 + case STM32_TIM9_BASE: + modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM9EN, 0); + break; +#endif +#ifdef CONFIG_STM32_TIM10 + case STM32_TIM10_BASE: + modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM10EN, 0); + break; +#endif +#ifdef CONFIG_STM32_TIM11 + case STM32_TIM11_BASE: + modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM11EN, 0); + break; +#endif +#ifdef CONFIG_STM32_TIM12 + case STM32_TIM12_BASE: + modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM12EN, 0); + break; +#endif +#ifdef CONFIG_STM32_TIM13 + case STM32_TIM13_BASE: + modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM13EN, 0); + break; +#endif +#ifdef CONFIG_STM32_TIM14 + case STM32_TIM14_BASE: + modifyreg32(STM32_RCC_APB1ENR, RCC_APB1ENR_TIM14EN, 0); + break; +#endif +#ifdef CONFIG_STM32_TIM15 + case STM32_TIM15_BASE: + modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM15EN, 0); + break; +#endif +#ifdef CONFIG_STM32_TIM16 + case STM32_TIM16_BASE: + modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM16EN, 0); + break; +#endif +#ifdef CONFIG_STM32_TIM17 + case STM32_TIM17_BASE: + modifyreg32(STM32_RCC_APB2ENR, RCC_APB2ENR_TIM17EN, 0); + break; #endif default: - return ERROR; + return -EINVAL; } /* Mark it as free */ @@ -1097,4 +1724,4 @@ int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev) return OK; } -#endif /* defined(CONFIG_STM32_TIM1 || ... || TIM8) */ +#endif /* defined(CONFIG_STM32_TIM1 || ... || TIM17) */ diff --git a/arch/arm/src/stm32/stm32_uart.h b/arch/arm/src/stm32/stm32_uart.h index 56ae3035439..76fc41e0ba0 100644 --- a/arch/arm/src/stm32/stm32_uart.h +++ b/arch/arm/src/stm32/stm32_uart.h @@ -90,18 +90,97 @@ # undef CONFIG_STM32_USART1 #endif -/* Is there a USART enabled? */ +/* Sanity checks */ -#if defined(CONFIG_STM32_USART1) || defined(CONFIG_STM32_USART2) || \ - defined(CONFIG_STM32_USART3) || defined(CONFIG_STM32_UART4) || \ - defined(CONFIG_STM32_UART5) || defined(CONFIG_STM32_USART6) || \ - defined(CONFIG_STM32_UART7) || defined(CONFIG_STM32_UART8) -# define HAVE_UART 1 +#if !defined(CONFIG_STM32_USART1) +# undef CONFIG_STM32_USART1_SERIALDRIVER +# undef CONFIG_STM32_USART1_1WIREDRIVER +#endif +#if !defined(CONFIG_STM32_USART2) +# undef CONFIG_STM32_USART2_SERIALDRIVER +# undef CONFIG_STM32_USART2_1WIREDRIVER +#endif +#if !defined(CONFIG_STM32_USART3) +# undef CONFIG_STM32_USART3_SERIALDRIVER +# undef CONFIG_STM32_USART3_1WIREDRIVER +#endif +#if !defined(CONFIG_STM32_UART4) +# undef CONFIG_STM32_UART4_SERIALDRIVER +# undef CONFIG_STM32_UART4_1WIREDRIVER +#endif +#if !defined(CONFIG_STM32_UART5) +# undef CONFIG_STM32_UART5_SERIALDRIVER +# undef CONFIG_STM32_UART5_1WIREDRIVER +#endif +#if !defined(CONFIG_STM32_USART6) +# undef CONFIG_STM32_USART6_SERIALDRIVER +# undef CONFIG_STM32_USART6_1WIREDRIVER +#endif +#if !defined(CONFIG_STM32_UART7) +# undef CONFIG_STM32_UART7_SERIALDRIVER +# undef CONFIG_STM32_UART7_1WIREDRIVER +#endif +#if !defined(CONFIG_STM32_UART8) +# undef CONFIG_STM32_UART8_SERIALDRIVER +# undef CONFIG_STM32_UART8_1WIREDRIVER +#endif + +/* Check 1-Wire and U(S)ART conflicts */ + +#if defined(CONFIG_STM32_USART1_1WIREDRIVER) && defined(CONFIG_STM32_USART1_SERIALDRIVER) +# error Both CONFIG_STM32_USART1_1WIREDRIVER and CONFIG_STM32_USART1_SERIALDRIVER defined +# undef CONFIG_STM32_USART1_1WIREDRIVER +#endif +#if defined(CONFIG_STM32_USART2_1WIREDRIVER) && defined(CONFIG_STM32_USART2_SERIALDRIVER) +# error Both CONFIG_STM32_USART2_1WIREDRIVER and CONFIG_STM32_USART2_SERIALDRIVER defined +# undef CONFIG_STM32_USART2_1WIREDRIVER +#endif +#if defined(CONFIG_STM32_USART3_1WIREDRIVER) && defined(CONFIG_STM32_USART3_SERIALDRIVER) +# error Both CONFIG_STM32_USART3_1WIREDRIVER and CONFIG_STM32_USART3_SERIALDRIVER defined +# undef CONFIG_STM32_USART3_1WIREDRIVER +#endif +#if defined(CONFIG_STM32_UART4_1WIREDRIVER) && defined(CONFIG_STM32_UART4_SERIALDRIVER) +# error Both CONFIG_STM32_UART4_1WIREDRIVER and CONFIG_STM32_UART4_SERIALDRIVER defined +# undef CONFIG_STM32_UART4_1WIREDRIVER +#endif +#if defined(CONFIG_STM32_UART5_1WIREDRIVER) && defined(CONFIG_STM32_UART5_SERIALDRIVER) +# error Both CONFIG_STM32_UART5_1WIREDRIVER and CONFIG_STM32_UART5_SERIALDRIVER defined +# undef CONFIG_STM32_UART5_1WIREDRIVER +#endif +#if defined(CONFIG_STM32_USART6_1WIREDRIVER) && defined(CONFIG_STM32_USART6_SERIALDRIVER) +# error Both CONFIG_STM32_USART6_1WIREDRIVER and CONFIG_STM32_USART6_SERIALDRIVER defined +# undef CONFIG_STM32_USART6_1WIREDRIVER +#endif +#if defined(CONFIG_STM32_UART7_1WIREDRIVER) && defined(CONFIG_STM32_UART7_SERIALDRIVER) +# error Both CONFIG_STM32_UART7_1WIREDRIVER and CONFIG_STM32_UART7_SERIALDRIVER defined +# undef CONFIG_STM32_UART7_1WIREDRIVER +#endif +#if defined(CONFIG_STM32_UART8_1WIREDRIVER) && defined(CONFIG_STM32_UART8_SERIALDRIVER) +# error Both CONFIG_STM32_UART8_1WIREDRIVER and CONFIG_STM32_UART8_SERIALDRIVER defined +# undef CONFIG_STM32_UART8_1WIREDRIVER +#endif + +/* Is the serial driver enabled? */ + +#if defined(CONFIG_STM32_USART1_SERIALDRIVER) || defined(CONFIG_STM32_USART2_SERIALDRIVER) || \ + defined(CONFIG_STM32_USART3_SERIALDRIVER) || defined(CONFIG_STM32_UART4_SERIALDRIVER) || \ + defined(CONFIG_STM32_UART5_SERIALDRIVER) || defined(CONFIG_STM32_USART6_SERIALDRIVER) || \ + defined(CONFIG_STM32_UART7_SERIALDRIVER) || defined(CONFIG_STM32_UART8_SERIALDRIVER) +# define HAVE_SERIALDRIVER 1 +#endif + +/* Is the 1-Wire driver? */ + +#if defined(CONFIG_STM32_USART1_1WIREDRIVER) || defined(CONFIG_STM32_USART2_1WIREDRIVER) || \ + defined(CONFIG_STM32_USART3_1WIREDRIVER) || defined(CONFIG_STM32_UART4_1WIREDRIVER) || \ + defined(CONFIG_STM32_UART5_1WIREDRIVER) || defined(CONFIG_STM32_USART6_1WIREDRIVER) || \ + defined(CONFIG_STM32_UART7_1WIREDRIVER) || defined(CONFIG_STM32_UART8_1WIREDRIVER) +# define HAVE_1WIREDRIVER 1 #endif /* Is there a serial console? */ -#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1) +#if defined(CONFIG_USART1_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART1_SERIALDRIVER) # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE # undef CONFIG_UART4_SERIAL_CONSOLE @@ -111,7 +190,7 @@ # undef CONFIG_UART8_SERIAL_CONSOLE # define CONSOLE_UART 1 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2) +#elif defined(CONFIG_USART2_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART2_SERIALDRIVER) # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE # undef CONFIG_UART4_SERIAL_CONSOLE @@ -121,7 +200,7 @@ # undef CONFIG_UART8_SERIAL_CONSOLE # define CONSOLE_UART 2 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3) +#elif defined(CONFIG_USART3_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART3_SERIALDRIVER) # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_UART4_SERIAL_CONSOLE @@ -131,7 +210,7 @@ # undef CONFIG_UART8_SERIAL_CONSOLE # define CONSOLE_UART 3 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4) +#elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART4_SERIALDRIVER) # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE @@ -141,7 +220,7 @@ # undef CONFIG_UART8_SERIAL_CONSOLE # define CONSOLE_UART 4 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5) +#elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART5_SERIALDRIVER) # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE @@ -151,7 +230,7 @@ # undef CONFIG_UART8_SERIAL_CONSOLE # define CONSOLE_UART 5 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART6) +#elif defined(CONFIG_USART6_SERIAL_CONSOLE) && defined(CONFIG_STM32_USART6_SERIALDRIVER) # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE @@ -161,7 +240,7 @@ # undef CONFIG_UART8_SERIAL_CONSOLE # define CONSOLE_UART 6 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART7) +#elif defined(CONFIG_UART7_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART7_SERIALDRIVER) # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE @@ -172,7 +251,7 @@ # undef CONFIG_UART8_SERIAL_CONSOLE # define CONSOLE_UART 7 # define HAVE_CONSOLE 1 -#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART8) +#elif defined(CONFIG_UART8_SERIAL_CONSOLE) && defined(CONFIG_STM32_UART8_SERIALDRIVER) # undef CONFIG_USART1_SERIAL_CONSOLE # undef CONFIG_USART2_SERIAL_CONSOLE # undef CONFIG_USART3_SERIAL_CONSOLE @@ -197,7 +276,7 @@ /* DMA support is only provided if CONFIG_ARCH_DMA is in the NuttX configuration */ -#if !defined(HAVE_UART) || !defined(CONFIG_ARCH_DMA) +#if !defined(HAVE_SERIALDRIVER) || !defined(CONFIG_ARCH_DMA) # undef CONFIG_USART1_RXDMA # undef CONFIG_USART2_RXDMA # undef CONFIG_USART3_RXDMA @@ -210,35 +289,35 @@ /* Disable the DMA configuration on all unused USARTs */ -#ifndef CONFIG_STM32_USART1 +#ifndef CONFIG_STM32_USART1_SERIALDRIVER # undef CONFIG_USART1_RXDMA #endif -#ifndef CONFIG_STM32_USART2 +#ifndef CONFIG_STM32_USART2_SERIALDRIVER # undef CONFIG_USART2_RXDMA #endif -#ifndef CONFIG_STM32_USART3 +#ifndef CONFIG_STM32_USART3_SERIALDRIVER # undef CONFIG_USART3_RXDMA #endif -#ifndef CONFIG_STM32_UART4 +#ifndef CONFIG_STM32_UART4_SERIALDRIVER # undef CONFIG_UART4_RXDMA #endif -#ifndef CONFIG_STM32_UART5 +#ifndef CONFIG_STM32_UART5_SERIALDRIVER # undef CONFIG_UART5_RXDMA #endif -#ifndef CONFIG_STM32_USART6 +#ifndef CONFIG_STM32_USART6_SERIALDRIVER # undef CONFIG_USART6_RXDMA #endif -#ifndef CONFIG_STM32_UART7 +#ifndef CONFIG_STM32_UART7_SERIALDRIVER # undef CONFIG_UART7_RXDMA #endif -#ifndef CONFIG_STM32_UART8 +#ifndef CONFIG_STM32_UART8_SERIALDRIVER # undef CONFIG_UART8_RXDMA #endif @@ -276,21 +355,21 @@ /* Is DMA used on all (enabled) USARTs */ #define SERIAL_HAVE_ONLY_DMA 1 -#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_USART1_RXDMA) +#if defined(CONFIG_STM32_USART1_SERIALDRIVER) && !defined(CONFIG_USART1_RXDMA) # undef SERIAL_HAVE_ONLY_DMA -#elif defined(CONFIG_STM32_USART2) && !defined(CONFIG_USART2_RXDMA) +#elif defined(CONFIG_STM32_USART2_SERIALDRIVER) && !defined(CONFIG_USART2_RXDMA) # undef SERIAL_HAVE_ONLY_DMA -#elif defined(CONFIG_STM32_USART3) && !defined(CONFIG_USART3_RXDMA) +#elif defined(CONFIG_STM32_USART3_SERIALDRIVER) && !defined(CONFIG_USART3_RXDMA) # undef SERIAL_HAVE_ONLY_DMA -#elif defined(CONFIG_STM32_UART4) && !defined(CONFIG_UART4_RXDMA) +#elif defined(CONFIG_STM32_UART4_SERIALDRIVER) && !defined(CONFIG_UART4_RXDMA) # undef SERIAL_HAVE_ONLY_DMA -#elif defined(CONFIG_STM32_UART5) && !defined(CONFIG_UART5_RXDMA) +#elif defined(CONFIG_STM32_UART5_SERIALDRIVER) && !defined(CONFIG_UART5_RXDMA) # undef SERIAL_HAVE_ONLY_DMA -#elif defined(CONFIG_STM32_USART6) && !defined(CONFIG_USART6_RXDMA) +#elif defined(CONFIG_STM32_USART6_SERIALDRIVER) && !defined(CONFIG_USART6_RXDMA) # undef SERIAL_HAVE_ONLY_DMA -#elif defined(CONFIG_STM32_UART7) && !defined(CONFIG_UART7_RXDMA) +#elif defined(CONFIG_STM32_UART7_SERIALDRIVER) && !defined(CONFIG_UART7_RXDMA) # undef SERIAL_HAVE_ONLY_DMA -#elif defined(CONFIG_STM32_UART8) && !defined(CONFIG_UART8_RXDMA) +#elif defined(CONFIG_STM32_UART8_SERIALDRIVER) && !defined(CONFIG_UART8_RXDMA) # undef SERIAL_HAVE_ONLY_DMA #endif diff --git a/arch/arm/src/stm32/stm32f10xxx_dma.c b/arch/arm/src/stm32/stm32f10xxx_dma.c index 8c5bf161e6a..a452e65eb8a 100644 --- a/arch/arm/src/stm32/stm32f10xxx_dma.c +++ b/arch/arm/src/stm32/stm32f10xxx_dma.c @@ -57,7 +57,7 @@ #if defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32L15XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32L15XX) /**************************************************************************** * Pre-processor Definitions @@ -157,7 +157,7 @@ static struct stm32_dma_s g_dma[DMA_NCHANNELS] = { .chan = 3, #if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32L15XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32L15XX) .irq = STM32_IRQ_DMA2CH4, #else .irq = STM32_IRQ_DMA2CH45, @@ -167,7 +167,7 @@ static struct stm32_dma_s g_dma[DMA_NCHANNELS] = { .chan = 4, #if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32L15XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32L15XX) .irq = STM32_IRQ_DMA2CH5, #else .irq = STM32_IRQ_DMA2CH45, @@ -290,7 +290,7 @@ static int stm32_dmainterrupt(int irq, void *context) else #if STM32_NDMA > 1 #if defined(CONFIG_STM32_CONNECTIVITYLINE) || defined(CONFIG_STM32_STM32F30XX) || \ - defined(CONFIG_STM32_STM32L15XX) + defined(CONFIG_STM32_STM32F37XX) || defined(CONFIG_STM32_STM32L15XX) if (irq >= STM32_IRQ_DMA2CH1 && irq <= STM32_IRQ_DMA2CH5) #else if (irq >= STM32_IRQ_DMA2CH1 && irq <= STM32_IRQ_DMA2CH45) diff --git a/arch/arm/src/stm32/stm32f40xxx_rtcc.c b/arch/arm/src/stm32/stm32f40xxx_rtcc.c index ece81269c66..d89134fd462 100644 --- a/arch/arm/src/stm32/stm32f40xxx_rtcc.c +++ b/arch/arm/src/stm32/stm32f40xxx_rtcc.c @@ -38,6 +38,8 @@ * Included Files ************************************************************************************/ +#include + #include #include #include @@ -108,18 +110,6 @@ # define RCC_XXX_RTCSEL_LSI RCC_BDCR_RTCSEL_LSI # define RCC_XXX_RTCSEL_HSE RCC_BDCR_RTCSEL_HSE -/* BCD conversions */ - -#define rtc_reg_tr_bin2bcd(tp) \ - ((rtc_bin2bcd((tp)->tm_sec) << RTC_TR_SU_SHIFT) | \ - (rtc_bin2bcd((tp)->tm_min) << RTC_TR_MNU_SHIFT) | \ - (rtc_bin2bcd((tp)->tm_hour) << RTC_TR_HU_SHIFT)) - -#define rtc_reg_alrmr_bin2bcd(tm) \ - ((rtc_bin2bcd((tm)->tm_sec) << RTC_ALRMR_SU_SHIFT) | \ - (rtc_bin2bcd((tm)->tm_min) << RTC_ALRMR_MNU_SHIFT) | \ - (rtc_bin2bcd((tm)->tm_hour) << RTC_ALRMR_HU_SHIFT)) - /* Time conversions */ #define MINUTES_IN_HOUR 60 @@ -193,10 +183,12 @@ volatile bool g_rtc_enabled = false; #ifdef CONFIG_RTC_ALARM static int rtchw_check_alrawf(void); -static int rtchw_check_alrbwf(void); static int rtchw_set_alrmar(rtc_alarmreg_t alarmreg); +#if CONFIG_RTC_NALARMS > 1 +static int rtchw_check_alrbwf(void); static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg); #endif +#endif /************************************************************************************ * Private Functions @@ -219,6 +211,8 @@ static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg); #ifdef CONFIG_DEBUG_RTC static void rtc_dumpregs(FAR const char *msg) { + int rtc_state; + rtclldbg("%s:\n", msg); rtclldbg(" TR: %08x\n", getreg32(STM32_RTC_TR)); rtclldbg(" DR: %08x\n", getreg32(STM32_RTC_DR)); @@ -226,9 +220,6 @@ static void rtc_dumpregs(FAR const char *msg) rtclldbg(" ISR: %08x\n", getreg32(STM32_RTC_ISR)); rtclldbg(" PRER: %08x\n", getreg32(STM32_RTC_PRER)); rtclldbg(" WUTR: %08x\n", getreg32(STM32_RTC_WUTR)); -#ifndef CONFIG_STM32_STM32F30XX - rtclldbg(" CALIBR: %08x\n", getreg32(STM32_RTC_CALIBR)); -#endif rtclldbg(" ALRMAR: %08x\n", getreg32(STM32_RTC_ALRMAR)); rtclldbg(" ALRMBR: %08x\n", getreg32(STM32_RTC_ALRMBR)); rtclldbg(" SHIFTR: %08x\n", getreg32(STM32_RTC_SHIFTR)); @@ -240,6 +231,13 @@ static void rtc_dumpregs(FAR const char *msg) rtclldbg("ALRMASSR: %08x\n", getreg32(STM32_RTC_ALRMASSR)); rtclldbg("ALRMBSSR: %08x\n", getreg32(STM32_RTC_ALRMBSSR)); rtclldbg("MAGICREG: %08x\n", getreg32(RTC_MAGIC_REG)); + + rtc_state = + ((getreg32(STM32_EXTI_RTSR) & EXTI_RTC_ALARM) ? 0x1000 : 0) | + ((getreg32(STM32_EXTI_FTSR) & EXTI_RTC_ALARM) ? 0x0100 : 0) | + ((getreg32(STM32_EXTI_IMR) & EXTI_RTC_ALARM) ? 0x0010 : 0) | + ((getreg32(STM32_EXTI_EMR) & EXTI_RTC_ALARM) ? 0x0001 : 0); + rtclldbg("EXTI (RTSR FTSR ISR EVT): %01x\n",rtc_state); } #else # define rtc_dumpregs(msg) @@ -600,9 +598,9 @@ static void rtc_resume(void) regval &= ~(RTC_ISR_ALRAF | RTC_ISR_ALRBF); putreg32(regval, STM32_RTC_ISR); - /* Clear the EXTI Line 17 Pending bit (Connected internally to RTC Alarm) */ + /* Clear the RTC Alarm Pending bit */ - putreg32((1 << 17), STM32_EXTI_PR); + putreg32(EXTI_RTC_ALARM, STM32_EXTI_PR); #endif } @@ -659,6 +657,7 @@ static int stm32_rtc_alarm_handler(int irq, void *context) } } +#if CONFIG_RTC_NALARMS > 1 if ((isr & RTC_ISR_ALRBF) != 0) { cr = getreg32(STM32_RTC_CR); @@ -682,6 +681,7 @@ static int stm32_rtc_alarm_handler(int irq, void *context) putreg32(isr, STM32_RTC_CR); } } +#endif return ret; } @@ -727,7 +727,7 @@ static int rtchw_check_alrawf(void) } #endif -#ifdef CONFIG_RTC_ALARM +#if defined(CONFIG_RTC_ALARM) && CONFIG_RTC_NALARMS > 1 static int rtchw_check_alrbwf(void) { volatile uint32_t timeout; @@ -805,7 +805,7 @@ errout_with_wprunlock: } #endif -#ifdef CONFIG_RTC_ALARM +#if defined(CONFIG_RTC_ALARM) && CONFIG_RTC_NALARMS > 1 static int rtchw_set_alrmbr(rtc_alarmreg_t alarmreg) { int ret = -EBUSY; @@ -876,8 +876,6 @@ int up_rtc_initialize(void) * maximum performance. */ - rtc_dumpregs("On reset"); - /* Select the clock source */ /* Save the token before losing it when resetting */ @@ -902,16 +900,19 @@ int up_rtc_initialize(void) #ifdef CONFIG_RTC_HSECLOCK /* Use the HSE clock as the input to the RTC block */ + rtc_dumpregs("On reset HSE"); modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_HSE); #elif defined(CONFIG_RTC_LSICLOCK) /* Use the LSI clock as the input to the RTC block */ + rtc_dumpregs("On reset LSI"); modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_LSI); #elif defined(CONFIG_RTC_LSECLOCK) /* Use the LSE clock as the input to the RTC block */ + rtc_dumpregs("On reset LSE"); modifyreg32(STM32_RCC_XXX, RCC_XXX_RTCSEL_MASK, RCC_XXX_RTCSEL_LSE); #endif @@ -926,6 +927,8 @@ int up_rtc_initialize(void) uint32_t clksrc = getreg32(STM32_RCC_XXX); + rtc_dumpregs("On reset warm"); + #if defined(CONFIG_RTC_HSECLOCK) if ((clksrc & RCC_XXX_RTCSEL_MASK) != RCC_XXX_RTCSEL_HSE) #elif defined(CONFIG_RTC_LSICLOCK) @@ -1060,10 +1063,12 @@ int up_rtc_initialize(void) */ stm32_exti_alarm(true, false, true, stm32_rtc_alarm_handler); + rtc_dumpregs("After InitExtiAlarm"); +#else + rtc_dumpregs("After Initialization"); #endif g_rtc_enabled = true; - rtc_dumpregs("After Initialization"); return OK; } @@ -1249,7 +1254,9 @@ int stm32_rtc_setdatetime(FAR const struct tm *tp) * register. */ - tr = (rtc_reg_tr_bin2bcd(tp) & ~RTC_TR_RESERVED_BITS); + tr = (rtc_bin2bcd(tp->tm_sec) << RTC_TR_SU_SHIFT) | + (rtc_bin2bcd(tp->tm_min) << RTC_TR_MNU_SHIFT) | + (rtc_bin2bcd(tp->tm_hour) << RTC_TR_HU_SHIFT); /* Now convert the fields in struct tm format to the RTC date register fields: * Days: 1-31 match in both cases. @@ -1351,10 +1358,16 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) rtc_dumptime(&alminfo->as_time, "New alarm time"); - /* Break out the values to the HW alarm register format */ - - alarmreg = rtc_reg_alrmr_bin2bcd(&alminfo->as_time); + /* Break out the values to the HW alarm register format. The values in + * all STM32 fields match the fields of struct tm in this case. Notice + * that the alarm is limited to one month. + */ + alarmreg = (rtc_bin2bcd(alminfo->as_time.tm_sec) << RTC_ALRMR_SU_SHIFT) | + (rtc_bin2bcd(alminfo->as_time.tm_min) << RTC_ALRMR_MNU_SHIFT) | + (rtc_bin2bcd(alminfo->as_time.tm_hour) << RTC_ALRMR_HU_SHIFT) | + (rtc_bin2bcd(alminfo->as_time.tm_mday) << RTC_ALRMR_DU_SHIFT); + /* Set the alarm in hardware and enable interrupts */ switch (alminfo->as_id) @@ -1371,9 +1384,12 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) cbinfo->ac_cb = NULL; cbinfo->ac_arg = NULL; } + + rtc_dumpregs("Set AlarmA"); } break; +#if CONFIG_RTC_NALARMS > 1 case RTC_ALARMB: { cbinfo = &g_alarmcb[RTC_ALARMB]; @@ -1386,8 +1402,11 @@ int stm32_rtc_setalarm(FAR struct alm_setalarm_s *alminfo) cbinfo->ac_cb = NULL; cbinfo->ac_arg = NULL; } + + rtc_dumpregs("Set AlarmB"); } break; +#endif default: rtcvdbg("ERROR: Invalid ALARM%d\n", alminfo->as_id); @@ -1454,6 +1473,7 @@ int stm32_rtc_cancelalarm(enum alm_id_e alarmid) } break; +#if CONFIG_RTC_NALARMS > 1 case RTC_ALARMB: { /* Cancel the global callback function */ @@ -1484,9 +1504,10 @@ int stm32_rtc_cancelalarm(enum alm_id_e alarmid) ret = OK; } break; +#endif default: - rtcvdbg("ERROR: Invalid ALARM%d\n", alminfo->as_id); + rtcvdbg("ERROR: Invalid ALARM%d\n", alarmid); break; } diff --git a/arch/arm/src/stm32f7/Kconfig b/arch/arm/src/stm32f7/Kconfig index ce9edbfc223..e77c028ec05 100644 --- a/arch/arm/src/stm32f7/Kconfig +++ b/arch/arm/src/stm32f7/Kconfig @@ -12,59 +12,915 @@ choice default ARCH_CHIP_STM32F746 depends on ARCH_CHIP_STM32F7 -config ARCH_CHIP_STM32F745 - bool "STM32F745xx" - select STM32F7_STM32F74XX +config ARCH_CHIP_STM32F745VG + bool "STM32F745VG" + select STM32F7_STM32F745XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_V ---help--- - STM32 F7 Cortex M7, 512 or 1024Kb FLASH, 335 (240++16+54) Kb SRAM + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM -config ARCH_CHIP_STM32F746 - bool "STM32F746xx" - select STM32F7_STM32F74XX - select STM32F7_HAVE_LTDC +config ARCH_CHIP_STM32F745VE + bool "STM32F745VE" + select STM32F7_STM32F745XX + select STM32F7_FLASH_CONFIG_E + select STM32F7_IO_CONFIG_V ---help--- - STM32 F7 Cortex M7, 512 or 1024Kb FLASH, 335 (240++16+54) Kb SRAM + STM32 F7 Cortex M7, 512 320K FLASH, 320K (240+16+64) Kb SRAM -config ARCH_CHIP_STM32F756 - bool "STM32F756xx" - select STM32F7_STM32F75XX - select STM32F7_HAVE_LTDC +config ARCH_CHIP_STM32F745IG + bool "STM32F745IG" + select STM32F7_STM32F745XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_I ---help--- - STM32 F7 Cortex M7, 512 or 1024Kb FLASH, 335 (240++16+54) Kb SRAM + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F745IE + bool "STM32F745IE" + select STM32F7_STM32F745XX + select STM32F7_FLASH_CONFIG_E + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F745ZE + bool "STM32F745ZE" + select STM32F7_STM32F745XX + select STM32F7_FLASH_CONFIG_E + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F745ZG + bool "STM32F745ZG" + select STM32F7_STM32F745XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746BG + bool "STM32F746BG" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746VG + bool "STM32F746VG" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_V + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746VE + bool "STM32F746VE" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_E + select STM32F7_IO_CONFIG_V + ---help--- + STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746BE + bool "STM32F746BE" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_E + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746ZG + bool "STM32F746ZG" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746IE + bool "STM32F746IE" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_E + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746NG + bool "STM32F746NG" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746NE + bool "STM32F746NE" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_E + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746ZE + bool "STM32F746ZE" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_E + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 512 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F746IG + bool "STM32F746IG" + select STM32F7_STM32F746XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F756NG + bool "STM32F756NG" + select STM32F7_STM32F756XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F756BG + bool "STM32F756BG" + select STM32F7_STM32F756XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F756IG + bool "STM32F756IG" + select STM32F7_STM32F756XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F756VG + bool "STM32F756VG" + select STM32F7_STM32F756XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_V + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F756ZG + bool "STM32F756ZG" + select STM32F7_STM32F756XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 320K (240+16+64) Kb SRAM + +config ARCH_CHIP_STM32F765NI + bool "STM32F765NI" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765VI + bool "STM32F765VI" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_V + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765VG + bool "STM32F765VG" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_V + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765BI + bool "STM32F765BI" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765NG + bool "STM32F765NG" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765ZG + bool "STM32F765ZG" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765ZI + bool "STM32F765ZI" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765IG + bool "STM32F765IG" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765BG + bool "STM32F765BG" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F765II + bool "STM32F765II" + select STM32F7_STM32F765XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767NG + bool "STM32F767NG" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767IG + bool "STM32F767IG" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767VG + bool "STM32F767VG" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_V + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767ZG + bool "STM32F767ZG" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767NI + bool "STM32F767NI" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767VI + bool "STM32F767VI" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_V + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767BG + bool "STM32F767BG" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767ZI + bool "STM32F767ZI" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F767II + bool "STM32F767II" + select STM32F7_STM32F767XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F769BI + bool "STM32F769BI" + select STM32F7_STM32F769XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F769II + bool "STM32F769II" + select STM32F7_STM32F769XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F769BG + bool "STM32F769BG" + select STM32F7_STM32F769XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F769NI + bool "STM32F769NI" + select STM32F7_STM32F769XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F769AI + bool "STM32F769AI" + select STM32F7_STM32F769AX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_A + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F769NG + bool "STM32F769NG" + select STM32F7_STM32F769XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F769IG + bool "STM32F769IG" + select STM32F7_STM32F769XX + select STM32F7_FLASH_CONFIG_G + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 1024 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F777ZI + bool "STM32F777ZI" + select STM32F7_STM32F777XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_Z + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F777VI + bool "STM32F777VI" + select STM32F7_STM32F777XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_V + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F777NI + bool "STM32F777NI" + select STM32F7_STM32F777XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F777BI + bool "STM32F777BI" + select STM32F7_STM32F777XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F777II + bool "STM32F777II" + select STM32F7_STM32F777XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F778AI + bool "STM32F778AI" + select STM32F7_STM32F778AX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_A + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F779II + bool "STM32F779II" + select STM32F7_STM32F779XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_I + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F779NI + bool "STM32F779NI" + select STM32F7_STM32F779XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_N + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F779BI + bool "STM32F779BI" + select STM32F7_STM32F779XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_B + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM + +config ARCH_CHIP_STM32F779AI + bool "STM32F779AI" + select STM32F7_STM32F779XX + select STM32F7_FLASH_CONFIG_I + select STM32F7_IO_CONFIG_A + ---help--- + STM32 F7 Cortex M7, 2048 FLASH, 512K (368+16+128) Kb SRAM endchoice # STM32 F7 Chip Selection config STM32F7_STM32F74XX bool default n - select ARCH_HAVE_FPU - select ARCH_HAVE_DPFPU # REVISIT - select ARMV7M_HAVE_ICACHE - select ARMV7M_HAVE_DCACHE - select ARMV7M_HAVE_ITCM - select ARMV7M_HAVE_DTCM + +config STM32F7_STM32F74XX + bool + default n config STM32F7_STM32F75XX bool default n + +config STM32F7_STM32F76XX + bool + default n + +config STM32F7_STM32F76XX + bool + default n + +config STM32F7_STM32F76XX + bool + default n + +config STM32F7_STM32F76XX + bool + default n + +config STM32F7_STM32F76XX + bool + default n + +config STM32F7_STM32F76XX + bool + default n + +config STM32F7_STM32F77XX + bool + default n + +config STM32F7_STM32F77XX + bool + default n + +config STM32F7_STM32F77XX + bool + default n + +config STM32F7_STM32F77XX + bool + default n + +config STM32F7_STM32F77XX + bool + default n + +config STM32F7_IO_CONFIG_V + bool + default n + +config STM32F7_IO_CONFIG_I + bool + default n + +config STM32F7_IO_CONFIG_Z + bool + default n + +config STM32F7_IO_CONFIG_N + bool + default n + +config STM32F7_IO_CONFIG_B + bool + default n + +config STM32F7_IO_CONFIG_A + bool + default n + +config STM32F7_STM32F745XX + bool + default n + select STM32F7_STM32F74XX select ARCH_HAVE_FPU - select ARCH_HAVE_DPFPU # REVISIT select ARMV7M_HAVE_ICACHE select ARMV7M_HAVE_DCACHE select ARMV7M_HAVE_ITCM select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DMA2D + +config STM32F7_STM32F746XX + bool + default n + select STM32F7_STM32F74XX + select ARCH_HAVE_FPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + +config STM32F7_STM32F756XX + bool + default n + select STM32F7_STM32F75XX + select ARCH_HAVE_FPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_CRYP + select STM32F7_HAVE_HASH + +config STM32F7_STM32F765XX + bool + default n + select STM32F7_STM32F76XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG # data sheet says yes, Product matix says no + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F767XX + bool + default n + select STM32F7_STM32F76XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z) + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F768XX # Revisit Wehn parts released + bool + default n + select STM32F7_STM32F76XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z) + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F768AX # Revisit When parts released + bool + default n + select STM32F7_STM32F76XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 + select STM32F7_HAVE_SPI6 + select STM32F7_HAVE_SDMMC2 + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F769XX + bool + default n + select STM32F7_STM32F76XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z) + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F769AX # Revisit When parts released + bool + default n + select STM32F7_STM32F76XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 + select STM32F7_HAVE_SPI6 + select STM32F7_HAVE_SDMMC2 + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F777XX + bool + default n + select STM32F7_STM32F77XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z) + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_CRYP + select STM32F7_HAVE_HASH + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F778XX # Revisit when parts released + bool + default n + select STM32F7_STM32F77XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_CRYP + select STM32F7_HAVE_HASH + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F778AX + bool + default n + select STM32F7_STM32F77XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 + select STM32F7_HAVE_SPI6 + select STM32F7_HAVE_SDMMC2 + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_CRYP + select STM32F7_HAVE_HASH + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F779XX + bool + default n + select STM32F7_STM32F77XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_ETHRNET + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z) + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_CRYP + select STM32F7_HAVE_HASH + select STM32F7_HAVE_DFSDM1 + +config STM32F7_STM32F779AX + bool + default n + select STM32F7_STM32F77XX + select ARCH_HAVE_FPU + select ARCH_HAVE_DPFPU + select ARMV7M_HAVE_ICACHE + select ARMV7M_HAVE_DCACHE + select ARMV7M_HAVE_ITCM + select ARMV7M_HAVE_DTCM + select STM32F7_HAVE_FSMC + select STM32F7_HAVE_RNG + select STM32F7_HAVE_SPI5 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SPI6 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_SDMMC2 if !STM32F7_IO_CONFIG_V + select STM32F7_HAVE_CAN3 + select STM32F7_HAVE_DCMI + select STM32F7_HAVE_DSIHOST if !(STM32F7_IO_CONFIG_V || STM32F7_IO_CONFIG_Z) + select STM32F7_HAVE_LTDC + select STM32F7_HAVE_DMA2D + select STM32F7_HAVE_JPEG + select STM32F7_HAVE_CRYP + select STM32F7_HAVE_HASH + select STM32F7_HAVE_DFSDM1 + +config STM32F7_FLASH_CONFIG_E + bool + default n + +config STM32F7_FLASH_CONFIG_I + bool + default n + +config STM32F7_FLASH_CONFIG_I + bool + default n choice - prompt "Embedded FLASH size" - default STM32F7_FLASH_1024KB + prompt "Overrdide Flash Size Designator" + depends on ARCH_CHIP_STM32F7 + default STM32F7_FLASH_OVERRIDE_DEFAULT + ---help--- + STM32F7 series parts numbering (sans the package type) ends with a letter + that designates the FLASH size. -config STM32F7_FLASH_512KB - bool "512 KB" + Designator Size in KiB + E 512 + G 1024 + I 2048 -config STM32F7_FLASH_1024KB - bool "1024 KB" + This configuration option defaults to using the configuration based on that designator + or the default smaller size if there is no last character designator is present in the + STM32 Chip Selection. -endchoice # Embedded FLASH size + Examples: + If the STM32F745VE is chosen, the Flash configuration would be 'E', if a variant of + the part with a 2048 KiB Flash is released in the future one could simply select + the 'I' designator here. + + If an STM32F7xxx Series parts is chosen the default Flash configuration will be set + herein and can be changed. + +config STM32F7_FLASH_OVERRIDE_DEFAULT + bool "Default" + +config STM32F7_FLASH_OVERRIDE_E + bool "E 512KiB" + +config STM32F7_FLASH_OVERRIDE_G + bool "G 1024KiB" + +config STM32F7_FLASH_OVERRIDE_I + bool "I 2048KiB" + +endchoice # "Overrdide Flash Size Designator" menu "STM32 Peripheral Support" @@ -75,6 +931,67 @@ config STM32F7_HAVE_LTDC bool default n +config STM32F7_HAVE_FSMC + bool + default n + + +config STM32F7_HAVE_ETHRNET + bool + default n + +config STM32F7_HAVE_RNG + bool + default n + +config STM32F7_HAVE_SPI5 + bool + default n + +config STM32F7_HAVE_SPI6 + bool + default n + +config STM32F7_HAVE_SDMMC2 + bool + default n + +config STM32F7_HAVE_CAN3 + bool + default n + +config STM32F7_HAVE_DCMI + bool + default n + +config STM32F7_HAVE_DSIHOST + bool + default n + +config STM32F7_HAVE_LTDC + bool + default n + +config STM32F7_HAVE_DMA2D + bool + default n + +config STM32F7_HAVE_JPEG + bool + default n + +config STM32F7_HAVE_CRYP + bool + default n + +config STM32F7_HAVE_HASH + bool + default n + +config STM32F7_HAVE_DFSDM1 + bool + default n + # These "hidden" settings are the OR of individual peripheral selections # indicating that the general capabilitiy is required. @@ -143,6 +1060,13 @@ config STM32F7_CAN2 select CAN select STM32F7_CAN +config STM32F7_CAN3 + bool "CAN3" + default n + select CAN + select STM32F7_CAN + depends on STM32F7_HAVE_CAN3 + config STM32F7_CEC bool "CEC" default n @@ -154,8 +1078,15 @@ config STM32F7_CRC config STM32F7_CRYP bool "CRYP" + depends on STM32F7_HAVE_CRYP default n +config STM32F7_DFSDM1 + bool "DFSDM1" + default n + depends on STM32F7_HAVE_DFSDM1 + select ARCH_HAVE_DFSDM1 + config STM32F7_DMA1 bool "DMA1" default n @@ -181,17 +1112,54 @@ config STM32F7_DAC2 config STM32F7_DCMI bool "DCMI" default n + depends on STM32F7_HAVE_DCMI + ---help--- + The devices embed a camera interface that can connect with camera + modules and CMOS sensors through an 8-bit to 14-bit parallel interface, + to receive video data. + +config STM32F7_DSIHOST + bool "DSIHOST" + default n + depends on STM32F7_HAVE_DSIHOST + ---help--- + The DSI Host is a dedicated peripheral for interfacing with MIPI® DSI + compliant displays. + +config STM32F7_DMA2D + bool "DMA2D" + default n + depends on STM32F7_HAVE_DMA2D + ---help--- + The STM32 DMA2D is an Chrom-Art Accelerator for image manipulation + available on the STM32 F7 devices. + +config STM32F7_JPEG + bool "JPEG" + default n + depends on STM32F7_HAVE_JPEG + ---help--- + The JPEG codec provides an fast and simple hardware compressor and + decompressor of JPEG images with full management of JPEG headers. config STM32F7_ETHMAC bool "Ethernet MAC" default n + depends on STM32F7_HAVE_ETHRNET select NETDEVICES select ARCH_HAVE_PHY config STM32F7_FSMC bool "FSMC" + depends on STM32F7_HAVE_FSMC default n +config STM32F7_HASH + bool "HASH" + default n + depends on STM32F7_HAVE_HASH + select ARCH_HAVE_HASH + config STM32F7_I2C1 bool "I2C1" default n @@ -225,13 +1193,6 @@ config STM32F7_LTDC video interface (HSYNC, VSYNC, etc.) for controlling TFT LCD displays. -config STM32F7_DMA2D - bool "DMA2D" - default n - ---help--- - The STM32 DMA2D is an Chrom-Art Accelerator for image manipulation - available on the STM32 F7 devices. - config STM32F7_OTGFS bool "OTG FS" default n @@ -246,10 +1207,10 @@ config STM32F7_QUADSPI bool "QuadSPI" default n -config STM32F7_SAI1 config STM32F7_RNG bool "RNG" default n + depends on STM32F7_HAVE_RNG select ARCH_HAVE_RNG config STM32F7_SAI1 @@ -267,6 +1228,12 @@ config STM32F7_SDMMC1 default n select ARCH_HAVE_SDIO +config STM32F7_SDMMC2 + bool "SDMMC2" + default n + depends on STM32F7_HAVE_SDMMC2 + select ARCH_HAVE_SDIO + config STM32F7_SPDIFRX bool "SPDIFRX" default n @@ -298,12 +1265,14 @@ config STM32F7_SPI4 config STM32F7_SPI5 bool "SPI5" default n + depends on STM32F7_HAVE_SPI5 select SPI select STM32F7_SPI config STM32F7_SPI6 bool "SPI6" default n + depends on STM32F7_HAVE_SPI6 select SPI select STM32F7_SPI @@ -370,14 +1339,14 @@ config STM32F7_TIM15 config STM32F7_USART1 bool "USART1" default n - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS select STM32F7_USART config STM32F7_USART2 bool "USART2" default n - select ARCH_HAVE_USART2 + select USART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS select STM32F7_USART @@ -385,42 +1354,42 @@ config STM32F7_USART3 bool "USART3" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_USART3 + select USART3_SERIALDRIVER select STM32F7_USART config STM32F7_UART4 bool "UART4" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER select STM32F7_USART config STM32F7_UART5 bool "UART5" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART5 + select UART5_SERIALDRIVER select STM32F7_USART config STM32F7_USART6 bool "USART6" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_USART6 + select USART6_SERIALDRIVER select STM32F7_USART config STM32F7_UART7 bool "UART7" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART7 + select UART7_SERIALDRIVER select STM32F7_USART config STM32F7_UART8 bool "UART8" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART8 + select UART8_SERIALDRIVER select STM32F7_USART config STM32F7_IWDG @@ -685,7 +1654,7 @@ config STM32F7_SERIALBRK_BSDCOMPAT endmenu # U[S]ART Configuration config STM32F7_CUSTOM_CLOCKCONFIG - bool "Custom clock configuration" + bool "Custom clock configuration" default n ---help--- Enables special, board-specific STM32 clock configuration. diff --git a/arch/arm/src/stm32f7/chip/stm32_dma.h b/arch/arm/src/stm32f7/chip/stm32_dma.h index 63db15ec9f3..64fa967bca6 100644 --- a/arch/arm/src/stm32f7/chip/stm32_dma.h +++ b/arch/arm/src/stm32f7/chip/stm32_dma.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_dma.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,6 +46,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "chip/stm32f74xx75xx_dma.h" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f76xx77xx_dma.h" #else # error "Unsupported STM32 F7 part" #endif diff --git a/arch/arm/src/stm32f7/chip/stm32_ethernet.h b/arch/arm/src/stm32f7/chip/stm32_ethernet.h index e5fc6982d28..962cb6d9220 100644 --- a/arch/arm/src/stm32f7/chip/stm32_ethernet.h +++ b/arch/arm/src/stm32f7/chip/stm32_ethernet.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_ethernet.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -46,7 +47,8 @@ * families */ -#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \ + defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) /**************************************************************************************************** * Pre-processor Definitions @@ -805,6 +807,6 @@ struct eth_rxdesc_s ****************************************************************************************************/ #endif /* __ASSEMBLY__ */ -#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */ +#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX || CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_ETHERNET_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32_exti.h b/arch/arm/src/stm32f7/chip/stm32_exti.h index 1bf43de7931..288f51b228c 100644 --- a/arch/arm/src/stm32f7/chip/stm32_exti.h +++ b/arch/arm/src/stm32f7/chip/stm32_exti.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_exti.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -47,7 +48,8 @@ * families */ -#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \ + defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) /************************************************************************************ * Pre-processor Definitions @@ -127,5 +129,5 @@ #define EXTI_IMR_SHIFT (0) /* Bits 0-X: Pending bit for all lines */ #define EXTI_IMR_MASK STM32_EXTI_MASK -#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */ +#endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX || CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_EXTI_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32_flash.h b/arch/arm/src/stm32f7/chip/stm32_flash.h index 965191bdcfb..d20bdfe4d33 100644 --- a/arch/arm/src/stm32f7/chip/stm32_flash.h +++ b/arch/arm/src/stm32f7/chip/stm32_flash.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_flash.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,6 +46,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "chip/stm32f74xx75xx_flash.h" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f76xx77xx_flash.h" #else # error "Unsupported STM32 F7 part" #endif diff --git a/arch/arm/src/stm32f7/chip/stm32_gpio.h b/arch/arm/src/stm32f7/chip/stm32_gpio.h index 5b89574b0f2..06431bb787d 100644 --- a/arch/arm/src/stm32f7/chip/stm32_gpio.h +++ b/arch/arm/src/stm32f7/chip/stm32_gpio.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_gpio.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,6 +46,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "chip/stm32f74xx75xx_gpio.h" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f76xx77xx_gpio.h" #else # error "Unsupported STM32 F7 part" #endif diff --git a/arch/arm/src/stm32f7/chip/stm32_memorymap.h b/arch/arm/src/stm32f7/chip/stm32_memorymap.h index f3ef8a1d53b..eba94016fd1 100644 --- a/arch/arm/src/stm32f7/chip/stm32_memorymap.h +++ b/arch/arm/src/stm32f7/chip/stm32_memorymap.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_memorymap.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,6 +46,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "chip/stm32f74xx75xx_memorymap.h" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f76xx77xx_memorymap.h" #else # error "Unsupported STM32 F7 memory map" #endif diff --git a/arch/arm/src/stm32f7/chip/stm32_pinmap.h b/arch/arm/src/stm32f7/chip/stm32_pinmap.h index 59903d8d03e..034e32166eb 100644 --- a/arch/arm/src/stm32f7/chip/stm32_pinmap.h +++ b/arch/arm/src/stm32f7/chip/stm32_pinmap.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_pinmap.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,8 +46,10 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "chip/stm32f74xx75xx_pinmap.h" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f76xx77xx_pinmap.h" #else -# error "Unsupported STM32 F7 memory map" +# error "Unsupported STM32 F7 Pin map" #endif #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_PINMAP_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32_pwr.h b/arch/arm/src/stm32f7/chip/stm32_pwr.h index 427fab1f3fc..e9415d800a7 100644 --- a/arch/arm/src/stm32f7/chip/stm32_pwr.h +++ b/arch/arm/src/stm32f7/chip/stm32_pwr.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_pwr.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,6 +46,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "chip/stm32f74xx75xx_pwr.h" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f76xx77xx_pwr.h" #else # error "Unsupported STM32 F7 part" #endif diff --git a/arch/arm/src/stm32f7/chip/stm32_rcc.h b/arch/arm/src/stm32f7/chip/stm32_rcc.h index 13468a55601..e2dfc8380f9 100644 --- a/arch/arm/src/stm32f7/chip/stm32_rcc.h +++ b/arch/arm/src/stm32f7/chip/stm32_rcc.h @@ -1,8 +1,8 @@ /************************************************************************************ * arch/arm/src/stm32f7/chip/stm32_rcc.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,6 +45,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "chip/stm32f74xx75xx_rcc.h" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f76xx77xx_rcc.h" #else # error "Unsupported STM32 F7 part" #endif diff --git a/arch/arm/src/stm32f7/chip/stm32_syscfg.h b/arch/arm/src/stm32f7/chip/stm32_syscfg.h index 37c82ec50cf..b17bc518aa2 100644 --- a/arch/arm/src/stm32f7/chip/stm32_syscfg.h +++ b/arch/arm/src/stm32f7/chip/stm32_syscfg.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32_syscfg.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -45,6 +46,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "chip/stm32f74xx75xx_syscfg.h" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f76xx77xx_syscfg.h" #else # error "Unsupported STM32 F7 part" #endif diff --git a/arch/arm/src/stm32f7/chip/stm32_uart.h b/arch/arm/src/stm32f7/chip/stm32_uart.h index 0d48eaa399a..89177c89876 100644 --- a/arch/arm/src/stm32f7/chip/stm32_uart.h +++ b/arch/arm/src/stm32f7/chip/stm32_uart.h @@ -1,8 +1,8 @@ /************************************************************************************ * arch/arm/src/stm32f7/chip/stm32_uart.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -43,8 +43,9 @@ #include #include "chip.h" -#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) -# include "chip/stm32f74xx75xx_uart.h" +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \ + defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "chip/stm32f74xx77xx_uart.h" #else # error "Unsupported STM32 F7 part" #endif diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dma.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dma.h index a9acb057871..6b7fed23c16 100644 --- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dma.h +++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_dma.h @@ -412,16 +412,16 @@ #define DMAMAP_SPDIFRX_CS STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN0) #define DMAMAP_SPI3_TX_2 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN0) -#define DMAMAP_I2C1_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN1) -#define DMAMAP_I2C3_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN1) +#define DMAMAP_I2C1_RX STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN1) +#define DMAMAP_I2C3_RX STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN1) #define DMAMAP_TIM7_UP_1 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN1) #define DMAMAP_TIM7_UP_2 STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN1) -#define DMAMAP_I2C1_RX_2 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN1) -#define DMAMAP_I2C1_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN1) -#define DMAMAP_I2C1_TX_2 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN1) +#define DMAMAP_I2C1_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN1) +#define DMAMAP_I2C1_TX STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN1) +#define DMAMAP_I2C1_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN1) #define DMAMAP_TIM4_CH1 STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN2) -#define DMAMAP_I2C_RX STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN2) +#define DMAMAP_I2C4_RX STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN2) #define DMAMAP_TIM4_CH2 STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN2) #define DMAMAP_I2C4_TX STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN2) #define DMAMAP_TIM4_UP STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN2) @@ -429,7 +429,7 @@ #define DMAMAP_TIM2_UP_1 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN3) #define DMAMAP_TIM2_CH3 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN3) -#define DMAMAP_I2C3_RX_2 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN3) +#define DMAMAP_I2C3_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN3) #define DMAMAP_I2C3_TX STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN3) #define DMAMAP_TIM2_CH1 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN3) #define DMAMAP_TIM2_CH2 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN3) @@ -468,8 +468,8 @@ #define DMAMAP_TIM5_UP_2 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN6) #define DMAMAP_TIM6_UP STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN7) -#define DMAMAP_I2C2_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN7) -#define DMAMAP_I2C2_RX_2 STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN7) +#define DMAMAP_I2C2_RX STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN7) +#define DMAMAP_I2C2_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN7) #define DMAMAP_USART3_TX_2 STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN7) #define DMAMAP_DAC1 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN7) #define DMAMAP_DAC2 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN7) diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h index 69f4e217fca..74c2759fc94 100644 --- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h +++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -40,44 +41,62 @@ * Pre-processor Definitions ************************************************************************************/ -/* Flash size is not known from the chip configuration: +/* Flash size is known from the chip selection: + * + * When CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT is set the + * CONFIG_STM32F7_FLASH_CONFIG_x selects the default FLASH size based on the chip + * part number. This value can be overridden with CONFIG_STM32F7_FLASH_OVERRIDE_x * * Parts STM32F74xxE have 512Kb of FLASH * Parts STM32F74xxG have 1024Kb of FLASH * - * The user has to tell us the FLASH size by setting CONFIG_STM32F7_FLASH_SIZE + * N.B. Only Single bank mode is supported */ -#if defined(CONFIG_STM32F7_FLASH_512KB) - -# define STM32_FLASH_NPAGES 2 -# define STM32_FLASH_SIZE (512*1024) - -#elif defined(CONFIG_STM32F7_FLASH_1024KB) - -# define STM32_FLASH_NPAGES 4 -# define STM32_FLASH_SIZE (1024*1024) - -#else -# warning Assuming FLASH size 1024KB - -# define STM32_FLASH_NPAGES 4 -# define STM32_FLASH_SIZE (1024*1024) +#define _K(x) ((x)*1024) +#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT) && \ + !defined(CONFIG_STM32_FLASH_OVERRIDE_E) && \ + !defined(CONFIG_STM32_FLASH_OVERRIDE_F) && \ + !defined(CONFIG_STM32_FLASH_OVERRIDE_G) && \ + !defined(CONFIG_STM32_FLASH_CONFIG_E) && \ + !defined(CONFIG_STM32_FLASH_CONFIG_F) && \ + !defined(CONFIG_STM32_FLASH_CONFIG_G) +# define CONFIG_STM32_FLASH_OVERRIDE_E +# warning "Flash size not defined defaulting to 512KiB (E)" #endif -/* The STM32F745xx/46xx have mixed page sizes: - * - * Sectors: 0-3: 32 KB - * Sector 4 128 KB - * Sectors: 5-7: 256 KB - * - * We use the largest page size and set the number of pages equal to the - * FLASH size assuming that fixed, largest pages size. - */ +#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT) -#define STM32_FLASH_PAGESIZE (256*1024) +# undef CONFIG_STM32F7_FLASH_CONFIG_E +# undef CONFIG_STM32F7_FLASH_CONFIG_G +# if defined(CONFIG_STM32F7_FLASH_OVERRIDE_E) + +# define CONFIG_STM32F7_FLASH_CONFIG_E + +# elif defined(CONFIG_STM32F7_FLASH_OVERRIDE_G) + +# define CONFIG_STM32F7_FLASH_CONFIG_G + +# endif +#endif + +#if defined(CONFIG_STM32_FLASH_CONFIG_E) + +# define STM32_FLASH_NPAGES 6 +# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (1 * 256)) +# define STM32_FLASH_SIZES {_K(32), _K(32), _K(32), _K(32), \ + _K(128), _K(256)} + +#elif defined(CONFIG_STM32_FLASH_CONFIG_G) + +# define STM32_FLASH_NPAGES 8 +# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (3 * 256)) +# define STM32_FLASH_SIZES {_K(32), _K(32), _K(32), _K(32), \ + _K(128), _K(256), _K(256), _K(256)} + +#endif /* Register Offsets *****************************************************************/ @@ -133,8 +152,8 @@ #define FLASH_CR_SER (1 << 1) /* Bit 1: Sector Erase */ #define FLASH_CR_MER (1 << 2) /* Bit 2: Mass Erase sectors 0..11 */ #define FLASH_CR_SNB_SHIFT (3) /* Bits 3-6: Sector number */ -#define FLASH_CR_SNB_MASK (15 << FLASH_CR_SNB_SHIFT) -# define FLASH_CR_SNB(n) ((uint32_t)(n) << FLASH_CR_SNB_SHIFT) | ((n / 12) << 7)) /* Sector n, n=0..23 */ +#define FLASH_CR_SNB_MASK (0xf << FLASH_CR_SNB_SHIFT) +# define FLASH_CR_SNB(n) ((uint32_t)((n) % 8) << FLASH_CR_SNB_SHIFT) | ((n / 8) << 6)) /* Sector n, n=0..23 */ #define FLASH_CR_PSIZE_SHIFT (8) /* Bits 8-9: Program size */ #define FLASH_CR_PSIZE_MASK (3 << FLASH_CR_PSIZE_SHIFT) # define FLASH_CR_PSIZE_X8 (0 << FLASH_CR_PSIZE_SHIFT) /* Program x8 */ @@ -145,7 +164,6 @@ #define FLASH_CR_EOPIE (1 << 24) /* Bit 24: End of operation interrupt enable */ #define FLASH_CR_ERRIE (1 << 25) /* Bit 25: Error interrupt enable */ #define FLASH_CR_LOCK (1 << 31) /* Bit 31: Lock */ -#define FLASH_CR_MER1 (1 << 15) /* Bit 15: Mass Erase sectors 12..23 */ /* Flash Option Control Register (OPTCR) */ @@ -159,15 +177,15 @@ # define FLASH_OPTCR_VBOR0 (3 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR off */ #define FLASH_OPTCR_USER_SHIFT (4) /* Bits 5-7: User option bytes */ #define FLASH_OPTCR_USER_MASK (15 << FLASH_OPTCR_USER_SHIFT) -# define FLASH_OPTCR_WWDG_SW (1 << 4) /* Bit 5: WWDG_SW */ +# define FLASH_OPTCR_WWDG_SW (1 << 4) /* Bit 4: WWDG_SW */ # define FLASH_OPTCR_IWDG_SW (1 << 5) /* Bit 5: IWDG_SW */ # define FLASH_OPTCR_NRST_STOP (1 << 6) /* Bit 6: nRST_STOP */ # define FLASH_OPTCR_NRST_STDBY (1 << 7) /* Bit 7: nRST_STDBY */ #define FLASH_OPTCR_RDP_SHIFT (8) /* Bits 8-15: Read protect */ #define FLASH_OPTCR_RDP_MASK (0xff << FLASH_OPTCR_RDP_SHIFT) # define FLASH_OPTCR_RDP(n) ((uint32_t)(n) << FLASH_OPTCR_RDP_SHIFT) -#define FLASH_OPTCR_NWRP_SHIFT (16) /* Bits 16-27: Not write protect */ -#define FLASH_OPTCR_NWRP_MASK (0xfff << FLASH_OPTCR_NWRP_SHIFT) +#define FLASH_OPTCR_NWRP_SHIFT (16) /* Bits 16-23: Not write protect */ +#define FLASH_OPTCR_NWRP_MASK (0xff << FLASH_OPTCR_NWRP_SHIFT) # define FLASH_OPTCR_NWRP(n) ((uint32_t)(n) << FLASH_OPTCR_NWRP_SHIFT) #define FLASH_OPTCR_IWDG_STDBY (1 << 30) /* Bit 30: IWDG freeze in stop mode */ #define FLASH_OPTCR_IWDG_STOP (1 << 31) /* Bit 31: IWDG freeze in standby mode */ diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_gpio.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_gpio.h index c996f7d1052..b8818f6e49b 100644 --- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_gpio.h +++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_gpio.h @@ -61,7 +61,6 @@ #define STM32_GPIO_LCKR_OFFSET 0x001c /* GPIO port configuration lock register */ #define STM32_GPIO_AFRL_OFFSET 0x0020 /* GPIO alternate function low register */ #define STM32_GPIO_AFRH_OFFSET 0x0024 /* GPIO alternate function high register */ -#define STM32_GPIO_BRR_OFFSET 0x0028 /* GPIO port bit reset register */ /* Register Addresses ***************************************************************/ @@ -76,7 +75,6 @@ # define STM32_GPIOA_LCKR (STM32_GPIOA_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOA_AFRL (STM32_GPIOA_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOA_AFRH (STM32_GPIOA_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOA_BRR (STM32_GPIOA_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 1 @@ -90,7 +88,6 @@ # define STM32_GPIOB_LCKR (STM32_GPIOB_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOB_AFRL (STM32_GPIOB_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOB_AFRH (STM32_GPIOB_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOB_BRR (STM32_GPIOB_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 2 @@ -104,7 +101,6 @@ # define STM32_GPIOC_LCKR (STM32_GPIOC_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOC_AFRL (STM32_GPIOC_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOC_AFRH (STM32_GPIOC_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOC_BRR (STM32_GPIOC_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 3 @@ -118,7 +114,6 @@ # define STM32_GPIOD_LCKR (STM32_GPIOD_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOD_AFRL (STM32_GPIOD_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOD_AFRH (STM32_GPIOD_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOD_BRR (STM32_GPIOD_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 4 @@ -132,7 +127,6 @@ # define STM32_GPIOE_LCKR (STM32_GPIOE_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOE_AFRL (STM32_GPIOE_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOE_AFRH (STM32_GPIOE_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOE_BRR (STM32_GPIOE_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 5 @@ -146,7 +140,6 @@ # define STM32_GPIOF_LCKR (STM32_GPIOF_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOF_AFRL (STM32_GPIOF_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOF_AFRH (STM32_GPIOF_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOF_BRR (STM32_GPIOF_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 6 @@ -160,7 +153,6 @@ # define STM32_GPIOG_LCKR (STM32_GPIOG_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOG_AFRL (STM32_GPIOG_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOG_AFRH (STM32_GPIOG_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOG_BRR (STM32_GPIOG_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 7 @@ -174,7 +166,6 @@ # define STM32_GPIOH_LCKR (STM32_GPIOH_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOH_AFRL (STM32_GPIOH_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOH_AFRH (STM32_GPIOH_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOH_BRR (STM32_GPIOH_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 8 @@ -188,7 +179,6 @@ # define STM32_GPIOI_LCKR (STM32_GPIOI_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOI_AFRL (STM32_GPIOI_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOI_AFRH (STM32_GPIOI_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOI_BRR (STM32_GPIOI_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 9 @@ -202,7 +192,6 @@ # define STM32_GPIOJ_LCKR (STM32_GPIOJ_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOJ_AFRL (STM32_GPIOJ_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOJ_AFRH (STM32_GPIOJ_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOJ_BRR (STM32_GPIOJ_BASE+STM32_GPIO_BRR_OFFSET) #endif #if STM32F7_NGPIO > 10 @@ -216,7 +205,6 @@ # define STM32_GPIOK_LCKR (STM32_GPIOK_BASE+STM32_GPIO_LCKR_OFFSET) # define STM32_GPIOK_AFRL (STM32_GPIOK_BASE+STM32_GPIO_AFRL_OFFSET) # define STM32_GPIOK_AFRH (STM32_GPIOK_BASE+STM32_GPIO_AFRH_OFFSET) -# define STM32_GPIOK_BRR (STM32_GPIOK_BASE+STM32_GPIO_BRR_OFFSET) #endif /* Register Bitfield Definitions ****************************************************/ @@ -411,9 +399,5 @@ #define GPIO_AFRH15_SHIFT (28) #define GPIO_AFRH15_MASK (15 << GPIO_AFRH15_SHIFT) -/* GPIO port bit reset register */ - -#define GPIO_BRR(n) (1 << (n)) - #endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */ #endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F74XX75XX_GPIO_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h index 52593e9f292..b68797d0068 100644 --- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h +++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h @@ -2,7 +2,8 @@ * arch/arm/src/stm3fr2/chip/stm32f74xxx75xxx_memorymap.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -59,9 +60,8 @@ #define STM32_FSMC_BASE34 0x80000000 /* 0x80000000-0x8fffffff: 512Mb FSMC bank3&4 block */ # define STM32_FSMC_BANK3 0x80000000 /* 0x80000000-0x8fffffff: 256Mb NAND FLASH */ # define STM32_FSMC_BANK4 0x90000000 /* 0x90000000-0x9fffffff: 256Mb PC CARD */ -#define STM32_AHB3_BASE 0xa0000000 /* 0xa0000000-0xa0001fff: 256Mb AHB3 peripheral block */ #define STM32_FSMC_BASE5 0xc0000000 /* 0xc0000000-0xcfffffff: 256Mb FSMC */ -#define STM32_FSMC_BASE6 0xc0000000 /* 0xd0000000-0xdfffffff: 256Mb FSMC */ +#define STM32_FSMC_BASE6 0xd0000000 /* 0xd0000000-0xdfffffff: 256Mb FSMC */ #define STM32_CORTEX_BASE 0xe0000000 /* 0xe0000000-0xffffffff: 512Mb Cortex-M7 block */ #define STM32_REGION_MASK 0xf0000000 @@ -98,6 +98,7 @@ #define STM32_APB2_BASE 0x40010000 /* 0x40010000-0x40016bff: APB2 */ #define STM32_AHB1_BASE 0x40020000 /* 0x40020000-0x4007ffff: APB1 */ #define STM32_AHB2_BASE 0x50000000 /* 0x50000000-0x5003ffff: AHB2 */ +#define STM32_AHB3_BASE 0x60000000 /* 0x60000000-0xdfffffff: AHB3 */ /* APB1 Base Addresses **************************************************************/ diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h index 64b68653d18..4e0410bc16f 100644 --- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h +++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/chip/stm32f74xx75xx_pinmap.h * * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -50,7 +51,7 @@ * Pre-processor Definitions ************************************************************************************/ -/* Alternate Pin Functions. All members of the STM32F40xxx family share the same +/* Alternate Pin Functions. All members of the STM32F74|5xxx family share the same * pin multiplexing (although they may differ in the pins physically available). * * Alternative pin selections are provided with a numeric suffix like _1, _2, etc. diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h index e7c58b19ff5..547b555a92b 100644 --- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h +++ b/arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h @@ -1,8 +1,9 @@ /************************************************************************************ - * arch/arm/src/stm32f7/chip/stm32_pwr.h + * arch/arm/src/stm32f7/chip/stm32f74xx75xx_pwr.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -103,6 +104,7 @@ #define PWR_CSR1_SBF (1 << 1) /* Bit 1: Standby flag */ #define PWR_CSR1_PVDO (1 << 2) /* Bit 2: PVD Output */ #define PWR_CSR1_BRR (1 << 3) /* Bit 3: Backup regulator ready */ +#define PWR_CSR1_EIWUP (1 << 8) /* Bit 8: Enable internal wakeup */ #define PWR_CSR1_BRE (1 << 9) /* Bit 9: Backup regulator enable */ #define PWR_CSR1_VOSRDY (1 << 14) /* Bit 14: Regulator voltage scaling output selection ready bite */ #define PWR_CSR1_ODRDY (1 << 16) /* Bit 16: Over Drive generator ready */ diff --git a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_uart.h b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_uart.h similarity index 98% rename from arch/arm/src/stm32f7/chip/stm32f74xx75xx_uart.h rename to arch/arm/src/stm32f7/chip/stm32f74xx77xx_uart.h index 50d5f949f5f..e33030cd8da 100644 --- a/arch/arm/src/stm32f7/chip/stm32f74xx75xx_uart.h +++ b/arch/arm/src/stm32f7/chip/stm32f74xx77xx_uart.h @@ -1,8 +1,9 @@ /************************************************************************************ - * arch/arm/src/stm32f7/chip/stm32f74xxf75xx_uart.h + * arch/arm/src/stm32f7/chip/stm32f74xxf77xx_uart.h * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -33,8 +34,8 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX75XX_UART_H -#define __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX75XX_UART_H +#ifndef __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX77XX_UART_H +#define __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX77XX_UART_H /************************************************************************************ * Included Files @@ -42,7 +43,8 @@ #include -#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) || \ + defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) /************************************************************************************ * Pre-processor Definitions @@ -366,4 +368,4 @@ #define USART_TDR_MASK (0x1ff << USART_TDR_SHIFT) #endif /* CONFIG_STM32F7_STM32F74XX || CONFIG_STM32F7_STM32F75XX */ -#endif /* __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX75XX_UART_H */ +#endif /* __ARCH_ARM_STC_STM32F7_CHIP_STM32F74XX77XX_UART_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dma.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dma.h new file mode 100644 index 00000000000..d4d4eb0f893 --- /dev/null +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_dma.h @@ -0,0 +1,593 @@ +/************************************************************************************ + * arch/arm/src/stm32f7/chip/stm32f76xx77xx_dma.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * Davod Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XX_DMA_H +#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XX_DMA_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* 2 DMA controllers */ + +#define DMA1 (0) +#define DMA2 (1) + +/* 8 DMA streams */ + +#define DMA_STREAM0 (0) +#define DMA_STREAM1 (1) +#define DMA_STREAM2 (2) +#define DMA_STREAM3 (3) +#define DMA_STREAM4 (4) +#define DMA_STREAM5 (5) +#define DMA_STREAM6 (6) +#define DMA_STREAM7 (7) + +/* 16 DMA channels */ + +#define DMA_CHAN0 (0) +#define DMA_CHAN1 (1) +#define DMA_CHAN2 (2) +#define DMA_CHAN3 (3) +#define DMA_CHAN4 (4) +#define DMA_CHAN5 (5) +#define DMA_CHAN6 (6) +#define DMA_CHAN7 (7) +#define DMA_CHAN8 (8) +#define DMA_CHAN9 (9) +#define DMA_CHAN10 (10) +#define DMA_CHAN11 (11) +#define DMA_CHAN12 (12) +#define DMA_CHAN13 (13) +#define DMA_CHAN14 (14) +#define DMA_CHAN15 (15) + +/* Register Offsets *****************************************************************/ + +#define STM32_DMA_LISR_OFFSET 0x0000 /* DMA low interrupt status register */ +#define STM32_DMA_HISR_OFFSET 0x0004 /* DMA high interrupt status register */ +#define STM32_DMA_LIFCR_OFFSET 0x0008 /* DMA low interrupt flag clear register */ +#define STM32_DMA_HIFCR_OFFSET 0x000c /* DMA high interrupt flag clear register */ + +#define STM32_DMA_OFFSET(n) (0x0010+0x0018*(n)) +#define STM32_DMA_SCR_OFFSET 0x0000 /* DMA stream n configuration register */ +#define STM32_DMA_SNDTR_OFFSET 0x0004 /* DMA stream n number of data register */ +#define STM32_DMA_SPAR_OFFSET 0x0008 /* DMA stream n peripheral address register */ +#define STM32_DMA_SM0AR_OFFSET 0x000c /* DMA stream n memory 0 address register */ +#define STM32_DMA_SM1AR_OFFSET 0x0010 /* DMA stream n memory 1 address register */ +#define STM32_DMA_SFCR_OFFSET 0x0014 /* DMA stream n FIFO control register */ + +#define STM32_DMA_S0CR_OFFSET 0x0010 /* DMA stream 0 configuration register */ +#define STM32_DMA_S1CR_OFFSET 0x0028 /* DMA stream 1 configuration register */ +#define STM32_DMA_S2CR_OFFSET 0x0040 /* DMA stream 2 configuration register */ +#define STM32_DMA_S3CR_OFFSET 0x0058 /* DMA stream 3 configuration register */ +#define STM32_DMA_S4CR_OFFSET 0x0070 /* DMA stream 4 configuration register */ +#define STM32_DMA_S5CR_OFFSET 0x0088 /* DMA stream 5 configuration register */ +#define STM32_DMA_S6CR_OFFSET 0x00a0 /* DMA stream 6 configuration register */ +#define STM32_DMA_S7CR_OFFSET 0x00b8 /* DMA stream 7 configuration register */ + +#define STM32_DMA_S0NDTR_OFFSET 0x0014 /* DMA stream 0 number of data register */ +#define STM32_DMA_S1NDTR_OFFSET 0x002c /* DMA stream 1 number of data register */ +#define STM32_DMA_S2NDTR_OFFSET 0x0044 /* DMA stream 2 number of data register */ +#define STM32_DMA_S3NDTR_OFFSET 0x005c /* DMA stream 3 number of data register */ +#define STM32_DMA_S4NDTR_OFFSET 0x0074 /* DMA stream 4 number of data register */ +#define STM32_DMA_S5NDTR_OFFSET 0x008c /* DMA stream 5 number of data register */ +#define STM32_DMA_S6NDTR_OFFSET 0x00a4 /* DMA stream 6 number of data register */ +#define STM32_DMA_S7NDTR_OFFSET 0x00bc /* DMA stream 7 number of data register */ + +#define STM32_DMA_S0PAR_OFFSET 0x0018 /* DMA stream 0 peripheral address register */ +#define STM32_DMA_S1PAR_OFFSET 0x0030 /* DMA stream 1 peripheral address register */ +#define STM32_DMA_S2PAR_OFFSET 0x0048 /* DMA stream 2 peripheral address register */ +#define STM32_DMA_S3PAR_OFFSET 0x0060 /* DMA stream 3 peripheral address register */ +#define STM32_DMA_S4PAR_OFFSET 0x0078 /* DMA stream 4 peripheral address register */ +#define STM32_DMA_S5PAR_OFFSET 0x0090 /* DMA stream 5 peripheral address register */ +#define STM32_DMA_S6PAR_OFFSET 0x00a8 /* DMA stream 6 peripheral address register */ +#define STM32_DMA_S7PAR_OFFSET 0x00c0 /* DMA stream 7 peripheral address register */ + +#define STM32_DMA_S0M0AR_OFFSET 0x001c /* DMA stream 0 memory 0 address register */ +#define STM32_DMA_S1M0AR_OFFSET 0x0034 /* DMA stream 1 memory 0 address register */ +#define STM32_DMA_S2M0AR_OFFSET 0x004c /* DMA stream 2 memory 0 address register */ +#define STM32_DMA_S3M0AR_OFFSET 0x0064 /* DMA stream 3 memory 0 address register */ +#define STM32_DMA_S4M0AR_OFFSET 0x007c /* DMA stream 4 memory 0 address register */ +#define STM32_DMA_S5M0AR_OFFSET 0x0094 /* DMA stream 5 memory 0 address register */ +#define STM32_DMA_S6M0AR_OFFSET 0x00ac /* DMA stream 6 memory 0 address register */ +#define STM32_DMA_S7M0AR_OFFSET 0x00c4 /* DMA stream 7 memory 0 address register */ + +#define STM32_DMA_S0M1AR_OFFSET 0x0020 /* DMA stream 0 memory 1 address register */ +#define STM32_DMA_S1M1AR_OFFSET 0x0038 /* DMA stream 1 memory 1 address register */ +#define STM32_DMA_S2M1AR_OFFSET 0x0050 /* DMA stream 2 memory 1 address register */ +#define STM32_DMA_S3M1AR_OFFSET 0x0068 /* DMA stream 3 memory 1 address register */ +#define STM32_DMA_S4M1AR_OFFSET 0x0080 /* DMA stream 4 memory 1 address register */ +#define STM32_DMA_S5M1AR_OFFSET 0x0098 /* DMA stream 5 memory 1 address register */ +#define STM32_DMA_S6M1AR_OFFSET 0x00b0 /* DMA stream 6 memory 1 address register */ +#define STM32_DMA_S7M1AR_OFFSET 0x00c8 /* DMA stream 7 memory 1 address register */ + +#define STM32_DMA_S0FCR_OFFSET 0x0024 /* DMA stream 0 FIFO control register */ +#define STM32_DMA_S1FCR_OFFSET 0x003c /* DMA stream 1 FIFO control register */ +#define STM32_DMA_S2FCR_OFFSET 0x0054 /* DMA stream 2 FIFO control register */ +#define STM32_DMA_S3FCR_OFFSET 0x006c /* DMA stream 3 FIFO control register */ +#define STM32_DMA_S4FCR_OFFSET 0x0084 /* DMA stream 4 FIFO control register */ +#define STM32_DMA_S5FCR_OFFSET 0x009c /* DMA stream 5 FIFO control register */ +#define STM32_DMA_S6FCR_OFFSET 0x00b4 /* DMA stream 6 FIFO control register */ +#define STM32_DMA_S7FCR_OFFSET 0x00cc /* DMA stream 7 FIFO control register */ + +/* Register Addresses ***************************************************************/ + +#define STM32_DMA1_LISRC (STM32_DMA1_BASE+STM32_DMA_LISR_OFFSET) +#define STM32_DMA1_HISRC (STM32_DMA1_BASE+STM32_DMA_HISR_OFFSET) +#define STM32_DMA1_LIFCR (STM32_DMA1_BASE+STM32_DMA_LIFCR_OFFSET) +#define STM32_DMA1_HIFCR (STM32_DMA1_BASE+STM32_DMA_HIFCR_OFFSET) + +#define STM32_DMA1_SCR(n) (STM32_DMA1_BASE+STM32_DMA_SCR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA1_S0CR (STM32_DMA1_BASE+STM32_DMA_S0CR_OFFSET) +#define STM32_DMA1_S1CR (STM32_DMA1_BASE+STM32_DMA_S1CR_OFFSET) +#define STM32_DMA1_S2CR (STM32_DMA1_BASE+STM32_DMA_S2CR_OFFSET) +#define STM32_DMA1_S3CR (STM32_DMA1_BASE+STM32_DMA_S3CR_OFFSET) +#define STM32_DMA1_S4CR (STM32_DMA1_BASE+STM32_DMA_S4CR_OFFSET) +#define STM32_DMA1_S5CR (STM32_DMA1_BASE+STM32_DMA_S5CR_OFFSET) +#define STM32_DMA1_S6CR (STM32_DMA1_BASE+STM32_DMA_S6CR_OFFSET) +#define STM32_DMA1_S7CR (STM32_DMA1_BASE+STM32_DMA_S7CR_OFFSET) + +#define STM32_DMA1_SNDTR(n) (STM32_DMA1_BASE+STM32_DMA_SNDTR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA1_S0NDTR (STM32_DMA1_BASE+STM32_DMA_S0NDTR_OFFSET) +#define STM32_DMA1_S1NDTR (STM32_DMA1_BASE+STM32_DMA_S1NDTR_OFFSET) +#define STM32_DMA1_S2NDTR (STM32_DMA1_BASE+STM32_DMA_S2NDTR_OFFSET) +#define STM32_DMA1_S3NDTR (STM32_DMA1_BASE+STM32_DMA_S3NDTR_OFFSET) +#define STM32_DMA1_S4NDTR (STM32_DMA1_BASE+STM32_DMA_S4NDTR_OFFSET) +#define STM32_DMA1_S5NDTR (STM32_DMA1_BASE+STM32_DMA_S5NDTR_OFFSET) +#define STM32_DMA1_S6NDTR (STM32_DMA1_BASE+STM32_DMA_S6NDTR_OFFSET) +#define STM32_DMA1_S7NDTR (STM32_DMA1_BASE+STM32_DMA_S7NDTR_OFFSET) + +#define STM32_DMA1_SPAR(n) (STM32_DMA1_BASE+STM32_DMA_SPAR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA1_S0PAR (STM32_DMA1_BASE+STM32_DMA_S0PAR_OFFSET) +#define STM32_DMA1_S1PAR (STM32_DMA1_BASE+STM32_DMA_S1PAR_OFFSET) +#define STM32_DMA1_S2PAR (STM32_DMA1_BASE+STM32_DMA_S2PAR_OFFSET) +#define STM32_DMA1_S3PAR (STM32_DMA1_BASE+STM32_DMA_S3PAR_OFFSET) +#define STM32_DMA1_S4PAR (STM32_DMA1_BASE+STM32_DMA_S4PAR_OFFSET) +#define STM32_DMA1_S5PAR (STM32_DMA1_BASE+STM32_DMA_S5PAR_OFFSET) +#define STM32_DMA1_S6PAR (STM32_DMA1_BASE+STM32_DMA_S6PAR_OFFSET) +#define STM32_DMA1_S7PAR (STM32_DMA1_BASE+STM32_DMA_S7PAR_OFFSET) + +#define STM32_DMA1_SM0AR(n) (STM32_DMA1_BASE+STM32_DMA_SM0AR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA1_S0M0AR (STM32_DMA1_BASE+STM32_DMA_S0M0AR_OFFSET) +#define STM32_DMA1_S1M0AR (STM32_DMA1_BASE+STM32_DMA_S1M0AR_OFFSET) +#define STM32_DMA1_S2M0AR (STM32_DMA1_BASE+STM32_DMA_S2M0AR_OFFSET) +#define STM32_DMA1_S3M0AR (STM32_DMA1_BASE+STM32_DMA_S3M0AR_OFFSET) +#define STM32_DMA1_S4M0AR (STM32_DMA1_BASE+STM32_DMA_S4M0AR_OFFSET) +#define STM32_DMA1_S5M0AR (STM32_DMA1_BASE+STM32_DMA_S5M0AR_OFFSET) +#define STM32_DMA1_S6M0AR (STM32_DMA1_BASE+STM32_DMA_S6M0AR_OFFSET) +#define STM32_DMA1_S7M0AR (STM32_DMA1_BASE+STM32_DMA_S7M0AR_OFFSET) + +#define STM32_DMA1_SM1AR(n) (STM32_DMA1_BASE+STM32_DMA_SM1AR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA1_S0M1AR (STM32_DMA1_BASE+STM32_DMA_S0M1AR_OFFSET) +#define STM32_DMA1_S1M1AR (STM32_DMA1_BASE+STM32_DMA_S1M1AR_OFFSET) +#define STM32_DMA1_S2M1AR (STM32_DMA1_BASE+STM32_DMA_S2M1AR_OFFSET) +#define STM32_DMA1_S3M1AR (STM32_DMA1_BASE+STM32_DMA_S3M1AR_OFFSET) +#define STM32_DMA1_S4M1AR (STM32_DMA1_BASE+STM32_DMA_S4M1AR_OFFSET) +#define STM32_DMA1_S5M1AR (STM32_DMA1_BASE+STM32_DMA_S5M1AR_OFFSET) +#define STM32_DMA1_S6M1AR (STM32_DMA1_BASE+STM32_DMA_S6M1AR_OFFSET) +#define STM32_DMA1_S7M1AR (STM32_DMA1_BASE+STM32_DMA_S7M1AR_OFFSET) + +#define STM32_DMA1_SFCR(n) (STM32_DMA1_BASE+STM32_DMA_SFCR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA1_S0FCR (STM32_DMA1_BASE+STM32_DMA_S0FCR_OFFSET) +#define STM32_DMA1_S1FCR (STM32_DMA1_BASE+STM32_DMA_S1FCR_OFFSET) +#define STM32_DMA1_S2FCR (STM32_DMA1_BASE+STM32_DMA_S2FCR_OFFSET) +#define STM32_DMA1_S3FCR (STM32_DMA1_BASE+STM32_DMA_S3FCR_OFFSET) +#define STM32_DMA1_S4FCR (STM32_DMA1_BASE+STM32_DMA_S4FCR_OFFSET) +#define STM32_DMA1_S5FCR (STM32_DMA1_BASE+STM32_DMA_S5FCR_OFFSET) +#define STM32_DMA1_S6FCR (STM32_DMA1_BASE+STM32_DMA_S6FCR_OFFSET) +#define STM32_DMA1_S7FCR (STM32_DMA1_BASE+STM32_DMA_S7FCR_OFFSET) + +#define STM32_DMA2_LISRC (STM32_DMA2_BASE+STM32_DMA_LISR_OFFSET) +#define STM32_DMA2_HISRC (STM32_DMA2_BASE+STM32_DMA_HISR_OFFSET) +#define STM32_DMA2_LIFCR (STM32_DMA2_BASE+STM32_DMA_LIFCR_OFFSET) +#define STM32_DMA2_HIFCR (STM32_DMA2_BASE+STM32_DMA_HIFCR_OFFSET) + +#define STM32_DMA2_SCR(n) (STM32_DMA2_BASE+STM32_DMA_SCR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA2_S0CR (STM32_DMA2_BASE+STM32_DMA_S0CR_OFFSET) +#define STM32_DMA2_S1CR (STM32_DMA2_BASE+STM32_DMA_S1CR_OFFSET) +#define STM32_DMA2_S2CR (STM32_DMA2_BASE+STM32_DMA_S2CR_OFFSET) +#define STM32_DMA2_S3CR (STM32_DMA2_BASE+STM32_DMA_S3CR_OFFSET) +#define STM32_DMA2_S4CR (STM32_DMA2_BASE+STM32_DMA_S4CR_OFFSET) +#define STM32_DMA2_S5CR (STM32_DMA2_BASE+STM32_DMA_S5CR_OFFSET) +#define STM32_DMA2_S6CR (STM32_DMA2_BASE+STM32_DMA_S6CR_OFFSET) +#define STM32_DMA2_S7CR (STM32_DMA2_BASE+STM32_DMA_S7CR_OFFSET) + +#define STM32_DMA2_SNDTR(n) (STM32_DMA2_BASE+STM32_DMA_SNDTR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA2_S0NDTR (STM32_DMA2_BASE+STM32_DMA_S0NDTR_OFFSET) +#define STM32_DMA2_S1NDTR (STM32_DMA2_BASE+STM32_DMA_S1NDTR_OFFSET) +#define STM32_DMA2_S2NDTR (STM32_DMA2_BASE+STM32_DMA_S2NDTR_OFFSET) +#define STM32_DMA2_S3NDTR (STM32_DMA2_BASE+STM32_DMA_S3NDTR_OFFSET) +#define STM32_DMA2_S4NDTR (STM32_DMA2_BASE+STM32_DMA_S4NDTR_OFFSET) +#define STM32_DMA2_S5NDTR (STM32_DMA2_BASE+STM32_DMA_S5NDTR_OFFSET) +#define STM32_DMA2_S6NDTR (STM32_DMA2_BASE+STM32_DMA_S6NDTR_OFFSET) +#define STM32_DMA2_S7NDTR (STM32_DMA2_BASE+STM32_DMA_S7NDTR_OFFSET) + +#define STM32_DMA2_SPAR(n) (STM32_DMA2_BASE+STM32_DMA_SPAR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA2_S0PAR (STM32_DMA2_BASE+STM32_DMA_S0PAR_OFFSET) +#define STM32_DMA2_S1PAR (STM32_DMA2_BASE+STM32_DMA_S1PAR_OFFSET) +#define STM32_DMA2_S2PAR (STM32_DMA2_BASE+STM32_DMA_S2PAR_OFFSET) +#define STM32_DMA2_S3PAR (STM32_DMA2_BASE+STM32_DMA_S3PAR_OFFSET) +#define STM32_DMA2_S4PAR (STM32_DMA2_BASE+STM32_DMA_S4PAR_OFFSET) +#define STM32_DMA2_S5PAR (STM32_DMA2_BASE+STM32_DMA_S5PAR_OFFSET) +#define STM32_DMA2_S6PAR (STM32_DMA2_BASE+STM32_DMA_S6PAR_OFFSET) +#define STM32_DMA2_S7PAR (STM32_DMA2_BASE+STM32_DMA_S7PAR_OFFSET) + +#define STM32_DMA2_SM0AR(n) (STM32_DMA2_BASE+STM32_DMA_SM0AR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA2_S0M0AR (STM32_DMA2_BASE+STM32_DMA_S0M0AR_OFFSET) +#define STM32_DMA2_S1M0AR (STM32_DMA2_BASE+STM32_DMA_S1M0AR_OFFSET) +#define STM32_DMA2_S2M0AR (STM32_DMA2_BASE+STM32_DMA_S2M0AR_OFFSET) +#define STM32_DMA2_S3M0AR (STM32_DMA2_BASE+STM32_DMA_S3M0AR_OFFSET) +#define STM32_DMA2_S4M0AR (STM32_DMA2_BASE+STM32_DMA_S4M0AR_OFFSET) +#define STM32_DMA2_S5M0AR (STM32_DMA2_BASE+STM32_DMA_S5M0AR_OFFSET) +#define STM32_DMA2_S6M0AR (STM32_DMA2_BASE+STM32_DMA_S6M0AR_OFFSET) +#define STM32_DMA2_S7M0AR (STM32_DMA2_BASE+STM32_DMA_S7M0AR_OFFSET) + +#define STM32_DMA2_SM1AR(n) (STM32_DMA2_BASE+STM32_DMA_SM1AR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA2_S0M1AR (STM32_DMA2_BASE+STM32_DMA_S0M1AR_OFFSET) +#define STM32_DMA2_S1M1AR (STM32_DMA2_BASE+STM32_DMA_S1M1AR_OFFSET) +#define STM32_DMA2_S2M1AR (STM32_DMA2_BASE+STM32_DMA_S2M1AR_OFFSET) +#define STM32_DMA2_S3M1AR (STM32_DMA2_BASE+STM32_DMA_S3M1AR_OFFSET) +#define STM32_DMA2_S4M1AR (STM32_DMA2_BASE+STM32_DMA_S4M1AR_OFFSET) +#define STM32_DMA2_S5M1AR (STM32_DMA2_BASE+STM32_DMA_S5M1AR_OFFSET) +#define STM32_DMA2_S6M1AR (STM32_DMA2_BASE+STM32_DMA_S6M1AR_OFFSET) +#define STM32_DMA2_S7M1AR (STM32_DMA2_BASE+STM32_DMA_S7M1AR_OFFSET) + +#define STM32_DMA2_SFCR(n) (STM32_DMA2_BASE+STM32_DMA_SFCR_OFFSET+STM32_DMA_OFFSET(n)) +#define STM32_DMA2_S0FCR (STM32_DMA2_BASE+STM32_DMA_S0FCR_OFFSET) +#define STM32_DMA2_S1FCR (STM32_DMA2_BASE+STM32_DMA_S1FCR_OFFSET) +#define STM32_DMA2_S2FCR (STM32_DMA2_BASE+STM32_DMA_S2FCR_OFFSET) +#define STM32_DMA2_S3FCR (STM32_DMA2_BASE+STM32_DMA_S3FCR_OFFSET) +#define STM32_DMA2_S4FCR (STM32_DMA2_BASE+STM32_DMA_S4FCR_OFFSET) +#define STM32_DMA2_S5FCR (STM32_DMA2_BASE+STM32_DMA_S5FCR_OFFSET) +#define STM32_DMA2_S6FCR (STM32_DMA2_BASE+STM32_DMA_S6FCR_OFFSET) +#define STM32_DMA2_S7FCR (STM32_DMA2_BASE+STM32_DMA_S7FCR_OFFSET) + +/* Register Bitfield Definitions ****************************************************/ + +#define DMA_STREAM_MASK 0x3f +#define DMA_STREAM_FEIF_BIT (1 << 0) /* Bit 0: Stream FIFO error interrupt flag */ +#define DMA_STREAM_DMEIF_BIT (1 << 2) /* Bit 2: Stream direct mode error interrupt flag */ +#define DMA_STREAM_TEIF_BIT (1 << 3) /* Bit 3: Stream Transfer Error flag */ +#define DMA_STREAM_HTIF_BIT (1 << 4) /* Bit 4: Stream Half Transfer flag */ +#define DMA_STREAM_TCIF_BIT (1 << 5) /* Bit 5: Stream Transfer Complete flag */ + +/* DMA interrupt status register and interrupt flag clear register field definitions */ + +#define DMA_INT_STREAM0_SHIFT (0) /* Bits 0-5: DMA Stream 0 interrupt */ +#define DMA_INT_STREAM0_MASK (DMA_STREAM_MASK << DMA_INT_STREAM0_SHIFT) +#define DMA_INT_STREAM1_SHIFT (6) /* Bits 6-11: DMA Stream 1 interrupt */ +#define DMA_INT_STREAM1_MASK (DMA_STREAM_MASK << DMA_INT_STREAM1_SHIFT) +#define DMA_INT_STREAM2_SHIFT (16) /* Bits 16-21: DMA Stream 2 interrupt */ +#define DMA_INT_STREAM2_MASK (DMA_STREAM_MASK << DMA_INT_STREAM2_SHIFT) +#define DMA_INT_STREAM3_SHIFT (22) /* Bits 22-27: DMA Stream 3 interrupt */ +#define DMA_INT_STREAM3_MASK (DMA_STREAM_MASK << DMA_INT_STREAM3_SHIFT) + +#define DMA_INT_STREAM4_SHIFT (0) /* Bits 0-5: DMA Stream 4 interrupt */ +#define DMA_INT_STREAM4_MASK (DMA_STREAM_MASK << DMA_INT_STREAM4_SHIFT) +#define DMA_INT_STREAM5_SHIFT (6) /* Bits 6-11: DMA Stream 5 interrupt */ +#define DMA_INT_STREAM5_MASK (DMA_STREAM_MASK << DMA_INT_STREAM5_SHIFT) +#define DMA_INT_STREAM6_SHIFT (16) /* Bits 16-21: DMA Stream 6 interrupt */ +#define DMA_INT_STREAM6_MASK (DMA_STREAM_MASK << DMA_INT_STREAM6_SHIFT) +#define DMA_INT_STREAM7_SHIFT (22) /* Bits 22-27: DMA Stream 7 interrupt */ +#define DMA_INT_STREAM7_MASK (DMA_STREAM_MASK << DMA_INT_STREAM7_SHIFT) + +/* DMA stream configuration register */ + +#define DMA_SCR_EN (1 << 0) /* Bit 0: Stream enable */ +#define DMA_SCR_DMEIE (1 << 1) /* Bit 1: Direct mode error interrupt enable */ +#define DMA_SCR_TEIE (1 << 2) /* Bit 2: Transfer error interrupt enable */ +#define DMA_SCR_HTIE (1 << 3) /* Bit 3: Half Transfer interrupt enable */ +#define DMA_SCR_TCIE (1 << 4) /* Bit 4: Transfer complete interrupt enable */ +#define DMA_SCR_PFCTRL (1 << 5) /* Bit 5: Peripheral flow controller */ +#define DMA_SCR_DIR_SHIFT (6) /* Bits 6-7: Data transfer direction */ +#define DMA_SCR_DIR_MASK (3 << DMA_SCR_DIR_SHIFT) +# define DMA_SCR_DIR_P2M (0 << DMA_SCR_DIR_SHIFT) /* 00: Peripheral-to-memory */ +# define DMA_SCR_DIR_M2P (1 << DMA_SCR_DIR_SHIFT) /* 01: Memory-to-peripheral */ +# define DMA_SCR_DIR_M2M (2 << DMA_SCR_DIR_SHIFT) /* 10: Memory-to-memory */ +#define DMA_SCR_CIRC (1 << 8) /* Bit 8: Circular mode */ +#define DMA_SCR_PINC (1 << 9) /* Bit 9: Peripheral increment mode */ +#define DMA_SCR_MINC (1 << 10) /* Bit 10: Memory increment mode */ +#define DMA_SCR_PSIZE_SHIFT (11) /* Bits 11-12: Peripheral size */ +#define DMA_SCR_PSIZE_MASK (3 << DMA_SCR_PSIZE_SHIFT) +# define DMA_SCR_PSIZE_8BITS (0 << DMA_SCR_PSIZE_SHIFT) /* 00: 8-bits */ +# define DMA_SCR_PSIZE_16BITS (1 << DMA_SCR_PSIZE_SHIFT) /* 01: 16-bits */ +# define DMA_SCR_PSIZE_32BITS (2 << DMA_SCR_PSIZE_SHIFT) /* 10: 32-bits */ +#define DMA_SCR_MSIZE_SHIFT (13) /* Bits 13-14: Memory size */ +#define DMA_SCR_MSIZE_MASK (3 << DMA_SCR_MSIZE_SHIFT) +# define DMA_SCR_MSIZE_8BITS (0 << DMA_SCR_MSIZE_SHIFT) /* 00: 8-bits */ +# define DMA_SCR_MSIZE_16BITS (1 << DMA_SCR_MSIZE_SHIFT) /* 01: 16-bits */ +# define DMA_SCR_MSIZE_32BITS (2 << DMA_SCR_MSIZE_SHIFT) /* 10: 32-bits */ +#define DMA_SCR_PINCOS (1 << 15) /* Bit 15: Peripheral increment offset size */ +#define DMA_SCR_PL_SHIFT (16) /* Bits 16-17: Stream Priority level */ +#define DMA_SCR_PL_MASK (3 << DMA_SCR_PL_SHIFT) +# define DMA_SCR_PRILO (0 << DMA_SCR_PL_SHIFT) /* 00: Low */ +# define DMA_SCR_PRIMED (1 << DMA_SCR_PL_SHIFT) /* 01: Medium */ +# define DMA_SCR_PRIHI (2 << DMA_SCR_PL_SHIFT) /* 10: High */ +# define DMA_SCR_PRIVERYHI (3 << DMA_SCR_PL_SHIFT) /* 11: Very high */ +#define DMA_SCR_DBM (1 << 18) /* Bit 15: Double buffer mode */ +#define DMA_SCR_CT (1 << 19) /* Bit 19: Current target */ +#define DMA_SCR_PBURST_SHIFT (21) /* Bits 21-22: Peripheral burst transfer configuration */ +#define DMA_SCR_PBURST_MASK (3 << DMA_SCR_PBURST_SHIFT) +# define DMA_SCR_PBURST_SINGLE (0 << DMA_SCR_PBURST_SHIFT) /* 00: Single transfer */ +# define DMA_SCR_PBURST_INCR4 (1 << DMA_SCR_PBURST_SHIFT) /* 01: Incremental burst of 4 beats */ +# define DMA_SCR_PBURST_INCR8 (2 << DMA_SCR_PBURST_SHIFT) /* 10: Incremental burst of 8 beats */ +# define DMA_SCR_PBURST_INCR16 (3 << DMA_SCR_PBURST_SHIFT) /* 11: Incremental burst of 16 beats */ +#define DMA_SCR_MBURST_SHIFT (23) /* Bits 23-24: Memory burst transfer configuration */ +#define DMA_SCR_MBURST_MASK (3 << DMA_SCR_MBURST_SHIFT) +# define DMA_SCR_MBURST_SINGLE (0 << DMA_SCR_MBURST_SHIFT) /* 00: Single transfer */ +# define DMA_SCR_MBURST_INCR4 (1 << DMA_SCR_MBURST_SHIFT) /* 01: Incremental burst of 4 beats */ +# define DMA_SCR_MBURST_INCR8 (2 << DMA_SCR_MBURST_SHIFT) /* 10: Incremental burst of 8 beats */ +# define DMA_SCR_MBURST_INCR16 (3 << DMA_SCR_MBURST_SHIFT) /* 11: Incremental burst of 16 beats */ +#define DMA_SCR_CHSEL_SHIFT (25) /* Bits 25-28: Channel selection */ +#define DMA_SCR_CHSEL_MASK (0xf << DMA_SCR_CHSEL_SHIFT) +# define DMA_SCR_CHSEL(n) ((n) << DMA_SCR_CHSEL_SHIFT) + +#define DMA_SCR_ALLINTS (DMA_SCR_DMEIE|DMA_SCR_TEIE|DMA_SCR_HTIE|DMA_SCR_TCIE) + +/* DMA stream number of data register */ + +#define DMA_SNDTR_NDT_SHIFT (0) /* Bits 15-0: Number of data to Transfer */ +#define DMA_SNDTR_NDT_MASK (0xffff << DMA_SNDTR_NDT_SHIFT) + +/* DMA stream n FIFO control register */ + +#define DMA_SFCR_FTH_SHIFT (0) /* Bits 0-1: FIFO threshold selection */ +#define DMA_SFCR_FTH_MASK (3 << DMA_SFCR_FTH_SHIFT) +# define DMA_SFCR_FTH_QUARTER (0 << DMA_SFCR_FTH_SHIFT) /* 1/4 full FIFO */ +# define DMA_SFCR_FTH_HALF (1 << DMA_SFCR_FTH_SHIFT) /* 1/2 full FIFO */ +# define DMA_SFCR_FTH_3QUARTER (2 << DMA_SFCR_FTH_SHIFT) /* 3/4 full FIFO */ +# define DMA_SFCR_FTH_FULL (3 << DMA_SFCR_FTH_SHIFT) /* full FIFO */ +#define DMA_SFCR_DMDIS (1 << 2) /* Bit 2: Direct mode disable */ +#define DMA_SFCR_FS_SHIFT (3) /* Bits 3-5: FIFO status */ +#define DMA_SFCR_FS_MASK (7 << DMA_SFCR_FS_SHIFT) +# define DMA_SFCR_FS_QUARTER (0 << DMA_SFCR_FS_SHIFT) /* 0 < fifo_level < 1/4 */ +# define DMA_SFCR_FS_HALF (1 << DMA_SFCR_FS_SHIFT) /* 1/4 = fifo_level < 1/2 */ +# define DMA_SFCR_FS_3QUARTER (2 << DMA_SFCR_FS_SHIFT) /* 1/2 = fifo_level < 3/4 */ +# define DMA_SFCR_FS_ALMOSTFULL (3 << DMA_SFCR_FS_SHIFT) /* 3/4 = fifo_level < full */ +# define DMA_SFCR_FS_EMPTY (4 << DMA_SFCR_FS_SHIFT) /* FIFO is empty */ +# define DMA_SFCR_FS_FULL (5 << DMA_SFCR_FS_SHIFT) /* FIFO is full */ + /* Bit 6: Reserved */ +#define DMA_SFCR_FEIE (1 << 7) /* Bit 7: FIFO error interrupt enable */ + /* Bits 8-31: Reserved */ + +/* DMA Stream mapping. Each DMA stream has a mapping to several possible + * sources/sinks of data. The requests from peripherals assigned to a stream + * are simply OR'ed together before entering the DMA block. This means that only + * one request on a given stream can be enabled at once. + * + * Alternative stream selections are provided with a numeric suffix like _1, _2, etc. + * The DMA driver, however, will use the pin selection without the numeric suffix. + * Additional definitions are required in the board.h file. For example, if + * SPI3_RX connects via DMA STREAM0, then following should be application-specific + * mapping should be used: + * + * #define DMAMAP_SPI3_RX DMAMAP_SPI3_RX_1 + */ + +#define STM32_DMA_MAP(d,s,c) ((d) << 7 | (s) << 4 | (c)) +#define STM32_DMA_CONTROLLER(m) (((m) >> 7) & 1) +#define STM32_DMA_STREAM(m) (((m) >> 4) & 7) +#define STM32_DMA_CHANNEL(m) ((m) & 0xf) + +#define DMAMAP_SPI3_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN0) +#define DMAMAP_SPDIFRX_DT STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN0) +#define DMAMAP_SPI3_RX_2 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN0) +#define DMAMAP_SPI2_RX STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN0) +#define DMAMAP_SPI2_TX STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN0) +#define DMAMAP_SPI3_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN0) +#define DMAMAP_SPDIFRX_CS STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN0) +#define DMAMAP_SPI3_TX_2 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN0) + +#define DMAMAP_I2C1_RX STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN1) +#define DMAMAP_I2C3_RX STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN1) +#define DMAMAP_TIM7_UP_1 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN1) +#define DMAMAP_TIM7_UP_2 STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN1) +#define DMAMAP_I2C1_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN1) +#define DMAMAP_I2C1_TX STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN1) +#define DMAMAP_I2C1_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN1) + +#define DMAMAP_TIM4_CH1 STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN2) +#define DMAMAP_I2C4_RX STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN2) +#define DMAMAP_TIM4_CH2 STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN2) +#define DMAMAP_I2C4_TX STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN2) +#define DMAMAP_TIM4_UP STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN2) +#define DMAMAP_TIM4_CH3 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN2) + +#define DMAMAP_TIM2_UP_1 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN3) +#define DMAMAP_TIM2_CH3 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN3) +#define DMAMAP_I2C3_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN3) +#define DMAMAP_I2C3_TX STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN3) +#define DMAMAP_TIM2_CH1 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN3) +#define DMAMAP_TIM2_CH2 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN3) +#define DMAMAP_TIM2_CH4_1 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN3) +#define DMAMAP_TIM2_UP_2 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN3) +#define DMAMAP_TIM2_CH4_2 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN3) + +#define DMAMAP_UART5_RX STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN4) +#define DMAMAP_USART3_RX STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN4) +#define DMAMAP_UART4_RX STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN4) +#define DMAMAP_USART3_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN4) +#define DMAMAP_UART4_TX STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN4) +#define DMAMAP_USART2_RX STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN4) +#define DMAMAP_USART2_TX STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN4) +#define DMAMAP_UART5_TX STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN4) + +#define DMAMAP_UART8_TX STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN5) +#define DMAMAP_UART7_TX STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN5) +#define DMAMAP_TIM3_CH4 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN5) +#define DMAMAP_TIM3_UP STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN5) +#define DMAMAP_UART7_RX STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN5) +#define DMAMAP_TIM3_CH1 STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN5) +#define DMAMAP_TIM3_TRIG STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN5) +#define DMAMAP_TIM3_CH2 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN5) +#define DMAMAP_UART8_RX STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN5) +#define DMAMAP_TIM3_CH3 STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN5) + +#define DMAMAP_TIM5_CH3 STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN6) +#define DMAMAP_TIM5_UP_1 STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN6) +#define DMAMAP_TIM5_CH4_1 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN6) +#define DMAMAP_TIM5_TRIG_1 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN6) +#define DMAMAP_TIM5_CH1 STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN6) +#define DMAMAP_TIM5_CH4_2 STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN6) +#define DMAMAP_TIM5_TRIG_2 STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN6) +#define DMAMAP_TIM5_CH2 STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN6) +#define DMAMAP_TIM5_UP_2 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN6) + +#define DMAMAP_TIM6_UP STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN7) +#define DMAMAP_I2C2_RX STM32_DMA_MAP(DMA1,DMA_STREAM2,DMA_CHAN7) +#define DMAMAP_I2C2_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM3,DMA_CHAN7) +#define DMAMAP_USART3_TX_2 STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN7) +#define DMAMAP_DAC1 STM32_DMA_MAP(DMA1,DMA_STREAM5,DMA_CHAN7) +#define DMAMAP_DAC2 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN7) +#define DMAMAP_I2C2_TX STM32_DMA_MAP(DMA1,DMA_STREAM7,DMA_CHAN7) + +#define DMAMAP_I2C3_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM0,DMA_CHAN8) +#define DMAMAP_I2C4_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN8) +#define DMAMAP_I2C2_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM4,DMA_CHAN8) +#define DMAMAP_I2C4_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN8) + +#define DMAMAP_SPI2_RX_1 STM32_DMA_MAP(DMA1,DMA_STREAM1,DMA_CHAN9) +#define DMAMAP_SPI2_TX_1 STM32_DMA_MAP(DMA1,DMA_STREAM6,DMA_CHAN9) + +#define DMAMAP_ADC1_1 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN0) +#define DMAMAP_SAI1_A_1 STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN0) +#define DMAMAP_TIM8_CH1_1 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN0) +#define DMAMAP_TIM8_CH2_1 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN0) +#define DMAMAP_TIM8_CH3_1 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN0) +#define DMAMAP_SAI1_A_2 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN0) +#define DMAMAP_ADC1_2 STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN0) +#define DMAMAP_SAI1_B_1 STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN0) +#define DMAMAP_TIM1_CH1_1 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN0) +#define DMAMAP_TIM1_CH2_1 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN0) +#define DMAMAP_TIM1_CH3_1 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN0) +#define DMAMAP_SAI1_B_2 STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN0) + +#define DMAMAP_DCMI_1 STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN1) +#define DMAMAP_ADC2_1 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN1) +#define DMAMAP_ADC2_2 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN1) +#define DMAMAP_SAI1_B STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN1) +#define DMAMAP_SPI6_TX STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN1) +#define DMAMAP_SPI6_RX STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN1) +#define DMAMAP_DCMI_2 STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN1) + +#define DMAMAP_ADC3_1 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN2) +#define DMAMAP_ADC3_2 STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN2) +#define DMAMAP_SPI5_RX_1 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN2) +#define DMAMAP_SPI5_TX_1 STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN2) +#define DMAMAP_CRYP_OUT STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN2) +#define DMAMAP_CRYP_IN STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN2) +#define DMAMAP_HASH_IN STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN2) + +#define DMAMAP_SPI1_RX_1 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN3) +#define DMAMAP_SPI1_RX_2 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN3) +#define DMAMAP_SPI1_TX_1 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN3) +#define DMAMAP_SAI2_A STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN3) +#define DMAMAP_SPI1_TX_2 STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN3) +#define DMAMAP_SAI2_B STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN3) +#define DMAMAP_QUADSPI STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN3) + +#define DMAMAP_SPI4_RX_1 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN4) +#define DMAMAP_SPI4_TX_1 STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN4) +#define DMAMAP_USART1_RX_1 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN4) +#define DMAMAP_SDMMC1_1 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN4) +#define DMAMAP_USART1_RX_2 STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN4) +#define DMAMAP_SDMMC1_2 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN4) +#define DMAMAP_USART1_TX STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN4) + +#define DMAMAP_USART6_RX_1 STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN5) +#define DMAMAP_USART6_RX_2 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN5) +#define DMAMAP_SPI4_RX_2 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN5) +#define DMAMAP_SPI4_TX_2 STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN5) +#define DMAMAP_USART6_TX_1 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN5) +#define DMAMAP_USART6_TX_2 STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN5) + +#define DMAMAP_TIM1_TRIG_1 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN6) +#define DMAMAP_TIM1_CH1_2 STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN6) +#define DMAMAP_TIM1_CH2_2 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN6) +#define DMAMAP_TIM1_CH1 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN6) +#define DMAMAP_TIM1_CH4 STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN6) +#define DMAMAP_TIM1_TRIG_2 STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN6) +#define DMAMAP_TIM1_COM STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN6) +#define DMAMAP_TIM1_UP STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN6) +#define DMAMAP_TIM1_CH3_2 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN6) + +#define DMAMAP_TIM8_UP STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN7) +#define DMAMAP_TIM8_CH1_2 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN7) +#define DMAMAP_TIM8_CH2_2 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN7) +#define DMAMAP_TIM8_CH3_2 STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN7) +#define DMAMAP_SPI5_RX_2 STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN7) +#define DMAMAP_SPI5_TX_2 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN7) +#define DMAMAP_TIM8_CH4 STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN7) +#define DMAMAP_TIM8_TRIG STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN7) +#define DMAMAP_TIM8_COM STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN7) + +#define DMAMAP_DFSDM1_FLT0_1 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN8) +#define DMAMAP_DFSDM1_FLT1_1 STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN8) +#define DMAMAP_DFSDM1_FLT2_1 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN8) +#define DMAMAP_DFSDM1_FLT3_1 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN8) +#define DMAMAP_DFSDM1_FLT0_2 STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN8) +#define DMAMAP_DFSDM1_FLT1_2 STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN8) +#define DMAMAP_DFSDM1_FLT2_2 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN8) +#define DMAMAP_DFSDM1_FLT3_2 STM32_DMA_MAP(DMA2,DMA_STREAM7,DMA_CHAN8) + +#define DMAMAP_JPEG_IN_1 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN9) +#define DMAMAP_JPEG_OUT_ STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN9) +#define DMAMAP_SPI4_TX_3 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN9) +#define DMAMAP_JPEG_IN_2 STM32_DMA_MAP(DMA2,DMA_STREAM3,DMA_CHAN9) +#define DMAMAP_JPEG_OUT_2 STM32_DMA_MAP(DMA2,DMA_STREAM4,DMA_CHAN9) +#define DMAMAP_SPI5_RX_3 STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN9) + +#define DMAMAP_SAI1_B_3 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN10) +#define DMAMAP_SAI2_B_1 STM32_DMA_MAP(DMA2,DMA_STREAM1,DMA_CHAN10) +#define DMAMAP_SAI2_A_1 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN10) +#define DMAMAP_SAI1_A_3 STM32_DMA_MAP(DMA2,DMA_STREAM6,DMA_CHAN10) + +#define DMAMAP_SDMMC2_1 STM32_DMA_MAP(DMA2,DMA_STREAM0,DMA_CHAN11) +#define DMAMAP_QUADSPI_1 STM32_DMA_MAP(DMA2,DMA_STREAM2,DMA_CHAN11) +#define DMAMAP_SDMMC2_2 STM32_DMA_MAP(DMA2,DMA_STREAM5,DMA_CHAN11) + +#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ +#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XX_DMA_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_flash.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_flash.h new file mode 100644 index 00000000000..0b6f764c365 --- /dev/null +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_flash.h @@ -0,0 +1,219 @@ +/************************************************************************************ + * arch/arm/src/stm32f7/chip/stm32f74xx75xx_flash.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM327_CHIP_STM32F74XX75XX_FLASH_H +#define __ARCH_ARM_SRC_STM327_CHIP_STM32F74XX75XX_FLASH_H + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Flash size is known from the chip selection: + * + * When CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT is set the + * CONFIG_STM32F7_FLASH_CONFIG_x selects the default FLASH size based on the chip + * part number. This value can be overridden with CONFIG_STM32F7_FLASH_OVERRIDE_x + * + * Parts STM32F74xxE have 512Kb of FLASH + * Parts STM32F74xxG have 1024Kb of FLASH + * + * N.B. Only Single bank mode is supported + */ + +#define _K(x) ((x)*1024) + +#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT) && \ + !defined(CONFIG_STM32_FLASH_OVERRIDE_E) && \ + !defined(CONFIG_STM32_FLASH_OVERRIDE_F) && \ + !defined(CONFIG_STM32_FLASH_OVERRIDE_G) && \ + !defined(CONFIG_STM32_FLASH_OVERRIDE_I) && \ + !defined(CONFIG_STM32_FLASH_CONFIG_E) && \ + !defined(CONFIG_STM32_FLASH_CONFIG_F) && \ + !defined(CONFIG_STM32_FLASH_CONFIG_G) && \ + !defined(CONFIG_STM32_FLASH_CONFIG_I) +# define CONFIG_STM32_FLASH_OVERRIDE_E +# warning "Flash size not defined defaulting to 512KiB (E)" +#endif + +#if !defined(CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT) + +# undef CONFIG_STM32F7_FLASH_CONFIG_E +# undef CONFIG_STM32F7_FLASH_CONFIG_G +# undef CONFIG_STM32F7_FLASH_CONFIG_I + +# if defined(CONFIG_STM32F7_FLASH_OVERRIDE_E) + +# define CONFIG_STM32F7_FLASH_CONFIG_E + +# elif defined(CONFIG_STM32F7_FLASH_OVERRIDE_G) + +# define CONFIG_STM32F7_FLASH_CONFIG_G + +# elif defined(CONFIG_STM32F7_FLASH_OVERRIDE_I) + +# define CONFIG_STM32F7_FLASH_CONFIG_I + +# endif +#endif + +#if defined(CONFIG_STM32_FLASH_CONFIG_E) + +# define STM32_FLASH_NPAGES 6 +# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (1 * 256)) +# define STM32_FLASH_SIZES {_K(32), _K(32), _K(32), _K(32), \ + _K(128), _K(256)} + +#elif defined(CONFIG_STM32_FLASH_CONFIG_G) + +# define STM32_FLASH_NPAGES 8 +# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (3 * 256)) +# define STM32_FLASH_SIZES {_K(32), _K(32), _K(32), _K(32), \ + _K(128), _K(256), _K(256), _K(256)} + +#elif defined(CONFIG_STM32_FLASH_CONFIG_I) + +# define STM32_FLASH_NPAGES 12 +# define STM32_FLASH_SIZE _K((4 * 32) + (1 * 128) + (7 * 256)) +# define STM32_FLASH_SIZES {_K(32), _K(32), _K(32), _K(32), \ + _K(128), _K(256), _K(256), _K(256) \ + _K(256), _K(256), _K(256), _K(256)} +#endif + +/* Register Offsets *****************************************************************/ + +#define STM32_FLASH_ACR_OFFSET 0x0000 +#define STM32_FLASH_KEYR_OFFSET 0x0004 +#define STM32_FLASH_OPTKEYR_OFFSET 0x0008 +#define STM32_FLASH_SR_OFFSET 0x000c +#define STM32_FLASH_CR_OFFSET 0x0010 +#define STM32_FLASH_OPTCR_OFFSET 0x0014 +#define STM32_FLASH_OPTCR1_OFFSET 0x0018 + +/* Register Addresses ***************************************************************/ + +#define STM32_FLASH_ACR (STM32_FLASHIF_BASE+STM32_FLASH_ACR_OFFSET) +#define STM32_FLASH_KEYR (STM32_FLASHIF_BASE+STM32_FLASH_KEYR_OFFSET) +#define STM32_FLASH_OPTKEYR (STM32_FLASHIF_BASE+STM32_FLASH_OPTKEYR_OFFSET) +#define STM32_FLASH_SR (STM32_FLASHIF_BASE+STM32_FLASH_SR_OFFSET) +#define STM32_FLASH_CR (STM32_FLASHIF_BASE+STM32_FLASH_CR_OFFSET) +#define STM32_FLASH_OPTCR (STM32_FLASHIF_BASE+STM32_FLASH_OPTCR_OFFSET) +#define STM32_FLASH_OPTCR1 (STM32_FLASHIF_BASE+STM32_FLASH_OPTCR1_OFFSET) + +/* Register Bitfield Definitions ****************************************************/ +/* Flash Access Control Register (ACR) */ + +#define FLASH_ACR_LATENCY_SHIFT (0) /* Bits 0-1: Latency */ +#define FLASH_ACR_LATENCY_MASK (7 << FLASH_ACR_LATENCY_SHIFT) +# define FLASH_ACR_LATENCY(n) ((n) << FLASH_ACR_LATENCY_SHIFT) /* n wait states */ +# define FLASH_ACR_LATENCY_0 (0 << FLASH_ACR_LATENCY_SHIFT) /* 000: Zero wait states */ +# define FLASH_ACR_LATENCY_1 (1 << FLASH_ACR_LATENCY_SHIFT) /* 001: One wait state */ +# define FLASH_ACR_LATENCY_2 (2 << FLASH_ACR_LATENCY_SHIFT) /* 010: Two wait states */ +# define FLASH_ACR_LATENCY_3 (3 << FLASH_ACR_LATENCY_SHIFT) /* 011: Three wait states */ +# define FLASH_ACR_LATENCY_4 (4 << FLASH_ACR_LATENCY_SHIFT) /* 100: Four wait states */ +# define FLASH_ACR_LATENCY_5 (5 << FLASH_ACR_LATENCY_SHIFT) /* 101: Five wait states */ +# define FLASH_ACR_LATENCY_6 (6 << FLASH_ACR_LATENCY_SHIFT) /* 110: Six wait states */ +# define FLASH_ACR_LATENCY_7 (7 << FLASH_ACR_LATENCY_SHIFT) /* 111: Seven wait states */ +#define FLASH_ACR_PRFTEN (1 << 8) /* FLASH prefetch enable */ +#define FLASH_ACR_ARTEN (1 << 9) /* Bit 9: ART Accelerator Enable */ +#define FLASH_ACR_ARTRST (1 << 11) /* Bit 11: ART Accelerator reset */ + +/* Flash Status Register (SR) */ + +#define FLASH_SR_EOP (1 << 0) /* Bit 0: End of operation */ +#define FLASH_SR_OPERR (1 << 1) /* Bit 1: Operation error */ +#define FLASH_SR_WRPERR (1 << 4) /* Bit 4: Write protection error */ +#define FLASH_SR_PGAERR (1 << 5) /* Bit 5: Programming alignment error */ +#define FLASH_SR_PGPERR (1 << 6) /* Bit 6: Programming parallelism error */ +#define FLASH_SR_PGSERR (1 << 7) /* Bit 7: Programming sequence error */ +#define FLASH_SR_BSY (1 << 16) /* Bit 16: Busy */ + +/* Flash Control Register (CR) */ + +#define FLASH_CR_PG (1 << 0) /* Bit 0: Programming */ +#define FLASH_CR_SER (1 << 1) /* Bit 1: Sector Erase */ +#define FLASH_CR_MER_MER1 (1 << 2) /* Bit 2: Mass Erase sectors 0..11 */ +#define FLASH_CR_SNB_SHIFT (3) /* Bits 3-6: Sector number */ +#define FLASH_CR_SNB_MASK (0x1f << FLASH_CR_SNB_SHIFT) +# define FLASH_CR_SNB(n) ((uint32_t)((n) % 12) << FLASH_CR_SNB_SHIFT) | ((n / 12) << 7)) /* Sector n, n=0..23 */ +#define FLASH_CR_PSIZE_SHIFT (8) /* Bits 8-9: Program size */ +#define FLASH_CR_PSIZE_MASK (3 << FLASH_CR_PSIZE_SHIFT) +# define FLASH_CR_PSIZE_X8 (0 << FLASH_CR_PSIZE_SHIFT) /* Program x8 */ +# define FLASH_CR_PSIZE_X16 (1 << FLASH_CR_PSIZE_SHIFT) /* Program x16 */ +# define FLASH_CR_PSIZE_X32 (2 << FLASH_CR_PSIZE_SHIFT) /* Program x32 */ +# define FLASH_CR_PSIZE_X64 (3 << FLASH_CR_PSIZE_SHIFT) /* Program x64 */ +#define FLASH_CR_STRT (1 << 16) /* Bit 16: Start Erase */ +#define FLASH_CR_EOPIE (1 << 24) /* Bit 24: End of operation interrupt enable */ +#define FLASH_CR_ERRIE (1 << 25) /* Bit 25: Error interrupt enable */ +#define FLASH_CR_LOCK (1 << 31) /* Bit 31: Lock */ +#define FLASH_CR_MER2 (1 << 15) /* Bit 15: Mass Erase sectors 12..23 */ + +/* Flash Option Control Register (OPTCR) */ + +#define FLASH_OPTCR_OPTLOCK (1 << 0) /* Bit 0: Option lock */ +#define FLASH_OPTCR_OPTSTRT (1 << 1) /* Bit 1: Option start */ +#define FLASH_OPTCR_BORLEV_SHIFT (2) /* Bits 2-3: BOR reset Level */ +#define FLASH_OPTCR_BORLEV_MASK (3 << FLASH_OPTCR_BORLEV_SHIFT) +# define FLASH_OPTCR_VBOR3 (0 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR Level 3 */ +# define FLASH_OPTCR_VBOR2 (1 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR Level 2 */ +# define FLASH_OPTCR_VBOR1 (2 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR Level 1 */ +# define FLASH_OPTCR_VBOR0 (3 << FLASH_OPTCR_BORLEV_SHIFT) /* BOR off */ +#define FLASH_OPTCR_USER_SHIFT (4) /* Bits 5-7: User option bytes */ +#define FLASH_OPTCR_USER_MASK (15 << FLASH_OPTCR_USER_SHIFT) +# define FLASH_OPTCR_WWDG_SW (1 << 4) /* Bit 4: WWDG_SW */ +# define FLASH_OPTCR_IWDG_SW (1 << 5) /* Bit 5: IWDG_SW */ +# define FLASH_OPTCR_NRST_STOP (1 << 6) /* Bit 6: nRST_STOP */ +# define FLASH_OPTCR_NRST_STDBY (1 << 7) /* Bit 7: nRST_STDBY */ +#define FLASH_OPTCR_RDP_SHIFT (8) /* Bits 8-15: Read protect */ +#define FLASH_OPTCR_RDP_MASK (0xff << FLASH_OPTCR_RDP_SHIFT) +# define FLASH_OPTCR_RDP(n) ((uint32_t)(n) << FLASH_OPTCR_RDP_SHIFT) +#define FLASH_OPTCR_NWRP_SHIFT (16) /* Bits 16-27: Not write protect */ +#define FLASH_OPTCR_NWRP_MASK (0xfff << FLASH_OPTCR_NWRP_SHIFT) +# define FLASH_OPTCR_NWRP(n) ((uint32_t)(n) << FLASH_OPTCR_NWRP_SHIFT) +#define FLASH_OPTCR_NDBANK (1 << 28) /* Bit 28: Not dual bank mode */ +#define FLASH_OPTCR_NDBOOT (1 << 29) /* Bit 29: Dual Boot mode */ +#define FLASH_OPTCR_IWDG_STDBY (1 << 30) /* Bit 30: IWDG freeze in stop mode */ +#define FLASH_OPTCR_IWDG_STOP (1 << 31) /* Bit 31: IWDG freeze in standby mode */ + +/* Flash Option Control Register (OPTCR1) */ + +#define FLASH_OPTCR1_BOOTADD0_SHIFT (0) /* Bits 0-15: Boot base address when Boot pin=0 */ +#define FLASH_OPTCR1_BOOTADD0_MASK (0xffff << FLASH_OPTCR1_BOOTADD0_SHIFT) +# define FLASH_OPTCR1_BOOTADD0(n) ((uint32_t)(n) << FLASH_OPTCR1_BOOTADD0_SHIFT) +#define FLASH_OPTCR1_BOOTADD1_SHIFT (16) /* Bits 16-31:Boot base address when Boot pin=1 */ +#define FLASH_OPTCR1_BOOTADD1_MASK (0xffff << FLASH_OPTCR1_BOOTADD1_SHIFT) +# define FLASH_OPTCR1_BOOTADD1(n) ((uint32_t)(n) << FLASH_OPTCR1_BOOTADD1_SHIFT) + +#endif /* __ARCH_ARM_SRC_STM327_CHIP_STM32F74XX75XX_FLASH_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_gpio.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_gpio.h new file mode 100644 index 00000000000..711dc0e1247 --- /dev/null +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_gpio.h @@ -0,0 +1,404 @@ +/************************************************************************************ + * arch/arm/src/stm32f7/chip/stm32f76xxx77xx_gpio.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_GPIO_H +#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_GPIO_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Register Offsets *****************************************************************/ + +#define STM32_GPIO_MODER_OFFSET 0x0000 /* GPIO port mode register */ +#define STM32_GPIO_OTYPER_OFFSET 0x0004 /* GPIO port output type register */ +#define STM32_GPIO_OSPEED_OFFSET 0x0008 /* GPIO port output speed register */ +#define STM32_GPIO_PUPDR_OFFSET 0x000c /* GPIO port pull-up/pull-down register */ +#define STM32_GPIO_IDR_OFFSET 0x0010 /* GPIO port input data register */ +#define STM32_GPIO_ODR_OFFSET 0x0014 /* GPIO port output data register */ +#define STM32_GPIO_BSRR_OFFSET 0x0018 /* GPIO port bit set/reset register */ +#define STM32_GPIO_LCKR_OFFSET 0x001c /* GPIO port configuration lock register */ +#define STM32_GPIO_AFRL_OFFSET 0x0020 /* GPIO alternate function low register */ +#define STM32_GPIO_AFRH_OFFSET 0x0024 /* GPIO alternate function high register */ + +/* Register Addresses ***************************************************************/ + +#if STM32F7_NGPIO > 0 +# define STM32_GPIOA_MODER (STM32_GPIOA_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOA_OTYPER (STM32_GPIOA_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOA_OSPEED (STM32_GPIOA_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOA_PUPDR (STM32_GPIOA_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOA_IDR (STM32_GPIOA_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOA_ODR (STM32_GPIOA_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOA_BSRR (STM32_GPIOA_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOA_LCKR (STM32_GPIOA_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOA_AFRL (STM32_GPIOA_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOA_AFRH (STM32_GPIOA_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 1 +# define STM32_GPIOB_MODER (STM32_GPIOB_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOB_OTYPER (STM32_GPIOB_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOB_OSPEED (STM32_GPIOB_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOB_PUPDR (STM32_GPIOB_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOB_IDR (STM32_GPIOB_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOB_ODR (STM32_GPIOB_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOB_BSRR (STM32_GPIOB_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOB_LCKR (STM32_GPIOB_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOB_AFRL (STM32_GPIOB_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOB_AFRH (STM32_GPIOB_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 2 +# define STM32_GPIOC_MODER (STM32_GPIOC_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOC_OTYPER (STM32_GPIOC_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOC_OSPEED (STM32_GPIOC_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOC_PUPDR (STM32_GPIOC_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOC_IDR (STM32_GPIOC_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOC_ODR (STM32_GPIOC_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOC_BSRR (STM32_GPIOC_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOC_LCKR (STM32_GPIOC_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOC_AFRL (STM32_GPIOC_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOC_AFRH (STM32_GPIOC_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 3 +# define STM32_GPIOD_MODER (STM32_GPIOD_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOD_OTYPER (STM32_GPIOD_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOD_OSPEED (STM32_GPIOD_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOD_PUPDR (STM32_GPIOD_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOD_IDR (STM32_GPIOD_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOD_ODR (STM32_GPIOD_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOD_BSRR (STM32_GPIOD_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOD_LCKR (STM32_GPIOD_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOD_AFRL (STM32_GPIOD_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOD_AFRH (STM32_GPIOD_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 4 +# define STM32_GPIOE_MODER (STM32_GPIOE_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOE_OTYPER (STM32_GPIOE_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOE_OSPEED (STM32_GPIOE_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOE_PUPDR (STM32_GPIOE_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOE_IDR (STM32_GPIOE_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOE_ODR (STM32_GPIOE_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOE_BSRR (STM32_GPIOE_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOE_LCKR (STM32_GPIOE_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOE_AFRL (STM32_GPIOE_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOE_AFRH (STM32_GPIOE_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 5 +# define STM32_GPIOF_MODER (STM32_GPIOF_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOF_OTYPER (STM32_GPIOF_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOF_OSPEED (STM32_GPIOF_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOF_PUPDR (STM32_GPIOF_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOF_IDR (STM32_GPIOF_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOF_ODR (STM32_GPIOF_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOF_BSRR (STM32_GPIOF_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOF_LCKR (STM32_GPIOF_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOF_AFRL (STM32_GPIOF_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOF_AFRH (STM32_GPIOF_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 6 +# define STM32_GPIOG_MODER (STM32_GPIOG_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOG_OTYPER (STM32_GPIOG_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOG_OSPEED (STM32_GPIOG_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOG_PUPDR (STM32_GPIOG_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOG_IDR (STM32_GPIOG_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOG_ODR (STM32_GPIOG_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOG_BSRR (STM32_GPIOG_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOG_LCKR (STM32_GPIOG_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOG_AFRL (STM32_GPIOG_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOG_AFRH (STM32_GPIOG_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 7 +# define STM32_GPIOH_MODER (STM32_GPIOH_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOH_OTYPER (STM32_GPIOH_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOH_OSPEED (STM32_GPIOH_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOH_PUPDR (STM32_GPIOH_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOH_IDR (STM32_GPIOH_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOH_ODR (STM32_GPIOH_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOH_BSRR (STM32_GPIOH_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOH_LCKR (STM32_GPIOH_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOH_AFRL (STM32_GPIOH_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOH_AFRH (STM32_GPIOH_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 8 +# define STM32_GPIOI_MODER (STM32_GPIOI_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOI_OTYPER (STM32_GPIOI_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOI_OSPEED (STM32_GPIOI_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOI_PUPDR (STM32_GPIOI_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOI_IDR (STM32_GPIOI_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOI_ODR (STM32_GPIOI_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOI_BSRR (STM32_GPIOI_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOI_LCKR (STM32_GPIOI_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOI_AFRL (STM32_GPIOI_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOI_AFRH (STM32_GPIOI_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 9 +# define STM32_GPIOJ_MODER (STM32_GPIOJ_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOJ_OTYPER (STM32_GPIOJ_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOJ_OSPEED (STM32_GPIOJ_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOJ_PUPDR (STM32_GPIOJ_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOJ_IDR (STM32_GPIOJ_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOJ_ODR (STM32_GPIOJ_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOJ_BSRR (STM32_GPIOJ_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOJ_LCKR (STM32_GPIOJ_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOJ_AFRL (STM32_GPIOJ_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOJ_AFRH (STM32_GPIOJ_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +#if STM32F7_NGPIO > 10 +# define STM32_GPIOK_MODER (STM32_GPIOK_BASE+STM32_GPIO_MODER_OFFSET) +# define STM32_GPIOK_OTYPER (STM32_GPIOK_BASE+STM32_GPIO_OTYPER_OFFSET) +# define STM32_GPIOK_OSPEED (STM32_GPIOK_BASE+STM32_GPIO_OSPEED_OFFSET) +# define STM32_GPIOK_PUPDR (STM32_GPIOK_BASE+STM32_GPIO_PUPDR_OFFSET) +# define STM32_GPIOK_IDR (STM32_GPIOK_BASE+STM32_GPIO_IDR_OFFSET) +# define STM32_GPIOK_ODR (STM32_GPIOK_BASE+STM32_GPIO_ODR_OFFSET) +# define STM32_GPIOK_BSRR (STM32_GPIOK_BASE+STM32_GPIO_BSRR_OFFSET) +# define STM32_GPIOK_LCKR (STM32_GPIOK_BASE+STM32_GPIO_LCKR_OFFSET) +# define STM32_GPIOK_AFRL (STM32_GPIOK_BASE+STM32_GPIO_AFRL_OFFSET) +# define STM32_GPIOK_AFRH (STM32_GPIOK_BASE+STM32_GPIO_AFRH_OFFSET) +#endif + +/* Register Bitfield Definitions ****************************************************/ + +/* GPIO port mode register */ + +#define GPIO_MODER_INPUT (0) /* Input */ +#define GPIO_MODER_OUTPUT (1) /* General purpose output mode */ +#define GPIO_MODER_ALT (2) /* Alternate mode */ +#define GPIO_MODER_ANALOG (3) /* Analog mode */ + +#define GPIO_MODER_SHIFT(n) ((n) << 1) +#define GPIO_MODER_MASK(n) (3 << GPIO_MODER_SHIFT(n)) + +#define GPIO_MODER0_SHIFT (0) +#define GPIO_MODER0_MASK (3 << GPIO_MODER0_SHIFT) +#define GPIO_MODER1_SHIFT (2) +#define GPIO_MODER1_MASK (3 << GPIO_MODER1_SHIFT) +#define GPIO_MODER2_SHIFT (4) +#define GPIO_MODER2_MASK (3 << GPIO_MODER2_SHIFT) +#define GPIO_MODER3_SHIFT (6) +#define GPIO_MODER3_MASK (3 << GPIO_MODER3_SHIFT) +#define GPIO_MODER4_SHIFT (8) +#define GPIO_MODER4_MASK (3 << GPIO_MODER4_SHIFT) +#define GPIO_MODER5_SHIFT (10) +#define GPIO_MODER5_MASK (3 << GPIO_MODER5_SHIFT) +#define GPIO_MODER6_SHIFT (12) +#define GPIO_MODER6_MASK (3 << GPIO_MODER6_SHIFT) +#define GPIO_MODER7_SHIFT (14) +#define GPIO_MODER7_MASK (3 << GPIO_MODER7_SHIFT) +#define GPIO_MODER8_SHIFT (16) +#define GPIO_MODER8_MASK (3 << GPIO_MODER8_SHIFT) +#define GPIO_MODER9_SHIFT (18) +#define GPIO_MODER9_MASK (3 << GPIO_MODER9_SHIFT) +#define GPIO_MODER10_SHIFT (20) +#define GPIO_MODER10_MASK (3 << GPIO_MODER10_SHIFT) +#define GPIO_MODER11_SHIFT (22) +#define GPIO_MODER11_MASK (3 << GPIO_MODER11_SHIFT) +#define GPIO_MODER12_SHIFT (24) +#define GPIO_MODER12_MASK (3 << GPIO_MODER12_SHIFT) +#define GPIO_MODER13_SHIFT (26) +#define GPIO_MODER13_MASK (3 << GPIO_MODER13_SHIFT) +#define GPIO_MODER14_SHIFT (28) +#define GPIO_MODER14_MASK (3 << GPIO_MODER14_SHIFT) +#define GPIO_MODER15_SHIFT (30) +#define GPIO_MODER15_MASK (3 << GPIO_MODER15_SHIFT) + +/* GPIO port output type register */ + +#define GPIO_OTYPER_OD(n) (1 << (n)) /* 1=Output open-drain */ +#define GPIO_OTYPER_PP(n) (0) /* 0=Ouput push-pull */ + +/* GPIO port output speed register */ + +#define GPIO_OSPEED_2MHz (0) /* 2 MHz Low speed */ +#define GPIO_OSPEED_25MHz (1) /* 25 MHz Medium speed */ +#define GPIO_OSPEED_50MHz (2) /* 50 MHz Fast speed */ +#define GPIO_OSPEED_100MHz (3) /* 100 MHz High speed on 30 pF (80 MHz Output max speed on 15 pF) */ + +#define GPIO_OSPEED_SHIFT(n) ((n) << 1) +#define GPIO_OSPEED_MASK(n) (3 << GPIO_OSPEED_SHIFT(n)) + +#define GPIO_OSPEED0_SHIFT (0) +#define GPIO_OSPEED0_MASK (3 << GPIO_OSPEED0_SHIFT) +#define GPIO_OSPEED1_SHIFT (2) +#define GPIO_OSPEED1_MASK (3 << GPIO_OSPEED1_SHIFT) +#define GPIO_OSPEED2_SHIFT (4) +#define GPIO_OSPEED2_MASK (3 << GPIO_OSPEED2_SHIFT) +#define GPIO_OSPEED3_SHIFT (6) +#define GPIO_OSPEED3_MASK (3 << GPIO_OSPEED3_SHIFT) +#define GPIO_OSPEED4_SHIFT (8) +#define GPIO_OSPEED4_MASK (3 << GPIO_OSPEED4_SHIFT) +#define GPIO_OSPEED5_SHIFT (10) +#define GPIO_OSPEED5_MASK (3 << GPIO_OSPEED5_SHIFT) +#define GPIO_OSPEED6_SHIFT (12) +#define GPIO_OSPEED6_MASK (3 << GPIO_OSPEED6_SHIFT) +#define GPIO_OSPEED7_SHIFT (14) +#define GPIO_OSPEED7_MASK (3 << GPIO_OSPEED7_SHIFT) +#define GPIO_OSPEED8_SHIFT (16) +#define GPIO_OSPEED8_MASK (3 << GPIO_OSPEED8_SHIFT) +#define GPIO_OSPEED9_SHIFT (18) +#define GPIO_OSPEED9_MASK (3 << GPIO_OSPEED9_SHIFT) +#define GPIO_OSPEED10_SHIFT (20) +#define GPIO_OSPEED10_MASK (3 << GPIO_OSPEED10_SHIFT) +#define GPIO_OSPEED11_SHIFT (22) +#define GPIO_OSPEED11_MASK (3 << GPIO_OSPEED11_SHIFT) +#define GPIO_OSPEED12_SHIFT (24) +#define GPIO_OSPEED12_MASK (3 << GPIO_OSPEED12_SHIFT) +#define GPIO_OSPEED13_SHIFT (26) +#define GPIO_OSPEED13_MASK (3 << GPIO_OSPEED13_SHIFT) +#define GPIO_OSPEED14_SHIFT (28) +#define GPIO_OSPEED14_MASK (3 << GPIO_OSPEED14_SHIFT) +#define GPIO_OSPEED15_SHIFT (30) +#define GPIO_OSPEED15_MASK (3 << GPIO_OSPEED15_SHIFT) + +/* GPIO port pull-up/pull-down register */ + +#define GPIO_PUPDR_NONE (0) /* No pull-up, pull-down */ +#define GPIO_PUPDR_PULLUP (1) /* Pull-up */ +#define GPIO_PUPDR_PULLDOWN (2) /* Pull-down */ + +#define GPIO_PUPDR_SHIFT(n) ((n) << 1) +#define GPIO_PUPDR_MASK(n) (3 << GPIO_PUPDR_SHIFT(n)) + +#define GPIO_PUPDR0_SHIFT (0) +#define GPIO_PUPDR0_MASK (3 << GPIO_PUPDR0_SHIFT) +#define GPIO_PUPDR1_SHIFT (2) +#define GPIO_PUPDR1_MASK (3 << GPIO_PUPDR1_SHIFT) +#define GPIO_PUPDR2_SHIFT (4) +#define GPIO_PUPDR2_MASK (3 << GPIO_PUPDR2_SHIFT) +#define GPIO_PUPDR3_SHIFT (6) +#define GPIO_PUPDR3_MASK (3 << GPIO_PUPDR3_SHIFT) +#define GPIO_PUPDR4_SHIFT (8) +#define GPIO_PUPDR4_MASK (3 << GPIO_PUPDR4_SHIFT) +#define GPIO_PUPDR5_SHIFT (10) +#define GPIO_PUPDR5_MASK (3 << GPIO_PUPDR5_SHIFT) +#define GPIO_PUPDR6_SHIFT (12) +#define GPIO_PUPDR6_MASK (3 << GPIO_PUPDR6_SHIFT) +#define GPIO_PUPDR7_SHIFT (14) +#define GPIO_PUPDR7_MASK (3 << GPIO_PUPDR7_SHIFT) +#define GPIO_PUPDR8_SHIFT (16) +#define GPIO_PUPDR8_MASK (3 << GPIO_PUPDR8_SHIFT) +#define GPIO_PUPDR9_SHIFT (18) +#define GPIO_PUPDR9_MASK (3 << GPIO_PUPDR9_SHIFT) +#define GPIO_PUPDR10_SHIFT (20) +#define GPIO_PUPDR10_MASK (3 << GPIO_PUPDR10_SHIFT) +#define GPIO_PUPDR11_SHIFT (22) +#define GPIO_PUPDR11_MASK (3 << GPIO_PUPDR11_SHIFT) +#define GPIO_PUPDR12_SHIFT (24) +#define GPIO_PUPDR12_MASK (3 << GPIO_PUPDR12_SHIFT) +#define GPIO_PUPDR13_SHIFT (26) +#define GPIO_PUPDR13_MASK (3 << GPIO_PUPDR13_SHIFT) +#define GPIO_PUPDR14_SHIFT (28) +#define GPIO_PUPDR14_MASK (3 << GPIO_PUPDR14_SHIFT) +#define GPIO_PUPDR15_SHIFT (30) +#define GPIO_PUPDR15_MASK (3 << GPIO_PUPDR15_SHIFT) + +/* GPIO port input data register */ + +#define GPIO_IDR(n) (1 << (n)) + +/* GPIO port output data register */ + +#define GPIO_ODR(n) (1 << (n)) + +/* GPIO port bit set/reset register */ + +#define GPIO_BSRR_SET(n) (1 << (n)) +#define GPIO_BSRR_RESET(n) (1 << ((n)+16)) + +/* GPIO port configuration lock register */ + +#define GPIO_LCKR(n) (1 << (n)) +#define GPIO_LCKK (1 << 16) /* Lock key */ + +/* GPIO alternate function low/high register */ + +#define GPIO_AFR_SHIFT(n) ((n) << 2) +#define GPIO_AFR_MASK(n) (15 << GPIO_AFR_SHIFT(n)) + +#define GPIO_AFRL0_SHIFT (0) +#define GPIO_AFRL0_MASK (15 << GPIO_AFRL0_SHIFT) +#define GPIO_AFRL1_SHIFT (4) +#define GPIO_AFRL1_MASK (15 << GPIO_AFRL1_SHIFT) +#define GPIO_AFRL2_SHIFT (8) +#define GPIO_AFRL2_MASK (15 << GPIO_AFRL2_SHIFT) +#define GPIO_AFRL3_SHIFT (12) +#define GPIO_AFRL3_MASK (15 << GPIO_AFRL3_SHIFT) +#define GPIO_AFRL4_SHIFT (16) +#define GPIO_AFRL4_MASK (15 << GPIO_AFRL4_SHIFT) +#define GPIO_AFRL5_SHIFT (20) +#define GPIO_AFRL5_MASK (15 << GPIO_AFRL5_SHIFT) +#define GPIO_AFRL6_SHIFT (24) +#define GPIO_AFRL6_MASK (15 << GPIO_AFRL6_SHIFT) +#define GPIO_AFRL7_SHIFT (28) +#define GPIO_AFRL7_MASK (15 << GPIO_AFRL7_SHIFT) + +#define GPIO_AFRH8_SHIFT (0) +#define GPIO_AFRH8_MASK (15 << GPIO_AFRH8_SHIFT) +#define GPIO_AFRH9_SHIFT (4) +#define GPIO_AFRH9_MASK (15 << GPIO_AFRH9_SHIFT) +#define GPIO_AFRH10_SHIFT (8) +#define GPIO_AFRH10_MASK (15 << GPIO_AFRH10_SHIFT) +#define GPIO_AFRH11_SHIFT (12) +#define GPIO_AFRH11_MASK (15 << GPIO_AFRH11_SHIFT) +#define GPIO_AFRH12_SHIFT (16) +#define GPIO_AFRH12_MASK (15 << GPIO_AFRH12_SHIFT) +#define GPIO_AFRH13_SHIFT (20) +#define GPIO_AFRH13_MASK (15 << GPIO_AFRH13_SHIFT) +#define GPIO_AFRH14_SHIFT (24) +#define GPIO_AFRH14_MASK (15 << GPIO_AFRH14_SHIFT) +#define GPIO_AFRH15_SHIFT (28) +#define GPIO_AFRH15_MASK (15 << GPIO_AFRH15_SHIFT) + +#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ +#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_GPIO_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h new file mode 100644 index 00000000000..204311e0003 --- /dev/null +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_memorymap.h @@ -0,0 +1,214 @@ +/************************************************************************************ + * arch/arm/src/stm3fr2/chip/stm32f76xxx77xxx_memorymap.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XXX_MEMORYMAP_H +#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XXX_MEMORYMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* STM32F40XXX Address Blocks *******************************************************/ + +#define STM32_CODE_BASE 0x00000000 /* 0x00000000-0x1fffffff: 512Mb code block */ +#define STM32_SRAM_BASE 0x20000000 /* 0x20000000-0x3fffffff: 512Mb sram block */ +#define STM32_PERIPH_BASE 0x40000000 /* 0x40000000-0x5fffffff: 512Mb AHB1-2 peripheral blocks */ +#define STM32_FSMC_BASE12 0x60000000 /* 0x60000000-0x7fffffff: 512Mb FSMC bank1&2 block */ +# define STM32_FSMC_BANK1 0x60000000 /* 0x60000000-0x6fffffff: 256Mb NOR/SRAM */ +# define STM32_FSMC_BANK2 0x70000000 /* 0x70000000-0x7fffffff: 256Mb NAND FLASH */ +#define STM32_FSMC_BASE34 0x80000000 /* 0x80000000-0x8fffffff: 512Mb FSMC bank3&4 block */ +# define STM32_FSMC_BANK3 0x80000000 /* 0x80000000-0x8fffffff: 256Mb NAND FLASH */ +# define STM32_FSMC_BANK4 0x90000000 /* 0x90000000-0x9fffffff: 256Mb PC CARD */ +#define STM32_FSMC_BASE5 0xc0000000 /* 0xc0000000-0xcfffffff: 256Mb FSMC */ +#define STM32_FSMC_BASE6 0xd0000000 /* 0xd0000000-0xdfffffff: 256Mb FSMC */ +#define STM32_CORTEX_BASE 0xe0000000 /* 0xe0000000-0xffffffff: 512Mb Cortex-M7 block */ + +#define STM32_REGION_MASK 0xf0000000 +#define STM32_IS_SRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_SRAM_BASE) +#define STM32_IS_EXTSRAM(a) ((((uint32_t)(a)) & STM32_REGION_MASK) == STM32_FSMC_BANK1) + +/* Code Base Addresses **************************************************************/ + +#define STM32_BOOT_BASE 0x00000000 /* 0x00000000-0x000fffff: Aliased boot memory */ +#define STM32_INSTRAM_BASE 0x00000000 /* 0x00000000-0x00003fff: Instruction RAM (ITCM-RAM) */ +#define STM32_SYSMEM_ICTM 0x00100000 /* 0x00100000-0x0010edbf: System memory (ITCM) */ +#define STM32_FLASH_ITCM 0x00200000 /* 0x00200000-0x003fffff: FLASH memory (ITCM) */ +#define STM32_LOADER_BASE 0x01000000 /* 0x01000000- Bootloader */ +#define STM32_FLASH_AXIM 0x08000000 /* 0x08000000-0x081fffff: FLASH memory (AXIM) */ +#define STM32_OPTIONS_BASE 0x1fff0000 /* 0x1ff00000-0x1fff001f: OTP (AXIM) */ + +/* Information Addresses ************************************************************/ + + +#define STM32_SYSMEM_AXIM 0x1ff00000 /* 0x1ff00000-0x1ff0edbf: System memory (AXIM) */ +#define STM32_OTP_ICTM 0x0010f000 /* 0x0010f000-0x0010edbf: OTP (ITCM) */ +#define STM32_OTP_AXIM 0x1ff0f000 /* 0x1ff00000-0x1ff0f41f: OTP (AXIM) */ + +/* SRAM Base Addresses **************************************************************/ + +#define STM32_DTCRAM_BASE 0x20000000 /* 0x20000000-0x2001ffff: DTCM-RAM on TCM interface */ +#define STM32_SRAM1_BASE 0x20020000 /* 0x20020000-0x2007bfff: System SRAM1 */ +#define STM32_SRAM2_BASE 0x2007c000 /* 0x2007c000-0x2007ffff: System SRAM2 */ + +/* Peripheral Base Addresses ********************************************************/ + +#define STM32_APB1_BASE 0x40000000 /* 0x40000000-0x40007fff: APB1 */ +#define STM32_APB2_BASE 0x40010000 /* 0x40010000-0x40016bff: APB2 */ +#define STM32_AHB1_BASE 0x40020000 /* 0x40020000-0x4007ffff: APB1 */ +#define STM32_AHB2_BASE 0x50000000 /* 0x50000000-0x5003ffff: AHB2 */ +#define STM32_AHB3_BASE 0x60000000 /* 0x60000000-0xdfffffff: AHB3 */ + +/* APB1 Base Addresses **************************************************************/ + +#define STM32_TIM2_BASE 0x40000000 /* 0x40000000-0x400003ff: TIM2 */ +#define STM32_TIM3_BASE 0x40000400 /* 0x40000400-0x400007ff: TIM3 */ +#define STM32_TIM4_BASE 0x40000800 /* 0x40000800-0x40000bff: TIM4 */ +#define STM32_TIM5_BASE 0x40000c00 /* 0x40000c00-0x40000fff: TIM5 */ +#define STM32_TIM6_BASE 0x40001000 /* 0x40001000-0x400013ff: TIM6 */ +#define STM32_TIM7_BASE 0x40001400 /* 0x40001400-0x400017ff: TIM7 */ +#define STM32_TIM12_BASE 0x40001800 /* 0x40001800-0x40001bff: TIM12 */ +#define STM32_TIM13_BASE 0x40001c00 /* 0x40001c00-0x40001fff: TIM13 */ +#define STM32_TIM14_BASE 0x40002000 /* 0x40002000-0x400023ff: TIM14 */ +#define STM32_LPTIM1_BASE 0x40002400 /* 0x40002400-0x400027ff: LPTIM1 */ +#define STM32_RTC_BASE 0x40002800 /* 0x40002800-0x40002bff: RTC & BKP Registers */ +#define STM32_BKP_BASE 0x40002800 /* 0x40002800-0x40002bff: RTC & BKP Registers */ +#define STM32_WWDG_BASE 0x40002c00 /* 0x40002c00-0x40002fff: WWDG */ +#define STM32_IWDG_BASE 0x40003000 /* 0x40003000-0x400033ff: IWDG */ +#define STM32_CAN3_BASE 0x40003400 /* 0x40003400-0x400037ff: CAN3 */ +#define STM32_SPI2_BASE 0x40003800 /* 0x40003800-0x40003bff: SPI2 / I2S2 */ +#define STM32_I2S2_BASE 0x40003800 /* 0x40003800-0x40003bff: SPI2 / I2S2 */ +#define STM32_SPI3_BASE 0x40003c00 /* 0x40003c00-0x40003fff: SPI3 / I2S3 */ +#define STM32_I2S3_BASE 0x40003c00 /* 0x40003c00-0x40003fff: SPI3 / I2S3 */ +#define STM32_SPDIFRX_BASE 0x40004000 /* 0x40004000-0x400043ff: SPDIFRX */ +#define STM32_USART2_BASE 0x40004400 /* 0x40004400-0x400047ff: USART2 */ +#define STM32_USART3_BASE 0x40004800 /* 0x40004800-0x40004bff: USART3 */ +#define STM32_UART4_BASE 0x40004c00 /* 0x40004c00-0x40004fff: UART4 */ +#define STM32_UART5_BASE 0x40005000 /* 0x40005000-0x400053ff: UART5 */ +#define STM32_I2C1_BASE 0x40005400 /* 0x40005400-0x400057ff: I2C1 */ +#define STM32_I2C2_BASE 0x40005800 /* 0x40005800-0x40005bff: I2C2 */ +#define STM32_I2C3_BASE 0x40005c00 /* 0x40005c00-0x40005fff: I2C3 */ +#define STM32_I2C4_BASE 0x40006000 /* 0x40006000-0x400063ff: I2C4 */ +#define STM32_CAN1_BASE 0x40006400 /* 0x40006400-0x400067ff: CAN1 */ +#define STM32_CAN2_BASE 0x40006800 /* 0x40006800-0x40006bff: CAN2 */ +#define STM32_HDMICEC_BASE 0x40006c00 /* 0x40006c00-0x40006fff: HDMI-CEC */ +#define STM32_PWR_BASE 0x40007000 /* 0x40007000-0x400073ff: PWR */ +#define STM32_DAC_BASE 0x40007400 /* 0x40007400-0x400077ff: DAC */ +#define STM32_UART7_BASE 0x40007800 /* 0x40007800-0x40007bff: UART7 */ +#define STM32_UART8_BASE 0x40007c00 /* 0x40007c00-0x40007fff: UART8 */ + +/* APB2 Base Addresses **************************************************************/ + +#define STM32_TIM1_BASE 0x40010000 /* 0x40010000-0x400103ff: TIM1 */ +#define STM32_TIM8_BASE 0x40010400 /* 0x40010400-0x400107ff: TIM8 */ +#define STM32_USART1_BASE 0x40011000 /* 0x40011000-0x400113ff: USART1 */ +#define STM32_USART6_BASE 0x40011400 /* 0x40011400-0x400117ff: USART6 */ +#define STM32_SDMMC2_BASE 0x40011c00 /* 0x40011c00-0x40011fff: SDMMC2 */ +#define STM32_ADC_BASE 0x40012000 /* 0x40012000-0x400123ff: ADC1 - ADC2 - ADC3 */ +#define STM32_SDMMC1_BASE 0x40012c00 /* 0x40012c00-0x40012fff: SDMMC1 */ +#define STM32_SPI1_BASE 0x40013000 /* 0x40013000-0x400133ff: SPI1 */ +#define STM32_SPI4_BASE 0x40013400 /* 0x40013400-0x400137ff: SPI4 */ +#define STM32_SYSCFG_BASE 0x40013800 /* 0x40013800-0x40013bff: SYSCFG */ +#define STM32_EXTI_BASE 0x40013c00 /* 0x40013c00-0x40013fff: EXTI */ +#define STM32_TIM9_BASE 0x40014000 /* 0x40014000-0x400143ff: TIM9 */ +#define STM32_TIM10_BASE 0x40014400 /* 0x40014400-0x400147ff: TIM10 */ +#define STM32_TIM11_BASE 0x40014800 /* 0x40014800-0x40014bff: TIM11 */ +#define STM32_SPI5_BASE 0x40015000 /* 0x40015000-0x400153ff: SPI5 */ +#define STM32_SPI6_BASE 0x40015400 /* 0x40015400-0x400157ff: SPI6 */ +#define STM32_SAI1_BASE 0x40015800 /* 0x40015800-0x40015bff: SAI1 */ +#define STM32_SAI2_BASE 0x40015c00 /* 0x40015c00-0x40015fff: SAI2 */ +#define STM32_LCDTFT_BASE 0x40016800 /* 0x40016800-0x40016bff: LCD-TFT */ +#define STM32_DSIHOST_BASE 0x40016c00 /* 0x40016c00-0x400173ff: DSI Host */ +#define STM32_DFSDM1_BASE 0x40017400 /* 0x40017400-0x400174ff: DFSDM1 */ +#define STM32_MDIOS_BASE 0x40017800 /* 0x40017800-0x40017bff: MDIOS */ + +/* AHB1 Base Addresses **************************************************************/ + +#define STM32_GPIOA_BASE 0x40020000 /* 0x40020000-0x400203ff: GPIOA */ +#define STM32_GPIOB_BASE 0x40020400 /* 0x40020400-0x400207ff: GPIOB */ +#define STM32_GPIOC_BASE 0x40020800 /* 0x40020800-0x40020bff: GPIOC */ +#define STM32_GPIOD_BASE 0x40020c00 /* 0x40020c00-0x40020fff: GPIOD */ +#define STM32_GPIOE_BASE 0x40021000 /* 0x40021000-0x400213ff: GPIOE */ +#define STM32_GPIOF_BASE 0x40021400 /* 0x40021400-0x400217ff: GPIOF */ +#define STM32_GPIOG_BASE 0x40021800 /* 0x40021800-0x40021bff: GPIOG */ +#define STM32_GPIOH_BASE 0x40021c00 /* 0x40021c00-0x40021fff: GPIOH */ +#define STM32_GPIOI_BASE 0x40022000 /* 0x40022000-0x400223ff: GPIOI */ +#define STM32_GPIOJ_BASE 0x40022400 /* 0x40022400-0x400227ff: GPIOJ */ +#define STM32_GPIOK_BASE 0x40022800 /* 0x40022800-0x40022bff: GPIOK */ +#define STM32_CRC_BASE 0x40023000 /* 0x40023000-0x400233ff: CRC */ +#define STM32_RCC_BASE 0x40023800 /* 0x40023800-0x40023bff: RCC */ +#define STM32_FLASHIF_BASE 0x40023c00 /* 0x40023c00-0x40023fff: Flash interface */ +#define STM32_BKPSRAM_BASE 0x40024000 /* 0x40024000-0x40024fff: BKPSRAM */ +#define STM32_DMA1_BASE 0x40026000 /* 0x40026000-0x400263ff: DMA1 */ +#define STM32_DMA2_BASE 0x40026400 /* 0x40026400-0x400267ff: DMA2 */ +#define STM32_ETHMAC_BASE 0x40028000 /* 0x40028000-0x400293ff: ETHERNET MAC */ +#define STM32_DMA2D_BASE 0x4002b000 /* 0x4002b000-0x4002Bbff: Chrom-ART (DMA2D) */ +#define STM32_USBOTGHS_BASE 0x40040000 /* 0x40040000-0x4007ffff: USB OTG HS */ + +/* AHB2 Base Addresses **************************************************************/ + +#define STM32_USBOTGFS_BASE 0x50000000 /* 0x50000000-0x5003ffff: USB OTG FS */ +#define STM32_DCMI_BASE 0x50050000 /* 0x50050000-0x500503ff: DCMI */ +#define STM32_JPEG_BASE 0x50051000 /* 0x50051000-0x500511ff: JPEG */ +#define STM32_CRYP_BASE 0x50060000 /* 0x50060000-0x500603ff: CRYP */ +#define STM32_HASH_BASE 0x50060400 /* 0x50060400-0x500607ff: HASH */ +#define STM32_RNG_BASE 0x50060800 /* 0x50060800-0x50060bff: RNG */ + +/* AHB3 Base Addresses **************************************************************/ + +#define STM32_FMCBANK1_BASE 0x60000000 /* 0x60000000-0x6fffffff: FMC bank 1 */ +#define STM32_FMCBANK2_BASE 0x70000000 /* 0x70000000-0x7fffffff: FMC bank 2 */ +#define STM32_FMCBANK3_BASE 0x80000000 /* 0x80000000-0x8fffffff: FMC bank 3 */ +#define STM32_FMCBANK4_BASE 0x90000000 /* 0x90000000-0x9fffffff: FMC bank 4 */ +#define STM32_FSMC_BASE 0xa0000000 /* 0xa0000000-0xa0000fff: FMC control registers */ +#define STM32_QUADSPI_BASE 0xa0001000 /* 0xa0001000-0xa0001fff: QuadSPI Control */ +#define STM32_FMCBANK5_BASE 0xc0000000 /* 0xc0000000-0xcfffffff: FMC bank 5 */ +#define STM32_FMCBANK6_BASE 0xd0000000 /* 0xd0000000-0xdfffffff: FMC bank 6 */ + +/* Cortex-M7 Base Addresses *********************************************************/ +/* Other registers -- see armv7-m/nvic.h for standard Cortex-M3 registers in this + * address range + */ + +#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ +#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XXX77XXX_MEMORYMAP_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h new file mode 100644 index 00000000000..4c60603c95a --- /dev/null +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h @@ -0,0 +1,1343 @@ +/************************************************************************************ + * arch/arm/src/stm32f7/chip/stm32f76xx77xx_pinmap.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_PINMAP_H +#define __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_PINMAP_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include "stm32_gpio.h" + +#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F76XX) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Alternate Pin Functions. All members of the STM32F76|7xxx family share the same + * pin multiplexing (although they may differ in the pins physically available). + * + * Alternative pin selections are provided with a numeric suffix like _1, _2, etc. + * Drivers, however, will use the pin selection without the numeric suffix. + * Additional definitions are required in the board.h file. For example, if + * CAN1_RX connects vis PA11 on some board, then the following definitions should + * appear inthe board.h header file for that board: + * + * #define GPIO_CAN1_RX GPIO_CAN1_RX_1 + * + * The driver will then automatically configre PA11 as the CAN1 RX pin. + */ + +/* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! + * Additional effort is required to select specific GPIO options such as frequency, + * open-drain/push-pull, and pull-up/down! Just the basics are defined for most + * pins in this file. + */ + +/* ADC */ + +#define GPIO_ADC1_IN0 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0) +#define GPIO_ADC1_IN1 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1) +#define GPIO_ADC1_IN2 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2) +#define GPIO_ADC1_IN3 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3) +#define GPIO_ADC1_IN4 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4) +#define GPIO_ADC1_IN5 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5) +#define GPIO_ADC1_IN6 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6) +#define GPIO_ADC1_IN7 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN7) +#define GPIO_ADC1_IN8 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0) +#define GPIO_ADC1_IN9 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1) +#define GPIO_ADC1_IN10 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0) +#define GPIO_ADC1_IN11 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1) +#define GPIO_ADC1_IN12 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2) +#define GPIO_ADC1_IN13 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3) +#define GPIO_ADC1_IN14 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN4) +#define GPIO_ADC1_IN15 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5) + +#define GPIO_ADC2_IN0 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0) +#define GPIO_ADC2_IN1 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1) +#define GPIO_ADC2_IN2 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2) +#define GPIO_ADC2_IN3 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3) +#define GPIO_ADC2_IN4 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4) +#define GPIO_ADC2_IN5 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5) +#define GPIO_ADC2_IN6 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN6) +#define GPIO_ADC2_IN7 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN7) +#define GPIO_ADC2_IN8 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN0) +#define GPIO_ADC2_IN9 (GPIO_ANALOG|GPIO_PORTB|GPIO_PIN1) +#define GPIO_ADC2_IN10 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0) +#define GPIO_ADC2_IN11 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1) +#define GPIO_ADC2_IN12 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2) +#define GPIO_ADC2_IN13 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3) +#define GPIO_ADC2_IN14 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN4) +#define GPIO_ADC2_IN15 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN5) + +#define GPIO_ADC3_IN0 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN0) +#define GPIO_ADC3_IN1 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN1) +#define GPIO_ADC3_IN2 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN2) +#define GPIO_ADC3_IN3 (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN3) +#define GPIO_ADC3_IN4 (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN6) +#define GPIO_ADC3_IN5 (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN7) +#define GPIO_ADC3_IN6 (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN8) +#define GPIO_ADC3_IN7 (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN9) +#define GPIO_ADC3_IN8 (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN10) + +#define GPIO_ADC3_IN9 (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN3) +#define GPIO_ADC3_IN10 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN0) +#define GPIO_ADC3_IN11 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN1) +#define GPIO_ADC3_IN12 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN2) +#define GPIO_ADC3_IN13 (GPIO_ANALOG|GPIO_PORTC|GPIO_PIN3) +#define GPIO_ADC3_IN14 (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN4) +#define GPIO_ADC3_IN15 (GPIO_ANALOG|GPIO_PORTF|GPIO_PIN5) + +/* CAN */ + +#define GPIO_CAN1_RX_1 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) +#define GPIO_CAN1_RX_2 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_CAN1_RX_3 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN0) +#define GPIO_CAN1_RX_4 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN14) +#define GPIO_CAN1_RX_5 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN9) + +#define GPIO_CAN1_TX_1 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) +#define GPIO_CAN1_TX_2 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) +#define GPIO_CAN1_TX_3 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN1) +#define GPIO_CAN1_TX_4 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN13) + +#define GPIO_CAN2_RX_1 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) +#define GPIO_CAN2_RX_2 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) +#define GPIO_CAN2_TX_1 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13) +#define GPIO_CAN2_TX_2 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) + +#define GPIO_CAN3_RX_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_CAN3_RX_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3) +#define GPIO_CAN3_TX_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15) +#define GPIO_CAN3_TX_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) + +/* DAC -" Once the DAC channel is enabled, the corresponding GPIO pin + * (PA4 or PA5) is automatically connected to the analog converter output + * (DAC_OUTx). In order to avoid parasitic consumption, the PA4 or PA5 pin + * should first be configured to analog (AIN)". + */ + +#define GPIO_DAC1_OUT (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN4) +#define GPIO_DAC2_OUT (GPIO_ANALOG|GPIO_PORTA|GPIO_PIN5) + +/* Digital Camera Interface (DCMI) */ + +#define GPIO_DCMI_D0_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN9) +#define GPIO_DCMI_D0_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN6) +#define GPIO_DCMI_D0_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN9) +#define GPIO_DCMI_D1_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN10) +#define GPIO_DCMI_D1_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN7) +#define GPIO_DCMI_D1_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN10) +#define GPIO_DCMI_D2_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN8) +#define GPIO_DCMI_D2_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN0) +#define GPIO_DCMI_D2_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN10) +#define GPIO_DCMI_D2_4 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN11) +#define GPIO_DCMI_D3_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN9) +#define GPIO_DCMI_D3_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN1) +#define GPIO_DCMI_D3_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN11) +#define GPIO_DCMI_D3_4 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN12) +#define GPIO_DCMI_D4_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN11) +#define GPIO_DCMI_D4_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN4) +#define GPIO_DCMI_D4_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN14) +#define GPIO_DCMI_D5_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN6) +#define GPIO_DCMI_D5_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTD|GPIO_PIN3) +#define GPIO_DCMI_D5_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN4) +#define GPIO_DCMI_D6_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN8) +#define GPIO_DCMI_D6_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN5) +#define GPIO_DCMI_D6_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN6) +#define GPIO_DCMI_D7_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN9) +#define GPIO_DCMI_D7_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTE|GPIO_PIN6) +#define GPIO_DCMI_D7_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN7) +#define GPIO_DCMI_D8_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN10) +#define GPIO_DCMI_D8_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN6) +#define GPIO_DCMI_D8_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN1) +#define GPIO_DCMI_D9_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTC|GPIO_PIN12) +#define GPIO_DCMI_D9_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN7) +#define GPIO_DCMI_D9_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN2) +#define GPIO_DCMI_D10_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN5) +#define GPIO_DCMI_D10_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTD|GPIO_PIN6) +#define GPIO_DCMI_D10_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN3) +#define GPIO_DCMI_D11_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTD|GPIO_PIN2) +#define GPIO_DCMI_D11_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTF|GPIO_PIN10) +#define GPIO_DCMI_D11_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN15) +#define GPIO_DCMI_D12_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTF|GPIO_PIN11) +#define GPIO_DCMI_D12_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN6) +#define GPIO_DCMI_D13_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN15) +#define GPIO_DCMI_D13_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN7) +#define GPIO_DCMI_D13_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN0) +#define GPIO_DCMI_HSYNC_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN4) +#define GPIO_DCMI_HSYNC_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTH|GPIO_PIN8) +#define GPIO_DCMI_PIXCK (GPIO_ALT|GPIO_AF13|GPIO_PORTA|GPIO_PIN6) +#define GPIO_DCMI_VSYNC_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN7) +#define GPIO_DCMI_VSYNC_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTG|GPIO_PIN9) +#define GPIO_DCMI_VSYNC_3 (GPIO_ALT|GPIO_AF13|GPIO_PORTI|GPIO_PIN5) + +/* DSI Host */ + +#define DSI_TE_1 (GPIO_ALT|GPIO_AF13|GPIO_PORTB|GPIO_PIN11) +#define DSI_TE_2 (GPIO_ALT|GPIO_AF13|GPIO_PORTJ|GPIO_PIN12) + +/* Digital filter for sigma delta modulators */ + +#define GPIO_DFSDM1_CKOUT_1 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0) +#define GPIO_DFSDM1_CKOUT_2 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN2) +#define GPIO_DFSDM1_CKOUT_3 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN3) +#define GPIO_DFSDM1_CKOUT_4 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN10) +#define GPIO_DFSDM1_CKOUT_5 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN9) +#define GPIO_DFSDM1_CKIN0_1 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0) +#define GPIO_DFSDM1_CKIN0_2 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN3) +#define GPIO_DFSDM1_CKIN1_1 (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN2) +#define GPIO_DFSDM1_CKIN1_2 (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13) +#define GPIO_DFSDM1_CKIN1_3 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN2) +#define GPIO_DFSDM1_CKIN1_4 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN7) +#define GPIO_DFSDM1_CKIN2_1 (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) +#define GPIO_DFSDM1_CKIN2_2 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4) +#define GPIO_DFSDM1_CKIN2_3 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN8) +#define GPIO_DFSDM1_CKIN3_1 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) +#define GPIO_DFSDM1_CKIN3_2 (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN1) +#define GPIO_DFSDM1_CKIN3_3 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN8) +#define GPIO_DFSDM1_CKIN3_4 (GPIO_ALT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN5) +#define GPIO_DFSDM1_CKIN4_1 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN6) +#define GPIO_DFSDM1_CKIN4_2 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN11) +#define GPIO_DFSDM1_CKIN5_1 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7) +#define GPIO_DFSDM1_CKIN5_2 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10) +#define GPIO_DFSDM1_CKIN5_3 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN13) +#define GPIO_DFSDM1_CKIN6_1 (GPIO_ALT|GPIO_AF3 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN0) +#define GPIO_DFSDM1_CKIN6_2 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN14) +#define GPIO_DFSDM1_CKIN7_1 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_DFSDM1_CKIN7_2 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1) +#define GPIO_DFSDM1_CKIN7_3 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11) +#define GPIO_DFSDM1_CKIN7_4 (GPIO_ALT|GPIO_AF6 |GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTS|GPIO_PIN1) +#define GPIO_DFSDM1_DATAIN0_1 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN1) +#define GPIO_DFSDM1_DATAIN0_2 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN4) +#define GPIO_DFSDM1_DATAIN1_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1) +#define GPIO_DFSDM1_DATAIN1_2 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) +#define GPIO_DFSDM1_DATAIN1_3 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3) +#define GPIO_DFSDM1_DATAIN1_4 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN6) +#define GPIO_DFSDM1_DATAIN2_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14) +#define GPIO_DFSDM1_DATAIN2_2 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5) +#define GPIO_DFSDM1_DATAIN2_3 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN7) +#define GPIO_DFSDM1_DATAIN3_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) +#define GPIO_DFSDM1_DATAIN3_2 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN9) +#define GPIO_DFSDM1_DATAIN3_3 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN4) +#define GPIO_DFSDM1_DATAIN4_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0) +#define GPIO_DFSDM1_DATAIN4_2 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN7) +#define GPIO_DFSDM1_DATAIN4_3 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN10) +#define GPIO_DFSDM1_DATAIN5_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) +#define GPIO_DFSDM1_DATAIN5_2 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11) +#define GPIO_DFSDM1_DATAIN5_3 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN12) +#define GPIO_DFSDM1_DATAIN6_1 (GPIO_ALT|GPIO_AF3 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN1) +#define GPIO_DFSDM1_DATAIN6_2 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN13) +#define GPIO_DFSDM1_DATAIN7_1 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) +#define GPIO_DFSDM1_DATAIN7_2 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) +#define GPIO_DFSDM1_DATAIN7_3 (GPIO_ALT|GPIO_AF6 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN0) + +/* Ethernet MAC */ + +#define GPIO_ETH_MDC (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN1) +#define GPIO_ETH_MDIO (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) +#define GPIO_ETH_MII_COL_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) +#define GPIO_ETH_MII_COL_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN3) +#define GPIO_ETH_MII_CRS_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0) +#define GPIO_ETH_MII_CRS_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN2) +#define GPIO_ETH_MII_RXD0 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4) +#define GPIO_ETH_MII_RXD1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5) +#define GPIO_ETH_MII_RXD2_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0) +#define GPIO_ETH_MII_RXD2_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6) +#define GPIO_ETH_MII_RXD3_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1) +#define GPIO_ETH_MII_RXD3_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN7) +#define GPIO_ETH_MII_RX_CLK (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) +#define GPIO_ETH_MII_RX_DV (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7) +#define GPIO_ETH_MII_RX_ER_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) +#define GPIO_ETH_MII_RX_ER_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN10) +#define GPIO_ETH_MII_TXD0_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) +#define GPIO_ETH_MII_TXD0_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13) +#define GPIO_ETH_MII_TXD1_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13) +#define GPIO_ETH_MII_TXD1_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14) +#define GPIO_ETH_MII_TXD2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN2) +#define GPIO_ETH_MII_TXD3_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_ETH_MII_TXD3_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN2) +#define GPIO_ETH_MII_TX_CLK (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3) +#define GPIO_ETH_MII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11) +#define GPIO_ETH_MII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11) +#define GPIO_ETH_PPS_OUT_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) +#define GPIO_ETH_PPS_OUT_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN8) + +#define GPIO_ETH_RMII_CRS_DV (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7) +#define GPIO_ETH_RMII_REF_CLK (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) +#define GPIO_ETH_RMII_RXD0 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN4) +#define GPIO_ETH_RMII_RXD1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN5) +#define GPIO_ETH_RMII_TXD0_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) +#define GPIO_ETH_RMII_TXD0_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13) +#define GPIO_ETH_RMII_TXD1_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13) +#define GPIO_ETH_RMII_TXD1_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14) +#define GPIO_ETH_RMII_TX_CLK (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN3) +#define GPIO_ETH_RMII_TX_EN_1 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11) +#define GPIO_ETH_RMII_TX_EN_2 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11) + +/* Event outputs */ + +#define GPIO_PA0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN0) +#define GPIO_PA1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN1) +#define GPIO_PA2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN2) +#define GPIO_PA3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN3) +#define GPIO_PA4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN4) +#define GPIO_PA5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN5) +#define GPIO_PA6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN6) +#define GPIO_PA7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN7) +#define GPIO_PA8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN8) +#define GPIO_PA9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN9) +#define GPIO_PA10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN10) +#define GPIO_PA11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN11) +#define GPIO_PA12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN12) +#define GPIO_PA13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN13) +#define GPIO_PA14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN14) +#define GPIO_PA15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTA|GPIO_PIN15) + +#define GPIO_PB0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN0) +#define GPIO_PB1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN1) +#define GPIO_PB2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN2) +#define GPIO_PB3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN3) +#define GPIO_PB4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN4) +#define GPIO_PB5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN5) +#define GPIO_PB6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN6) +#define GPIO_PB7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN7) +#define GPIO_PB8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN8) +#define GPIO_PB9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN9) +#define GPIO_PB10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN10) +#define GPIO_PB11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN11) +#define GPIO_PB12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN12) +#define GPIO_PB13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN13) +#define GPIO_PB14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN14) +#define GPIO_PB15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTB|GPIO_PIN15) + +#define GPIO_PC0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN0) +#define GPIO_PC1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN1) +#define GPIO_PC2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN2) +#define GPIO_PC3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN3) +#define GPIO_PC4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN4) +#define GPIO_PC5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN5) +#define GPIO_PC6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN6) +#define GPIO_PC7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN7) +#define GPIO_PC8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN8) +#define GPIO_PC9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN9) +#define GPIO_PC10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN10) +#define GPIO_PC11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN11) +#define GPIO_PC12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN12) +#define GPIO_PC13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN13) +#define GPIO_PC14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN14) +#define GPIO_PC15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTC|GPIO_PIN15) + +#define GPIO_PD0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN0) +#define GPIO_PD1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN1) +#define GPIO_PD2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN2) +#define GPIO_PD3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN3) +#define GPIO_PD4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN4) +#define GPIO_PD5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN5) +#define GPIO_PD6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN6) +#define GPIO_PD7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN7) +#define GPIO_PD8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN8) +#define GPIO_PD9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN9) +#define GPIO_PD10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN10) +#define GPIO_PD11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN11) +#define GPIO_PD12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN12) +#define GPIO_PD13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN13) +#define GPIO_PD14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN14) +#define GPIO_PD15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTD|GPIO_PIN15) + +#define GPIO_PE0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN0) +#define GPIO_PE1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN1) +#define GPIO_PE2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN2) +#define GPIO_PE3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN3) +#define GPIO_PE4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN4) +#define GPIO_PE5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN5) +#define GPIO_PE6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN6) +#define GPIO_PE7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN7) +#define GPIO_PE8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN8) +#define GPIO_PE9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN9) +#define GPIO_PE10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN10) +#define GPIO_PE11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN11) +#define GPIO_PE12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN12) +#define GPIO_PE13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN13) +#define GPIO_PE14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN14) +#define GPIO_PE15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTE|GPIO_PIN15) + +#define GPIO_PF0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN0) +#define GPIO_PF1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN1) +#define GPIO_PF2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN2) +#define GPIO_PF3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN3) +#define GPIO_PF4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN4) +#define GPIO_PF5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN5) +#define GPIO_PF6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN6) +#define GPIO_PF7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN7) +#define GPIO_PF8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN8) +#define GPIO_PF9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN9) +#define GPIO_PF10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN10) +#define GPIO_PF11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN11) +#define GPIO_PF12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN12) +#define GPIO_PF13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN13) +#define GPIO_PF14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN14) +#define GPIO_PF15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTF|GPIO_PIN15) + +#define GPIO_PG0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN0) +#define GPIO_PG1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN1) +#define GPIO_PG2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN2) +#define GPIO_PG3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN3) +#define GPIO_PG4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN4) +#define GPIO_PG5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN5) +#define GPIO_PG6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN6) +#define GPIO_PG7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN7) +#define GPIO_PG8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN8) +#define GPIO_PG9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN9) +#define GPIO_PG10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN10) +#define GPIO_PG11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN11) +#define GPIO_PG12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN12) +#define GPIO_PG13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN13) +#define GPIO_PG14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN14) +#define GPIO_PG15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTG|GPIO_PIN15) + +#define GPIO_PH0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN0) +#define GPIO_PH1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN1) +#define GPIO_PH2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN2) +#define GPIO_PH3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN3) +#define GPIO_PH4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN4) +#define GPIO_PH5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN5) +#define GPIO_PH6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN6) +#define GPIO_PH7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN7) +#define GPIO_PH8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN8) +#define GPIO_PH9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN9) +#define GPIO_PH10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN10) +#define GPIO_PH11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN11) +#define GPIO_PH12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN12) +#define GPIO_PH13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN13) +#define GPIO_PH14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN14) +#define GPIO_PH15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTH|GPIO_PIN15) + +#define GPIO_PI0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN0) +#define GPIO_PI1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN1) +#define GPIO_PI2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN2) +#define GPIO_PI3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN3) +#define GPIO_PI4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN4) +#define GPIO_PI5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN5) +#define GPIO_PI6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN6) +#define GPIO_PI7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN7) +#define GPIO_PI8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN8) +#define GPIO_PI9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN9) +#define GPIO_PI10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN10) +#define GPIO_PI11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN11) +#define GPIO_PI12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN12) +#define GPIO_PI13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN13) +#define GPIO_PI14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN14) +#define GPIO_PI15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTI|GPIO_PIN15) + +#define GPIO_PJ0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN0) +#define GPIO_PJ1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN1) +#define GPIO_PJ2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN2) +#define GPIO_PJ3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN3) +#define GPIO_PJ4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN4) +#define GPIO_PJ5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN5) +#define GPIO_PJ6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN6) +#define GPIO_PJ7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN7) +#define GPIO_PJ8_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN8) +#define GPIO_PJ9_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN9) +#define GPIO_PJ10_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN10) +#define GPIO_PJ11_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN11) +#define GPIO_PJ12_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN12) +#define GPIO_PJ13_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN13) +#define GPIO_PJ14_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN14) +#define GPIO_PJ15_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTJ|GPIO_PIN15) + +#define GPIO_PK0_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN0) +#define GPIO_PK1_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN1) +#define GPIO_PK2_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN2) +#define GPIO_PK3_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN3) +#define GPIO_PK4_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN4) +#define GPIO_PK5_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN5) +#define GPIO_PK6_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN6) +#define GPIO_PK7_EVENTOUT (GPIO_ALT|GPIO_AF15|GPIO_PORTK|GPIO_PIN7) + +/* Flexible Static Memory Controller (FSMC) */ + +#define GPIO_FSMC_A0 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN0) +#define GPIO_FSMC_A1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN1) +#define GPIO_FSMC_A2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN2) +#define GPIO_FSMC_A3 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN3) +#define GPIO_FSMC_A4 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN4) +#define GPIO_FSMC_A5 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN5) +#define GPIO_FSMC_A6 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN12) +#define GPIO_FSMC_A7 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN13) +#define GPIO_FSMC_A8 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN14) +#define GPIO_FSMC_A9 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN15) +#define GPIO_FSMC_A10 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN0) +#define GPIO_FSMC_A11 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN1) +#define GPIO_FSMC_A12 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN2) +#define GPIO_FSMC_A13 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN3) +#define GPIO_FSMC_A14 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN4) +#define GPIO_FSMC_A15 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN5) +#define GPIO_FSMC_A16 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN11) +#define GPIO_FSMC_A17 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN12) +#define GPIO_FSMC_A18 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN13) +#define GPIO_FSMC_A19 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN3) +#define GPIO_FSMC_A20 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN4) +#define GPIO_FSMC_A21 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN5) +#define GPIO_FSMC_A22 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN6) +#define GPIO_FSMC_A23 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN2) +#define GPIO_FSMC_A24 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN13) +#define GPIO_FSMC_A25 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN14) +#define GPIO_FSMC_ALE (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN12) +#define GPIO_FSMC_BA0 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN4) +#define GPIO_FSMC_BA1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN5) +#define GPIO_FSMC_CLE (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN11) +#define GPIO_FSMC_CLK (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN3) +#define GPIO_FSMC_D0 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN14) +#define GPIO_FSMC_D1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN15) +#define GPIO_FSMC_D2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN0) +#define GPIO_FSMC_D3 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN1) +#define GPIO_FSMC_D4 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN7) +#define GPIO_FSMC_D5 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN8) +#define GPIO_FSMC_D6 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN9) +#define GPIO_FSMC_D7 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN10) +#define GPIO_FSMC_D8 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN11) +#define GPIO_FSMC_D9 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN12) +#define GPIO_FSMC_D10 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN13) +#define GPIO_FSMC_D11 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN14) +#define GPIO_FSMC_D12 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN15) +#define GPIO_FSMC_D13 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN8) +#define GPIO_FSMC_D14 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN9) +#define GPIO_FSMC_D15 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN10) +#define GPIO_FSMC_D16 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN8) +#define GPIO_FSMC_D17 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN9) +#define GPIO_FSMC_D18 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN10) +#define GPIO_FSMC_D19 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN11) +#define GPIO_FSMC_D20 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN12) +#define GPIO_FSMC_D21 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN13) +#define GPIO_FSMC_D22 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN14) +#define GPIO_FSMC_D23 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN15) +#define GPIO_FSMC_D24 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN0) +#define GPIO_FSMC_D25 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN1) +#define GPIO_FSMC_D26 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN2) +#define GPIO_FSMC_D27 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN3) +#define GPIO_FSMC_D28 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN6) +#define GPIO_FSMC_D29 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN7) +#define GPIO_FSMC_D30 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN9) +#define GPIO_FSMC_D31 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN10) +#define GPIO_FSMC_INT (GPIO_ALT|GPIO_AF12|GPIO_PORTG|GPIO_PIN7) +#define GPIO_FSMC_NBL0 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN0) +#define GPIO_FSMC_NBL1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTE|GPIO_PIN1) +#define GPIO_FSMC_NBL2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN4) +#define GPIO_FSMC_NBL3 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTI|GPIO_PIN5) +#define GPIO_FSMC_NCE_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN9) +#define GPIO_FSMC_NCE_2 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN8) +#define GPIO_FSMC_NE1_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN7) +#define GPIO_FSMC_NE1_2 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN7) +#define GPIO_FSMC_NE2_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN9) +#define GPIO_FSMC_NE2_2 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN8) +#define GPIO_FSMC_NE3 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN10) +#define GPIO_FSMC_NE4 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN12) +#define GPIO_FSMC_NL (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTB|GPIO_PIN7) +#define GPIO_FSMC_NOE (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN4) +#define GPIO_FSMC_NWAIT_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN6) +#define GPIO_FSMC_NWAIT_2 (GPIO_ALT|GPIO_AF9 |GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN6) +#define GPIO_FSMC_NWE (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTD|GPIO_PIN5) +#define GPIO_FSMC_SDCKE0_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN3) +#define GPIO_FSMC_SDCKE0_2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN5) +#define GPIO_FSMC_SDCKE0_3 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN2) +#define GPIO_FSMC_SDCKE1_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTB|GPIO_PIN5) +#define GPIO_FSMC_SDCKE1_2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN7) +#define GPIO_FSMC_SDCLK (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN8) +#define GPIO_FSMC_SDNCAS (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTG|GPIO_PIN15) +#define GPIO_FSMC_SDNE0_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN2) +#define GPIO_FSMC_SDNE0_2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN4) +#define GPIO_FSMC_SDNE0_3 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN3) +#define GPIO_FSMC_SDNE1_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTB|GPIO_PIN6) +#define GPIO_FSMC_SDNE1_2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN6) +#define GPIO_FSMC_SDNRAS (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTF|GPIO_PIN11) +#define GPIO_FSMC_SDNWE_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTA|GPIO_PIN7) +#define GPIO_FSMC_SDNWE_2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTC|GPIO_PIN0) +#define GPIO_FSMC_SDNWE_3 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PORTH|GPIO_PIN5) + +/* HDMI-CEC Controller */ + +#define GPIO_HDMICEC_1 (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN6) +#define GPIO_HDMICEC_2 (GPIO_ALT|GPIO_AF4|GPIO_PORTA|GPIO_PIN15) + +/* I2C */ + +#define GPIO_I2C1_SCL_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN6) +#define GPIO_I2C1_SCL_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN8) +#define GPIO_I2C1_SDA_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN7) +#define GPIO_I2C1_SDA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN9) +#define GPIO_I2C1_SMBA (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) + +#define GPIO_I2C2_SCL_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN10) +#define GPIO_I2C2_SCL_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTF|GPIO_PIN1) +#define GPIO_I2C2_SCL_3 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN4) +#define GPIO_I2C2_SDA_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN11) +#define GPIO_I2C2_SDA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTF|GPIO_PIN0) +#define GPIO_I2C2_SDA_3 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN5) +#define GPIO_I2C2_SMBA_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) +#define GPIO_I2C2_SMBA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN2) +#define GPIO_I2C2_SMBA_3 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6) + +#define GPIO_I2C3_SCL_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN8) +#define GPIO_I2C3_SCL_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN7) +#define GPIO_I2C3_SDA_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTC|GPIO_PIN9) +#define GPIO_I2C3_SDA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_OPENDRAIN|GPIO_PORTH|GPIO_PIN8) +#define GPIO_I2C3_SMBA_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9) +#define GPIO_I2C3_SMBA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN9) + +#define GPIO_I2C4_SCL_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN12) +#define GPIO_I2C4_SCL_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN14) +#define GPIO_I2C4_SCL_3 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN11) +#define GPIO_I2C4_SCL_4 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) +#define GPIO_I2C4_SCL_5 (GPIO_ALT|GPIO_AF1 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_I2C4_SDA_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN13) +#define GPIO_I2C4_SDA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN15) +#define GPIO_I2C4_SDA_3 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN12) +#define GPIO_I2C4_SMBA_1 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN11) +#define GPIO_I2C4_SMBA_2 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN13) +#define GPIO_I2C4_SMBA_3 (GPIO_ALT|GPIO_AF4 |GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10) +#define GPIO_I2C4_SMBA_4 (GPIO_ALT|GPIO_AF11|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) + +/* I2S */ + +#define GPIO_I2S1_CK_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN5) +#define GPIO_I2S1_CK_2 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN3) +#define GPIO_I2S1_CK_3 (GPIO_ALT|GPIO_AF5 |GPIO_PORTG|GPIO_PIN11) +#define GPIO_I2S1_MCK (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN4) +#define GPIO_I2S1_SD_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN7) +#define GPIO_I2S1_SD_2 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN5) +#define GPIO_I2S1_SD_3 (GPIO_ALT|GPIO_AF5 |GPIO_PORTD|GPIO_PIN7) +#define GPIO_I2S1_WS_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN15) +#define GPIO_I2S1_WS_2 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN4) +#define GPIO_I2S1_WS_3 (GPIO_ALT|GPIO_AF5 |GPIO_PORTG|GPIO_PIN10) + +#define GPIO_I2S2_CK_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN9) +#define GPIO_I2S2_CK_2 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN10) +#define GPIO_I2S2_CK_3 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN13) +#define GPIO_I2S2_CK_4 (GPIO_ALT|GPIO_AF5 |GPIO_PORTD|GPIO_PIN3) +#define GPIO_I2S2_CK_5 (GPIO_ALT|GPIO_AF5 |GPIO_PORTI|GPIO_PIN1) +#define GPIO_I2S2_CK_6 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN12) +#define GPIO_I2S2_MCK (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN6) +#define GPIO_I2S2_SD_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN15) +#define GPIO_I2S2_SD_2 (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN1) +#define GPIO_I2S2_SD_3 (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN3) +#define GPIO_I2S2_SD_4 (GPIO_ALT|GPIO_AF5 |GPIO_PORTI|GPIO_PIN3) +#define GPIO_I2S2_WS_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN12) +#define GPIO_I2S2_WS_2 (GPIO_ALT|GPIO_AF5 |GPIO_PORTB|GPIO_PIN9) +#define GPIO_I2S2_WS_3 (GPIO_ALT|GPIO_AF5 |GPIO_PORTI|GPIO_PIN0) +#define GPIO_I2S2_WS_4 (GPIO_ALT|GPIO_AF7 |GPIO_PORTB|GPIO_PIN4) +#define GPIO_I2S2_WS_5 (GPIO_ALT|GPIO_AF5 |GPIO_PORTA|GPIO_PIN11) + +#define GPIO_I2S3_CK_1 (GPIO_ALT|GPIO_AF6 |GPIO_PORTB|GPIO_PIN3) +#define GPIO_I2S3_CK_2 (GPIO_ALT|GPIO_AF6 |GPIO_PORTC|GPIO_PIN10) +#define GPIO_I2S3_MCK (GPIO_ALT|GPIO_AF6 |GPIO_PORTC|GPIO_PIN7) +#define GPIO_I2S3_SD_1 (GPIO_ALT|GPIO_AF5 |GPIO_PORTD|GPIO_PIN6) +#define GPIO_I2S3_SD_2 (GPIO_ALT|GPIO_AF6 |GPIO_PORTB|GPIO_PIN5) +#define GPIO_I2S3_SD_3 (GPIO_ALT|GPIO_AF6 |GPIO_PORTC|GPIO_PIN12) +#define GPIO_I2S3_SD_4 (GPIO_ALT|GPIO_AF7 |GPIO_PORTB|GPIO_PIN2) +#define GPIO_I2S3_WS_1 (GPIO_ALT|GPIO_AF6 |GPIO_PORTA|GPIO_PIN15) +#define GPIO_I2S3_WS_2 (GPIO_ALT|GPIO_AF6 |GPIO_PORTA|GPIO_PIN4) + +#define GPIO_I2S4_SD_1 (GPIO_ALT|GPIO_AF11|GPIO_PORTB|GPIO_PIN7) +#define GPIO_I2S4_SD_2 (GPIO_ALT|GPIO_AF1 |GPIO_PORTB|GPIO_PIN9) + +#define GPIO_I2S_CKIN (GPIO_ALT|GPIO_AF5 |GPIO_PORTC|GPIO_PIN9) + +/* JTAG */ + +#define GPIO_JTCK (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN14) +#define GPIO_JTDI (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN15) +#define GPIO_JTDO (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN3) +#define GPIO_JTMS (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN13) +#define GPIO_NJTRST (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN4) + +#define GPIO_SWCLK (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN14) +#define GPIO_SWDIO (GPIO_ALT|GPIO_AF0|GPIO_PORTA|GPIO_PIN13) + +/* LCD-TFT Display Controller (LTDC) */ + +#define GPIO_LTDC_R0_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13) +#define GPIO_LTDC_R0_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN2) +#define GPIO_LTDC_R0_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN15) +#define GPIO_LTDC_R1_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) +#define GPIO_LTDC_R1_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN3) +#define GPIO_LTDC_R1_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN0) +#define GPIO_LTDC_R2_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) +#define GPIO_LTDC_R2_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10) +#define GPIO_LTDC_R2_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN8) +#define GPIO_LTDC_R2_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN1) +#define GPIO_LTDC_R3_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN9) +#define GPIO_LTDC_R3_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN2) +#define GPIO_LTDC_R3_1 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0) +#define GPIO_LTDC_R4_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) +#define GPIO_LTDC_R4_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5) +#define GPIO_LTDC_R4_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10) +#define GPIO_LTDC_R4_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN3) +#define GPIO_LTDC_R5_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) +#define GPIO_LTDC_R5_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN0) +#define GPIO_LTDC_R5_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN11) +#define GPIO_LTDC_R5_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN4) +#define GPIO_LTDC_R5_5 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9) +#define GPIO_LTDC_R6_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_LTDC_R6_2 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1) +#define GPIO_LTDC_R6_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN12) +#define GPIO_LTDC_R6_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN5) +#define GPIO_LTDC_R7_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN15) +#define GPIO_LTDC_R7_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN6) +#define GPIO_LTDC_R7_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN6) +#define GPIO_LTDC_R7_4 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN0) + +#define GPIO_LTDC_B0_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN4) +#define GPIO_LTDC_B0_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14) +#define GPIO_LTDC_B0_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN12) +#define GPIO_LTDC_B1_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN12) +#define GPIO_LTDC_B1_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN13) +#define GPIO_LTDC_B1_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10) +#define GPIO_LTDC_B2_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN6) +#define GPIO_LTDC_B2_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN10) +#define GPIO_LTDC_B2_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN14) +#define GPIO_LTDC_B2_4 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) +#define GPIO_LTDC_B2_5 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) +#define GPIO_LTDC_B3_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN10) +#define GPIO_LTDC_B3_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11) +#define GPIO_LTDC_B3_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN15) +#define GPIO_LTDC_B3_4 (GPIO_ALT|GPIO_AF13|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_LTDC_B4_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN12) +#define GPIO_LTDC_B4_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN4) +#define GPIO_LTDC_B4_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN3) +#define GPIO_LTDC_B4_4 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN12) +#define GPIO_LTDC_B4_5 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10) +#define GPIO_LTDC_B5_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) +#define GPIO_LTDC_B5_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN5) +#define GPIO_LTDC_B5_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN4) +#define GPIO_LTDC_B6_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_LTDC_B6_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN6) +#define GPIO_LTDC_B6_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN5) +#define GPIO_LTDC_B7_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) +#define GPIO_LTDC_B7_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN7) +#define GPIO_LTDC_B7_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN6) + +#define GPIO_LTDC_G0_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN5) +#define GPIO_LTDC_G0_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN7) +#define GPIO_LTDC_G0_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1) +#define GPIO_LTDC_G1_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN6) +#define GPIO_LTDC_G1_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN8) +#define GPIO_LTDC_G1_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0) +#define GPIO_LTDC_G2_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6) +#define GPIO_LTDC_G2_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN13) +#define GPIO_LTDC_G2_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN9) +#define GPIO_LTDC_G2_4 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN15) +#define GPIO_LTDC_G3_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN11) +#define GPIO_LTDC_G3_2 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN10) +#define GPIO_LTDC_G3_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN14) +#define GPIO_LTDC_G3_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN10) +#define GPIO_LTDC_G3_5 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) +#define GPIO_LTDC_G3_6 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN12) +#define GPIO_LTDC_G4_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) +#define GPIO_LTDC_G4_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN15) +#define GPIO_LTDC_G4_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN11) +#define GPIO_LTDC_G4_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN4) +#define GPIO_LTDC_G4_5 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTJ|GPIO_PIN13) +#define GPIO_LTDC_G5_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11) +#define GPIO_LTDC_G5_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN0) +#define GPIO_LTDC_G5_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN0) +#define GPIO_LTDC_G5_4 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN4) +#define GPIO_LTDC_G6_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) +#define GPIO_LTDC_G6_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN1) +#define GPIO_LTDC_G6_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN1) +#define GPIO_LTDC_G6_4 (GPIO_ALT|GPIO_AF9 |GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN11) +#define GPIO_LTDC_G7_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN3) +#define GPIO_LTDC_G7_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN2) +#define GPIO_LTDC_G7_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN2) +#define GPIO_LTDC_G7_4 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) +#define GPIO_LTDC_G7_5 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN8) + +#define GPIO_LTDC_HSYNC_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) +#define GPIO_LTDC_HSYNC_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN10) +#define GPIO_LTDC_HSYNC_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN12) +#define GPIO_LTDC_VSYNC_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN4) +#define GPIO_LTDC_VSYNC_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN9) +#define GPIO_LTDC_VSYNC_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN13) +#define GPIO_LTDC_CLK_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN14) +#define GPIO_LTDC_CLK_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN7) +#define GPIO_LTDC_CLK_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN14) +#define GPIO_LTDC_DE_1 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN13) +#define GPIO_LTDC_DE_2 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN10) +#define GPIO_LTDC_DE_3 (GPIO_ALT|GPIO_AF14|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTK|GPIO_PIN7) + +/* Low Power Timer */ + +#define GPIO_LPTIM1_ETR_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN0) +#define GPIO_LPTIM1_ETR_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTG|GPIO_PIN14) +#define GPIO_LPTIM1_IN1_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN12) +#define GPIO_LPTIM1_IN1_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTG|GPIO_PIN12) +#define GPIO_LPTIM1_IN2_3 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN1) +#define GPIO_LPTIM1_IN2_4 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN2) +#define GPIO_LPTIM1_OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN13) +#define GPIO_LPTIM1_OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13) + +/* Clocks outputs */ + +#define GPIO_MCO1 (GPIO_ALT|GPIO_AF0|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_MCO2 (GPIO_ALT|GPIO_AF0|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) + +/* Management data input/output */ + +#define MDIOS_MDIO_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN2) +#define MDIOS_MDC_1 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6) +#define MDIOS_MDC_2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN1) +#define MDIOS_MDIO_2 (GPIO_ALT|GPIO_AF12|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN10) + +/* OTG FS/HS (VBUS PA9 is not an alternate configuration) */ + +#define GPIO_OTGFS_DM (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) +#define GPIO_OTGFS_DP (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) +#define GPIO_OTGFS_ID (GPIO_ALT|GPIO_PULLUP|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTA|GPIO_PIN10) +#define GPIO_OTGFS_SOF (GPIO_ALT|GPIO_FLOAT|GPIO_AF10|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) + +#define GPIO_OTGHSFS_DM (GPIO_ALT|GPIO_FLOAT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14) +#define GPIO_OTGHSFS_DP (GPIO_ALT|GPIO_FLOAT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) +#define GPIO_OTGHSFS_ID (GPIO_ALT|GPIO_PULLUP|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_OPENDRAIN|GPIO_PORTB|GPIO_PIN12) + +#define GPIO_OTGHS_SOF (GPIO_ALT|GPIO_FLOAT|GPIO_AF12|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN4) + +#define GPIO_OTGHS_ULPI_CK (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN5) +#define GPIO_OTGHS_ULPI_D0 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN3) +#define GPIO_OTGHS_ULPI_D1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN0) +#define GPIO_OTGHS_ULPI_D2 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN1) +#define GPIO_OTGHS_ULPI_D3 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN10) +#define GPIO_OTGHS_ULPI_D4 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN11) +#define GPIO_OTGHS_ULPI_D5 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN12) +#define GPIO_OTGHS_ULPI_D6 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN13) +#define GPIO_OTGHS_ULPI_D7 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN5) +#define GPIO_OTGHS_ULPI_DIR_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN2) +#define GPIO_OTGHS_ULPI_DIR_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN11) +#define GPIO_OTGHS_ULPI_NXT_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN3) +#define GPIO_OTGHS_ULPI_NXT_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN4) +#define GPIO_OTGHS_ULPI_STP (GPIO_ALT|GPIO_AF10|GPIO_PORTC|GPIO_PIN0) + +/* QuadSPI */ + +#define GPIO_QUADSPI_BK1_IO0_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTF|GPIO_PIN8) +#define GPIO_QUADSPI_BK1_IO0_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTC|GPIO_PIN9) +#define GPIO_QUADSPI_BK1_IO0_3 (GPIO_ALT|GPIO_AF9 |GPIO_PORTD|GPIO_PIN11) +#define GPIO_QUADSPI_BK1_IO1_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTF|GPIO_PIN9) +#define GPIO_QUADSPI_BK1_IO1_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTC|GPIO_PIN10) +#define GPIO_QUADSPI_BK1_IO1_3 (GPIO_ALT|GPIO_AF9 |GPIO_PORTD|GPIO_PIN12) +#define GPIO_QUADSPI_BK1_IO2_1 (GPIO_ALT|GPIO_AF9 |GPIO_PORTE|GPIO_PIN2) +#define GPIO_QUADSPI_BK1_IO2_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTF|GPIO_PIN7) +#define GPIO_QUADSPI_BK1_IO3_1 (GPIO_ALT|GPIO_AF9 |GPIO_PORTA|GPIO_PIN1) +#define GPIO_QUADSPI_BK1_IO3_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTD|GPIO_PIN13) +#define GPIO_QUADSPI_BK1_IO3_3 (GPIO_ALT|GPIO_AF9 |GPIO_PORTF|GPIO_PIN6) +#define GPIO_QUADSPI_BK1_NCS_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTB|GPIO_PIN6) +#define GPIO_QUADSPI_BK1_NCS_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTB|GPIO_PIN10) + +#define GPIO_QUADSPI_BK2_IO0_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN7) +#define GPIO_QUADSPI_BK2_IO0_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTH|GPIO_PIN2) +#define GPIO_QUADSPI_BK2_IO1_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN8) +#define GPIO_QUADSPI_BK2_IO1_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTH|GPIO_PIN3) +#define GPIO_QUADSPI_BK2_IO2_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN9) +#define GPIO_QUADSPI_BK2_IO2_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTG|GPIO_PIN9) +#define GPIO_QUADSPI_BK2_IO3_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN10) +#define GPIO_QUADSPI_BK2_IO3_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTG|GPIO_PIN14) +#define GPIO_QUADSPI_BK2_NCS (GPIO_ALT|GPIO_AF9 |GPIO_PORTC|GPIO_PIN11) + +#define GPIO_QUADSPI_CLK_1 (GPIO_ALT|GPIO_AF9 |GPIO_PORTB|GPIO_PIN2) +#define GPIO_QUADSPI_CLK_2 (GPIO_ALT|GPIO_AF9 |GPIO_PORTF|GPIO_PIN10) + +/* RTC */ + +#define GPIO_RTC_REFIN (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN15) + +/* Serial Audio Interface */ + +#define GPIO_SAI1_FS_A (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN4) +#define GPIO_SAI1_FS_B (GPIO_ALT|GPIO_AF6 |GPIO_PORTF|GPIO_PIN9) +#define GPIO_SAI1_MCLK_A_1 (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN2) +#define GPIO_SAI1_MCLK_A_2 (GPIO_ALT|GPIO_AF6 |GPIO_PORTG|GPIO_PIN7) +#define GPIO_SAI1_MCLK_B (GPIO_ALT|GPIO_AF6 |GPIO_PORTF|GPIO_PIN7) +#define GPIO_SAI1_SCK_A (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN5) +#define GPIO_SAI1_SCK_B (GPIO_ALT|GPIO_AF6 |GPIO_PORTF|GPIO_PIN8) +#define GPIO_SAI1_SD_A_1 (GPIO_ALT|GPIO_AF6 |GPIO_PORTB|GPIO_PIN2) +#define GPIO_SAI1_SD_A_2 (GPIO_ALT|GPIO_AF6 |GPIO_PORTC|GPIO_PIN1) +#define GPIO_SAI1_SD_A_3 (GPIO_ALT|GPIO_AF6 |GPIO_PORTD|GPIO_PIN6) +#define GPIO_SAI1_SD_A_4 (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN6) +#define GPIO_SAI1_SD_B_1 (GPIO_ALT|GPIO_AF6 |GPIO_PORTE|GPIO_PIN3) +#define GPIO_SAI1_SD_B_2 (GPIO_ALT|GPIO_AF6 |GPIO_PORTF|GPIO_PIN6) +#define GPIO_SAI2_FS_A_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN12) +#define GPIO_SAI2_FS_A_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN7) +#define GPIO_SAI2_FS_B_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN13) +#define GPIO_SAI2_FS_B_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTG|GPIO_PIN9) +#define GPIO_SAI2_FS_B_3 (GPIO_ALT|GPIO_AF8 |GPIO_PORTA|GPIO_PIN12) +#define GPIO_SAI2_FS_B_4 (GPIO_ALT|GPIO_AF8 |GPIO_PORTC|GPIO_PIN0) +#define GPIO_SAI2_MCLK_A_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN0) +#define GPIO_SAI2_MCLK_A_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN4) +#define GPIO_SAI2_MCLK_B_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN1) +#define GPIO_SAI2_MCLK_B_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN14) +#define GPIO_SAI2_MCLK_B_3 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN6) +#define GPIO_SAI2_MCLK_B_4 (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN3) +#define GPIO_SAI2_SCK_A_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN13) +#define GPIO_SAI2_SCK_A_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN5) +#define GPIO_SAI2_SCK_B_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN12) +#define GPIO_SAI2_SCK_B_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTH|GPIO_PIN2) +#define GPIO_SAI2_SCK_B_3 (GPIO_ALT|GPIO_AF8 |GPIO_PORTA|GPIO_PIN2) +#define GPIO_SAI2_SD_A_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTD|GPIO_PIN11) +#define GPIO_SAI2_SD_A_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTI|GPIO_PIN6) +#define GPIO_SAI2_SD_B_1 (GPIO_ALT|GPIO_AF10|GPIO_PORTA|GPIO_PIN0) +#define GPIO_SAI2_SD_B_2 (GPIO_ALT|GPIO_AF10|GPIO_PORTE|GPIO_PIN11) +#define GPIO_SAI2_SD_B_3 (GPIO_ALT|GPIO_AF10|GPIO_PORTF|GPIO_PIN11) +#define GPIO_SAI2_SD_B_4 (GPIO_ALT|GPIO_AF10|GPIO_PORTG|GPIO_PIN10) + +/* SD/MMC */ + +#define GPIO_SDMMC1_CK (GPIO_ALT|GPIO_AF12|GPIO_PORTC|GPIO_PIN12) +#define GPIO_SDMMC1_CMD (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN2) +#define GPIO_SDMMC1_D0 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) +#define GPIO_SDMMC1_D1 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) +#define GPIO_SDMMC1_D2 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10) +#define GPIO_SDMMC1_D3 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11) +#define GPIO_SDMMC1_D4 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_SDMMC1_D5 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) +#define GPIO_SDMMC1_D6 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) +#define GPIO_SDMMC1_D7 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) + +#define GPIO_SDMMC2_CK (GPIO_ALT|GPIO_AF11|GPIO_PORTD|GPIO_PIN6) +#define GPIO_SDMMC2_CMD (GPIO_ALT|GPIO_AF11|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN7) +#define GPIO_SDMMC2_D0_1 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14) +#define GPIO_SDMMC2_D1_1 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) +#define GPIO_SDMMC2_D2_1 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN) +#define GPIO_SDMMC2_D3_1 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) +#define GPIO_SDMMC2_D0_2 (GPIO_ALT|GPIO_AF11|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN9) +#define GPIO_SDMMC2_D1_2 (GPIO_ALT|GPIO_AF11|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN10) +#define GPIO_SDMMC2_D2_2 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN11) +#define GPIO_SDMMC2_D3_2 (GPIO_ALT|GPIO_AF11|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN12) +#define GPIO_SDMMC2_D4 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_SDMMC2_D5 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) +#define GPIO_SDMMC2_D6 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) +#define GPIO_SDMMC2_D7 (GPIO_ALT|GPIO_AF10|GPIO_PULLUP|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) + + +/* SPDIFRX */ + +#define GPIO_SPDIFRX_IN0_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTG|GPIO_PIN11) +#define GPIO_SPDIFRX_IN0_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTD|GPIO_PIN7) +#define GPIO_SPDIFRX_IN1_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTG|GPIO_PIN12) +#define GPIO_SPDIFRX_IN1_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTD|GPIO_PIN8) +#define GPIO_SPDIFRX_IN2_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTG|GPIO_PIN8) +#define GPIO_SPDIFRX_IN2_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTC|GPIO_PIN4) +#define GPIO_SPDIFRX_IN3_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTG|GPIO_PIN9) +#define GPIO_SPDIFRX_IN3_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTC|GPIO_PIN5) + +/* SPI */ + +#define GPIO_SPI1_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6) +#define GPIO_SPI1_MISO_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4) +#define GPIO_SPI1_MISO_3 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN9) +#define GPIO_SPI1_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7) +#define GPIO_SPI1_MOSI_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5) +#define GPIO_SPI1_MOSI_3 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN7) +#define GPIO_SPI1_NSS_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15) +#define GPIO_SPI1_NSS_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN4) +#define GPIO_SPI1_NSS_3 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN10) +#define GPIO_SPI1_SCK_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN5) +#define GPIO_SPI1_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3) +#define GPIO_SPI1_SCK_3 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN11) + +#define GPIO_SPI2_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN14) +#define GPIO_SPI2_MISO_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN2) +#define GPIO_SPI2_MISO_3 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTI|GPIO_PIN2) +#define GPIO_SPI2_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN15) +#define GPIO_SPI2_MOSI_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN3) +#define GPIO_SPI2_MOSI_3 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTI|GPIO_PIN3) +#define GPIO_SPI2_NSS_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN12) +#define GPIO_SPI2_NSS_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN9) +#define GPIO_SPI2_NSS_3 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTI|GPIO_PIN0) +#define GPIO_SPI2_NSS_4 (GPIO_ALT|GPIO_AF7|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4) +#define GPIO_SPI2_NSS_5 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN11) +#define GPIO_SPI2_SCK_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN9) +#define GPIO_SPI2_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN10) +#define GPIO_SPI2_SCK_3 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN13) +#define GPIO_SPI2_SCK_4 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN3) +#define GPIO_SPI2_SCK_5 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTI|GPIO_PIN1) +#define GPIO_SPI2_SCK_6 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTIA|GPIO_PIN12) + +#define GPIO_SPI3_MISO_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4) +#define GPIO_SPI3_MISO_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN11) +#define GPIO_SPI3_MOSI_1 (GPIO_ALT|GPIO_AF7|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN2) +#define GPIO_SPI3_MOSI_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5) +#define GPIO_SPI3_MOSI_3 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN12) +#define GPIO_SPI3_MOSI_4 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTD|GPIO_PIN6) +#define GPIO_SPI3_NSS_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15) +#define GPIO_SPI3_NSS_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN4) +#define GPIO_SPI3_SCK_1 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3) +#define GPIO_SPI3_SCK_2 (GPIO_ALT|GPIO_AF6|GPIO_SPEED_50MHz|GPIO_PORTC|GPIO_PIN10) + +#define GPIO_SPI4_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN5) +#define GPIO_SPI4_MISO_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN13) +#define GPIO_SPI4_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN6) +#define GPIO_SPI4_MOSI_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN14) +#define GPIO_SPI4_NSS_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN4) +#define GPIO_SPI4_NSS_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN11) +#define GPIO_SPI4_SCK_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN2) +#define GPIO_SPI4_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTE|GPIO_PIN12) + +#define GPIO_SPI5_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN8) +#define GPIO_SPI5_MISO_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN7) +#define GPIO_SPI5_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN9) +#define GPIO_SPI5_MOSI_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN11) +#define GPIO_SPI5_NSS_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN6) +#define GPIO_SPI5_NSS_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN5) +#define GPIO_SPI5_SCK_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTF|GPIO_PIN7) +#define GPIO_SPI5_SCK_2 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTH|GPIO_PIN6) + +#define GPIO_SPI6_MISO_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN12) +#define GPIO_SPI6_MOSI_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN14) +#define GPIO_SPI6_NSS_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN8) +#define GPIO_SPI6_SCK_1 (GPIO_ALT|GPIO_AF5|GPIO_SPEED_50MHz|GPIO_PORTG|GPIO_PIN13) +#define GPIO_SPI6_MISO_2 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN6) +#define GPIO_SPI6_MOSI_2 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN7) +#define GPIO_SPI6_NSS_2 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN4) +#define GPIO_SPI6_SCK_2 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN5) +#define GPIO_SPI6_MISO_3 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN4) +#define GPIO_SPI6_MOSI_3 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN5) +#define GPIO_SPI6_NSS_3 (GPIO_ALT|GPIO_AF7|GPIO_SPEED_50MHz|GPIO_PORTA|GPIO_PIN15) +#define GPIO_SPI6_SCK_3 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_50MHz|GPIO_PORTB|GPIO_PIN3) + +/* Timers */ + +#define GPIO_TIM1_BKIN_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN6) +#define GPIO_TIM1_BKIN_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN12) +#define GPIO_TIM1_BKIN_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN15) +#define GPIO_TIM1_BKIN2 (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN6) +#define GPIO_TIM1_CH1N_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM1_CH1N_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN13) +#define GPIO_TIM1_CH1N_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN8) +#define GPIO_TIM1_CH1IN_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN8) +#define GPIO_TIM1_CH1IN_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN9) +#define GPIO_TIM1_CH1OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_TIM1_CH1OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN9) +#define GPIO_TIM1_CH1N_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM1_CH1N_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN13) +#define GPIO_TIM1_CH1N_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN8) +#define GPIO_TIM1_CH2IN_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN9) +#define GPIO_TIM1_CH2IN_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN11) +#define GPIO_TIM1_CH2OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9) +#define GPIO_TIM1_CH2OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN11) +#define GPIO_TIM1_CH2N_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN0) +#define GPIO_TIM1_CH2N_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN14) +#define GPIO_TIM1_CH2N_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN10) +#define GPIO_TIM1_CH3IN_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN10) +#define GPIO_TIM1_CH3IN_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN13) +#define GPIO_TIM1_CH3OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10) +#define GPIO_TIM1_CH3OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN13) +#define GPIO_TIM1_CH3N_1 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN1) +#define GPIO_TIM1_CH3N_2 (GPIO_ALT|GPIO_AF1|GPIO_PORTB|GPIO_PIN15) +#define GPIO_TIM1_CH3N_3 (GPIO_ALT|GPIO_AF1|GPIO_PORTE|GPIO_PIN12) +#define GPIO_TIM1_CH4IN_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN11) +#define GPIO_TIM1_CH4IN_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN14) +#define GPIO_TIM1_CH4OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) +#define GPIO_TIM1_CH4OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN14) +#define GPIO_TIM1_ETR_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN12) +#define GPIO_TIM1_ETR_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN7) + +#define GPIO_TIM2_CH1IN_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM2_CH1IN_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN15) +#define GPIO_TIM2_CH1IN_3 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN5) +#define GPIO_TIM2_CH1OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM2_CH1OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15) +#define GPIO_TIM2_CH1OUT_3 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN5) +#define GPIO_TIM2_CH2IN_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN1) +#define GPIO_TIM2_CH2IN_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN3) +#define GPIO_TIM2_CH2OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) +#define GPIO_TIM2_CH2OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3) +#define GPIO_TIM2_CH3IN_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM2_CH3IN_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN10) +#define GPIO_TIM2_CH3OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM2_CH3OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) +#define GPIO_TIM2_CH4IN_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM2_CH4IN_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN11) +#define GPIO_TIM2_CH4OUT_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM2_CH4OUT_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11) +#define GPIO_TIM2_ETR_1 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM2_ETR_2 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN15) +#define GPIO_TIM2_ETR_3 (GPIO_ALT|GPIO_AF1|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN5) + +#define GPIO_TIM3_CH1IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN6) +#define GPIO_TIM3_CH1IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN4) +#define GPIO_TIM3_CH1IN_3 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN6) +#define GPIO_TIM3_CH1OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6) +#define GPIO_TIM3_CH1OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) +#define GPIO_TIM3_CH1OUT_3 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) +#define GPIO_TIM3_CH2IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM3_CH2IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN5) +#define GPIO_TIM3_CH2IN_3 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN7) +#define GPIO_TIM3_CH2OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM3_CH2OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) +#define GPIO_TIM3_CH2OUT_3 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) +#define GPIO_TIM3_CH3IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN0) +#define GPIO_TIM3_CH3IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN8) +#define GPIO_TIM3_CH3OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN0) +#define GPIO_TIM3_CH3OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) +#define GPIO_TIM3_CH4IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN1) +#define GPIO_TIM3_CH4IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN9) +#define GPIO_TIM3_CH4OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN1) +#define GPIO_TIM3_CH4OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) +#define GPIO_TIM3_ETR (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN2) + +#define GPIO_TIM4_CH1IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN6) +#define GPIO_TIM4_CH1IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN12) +#define GPIO_TIM4_CH1OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) +#define GPIO_TIM4_CH1OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN12) +#define GPIO_TIM4_CH2IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN7) +#define GPIO_TIM4_CH2IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN13) +#define GPIO_TIM4_CH2OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7) +#define GPIO_TIM4_CH2OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN13) +#define GPIO_TIM4_CH3IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN8) +#define GPIO_TIM4_CH3IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN14) +#define GPIO_TIM4_CH3OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_TIM4_CH3OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN14) +#define GPIO_TIM4_CH4IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN9) +#define GPIO_TIM4_CH4IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN15) +#define GPIO_TIM4_CH4OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) +#define GPIO_TIM4_CH4OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN15) +#define GPIO_TIM4_ETR (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN0) + +#define GPIO_TIM5_CH1IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM5_CH1IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN10) +#define GPIO_TIM5_CH1OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM5_CH1OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN10) + +#define GPIO_TIM5_CH2IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN1) +#define GPIO_TIM5_CH2IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN11) +#define GPIO_TIM5_CH2OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) +#define GPIO_TIM5_CH2OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN11) + +#define GPIO_TIM5_CH3IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM5_CH3IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN12) +#define GPIO_TIM5_CH3OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM5_CH3OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN12) + +#define GPIO_TIM5_CH4IN_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM5_CH4IN_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN0) +#define GPIO_TIM5_CH4OUT_1 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM5_CH4OUT_2 (GPIO_ALT|GPIO_AF2|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN0) + +#define GPIO_TIM8_BKIN_1 (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN6) +#define GPIO_TIM8_BKIN_2 (GPIO_ALT|GPIO_AF3|GPIO_PORTI|GPIO_PIN4) +#define GPIO_TIM8_BKIN2_1 (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN8) +#define GPIO_TIM8_BKIN2_2 (GPIO_ALT|GPIO_AF3|GPIO_PORTI|GPIO_PIN1) +#define GPIO_TIM8_CH1IN_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN6) +#define GPIO_TIM8_CH1IN_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN5) +#define GPIO_TIM8_CH1OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) +#define GPIO_TIM8_CH1OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN5) +#define GPIO_TIM8_CH1N_1 (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN5) +#define GPIO_TIM8_CH1N_2 (GPIO_ALT|GPIO_AF3|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM8_CH1N_3 (GPIO_ALT|GPIO_AF3|GPIO_PORTH|GPIO_PIN13) +#define GPIO_TIM8_CH2IN_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN7) +#define GPIO_TIM8_CH2IN_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN6) +#define GPIO_TIM8_CH2OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) +#define GPIO_TIM8_CH2OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN6) +#define GPIO_TIM8_CH2N_1 (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN0) +#define GPIO_TIM8_CH2N_2 (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN14) +#define GPIO_TIM8_CH2N_3 (GPIO_ALT|GPIO_AF3|GPIO_PORTH|GPIO_PIN14) +#define GPIO_TIM8_CH3IN_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN8) +#define GPIO_TIM8_CH3IN_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN7) +#define GPIO_TIM8_CH3OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN8) +#define GPIO_TIM8_CH3OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN7) +#define GPIO_TIM8_CH3N_1 (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN1) +#define GPIO_TIM8_CH3N_2 (GPIO_ALT|GPIO_AF3|GPIO_PORTB|GPIO_PIN15) +#define GPIO_TIM8_CH3N_3 (GPIO_ALT|GPIO_AF3|GPIO_PORTH|GPIO_PIN15) +#define GPIO_TIM8_CH4IN_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN9) +#define GPIO_TIM8_CH4IN_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN2) +#define GPIO_TIM8_CH4OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN9) +#define GPIO_TIM8_CH4OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN2) +#define GPIO_TIM8_ETR_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN0) +#define GPIO_TIM8_ETR_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTI|GPIO_PIN3) + +#define GPIO_TIM9_CH1IN_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM9_CH1IN_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN5) +#define GPIO_TIM9_CH1OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) +#define GPIO_TIM9_CH1OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN5) +#define GPIO_TIM9_CH2IN_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM9_CH2IN_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTE|GPIO_PIN6) +#define GPIO_TIM9_CH2OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) +#define GPIO_TIM9_CH2OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN6) + +#define GPIO_TIM10_CH1IN_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN8) +#define GPIO_TIM10_CH1IN_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN6) +#define GPIO_TIM10_CH1OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_TIM10_CH1OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN6) + +#define GPIO_TIM11_CH1IN_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN9) +#define GPIO_TIM11_CH1IN_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN7) +#define GPIO_TIM11_CH1OUT_1 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) +#define GPIO_TIM11_CH1OUT_2 (GPIO_ALT|GPIO_AF3|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN7) + +#define GPIO_TIM12_CH1IN_1 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN14) +#define GPIO_TIM12_CH1IN_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN6) +#define GPIO_TIM12_CH1OUT_1 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14) +#define GPIO_TIM12_CH1OUT_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN6) + +#define GPIO_TIM12_CH2IN_1 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTB|GPIO_PIN15) +#define GPIO_TIM12_CH2IN_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTH|GPIO_PIN9) +#define GPIO_TIM12_CH2OUT_1 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) +#define GPIO_TIM12_CH2OUT_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN9) + +#define GPIO_TIM13_CH1IN_1 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN6) +#define GPIO_TIM13_CH1IN_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN8) +#define GPIO_TIM13_CH1OUT_1 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN6) +#define GPIO_TIM13_CH1OUT_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN8) + +#define GPIO_TIM14_CH1IN_1 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM14_CH1IN_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_FLOAT|GPIO_PORTF|GPIO_PIN9) +#define GPIO_TIM14_CH1OUT_1 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN7) +#define GPIO_TIM14_CH1OUT_2 (GPIO_ALT|GPIO_AF9|GPIO_SPEED_50MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN9) + +/* Trace */ + +#define GPIO_TRACECLK (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN2) +#define GPIO_TRACED0_1 (GPIO_ALT|GPIO_AF0|GPIO_PORTC|GPIO_PIN1) +#define GPIO_TRACED0_2 (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN3) +#define GPIO_TRACED0_3 (GPIO_ALT|GPIO_AF0|GPIO_PORTG|GPIO_PIN13) +#define GPIO_TRACED1_1 (GPIO_ALT|GPIO_AF0|GPIO_PORTC|GPIO_PIN8) +#define GPIO_TRACED1_2 (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN4) +#define GPIO_TRACED1_3 (GPIO_ALT|GPIO_AF0|GPIO_PORTG|GPIO_PIN14) +#define GPIO_TRACED2_1 (GPIO_ALT|GPIO_AF0|GPIO_PORTD|GPIO_PIN2) +#define GPIO_TRACED2_2 (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN5) +#define GPIO_TRACED3_1 (GPIO_ALT|GPIO_AF0|GPIO_PORTC|GPIO_PIN12) +#define GPIO_TRACED3_2 (GPIO_ALT|GPIO_AF0|GPIO_PORTE|GPIO_PIN6) +#define GPIO_TRACESWO (GPIO_ALT|GPIO_AF0|GPIO_PORTB|GPIO_PIN3) + +/* UARTs/USARTs */ + +#define GPIO_USART1_CK (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN8) +#define GPIO_USART1_CTS (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN11) +#define GPIO_USART1_RTS (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN12) +#define GPIO_USART1_RX_1 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN10) +#define GPIO_USART1_RX_2 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN7) +#define GPIO_USART1_RX_3 (GPIO_ALT|GPIO_AF4|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN15) +#define GPIO_USART1_TX_1 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN9) +#define GPIO_USART1_TX_2 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) +#define GPIO_USART1_TX_3 (GPIO_ALT|GPIO_AF4|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN14) + +#define GPIO_USART2_CK_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN4) +#define GPIO_USART2_CK_2 (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN7) +#define GPIO_USART2_CTS_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN0) +#define GPIO_USART2_CTS_2 (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN3) +#define GPIO_USART2_RTS_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTA|GPIO_PIN1) +#define GPIO_USART2_RTS_2 (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN4) +#define GPIO_USART2_RX_1 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN3) +#define GPIO_USART2_RX_2 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN6) +#define GPIO_USART2_TX_1 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN2) +#define GPIO_USART2_TX_2 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN5) + +#define GPIO_USART3_CK_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN12) +#define GPIO_USART3_CK_2 (GPIO_ALT|GPIO_AF7|GPIO_PORTC|GPIO_PIN12) +#define GPIO_USART3_CK_3 (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN10) +#define GPIO_USART3_CTS_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN13) +#define GPIO_USART3_CTS_2 (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN11) +#define GPIO_USART3_RTS_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTB|GPIO_PIN14) +#define GPIO_USART3_RTS_2 (GPIO_ALT|GPIO_AF7|GPIO_PORTD|GPIO_PIN12) +#define GPIO_USART3_RX_1 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN11) +#define GPIO_USART3_RX_2 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11) +#define GPIO_USART3_RX_3 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN9) +#define GPIO_USART3_TX_1 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN10) +#define GPIO_USART3_TX_2 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10) +#define GPIO_USART3_TX_3 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN8) + +#define GPIO_UART4_CTS_1 (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN0) +#define GPIO_UART4_CTS_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN15) +#define GPIO_UART4_RTS_1 (GPIO_ALT|GPIO_AF8|GPIO_PORTA|GPIO_PIN15) +#define GPIO_UART4_RTS_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTB|GPIO_PIN14) +#define GPIO_UART4_RX_1 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN1) +#define GPIO_UART4_RX_2 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN11) +#define GPIO_UART4_RX_3 (GPIO_ALT|GPIO_AF6|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN11) +#define GPIO_UART4_RX_4 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN0) +#define GPIO_UART4_RX_5 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN14) +#define GPIO_UART4_RX_6 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTI|GPIO_PIN9) +#define GPIO_UART4_TX_1 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN0) +#define GPIO_UART4_TX_2 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN10) +#define GPIO_UART4_TX_3 (GPIO_ALT|GPIO_AF6|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN12) +#define GPIO_UART4_TX_4 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN1) +#define GPIO_UART4_TX_5 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTH|GPIO_PIN13) + +#define GPIO_UART5_CTS_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTC|GPIO_PIN9) +#define GPIO_UART5_RTS_1 (GPIO_ALT|GPIO_AF7|GPIO_PORTC|GPIO_PIN8) +#define GPIO_UART5_RX_1 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN2) +#define GPIO_UART5_TX_1 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN12) +#define GPIO_UART5_RX_2 (GPIO_ALT|GPIO_AF1|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN5) +#define GPIO_UART5_TX_2 (GPIO_ALT|GPIO_AF1|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN6) +#define GPIO_UART5_RX_3 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN12) +#define GPIO_UART5_TX_3 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN13) +#define GPIO_UART5_RX_4 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8) +#define GPIO_UART5_TX_4 (GPIO_ALT|GPIO_AF7|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN9) + +#define GPIO_USART6_CK_1 (GPIO_ALT|GPIO_AF8|GPIO_PORTC|GPIO_PIN8) +#define GPIO_USART6_CK_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN7) +#define GPIO_USART6_CTS_1 (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN13) +#define GPIO_USART6_CTS_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN15) +#define GPIO_USART6_RTS_1 (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN12) +#define GPIO_USART6_RTS_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN8) +#define GPIO_USART6_RX_1 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN7) +#define GPIO_USART6_RX_2 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN9) +#define GPIO_USART6_TX_1 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTC|GPIO_PIN6) +#define GPIO_USART6_TX_2 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN14) + +#define GPIO_UART7_CTS_1 (GPIO_ALT|GPIO_AF8|GPIO_PORTE|GPIO_PIN10) +#define GPIO_UART7_CTS_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTF|GPIO_PIN9) +#define GPIO_UART7_RTS_1 (GPIO_ALT|GPIO_AF8|GPIO_PORTE|GPIO_PIN9) +#define GPIO_UART7_RTS_2 (GPIO_ALT|GPIO_AF8|GPIO_PORTF|GPIO_PIN8) +#define GPIO_UART7_RX_1 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN7) +#define GPIO_UART7_RX_2 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN6) +#define GPIO_UART7_RX_3 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN8) +#define GPIO_UART7_RX_4 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN3) +#define GPIO_UART7_TX_1 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN8) +#define GPIO_UART7_TX_2 (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTF|GPIO_PIN7) +#define GPIO_UART7_TX_3 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTA|GPIO_PIN15) +#define GPIO_UART7_TX_4 (GPIO_ALT|GPIO_AF12|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN4) + +#define GPIO_UART8_CTS (GPIO_ALT|GPIO_AF8|GPIO_PORTD|GPIO_PIN14) +#define GPIO_UART8_RTS (GPIO_ALT|GPIO_AF8|GPIO_PORTD|GPIO_PIN15) +#define GPIO_UART8_RX (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN0) +#define GPIO_UART8_TX (GPIO_ALT|GPIO_AF8|GPIO_PULLUP|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTE|GPIO_PIN1) + +#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ +#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_PINMAP_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pwr.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pwr.h new file mode 100644 index 00000000000..21f78951f94 --- /dev/null +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_pwr.h @@ -0,0 +1,159 @@ +/************************************************************************************ + * arch/arm/src/stm32f7/chip/stm32f76xx77xx_pwr.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_PWR_H +#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_PWR_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F76XX) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Register Offsets *****************************************************************/ + +#define STM32_PWR_CR1_OFFSET 0x0000 /* Power control register 1 */ +#define STM32_PWR_CSR1_OFFSET 0x0004 /* Power control/status register 1 */ +#define STM32_PWR_CR2_OFFSET 0x0008 /* Power control register 1 */ +#define STM32_PWR_CSR2_OFFSET 0x000c /* Power control/status register 1 */ + +/* Register Addresses ***************************************************************/ + +#define STM32_PWR_CR1 (STM32_PWR_BASE+STM32_PWR_CR1_OFFSET) +#define STM32_PWR_CSR1 (STM32_PWR_BASE+STM32_PWR_CSR1_OFFSET) +#define STM32_PWR_CR2 (STM32_PWR_BASE+STM32_PWR_CR2_OFFSET) +#define STM32_PWR_CSR2 (STM32_PWR_BASE+STM32_PWR_CSR2_OFFSET) + +/* Register Bitfield Definitions ****************************************************/ + +/* Power control register 1 */ + +#define PWR_CR1_LPDS (1 << 0) /* Bit 0: Low-Power Deepsleep/sleep; low power run */ +#define PWR_CR1_PDDS (1 << 1) /* Bit 1: Power Down Deepsleep */ +#define PWR_CR1_CSBF (1 << 3) /* Bit 3: Clear Standby Flag */ +#define PWR_CR1_PVDE (1 << 4) /* Bit 4: Power Voltage Detector Enable */ +#define PWR_CR1_PLS_SHIFT (5) /* Bits 7-5: PVD Level Selection */ +#define PWR_CR1_PLS_MASK (7 << PWR_CR1_PLS_SHIFT) +# define PWR_CR1_2p0V (0 << PWR_CR1_PLS_SHIFT) /* 000: 2.0V */ +# define PWR_CR1_2p1V (1 << PWR_CR1_PLS_SHIFT) /* 001: 2.1V */ +# define PWR_CR1_2p3V (2 << PWR_CR1_PLS_SHIFT) /* 010: 2.3V */ +# define PWR_CR1_2p5V (3 << PWR_CR1_PLS_SHIFT) /* 011: 2.5V */ +# define PWR_CR1_2p6V (4 << PWR_CR1_PLS_SHIFT) /* 100: 2.6V */ +# define PWR_CR1_2p7V (5 << PWR_CR1_PLS_SHIFT) /* 101: 2.7V */ +# define PWR_CR1_2p8V (6 << PWR_CR1_PLS_SHIFT) /* 110: 2.8V */ +# define PWR_CR1_2p9V (7 << PWR_CR1_PLS_SHIFT) /* 111: 2.9V */ +#define PWR_CR1_DBP (1 << 8) /* Bit 8: Disable Backup Domain write protection */ +#define PWR_CR1_FPDS (1 << 9) /* Bit 9: Flash power down in Stop mode */ +#define PWR_CR1_LPUDS (1 << 10) /* Bit 10: Low-power regulator in deepsleep under-drive mode */ +#define PWR_CR1_MRUDS (1 << 11) /* Bit 11: Main regulator in deepsleep under-drive mode */ +#define PWR_CR1_ADCDC1 (1 << 13) /* Bit 13: see AN4073 for details */ +#define PWR_CR1_VOS_SHIFT (14) /* Bits 14-15: Regulator voltage scaling output selection */ +#define PWR_CR1_VOS_MASK (3 << PWR_CR1_VOS_SHIFT) +# define PWR_CR1_VOS_SCALE_3 (1 << PWR_CR1_VOS_SHIFT) /* Fmax = 144MHz */ +# define PWR_CR1_VOS_SCALE_2 (2 << PWR_CR1_VOS_SHIFT) /* Fmax = 168/180MHz */ +# define PWR_CR1_VOS_SCALE_1 (3 << PWR_CR1_VOS_SHIFT) /* Fmax = 180/216MHz */ +#define PWR_CR1_ODEN (1 << 16) /* Bit 16: Over Drive enable */ +#define PWR_CR1_ODSWEN (1 << 17) /* Bit 17: Over Drive switch enabled */ +#define PWR_CR1_UDEN_SHIFT (18) /* Bits 18-19: Under-drive enable in stop mode */ +#define PWR_CR1_UDEN_MASK (3 << PWR_CR1_UDEN_SHIFT) +# define PWR_CR1_UDEN_DISABLE (0 << PWR_CR1_UDEN_SHIFT) /* Under-drive disable */ +# define PWR_CR1_UDEN_ENABLE (3 << PWR_CR1_UDEN_SHIFT) /* Under-drive enable */ + +/* Power control/status register 1 */ + +#define PWR_CSR1_WUIF (1 << 0) /* Bit 0: Wakeup internal flag */ +#define PWR_CSR1_SBF (1 << 1) /* Bit 1: Standby flag */ +#define PWR_CSR1_PVDO (1 << 2) /* Bit 2: PVD Output */ +#define PWR_CSR1_BRR (1 << 3) /* Bit 3: Backup regulator ready */ +#define PWR_CSR1_BRE (1 << 9) /* Bit 9: Backup regulator enable */ +#define PWR_CSR1_VOSRDY (1 << 14) /* Bit 14: Regulator voltage scaling output selection ready bite */ +#define PWR_CSR1_ODRDY (1 << 16) /* Bit 16: Over Drive generator ready */ +#define PWR_CSR1_ODSWRDY (1 << 17) /* Bit 17: Over Drive Switch ready */ +#define PWR_CSR1_UDSRDY_SHIFT (18) /* Bits 18-19: Under-drive ready flag */ +#define PWR_CSR1_UDSRDY_MASK (3 << PWR_CSR1_UDSRDY_SHIFT) +# define PWR_CSR1_UDSRDY_DISAB (0 << PWR_CSR1_UDSRDY_SHIFT) /* Under-drive is disabled */ +# define PWR_CSR1_UDSRDY_STOP (3 << PWR_CSR1_UDSRDY_SHIFT) /* Under-drive mode is activated in Stop mode */ + +/* Power control register 2 */ + +#define PWR_CR2_CWUPF1 (1 << 0) /* Bit 0: Clear Wakeup Pin flag for PA0 */ +#define PWR_CR2_CWUPF2 (1 << 1) /* Bit 1: Clear Wakeup Pin flag for PA2 */ +#define PWR_CR2_CWUPF3 (1 << 2) /* Bit 2: Clear Wakeup Pin flag for PC1 */ +#define PWR_CR2_CWUPF4 (1 << 3) /* Bit 3: Clear Wakeup Pin flag for PC13 */ +#define PWR_CR2_CWUPF5 (1 << 4) /* Bit 4: Clear Wakeup Pin flag for PI8 */ +#define PWR_CR2_CWUPF6 (1 << 5) /* Bit 5: Clear Wakeup Pin flag for PI11 */ +#define PWR_CR2_WUPP1 (1 << 8) /* Bit 8: Wakeup pin polarity bit for PA0 */ +# define PWR_CR2_WUPP1_RISING (0 << 8) /* 0=Detection on rising edge */ +# define PWR_CR2_WUPP1_FALLING (1 << 8) /* 1= Detection on falling edge */ +#define PWR_CR2_WUPP2 (1 << 9) /* Bit 9: Wakeup pin polarity bit for PA2 */ +# define PWR_CR2_WUPP2_RISING (0 << 9) /* 0=Detection on rising edge */ +# define PWR_CR2_WUPP2_FALLING (1 << 9) /* 1= Detection on falling edge */ +#define PWR_CR2_WUPP3 (1 << 10) /* Bit 10: Wakeup pin polarity bit for PC1 */ +# define PWR_CR2_WUPP3_RISING (0 << 10) /* 0=Detection on rising edge */ +# define PWR_CR2_WUPP3_FALLING (1 << 10) /* 1= Detection on falling edge */ +#define PWR_CR2_WUPP4 (1 << 11) /* Bit 11: Wakeup pin polarity bit for PC13 */ +# define PWR_CR2_WUPP4_RISING (0 << 11) /* 0=Detection on rising edge */ +# define PWR_CR2_WUPP4_FALLING (1 << 11) /* 1= Detection on falling edge */ +#define PWR_CR2_WUPP5 (1 << 12) /* Bit 12: Wakeup pin polarity bit for PI8 */ +# define PWR_CR2_WUPP5_RISING (0 << 12) /* 0=Detection on rising edge */ +# define PWR_CR2_WUPP5_FALLING (1 << 12) /* 1= Detection on falling edge */ +#define PWR_CR2_WUPP6 (1 << 13) /* Bits 13: Wakeup pin polarity bit for PI11 */ +# define PWR_CR2_WUPP6_RISING (0 << 13) /* 0=Detection on rising edge */ +# define PWR_CR2_WUPP6_FALLING (1 << 13) /* 1= Detection on falling edge */ + +/* Power control/status register 2 */ + +#define PWR_CSR2_WUPF1 (1 << 0) /* Bit 0: Wakeup Pin flag for PA0 */ +#define PWR_CSR2_WUPF2 (1 << 1) /* Bit 1: Wakeup Pin flag for PA2 */ +#define PWR_CSR2_WUPF3 (1 << 2) /* Bit 2: Wakeup Pin flag for PC1 */ +#define PWR_CSR2_WUPF4 (1 << 3) /* Bit 3: Wakeup Pin flag for PC13 */ +#define PWR_CSR2_WUPF5 (1 << 4) /* Bit 4: Wakeup Pin flag for PI8 */ +#define PWR_CSR2_WUPF6 (1 << 5) /* Bit 5: Wakeup Pin flag for PI11 */ +#define PWR_CSR2_EWUP1 (1 << 8) /* Bit 8: Enable wakeup pin for PA0 */ +#define PWR_CSR2_EWUP2 (1 << 9) /* Bit 9: Enable wakeup pin for PA2 */ +#define PWR_CSR2_EWUP3 (1 << 10) /* Bit 10: Enable wakeup pin for PC1 */ +#define PWR_CSR2_EWUP4 (1 << 11) /* Bit 11: Enable wakeup pin for PC13 */ +#define PWR_CSR2_EWUP5 (1 << 12) /* Bit 12: Enable wakeup pin for PI8 */ +#define PWR_CSR2_EWUP6 (1 << 13) /* Bit 13: Enable wakeup pin for PI11 */ + +#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ +#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_PWR_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_rcc.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_rcc.h new file mode 100644 index 00000000000..23c8b2db0b2 --- /dev/null +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_rcc.h @@ -0,0 +1,737 @@ +/**************************************************************************************************** + * arch/arm/src/stm32f7/chip/stm32f74xx75xx_rcc.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_RCC_H +#define __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_RCC_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include + +#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ + +/* Register Offsets *********************************************************************************/ + +#define STM32_RCC_CR_OFFSET 0x0000 /* Clock control register */ +#define STM32_RCC_PLLCFG_OFFSET 0x0004 /* PLL configuration register */ +#define STM32_RCC_CFGR_OFFSET 0x0008 /* Clock configuration register */ +#define STM32_RCC_CIR_OFFSET 0x000c /* Clock interrupt register */ +#define STM32_RCC_AHB1RSTR_OFFSET 0x0010 /* AHB1 peripheral reset register */ +#define STM32_RCC_AHB2RSTR_OFFSET 0x0014 /* AHB2 peripheral reset register */ +#define STM32_RCC_AHB3RSTR_OFFSET 0x0018 /* AHB3 peripheral reset register */ +#define STM32_RCC_APB1RSTR_OFFSET 0x0020 /* APB1 Peripheral reset register */ +#define STM32_RCC_APB2RSTR_OFFSET 0x0024 /* APB2 Peripheral reset register */ +#define STM32_RCC_AHB1ENR_OFFSET 0x0030 /* AHB1 Peripheral Clock enable register */ +#define STM32_RCC_AHB2ENR_OFFSET 0x0034 /* AHB2 Peripheral Clock enable register */ +#define STM32_RCC_AHB3ENR_OFFSET 0x0038 /* AHB3 Peripheral Clock enable register */ +#define STM32_RCC_APB1ENR_OFFSET 0x0040 /* APB1 Peripheral Clock enable register */ +#define STM32_RCC_APB2ENR_OFFSET 0x0044 /* APB2 Peripheral Clock enable register */ +#define STM32_RCC_AHB1LPENR_OFFSET 0x0050 /* RCC AHB1 low power mode peripheral clock enable register */ +#define STM32_RCC_AHB2LPENR_OFFSET 0x0054 /* RCC AHB2 low power mode peripheral clock enable register */ +#define STM32_RCC_AHB3LPENR_OFFSET 0x0058 /* RCC AHB3 low power mode peripheral clock enable register */ +#define STM32_RCC_APB1LPENR_OFFSET 0x0060 /* RCC APB1 low power mode peripheral clock enable register */ +#define STM32_RCC_APB2LPENR_OFFSET 0x0064 /* RCC APB2 low power mode peripheral clock enable register */ +#define STM32_RCC_BDCR_OFFSET 0x0070 /* Backup domain control register */ +#define STM32_RCC_CSR_OFFSET 0x0074 /* Control/status register */ +#define STM32_RCC_SSCGR_OFFSET 0x0080 /* Spread spectrum clock generation register */ +#define STM32_RCC_PLLI2SCFGR_OFFSET 0x0084 /* PLLI2S configuration register */ +#define STM32_RCC_PLLSAICFGR_OFFSET 0x0088 /* PLLSAI configuration register */ +#define STM32_RCC_DCKCFGR1_OFFSET 0x008c /* Dedicated clocks configuration register 1 */ +#define STM32_RCC_DCKCFGR2_OFFSET 0x0090 /* Dedicated clocks configuration register 2 */ + +/* Register Addresses *******************************************************************************/ + +#define STM32_RCC_CR (STM32_RCC_BASE+STM32_RCC_CR_OFFSET) +#define STM32_RCC_PLLCFG (STM32_RCC_BASE+STM32_RCC_PLLCFG_OFFSET) +#define STM32_RCC_CFGR (STM32_RCC_BASE+STM32_RCC_CFGR_OFFSET) +#define STM32_RCC_CIR (STM32_RCC_BASE+STM32_RCC_CIR_OFFSET) +#define STM32_RCC_AHB1RSTR (STM32_RCC_BASE+STM32_RCC_AHB1RSTR_OFFSET) +#define STM32_RCC_AHB2RSTR (STM32_RCC_BASE+STM32_RCC_AHB2RSTR_OFFSET) +#define STM32_RCC_AHB3RSTR (STM32_RCC_BASE+STM32_RCC_AHB3RSTR_OFFSET) +#define STM32_RCC_APB1RSTR (STM32_RCC_BASE+STM32_RCC_APB1RSTR_OFFSET) +#define STM32_RCC_APB2RSTR (STM32_RCC_BASE+STM32_RCC_APB2RSTR_OFFSET) +#define STM32_RCC_AHB1ENR (STM32_RCC_BASE+STM32_RCC_AHB1ENR_OFFSET) +#define STM32_RCC_AHB2ENR (STM32_RCC_BASE+STM32_RCC_AHB2ENR_OFFSET) +#define STM32_RCC_AHB3ENR (STM32_RCC_BASE+STM32_RCC_AHB3ENR_OFFSET) +#define STM32_RCC_APB1ENR (STM32_RCC_BASE+STM32_RCC_APB1ENR_OFFSET) +#define STM32_RCC_APB2ENR (STM32_RCC_BASE+STM32_RCC_APB2ENR_OFFSET) +#define STM32_RCC_AHB1LPENR (STM32_RCC_BASE+STM32_RCC_AHB1LPENR_OFFSET) +#define STM32_RCC_AHB2LPENR (STM32_RCC_BASE+STM32_RCC_AHB2LPENR) +#define STM32_RCC_AHB3LPENR (STM32_RCC_BASE+STM32_RCC_AHB3LPENR_OFFSET) +#define STM32_RCC_APB1LPENR (STM32_RCC_BASE+STM32_RCC_APB1LPENR_OFFSET) +#define STM32_RCC_APB2LPENR (STM32_RCC_BASE+STM32_RCC_APB2LPENR_OFFSET) +#define STM32_RCC_BDCR (STM32_RCC_BASE+STM32_RCC_BDCR_OFFSET) +#define STM32_RCC_CSR (STM32_RCC_BASE+STM32_RCC_CSR_OFFSET) +#define STM32_RCC_SSCGR (STM32_RCC_BASE+STM32_RCC_SSCGR_OFFSET) +#define STM32_RCC_PLLI2SCFGR (STM32_RCC_BASE+STM32_RCC_PLLI2SCFGR_OFFSET) +#define STM32_RCC_PLLSAICFGR (STM32_RCC_BASE+STM32_RCC_PLLSAICFGR_OFFSET) +#define STM32_RCC_DCKCFGR1 (STM32_RCC_BASE+STM32_RCC_DCKCFGR1_OFFSET) +#define STM32_RCC_DCKCFGR2 (STM32_RCC_BASE+STM32_RCC_DCKCFGR2_OFFSET) + +/* Register Bitfield Definitions ********************************************************************/ + +/* Clock control register */ + +#define RCC_CR_HSION (1 << 0) /* Bit 0: Internal High Speed clock enable */ +#define RCC_CR_HSIRDY (1 << 1) /* Bit 1: Internal High Speed clock ready flag */ +#define RCC_CR_HSITRIM_SHIFT (3) /* Bits 7-3: Internal High Speed clock trimming */ +#define RCC_CR_HSITRIM_MASK (0x1f << RCC_CR_HSITRIM_SHIFT) +#define RCC_CR_HSICAL_SHIFT (8) /* Bits 15-8: Internal High Speed clock Calibration */ +#define RCC_CR_HSICAL_MASK (0xff << RCC_CR_HSICAL_SHIFT) +#define RCC_CR_HSEON (1 << 16) /* Bit 16: External High Speed clock enable */ +#define RCC_CR_HSERDY (1 << 17) /* Bit 17: External High Speed clock ready flag */ +#define RCC_CR_HSEBYP (1 << 18) /* Bit 18: External High Speed clock Bypass */ +#define RCC_CR_CSSON (1 << 19) /* Bit 19: Clock Security System enable */ +#define RCC_CR_PLLON (1 << 24) /* Bit 24: PLL enable */ +#define RCC_CR_PLLRDY (1 << 25) /* Bit 25: PLL clock ready flag */ +#define RCC_CR_PLLI2SON (1 << 26) /* Bit 26: PLLI2S enable */ +#define RCC_CR_PLLI2SRDY (1 << 27) /* Bit 27: PLLI2S clock ready flag */ +#define RCC_CR_PLLSAION (1 << 28) /* Bit 28: PLLSAI enable */ +#define RCC_CR_PLLSAIRDY (1 << 29) /* Bit 29: PLLSAI clock ready flag */ + +/* PLL configuration register */ + +#define RCC_PLLCFG_PLLM_SHIFT (0) /* Bits 0-5: Main PLL (PLL) and audio PLL (PLLI2S) + * input clock divider */ +#define RCC_PLLCFG_PLLM_MASK (0x3f << RCC_PLLCFG_PLLM_SHIFT) +# define RCC_PLLCFG_PLLM(n) ((n) << RCC_PLLCFG_PLLM_SHIFT) /* n = 2..63 */ +#define RCC_PLLCFG_PLLN_SHIFT (6) /* Bits 6-14: Main PLL (PLL) VCO multiplier */ +#define RCC_PLLCFG_PLLN_MASK (0x1ff << RCC_PLLCFG_PLLN_SHIFT) +# define RCC_PLLCFG_PLLN(n) ((n) << RCC_PLLCFG_PLLN_SHIFT) /* n = 2..432 */ +#define RCC_PLLCFG_PLLP_SHIFT (16) /* Bits 16-17: Main PLL (PLL) main system clock divider */ +#define RCC_PLLCFG_PLLP_MASK (3 << RCC_PLLCFG_PLLP_SHIFT) +# define RCC_PLLCFG_PLLP(n) ((((n)>>1)-1)<< RCC_PLLCFG_PLLP_SHIFT) /* n=2,4,6,8 */ +# define RCC_PLLCFG_PLLP_2 (0 << RCC_PLLCFG_PLLP_SHIFT) /* 00: PLLP = 2 */ +# define RCC_PLLCFG_PLLP_4 (1 << RCC_PLLCFG_PLLP_SHIFT) /* 01: PLLP = 4 */ +# define RCC_PLLCFG_PLLP_6 (2 << RCC_PLLCFG_PLLP_SHIFT) /* 10: PLLP = 6 */ +# define RCC_PLLCFG_PLLP_8 (3 << RCC_PLLCFG_PLLP_SHIFT) /* 11: PLLP = 8 */ +#define RCC_PLLCFG_PLLSRC (1 << 22) /* Bit 22: Main PLL(PLL) and audio PLL (PLLI2S) + * entry clock source */ +# define RCC_PLLCFG_PLLSRC_HSI (0) +# define RCC_PLLCFG_PLLSRC_HSE RCC_PLLCFG_PLLSRC +#define RCC_PLLCFG_PLLQ_SHIFT (24) /* Bits 24-27: Main PLL (PLL) divider + * (USB OTG FS, SDIO and RNG clocks) */ +#define RCC_PLLCFG_PLLQ_MASK (15 << RCC_PLLCFG_PLLQ_SHIFT) +# define RCC_PLLCFG_PLLQ(n) ((n) << RCC_PLLCFG_PLLQ_SHIFT) /* n=2..15 */ + +#define RCC_PLLCFG_PLLR_SHIFT (28) /* Bits 28-30: PLL division factor for DSI clock */ +#define RCC_PLLCFG_PLLR_MASK (7 << RCC_PLLCFG_PLLR_SHIFT) +# define RCC_PLLCFG_PLLR(n) ((n) << RCC_PLLCFG_PLLR_SHIFT) /* n=2..7 */ + +#define RCC_PLLCFG_RESET (0x24003010) /* PLLCFG reset value */ + +/* Clock configuration register */ + +#define RCC_CFGR_SW_SHIFT (0) /* Bits 0-1: System clock Switch */ +#define RCC_CFGR_SW_MASK (3 << RCC_CFGR_SW_SHIFT) +# define RCC_CFGR_SW_HSI (0 << RCC_CFGR_SW_SHIFT) /* 00: HSI selected as system clock */ +# define RCC_CFGR_SW_HSE (1 << RCC_CFGR_SW_SHIFT) /* 01: HSE selected as system clock */ +# define RCC_CFGR_SW_PLL (2 << RCC_CFGR_SW_SHIFT) /* 10: PLL selected as system clock */ +#define RCC_CFGR_SWS_SHIFT (2) /* Bits 2-3: System Clock Switch Status */ +#define RCC_CFGR_SWS_MASK (3 << RCC_CFGR_SWS_SHIFT) +# define RCC_CFGR_SWS_HSI (0 << RCC_CFGR_SWS_SHIFT) /* 00: HSI oscillator used as system clock */ +# define RCC_CFGR_SWS_HSE (1 << RCC_CFGR_SWS_SHIFT) /* 01: HSE oscillator used as system clock */ +# define RCC_CFGR_SWS_PLL (2 << RCC_CFGR_SWS_SHIFT) /* 10: PLL used as system clock */ +#define RCC_CFGR_HPRE_SHIFT (4) /* Bits 4-7: AHB prescaler */ +#define RCC_CFGR_HPRE_MASK (0x0f << RCC_CFGR_HPRE_SHIFT) +# define RCC_CFGR_HPRE_SYSCLK (0 << RCC_CFGR_HPRE_SHIFT) /* 0xxx: SYSCLK not divided */ +# define RCC_CFGR_HPRE_SYSCLKd2 (8 << RCC_CFGR_HPRE_SHIFT) /* 1000: SYSCLK divided by 2 */ +# define RCC_CFGR_HPRE_SYSCLKd4 (9 << RCC_CFGR_HPRE_SHIFT) /* 1001: SYSCLK divided by 4 */ +# define RCC_CFGR_HPRE_SYSCLKd8 (10 << RCC_CFGR_HPRE_SHIFT) /* 1010: SYSCLK divided by 8 */ +# define RCC_CFGR_HPRE_SYSCLKd16 (11 << RCC_CFGR_HPRE_SHIFT) /* 1011: SYSCLK divided by 16 */ +# define RCC_CFGR_HPRE_SYSCLKd64 (12 << RCC_CFGR_HPRE_SHIFT) /* 1100: SYSCLK divided by 64 */ +# define RCC_CFGR_HPRE_SYSCLKd128 (13 << RCC_CFGR_HPRE_SHIFT) /* 1101: SYSCLK divided by 128 */ +# define RCC_CFGR_HPRE_SYSCLKd256 (14 << RCC_CFGR_HPRE_SHIFT) /* 1110: SYSCLK divided by 256 */ +# define RCC_CFGR_HPRE_SYSCLKd512 (15 << RCC_CFGR_HPRE_SHIFT) /* 1111: SYSCLK divided by 512 */ +#define RCC_CFGR_PPRE1_SHIFT (10) /* Bits 10-12: APB Low speed prescaler (APB1) */ +#define RCC_CFGR_PPRE1_MASK (7 << RCC_CFGR_PPRE1_SHIFT) +# define RCC_CFGR_PPRE1_HCLK (0 << RCC_CFGR_PPRE1_SHIFT) /* 0xx: HCLK not divided */ +# define RCC_CFGR_PPRE1_HCLKd2 (4 << RCC_CFGR_PPRE1_SHIFT) /* 100: HCLK divided by 2 */ +# define RCC_CFGR_PPRE1_HCLKd4 (5 << RCC_CFGR_PPRE1_SHIFT) /* 101: HCLK divided by 4 */ +# define RCC_CFGR_PPRE1_HCLKd8 (6 << RCC_CFGR_PPRE1_SHIFT) /* 110: HCLK divided by 8 */ +# define RCC_CFGR_PPRE1_HCLKd16 (7 << RCC_CFGR_PPRE1_SHIFT) /* 111: HCLK divided by 16 */ +#define RCC_CFGR_PPRE2_SHIFT (13) /* Bits 13-15: APB High speed prescaler (APB2) */ +#define RCC_CFGR_PPRE2_MASK (7 << RCC_CFGR_PPRE2_SHIFT) +# define RCC_CFGR_PPRE2_HCLK (0 << RCC_CFGR_PPRE2_SHIFT) /* 0xx: HCLK not divided */ +# define RCC_CFGR_PPRE2_HCLKd2 (4 << RCC_CFGR_PPRE2_SHIFT) /* 100: HCLK divided by 2 */ +# define RCC_CFGR_PPRE2_HCLKd4 (5 << RCC_CFGR_PPRE2_SHIFT) /* 101: HCLK divided by 4 */ +# define RCC_CFGR_PPRE2_HCLKd8 (6 << RCC_CFGR_PPRE2_SHIFT) /* 110: HCLK divided by 8 */ +# define RCC_CFGR_PPRE2_HCLKd16 (7 << RCC_CFGR_PPRE2_SHIFT) /* 111: HCLK divided by 16 */ +#define RCC_CFGR_RTCPRE_SHIFT (16) /* Bits 16-20: APB High speed prescaler (APB2) */ +#define RCC_CFGR_RTCPRE_MASK (31 << RCC_CFGR_RTCPRE_SHIFT) +# define RCC_CFGR_RTCPRE(n) ((n) << RCC_CFGR_RTCPRE_SHIFT) /* HSE/n, n=1..31 */ +#define RCC_CFGR_MCO1_SHIFT (21) /* Bits 21-22: Microcontroller Clock Output */ +#define RCC_CFGR_MCO1_MASK (3 << RCC_CFGR_MCO1_SHIFT) +# define RCC_CFGR_MCO1_HSI (0 << RCC_CFGR_MCO1_SHIFT) /* 00: HSI clock selected */ +# define RCC_CFGR_MCO1_LSE (1 << RCC_CFGR_MCO1_SHIFT) /* 01: LSE oscillator selected */ +# define RCC_CFGR_MCO1_HSE (2 << RCC_CFGR_MCO1_SHIFT) /* 10: HSE oscillator clock selected */ +# define RCC_CFGR_MCO1_PLL (3 << RCC_CFGR_MCO1_SHIFT) /* 11: PLL clock selected */ +#define RCC_CFGR_I2SSRC (1 << 23) /* Bit 23: I2S clock selection */ +#define RCC_CFGR_MCO1PRE_SHIFT (24) /* Bits 24-26: MCO1 prescaler */ +#define RCC_CFGR_MCO1PRE_MASK (7 << RCC_CFGR_MCO1PRE_SHIFT) +# define RCC_CFGR_MCO1PRE_NONE (0 << RCC_CFGR_MCO1PRE_SHIFT) /* 0xx: no division */ +# define RCC_CFGR_MCO1PRE_DIV2 (4 << RCC_CFGR_MCO1PRE_SHIFT) /* 100: division by 2 */ +# define RCC_CFGR_MCO1PRE_DIV3 (5 << RCC_CFGR_MCO1PRE_SHIFT) /* 101: division by 3 */ +# define RCC_CFGR_MCO1PRE_DIV4 (6 << RCC_CFGR_MCO1PRE_SHIFT) /* 110: division by 4 */ +# define RCC_CFGR_MCO1PRE_DIV5 (7 << RCC_CFGR_MCO1PRE_SHIFT) /* 111: division by 5 */ +#define RCC_CFGR_MCO2PRE_SHIFT (27) /* Bits 27-29: MCO2 prescaler */ +#define RCC_CFGR_MCO2PRE_MASK (7 << RCC_CFGR_MCO2PRE_SHIFT) +# define RCC_CFGR_MCO2PRE_NONE (0 << RCC_CFGR_MCO2PRE_SHIFT) /* 0xx: no division */ +# define RCC_CFGR_MCO2PRE_DIV2 (4 << RCC_CFGR_MCO2PRE_SHIFT) /* 100: division by 2 */ +# define RCC_CFGR_MCO2PRE_DIV3 (5 << RCC_CFGR_MCO2PRE_SHIFT) /* 101: division by 3 */ +# define RCC_CFGR_MCO2PRE_DIV4 (6 << RCC_CFGR_MCO2PRE_SHIFT) /* 110: division by 4 */ +# define RCC_CFGR_MCO2PRE_DIV5 (7 << RCC_CFGR_MCO2PRE_SHIFT) /* 111: division by 5 */ +#define RCC_CFGR_MCO2_SHIFT (30) /* Bits 30-31: Microcontroller clock output 2 */ +#define RCC_CFGR_MCO2_MASK (3 << RCC_CFGR_MCO2_SHIFT) +# define RCC_CFGR_MCO2_SYSCLK (0 << RCC_CFGR_MCO2_SHIFT) /* 00: System clock (SYSCLK) selected */ +# define RCC_CFGR_MCO2_PLLI2S (1 << RCC_CFGR_MCO2_SHIFT) /* 01: PLLI2S clock selected */ +# define RCC_CFGR_MCO2_HSE (2 << RCC_CFGR_MCO2_SHIFT) /* 10: HSE oscillator clock selected */ +# define RCC_CFGR_MCO2_PLL (3 << RCC_CFGR_MCO2_SHIFT) /* 11: PLL clock selected */ + +/* Clock interrupt register */ + +#define RCC_CIR_LSIRDYF (1 << 0) /* Bit 0: LSI Ready Interrupt flag */ +#define RCC_CIR_LSERDYF (1 << 1) /* Bit 1: LSE Ready Interrupt flag */ +#define RCC_CIR_HSIRDYF (1 << 2) /* Bit 2: HSI Ready Interrupt flag */ +#define RCC_CIR_HSERDYF (1 << 3) /* Bit 3: HSE Ready Interrupt flag */ +#define RCC_CIR_PLLRDYF (1 << 4) /* Bit 4: PLL Ready Interrupt flag */ +#define RCC_CIR_PLLI2SRDYF (1 << 5) /* Bit 5: PLLI2S Ready Interrupt flag */ +#define RCC_CIR_PLLSAIRDYF (1 << 6) /* Bit 6: PLLSAI Ready Interrupt flag */ +#define RCC_CIR_CSSF (1 << 7) /* Bit 7: Clock Security System Interrupt flag */ +#define RCC_CIR_LSIRDYIE (1 << 8) /* Bit 8: LSI Ready Interrupt Enable */ +#define RCC_CIR_LSERDYIE (1 << 9) /* Bit 9: LSE Ready Interrupt Enable */ +#define RCC_CIR_HSIRDYIE (1 << 10) /* Bit 10: HSI Ready Interrupt Enable */ +#define RCC_CIR_HSERDYIE (1 << 11) /* Bit 11: HSE Ready Interrupt Enable */ +#define RCC_CIR_PLLRDYIE (1 << 12) /* Bit 12: PLL Ready Interrupt Enable */ +#define RCC_CIR_PLLI2SRDYIE (1 << 13) /* Bit 13: PLLI2S Ready Interrupt enable */ +#define RCC_CIR_PLLSAIRDYIE (1 << 14) /* Bit 14: PLLSAI Ready Interrupt enable */ +#define RCC_CIR_LSIRDYC (1 << 16) /* Bit 16: LSI Ready Interrupt Clear */ +#define RCC_CIR_LSERDYC (1 << 17) /* Bit 17: LSE Ready Interrupt Clear */ +#define RCC_CIR_HSIRDYC (1 << 18) /* Bit 18: HSI Ready Interrupt Clear */ +#define RCC_CIR_HSERDYC (1 << 19) /* Bit 19: HSE Ready Interrupt Clear */ +#define RCC_CIR_PLLRDYC (1 << 20) /* Bit 20: PLL Ready Interrupt Clear */ +#define RCC_CIR_PLLI2SRDYC (1 << 21) /* Bit 21: PLLI2S Ready Interrupt clear */ +#define RCC_CIR_PLLSAIRDYC (1 << 22) /* Bit 22: PLLSAI Ready Interrupt clear */ +#define RCC_CIR_CSSC (1 << 23) /* Bit 23: Clock Security System Interrupt Clear */ + +/* AHB1 peripheral reset register */ + +#define RCC_AHB1RSTR_GPIOARST (1 << 0) /* Bit 0: IO port A reset */ +#define RCC_AHB1RSTR_GPIOBRST (1 << 1) /* Bit 1: IO port B reset */ +#define RCC_AHB1RSTR_GPIOCRST (1 << 2) /* Bit 2: IO port C reset */ +#define RCC_AHB1RSTR_GPIODRST (1 << 3) /* Bit 3: IO port D reset */ +#define RCC_AHB1RSTR_GPIOERST (1 << 4) /* Bit 4: IO port E reset */ +#define RCC_AHB1RSTR_GPIOFRST (1 << 5) /* Bit 5: IO port F reset */ +#define RCC_AHB1RSTR_GPIOGRST (1 << 6) /* Bit 6: IO port G reset */ +#define RCC_AHB1RSTR_GPIOHRST (1 << 7) /* Bit 7: IO port H reset */ +#define RCC_AHB1RSTR_GPIOIRST (1 << 8) /* Bit 8: IO port I reset */ +#define RCC_AHB1RSTR_GPIOJRST (1 << 9) /* Bit 9: IO port J reset */ +#define RCC_AHB1RSTR_GPIOKRST (1 << 10) /* Bit 10: IO port K reset */ +#define RCC_AHB1RSTR_CRCRST (1 << 12) /* Bit 12 CRC reset */ +#define RCC_AHB1RSTR_DMA1RST (1 << 21) /* Bit 21: DMA1 reset */ +#define RCC_AHB1RSTR_DMA2RST (1 << 22) /* Bit 22: DMA2 reset */ +#define RCC_AHB1RSTR_DMA2DRST (1 << 23) /* Bit 23: DMA2D reset */ +#define RCC_AHB1RSTR_ETHMACRST (1 << 25) /* Bit 25: Ethernet MAC reset */ +#define RCC_AHB1RSTR_OTGHSRST (1 << 29) /* Bit 29: USB OTG HS module reset */ + +/* AHB2 peripheral reset register */ + +#define RCC_AHB2RSTR_DCMIRST (1 << 0) /* Bit 0: Camera interface reset */ +#define RCC_AHB2RSTR_JPEGRST (1 << 1) /* Bit 1: Jpeg codec reset */ +#define RCC_AHB2RSTR_CRYPRST (1 << 4) /* Bit 4: Cryptographic module reset */ +#define RCC_AHB2RSTR_HASHRST (1 << 5) /* Bit 5: Hash module reset */ +#define RCC_AHB2RSTR_RNGRST (1 << 6) /* Bit 6: Random number generator module reset */ +#define RCC_AHB2RSTR_OTGFSRST (1 << 7) /* Bit 7: USB OTG FS module reset */ + +/* AHB3 peripheral reset register */ + +#define RCC_AHB3RSTR_FSMCRST (1 << 0) /* Bit 0: Flexible static memory controller module reset */ +#define RCC_AHB3RSTR_QSPIRST (1 << 1) /* Bit 1: Quad SPI memory controller reset */ + +/* APB1 Peripheral reset register */ + +#define RCC_APB1RSTR_TIM2RST (1 << 0) /* Bit 0: TIM2 reset */ +#define RCC_APB1RSTR_TIM3RST (1 << 1) /* Bit 1: TIM3 reset */ +#define RCC_APB1RSTR_TIM4RST (1 << 2) /* Bit 2: TIM4 reset */ +#define RCC_APB1RSTR_TIM5RST (1 << 3) /* Bit 3: TIM5 reset */ +#define RCC_APB1RSTR_TIM6RST (1 << 4) /* Bit 4: TIM6 reset */ +#define RCC_APB1RSTR_TIM7RST (1 << 5) /* Bit 5: TIM7 reset */ +#define RCC_APB1RSTR_TIM12RST (1 << 6) /* Bit 6: TIM12 reset */ +#define RCC_APB1RSTR_TIM13RST (1 << 7) /* Bit 7: TIM13 reset */ +#define RCC_APB1RSTR_TIM14RST (1 << 8) /* Bit 8: TIM14 reset */ +#define RCC_APB1RSTR_LPTIM1RST (1 << 9) /* Bit 9: LPTIM1 reset */ +#define RCC_APB1RSTR_WWDGRST (1 << 11) /* Bit 11: Window watchdog reset */ +#define RCC_APB1RSTR_CAN3RST (1 << 13) /* Bit 13: CAN3 reset */ +#define RCC_APB1RSTR_SPI2RST (1 << 14) /* Bit 14: SPI 2 reset */ +#define RCC_APB1RSTR_SPI3RST (1 << 15) /* Bit 15: SPI 3 reset */ +#define RCC_APB1RSTR_SPDIFRXRST (1 << 16) /* Bit 16: SPDIFRX reset */ +#define RCC_APB1RSTR_USART2RST (1 << 17) /* Bit 17: USART 2 reset */ +#define RCC_APB1RSTR_USART3RST (1 << 18) /* Bit 18: USART 3 reset */ +#define RCC_APB1RSTR_UART4RST (1 << 19) /* Bit 19: USART 4 reset */ +#define RCC_APB1RSTR_UART5RST (1 << 20) /* Bit 20: USART 5 reset */ +#define RCC_APB1RSTR_I2C1RST (1 << 21) /* Bit 21: I2C 1 reset */ +#define RCC_APB1RSTR_I2C2RST (1 << 22) /* Bit 22: I2C 2 reset */ +#define RCC_APB1RSTR_I2C3RST (1 << 23) /* Bit 23: I2C 3 reset */ +#define RCC_APB1RSTR_I2C4RST (1 << 24) /* Bit 24: I2C 4 reset */ +#define RCC_APB1RSTR_CAN1RST (1 << 25) /* Bit 25: CAN1 reset */ +#define RCC_APB1RSTR_CAN2RST (1 << 26) /* Bit 26: CAN2 reset */ +#define RCC_APB1RSTR_CECRST (1 << 27) /* Bit 27: CEC reset */ +#define RCC_APB1RSTR_PWRRST (1 << 28) /* Bit 28: Power interface reset */ +#define RCC_APB1RSTR_DACRST (1 << 29) /* Bit 29: DAC reset */ +#define RCC_APB1RSTR_UART7RST (1 << 30) /* Bit 30: USART 7 reset */ +#define RCC_APB1RSTR_UART8RST (1 << 31) /* Bit 31: USART 8 reset */ + +/* APB2 Peripheral reset register */ + +#define RCC_APB2RSTR_TIM1RST (1 << 0) /* Bit 0: TIM1 reset */ +#define RCC_APB2RSTR_TIM8RST (1 << 1) /* Bit 1: TIM8 reset */ +#define RCC_APB2RSTR_USART1RST (1 << 4) /* Bit 4: USART1 reset */ +#define RCC_APB2RSTR_USART6RST (1 << 5) /* Bit 5: USART6 reset */ +#define RCC_APB2RSTR_SDMMC2RST (1 << 7) /* Bit 7: SDMMC2 reset */ +#define RCC_APB2RSTR_ADCRST (1 << 8) /* Bit 8: ADC interface reset (common to all ADCs) */ +#define RCC_APB2RSTR_SDMMC1RST (1 << 11) /* Bit 11: SDMMC1 reset */ +#define RCC_APB2RSTR_SPI1RST (1 << 12) /* Bit 12: SPI1 reset */ +#define RCC_APB2RSTR_SPI4RST (1 << 13) /* Bit 13: SPI4 reset */ +#define RCC_APB2RSTR_SYSCFGRST (1 << 14) /* Bit 14: System configuration controller reset */ +#define RCC_APB2RSTR_TIM9RST (1 << 16) /* Bit 16: TIM9 reset */ +#define RCC_APB2RSTR_TIM10RST (1 << 17) /* Bit 17: TIM10 reset */ +#define RCC_APB2RSTR_TIM11RST (1 << 18) /* Bit 18: TIM11 reset */ +#define RCC_APB2RSTR_SPI5RST (1 << 20) /* Bit 20: SPI 5 reset */ +#define RCC_APB2RSTR_SPI6RST (1 << 21) /* Bit 21: SPI 6 reset */ +#define RCC_APB2RSTR_SAI1RST (1 << 22) /* Bit 22: SAI 1 reset */ +#define RCC_APB2RSTR_SAI2RST (1 << 22) /* Bit 23: SAI 2 reset */ +#define RCC_APB2RSTR_LTDCRST (1 << 26) /* Bit 26: LTDC reset */ +#define RCC_APB2RSTR_DSIRST (1 << 27) /* Bit 27: DSI reset */ +#define RCC_APB2RSTR_DFSDM1RST (1 << 29) /* Bit 29: DFSDM1 reset */ +#define RCC_APB2RSTR_MDIORST (1 << 30) /* Bit 30: MDIO reset */ + +/* AHB1 Peripheral Clock enable register */ + +#define RCC_AHB1ENR_GPIOEN(n) (1 << (n)) +#define RCC_AHB1ENR_GPIOAEN (1 << 0) /* Bit 0: IO port A clock enable */ +#define RCC_AHB1ENR_GPIOBEN (1 << 1) /* Bit 1: IO port B clock enable */ +#define RCC_AHB1ENR_GPIOCEN (1 << 2) /* Bit 2: IO port C clock enable */ +#define RCC_AHB1ENR_GPIODEN (1 << 3) /* Bit 3: IO port D clock enable */ +#define RCC_AHB1ENR_GPIOEEN (1 << 4) /* Bit 4: IO port E clock enable */ +#define RCC_AHB1ENR_GPIOFEN (1 << 5) /* Bit 5: IO port F clock enable */ +#define RCC_AHB1ENR_GPIOGEN (1 << 6) /* Bit 6: IO port G clock enable */ +#define RCC_AHB1ENR_GPIOHEN (1 << 7) /* Bit 7: IO port H clock enable */ +#define RCC_AHB1ENR_GPIOIEN (1 << 8) /* Bit 8: IO port I clock enable */ +#define RCC_AHB1ENR_GPIOJEN (1 << 9) /* Bit 9: IO port J clock enable */ +#define RCC_AHB1ENR_GPIOKEN (1 << 10) /* Bit 10: IO port K clock enable */ +#define RCC_AHB1ENR_CRCEN (1 << 12) /* Bit 12: CRC clock enable */ +#define RCC_AHB1ENR_BKPSRAMEN (1 << 18) /* Bit 18: Backup SRAM interface clock enable */ +#define RCC_AHB1ENR_DTCMRAMEN (1 << 20) /* Bit 20: DTCM RAM clock enable */ +#define RCC_AHB1ENR_DMA1EN (1 << 21) /* Bit 21: DMA1 clock enable */ +#define RCC_AHB1ENR_DMA2EN (1 << 22) /* Bit 22: DMA2 clock enable */ +#define RCC_AHB1ENR_DMA2DEN (1 << 23) /* Bit 23: DMA2D clock enable */ +#define RCC_AHB1ENR_ETHMACEN (1 << 25) /* Bit 25: Ethernet MAC clock enable */ +#define RCC_AHB1ENR_ETHMACTXEN (1 << 26) /* Bit 26: Ethernet Transmission clock enable */ +#define RCC_AHB1ENR_ETHMACRXEN (1 << 27) /* Bit 27: Ethernet Reception clock enable */ +#define RCC_AHB1ENR_ETHMACPTPEN (1 << 28) /* Bit 28: Ethernet PTP clock enable */ +#define RCC_AHB1ENR_OTGHSEN (1 << 29) /* Bit 29: USB OTG HS clock enable */ +#define RCC_AHB1ENR_OTGHSULPIEN (1 << 30) /* Bit 30: USB OTG HSULPI clock enable */ + +/* AHB2 Peripheral Clock enable register */ + +#define RCC_AHB2ENR_DCMIEN (1 << 0) /* Bit 0: Camera interface enable */ +#define RCC_AHB2ENR_JPEGEN (1 << 1) /* Bit 1: Jpeg codec enable */ +#define RCC_AHB2ENR_CRYPEN (1 << 4) /* Bit 4: Cryptographic modules clock enable */ +#define RCC_AHB2ENR_HASHEN (1 << 5) /* Bit 5: Hash modules clock enable */ +#define RCC_AHB2ENR_RNGEN (1 << 6) /* Bit 6: Random number generator clock enable */ +#define RCC_AHB2ENR_OTGFSEN (1 << 7) /* Bit 7: USB OTG FS clock enable */ + +/* AHB3 Peripheral Clock enable register */ + +#define RCC_AHB3ENR_FSMCEN (1 << 0) /* Bit 0: Flexible static memory controller module clock enable */ +#define RCC_AHB3ENR_QSPIEN (1 << 1) /* Bit 1: Quad SPI memory controller clock enable */ + +/* APB1 Peripheral Clock enable register */ + +#define RCC_APB1ENR_TIM2EN (1 << 0) /* Bit 0: TIM 2 clock enable */ +#define RCC_APB1ENR_TIM3EN (1 << 1) /* Bit 1: TIM 3 clock enable */ +#define RCC_APB1ENR_TIM4EN (1 << 2) /* Bit 2: TIM 4 clock enable */ +#define RCC_APB1ENR_TIM5EN (1 << 3) /* Bit 3: TIM 5 clock enable */ +#define RCC_APB1ENR_TIM6EN (1 << 4) /* Bit 4: TIM 6 clock enable */ +#define RCC_APB1ENR_TIM7EN (1 << 5) /* Bit 5: TIM 7 clock enable */ +#define RCC_APB1ENR_TIM12EN (1 << 6) /* Bit 6: TIM 12 clock enable */ +#define RCC_APB1ENR_TIM13EN (1 << 7) /* Bit 7: TIM 13 clock enable */ +#define RCC_APB1ENR_TIM14EN (1 << 8) /* Bit 8: TIM 14 clock enable */ +#define RCC_APB1ENR_LPTIM1EN (1 << 9) /* Bit 9: LPTIM 1 clock enable */ +#define RCC_APB1ENR_WWDGEN (1 << 11) /* Bit 11: Window watchdog clock enable */ +#define RCC_APB1ENR_CAN3EN (1 << 13) /* Bit 13: CAN 3 clock enable */ +#define RCC_APB1ENR_SPI2EN (1 << 14) /* Bit 14: SPI 2 clock enable */ +#define RCC_APB1ENR_SPI3EN (1 << 15) /* Bit 15: SPI 3 clock enable */ +#define RCC_APB1ENR_SPDIFRXEN (1 << 16) /* Bit 16: SPDIFRX clock enable */ +#define RCC_APB1ENR_USART2EN (1 << 17) /* Bit 17: USART 2 clock enable */ +#define RCC_APB1ENR_USART3EN (1 << 18) /* Bit 18: USART 3 clock enable */ +#define RCC_APB1ENR_UART4EN (1 << 19) /* Bit 19: UART 4 clock enable */ +#define RCC_APB1ENR_UART5EN (1 << 20) /* Bit 20: UART 5 clock enable */ +#define RCC_APB1ENR_I2C1EN (1 << 21) /* Bit 21: I2C 1 clock enable */ +#define RCC_APB1ENR_I2C2EN (1 << 22) /* Bit 22: I2C 2 clock enable */ +#define RCC_APB1ENR_I2C3EN (1 << 23) /* Bit 23: I2C 3 clock enable */ +#define RCC_APB1ENR_I2C4EN (1 << 24) /* Bit 24: I2C 4 clock enable */ +#define RCC_APB1ENR_CAN1EN (1 << 25) /* Bit 25: CAN 1 clock enable */ +#define RCC_APB1ENR_CAN2EN (1 << 26) /* Bit 26: CAN 2 clock enable */ +#define RCC_APB1ENR_CECEN (1 << 27) /* Bit 27: CEC clock enable */ +#define RCC_APB1ENR_PWREN (1 << 28) /* Bit 28: Power interface clock enable */ +#define RCC_APB1ENR_DACEN (1 << 29) /* Bit 29: DAC interface clock enable */ +#define RCC_APB1ENR_UART7EN (1 << 30) /* Bit 30: UART7 clock enable */ +#define RCC_APB1ENR_UART8EN (1 << 31) /* Bit 31: UART8 clock enable */ + +/* APB2 Peripheral Clock enable register */ + +#define RCC_APB2ENR_TIM1EN (1 << 0) /* Bit 0: TIM 1 clock enable */ +#define RCC_APB2ENR_TIM8EN (1 << 1) /* Bit 1: TIM 8 clock enable */ +#define RCC_APB2ENR_USART1EN (1 << 4) /* Bit 4: USART 1 clock enable */ +#define RCC_APB2ENR_USART6EN (1 << 5) /* Bit 5: USART 6 clock enable */ +#define RCC_APB2ENR_SDMMC2EN (1 << 7) /* Bit 7: SDMMC 2 clock enable */ +#define RCC_APB2ENR_ADC1EN (1 << 8) /* Bit 8: ADC 1 clock enable */ +#define RCC_APB2ENR_ADC2EN (1 << 9) /* Bit 9: ADC 2 clock enable */ +#define RCC_APB2ENR_ADC3EN (1 << 10) /* Bit 10: ADC 3 clock enable */ +#define RCC_APB2ENR_SDMMC1EN (1 << 11) /* Bit 11: SDMMC 1 clock enable */ +#define RCC_APB2ENR_SPI1EN (1 << 12) /* Bit 12: SPI 1 clock enable */ +#define RCC_APB2ENR_SPI4EN (1 << 13) /* Bit 13: SPI 4 clock enable */ +#define RCC_APB2ENR_SYSCFGEN (1 << 14) /* Bit 14: System configuration controller clock enable */ +#define RCC_APB2ENR_TIM9EN (1 << 16) /* Bit 16: TIM 9 clock enable */ +#define RCC_APB2ENR_TIM10EN (1 << 17) /* Bit 17: TIM1 0 clock enable */ +#define RCC_APB2ENR_TIM11EN (1 << 18) /* Bit 18: TIM 11 clock enable */ +#define RCC_APB2ENR_SPI5EN (1 << 20) /* Bit 20: SPI 5 clock enable */ +#define RCC_APB2ENR_SPI6EN (1 << 21) /* Bit 21: SPI 6 clock enable */ +#define RCC_APB2ENR_SAI1EN (1 << 22) /* Bit 22: SAI 1 clock enable */ +#define RCC_APB2ENR_SAI2EN (1 << 23) /* Bit 23: SAI 2 clock enable */ +#define RCC_APB2ENR_LTDCEN (1 << 26) /* Bit 26: LTDC clock enable */ +#define RCC_APB2ENR_DSIEN (1 << 27) /* Bit 27: DSI clock enable */ +#define RCC_APB2ENR_DFSDM1EN (1 << 29) /* Bit 29: DFSDM1 clock enable */ +#define RCC_APB2ENR_MDIOEN (1 << 30) /* Bit 30: MDIO clock enable */ + +/* RCC AHB1 low power mode peripheral clock enable register */ + +#define RCC_AHB1LPENR_GPIOLPEN(n) (1 << (n)) +#define RCC_AHB1LPENR_GPIOALPEN (1 << 0) /* Bit 0: IO port A clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOBLPEN (1 << 1) /* Bit 1: IO port B clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOCLPEN (1 << 2) /* Bit 2: IO port C clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIODLPEN (1 << 3) /* Bit 3: IO port D clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOELPEN (1 << 4) /* Bit 4: IO port E clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOFLPEN (1 << 5) /* Bit 5: IO port F clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOGLPEN (1 << 6) /* Bit 6: IO port G clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOHLPEN (1 << 7) /* Bit 7: IO port H clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOILPEN (1 << 8) /* Bit 8: IO port I clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOJLPEN (1 << 9) /* Bit 8: IO port J clock enable during Sleep mode */ +#define RCC_AHB1LPENR_GPIOKLPEN (1 << 10) /* Bit 10: IO port K clock enable during Sleep mode */ +#define RCC_AHB1LPENR_CRCLPEN (1 << 12) /* Bit 12: CRC clock enable during Sleep mode */ +#define RCC_AHB1LPENR_AXILPEN (1 << 13) /* Bit 12: AXI to AHB bridge clock enable during Sleep mode */ +#define RCC_AHB1LPENR_FLITFLPEN (1 << 15) /* Bit 15: Flash interface clock enable during Sleep mode */ +#define RCC_AHB1LPENR_SRAM1LPEN (1 << 16) /* Bit 16: SRAM 1 interface clock enable during Sleep mode */ +#define RCC_AHB1LPENR_SRAM2LPEN (1 << 17) /* Bit 17: SRAM 2 interface clock enable during Sleep mode */ +#define RCC_AHB1LPENR_BKPSRAMLPEN (1 << 18) /* Bit 18: Backup SRAM interface clock enable during Sleep mode */ +#define RCC_AHB1LPENR_DTCMLPEN (1 << 20) /* Bit 20: DTCM RAM clock enable during Sleep mode */ +#define RCC_AHB1LPENR_DMA1LPEN (1 << 21) /* Bit 21: DMA1 clock enable during Sleep mode */ +#define RCC_AHB1LPENR_DMA2LPEN (1 << 22) /* Bit 22: DMA2 clock enable during Sleep mode */ +#define RCC_AHB1LPENR_DMA2DLPEN (1 << 23) /* Bit 23: DMA2D clock enable during Sleep mode */ +#define RCC_AHB1LPENR_ETHMACLPEN (1 << 25) /* Bit 25: Ethernet MAC clock enable during Sleep mode */ +#define RCC_AHB1LPENR_ETHTXLPEN (1 << 26) /* Bit 26: Ethernet Transmission clock enable during Sleep mode */ +#define RCC_AHB1LPENR_ETHRXLPEN (1 << 27) /* Bit 27: Ethernet Reception clock enable during Sleep mode */ + +#define RCC_AHB1LPENR_ETHPTPLPEN (1 << 28) /* Bit 28: Ethernet PTP clock enable during Sleep mode */ +#define RCC_AHB1LPENR_OTGHSLPEN (1 << 29) /* Bit 29: USB OTG HS clock enable during Sleep mode */ +#define RCC_AHB1LPENR_OTGHSULPILPEN (1 << 30) /* Bit 30: USB OTG HSULPI clock enable during Sleep mode */ + +/* RCC AHB2 low power mode peripheral clock enable register */ + +#define RCC_AHB2LPENR_DCMILPEN (1 << 0) /* Bit 0: Camera interface enable during Sleep mode */ +#define RCC_AHB2LPENR_JPEGLPEN (1 << 1) /* Bit 1: Jpeg codec enable during Sleep mode */ +#define RCC_AHB2LPENR_CRYPLPEN (1 << 4) /* Bit 4: Cryptographic modules clock enable during Sleep mode */ +#define RCC_AHB2LPENR_HASHLPEN (1 << 5) /* Bit 5: Hash modules clock enable during Sleep mode */ +#define RCC_AHB2LPENR_RNGLPEN (1 << 6) /* Bit 6: Random number generator clock enable during Sleep mode */ +#define RCC_AHB2LPENR_OTGFLPSEN (1 << 7) /* Bit 7: USB OTG FS clock enable during Sleep mode */ + +/* RCC AHB3 low power mode peripheral clock enable register */ + +#define RCC_AHB3LPENR_FSMLPEN (1 << 0) /* Bit 0: Flexible static memory controller module clock + * enable during Sleep mode */ +#define RCC_AHB3LPENR_QSPILPEN (1 << 1) /* Bit 1: Quad SPI memory controller clock + * enable during Sleep mode */ + +/* RCC APB1 low power mode peripheral clock enable register */ + +#define RCC_APB1LPENR_TIM2LPEN (1 << 0) /* Bit 0: TIM 2 clock enable during Sleep mode */ +#define RCC_APB1LPENR_TIM3LPEN (1 << 1) /* Bit 1: TIM 3 clock enable during Sleep mode */ +#define RCC_APB1LPENR_TIM4LPEN (1 << 2) /* Bit 2: TIM 4 clock enable during Sleep mode */ +#define RCC_APB1LPENR_TIM5LPEN (1 << 3) /* Bit 3: TIM 5 clock enable during Sleep mode */ +#define RCC_APB1LPENR_TIM6LPEN (1 << 4) /* Bit 4: TIM 6 clock enable during Sleep mode */ +#define RCC_APB1LPENR_TIM7LPEN (1 << 5) /* Bit 5: TIM 7 clock enable during Sleep mode */ +#define RCC_APB1LPENR_TIM12LPEN (1 << 6) /* Bit 6: TIM 12 clock enable during Sleep mode */ +#define RCC_APB1LPENR_TIM13LPEN (1 << 7) /* Bit 7: TIM 13 clock enable during Sleep mode */ +#define RCC_APB1LPENR_TIM14LPEN (1 << 8) /* Bit 8: TIM 14 clock enable during Sleep mode */ +#define RCC_APB1LPENR_LPTIM1LPEN (1 << 9) /* Bit 9: LPTIM 1 clock enable during Sleep mode */ +#define RCC_APB1LPENR_WWDGLPEN (1 << 11) /* Bit 11: Window watchdog clock enable during Sleep mode */ +#define RCC_APB1LPENR_SPI2LPEN (1 << 14) /* Bit 14: SPI 2 clock enable during Sleep mode */ +#define RCC_APB1LPENR_SPI3LPEN (1 << 15) /* Bit 15: SPI 3 clock enable during Sleep mode */ +#define RCC_APB1LPENR_SPDIFRXLPEN (1 << 16) /* Bit 16: SPDIFRX clock enable during Sleep mode */ +#define RCC_APB1LPENR_USART2LPEN (1 << 17) /* Bit 17: USART 2 clock enable during Sleep mode */ +#define RCC_APB1LPENR_USART3LPEN (1 << 18) /* Bit 18: USART 3 clock enable during Sleep mode */ +#define RCC_APB1LPENR_UART4LPEN (1 << 19) /* Bit 19: UART 4 clock enable during Sleep mode */ +#define RCC_APB1LPENR_UART5LPEN (1 << 20) /* Bit 20: UART 5 clock enable during Sleep mode */ +#define RCC_APB1LPENR_I2C1LPEN (1 << 21) /* Bit 21: I2C 1 clock enable during Sleep mode */ +#define RCC_APB1LPENR_I2C2LPEN (1 << 22) /* Bit 22: I2C 2 clock enable during Sleep mode */ +#define RCC_APB1LPENR_I2C3LPEN (1 << 23) /* Bit 23: I2C 3 clock enable during Sleep mode */ +#define RCC_APB1LPENR_I2C4LPEN (1 << 24) /* Bit 24: I2C 4 clock enable during Sleep mode */ +#define RCC_APB1LPENR_CAN1LPEN (1 << 25) /* Bit 25: CAN 1 clock enable during Sleep mode */ +#define RCC_APB1LPENR_CAN2LPEN (1 << 26) /* Bit 26: CAN 2 clock enable during Sleep mode */ +#define RCC_APB1LPENR_CECLPEN (1 << 27) /* Bit 27: CEC clock enable during Sleep mode */ +#define RCC_APB1LPENR_PWRLPEN (1 << 28) /* Bit 28: Power interface clock enable during Sleep mode */ +#define RCC_APB1LPENR_DACLPEN (1 << 29) /* Bit 29: DAC interface clock enable during Sleep mode */ +#define RCC_APB1LPENR_UART7LPEN (1 << 30) /* Bit 30: UART 7 clock enable during Sleep mode */ +#define RCC_APB1LPENR_UART8LPEN (1 << 31) /* Bit 31: UART 8 clock enable during Sleep mode */ + +/* RCC APB2 low power mode peripheral clock enable register */ + +#define RCC_APB2LPENR_TIM1LPEN (1 << 0) /* Bit 0: TIM 1 clock enable during Sleep mode */ +#define RCC_APB2LPENR_TIM8LPEN (1 << 1) /* Bit 1: TIM 8 clock enable during Sleep mode */ +#define RCC_APB2LPENR_USART1LPEN (1 << 4) /* Bit 4: USART 1 clock enable during Sleep mode */ +#define RCC_APB2LPENR_USART6LPEN (1 << 5) /* Bit 5: USART 6 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SDMMC2LPEN (1 << 7) /* Bit 7: SDMMC 2 clock enable during Sleep mode */ +#define RCC_APB2LPENR_ADC1LPEN (1 << 8) /* Bit 8: ADC 1 clock enable during Sleep mode */ +#define RCC_APB2LPENR_ADC2LPEN (1 << 9) /* Bit 9: ADC 2 clock enable during Sleep mode */ +#define RCC_APB2LPENR_ADC3LPEN (1 << 10) /* Bit 10: ADC 3 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SDMMC1LPEN (1 << 11) /* Bit 11: SDMMC 1 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SPI1LPEN (1 << 12) /* Bit 12: SPI 1 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SPI4LPEN (1 << 13) /* Bit 13: SPI 4 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SYSCFGLPEN (1 << 14) /* Bit 14: System configuration controller clock enable during Sleep mode */ +#define RCC_APB2LPENR_TIM9LPEN (1 << 16) /* Bit 16: TIM 9 clock enable during Sleep mode */ +#define RCC_APB2LPENR_TIM10LPEN (1 << 17) /* Bit 17: TIM 10 clock enable during Sleep mode */ +#define RCC_APB2LPENR_TIM11LPEN (1 << 18) /* Bit 18: TIM 11 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SPI5LPEN (1 << 20) /* Bit 20: SPI 5 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SPI6LPEN (1 << 21) /* Bit 21: SPI 6 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SAI1LPEN (1 << 22) /* Bit 22: SAI 1 clock enable during Sleep mode */ +#define RCC_APB2LPENR_SAI2LPEN (1 << 23) /* Bit 23: SAI 2 clock enable during Sleep mode */ +#define RCC_APB2LPENR_LTDCLPEN (1 << 26) /* Bit 26: LTDC clock enable during Sleep mode */ +#define RCC_APB2LPENR_DSILPEN (1 << 27) /* Bit 27: DSI clock enable during Sleep mode */ +#define RCC_APB2LPENR_DFSDM1LPEN (1 << 29) /* Bit 29: DFSDM1 clock enable during Sleep mode */ +#define RCC_APB2LPENR_MDIOLPEN (1 << 30) /* Bit 30: MDIO clock enable during Sleep mode */ + +/* Backup domain control register */ + +#define RCC_BDCR_LSEON (1 << 0) /* Bit 0: External Low Speed oscillator enable */ +#define RCC_BDCR_LSERDY (1 << 1) /* Bit 1: External Low Speed oscillator Ready */ +#define RCC_BDCR_LSEBYP (1 << 2) /* Bit 2: External Low Speed oscillator Bypass */ +#define RCC_BDCR_RTCSEL_SHIFT (8) /* Bits 9:8: RTC clock source selection */ +#define RCC_BDCR_RTCSEL_MASK (3 << RCC_BDCR_RTCSEL_SHIFT) +# define RCC_BDCR_RTCSEL_NOCLK (0 << RCC_BDCR_RTCSEL_SHIFT) /* 00: No clock */ +# define RCC_BDCR_RTCSEL_LSE (1 << RCC_BDCR_RTCSEL_SHIFT) /* 01: LSE oscillator clock used as RTC clock */ +# define RCC_BDCR_RTCSEL_LSI (2 << RCC_BDCR_RTCSEL_SHIFT) /* 10: LSI oscillator clock used as RTC clock */ +# define RCC_BDCR_RTCSEL_HSE (3 << RCC_BDCR_RTCSEL_SHIFT) /* 11: HSE oscillator clock divided by 128 used as RTC clock */ +#define RCC_BDCR_RTCEN (1 << 15) /* Bit 15: RTC clock enable */ +#define RCC_BDCR_BDRST (1 << 16) /* Bit 16: Backup domain software reset */ + +/* Control/status register */ + +#define RCC_CSR_LSION (1 << 0) /* Bit 0: Internal Low Speed oscillator enable */ +#define RCC_CSR_LSIRDY (1 << 1) /* Bit 1: Internal Low Speed oscillator Ready */ +#define RCC_CSR_RMVF (1 << 24) /* Bit 24: Remove reset flag */ +#define RCC_CSR_BORRSTF (1 << 25) /* Bit 25: BOR reset flag */ +#define RCC_CSR_PINRSTF (1 << 26) /* Bit 26: PIN reset flag */ +#define RCC_CSR_PORRSTF (1 << 27) /* Bit 27: POR/PDR reset flag */ +#define RCC_CSR_SFTRSTF (1 << 28) /* Bit 28: Software Reset flag */ +#define RCC_CSR_IWDGRSTF (1 << 29) /* Bit 29: Independent Watchdog reset flag */ +#define RCC_CSR_WWDGRSTF (1 << 30) /* Bit 30: Window watchdog reset flag */ +#define RCC_CSR_LPWRRSTF (1 << 31) /* Bit 31: Low-Power reset flag */ + +/* Spread spectrum clock generation register */ + +#define RCC_SSCGR_MODPER_SHIFT (0) /* Bit 0-12: Modulation period */ +#define RCC_SSCGR_MODPER_MASK (0x1fff << RCC_SSCGR_MODPER_SHIFT) +# define RCC_SSCGR_MODPER(n) ((n) << RCC_SSCGR_MODPER_SHIFT) +#define RCC_SSCGR_INCSTEP_SHIFT (13) /* Bit 13-27: Incrementation step */ +#define RCC_SSCGR_INCSTEP_MASK (0x7fff << RCC_SSCGR_INCSTEP_SHIFT) +# define RCC_SSCGR_INCSTEP(n) ((n) << RCC_SSCGR_INCSTEP_SHIFT) +#define RCC_SSCGR_SPREADSEL (1 << 30) /* Bit 30: Spread Select */ +#define RCC_SSCGR_SSCGEN (1 << 31) /* Bit 31: Spread spectrum modulation enable */ + +/* PLLI2S configuration register */ + +#define RCC_PLLI2SCFGR_PLLI2SN_SHIFT (6) /* Bits 6-14: PLLI2S multiplication factor for VCO */ +#define RCC_PLLI2SCFGR_PLLI2SN_MASK (0x1ff << RCC_PLLI2SCFGR_PLLI2SN_SHIFT) +# define RCC_PLLI2SCFGR_PLLI2SN(n) ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SN_SHIFT) +#define RCC_PLLI2SCFGR_PLLI2SP_SHIFT (16) /* Bits 16-17: PLLI2S division factor for SPDIFRX clock */ +#define RCC_PLLI2SCFGR_PLLI2SP_MASK (3 << RCC_PLLI2SCFGR_PLLI2SP_SHIFT) +# define RCC_PLLI2SCFGR_PLLI2SP(n) ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SP_SHIFT) +#define RCC_PLLI2SCFGR_PLLI2SQ_SHIFT (24) /* Bits 24-27: PLLI2S division factor for SAIs clock */ +#define RCC_PLLI2SCFGR_PLLI2SQ_MASK (15 << RCC_PLLI2SCFGR_PLLI2SQ_SHIFT) +# define RCC_PLLI2SCFGR_PLLI2SQ(n) ((uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SQ_SHIFT) +#define RCC_PLLI2SCFGR_PLLI2SR_SHIFT (28) /* Bits 28-30: PLLI2S division factor for I2S clocks */ +#define RCC_PLLI2SCFGR_PLLI2SR_MASK (7 << RCC_PLLI2SCFGR_PLLI2SR_SHIFT) +# define RCC_PLLI2SCFGR_PLLI2SR(n) (uint32_t)(n) << RCC_PLLI2SCFGR_PLLI2SR_SHIFT) + +/* PLLSAI configuration register */ + +#define RCC_PLLSAICFGR_PLLSAIN_SHIFT (6) /* Bits 6-14: PLLSAI divider (N) for VCO */ +#define RCC_PLLSAICFGR_PLLSAIN_MASK (0x1ff << RCC_PLLSAICFGR_PLLSAIN_SHIFT) +# define RCC_PLLSAICFGR_PLLSAIN(n) ((n) << RCC_PLLSAICFGR_PLLSAIN_SHIFT) +#define RCC_PLLSAICFGR_PLLSAIP_SHIFT (16) /* Bits 16-17: PLLSAI division factor for 48MHz clock */ +#define RCC_PLLSAICFGR_PLLSAIP_MASK (3 << RCC_PLLSAICFGR_PLLSAIP_SHIFT) +# define RCC_PLLSAICFGR_PLLSAIP(n) ((n) << RCC_PLLSAICFGR_PLLSAIP_SHIFT) +#define RCC_PLLSAICFGR_PLLSAIQ_SHIFT (24) /* Bits 24-27: PLLSAI division factor for SAI clock */ +#define RCC_PLLSAICFGR_PLLSAIQ_MASK (0x0F << RCC_PLLSAICFGR_PLLSAIQ_SHIFT) +# define RCC_PLLSAICFGR_PLLSAIQ(n) ((n) << RCC_PLLSAICFGR_PLLSAIQ_SHIFT) +#define RCC_PLLSAICFGR_PLLSAIR_SHIFT (28) /* Bits 28-30: PLLSAI division factor for LCD clock */ +#define RCC_PLLSAICFGR_PLLSAIR_MASK (7 << RCC_PLLSAICFGR_PLLSAIR_SHIFT) +# define RCC_PLLSAICFGR_PLLSAIR(n) ((n) << RCC_PLLSAICFGR_PLLSAIR_SHIFT) + +/* Dedicated clocks configuration register 1 */ + +#define RCC_DCKCFGR1_PLLI2SDIVQ_SHIFT (0) /* Bits 0-4: PLLI2S division factor for I2S clock */ +#define RCC_DCKCFGR1_PLLI2SDIVQ_MASK (0x1F << RCC_DCKCFGR1_PLLI2SDIVQ_SHIFT) +# define RCC_DCKCFGR1_PLLI2SDIVQ(n) ((n) << RCC_DCKCFGR1_PLLI2SDIVQ_SHIFT) +#define RCC_DCKCFGR1_PLLSAIDIVQ_SHIFT (8) /* Bits 8-12: PLLSAI division factor for SAI clock */ +#define RCC_DCKCFGR1_PLLSAIDIVQ_MASK (0x1F << RCC_DCKCFGR1_PLLSAIDIVQ_SHIFT) +# define RCC_DCKCFGR1_PLLSAIDIVQ(n) ((n) << RCC_DCKCFGR1_PLLSAIDIVQ_SHIFT) + +#define RCC_DCKCFGR1_PLLSAIDIVR_SHIFT (16) /* Bits 16-17: PLLSAI division factor for LCD_CLK clock */ +#define RCC_DCKCFGR1_PLLSAIDIVR_MASK (0x3 << RCC_DCKCFGR1_PLLSAIDIVR_SHIFT) +# define RCC_DCKCFGR1_PLLSAIDIVR(n) ((n) << RCC_DCKCFGR1_PLLSAIDIVR_SHIFT) + +#define RCC_DCKCFGR1_SAI1SEL_SHIFT (20) /* Bits 20-21: SAI 1 clock source selection */ +#define RCC_DCKCFGR1_SAI1SEL_MASK (0x3 << RCC_DCKCFGR1_SAI1SEL_SHIFT) +# define RCC_DCKCFGR1_SAI1SEL(n) ((n) << RCC_DCKCFGR1_SAI1SEL_SHIFT) + +#define RCC_DCKCFGR1_SAI2SEL_SHIFT (22) /* Bits 22-23: SAI 2 clock source selection */ +#define RCC_DCKCFGR1_SAI2SEL_MASK (0x3 << RCC_DCKCFGR1_SAI2SEL_SHIFT) +# define RCC_DCKCFGR1_SAI2SEL(n) ((n) << RCC_DCKCFGR1_SAI2SEL_SHIFT) +#define RCC_DCKCFGR1_TIMPRE (1 << 24) /* Bit 24: Timer clock prescaler selection */ +#define RCC_DCKCFGR1_DFSDM1SEL (1 << 25) /* Bit 25: DFSDM1 clock prescaler selection */ +#define RCC_DCKCFGR1_ADFSDM1SEL (1 << 26) /* Bit 26: DFSDM1 AUDIO clock prescaler selection */ + +/* Dedicated clocks configuration register 2 */ + +#define RCC_DCKCFGR2_USART1SEL_SHIFT (0) /* Bits 0-1: USART 1 clock source selection */ +#define RCC_DCKCFGR2_USART1SEL_MASK (3 << RCC_DCKCFGR2_USART1SEL_SHIFT) +# define RCC_DCKCFGR2_USART1SEL_APB (0 << RCC_DCKCFGR2_USART1SEL_SHIFT) /* APB2 clock (PCLK2) is selected as USART 1 clock */ +# define RCC_DCKCFGR2_USART1SEL_SYSCLK (1 << RCC_DCKCFGR2_USART1SEL_SHIFT) /* System clock is selected as USART 1 clock */ +# define RCC_DCKCFGR2_USART1SEL_HSI (2 << RCC_DCKCFGR2_USART1SEL_SHIFT) /* HSI clock is selected as USART 1 clock */ +# define RCC_DCKCFGR2_USART1SEL_LSE (3 << RCC_DCKCFGR2_USART1SEL_SHIFT) /* LSE clock is selected as USART 1 clock */ +#define RCC_DCKCFGR2_USART2SEL_SHIFT (2) /* Bits 2-3: USART 2 clock source selection */ +#define RCC_DCKCFGR2_USART2SEL_MASK (3 << RCC_DCKCFGR2_USART2SEL_SHIFT) +# define RCC_DCKCFGR2_USART2SEL_APB (0 << RCC_DCKCFGR2_USART2SEL_SHIFT) /* APB1 clock (PCLK1) is selected as USART 2 clock */ +# define RCC_DCKCFGR2_USART2SEL_SYSCLK (1 << RCC_DCKCFGR2_USART2SEL_SHIFT) /* System clock is selected as USART 2 clock */ +# define RCC_DCKCFGR2_USART2SEL_HSI (2 << RCC_DCKCFGR2_USART2SEL_SHIFT) /* HSI clock is selected as USART 2 clock */ +# define RCC_DCKCFGR2_USART2SEL_LSE (3 << RCC_DCKCFGR2_USART2SEL_SHIFT) /* LSE clock is selected as USART 2 clock */ +#define RCC_DCKCFGR2_UART4SEL_SHIFT (6) /* Bits 6-7: UART 4 clock source selection */ +#define RCC_DCKCFGR2_UART4SEL_MASK (3 << RCC_DCKCFGR2_UART4SEL_SHIFT) +# define RCC_DCKCFGR2_UART4SEL_APB (0 << RCC_DCKCFGR2_UART4SEL_SHIFT) /* APB1 clock (PCLK1) is selected as UART 4 clock */ +# define RCC_DCKCFGR2_UART4SEL_SYSCLK (1 << RCC_DCKCFGR2_UART4SEL_SHIFT) /* System clock is selected as UART 4 clock */ +# define RCC_DCKCFGR2_UART4SEL_HSI (2 << RCC_DCKCFGR2_UART4SEL_SHIFT) /* HSI clock is selected as UART 4 clock */ +# define RCC_DCKCFGR2_UART4SEL_LSE (3 << RCC_DCKCFGR2_UART4SEL_SHIFT) /* LSE clock is selected as UART 4 clock */ +#define RCC_DCKCFGR2_UART5SEL_SHIFT (8) /* Bits 8-9: UART 5 clock source selection */ +#define RCC_DCKCFGR2_UART5SEL_MASK (3 << RCC_DCKCFGR2_UART5SEL_SHIFT) +# define RCC_DCKCFGR2_UART5SEL_APB (0 << RCC_DCKCFGR2_UART5SEL_SHIFT) /* APB1 clock (PCLK1) is selected as UART 5 clock */ +# define RCC_DCKCFGR2_UART5SEL_SYSCLK (1 << RCC_DCKCFGR2_UART5SEL_SHIFT) /* System clock is selected as UART 5 clock */ +# define RCC_DCKCFGR2_UART5SEL_HSI (2 << RCC_DCKCFGR2_UART5SEL_SHIFT) /* HSI clock is selected as UART 5 clock */ +# define RCC_DCKCFGR2_UART5SEL_LSE (3 << RCC_DCKCFGR2_UART5SEL_SHIFT) /* LSE clock is selected as UART 5 clock */ +#define RCC_DCKCFGR2_USART6SEL_SHIFT (10) /* Bits 10-11: USART 6 clock source selection */ +#define RCC_DCKCFGR2_USART6SEL_MASK (3 << RCC_DCKCFGR2_USART6SEL_SHIFT) +# define RCC_DCKCFGR2_USART6SEL_APB (0 << RCC_DCKCFGR2_USART6SEL_SHIFT) /* APB2 clock (PCLK2) is selected as USART 6 clock */ +# define RCC_DCKCFGR2_USART6SEL_SYSCLK (1 << RCC_DCKCFGR2_USART6SEL_SHIFT) /* System clock is selected as USART 6 clock */ +# define RCC_DCKCFGR2_USART6SEL_HSI (2 << RCC_DCKCFGR2_USART6SEL_SHIFT) /* HSI clock is selected as USART 6 clock */ +# define RCC_DCKCFGR2_USART6SEL_LSE (3 << RCC_DCKCFGR2_USART6SEL_SHIFT) /* LSE clock is selected as USART 6 clock */ +#define RCC_DCKCFGR2_UART7SEL_SHIFT (12) /* Bits 12-13: UART 7 clock source selection */ +#define RCC_DCKCFGR2_UART7SEL_MASK (3 << RCC_DCKCFGR2_UART7SEL_SHIFT) +# define RCC_DCKCFGR2_UART7SEL_APB (0 << RCC_DCKCFGR2_UART7SEL_SHIFT) /* APB1 clock (PCLK1) is selected as UART 7 clock */ +# define RCC_DCKCFGR2_UART7SEL_SYSCLK (1 << RCC_DCKCFGR2_UART7SEL_SHIFT) /* System clock is selected as UART 7 clock */ +# define RCC_DCKCFGR2_UART7SEL_HSI (2 << RCC_DCKCFGR2_UART7SEL_SHIFT) /* HSI clock is selected as UART 7 clock */ +# define RCC_DCKCFGR2_UART7SEL_LSE (3 << RCC_DCKCFGR2_UART7SEL_SHIFT) /* LSE clock is selected as UART 7 clock */ +#define RCC_DCKCFGR2_UART8SEL_SHIFT (14) /* Bits 14-15: UART 8 clock source selection */ +#define RCC_DCKCFGR2_UART8SEL_MASK (3 << RCC_DCKCFGR2_UART8SEL_SHIFT) +# define RCC_DCKCFGR2_UART8SEL_APB (0 << RCC_DCKCFGR2_UART8SEL_SHIFT) /* APB1 clock (PCLK1) is selected as UART 8 clock */ +# define RCC_DCKCFGR2_UART8SEL_SYSCLK (1 << RCC_DCKCFGR2_UART8SEL_SHIFT) /* System clock is selected as UART 8 clock */ +# define RCC_DCKCFGR2_UART8SEL_HSI (2 << RCC_DCKCFGR2_UART8SEL_SHIFT) /* HSI clock is selected as UART 8 clock */ +# define RCC_DCKCFGR2_UART8SEL_LSE (3 << RCC_DCKCFGR2_UART8SEL_SHIFT) /* LSE clock is selected as UART 8 clock */ +#define RCC_DCKCFGR2_I2C1SEL_SHIFT (16) /* Bits 16-17: I2C1 clock source selection */ +#define RCC_DCKCFGR2_I2C1SEL_MASK (3 << RCC_DCKCFGR2_I2C1SEL_SHIFT) +# define RCC_DCKCFGR2_I2C1SEL_APB (0 << RCC_DCKCFGR2_I2C1SEL_SHIFT) /* APB1 clock (PCLK1) is selected as I2C 1 clock */ +# define RCC_DCKCFGR2_I2C1SEL_SYSCLK (1 << RCC_DCKCFGR2_I2C1SEL_SHIFT) /* System clock is selected as I2C 1 clock */ +# define RCC_DCKCFGR2_I2C1SEL_HSI (2 << RCC_DCKCFGR2_I2C1SEL_SHIFT) /* HSI clock is selected as I2C 1 clock */ +#define RCC_DCKCFGR2_I2C2SEL_SHIFT (18) /* Bits 18-19: I2C2 clock source selection */ +#define RCC_DCKCFGR2_I2C2SEL_MASK (3 << RCC_DCKCFGR2_I2C2SEL_SHIFT) +# define RCC_DCKCFGR2_I2C2SEL_APB (0 << RCC_DCKCFGR2_I2C2SEL_SHIFT) /* APB1 clock (PCLK1) is selected as I2C 2 clock */ +# define RCC_DCKCFGR2_I2C2SEL_SYSCLK (1 << RCC_DCKCFGR2_I2C2SEL_SHIFT) /* System clock is selected as I2C 2 clock */ +# define RCC_DCKCFGR2_I2C2SEL_HSI (2 << RCC_DCKCFGR2_I2C2SEL_SHIFT) /* HSI clock is selected as I2C 2 clock */ +#define RCC_DCKCFGR2_I2C3SEL_SHIFT (20) /* Bits 20-21: I2C3 clock source selection */ +#define RCC_DCKCFGR2_I2C3SEL_MASK (3 << RCC_DCKCFGR2_I2C3SEL_SHIFT) +# define RCC_DCKCFGR2_I2C3SEL_APB (0 << RCC_DCKCFGR2_I2C3SEL_SHIFT) /* APB1 clock (PCLK1) is selected as I2C 3 clock */ +# define RCC_DCKCFGR2_I2C3SEL_SYSCLK (1 << RCC_DCKCFGR2_I2C3SEL_SHIFT) /* System clock is selected as I2C 3 clock */ +# define RCC_DCKCFGR2_I2C3SEL_HSI (2 << RCC_DCKCFGR2_I2C3SEL_SHIFT) /* HSI clock is selected as I2C 3 clock */ +#define RCC_DCKCFGR2_I2C4SEL_SHIFT (22) /* Bits 22-23: I2C4 clock source selection */ +#define RCC_DCKCFGR2_I2C4SEL_MASK (3 << RCC_DCKCFGR2_I2C4SEL_SHIFT) +# define RCC_DCKCFGR2_I2C4SEL_APB (0 << RCC_DCKCFGR2_I2C4SEL_SHIFT) /* APB1 clock (PCLK1) is selected as I2C 4 clock */ +# define RCC_DCKCFGR2_I2C4SEL_SYSCLK (1 << RCC_DCKCFGR2_I2C4SEL_SHIFT) /* System clock is selected as I2C 4 clock */ +# define RCC_DCKCFGR2_I2C4SEL_HSI (2 << RCC_DCKCFGR2_I2C4SEL_SHIFT) /* HSI clock is selected as I2C 4 clock */ +#define RCC_DCKCFGR2_LPTIM1SEL_SHIFT (24) /* Bits 24-25: Low power timer 1 clock source selection */ +#define RCC_DCKCFGR2_LPTIM1SEL_MASK (3 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) +# define RCC_DCKCFGR2_LPTIM1SEL_APB (0 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) /* APB1 clock (PCLK1) is selected as LPTIM 1 clock */ +# define RCC_DCKCFGR2_LPTIM1SEL_SYSCLK (1 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) /* System clock is selected as LPTIM 1 clock */ +# define RCC_DCKCFGR2_LPTIM1SEL_HSI (2 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) /* HSI clock is selected as LPTIM 1 clock */ +# define RCC_DCKCFGR2_LPTIM1SEL_LSE (3 << RCC_DCKCFGR2_LPTIM1SEL_SHIFT) /* LSE clock is selected as LPTIM 1 clock */ +#define RCC_DCKCFGR2_CECSEL_SHIFT (26) /* Bit 26: HDMI-CEC clock source selection */ +#define RCC_DCKCFGR2_CECSEL_MASK (1 << RCC_DCKCFGR2_CECSEL_SHIFT) +# define RCC_DCKCFGR2_CECSEL_LSE (0 << RCC_DCKCFGR2_CECSEL_SHIFT) /* LSE clock is selected as HDMI-CEC clock */ +# define RCC_DCKCFGR2_CECSEL_HSI (1 << RCC_DCKCFGR2_CECSEL_SHIFT) /* HSI clock is selected as HDMI-CEC clock */ +#define RCC_DCKCFGR2_CK48MSEL_SHIFT (27) /* Bit 27: 48MHz clock source selection */ +#define RCC_DCKCFGR2_CK48MSEL_MASK (1 << RCC_DCKCFGR2_CK48MSEL_SHIFT) +# define RCC_DCKCFGR2_CK48MSEL_PLL (0 << RCC_DCKCFGR2_CK48MSEL_SHIFT) /* 48MHz clock from PLL is selected */ +# define RCC_DCKCFGR2_CK48MSEL_PLLSAI (1 << RCC_DCKCFGR2_CK48MSEL_SHIFT) /*48MHz clock from PLLSAI is selected */ +#define RCC_DCKCFGR2_SDMMCSEL_SHIFT (28) /* Bit 28: SDMMC clock source selection */ +#define RCC_DCKCFGR2_SDMMCSEL_MASK (1 << RCC_DCKCFGR2_SDMMCSEL_SHIFT) +# define RCC_DCKCFGR2_SDMMCSEL_48MHZ (0 << RCC_DCKCFGR2_SDMMCSEL_SHIFT) /* 48 MHz clock is selected as SDMMC clock */ +# define RCC_DCKCFGR2_SDMMCSEL_SYSCLK (1 << RCC_DCKCFGR2_SDMMCSEL_SHIFT) /* System clock is selected as SDMMC clock */ +#define RCC_DCKCFGR2_SDMMC2SEL_SHIFT (29) /* Bit 29: SDMMC 2 clock source selection */ +#define RCC_DCKCFGR2_SDMMC2SEL_MASK (1 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT) +# define RCC_DCKCFGR2_SDMMC2SEL_48MHZ (0 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT) /* 48 MHz clock is selected as SDMMC 2 clock */ +# define RCC_DCKCFGR2_SDMMC2SEL_SYSCLK (1 << RCC_DCKCFGR2_SDMMC2SEL_SHIFT) /* System clock is selected as SDMMC 2 clock */ +#define RCC_DCKCFGR2_DSISEL_SHIFT (30) /* Bit 30: DSI clock source selection */ +#define RCC_DCKCFGR2_DSISELL_MASK (1 << RCC_DCKCFGR2_DSISEL_SHIFT) +# define RCC_DCKCFGR2_DSISEL_48MHZ (0 << RCC_DCKCFGR2_DSISEL_SHIFT) /* 48 MHz clock is selected as DSI clock */ +# define RCC_DCKCFGR2_DSISEL_SYSCLK (1 << RCC_DCKCFGR2_DSISEL_SHIFT) /* System clock is selected as DSI clock */ + +#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ +#endif /* __ARCH_ARM_SRC_STM32_CHIP_STM32F76XX77XX_RCC_H */ diff --git a/arch/arm/src/stm32f7/chip/stm32f76xx77xx_syscfg.h b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_syscfg.h new file mode 100644 index 00000000000..d3a469fe8a6 --- /dev/null +++ b/arch/arm/src/stm32f7/chip/stm32f76xx77xx_syscfg.h @@ -0,0 +1,180 @@ +/**************************************************************************************************** + * arch/arm/src/stm32f7/chip/stm32f76xx77xx_syscfg.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************************************/ + +#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_SYSCFG_H +#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_SYSCFG_H + +/**************************************************************************************************** + * Included Files + ****************************************************************************************************/ + +#include +#include "chip.h" + +#if defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) + +/**************************************************************************************************** + * Pre-processor Definitions + ****************************************************************************************************/ + +/* Register Offsets *********************************************************************************/ + +#define STM32_SYSCFG_MEMRMP_OFFSET 0x0000 /* SYSCFG memory remap register */ +#define STM32_SYSCFG_PMC_OFFSET 0x0004 /* SYSCFG peripheral mode configuration register */ + +#define STM32_SYSCFG_EXTICR_OFFSET(p) (0x0008 + ((p) & 0x000c)) /* Registers are displaced by 4! */ +#define STM32_SYSCFG_EXTICR1_OFFSET 0x0008 /* SYSCFG external interrupt configuration register 1 */ +#define STM32_SYSCFG_EXTICR2_OFFSET 0x000c /* SYSCFG external interrupt configuration register 2 */ +#define STM32_SYSCFG_EXTICR3_OFFSET 0x0010 /* SYSCFG external interrupt configuration register 3 */ +#define STM32_SYSCFG_EXTICR4_OFFSET 0x0014 /* SYSCFG external interrupt configuration register 4 */ + +#define STM32_SYSCFG_CBR_OFFSET 0x001c /* Class B register */ +#define STM32_SYSCFG_CMPCR_OFFSET 0x0020 /* Compensation cell control register */ + +/* Register Addresses *******************************************************************************/ + +#define STM32_SYSCFG_MEMRMP (STM32_SYSCFG_BASE+STM32_SYSCFG_MEMRMP_OFFSET) +#define STM32_SYSCFG_PMC (STM32_SYSCFG_BASE+STM32_SYSCFG_PMC_OFFSET) + +#define STM32_SYSCFG_EXTICR(p) (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR_OFFSET(p)) +#define STM32_SYSCFG_EXTICR1 (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR1_OFFSET) +#define STM32_SYSCFG_EXTICR2 (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR2_OFFSET) +#define STM32_SYSCFG_EXTICR3 (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR3_OFFSET) +#define STM32_SYSCFG_EXTICR4 (STM32_SYSCFG_BASE+STM32_SYSCFG_EXTICR4_OFFSET) + +#define STM32_SYSCFG_CBR (STM32_SYSCFG_BASE+STM32_SYSCFG_CBR_OFFSET) +#define STM32_SYSCFG_CMPCR (STM32_SYSCFG_BASE+STM32_SYSCFG_CMPCR_OFFSET) + +/* Register Bitfield Definitions ********************************************************************/ + +/* SYSCFG memory remap register */ + +#define SYSCFG_MEMRMP_MEMBOOT (1 << 0) /* Bit 0: Memory boot mapping */ +#define SYSCFG_MEMRMP_MEMBOOT_ADD0 (0 << 0) /* 0=BOOT_ADD0 defines */ +#define SYSCFG_MEMRMP_MEMBOOT_ADD1 (1 << 0) /* 1=BOOT_ADD1 defines */ +#define SYSCFG_MEMRMP_SWP_FB (1 << 8) /* Bits 8: Flash Bank swap */ +#define SYSCFG_MEMRMP_SWP_FB_BNK1 (0 << 8) /* Flash Bank 1 mapped at 0x08000000 + * Flash Bank 2 mapped at 0x08100000 */ +#define SYSCFG_MEMRMP_SWP_FB_BNK2 (1 << 8) /* Flash Bank 2 mapped at 0x08000000 + * Flash Bank 1 mapped at 0x08100000 */ +#define SYSCFG_MEMRMP_SWPFMC_SHIFT (10) /* Bits 10-11: FMC memory mapping swap */ +#define SYSCFG_MEMRMP_SWPFMC_MASK (3 << SYSCFG_MEMRMP_SWPFMC_SHIFT) +# define SYSCFG_MEMRMP_SWPFMC_NONE (0 << SYSCFG_MEMRMP_SWPFMC_SHIFT) /* No FMC memory mapping swapping */ +# define SYSCFG_MEMRMP_SWPFMC_NORRAM (1 << SYSCFG_MEMRMP_SWPFMC_SHIFT) /* NOR/RAM and SDRAM memory mapping swapped */ + +/* SYSCFG peripheral mode configuration register */ + +#define SYSCFG_PMC_I2C1_FMP (1 << 0) /* Bit 0: I2C1 Fast-mode Plus Enable */ +#define SYSCFG_PMC_I2C2_FMP (1 << 1) /* Bit 1: I2C2 Fast-mode Plus Enable */ +#define SYSCFG_PMC_I2C3_FMP (1 << 2) /* Bit 2: I2C3 Fast-mode Plus Enable */ +#define SYSCFG_PMC_I2C4_FMP (1 << 3) /* Bit 3: I2C4 Fast-mode Plus Enable */ +#define SYSCFG_PMC_PB6_FMP (1 << 4) /* Bit 4: PB6 IO pads Fast-mode Plus Enable */ +#define SYSCFG_PMC_PB7_FMP (1 << 5) /* Bit 5: PB7 IO pads Fast-mode Plus Enable */ +#define SYSCFG_PMC_PB8_FMP (1 << 6) /* Bit 6: PB8 IO pads Fast-mode Plus Enable */ +#define SYSCFG_PMC_PB9_FMP (1 << 7) /* Bit 7: PB9 IO pads Fast-mode Plus Enable */ +#define SYSCFG_PMC_ADC1DC2 (1 << 16) /* Bit 16: See AN4073 */ +#define SYSCFG_PMC_ADC2DC2 (1 << 17) /* Bit 17: See AN4073 */ +#define SYSCFG_PMC_ADC3DC2 (1 << 18) /* Bit 18: See AN4073 */ +#define SYSCFG_PMC_MII_RMII_SEL (1 << 23) /* Bit 23: Ethernet PHY interface selection */ +# define SYSCFG_PMC_MII_SEL (0 << 23) /* 0 selects MII */ +# define SYSCFG_PMC_RMII_SEL (1 << 23) /* 1 selects RMII */ + +/* SYSCFG external interrupt configuration register 1-4 */ + +#define SYSCFG_EXTICR_PORTA (0) /* 0000: PA[x] pin */ +#define SYSCFG_EXTICR_PORTB (1) /* 0001: PB[x] pin */ +#define SYSCFG_EXTICR_PORTC (2) /* 0010: PC[x] pin */ +#define SYSCFG_EXTICR_PORTD (3) /* 0011: PD[x] pin */ +#define SYSCFG_EXTICR_PORTE (4) /* 0100: PE[x] pin */ +#define SYSCFG_EXTICR_PORTF (5) /* 0101: PF[C] pin */ +#define SYSCFG_EXTICR_PORTG (6) /* 0110: PG[x] pin */ +#define SYSCFG_EXTICR_PORTH (7) /* 0111: PH[x] pin */ +#define SYSCFG_EXTICR_PORTI (8) /* 1000: PI[x] pin */ +#define SYSCFG_EXTICR_PORTJ (9) /* 1001: PJ[x] pin */ +#define SYSCFG_EXTICR_PORTK (10) /* 1010: PK[x] pin */ + +#define SYSCFG_EXTICR_PORT_MASK (15) +#define SYSCFG_EXTICR_EXTI_SHIFT(g) (((g) & 3) << 2) +#define SYSCFG_EXTICR_EXTI_MASK(g) (SYSCFG_EXTICR_PORT_MASK << (SYSCFG_EXTICR_EXTI_SHIFT(g))) + +#define SYSCFG_EXTICR1_EXTI0_SHIFT (0) /* Bits 0-3: EXTI 0 coinfiguration */ +#define SYSCFG_EXTICR1_EXTI0_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI0_SHIFT) +#define SYSCFG_EXTICR1_EXTI1_SHIFT (4) /* Bits 4-7: EXTI 1 coinfiguration */ +#define SYSCFG_EXTICR1_EXTI1_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI1_SHIFT) +#define SYSCFG_EXTICR1_EXTI2_SHIFT (8) /* Bits 8-11: EXTI 2 coinfiguration */ +#define SYSCFG_EXTICR1_EXTI2_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI2_SHIFT) +#define SYSCFG_EXTICR1_EXTI3_SHIFT (12) /* Bits 12-15: EXTI 3 coinfiguration */ +#define SYSCFG_EXTICR1_EXTI3_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR1_EXTI3_SHIFT) + +#define SYSCFG_EXTICR2_EXTI4_SHIFT (0) /* Bits 0-3: EXTI 4 coinfiguration */ +#define SYSCFG_EXTICR2_EXTI4_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI4_SHIFT) +#define SYSCFG_EXTICR2_EXTI5_SHIFT (4) /* Bits 4-7: EXTI 5 coinfiguration */ +#define SYSCFG_EXTICR2_EXTI5_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI5_SHIFT) +#define SYSCFG_EXTICR2_EXTI6_SHIFT (8) /* Bits 8-11: EXTI 6 coinfiguration */ +#define SYSCFG_EXTICR2_EXTI6_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI6_SHIFT) +#define SYSCFG_EXTICR2_EXTI7_SHIFT (12) /* Bits 12-15: EXTI 7 coinfiguration */ +#define SYSCFG_EXTICR2_EXTI7_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR2_EXTI7_SHIFT) + +#define SYSCFG_EXTICR3_EXTI8_SHIFT (0) /* Bits 0-3: EXTI 8 coinfiguration */ +#define SYSCFG_EXTICR3_EXTI8_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI8_SHIFT) +#define SYSCFG_EXTICR3_EXTI9_SHIFT (4) /* Bits 4-7: EXTI 9 coinfiguration */ +#define SYSCFG_EXTICR3_EXTI9_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI9_SHIFT) +#define SYSCFG_EXTICR3_EXTI10_SHIFT (8) /* Bits 8-11: EXTI 10 coinfiguration */ +#define SYSCFG_EXTICR3_EXTI10_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI10_SHIFT) +#define SYSCFG_EXTICR3_EXTI11_SHIFT (12) /* Bits 12-15: EXTI 11 coinfiguration */ +#define SYSCFG_EXTICR3_EXTI11_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR3_EXTI11_SHIFT) + +#define SYSCFG_EXTICR4_EXTI12_SHIFT (0) /* Bits 0-3: EXTI 12 coinfiguration */ +#define SYSCFG_EXTICR4_EXTI12_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI12_SHIFT) +#define SYSCFG_EXTICR4_EXTI13_SHIFT (4) /* Bits 4-7: EXTI 13 coinfiguration */ +#define SYSCFG_EXTICR4_EXTI13_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI13_SHIFT) +#define SYSCFG_EXTICR4_EXTI14_SHIFT (8) /* Bits 8-11: EXTI 14 coinfiguration */ +#define SYSCFG_EXTICR4_EXTI14_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI14_SHIFT) +#define SYSCFG_EXTICR4_EXTI15_SHIFT (12) /* Bits 12-15: EXTI 15 coinfiguration */ +#define SYSCFG_EXTICR4_EXTI15_MASK (SYSCFG_EXTICR_PORT_MASK << SYSCFG_EXTICR4_EXTI15_SHIFT) + +/* Class B register */ + +#define SYSCFG_CBR_PVD (1 << 0) /* Bit 0: PVDL: PVD Lock */ +#define SYSCFG_CBR_CLL (1 << 2) /* Bit 2: CLL Core Lockup Lock*/ + +/* Compensation cell control register */ + +#define SYSCFG_CMPCR_CMPPD (1 << 0) /* Bit 0: Compensation cell power-down */ +#define SYSCFG_CMPCR_READY (1 << 8) /* Bit 8: Compensation cell ready flag */ + +#endif /* CONFIG_STM32F7_STM32F76XX || CONFIG_STM32F7_STM32F77XX */ +#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32F76XX77XX_SYSCFG_H */ diff --git a/arch/arm/src/stm32f7/stm32_config.h b/arch/arm/src/stm32f7/stm32_config.h index 09762b9c6b6..d26fee87139 100644 --- a/arch/arm/src/stm32f7/stm32_config.h +++ b/arch/arm/src/stm32f7/stm32_config.h @@ -113,13 +113,13 @@ * for our purposes. */ -#ifndef CONFIG_USART0_ISUART +#ifndef CONFIG_USART0_SERIALDRIVER # undef CONFIG_STM32F7_USART0 #endif -#ifndef CONFIG_USART1_ISUART +#ifndef CONFIG_USART1_SERIALDRIVER # undef CONFIG_STM32F7_USART1 #endif -#ifndef CONFIG_USART2_ISUART +#ifndef CONFIG_USART2_SERIALDRIVER # undef CONFIG_STM32F7_USART2 #endif diff --git a/arch/arm/src/stm32f7/stm32_dma.c b/arch/arm/src/stm32f7/stm32_dma.c index ff904c1d6b0..eab3412fbee 100644 --- a/arch/arm/src/stm32f7/stm32_dma.c +++ b/arch/arm/src/stm32f7/stm32_dma.c @@ -59,7 +59,8 @@ * families */ -#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \ + || defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) /**************************************************************************** * Pre-processor Definitions diff --git a/arch/arm/src/stm32f7/stm32_dumpgpio.c b/arch/arm/src/stm32f7/stm32_dumpgpio.c index e1772e89cd1..24429b01e20 100644 --- a/arch/arm/src/stm32f7/stm32_dumpgpio.c +++ b/arch/arm/src/stm32f7/stm32_dumpgpio.c @@ -57,7 +57,8 @@ * families */ -#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \ + || defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) /**************************************************************************** * Private Data diff --git a/arch/arm/src/stm32f7/stm32_ethernet.c b/arch/arm/src/stm32f7/stm32_ethernet.c index 4cf496a4eb9..4e6664ade1b 100644 --- a/arch/arm/src/stm32f7/stm32_ethernet.c +++ b/arch/arm/src/stm32f7/stm32_ethernet.c @@ -609,9 +609,9 @@ struct stm32_ethmac_s struct work_s work; /* For deferring work to the work queue */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ /* Used to track transmit and receive descriptors */ @@ -1041,7 +1041,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv) struct eth_txdesc_s *txdesc; struct eth_txdesc_s *txfirst; - /* The internal (optimal) uIP buffer size may be configured to be larger + /* The internal (optimal) network buffer size may be configured to be larger * than the Ethernet buffer size. */ @@ -1249,7 +1249,7 @@ static int stm32_transmit(struct stm32_ethmac_s *priv) * Function: stm32_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -1391,7 +1391,7 @@ static void stm32_dopoll(struct stm32_ethmac_s *priv) if ((priv->txhead->tdes0 & ETH_TDES0_OWN) == 0 && priv->txhead->tdes2 == 0) { - /* If we have the descriptor, then poll uIP for new XMIT data. + /* If we have the descriptor, then poll the network for new XMIT data. * Allocate a buffer for the poll. */ @@ -1675,7 +1675,7 @@ static int stm32_recvframe(struct stm32_ethmac_s *priv) buffer = stm32_allocbuffer(priv); /* Take the buffer from the RX descriptor of the first free - * segment, put it into the uIP device structure, then replace + * segment, put it into the network device structure, then replace * the buffer in the RX descriptor with the newly allocated * buffer. */ @@ -1778,7 +1778,7 @@ static void stm32_receive(struct stm32_ethmac_s *priv) pkt_input(&priv->dev); #endif - /* Check if the packet is a valid size for the uIP buffer configuration + /* Check if the packet is a valid size for the network buffer configuration * (this should not happen) */ @@ -2072,7 +2072,7 @@ static void stm32_txdone(struct stm32_ethmac_s *priv) stm32_disableint(priv, ETH_DMAINT_TI); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ stm32_dopoll(priv); } @@ -2437,7 +2437,7 @@ static inline void stm32_poll_process(struct stm32_ethmac_s *priv) if (dev->d_buf) { - /* Update TCP timing states and poll uIP for new XMIT data. + /* Update TCP timing states and poll the network for new XMIT data. */ (void)devif_timer(dev, stm32_txpoll); @@ -2667,7 +2667,7 @@ static inline void stm32_txavail_process(struct stm32_ethmac_s *priv) if (priv->ifup) { - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ stm32_dopoll(priv); } diff --git a/arch/arm/src/stm32f7/stm32_exti_gpio.c b/arch/arm/src/stm32f7/stm32_exti_gpio.c index 7c150275635..ec4cd1a7d71 100644 --- a/arch/arm/src/stm32f7/stm32_exti_gpio.c +++ b/arch/arm/src/stm32f7/stm32_exti_gpio.c @@ -65,7 +65,8 @@ * families */ -#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \ + || defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) /**************************************************************************** * Private Data diff --git a/arch/arm/src/stm32f7/stm32_gpio.c b/arch/arm/src/stm32f7/stm32_gpio.c index ee4e0f819bb..0cd386725ff 100644 --- a/arch/arm/src/stm32f7/stm32_gpio.c +++ b/arch/arm/src/stm32f7/stm32_gpio.c @@ -57,7 +57,8 @@ * families */ -#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) +#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) \ + || defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) /**************************************************************************** * Public Data diff --git a/arch/arm/src/stm32f7/stm32_rcc.c b/arch/arm/src/stm32f7/stm32_rcc.c index bd1d1e7bcab..21cac17ad73 100644 --- a/arch/arm/src/stm32f7/stm32_rcc.c +++ b/arch/arm/src/stm32f7/stm32_rcc.c @@ -2,7 +2,8 @@ * arch/arm/src/stm32f7/stm32_rcc.c * * Copyright (C) 2015 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -75,6 +76,8 @@ #if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX) # include "stm32f74xx75xx_rcc.c" +#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX) +# include "stm32f76xx77xx_rcc.c" #else # error "Unsupported STM32 F7 chip" #endif diff --git a/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c new file mode 100644 index 00000000000..74d58b52ade --- /dev/null +++ b/arch/arm/src/stm32f7/stm32f76xx77xx_rcc.c @@ -0,0 +1,886 @@ +/**************************************************************************** + * arch/arm/src/stm32f7/stm32f76xxx77xx_rcc.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Authors: Gregory Nutt + * David Sidrane + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "stm32_pwr.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Allow up to 100 milliseconds for the high speed clock to become ready. + * that is a very long delay, but if the clock does not become ready we are + * hosed anyway. Normally this is very fast, but I have seen at least one + * board that required this long, long timeout for the HSE to be ready. + */ + +#define HSERDY_TIMEOUT (100 * CONFIG_BOARD_LOOPSPERMSEC) + +/* Same for HSI */ + +#define HSIRDY_TIMEOUT HSERDY_TIMEOUT + +/* HSE divisor to yield ~1MHz RTC clock */ + +#define HSE_DIVISOR (STM32_HSE_FREQUENCY + 500000) / 1000000 + +/* FLASH wait states */ + +#if !defined(BOARD_FLASH_WAITSTATES) +# error BOARD_FLASH_WAITSTATES not defined +#elif BOARD_FLASH_WAITSTATES < 0 || BOARD_FLASH_WAITSTATES > 15 +# error BOARD_FLASH_WAITSTATES is out of range +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: rcc_reset + * + * Description: + * Reset the RCC clock configuration to the default reset state + * + ****************************************************************************/ + +static inline void rcc_reset(void) +{ + uint32_t regval; + + /* Enable the Internal High Speed clock (HSI) */ + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_HSION; + putreg32(regval, STM32_RCC_CR); + + /* Reset CFGR register */ + + putreg32(0x00000000, STM32_RCC_CFGR); + + /* Reset HSION, HSEON, CSSON and PLLON bits */ + + regval = getreg32(STM32_RCC_CR); + regval &= ~(RCC_CR_HSION | RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLLON); + putreg32(regval, STM32_RCC_CR); + + /* Reset PLLCFGR register to reset default */ + + putreg32(RCC_PLLCFG_RESET, STM32_RCC_PLLCFG); + + /* Reset HSEBYP bit */ + + regval = getreg32(STM32_RCC_CR); + regval &= ~RCC_CR_HSEBYP; + putreg32(regval, STM32_RCC_CR); + + /* Disable all interrupts */ + + putreg32(0x00000000, STM32_RCC_CIR); +} + +/**************************************************************************** + * Name: rcc_enableahb1 + * + * Description: + * Enable selected AHB1 peripherals + * + ****************************************************************************/ + +static inline void rcc_enableahb1(void) +{ + uint32_t regval; + + /* Set the appropriate bits in the AHB1ENR register to enabled the + * selected AHB1 peripherals. + */ + + regval = getreg32(STM32_RCC_AHB1ENR); + + /* Enable GPIOA, GPIOB, .... GPIOI */ + +#if STM32F7_NGPIO > 0 + regval |= (RCC_AHB1ENR_GPIOAEN +#if STM32F7_NGPIO > 1 + | RCC_AHB1ENR_GPIOBEN +#endif +#if STM32F7_NGPIO > 2 + | RCC_AHB1ENR_GPIOCEN +#endif +#if STM32F7_NGPIO > 3 + | RCC_AHB1ENR_GPIODEN +#endif +#if STM32F7_NGPIO > 4 + | RCC_AHB1ENR_GPIOEEN +#endif +#if STM32F7_NGPIO > 5 + | RCC_AHB1ENR_GPIOFEN +#endif +#if STM32F7_NGPIO > 6 + | RCC_AHB1ENR_GPIOGEN +#endif +#if STM32F7_NGPIO > 7 + | RCC_AHB1ENR_GPIOHEN +#endif +#if STM32F7_NGPIO > 8 + | RCC_AHB1ENR_GPIOIEN +#endif +#if STM32F7_NGPIO > 9 + | RCC_AHB1ENR_GPIOJEN +#endif +#if STM32F7_NGPIO > 10 + | RCC_AHB1ENR_GPIOKEN +#endif + ); +#endif + +#ifdef CONFIG_STM32F7_CRC + /* CRC clock enable */ + + regval |= RCC_AHB1ENR_CRCEN; +#endif + +#ifdef CONFIG_STM32F7_BKPSRAM + /* Backup SRAM clock enable */ + + regval |= RCC_AHB1ENR_BKPSRAMEN; +#endif + +#ifdef CONFIG_ARMV7M_DTCM + /* DTCM data RAM clock enable */ + + regval |= RCC_AHB1ENR_DTCMRAMEN; +#endif + +#ifdef CONFIG_STM32F7_DMA1 + /* DMA 1 clock enable */ + + regval |= RCC_AHB1ENR_DMA1EN; +#endif + +#ifdef CONFIG_STM32F7_DMA2 + /* DMA 2 clock enable */ + + regval |= RCC_AHB1ENR_DMA2EN; +#endif + +#ifdef CONFIG_STM32F7_DMA2D + /* DMA2D clock */ + + regval |= RCC_AHB1ENR_DMA2DEN; +#endif + +#ifdef CONFIG_STM32F7_ETHMAC + /* Ethernet MAC clocking */ + + regval |= (RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN | \ + RCC_AHB1ENR_ETHMACRXEN); + +#ifdef CONFIG_STM32F7_ETH_PTP + /* Precision Time Protocol (PTP) */ + + regval |= RCC_AHB1ENR_ETHMACPTPEN; + +#endif +#endif + +#ifdef CONFIG_STM32F7_OTGHS + /* USB OTG HS */ + + regval |= RCC_AHB1ENR_OTGHSEN; +#endif /* CONFIG_STM32F7_OTGHS */ + + putreg32(regval, STM32_RCC_AHB1ENR); /* Enable peripherals */ +} + +/**************************************************************************** + * Name: rcc_enableahb2 + * + * Description: + * Enable selected AHB2 peripherals + * + ****************************************************************************/ + +static inline void rcc_enableahb2(void) +{ + uint32_t regval; + + /* Set the appropriate bits in the AHB2ENR register to enabled the + * selected AHB2 peripherals. + */ + + regval = getreg32(STM32_RCC_AHB2ENR); + +#ifdef CONFIG_STM32F7_DCMI + /* Camera interface enable */ + + regval |= RCC_AHB2ENR_DCMIEN; +#endif + +#ifdef CONFIG_STM32F7_CRYP + /* Cryptographic modules clock enable */ + + regval |= RCC_AHB2ENR_CRYPEN; +#endif + +#ifdef CONFIG_STM32F7_HASH + /* Hash modules clock enable */ + + regval |= RCC_AHB2ENR_HASHEN; +#endif + +#ifdef CONFIG_STM32F7_RNG + /* Random number generator clock enable */ + + regval |= RCC_AHB2ENR_RNGEN; +#endif + +#ifdef CONFIG_STM32F7_OTGFS + /* USB OTG FS clock enable */ + + regval |= RCC_AHB2ENR_OTGFSEN; +#endif + + putreg32(regval, STM32_RCC_AHB2ENR); /* Enable peripherals */ +} + +/**************************************************************************** + * Name: rcc_enableahb3 + * + * Description: + * Enable selected AHB3 peripherals + * + ****************************************************************************/ + +static inline void rcc_enableahb3(void) +{ + uint32_t regval; + + /* Set the appropriate bits in the AHB3ENR register to enabled the + * selected AHB3 peripherals. + */ + + regval = getreg32(STM32_RCC_AHB3ENR); + +#ifdef CONFIG_STM32F7_FSMC + /* Flexible static memory controller module clock enable */ + + regval |= RCC_AHB3ENR_FSMCEN; +#endif + +#ifdef CONFIG_STM32F7_QUADSPI + /* FQuad SPI memory controller clock enable */ + + regval |= RCC_AHB3ENR_QSPIEN; +#endif + + putreg32(regval, STM32_RCC_AHB3ENR); /* Enable peripherals */ +} + +/**************************************************************************** + * Name: rcc_enableapb1 + * + * Description: + * Enable selected APB1 peripherals + * + ****************************************************************************/ + +static inline void rcc_enableapb1(void) +{ + uint32_t regval; + + /* Set the appropriate bits in the APB1ENR register to enabled the + * selected APB1 peripherals. + */ + + regval = getreg32(STM32_RCC_APB1ENR); + +#ifdef CONFIG_STM32F7_TIM2 + /* TIM2 clock enable */ + + regval |= RCC_APB1ENR_TIM2EN; +#endif + +#ifdef CONFIG_STM32F7_TIM3 + /* TIM3 clock enable */ + + regval |= RCC_APB1ENR_TIM3EN; +#endif + +#ifdef CONFIG_STM32F7_TIM4 + /* TIM4 clock enable */ + + regval |= RCC_APB1ENR_TIM4EN; +#endif + +#ifdef CONFIG_STM32F7_TIM5 + /* TIM5 clock enable */ + + regval |= RCC_APB1ENR_TIM5EN; +#endif + +#ifdef CONFIG_STM32F7_TIM6 + /* TIM6 clock enable */ + + regval |= RCC_APB1ENR_TIM6EN; +#endif + +#ifdef CONFIG_STM32F7_TIM7 + /* TIM7 clock enable */ + + regval |= RCC_APB1ENR_TIM7EN; +#endif + +#ifdef CONFIG_STM32F7_TIM12 + /* TIM12 clock enable */ + + regval |= RCC_APB1ENR_TIM12EN; +#endif + +#ifdef CONFIG_STM32F7_TIM13 + /* TIM13 clock enable */ + + regval |= RCC_APB1ENR_TIM13EN; +#endif + +#ifdef CONFIG_STM32F7_TIM14 + /* TIM14 clock enable */ + + regval |= RCC_APB1ENR_TIM14EN; +#endif + +#ifdef CONFIG_STM32F7_LPTIM1 + /* Low-power timer 1 clock enable */ + + regval |= RCC_APB1ENR_LPTIM1EN; +#endif + +#ifdef CONFIG_STM32F7_WWDG + /* Window watchdog clock enable */ + + regval |= RCC_APB1ENR_WWDGEN; +#endif + +#ifdef CONFIG_STM32F7_SPI2 + /* SPI2 clock enable */ + + regval |= RCC_APB1ENR_SPI2EN; +#endif + +#ifdef CONFIG_STM32F7_SPI3 + /* SPI3 clock enable */ + + regval |= RCC_APB1ENR_SPI3EN; +#endif + +#ifdef CONFIG_STM32F7_SPDIFRX + /* SPDIFRX clock enable */ + + regval |= RCC_APB1ENR_SPDIFRXEN; +#endif + +#ifdef CONFIG_STM32F7_USART2 + /* USART 2 clock enable */ + + regval |= RCC_APB1ENR_USART2EN; +#endif + +#ifdef CONFIG_STM32F7_USART3 + /* USART3 clock enable */ + + regval |= RCC_APB1ENR_USART3EN; +#endif + +#ifdef CONFIG_STM32F7_UART4 + /* UART4 clock enable */ + + regval |= RCC_APB1ENR_UART4EN; +#endif + +#ifdef CONFIG_STM32F7_UART5 + /* UART5 clock enable */ + + regval |= RCC_APB1ENR_UART5EN; +#endif + +#ifdef CONFIG_STM32F7_I2C1 + /* I2C1 clock enable */ + + regval |= RCC_APB1ENR_I2C1EN; +#endif + +#ifdef CONFIG_STM32F7_I2C2 + /* I2C2 clock enable */ + + regval |= RCC_APB1ENR_I2C2EN; +#endif + +#ifdef CONFIG_STM32F7_I2C3 + /* I2C3 clock enable */ + + regval |= RCC_APB1ENR_I2C3EN; +#endif + +#ifdef CONFIG_STM32F7_I2C4 + /* I2C4 clock enable */ + + regval |= RCC_APB1ENR_I2C4EN; +#endif + +#ifdef CONFIG_STM32F7_CAN1 + /* CAN 1 clock enable */ + + regval |= RCC_APB1ENR_CAN1EN; +#endif + +#ifdef CONFIG_STM32F7_CAN2 + /* CAN2 clock enable. NOTE: CAN2 needs CAN1 clock as well. */ + + regval |= (RCC_APB1ENR_CAN1EN | RCC_APB1ENR_CAN2EN); +#endif + +#ifdef CONFIG_STM32F7_CEC + /* CEC clock enable. */ + + regval |= RCC_APB1ENR_CECEN; +#endif + + /* Power interface clock enable. The PWR block is always enabled so that + * we can set the internal voltage regulator for maximum performance. + */ + + regval |= RCC_APB1ENR_PWREN; + +#if defined (CONFIG_STM32F7_DAC1) || defined(CONFIG_STM32F7_DAC2) + /* DAC interface clock enable */ + + regval |= RCC_APB1ENR_DACEN; +#endif + +#ifdef CONFIG_STM32F7_UART7 + /* UART7 clock enable */ + + regval |= RCC_APB1ENR_UART7EN; +#endif + +#ifdef CONFIG_STM32F7_UART8 + /* UART8 clock enable */ + + regval |= RCC_APB1ENR_UART8EN; +#endif + + putreg32(regval, STM32_RCC_APB1ENR); /* Enable peripherals */ +} + +/**************************************************************************** + * Name: rcc_enableapb2 + * + * Description: + * Enable selected APB2 peripherals + * + ****************************************************************************/ + +static inline void rcc_enableapb2(void) +{ + uint32_t regval; + + /* Set the appropriate bits in the APB2ENR register to enabled the + * selected APB2 peripherals. + */ + + regval = getreg32(STM32_RCC_APB2ENR); + +#ifdef CONFIG_STM32F7_TIM1 + /* TIM1 clock enable */ + + regval |= RCC_APB2ENR_TIM1EN; +#endif + +#ifdef CONFIG_STM32F7_TIM8 + /* TIM8 clock enable */ + + regval |= RCC_APB2ENR_TIM8EN; +#endif + +#ifdef CONFIG_STM32F7_USART1 + /* USART1 clock enable */ + + regval |= RCC_APB2ENR_USART1EN; +#endif + +#ifdef CONFIG_STM32F7_USART6 + /* USART6 clock enable */ + + regval |= RCC_APB2ENR_USART6EN; +#endif + +#ifdef CONFIG_STM32F7_ADC1 + /* ADC1 clock enable */ + + regval |= RCC_APB2ENR_ADC1EN; +#endif + +#ifdef CONFIG_STM32F7_ADC2 + /* ADC2 clock enable */ + + regval |= RCC_APB2ENR_ADC2EN; +#endif + +#ifdef CONFIG_STM32F7_ADC3 + /* ADC3 clock enable */ + + regval |= RCC_APB2ENR_ADC3EN; +#endif + +#ifdef CONFIG_STM32F7_SDMMC1 + /* SDIO clock enable */ + + regval |= RCC_APB2ENR_SDMMC1EN; +#endif + +#ifdef CONFIG_STM32F7_SPI1 + /* SPI1 clock enable */ + + regval |= RCC_APB2ENR_SPI1EN; +#endif + +#ifdef CONFIG_STM32F7_SPI4 + /* SPI4 clock enable */ + + regval |= RCC_APB2ENR_SPI4EN; +#endif + + /* System configuration controller clock enable */ + + regval |= RCC_APB2ENR_SYSCFGEN; + +#ifdef CONFIG_STM32F7_TIM9 + /* TIM9 clock enable */ + + regval |= RCC_APB2ENR_TIM9EN; +#endif + +#ifdef CONFIG_STM32F7_TIM10 + /* TIM10 clock enable */ + + regval |= RCC_APB2ENR_TIM10EN; +#endif + +#ifdef CONFIG_STM32F7_TIM11 + /* TIM11 clock enable */ + + regval |= RCC_APB2ENR_TIM11EN; +#endif + +#ifdef CONFIG_STM32F7_SPI5 + /* SPI5 clock enable */ + + regval |= RCC_APB2ENR_SPI5EN; +#endif + +#ifdef CONFIG_STM32F7_SPI6 + /* SPI6 clock enable */ + + regval |= RCC_APB2ENR_SPI6EN; +#endif + +#ifdef CONFIG_STM32F7_SAI1 + /* SPI6 clock enable */ + + regval |= RCC_APB2ENR_SAI1EN; +#endif + +#ifdef CONFIG_STM32F7_SAI2 + /* SPI6 clock enable */ + + regval |= RCC_APB2ENR_SAI2EN; +#endif + +#ifdef CONFIG_STM32F7_LTDC + /* LTDC clock enable */ + + regval |= RCC_APB2ENR_LTDCEN; +#endif + + putreg32(regval, STM32_RCC_APB2ENR); /* Enable peripherals */ +} + +/**************************************************************************** + * Name: stm32_stdclockconfig + * + * Description: + * Called to change to new clock based on settings in board.h + * + * NOTE: This logic would need to be extended if you need to select low- + * power clocking modes! + ****************************************************************************/ + +#ifndef CONFIG_STM32F7_CUSTOM_CLOCKCONFIG +static void stm32_stdclockconfig(void) +{ + uint32_t regval; + volatile int32_t timeout; + +#ifdef STM32_BOARD_USEHSI + /* Enable Internal High-Speed Clock (HSI) */ + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_HSION; /* Enable HSI */ + putreg32(regval, STM32_RCC_CR); + + /* Wait until the HSI is ready (or until a timeout elapsed) */ + + for (timeout = HSIRDY_TIMEOUT; timeout > 0; timeout--) + { + /* Check if the HSIRDY flag is the set in the CR */ + + if ((getreg32(STM32_RCC_CR) & RCC_CR_HSIRDY) != 0) + { + /* If so, then break-out with timeout > 0 */ + + break; + } + } + +#else /* if STM32_BOARD_USEHSE */ + /* Enable External High-Speed Clock (HSE) */ + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_HSEON; /* Enable HSE */ + putreg32(regval, STM32_RCC_CR); + + /* Wait until the HSE is ready (or until a timeout elapsed) */ + + for (timeout = HSERDY_TIMEOUT; timeout > 0; timeout--) + { + /* Check if the HSERDY flag is the set in the CR */ + + if ((getreg32(STM32_RCC_CR) & RCC_CR_HSERDY) != 0) + { + /* If so, then break-out with timeout > 0 */ + + break; + } + } +#endif + + /* Check for a timeout. If this timeout occurs, then we are hosed. We + * have no real back-up plan, although the following logic makes it look + * as though we do. + */ + + if (timeout > 0) + { + /* Select regulator voltage output Scale 1 mode to support system + * frequencies up to 216 MHz. + */ + + regval = getreg32(STM32_RCC_APB1ENR); + regval |= RCC_APB1ENR_PWREN; + putreg32(regval, STM32_RCC_APB1ENR); + + regval = getreg32(STM32_PWR_CR1); + regval &= ~PWR_CR1_VOS_MASK; + regval |= PWR_CR1_VOS_SCALE_1; + putreg32(regval, STM32_PWR_CR1); + + /* Set the HCLK source/divider */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_HPRE_MASK; + regval |= STM32_RCC_CFGR_HPRE; + putreg32(regval, STM32_RCC_CFGR); + + /* Set the PCLK2 divider */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE2_MASK; + regval |= STM32_RCC_CFGR_PPRE2; + putreg32(regval, STM32_RCC_CFGR); + + /* Set the PCLK1 divider */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_PPRE1_MASK; + regval |= STM32_RCC_CFGR_PPRE1; + putreg32(regval, STM32_RCC_CFGR); + +#ifdef CONFIG_RTC_HSECLOCK + /* Set the RTC clock divisor */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_RTCPRE_MASK; + regval |= RCC_CFGR_RTCPRE(HSE_DIVISOR); + putreg32(regval, STM32_RCC_CFGR); +#endif + + /* Set the PLL dividers and multipliers to configure the main PLL */ + +#ifdef STM32_BOARD_USEHSI + regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN | STM32_PLLCFG_PLLP | + RCC_PLLCFG_PLLSRC_HSI | STM32_PLLCFG_PLLQ); +#else /* if STM32_BOARD_USEHSE */ + regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN | STM32_PLLCFG_PLLP | + RCC_PLLCFG_PLLSRC_HSE | STM32_PLLCFG_PLLQ); +#endif + putreg32(regval, STM32_RCC_PLLCFG); + + /* Enable the main PLL */ + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_PLLON; + putreg32(regval, STM32_RCC_CR); + + /* Wait until the PLL is ready */ + + while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0) + { + } + + /* Enable the Over-drive to extend the clock frequency to 216 Mhz */ + + regval = getreg32(STM32_PWR_CR1); + regval |= PWR_CR1_ODEN; + putreg32(regval, STM32_PWR_CR1); + while ((getreg32(STM32_PWR_CSR1) & PWR_CSR1_ODRDY) == 0) + { + } + + regval = getreg32(STM32_PWR_CR1); + regval |= PWR_CR1_ODSWEN; + putreg32(regval, STM32_PWR_CR1); + while ((getreg32(STM32_PWR_CSR1) & PWR_CSR1_ODSWRDY) == 0) + { + } + + /* Configure FLASH wait states */ + + regval = FLASH_ACR_LATENCY(BOARD_FLASH_WAITSTATES); + +#ifdef CONFIG_STM32F7_FLASH_PREFETCH + /* Enable FLASH prefetch */ + + regval |= FLASH_ACR_PRFTEN; +#endif + +#ifdef CONFIG_ARMV7M_ITCM + /* The Flash memory interface accelerates code execution with a system of + * instruction prefetch and cache lines on ITCM interface (ART + * Accelerator™). + */ + + regval |= FLASH_ACR_ARTEN; +#endif + + putreg32(regval, STM32_FLASH_ACR); + + /* Select the main PLL as system clock source */ + + regval = getreg32(STM32_RCC_CFGR); + regval &= ~RCC_CFGR_SW_MASK; + regval |= RCC_CFGR_SW_PLL; + putreg32(regval, STM32_RCC_CFGR); + + /* Wait until the PLL source is used as the system clock source */ + + while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL) + { + } + +#ifdef CONFIG_STM32F7_LTDC + /* Configure PLLSAI */ + + regval = getreg32(STM32_RCC_PLLSAICFGR); + regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN + | STM32_RCC_PLLSAICFGR_PLLSAIR + | STM32_RCC_PLLSAICFGR_PLLSAIQ); + putreg32(regval, STM32_RCC_PLLSAICFGR); + + regval = getreg32(STM32_RCC_DCKCFGR); + regval |= STM32_RCC_DCKCFGR_PLLSAIDIVR; + putreg32(regval, STM32_RCC_DCKCFGR); + + /* Enable PLLSAI */ + + regval = getreg32(STM32_RCC_CR); + regval |= RCC_CR_PLLSAION; + putreg32(regval, STM32_RCC_CR); + + /* Wait until the PLLSAI is ready */ + + while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLSAIRDY) == 0) + { + } +#endif + +#if defined(CONFIG_STM32F7_IWDG) || defined(CONFIG_RTC_LSICLOCK) + /* Low speed internal clock source LSI */ + + stm32_rcc_enablelsi(); +#endif + +#if defined(CONFIG_RTC_LSECLOCK) + /* Low speed external clock source LSE + * + * TODO: There is another case where the LSE needs to + * be enabled: if the MCO1 pin selects LSE as source. + */ + + stm32_rcc_enablelse(); +#endif + } +} +#endif + +/**************************************************************************** + * Name: rcc_enableperiphals + ****************************************************************************/ + +static inline void rcc_enableperipherals(void) +{ + rcc_enableahb1(); + rcc_enableahb2(); + rcc_enableahb3(); + rcc_enableapb1(); + rcc_enableapb2(); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ diff --git a/arch/arm/src/stm32l4/Kconfig b/arch/arm/src/stm32l4/Kconfig index 366fe539a1d..eccd8469bfb 100644 --- a/arch/arm/src/stm32l4/Kconfig +++ b/arch/arm/src/stm32l4/Kconfig @@ -400,14 +400,14 @@ config STM32L4_SPI3 config STM32L4_USART1 bool "USART1" default n - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS select STM32L4_USART config STM32L4_USART2 bool "USART2" default n - select ARCH_HAVE_USART2 + select USART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS select STM32L4_USART @@ -415,21 +415,21 @@ config STM32L4_USART3 bool "USART3" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_USART3 + select USART3_SERIALDRIVER select STM32L4_USART config STM32L4_UART4 bool "UART4" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER select STM32L4_USART config STM32L4_UART5 bool "UART5" default n select ARCH_HAVE_SERIAL_TERMIOS - select ARCH_HAVE_UART5 + select UART5_SERIALDRIVER select STM32L4_USART config STM32L4_I2C1 @@ -520,7 +520,7 @@ config STM32L4_TIM8 config STM32L4_USART1 bool "USART1" default n - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS select STM32L4_USART diff --git a/arch/arm/src/stm32l4/Make.defs b/arch/arm/src/stm32l4/Make.defs index 84acfadd1ac..d7b602efe47 100644 --- a/arch/arm/src/stm32l4/Make.defs +++ b/arch/arm/src/stm32l4/Make.defs @@ -141,12 +141,12 @@ CHIP_CSRCS += stm32l4_exti_pwr.c endif ifeq ($(CONFIG_RTC),y) -CHIP_CSRCS += stm32l4_rtcc.c ifeq ($(CONFIG_RTC_ALARM),y) CHIP_CSRCS += stm32l4_exti_alarm.c endif ifeq ($(CONFIG_RTC_DRIVER),y) CHIP_CSRCS += stm32l4_rtc_lowerhalf.c +CHIP_CSRCS += stm32l4_rtcc.c endif endif diff --git a/arch/arm/src/stm32l4/stm32l4_flash.h b/arch/arm/src/stm32l4/stm32l4_flash.h index ecb6fccb0a9..96bd6135d90 100644 --- a/arch/arm/src/stm32l4/stm32l4_flash.h +++ b/arch/arm/src/stm32l4/stm32l4_flash.h @@ -3,7 +3,7 @@ * * Copyright (C) 2009, 2011, 2015 Gregory Nutt. All rights reserved. * Author: Gregory Nutt - * David Sidrane + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c index 3a394cda750..452b125e361 100644 --- a/arch/arm/src/stm32l4/stm32l4_i2c.c +++ b/arch/arm/src/stm32l4/stm32l4_i2c.c @@ -1,22 +1,14 @@ /************************************************************************************ - * arch/arm/src/stm32l4/stm32f3xx_i2c.c + * arch/arm/src/stm32l4/stm32l4_i2c.c * STM32L4 I2C driver - based on STM32F3 I2C Hardware Layer - Device Driver * * Copyright (C) 2011 Uros Platise. All rights reserved. * Author: Uros Platise - * - * With extensions and modifications for the F1, F2, and F4 by: - * * Copyright (C) 2011-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregroy Nutt - * - * And this version for the STM32 F3 by - * * Author: John Wharington - * - * Modified for STM32L4 by - * * Author: Sebastien Lorquet + * Author: dev@ziggurat29.com * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -96,6 +88,7 @@ #include "up_arch.h" +#include "stm32l4_gpio.h" #include "stm32l4_rcc.h" #include "stm32l4_i2c.h" #include "stm32l4_waste.h" @@ -103,9 +96,6 @@ /* At least one I2C peripheral must be enabled */ #if defined(CONFIG_STM32L4_I2C1) || defined(CONFIG_STM32L4_I2C2) || defined(CONFIG_STM32L4_I2C3) -/* This implementation is for the STM32 F1, F2, and F4 only */ - -#if defined(CONFIG_STM32L4_STM32F30XX) /************************************************************************************ * Pre-processor Definitions @@ -138,12 +128,10 @@ #endif #define I2C_OUTPUT \ - (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_CNF_OUTOD | GPIO_MODE_50MHz) + (GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_OPENDRAIN | GPIO_SPEED_50MHz) #define MKI2C_OUTPUT(p) \ (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT) -/* Register setting unique to the STM32F30xx */ - #define I2C_CR1_TXRX \ (I2C_CR1_RXIE | I2C_CR1_TXIE) #define I2C_CR1_ALLINTS \ @@ -246,7 +234,7 @@ struct stm32l4_i2c_priv_s { const struct i2c_ops_s *ops; /* Standard I2C operations */ const struct stm32l4_i2c_config_s *config; /* Port configuration */ - int refs; /* Referernce count */ + int refs; /* Reference count */ sem_t sem_excl; /* Mutual exclusion semaphore */ #ifndef CONFIG_I2C_POLLED sem_t sem_isr; /* Interrupt wait semaphore */ @@ -279,15 +267,10 @@ struct stm32l4_i2c_priv_s * Private Function Prototypes ************************************************************************************/ -static inline uint16_t stm32l4_i2c_getreg(FAR struct stm32l4_i2c_priv_s *priv, - uint8_t offset); -static inline void stm32l4_i2c_putreg(FAR struct stm32l4_i2c_priv_s *priv, uint8_t offset, - uint16_t value); -static inline void stm32l4_i2c_putreg32(FAR struct stm32l4_i2c_priv_s *priv, uint8_t offset, - uint32_t value); -static inline void stm32l4_i2c_modifyreg(FAR struct stm32l4_i2c_priv_s *priv, - uint8_t offset, uint16_t clearbits, - uint16_t setbits); +static inline uint32_t stm32l4_i2c_getreg32(FAR struct stm32l4_i2c_priv_s *priv, + uint8_t offset); +static inline void stm32l4_i2c_putreg32(FAR struct stm32l4_i2c_priv_s *priv, + uint8_t offset, uint32_t value); static inline void stm32l4_i2c_modifyreg32(FAR struct stm32l4_i2c_priv_s *priv, uint8_t offset, uint32_t clearbits, uint32_t setbits); @@ -302,13 +285,14 @@ static inline void stm32l4_i2c_sem_init(FAR struct stm32l4_i2c_priv_s *priv); static inline void stm32l4_i2c_sem_destroy(FAR struct stm32l4_i2c_priv_s *priv); #ifdef CONFIG_I2C_TRACE static void stm32l4_i2c_tracereset(FAR struct stm32l4_i2c_priv_s *priv); -static void stm32l4_i2c_tracenew(FAR struct stm32l4_i2c_priv_s *priv, uint32_t status); +static void stm32l4_i2c_tracenew(FAR struct stm32l4_i2c_priv_s *priv, + uint32_t status); static void stm32l4_i2c_traceevent(FAR struct stm32l4_i2c_priv_s *priv, - enum stm32l4_trace_e event, uint32_t parm); + enum stm32l4_trace_e event, uint32_t parm); static void stm32l4_i2c_tracedump(FAR struct stm32l4_i2c_priv_s *priv); #endif /* CONFIG_I2C_TRACE */ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv, - uint32_t frequency); + uint32_t frequency); static inline void stm32l4_i2c_sendstart(FAR struct stm32l4_i2c_priv_s *priv); static inline void stm32l4_i2c_clrstart(FAR struct stm32l4_i2c_priv_s *priv); static inline void stm32l4_i2c_sendstop(FAR struct stm32l4_i2c_priv_s *priv); @@ -327,8 +311,8 @@ static int stm32l4_i2c3_isr(int irq, void *context); #endif static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv); static int stm32l4_i2c_deinit(FAR struct stm32l4_i2c_priv_s *priv); -static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs, - int count); +static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, + FAR struct i2c_msg_s *msgs, int count); #ifdef CONFIG_I2C_RESET static int stm32l4_i2c_reset(FAR struct i2c_master_s *dev); #endif @@ -351,8 +335,8 @@ const struct i2c_ops_s stm32l4_i2c_ops = static const struct stm32l4_i2c_config_s stm32l4_i2c1_config = { .base = STM32L4_I2C1_BASE, - .clk_bit = RCC_APB1ENR_I2C1EN, - .reset_bit = RCC_APB1RSTR_I2C1RST, + .clk_bit = RCC_APB1ENR1_I2C1EN, + .reset_bit = RCC_APB1RSTR1_I2C1RST, .scl_pin = GPIO_I2C1_SCL, .sda_pin = GPIO_I2C1_SDA, #ifndef CONFIG_I2C_POLLED @@ -441,20 +425,6 @@ struct stm32l4_i2c_priv_s stm32l4_i2c3_priv = * Private Functions ************************************************************************************/ -/************************************************************************************ - * Name: stm32l4_i2c_getreg - * - * Description: - * Get a 16-bit register value by offset - * - ************************************************************************************/ - -static inline uint16_t stm32l4_i2c_getreg(FAR struct stm32l4_i2c_priv_s *priv, - uint8_t offset) -{ - return getreg16(priv->config->base + offset); -} - /************************************************************************************ * Name: stm32l4_i2c_getreg32 * @@ -469,20 +439,6 @@ static inline uint32_t stm32l4_i2c_getreg32(FAR struct stm32l4_i2c_priv_s *priv, return getreg32(priv->config->base + offset); } -/************************************************************************************ - * Name: stm32l4_i2c_putreg - * - * Description: - * Put a 16-bit register value by offset - * - ************************************************************************************/ - -static inline void stm32l4_i2c_putreg(FAR struct stm32l4_i2c_priv_s *priv, uint8_t offset, - uint16_t value) -{ - putreg16(value, priv->config->base + offset); -} - /************************************************************************************ * Name: stm32l4_i2c_putreg32 * @@ -497,21 +453,6 @@ static inline void stm32l4_i2c_putreg32(FAR struct stm32l4_i2c_priv_s *priv, putreg32(value, priv->config->base + offset); } -/************************************************************************************ - * Name: stm32l4_i2c_modifyreg - * - * Description: - * Modify a 16-bit register value by offset - * - ************************************************************************************/ - -static inline void stm32l4_i2c_modifyreg(FAR struct stm32l4_i2c_priv_s *priv, - uint8_t offset, uint16_t clearbits, - uint16_t setbits) -{ - modifyreg16(priv->config->base + offset, clearbits, setbits); -} - /************************************************************************************ * Name: stm32l4_i2c_modifyreg32 * @@ -615,7 +556,6 @@ static inline int stm32l4_i2c_sem_waitdone(FAR struct stm32l4_i2c_priv_s *priv) { struct timespec abstime; irqstate_t flags; - uint32_t regval; int ret; flags = enter_critical_section(); @@ -866,7 +806,7 @@ static inline void stm32l4_i2c_sem_waitstop(FAR struct stm32l4_i2c_priv_s *priv) /* Check for timeout error */ - sr = stm32l4_i2c_getreg(priv, STM32L4_I2C_ISR_OFFSET); + sr = stm32l4_i2c_getreg32(priv, STM32L4_I2C_ISR_OFFSET); if ((sr & I2C_INT_TIMEOUT) != 0) { return; @@ -1065,6 +1005,28 @@ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv, uint32_t f uint8_t scl_h_period; uint8_t scl_l_period; + /* XXX haque; these are the only freqs we support at the moment, until we can + * compute the values ourself. + */ + + if (frequency == 10000) + { + } + else if (frequency == 100000) + { + } + else if (frequency == 400000) + { + } + else + { +#if 1 + frequency = 1000000; +#else + frequency = 500000; +#endif + } + /* Has the I2C bus frequency changed? */ if (frequency != priv->frequency) @@ -1079,41 +1041,101 @@ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv, uint32_t f /* Update timing and control registers */ - /* TODO: speed/timing calcs */ -#warning "check set filters before timing, see RM0316" - - /* values from 100khz at 8mhz i2c clock */ - - /* prescaler */ - /* t_presc= (presc+1)*t_i2cclk */ - /* RM0316 */ + /* TODO: speed/timing calcs, taking into consideration + * STM32L4_PCLK1_FREQUENCY, or SYSCLK, or HSI16 + * clock source, RCC_CCIPR, I2CxSEL, 0 = PCKL, 1 = SCLK, 2 = HSI16, 3 = reserved +#warning "check set filters before timing, see RM0351 35.4.4 p 1112" + * analog filter; suppress spikes up to 50 ns in fast-mode and fast-mode plus + * ANFOFF cr1 + * DNF cr1; 1-15 I2CCLK periods + */ + /* RM0351 35.4.9 p 1140 */ if (frequency == 10000) { - presc = 0x01; - scl_l_period = 0xc7; - scl_h_period = 0xc3; - h_time = 0x02; - s_time = 0x04; +#if 1 + /* 10 KHz values from I2C timing tool with clock 80mhz */ + + presc = 0x0b; /* PRESC - (+1) prescale I2CCLK */ + scl_l_period = 0xff; /* SCLL - SCL low period in master mode */ + scl_h_period = 0xba; /* SCLH - SCL high period in master mode */ + h_time = 0x00; /* SDADEL - (+1) data hold time after SCL falling edge */ + s_time = 0x01; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */ + +#else + /* 10 KHz values from datasheet with clock 8mhz */ + + presc = 0x03; /* PRESC - (+1) prescale I2CCLK */ + scl_l_period = 0xc7; /* SCLL - SCL low period in master mode */ + scl_h_period = 0xc3; /* SCLH - SCL high period in master mode */ + h_time = 0x02; /* SDADEL - (+1) data hold time after SCL falling edge */ + s_time = 0x04; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */ +#endif } else if (frequency == 100000) { - /* values from datasheet with clock 8mhz */ +#if 1 + /* 100 KHz values from I2C timing tool with clock 80mhz */ + + presc = 0x01; /* PRESC - (+1) prescale I2CCLK */ + scl_l_period = 0xe7; /* SCLL - SCL low period in master mode */ + scl_h_period = 0x9b; /* SCLH - SCL high period in master mode */ + h_time = 0x00; /* SDADEL - (+1) data hold time after SCL falling edge */ + s_time = 0x0d; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */ +#else + /* 100 KHz values from datasheet with clock 8mhz */ presc = 0x01; scl_l_period = 0x13; scl_h_period = 0x0f; h_time = 0x02; s_time = 0x04; +#endif } - else + else if (frequency == 400000) { +#if 1 + /* 400 KHz values from I2C timing tool for clock of 80mhz */ + + presc = 0x01; /* PRESC - (+1) prescale I2CCLK */ + scl_l_period = 0x43; /* SCLL - SCL low period in master mode */ + scl_h_period = 0x13; /* SCLH - SCL high period in master mode */ + h_time = 0x00; /* SDADEL - (+1) data hold time after SCL falling edge */ + s_time = 0x07; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */ +#else + /* 400 KHz values from datasheet for clock of 8mhz */ + presc = 0x00; scl_l_period = 0x09; scl_h_period = 0x03; h_time = 0x01; s_time = 0x03; +#endif } + else + { +#if 1 + /* 1000 KHhz values from I2C timing tool for clock of 80mhz */ + + presc = 0x01; /* PRESC - (+1) prescale I2CCLK */ + scl_l_period = 0x14; /* SCLL - SCL low period in master mode */ + scl_h_period = 0x13; /* SCLH - SCL high period in master mode */ + h_time = 0x00; /* SDADEL - (+1) data hold time after SCL falling edge */ + s_time = 0x05; /* SCLDEL - (+1) data setup time from SDA edge to SCL rising edge */ + + frequency = 1000000; +#else + /* 500 KHhz values from datasheet for clock of 8mhz */ + + presc = 0x00; + scl_l_period = 0x06; + scl_h_period = 0x03; + h_time = 0x00; + s_time = 0x01; + + frequency = 500000; +#endif + } uint32_t timingr = (presc << I2C_TIMINGR_PRESC_SHIFT) | @@ -1124,10 +1146,6 @@ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv, uint32_t f stm32l4_i2c_putreg32(priv, STM32L4_I2C_TIMINGR_OFFSET, timingr); - /* Bit 14 of OAR1 must be configured and kept at 1 */ - - stm32l4_i2c_putreg(priv, STM32L4_I2C_OAR1_OFFSET, I2C_OAR1_ONE); - /* Re-enable the peripheral (or not) */ if (pe) @@ -1318,7 +1336,7 @@ static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s *priv) /* Send a byte */ stm32l4_i2c_traceevent(priv, I2CEVENT_SENDBYTE, priv->dcnt); - stm32l4_i2c_putreg(priv, STM32L4_I2C_TXDR_OFFSET, *priv->ptr++); + stm32l4_i2c_putreg32(priv, STM32L4_I2C_TXDR_OFFSET, *priv->ptr++); priv->dcnt--; } } @@ -1354,7 +1372,7 @@ static int stm32l4_i2c_isr(struct stm32l4_i2c_priv_s *priv) #endif /* Receive a byte */ - *priv->ptr++ = stm32l4_i2c_getreg(priv, STM32L4_I2C_RXDR_OFFSET); + *priv->ptr++ = (uint8_t) stm32l4_i2c_getreg32(priv, STM32L4_I2C_RXDR_OFFSET); /* Disable acknowledge when last byte is to be received */ @@ -1554,9 +1572,9 @@ static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv) /* Enable power and reset the peripheral */ - modifyreg32(STM32L4_RCC_APB1ENR, 0, priv->config->clk_bit); - modifyreg32(STM32L4_RCC_APB1RSTR, 0, priv->config->reset_bit); - modifyreg32(STM32L4_RCC_APB1RSTR, priv->config->reset_bit, 0); + modifyreg32(STM32L4_RCC_APB1ENR1, 0, priv->config->clk_bit); + modifyreg32(STM32L4_RCC_APB1RSTR1, 0, priv->config->reset_bit); + modifyreg32(STM32L4_RCC_APB1RSTR1, priv->config->reset_bit, 0); /* Configure pins */ @@ -1588,8 +1606,8 @@ static int stm32l4_i2c_init(FAR struct stm32l4_i2c_priv_s *priv) priv->frequency = 0; - /* TODO: f303 i2c clock source RCC_CFGR3 */ - /* RCC_CFGR3_I2C1SW (default is HSI clock) */ + /* TODO: i2c clock source RCC_CCIPR */ + /* RCC_CCIPR I2CxSEL (default is PCLK clock) */ stm32l4_i2c_setclock(priv, 100000); @@ -1629,7 +1647,7 @@ static int stm32l4_i2c_deinit(FAR struct stm32l4_i2c_priv_s *priv) /* Disable clocking */ - modifyreg32(STM32L4_RCC_APB1ENR, priv->config->clk_bit, 0); + modifyreg32(STM32L4_RCC_APB1ENR1, priv->config->clk_bit, 0); return OK; } @@ -1713,8 +1731,8 @@ static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg status = stm32l4_i2c_getstatus(priv); ret = -ETIMEDOUT; - i2cdbg("Timed out: CR1: %04x status: %08x\n", - stm32l4_i2c_getreg(priv, STM32L4_I2C_CR1_OFFSET), status); + i2cdbg("Timed out: CR1: %08x status: %08x\n", + stm32l4_i2c_getreg32(priv, STM32L4_I2C_CR1_OFFSET), status); /* "Note: When the STOP, START or PEC bit is set, the software must * not perform any write access to I2C_CR1 before this bit is @@ -1836,6 +1854,7 @@ static int stm32l4_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg #ifdef CONFIG_I2C_RESET static int stm32l4_i2c_reset(FAR struct i2c_master_s * dev) { + FAR struct stm32l4_i2c_priv_s *priv = (struct stm32l4_i2c_priv_s *)dev; unsigned int clock_count; unsigned int stretch_count; uint32_t scl_gpio; @@ -1962,7 +1981,7 @@ out: FAR struct i2c_master_s *stm32l4_i2cbus_initialize(int port) { struct stm32l4_i2c_priv_s * priv = NULL; /* private data of device with multiple instances */ - irqtate_t flags; + irqstate_t flags; #if STM32L4_PCLK1_FREQUENCY < 4000000 # warning STM32L4_I2C_INIT: Peripheral clock must be at least 4 MHz to support 400 kHz operation. @@ -2054,6 +2073,5 @@ int stm32l4_i2cbus_uninitialize(FAR struct i2c_master_s * dev) return OK; } -#endif /* CONFIG_STM32L4_STM32F30XX */ #endif /* CONFIG_STM32L4_I2C1 || CONFIG_STM32L4_I2C2 || CONFIG_STM32L4_I2C3 */ diff --git a/arch/arm/src/str71x/Kconfig b/arch/arm/src/str71x/Kconfig index 2b8bc7278ff..db945aaf599 100644 --- a/arch/arm/src/str71x/Kconfig +++ b/arch/arm/src/str71x/Kconfig @@ -80,25 +80,25 @@ config STR71X_UART0 bool "UART0" default n select STR71X_GPIO0 - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER config STR71X_UART1 bool "UART1" default n select STR71X_GPIO0 - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER config STR71X_UART2 bool "UART2" default n select STR71X_GPIO0 - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER config STR71X_UART3 bool "UART3" default n select STR71X_GPIO0 - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER config STR71X_USB bool "USB" diff --git a/arch/arm/src/tiva/Kconfig b/arch/arm/src/tiva/Kconfig index 96b82a46913..20be1413092 100644 --- a/arch/arm/src/tiva/Kconfig +++ b/arch/arm/src/tiva/Kconfig @@ -414,48 +414,48 @@ config TIVA_I2C9 config TIVA_UART0 bool "UART0" - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER default n config TIVA_UART1 bool "UART1" - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER default n config TIVA_UART2 bool "UART2" - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER default n config TIVA_UART3 bool "UART3" default n depends on TIVA_HAVE_UART3 - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER config TIVA_UART4 bool "UART4" default n depends on TIVA_HAVE_UART4 - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER config TIVA_UART5 bool "UART5" default n depends on TIVA_HAVE_UART5 - select ARCH_HAVE_UART5 + select UART5_SERIALDRIVER config TIVA_UART6 bool "UART6" default n depends on TIVA_HAVE_UART6 - select ARCH_HAVE_UART6 + select UART6_SERIALDRIVER config TIVA_UART7 bool "UART7" default n depends on TIVA_HAVE_UART7 - select ARCH_HAVE_UART7 + select UART7_SERIALDRIVER config TIVA_SSI0 bool "SSI0" diff --git a/arch/arm/src/tiva/lm3s_ethernet.c b/arch/arm/src/tiva/lm3s_ethernet.c index 5544e254421..0acaeb3c07b 100644 --- a/arch/arm/src/tiva/lm3s_ethernet.c +++ b/arch/arm/src/tiva/lm3s_ethernet.c @@ -187,9 +187,9 @@ struct tiva_driver_s WDOG_ID ld_txpoll; /* TX poll timer */ WDOG_ID ld_txtimeout; /* TX timeout timer */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s ld_dev; /* Interface understood by uIP */ + struct net_driver_s ld_dev; /* Interface understood by the network */ }; /**************************************************************************** @@ -558,7 +558,7 @@ static int tiva_transmit(struct tiva_driver_s *priv) * Function: tiva_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -677,7 +677,7 @@ static void tiva_receive(struct tiva_driver_s *priv) /* Check if the pktlen is valid. It should be large enough to hold * an Ethernet header and small enough to fit entirely in the I/O * buffer. Six is subtracted to acount for the 2-byte length/type - * and 4 byte FCS that are not copied into the uIP packet. + * and 4 byte FCS that are not copied into the network packet. */ if (pktlen > (CONFIG_NET_ETH_MTU + 6) || pktlen <= (ETH_HDRLEN + 6)) @@ -752,7 +752,7 @@ static void tiva_receive(struct tiva_driver_s *priv) } } - /* Pass the packet length to uIP MINUS 2 bytes for the length and + /* Pass the packet length to the network MINUS 2 bytes for the length and * 4 bytes for the FCS. */ @@ -905,7 +905,7 @@ static void tiva_txdone(struct tiva_driver_s *priv) DEBUGASSERT((tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->ld_dev, tiva_txpoll); } @@ -1033,7 +1033,7 @@ static void tiva_txtimeout(int argc, uint32_t arg, ...) tiva_ifdown(&priv->ld_dev); tiva_ifup(&priv->ld_dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->ld_dev, tiva_txpoll); } @@ -1069,7 +1069,7 @@ static void tiva_polltimer(int argc, uint32_t arg, ...) if ((tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0) { - /* If so, update TCP timing states and poll uIP for new XMIT data */ + /* If so, update TCP timing states and poll the network for new XMIT data */ (void)devif_timer(&priv->ld_dev, tiva_txpoll); @@ -1353,7 +1353,7 @@ static int tiva_txavail(struct net_driver_s *dev) flags = enter_critical_section(); if (priv->ld_bifup && (tiva_ethin(priv, TIVA_MAC_TR_OFFSET) & MAC_TR_NEWTX) == 0) { - /* If the interface is up and we can use the Tx FIFO, then poll uIP + /* If the interface is up and we can use the Tx FIFO, then poll the network * for new Tx data */ diff --git a/arch/arm/src/tiva/tiva_adc.h b/arch/arm/src/tiva/tiva_adc.h index c6fc9ac2e07..693252ad35d 100644 --- a/arch/arm/src/tiva/tiva_adc.h +++ b/arch/arm/src/tiva/tiva_adc.h @@ -125,32 +125,32 @@ struct tiva_adc_step_cfg_s { - uint8_t adc; /* Parent peripheral */ - uint8_t sse; /* Parent sample sequencer (SSE) */ - uint8_t step; /* Which step in the sequencer */ - uint8_t shold; /* Sample and hold time */ - uint8_t flags; /* Last step? Interrupt enabled? - * Internal temperature sensor? */ - uint8_t ain; /* Which analog input */ + uint8_t adc; /* Parent peripheral */ + uint8_t sse; /* Parent sample sequencer (SSE) */ + uint8_t step; /* Which step in the sequencer */ + uint8_t shold; /* Sample and hold time */ + uint8_t flags; /* Last step? Interrupt enabled? + * Internal temperature sensor? */ + uint8_t ain; /* Which analog input */ }; /* Sample Sequencer configuration options */ struct tiva_adc_sse_cfg_s { - uint8_t priority; /* Conversion priority, 0-3 no duplicates */ - uint8_t trigger; /* Trigger source */ + uint8_t priority; /* Conversion priority, 0-3 no duplicates */ + uint8_t trigger; /* Trigger source */ }; /* ADC peripheral configuration options */ struct tiva_adc_cfg_s { - uint8_t adc; /* ADC peripheral number */ - bool sse[4]; /* active SSEs in a bitmask */ - struct tiva_adc_sse_cfg_s ssecfg[4]; /* SSE configuration */ - uint8_t steps; /* Size of the stepcfg array */ - struct tiva_adc_step_cfg_s *stepcfg; /* Step configuration array */ + uint8_t adc; /* ADC peripheral number */ + bool sse[4]; /* active SSEs in a bitmask */ + struct tiva_adc_sse_cfg_s ssecfg[4]; /* SSE configuration */ + uint8_t steps; /* Size of the stepcfg array */ + struct tiva_adc_step_cfg_s *stepcfg; /* Step configuration array */ }; /**************************************************************************** @@ -165,16 +165,11 @@ extern "C" #define EXTERN extern #endif -/**************************************************************************** - * Inline Functions - ****************************************************************************/ - /**************************************************************************** * Public Function Prototypes ****************************************************************************/ -/* Only allow access to upper level ADC drivers if they are enabled */ -#ifdef CONFIG_ADC +#ifdef CONFIG_TIVA_ADC /**************************************************************************** * Driver Function Prototypes @@ -228,7 +223,7 @@ void tiva_adc_lock(FAR struct tiva_adc_s *priv, int sse); void tiva_adc_unlock(FAR struct tiva_adc_s *priv, int sse); -#endif /* CONFIG_ADC */ +#endif /* CONFIG_TIVA_ADC */ /**************************************************************************** * Library Function Prototypes diff --git a/arch/arm/src/tiva/tiva_adclow.c b/arch/arm/src/tiva/tiva_adclow.c index 7b2f8e2d9d0..7a0b5509ce9 100644 --- a/arch/arm/src/tiva/tiva_adclow.c +++ b/arch/arm/src/tiva/tiva_adclow.c @@ -1,8 +1,10 @@ /**************************************************************************** * arch/arm/src/tiva/tiva_adclow.c * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2015 TRD2 Inc. All rights reserved. * Author: Calvin Maguranis + * Gregory Nutt * * References: * @@ -67,8 +69,8 @@ #include #include #include -#include #include +#include #include @@ -80,7 +82,7 @@ #include "chip/tiva_pinmap.h" #include "chip/tiva_syscontrol.h" -#if defined (CONFIG_TIVA_ADC) && defined (CONFIG_ADC) +#ifdef CONFIG_TIVA_ADC /**************************************************************************** * Pre-processor Definitions @@ -135,6 +137,8 @@ /* Upper level ADC driver ***************************************************/ +static int tiva_adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); static void tiva_adc_reset(struct adc_dev_s *dev); static int tiva_adc_setup(struct adc_dev_s *dev); static void tiva_adc_shutdown(struct adc_dev_s *dev); @@ -149,6 +153,7 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg); static const struct adc_ops_s g_adcops = { + .ao_bind = tiva_adc_bind, .ao_reset = tiva_adc_reset, .ao_setup = tiva_adc_setup, .ao_shutdown = tiva_adc_shutdown, @@ -163,6 +168,7 @@ static const struct adc_ops_s g_adcops = struct tiva_adc_s { struct adc_dev_s *dev; + const struct adc_callback_s *cb; bool cfg; /* Configuration state */ bool ena; /* Operation state */ uint8_t devno; /* ADC device number */ @@ -373,6 +379,25 @@ static void tiva_adc_irqinitialize(struct tiva_adc_cfg_s *cfg) #endif } +/**************************************************************************** + * Name: tiva_adc_bind + * + * Description: + * Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + * + ****************************************************************************/ + +static int tiva_adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback) +{ + struct tiva_adc_s *priv = (struct tiva_adc_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + priv->cb = callback; + return OK; +} + /**************************************************************************** * Name: tiva_adc_reset * @@ -559,11 +584,20 @@ static int tiva_adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg) fifo_count = tiva_adc_sse_data(priv->devno, sse, buf); - for (i = 0; i < fifo_count; ++i) + /* Verify that the upper-half driver has bound its callback functions */ + + if (priv->cb != NULL) { - (void)adc_receive(dev, - tiva_adc_get_ain(priv->devno, sse, i), - buf[i]); + DEBUGASSERT(priv->cb->au_receive != NULL); + + for (i = 0; i < fifo_count; ++i) + { + /* Perform the data received callback */ + + priv->cb->au_receive(dev, + tiva_adc_get_ain(priv->devno, sse, i), + buf[i]); + } } /* Release our lock on the ADC structure */ @@ -651,18 +685,28 @@ static void tiva_adc_read(void *arg) /* This is a serious error: indicates invalid pointer indirection * and should cause a full system stop. */ + alldbg("PANIC!!! Invalid ADC device number given %d\n", sse->adc); PANIC(); return; } - for (i = 0; i < fifo_count; ++i) + /* Verify that the upper-half driver has bound its callback functions */ + + if (priv->cb != NULL) { - (void)adc_receive(dev, - tiva_adc_get_ain(sse->adc, sse->num, i), - buf[i]); - avdbg("AIN%d=0x%04x\n", - tiva_adc_get_ain(sse->adc, sse->num, i), buf[i]); + DEBUGASSERT(priv->cb->au_receive != NULL); + + for (i = 0; i < fifo_count; ++i) + { + /* Perform the data received callback */ + + priv->cb->au_receive(dev, + tiva_adc_get_ain(sse->adc, sse->num, i), + buf[i]); + avdbg("AIN%d = 0x%04x\n", + tiva_adc_get_ain(sse->adc, sse->num, i), buf[i]); + } } /* Exit, re-enabling ADC interrupts */ @@ -858,6 +902,7 @@ int tiva_adc_initialize(const char *devpath, struct tiva_adc_cfg_s *cfg, /* Now we are initialized */ adc->ena = true; + adc->cb = NULL; #ifdef CONFIG_DEBUG_ANALOG tiva_adc_runtimeobj_vals(); @@ -1041,4 +1086,4 @@ static void tiva_adc_dump_dev(void) } #endif -#endif /* CONFIG_TIVA_ADC && CONFIG_ADC */ +#endif /* CONFIG_TIVA_ADC */ diff --git a/arch/arm/src/tiva/tm4c_ethernet.c b/arch/arm/src/tiva/tm4c_ethernet.c index d8e73bec3a3..eeb36a32ecc 100644 --- a/arch/arm/src/tiva/tm4c_ethernet.c +++ b/arch/arm/src/tiva/tm4c_ethernet.c @@ -630,7 +630,7 @@ struct tiva_ethmac_s xcpt_t handler; /* Attached PHY interrupt handler */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ struct net_driver_s dev; /* Interface understood by network subsystem */ @@ -1032,7 +1032,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv) struct emac_txdesc_s *txdesc; struct emac_txdesc_s *txfirst; - /* The internal (optimal) uIP buffer size may be configured to be larger + /* The internal (optimal) network buffer size may be configured to be larger * than the Ethernet buffer size. */ @@ -1218,7 +1218,7 @@ static int tiva_transmit(FAR struct tiva_ethmac_s *priv) * Function: tiva_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -1360,7 +1360,7 @@ static void tiva_dopoll(FAR struct tiva_ethmac_s *priv) if ((priv->txhead->tdes0 & EMAC_TDES0_OWN) == 0 && priv->txhead->tdes2 == 0) { - /* If we have the descriptor, then poll uIP for new XMIT data. + /* If we have the descriptor, then poll the network for new XMIT data. * Allocate a buffer for the poll. */ @@ -1624,7 +1624,7 @@ static int tiva_recvframe(FAR struct tiva_ethmac_s *priv) buffer = tiva_allocbuffer(priv); /* Take the buffer from the RX descriptor of the first free - * segment, put it into the uIP device structure, then replace + * segment, put it into the network device structure, then replace * the buffer in the RX descriptor with the newly allocated * buffer. */ @@ -1706,7 +1706,7 @@ static void tiva_receive(FAR struct tiva_ethmac_s *priv) pkt_input(&priv->dev); #endif - /* Check if the packet is a valid size for the uIP buffer configuration + /* Check if the packet is a valid size for the network buffer configuration * (this should not happen) */ @@ -1980,7 +1980,7 @@ static void tiva_txdone(FAR struct tiva_ethmac_s *priv) tiva_disableint(priv, EMAC_DMAINT_TI); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ tiva_dopoll(priv); } @@ -2228,7 +2228,7 @@ static inline void tiva_txtimeout_process(FAR struct tiva_ethmac_s *priv) tiva_ifdown(&priv->dev); tiva_ifup(&priv->dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ tiva_dopoll(priv); } @@ -2362,7 +2362,7 @@ static inline void tiva_poll_process(FAR struct tiva_ethmac_s *priv) if (dev->d_buf) { - /* Update TCP timing states and poll uIP for new XMIT data. + /* Update TCP timing states and poll the network for new XMIT data. */ (void)devif_timer(dev, tiva_txpoll); @@ -2592,7 +2592,7 @@ static inline void tiva_txavail_process(FAR struct tiva_ethmac_s *priv) if (priv->ifup) { - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ tiva_dopoll(priv); } diff --git a/arch/arm/src/tms570/Kconfig b/arch/arm/src/tms570/Kconfig index 81136d3e339..7c2f6a8bf85 100644 --- a/arch/arm/src/tms570/Kconfig +++ b/arch/arm/src/tms570/Kconfig @@ -88,14 +88,14 @@ config TMS570_MIBASPI1 config TMS570_SCI1 bool "Serial Communication Interface 1 (SCI1)" default n - select ARCH_HAVE_SCI1 + select SCI1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config TMS570_SCI2 bool "Serial Communication Interface 2 (SCI2)" default n depends on TMS570_HAVE_SCI2 - select ARCH_HAVE_SCI1 + select SCI1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS endmenu # TMS570 Peripheral Support diff --git a/arch/avr/src/at32uc3/Kconfig b/arch/avr/src/at32uc3/Kconfig index d12c0ad17de..4f244e530cb 100644 --- a/arch/avr/src/at32uc3/Kconfig +++ b/arch/avr/src/at32uc3/Kconfig @@ -73,18 +73,15 @@ menu "AT32U3 Peripheral Selections" config AVR32_USART0 bool "USART0" default n - select ARCH_HAVE_USART0 config AVR32_USART1 bool "USART1" default n - select ARCH_HAVE_USART1 config AVR32_USART2 bool "USART2" default n depends on ARCH_CHIP_AT32UC3B0 - select ARCH_HAVE_USART2 endmenu # AT32U3 Peripheral Selections @@ -108,7 +105,7 @@ config AVR32_USART0_MODEM config AVR32_USART0_RS232 bool "USART0 is RS-232" - select USART0_ISUART + select USART0_SERIALDRIVER config AVR32_USART0_RS485 bool "USART0 is RS-485" @@ -140,7 +137,7 @@ config AVR32_USART1_MODEM config AVR32_USART1_RS232 bool "USART1 is RS-232" - select USART1_ISUART + select USART1_SERIALDRIVER config AVR32_USART1_RS485 bool "USART1 is RS-485" @@ -172,7 +169,7 @@ config AVR32_USART2_MODEM config AVR32_USART2_RS232 bool "USART2 is RS-232" - select USART2_ISUART + select USART2_SERIALDRIVER config AVR32_USART2_RS485 bool "USART2 is RS-485" diff --git a/arch/avr/src/at90usb/Kconfig b/arch/avr/src/at90usb/Kconfig index 6481e6973f0..cef96598288 100644 --- a/arch/avr/src/at90usb/Kconfig +++ b/arch/avr/src/at90usb/Kconfig @@ -41,7 +41,7 @@ config AVR_SPI config AVR_USART1 bool "USART1" default n - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER config AVR_USBDEV bool "USB device" diff --git a/arch/avr/src/atmega/Kconfig b/arch/avr/src/atmega/Kconfig index 8c3d6c01456..2d2c4d813a9 100644 --- a/arch/avr/src/atmega/Kconfig +++ b/arch/avr/src/atmega/Kconfig @@ -31,11 +31,11 @@ menu "ATMega Peripheral Selections" config AVR_USART0 bool "USART0" - select ARCH_HAVE_USART0 + select USART0_SERIALDRIVER config AVR_USART1 bool "USART1" - select ARCH_HAVE_USART1 + select USART1_SERIALDRIVER endmenu # ATMega Peripheral Selections diff --git a/arch/hc/src/m9s12/Kconfig b/arch/hc/src/m9s12/Kconfig index cd70fc9814a..9e05745e49c 100644 --- a/arch/hc/src/m9s12/Kconfig +++ b/arch/hc/src/m9s12/Kconfig @@ -11,12 +11,12 @@ menu "M9S12 Peripheral Selection" config HCS12_SCI0 bool "SCI0" default n - select ARCH_HAVE_SCI0 + select SCI0_SERIALDRIVER config HCS12_SCI1 bool "SCI1" default n - select ARCH_HAVE_SCI1 + select SCI1_SERIALDRIVER endmenu # M9S12 Peripheral Selection diff --git a/arch/hc/src/m9s12/m9s12_ethernet.c b/arch/hc/src/m9s12/m9s12_ethernet.c index 0f02c88aedd..ad3e1ef6b86 100644 --- a/arch/hc/src/m9s12/m9s12_ethernet.c +++ b/arch/hc/src/m9s12/m9s12_ethernet.c @@ -97,9 +97,9 @@ struct emac_driver_s WDOG_ID d_txpoll; /* TX poll timer */ WDOG_ID d_txtimeout; /* TX timeout timer */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s d_dev; /* Interface understood by uIP */ + struct net_driver_s d_dev; /* Interface understood by the network */ }; /**************************************************************************** @@ -185,8 +185,9 @@ static int emac_transmit(FAR struct emac_driver_s *priv) * Function: emac_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready - * to send. This is a callback from devif_poll(). devif_poll() may be called: + * The transmitter is available, check if the network has any outgoing + * packets ready to send. This is a callback from devif_poll(). + * devif_poll() may be called: * * 1. When the preceding TX packet send is complete, * 2. When the preceding TX packet send timesout and the interface is reset @@ -276,7 +277,7 @@ static void emac_receive(FAR struct emac_driver_s *priv) { /* Check for errors and update statistics */ - /* Check if the packet is a valid size for the uIP buffer configuration */ + /* Check if the packet is a valid size for the network buffer configuration */ /* Copy the data data from the hardware to priv->d_dev.d_buf. Set * amount of data in priv->d_dev.d_len @@ -413,7 +414,7 @@ static void emac_txdone(FAR struct emac_driver_s *priv) wd_cancel(priv->d_txtimeout); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->d_dev, emac_txpoll); } @@ -484,7 +485,7 @@ static void emac_txtimeout(int argc, uint32_t arg, ...) /* Then reset the hardware */ - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->d_dev, emac_txpoll); } @@ -515,7 +516,7 @@ static void emac_polltimer(int argc, uint32_t arg, ...) * the TX poll if he are unable to accept another packet for transmission. */ - /* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm.. + /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm.. * might be bug here. Does this mean if there is a transmit in progress, * we will missing TCP time state updates? */ @@ -644,7 +645,7 @@ static int emac_txavail(struct net_driver_s *dev) { /* Check if there is room in the hardware to hold another outgoing packet. */ - /* If so, then poll uIP for new XMIT data */ + /* If so, then poll the network for new XMIT data */ (void)devif_poll(&priv->d_dev, emac_txpoll); } diff --git a/arch/mips/src/pic32mx/Kconfig b/arch/mips/src/pic32mx/Kconfig index 6d8894bf624..3da65ead359 100644 --- a/arch/mips/src/pic32mx/Kconfig +++ b/arch/mips/src/pic32mx/Kconfig @@ -579,37 +579,37 @@ config PIC32MX_SPI4 config PIC32MX_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MX_UART2 bool "UART2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MX_UART3 bool "UART3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MX_UART4 bool "UART4" default n - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MX_UART5 bool "UART5" default n - select ARCH_HAVE_UART5 + select UART5_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MX_UART6 bool "UART6" default n - select ARCH_HAVE_UART6 + select UART6_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MX_ADC diff --git a/arch/mips/src/pic32mx/pic32mx-ethernet.c b/arch/mips/src/pic32mx/pic32mx-ethernet.c index eae7719bd41..4c11f5c6608 100644 --- a/arch/mips/src/pic32mx/pic32mx-ethernet.c +++ b/arch/mips/src/pic32mx/pic32mx-ethernet.c @@ -319,9 +319,9 @@ struct pic32mx_driver_s sq_queue_t pd_freebuffers; /* The free buffer list */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s pd_dev; /* Interface understood by uIP */ + struct net_driver_s pd_dev; /* Interface understood by the network */ /* Descriptors and packet buffers */ @@ -1024,7 +1024,7 @@ static int pic32mx_transmit(struct pic32mx_driver_s *priv) /* Find the next available TX descriptor. We are guaranteed that is will * not fail by upstream logic that assures that a TX packet is available - * before polling uIP. + * before polling the network. */ txdesc = pic32mx_txdesc(priv); @@ -1080,8 +1080,9 @@ static int pic32mx_transmit(struct pic32mx_driver_s *priv) * Function: pic32mx_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready - * to send. This is a callback from devif_poll(). devif_poll() may be called: + * The transmitter is available, check if the network has any outgoing + * packets ready to send. This is a callback from devif_poll(). + * devif_poll() may be called: * * 1. When the preceding TX packet send is complete, * 2. When the preceding TX packet send timesout and the interface is reset @@ -1172,7 +1173,7 @@ static int pic32mx_txpoll(struct net_driver_s *dev) * Function: pic32mx_poll * * Description: - * Perform the uIP poll. + * Perform the network poll. * * Parameters: * priv - Reference to the driver state structure @@ -1220,7 +1221,7 @@ static void pic32mx_poll(struct pic32mx_driver_s *priv) * Function: pic32mx_timerpoll * * Description: - * Perform the uIP timer poll. + * Perform the network timer poll. * * Parameters: * priv - Reference to the driver state structure @@ -1634,11 +1635,11 @@ static void pic32mx_txdone(struct pic32mx_driver_s *priv) pic32mx_putreg(priv->pd_inten, PIC32MX_ETH_IEN); } - /* Otherwise poll uIP for new XMIT data */ + /* Otherwise poll the network for new XMIT data */ else { - /* Perform the uIP poll */ + /* Perform the network poll */ pic32mx_poll(priv); } @@ -1848,7 +1849,7 @@ static void pic32mx_txtimeout(int argc, uint32_t arg, ...) (void)pic32mx_ifup(&priv->pd_dev); - /* Then poll uIP for new XMIT data (We are guaranteed to have a free + /* Then poll the network for new XMIT data (We are guaranteed to have a free * buffer here). */ @@ -1884,7 +1885,7 @@ static void pic32mx_polltimer(int argc, uint32_t arg, ...) if (pic32mx_txdesc(priv) != NULL) { - /* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm.. + /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm.. * might be bug here. Does this mean if there is a transmit in progress, * we will missing TCP time state updates? */ @@ -2281,7 +2282,7 @@ static int pic32mx_txavail(struct net_driver_s *dev) if (pic32mx_txdesc(priv) != NULL) { - /* If so, then poll uIP for new XMIT data. First allocate a buffer + /* If so, then poll the network for new XMIT data. First allocate a buffer * to perform the poll */ diff --git a/arch/mips/src/pic32mz/Kconfig b/arch/mips/src/pic32mz/Kconfig index bca6f2b7644..ac412b6dc52 100644 --- a/arch/mips/src/pic32mz/Kconfig +++ b/arch/mips/src/pic32mz/Kconfig @@ -172,37 +172,37 @@ config PIC32MZ_SPI6 config PIC32MZ_UART1 bool "UART1" default n - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MZ_UART2 bool "UART2" default n - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MZ_UART3 bool "UART3" default n - select ARCH_HAVE_UART3 + select UART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MZ_UART4 bool "UART4" default n - select ARCH_HAVE_UART4 + select UART4_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MZ_UART5 bool "UART5" default n - select ARCH_HAVE_UART5 + select UART5_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MZ_UART6 bool "UART6" default n - select ARCH_HAVE_UART6 + select UART6_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS config PIC32MZ_ADC diff --git a/arch/mips/src/pic32mz/pic32mz-ethernet.c b/arch/mips/src/pic32mz/pic32mz-ethernet.c index 6b45f1ea023..7d531efde9f 100644 --- a/arch/mips/src/pic32mz/pic32mz-ethernet.c +++ b/arch/mips/src/pic32mz/pic32mz-ethernet.c @@ -337,9 +337,9 @@ struct pic32mz_driver_s sq_queue_t pd_freebuffers; /* The free buffer list */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s pd_dev; /* Interface understood by uIP */ + struct net_driver_s pd_dev; /* Interface understood by the network */ /* Descriptors and packet buffers */ @@ -1042,7 +1042,7 @@ static int pic32mz_transmit(struct pic32mz_driver_s *priv) /* Find the next available TX descriptor. We are guaranteed that is will * not fail by upstream logic that assures that a TX packet is available - * before polling uIP. + * before polling the network. */ txdesc = pic32mz_txdesc(priv); @@ -1098,8 +1098,9 @@ static int pic32mz_transmit(struct pic32mz_driver_s *priv) * Function: pic32mz_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready - * to send. This is a callback from devif_poll(). devif_poll() may be called: + * The transmitter is available, check if the network has any outgoing + * packets ready to send. This is a callback from devif_poll(). + * devif_poll() may be called: * * 1. When the preceding TX packet send is complete, * 2. When the preceding TX packet send timesout and the interface is reset @@ -1190,7 +1191,7 @@ static int pic32mz_txpoll(struct net_driver_s *dev) * Function: pic32mz_poll * * Description: - * Perform the uIP poll. + * Perform the network poll. * * Parameters: * priv - Reference to the driver state structure @@ -1238,7 +1239,7 @@ static void pic32mz_poll(struct pic32mz_driver_s *priv) * Function: pic32mz_timerpoll * * Description: - * Perform the uIP timer poll. + * Perform the network timer poll. * * Parameters: * priv - Reference to the driver state structure @@ -1651,11 +1652,11 @@ static void pic32mz_txdone(struct pic32mz_driver_s *priv) pic32mz_putreg(priv->pd_inten, PIC32MZ_ETH_IEN); } - /* Otherwise poll uIP for new XMIT data */ + /* Otherwise poll the network for new XMIT data */ else { - /* Perform the uIP poll */ + /* Perform the network poll */ pic32mz_poll(priv); } @@ -1865,7 +1866,7 @@ static void pic32mz_txtimeout(int argc, uint32_t arg, ...) (void)pic32mz_ifup(&priv->pd_dev); - /* Then poll uIP for new XMIT data (We are guaranteed to have a free + /* Then poll the network for new XMIT data (We are guaranteed to have a free * buffer here). */ @@ -1901,7 +1902,7 @@ static void pic32mz_polltimer(int argc, uint32_t arg, ...) if (pic32mz_txdesc(priv) != NULL) { - /* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm.. + /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm.. * might be bug here. Does this mean if there is a transmit in progress, * we will missing TCP time state updates? */ @@ -2304,7 +2305,7 @@ static int pic32mz_txavail(struct net_driver_s *dev) if (pic32mz_txdesc(priv) != NULL) { - /* If so, then poll uIP for new XMIT data. First allocate a buffer + /* If so, then poll the network for new XMIT data. First allocate a buffer * to perform the poll */ diff --git a/arch/sh/src/m16c/Kconfig b/arch/sh/src/m16c/Kconfig index e1f81d0727b..f70092dfa22 100644 --- a/arch/sh/src/m16c/Kconfig +++ b/arch/sh/src/m16c/Kconfig @@ -7,17 +7,17 @@ if ARCH_M16C config M16C_UART0 bool "UART0" - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER default n config M16C_UART1 bool "UART1" - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER default n config M16C_UART2 bool "UART2" - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER default n endif diff --git a/arch/sh/src/sh1/Kconfig b/arch/sh/src/sh1/Kconfig index f3002c37370..2d0723b42b2 100644 --- a/arch/sh/src/sh1/Kconfig +++ b/arch/sh/src/sh1/Kconfig @@ -43,12 +43,12 @@ config SH1_ITU4 config SH1_SCI0 bool "SCI0" default n - select ARCH_HAVE_SCI0 + select SCI0_SERIALDRIVER config SH1_SCI1 bool "SCI1" default n - select ARCH_HAVE_SCI1 + select SCI1_SERIALDRIVER config SH1_PCU bool "PCU" diff --git a/arch/z16/src/common/up_internal.h b/arch/z16/src/common/up_internal.h index bd6f36ca9f8..64a5302a420 100644 --- a/arch/z16/src/common/up_internal.h +++ b/arch/z16/src/common/up_internal.h @@ -58,7 +58,7 @@ #undef CONFIG_SUPPRESS_UART_CONFIG /* Do not reconfig UART */ #undef CONFIG_DUMP_ON_EXIT /* Dump task state on exit */ #undef CONFIG_Z16_LOWPUTC /* Support up_lowputc for debug */ -#undef CONFIG_Z16_LOWGETC /* support up_lowgetc for debug */ +#undef CONFIG_Z16_LOWGETC /* support z16_lowgetc for debug */ /* Determine which (if any) console driver to use. If a console is enabled * and no other console device is specified, then a serial console is diff --git a/arch/z16/src/z16f/Kconfig b/arch/z16/src/z16f/Kconfig index 229a1aa72f1..8861726aee3 100644 --- a/arch/z16/src/z16f/Kconfig +++ b/arch/z16/src/z16f/Kconfig @@ -18,12 +18,12 @@ config Z16F_ESPI config Z16F_UART0 bool "UART0" default y - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER config Z16F_UART1 bool "UART1" default y - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER endmenu # Z16F Peripheral Selection diff --git a/arch/z16/src/z16f/z16f_lowuart.S b/arch/z16/src/z16f/z16f_lowuart.S index 161d5ac9243..ef7c31a6ca4 100644 --- a/arch/z16/src/z16f/z16f_lowuart.S +++ b/arch/z16/src/z16f/z16f_lowuart.S @@ -70,7 +70,7 @@ xdef _up_lowputc #endif #ifdef CONFIG_Z16_LOWGETC - xdef _up_lowgetc + xdef _z16_lowgetc #endif /************************************************************************* @@ -222,7 +222,7 @@ _z16f_xmitc1: #endif /* CONFIG_Z16_LOWPUTC */ /************************************************************************* - * Name: _up_lowgetc + * Name: _z16_lowgetc * * Description: * Get a character from the serial port @@ -236,34 +236,34 @@ _z16f_xmitc1: *************************************************************************/ #ifdef CONFIG_Z16_LOWGETC -_up_lowgetc: -_up_lowgetc1: +_z16_lowgetc: +_z16_lowgetc1: #ifdef HAVE_Z16F_SERIAL_CONSOLE ld r0, #Z16F_UARTSTAT0_RDA /* RDA=Receive data available */ #ifdef CONFIG_UART1_SERIAL_CONSOLE tm.b Z16F_UART1_STAT0, r0 - jp eq, _up_lowgetc1 /* While (!Z16F_UART1_STAT0 & RDA)) */ + jp eq, _z16_lowgetc1 /* While (!Z16F_UART1_STAT0 & RDA)) */ ld.ub r0, Z16F_UART1_RXD /* r0 = Z16F_UART1_RXD */ #else tm.b Z16F_UART0_STAT0,r0 /* While (!Z16F_UART0_STAT0 & RDA) */ - jp eq, _up_lowgetc1 + jp eq, _z16_lowgetc1 ld.ub r0, Z16F_UART0_RXD /* r0 = Z16F_UART0_RXD */ #endif cp r0, #%0d /* Test for '\r' */ - jp eq, _up_lowgetc2 + jp eq, _z16_lowgetc2 cp r0, #%0d /* Test \r + high bit */ - jp ne, _up_lowgetc3 + jp ne, _z16_lowgetc3 -_up_lowgetc2: +_z16_lowgetc2: ld r0, #%0a /* Convert '\r' to '\n' */ -_up_lowgetc3: /* Return value in r0 */ +_z16_lowgetc3: /* Return value in r0 */ #endif /* HAVE_Z16F_SERIAL_CONSOLE */ ret /* Return */ diff --git a/arch/z80/src/ez80/Kconfig b/arch/z80/src/ez80/Kconfig index df8cc5a1978..7529e2c7adc 100644 --- a/arch/z80/src/ez80/Kconfig +++ b/arch/z80/src/ez80/Kconfig @@ -9,17 +9,17 @@ menu "ez80 Peripheral Support" config EZ80_UART0 bool "UART0" - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER default n config EZ80_UART1 bool "UART1" - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER default n config EZ80_UART2 bool "UART2" - select ARCH_HAVE_UART2 + select UART2_SERIALDRIVER default n config EZ80_EMAC diff --git a/arch/z80/src/ez80/ez80_emac.c b/arch/z80/src/ez80/ez80_emac.c index 2b1b5834fec..0584aa0464d 100644 --- a/arch/z80/src/ez80/ez80_emac.c +++ b/arch/z80/src/ez80/ez80_emac.c @@ -325,9 +325,9 @@ struct ez80emac_driver_s struct ez80mac_statistics_s stat; #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ }; /**************************************************************************** @@ -1055,8 +1055,9 @@ static int ez80emac_transmit(struct ez80emac_driver_s *priv) * Function: ez80emac_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready - * to send. This is a callback from devif_poll(). devif_poll() may be called: + * The transmitter is available, check if the network has any outgoing + * packets ready to send. This is a callback from devif_poll(). + * devif_poll() may be called: * * 1. When the preceding TX packet send is complete, * 2. When the preceding TX packet send timesout and the interface is reset @@ -1228,7 +1229,7 @@ static int ez80emac_receive(struct ez80emac_driver_s *priv) } /* We have a good packet. Check if the packet is a valid size - * for the uIP buffer configuration (I routinely see + * for the network buffer configuration (I routinely see */ if (rxdesc->pktsize > CONFIG_NET_ETH_MTU) @@ -1669,7 +1670,7 @@ static void ez80emac_txtimeout(int argc, uint32_t arg, ...) ez80emac_ifup(&priv->dev); leave_critical_section(flags); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->dev, ez80emac_txpoll); } @@ -1695,7 +1696,7 @@ static void ez80emac_polltimer(int argc, uint32_t arg, ...) { struct ez80emac_driver_s *priv = (struct ez80emac_driver_s *)arg; - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ (void)devif_timer(&priv->dev, ez80emac_txpoll); @@ -1882,7 +1883,7 @@ static int ez80emac_txavail(struct net_driver_s *dev) /* Check if there is room in the hardware to hold another outgoing packet. */ - /* If so, then poll uIP for new XMIT data */ + /* If so, then poll the network for new XMIT data */ (void)devif_poll(&priv->dev, ez80emac_txpoll); } @@ -2256,7 +2257,7 @@ errout: * Add one MAC address to the multi-cast hash table * * Parameters: - * dev - Reference to the uIP driver state structure + * dev - Reference to the network driver state structure * mac - The MAC address to add * enable - true: Enable filtering on this address; false: disable * diff --git a/arch/z80/src/z8/Kconfig b/arch/z80/src/z8/Kconfig index d7e51403104..3c77bb14264 100644 --- a/arch/z80/src/z8/Kconfig +++ b/arch/z80/src/z8/Kconfig @@ -10,12 +10,12 @@ if ARCH_CHIP_Z8 config Z8_UART0 bool default y - select ARCH_HAVE_UART0 + select UART0_SERIALDRIVER config Z8_UART1 bool default y - select ARCH_HAVE_UART1 + select UART1_SERIALDRIVER # The ZiLOG ZDS-II Windows toolchain is the only toolchain available for # the ez80. diff --git a/configs/Kconfig b/configs/Kconfig index aa4a2bd814f..98d4b30b2d9 100644 --- a/configs/Kconfig +++ b/configs/Kconfig @@ -649,14 +649,27 @@ config ARCH_BOARD_PIRELLI_DPL10 config ARCH_BOARD_NUCLEO_144 bool "STMicro NUCLEO-144" - depends on ARCH_CHIP_STM32F746 + depends on ARCH_CHIP_STM32F746ZG || ARCH_CHIP_STM32F767ZI select ARCH_HAVE_LEDS select ARCH_HAVE_BUTTONS select ARCH_HAVE_IRQBUTTONS ---help--- - STMicro Nucleo-144 development board featuring the STM32F746ZGT6U - MCU. The STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash - memory and 300Kb SRAM. + STMicro Nucleo-144 development board featuring STMicroelectronics + F2, F3, F4 and F7 MCU families. The board is a "Hardware pattern" + that can be populated with the 144 pin package of the following MCUs: + + Target STM32 Order code + STM32F207ZGT6 NUCLEO-F207ZG + STM32F303ZET6 NUCLEO-F303ZE + STM32F429ZIT6 NUCLEO-F429ZI + STM32F446ZET6 NUCLEO-F446ZE + + Supported in this release are: + + NUCLEO-F746ZG - STM32F746ZGT6 a 216MHz Cortex-M7, w/FPU - 1024KiB + Flash memory and 320KiB SRAM. + NUCLEO-F767ZI - STM32F767ZIT6 a 216MHz Cortex-M7, w/DPFPU - + 2048KiB Flash memory and 512KiB SRAM. config ARCH_BOARD_NUCLEO_F303RE bool "STM32F303 Nucleo F303RE" @@ -1163,7 +1176,7 @@ config ARCH_BOARD_VIEWTOOL_STM32F107 config ARCH_BOARD_XTRS bool "XTRS TRS80 Model 3 emulation" depends on ARCH_CHIP_Z80 - select ARCH_HAVE_UART + select UART_SERIALDRIVER ---help--- TRS80 Model 3. This port uses a vintage computer based on the Z80. An emulator for this computer is available to run TRS80 programs on a @@ -1181,7 +1194,7 @@ config ARCH_BOARD_Z16F2800100ZCOG config ARCH_BOARD_Z80SIM bool "Z80 Instruction Set Simulator" depends on ARCH_CHIP_Z80 - select ARCH_HAVE_UART + select UART_SERIALDRIVER ---help--- z80 Microcontroller. This port uses a Z80 instruction set simulator called z80sim. This port also uses the SDCC toolchain diff --git a/configs/README.txt b/configs/README.txt index 9b1c8486bac..45f06d0fa0e 100644 --- a/configs/README.txt +++ b/configs/README.txt @@ -393,9 +393,12 @@ configs/ntosd-dm320 NuttX 0.2.1 release. configs/nucleo-144 - STMicro Nucleo-144 development board featuring the STM32F746ZGT6U MCU. The - STM32F746ZGT6U is a 216MHz Cortex-M7 operation with 1024Kb Flash memory - and 300Kb SRAM. + STMicro Nucleo-144 development board family. Included support for (1) the + Nucleo-F767ZG board featuring the STM32F746ZGT6U MCU. The STM32F746ZGT6U + is a 216MHz Cortex-M7 operation with 1024Kb Flash memory and 320Kb SRAM. + And (2) the Nucleo-F746ZG board featuring the STM32F767ZIT6 MCU. The + STM32F767ZIT6 is a 216MHz Cortex-M7 operation with 2048Kb Flash memory + and 512Kb SRAM. configs/nucleo-f4x1re STMicro ST Nucleo F401RE and F411RE boards. See diff --git a/configs/amber/hello/defconfig b/configs/amber/hello/defconfig index 57a095a0e10..5c62c54f886 100644 --- a/configs/amber/hello/defconfig +++ b/configs/amber/hello/defconfig @@ -238,12 +238,11 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_USART0=y +CONFIG_USART0_SERIALDRIVER=y # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_USART0_SERIAL_CONSOLE=y # CONFIG_NO_SERIAL_CONSOLE is not set diff --git a/configs/arduino-due/README.txt b/configs/arduino-due/README.txt index 290c095ef3a..e128fb71d68 100644 --- a/configs/arduino-due/README.txt +++ b/configs/arduino-due/README.txt @@ -822,10 +822,10 @@ Arduino DUE-specific Configuration Options CONFIG_SAM34_GPIOD_IRQ CONFIG_SAM34_GPIOE_IRQ CONFIG_SAM34_GPIOF_IRQ - CONFIG_USART0_ISUART - CONFIG_USART1_ISUART - CONFIG_USART2_ISUART - CONFIG_USART3_ISUART + CONFIG_USART0_SERIALDRIVER + CONFIG_USART1_SERIALDRIVER + CONFIG_USART2_SERIALDRIVER + CONFIG_USART3_SERIALDRIVER ST91SAM4S specific device driver settings @@ -885,7 +885,7 @@ Configurations Board Selection -> Peripheral CONFIG_SAM34_UART0=n : Disable UART0. Can't use with this shield CONFIG_SAM34_USART0=y : Enable USART0 - CONFIG_USART0_ISUART=y + CONFIG_USART0_SERIALDRIVER=y Device Drivers -> Serial CONFIG_USART0_SERIAL_CONSOLE=y : Configure the console on USART0 @@ -966,7 +966,7 @@ Configuration sub-directories Board Selection -> Peripheral CONFIG_SAM34_UART0=n : Disable UART0. Can't use with this shield CONFIG_SAM34_USART0=y : Enable USART0 - CONFIG_USART0_ISUART=y + CONFIG_USART0_SERIALDRIVER=y Device Drivers -> Serial CONFIG_USART0_SERIAL_CONSOLE=y : Configure the console on USART0 diff --git a/configs/arduino-due/nsh/defconfig b/configs/arduino-due/nsh/defconfig index 7fdcc2c51cc..51cf6e0923d 100644 --- a/configs/arduino-due/nsh/defconfig +++ b/configs/arduino-due/nsh/defconfig @@ -493,28 +493,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/arduino-due/src/sam_appinit.c b/configs/arduino-due/src/sam_appinit.c index ef52d100ccf..32132ee3302 100644 --- a/configs/arduino-due/src/sam_appinit.c +++ b/configs/arduino-due/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/arduino-due/src/sam_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -76,11 +76,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(CONFIG_ARDUINO_ITHEAD_TFT) && defined(CONFIG_SPI_BITBANG) && \ defined(CONFIG_MMCSD_SPI) diff --git a/configs/arduino-mega2560/hello/defconfig b/configs/arduino-mega2560/hello/defconfig index ffa94ad0e93..4459053ee1b 100644 --- a/configs/arduino-mega2560/hello/defconfig +++ b/configs/arduino-mega2560/hello/defconfig @@ -301,33 +301,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set diff --git a/configs/arduino-mega2560/nsh/defconfig b/configs/arduino-mega2560/nsh/defconfig index d22cb731617..9aee289d6d7 100644 --- a/configs/arduino-mega2560/nsh/defconfig +++ b/configs/arduino-mega2560/nsh/defconfig @@ -309,33 +309,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/avr32dev1/nsh/defconfig b/configs/avr32dev1/nsh/defconfig index dadecbc7139..0f87f200461 100644 --- a/configs/avr32dev1/nsh/defconfig +++ b/configs/avr32dev1/nsh/defconfig @@ -276,12 +276,11 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_USART1=y +CONFIG_USART1_SERIALDRIVER=y # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_USART1_SERIAL_CONSOLE=y diff --git a/configs/avr32dev1/ostest/defconfig b/configs/avr32dev1/ostest/defconfig index 83d72fda29d..6fc2eed59f4 100644 --- a/configs/avr32dev1/ostest/defconfig +++ b/configs/avr32dev1/ostest/defconfig @@ -275,12 +275,11 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_USART1=y +CONFIG_USART1_SERIALDRIVER=y # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_USART1_SERIAL_CONSOLE=y # CONFIG_NO_SERIAL_CONSOLE is not set diff --git a/configs/boardctl.c b/configs/boardctl.c index 82c52890656..749056d82a5 100644 --- a/configs/boardctl.c +++ b/configs/boardctl.c @@ -250,14 +250,24 @@ int boardctl(unsigned int cmd, uintptr_t arg) { /* CMD: BOARDIOC_INIT * DESCRIPTION: Perform one-time application initialization. - * ARG: None + * ARG: The boardctl() argument is passed to the + * board_app_initialize() implementation without modification. + * The argument has no meaning to NuttX; the meaning of the + * argument is a contract between the board-specific + * initalization logic and the the matching application logic. + * The value cold be such things as a mode enumeration value, + * a set of DIP switch switch settings, a pointer to + * configuration data read from a file or serial FLASH, or + * whatever you would like to do with it. Every + * implementation should accept zero/NULL as a default + * configuration. * CONFIGURATION: CONFIG_LIB_BOARDCTL * DEPENDENCIES: Board logic must provide board_app_initialization */ case BOARDIOC_INIT: { - ret = board_app_initialize(); + ret = board_app_initialize(arg); } break; diff --git a/configs/c5471evm/httpd/defconfig b/configs/c5471evm/httpd/defconfig index c3635191e01..895892b2462 100644 --- a/configs/c5471evm/httpd/defconfig +++ b/configs/c5471evm/httpd/defconfig @@ -348,28 +348,28 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/c5471evm/nettest/defconfig b/configs/c5471evm/nettest/defconfig index 99517514155..006c9b09b0e 100644 --- a/configs/c5471evm/nettest/defconfig +++ b/configs/c5471evm/nettest/defconfig @@ -358,28 +358,28 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/c5471evm/nsh/defconfig b/configs/c5471evm/nsh/defconfig index e36be6f8ff7..3ca99d5e61f 100644 --- a/configs/c5471evm/nsh/defconfig +++ b/configs/c5471evm/nsh/defconfig @@ -37,6 +37,7 @@ CONFIG_RRLOAD_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH_CHIP_C5471=y # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_C5471=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_ARM926EJS is not set @@ -104,10 +108,21 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="c5471" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set CONFIG_ARCH_HAVE_LOWVECTORS=y # CONFIG_ARCH_LOWVECTORS is not set @@ -161,6 +176,7 @@ CONFIG_C5471_AUTONEGOTIATION=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set # CONFIG_ARCH_HAVE_MPU is not set @@ -300,9 +316,10 @@ CONFIG_SIG_SIGUSR1=1 CONFIG_SIG_SIGUSR2=2 CONFIG_SIG_SIGALARM=3 CONFIG_SIG_SIGCONDTIMEDOUT=16 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -352,8 +369,22 @@ CONFIG_WATCHDOG_DEVPATH="/dev/watchdog0" # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set # CONFIG_NETDEVICES is not set @@ -367,32 +398,28 @@ CONFIG_NETDEV_TELNET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y CONFIG_MCU_SERIAL=y # CONFIG_STANDARD_SERIAL is not set # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -575,6 +602,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -615,6 +646,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=4 @@ -647,17 +680,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -667,18 +702,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -686,22 +722,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -713,8 +754,8 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -727,25 +768,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -763,6 +806,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -804,6 +848,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -836,6 +881,7 @@ CONFIG_NSH_FILEIOSIZE=1024 # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -864,6 +910,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -878,13 +926,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -893,5 +940,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/cc3200-launchpad/nsh/defconfig b/configs/cc3200-launchpad/nsh/defconfig index 0ab668e23dc..68c1a21f1c5 100644 --- a/configs/cc3200-launchpad/nsh/defconfig +++ b/configs/cc3200-launchpad/nsh/defconfig @@ -354,27 +354,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/cc3200-launchpad/src/cc3200_boot.c b/configs/cc3200-launchpad/src/cc3200_boot.c index 9d466b2d75c..841f40eca7c 100644 --- a/configs/cc3200-launchpad/src/cc3200_boot.c +++ b/configs/cc3200-launchpad/src/cc3200_boot.c @@ -2,12 +2,14 @@ * configs/cc3200-launchpad/src/cc3200_boot.c * * Copyright (C) 2014 Droidifi LLC. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. * Author: Jim Ewing + * Gregory Nutt * - * Adapted for the cc3200 from code: + * Adapted for the cc3200 from code: * - * Copyright (C) Gregory Nutt. - * Gregory Nutt + * Copyright (C) 2014 Gregory Nutt. + * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -48,7 +50,6 @@ #include #include #include -#include #include "cc3200_launchpad.h" @@ -56,17 +57,13 @@ * Pre-processor Definitions ****************************************************************************/ -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ +#define CC3200_SRAM1_BASE 0x20000000 +#define CC3200_SRAM1_SIZE 0x4000 /**************************************************************************** * Public Functions ****************************************************************************/ + /**************************************************************************** * Name: board_app_initialize * @@ -80,9 +77,24 @@ * CONFIG_LIB_BOARDCTL=n : * Called from board_initialize(). * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } @@ -117,13 +129,8 @@ void tiva_boardinitialize(void) ****************************************************************************/ #if CONFIG_MM_REGIONS > 1 - -#define CC3200_SRAM1_BASE 0x20000000 -#define CC3200_SRAM1_SIZE 0x4000 - void up_addregion(void) { kumm_addregion((FAR void*)CC3200_SRAM1_BASE, CC3200_SRAM1_SIZE); } - #endif diff --git a/configs/cc3200-launchpad/src/cc3200_launchpad.h b/configs/cc3200-launchpad/src/cc3200_launchpad.h index 9f9c77dc68c..b54180bf3a4 100644 --- a/configs/cc3200-launchpad/src/cc3200_launchpad.h +++ b/configs/cc3200-launchpad/src/cc3200_launchpad.h @@ -1,7 +1,7 @@ /**************************************************************************** * configs/cc3200-launchpad/src/cc3200_launchpad.h * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -71,6 +71,12 @@ void cc3200_uart_init(void); void cc3200_led_init(void); +/**************************************************************************** + * Name: cc3200_led_initialize + ****************************************************************************/ + +void cc3200_led_initialize(void); + /**************************************************************************** * Name: cc3200_ledon ****************************************************************************/ diff --git a/configs/cc3200-launchpad/src/cc3200_leds.c b/configs/cc3200-launchpad/src/cc3200_leds.c index e8e231113fb..30afc102296 100644 --- a/configs/cc3200-launchpad/src/cc3200_leds.c +++ b/configs/cc3200-launchpad/src/cc3200_leds.c @@ -1,3 +1,41 @@ +/**************************************************************************** + * configs/cc3200-launchpad/src/cc3200_leds.c + * + * Copyright (C) 2014 Droidifi LLC. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. + * Author: Jim Ewing + * Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + #include #include @@ -18,6 +56,10 @@ #define LED2_GPIO 10 #define LED3_GPIO 11 +/**************************************************************************** + * Public Functions + ****************************************************************************/ + /**************************************************************************** * Name: cc3200_led_initialize ****************************************************************************/ @@ -33,7 +75,7 @@ void cc3200_led_initialize(void) uint8_t x=16; putreg32(getreg32(0x44025000 + 0x00000058) | 0x00000001, 0x44025000 + 0x00000058); - while(--x) + while (--x) ; cc3200_pin_type_gpio(PIN_01, PIN_MODE_0, false); diff --git a/configs/cloudctrl/include/board.h b/configs/cloudctrl/include/board.h index 474caee909f..14c7fab32f3 100644 --- a/configs/cloudctrl/include/board.h +++ b/configs/cloudctrl/include/board.h @@ -101,14 +101,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* MCO output driven by PLL3. From above, we already have PLL3 input frequency as: * diff --git a/configs/cloudctrl/nsh/defconfig b/configs/cloudctrl/nsh/defconfig index ed97bcc4b9d..40bd30e1a11 100644 --- a/configs/cloudctrl/nsh/defconfig +++ b/configs/cloudctrl/nsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -202,6 +207,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -246,6 +252,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -411,19 +418,35 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -715,7 +738,12 @@ CONFIG_RTC=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -787,33 +815,28 @@ CONFIG_ETH0_PHY_DM9161=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -1076,6 +1099,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1127,16 +1152,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1146,17 +1172,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1164,8 +1190,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1173,11 +1199,10 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # @@ -1202,8 +1227,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1216,21 +1241,22 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1332,6 +1358,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1376,12 +1403,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1390,6 +1417,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/cloudctrl/src/stm32_appinit.c b/configs/cloudctrl/src/stm32_appinit.c index 6bd5e5a203b..cc772b5add3 100644 --- a/configs/cloudctrl/src/stm32_appinit.c +++ b/configs/cloudctrl/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/cloudctrl/src/stm32_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * Darcy Gong * @@ -108,9 +108,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_USBHOST) || defined(HAVE_W25) int ret; diff --git a/configs/compal_e86/nsh_highram/defconfig b/configs/compal_e86/nsh_highram/defconfig index c5dcaa04d3f..e521e8e7daf 100644 --- a/configs/compal_e86/nsh_highram/defconfig +++ b/configs/compal_e86/nsh_highram/defconfig @@ -368,28 +368,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/compal_e86/src/boot.c b/configs/compal_e86/src/boot.c index 32364c631e4..8c214a004c3 100644 --- a/configs/compal_e86/src/boot.c +++ b/configs/compal_e86/src/boot.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/compal_e86/boot.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,10 +44,31 @@ * Public Functions ****************************************************************************/ -/* Application initialization stub for boardctl() */ +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ #ifdef CONFIG_LIB_BOARDCTL -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return 0; } diff --git a/configs/compal_e88/nsh_highram/defconfig b/configs/compal_e88/nsh_highram/defconfig index 8db78614871..85ad3ce661b 100644 --- a/configs/compal_e88/nsh_highram/defconfig +++ b/configs/compal_e88/nsh_highram/defconfig @@ -368,28 +368,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/compal_e88/src/boot.c b/configs/compal_e88/src/boot.c index 540bc39ca16..a3c68292275 100644 --- a/configs/compal_e88/src/boot.c +++ b/configs/compal_e88/src/boot.c @@ -44,10 +44,31 @@ * Public Functions ****************************************************************************/ -/* Application initialization stub for boardctl() */ +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ #ifdef CONFIG_LIB_BOARDCTL -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return 0; } diff --git a/configs/compal_e99/nsh_compalram/defconfig b/configs/compal_e99/nsh_compalram/defconfig index 3ad08465712..e3107fc8470 100644 --- a/configs/compal_e99/nsh_compalram/defconfig +++ b/configs/compal_e99/nsh_compalram/defconfig @@ -405,28 +405,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/compal_e99/nsh_highram/defconfig b/configs/compal_e99/nsh_highram/defconfig index cb3fa5526b7..a7cbecbe981 100644 --- a/configs/compal_e99/nsh_highram/defconfig +++ b/configs/compal_e99/nsh_highram/defconfig @@ -404,28 +404,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/compal_e99/src/boot.c b/configs/compal_e99/src/boot.c index 74f17a2ebdb..8bc7061daf3 100644 --- a/configs/compal_e99/src/boot.c +++ b/configs/compal_e99/src/boot.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/compal_e99/boot.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -44,10 +44,31 @@ * Public Functions ****************************************************************************/ -/* Application initialization stub for boardctl() */ +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform architecture specific initialization + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ #ifdef CONFIG_LIB_BOARDCTL -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return 0; } diff --git a/configs/demo9s12ne64/src/m9s12_appinit.c b/configs/demo9s12ne64/src/m9s12_appinit.c index ec3d9ba21cf..0010a71e689 100644 --- a/configs/demo9s12ne64/src/m9s12_appinit.c +++ b/configs/demo9s12ne64/src/m9s12_appinit.c @@ -61,9 +61,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* Configure SPI-based devices */ diff --git a/configs/dk-tm4c129x/ipv6/defconfig b/configs/dk-tm4c129x/ipv6/defconfig index fdd2e40140a..7bc8f6f8257 100644 --- a/configs/dk-tm4c129x/ipv6/defconfig +++ b/configs/dk-tm4c129x/ipv6/defconfig @@ -41,6 +41,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -79,10 +80,12 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set CONFIG_ARCH_CHIP_TIVA=y +# CONFIG_ARCH_CHIP_LPC11XX is not set # CONFIG_ARCH_CHIP_LPC17XX is not set # CONFIG_ARCH_CHIP_LPC214X is not set # CONFIG_ARCH_CHIP_LPC2378 is not set @@ -91,29 +94,54 @@ CONFIG_ARCH_CHIP_TIVA=y # CONFIG_ARCH_CHIP_NUC1XX is not set # CONFIG_ARCH_CHIP_SAMA5 is not set # CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set # CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set # CONFIG_ARCH_ARM920T is not set # CONFIG_ARCH_CORTEXM0 is not set # CONFIG_ARCH_CORTEXM3 is not set CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # # ARMV7M Configuration Options # +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -122,6 +150,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set # CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set # CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # @@ -139,6 +168,9 @@ CONFIG_ARCH_CHIP_TM4C=y # # Tiva/Stellaris Peripheral Support # +# CONFIG_TIVA_ADC is not set +CONFIG_TIVA_HAVE_ADC0=y +CONFIG_TIVA_HAVE_ADC1=y CONFIG_TIVA_I2C=y CONFIG_TIVA_HAVE_I2C1=y CONFIG_TIVA_HAVE_I2C2=y @@ -161,11 +193,16 @@ CONFIG_TIVA_HAVE_SSI3=y CONFIG_TIVA_HAVE_ETHERNET=y # CONFIG_TIVA_SSI is not set # CONFIG_TIVA_TIMER is not set +CONFIG_TIVA_HAVE_TIMER0=y +CONFIG_TIVA_HAVE_TIMER1=y +CONFIG_TIVA_HAVE_TIMER2=y CONFIG_TIVA_HAVE_TIMER3=y CONFIG_TIVA_HAVE_TIMER4=y CONFIG_TIVA_HAVE_TIMER5=y CONFIG_TIVA_HAVE_TIMER6=y CONFIG_TIVA_HAVE_TIMER7=y +# CONFIG_TIVA_ADC0 is not set +# CONFIG_TIVA_ADC1 is not set # CONFIG_TIVA_I2C0 is not set # CONFIG_TIVA_I2C1 is not set # CONFIG_TIVA_I2C2 is not set @@ -233,7 +270,7 @@ CONFIG_TIVA_I2C_TIMEOMS=500 CONFIG_TIVA_I2C_TIMEOTICKS=500 # -# Tiva Ethernet Configuration +# Ethernet Configuration # CONFIG_TIVA_PHY_INTERNAL=y CONFIG_TIVA_AUTONEG=y @@ -254,11 +291,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y # CONFIG_ARCH_NAND_HWECC is not set # CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y # CONFIG_ARCH_USE_MPU is not set # CONFIG_ARCH_IRQPRIO is not set CONFIG_ARCH_STACKDUMP=y @@ -319,6 +359,14 @@ CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -353,6 +401,7 @@ CONFIG_INIT_ENTRYPOINT=y # CONFIG_INIT_FILEPATH is not set CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set CONFIG_TASK_NAME_SIZE=31 CONFIG_MAX_TASKS=16 # CONFIG_SCHED_HAVE_PARENT is not set @@ -389,6 +438,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -404,9 +454,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -440,24 +491,45 @@ CONFIG_DEV_NULL=y # CONFIG_RAMDISK is not set # CONFIG_CAN is not set # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set # CONFIG_PWM is not set # CONFIG_ARCH_HAVE_I2CRESET is not set CONFIG_I2C=y # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_POLLED is not set # CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y # CONFIG_SPI is not set # CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set # CONFIG_RTC is not set # CONFIG_WATCHDOG is not set -# CONFIG_TIMER is not set +# CONFIG_TIMERS_CS2100CP is not set # CONFIG_ANALOG is not set # CONFIG_AUDIO_DEVICES is not set # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -465,7 +537,11 @@ CONFIG_NETDEVICES=y # # General Ethernet MAC Driver Options # +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set # CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set # # External Ethernet MAC Device Support @@ -475,51 +551,63 @@ CONFIG_NETDEVICES=y # CONFIG_ENCX24J600 is not set # CONFIG_NET_E1000 is not set # CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set # CONFIG_NET_VNET is not set CONFIG_ARCH_PHY_INTERRUPT=y # CONFIG_PIPES is not set # CONFIG_PM is not set # CONFIG_POWER is not set CONFIG_SENSORS=y +# CONFIG_AS5048B is not set +# CONFIG_BH1750FVI is not set +# CONFIG_BMP180 is not set # CONFIG_LIS331DL is not set +# CONFIG_SN_LSM9DS1 is not set +# CONFIG_MB7040 is not set +# CONFIG_MCP9844 is not set +# CONFIG_MS58XX is not set +CONFIG_MS58XX_VDD=30 +# CONFIG_MPL115A is not set # CONFIG_SENSORS_ADXL345 is not set +# CONFIG_MAX31855 is not set +# CONFIG_MAX6675 is not set CONFIG_I2C_LM75=y CONFIG_LM75=y +CONFIG_LM75_I2C_FREQUENCY=100000 +# CONFIG_LM92 is not set # CONFIG_QENCODER is not set +# CONFIG_ZEROCROSS is not set # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set CONFIG_UART0_SERIAL_CONSOLE=y # CONFIG_OTHER_SERIAL_CONSOLE is not set @@ -536,6 +624,7 @@ CONFIG_UART0_PARITY=0 CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set # CONFIG_DRIVERS_WIRELESS is not set @@ -548,6 +637,7 @@ CONFIG_UART0_2STOP=0 # System Logging # # CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set # # Networking Support @@ -571,6 +661,8 @@ CONFIG_NET_GUARDSIZE=2 # # CONFIG_NET_MULTILINK is not set CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set # # Network Device Operations @@ -635,6 +727,7 @@ CONFIG_NET_ICMPv6_NEIGHBOR=y CONFIG_ICMPv6_NEIGHBOR_MAXTRIES=5 CONFIG_ICMPv6_NEIGHBOR_DELAYMSEC=20 # CONFIG_NET_ICMPv6_AUTOCONF is not set +# CONFIG_NET_ICMPv6_ROUTER is not set # # IGMPv2 Client Support @@ -661,6 +754,7 @@ CONFIG_NET_STATISTICS=y # Routing Table Configuration # # CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" # # Crypto API @@ -683,12 +777,13 @@ CONFIG_NET_STATISTICS=y CONFIG_FS_MQUEUE_MPATH="/var/mqueue" # CONFIG_FS_RAMMAP is not set # CONFIG_FS_FAT is not set -# CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set # CONFIG_FS_SMARTFS is not set # CONFIG_FS_BINFS is not set # CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set # # System Logging @@ -714,6 +809,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -753,9 +852,14 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 # CONFIG_LIBC_PERROR_STDOUT is not set CONFIG_ARCH_LOWPUTC=y # CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_DNSCLIENT is not set # # Non-standard Library Support @@ -778,23 +882,28 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_BUILTIN_PROXY_STACKSIZE=1024 +# +# CAN Utilities +# + # # Examples # # CONFIG_EXAMPLES_BUTTONS is not set -# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set @@ -803,37 +912,47 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set -# CONFIG_EXAMPLES_NXFLAT is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set -# CONFIG_EXAMPLES_ROMFS is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set -# CONFIG_EXAMPLES_THTTPD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -845,41 +964,37 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set - -# -# Network Utilities -# - -# -# Networking Utilities -# -# CONFIG_NETUTILS_CODECS is not set -# CONFIG_NETUTILS_FTPC is not set -# CONFIG_NETUTILS_FTPD is not set -# CONFIG_NETUTILS_JSON is not set -# CONFIG_NETDB_DNSCLIENT is not set -# CONFIG_NETUTILS_SMTP is not set -# CONFIG_NETUTILS_TELNETD is not set -# CONFIG_NETUTILS_TFTPC is not set -# CONFIG_NETUTILS_THTTPD is not set -CONFIG_NETUTILS_NETLIB=y -# CONFIG_NETUTILS_WEBCLIENT is not set -# CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set -# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus # # CONFIG_MODBUS is not set +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -899,13 +1014,16 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set # CONFIG_NSH_DISABLE_CP is not set # CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y # CONFIG_NSH_DISABLE_DD is not set # CONFIG_NSH_DISABLE_DF is not set # CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set # CONFIG_NSH_DISABLE_ECHO is not set # CONFIG_NSH_DISABLE_EXEC is not set # CONFIG_NSH_DISABLE_EXIT is not set @@ -914,8 +1032,10 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_HELP is not set # CONFIG_NSH_DISABLE_HEXDUMP is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y # CONFIG_NSH_DISABLE_KILL is not set # CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_LS is not set # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set @@ -923,6 +1043,7 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set # CONFIG_NSH_DISABLE_MW is not set # CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PUT is not set @@ -932,8 +1053,10 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set # CONFIG_NSH_DISABLE_UNSET is not set # CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_NSH_DISABLE_WGET is not set @@ -960,11 +1083,11 @@ CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_CONSOLE=y # CONFIG_NSH_ALTCONDEV is not set CONFIG_NSH_ARCHINIT=y -CONFIG_LIB_BOARDCTL=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_MONITOR=y CONFIG_NSH_NETINIT_SIGNO=18 @@ -1013,6 +1136,8 @@ CONFIG_NSH_IPv6NETMASK_7=0xffff CONFIG_NSH_IPv6NETMASK_8=0xff80 # CONFIG_NSH_NOMAC is not set CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # # NxWidgets/NxWM @@ -1026,39 +1151,11 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # - -# -# Custom Free Memory Command -# -# CONFIG_SYSTEM_FREE is not set - -# -# EMACS-like Command Line Editor -# # CONFIG_SYSTEM_CLE is not set - -# -# CU Minimal Terminal -# # CONFIG_SYSTEM_CUTERM is not set - -# -# FLASH Program Installation -# -# CONFIG_SYSTEM_INSTALL is not set - -# -# FLASH Erase-all Command -# - -# -# Intel HEX to binary conversion -# +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set - -# -# I2C tool -# +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=6 CONFIG_I2CTOOL_MAXBUS=6 @@ -1066,94 +1163,22 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=400000 - -# -# INI File Parser -# -# CONFIG_FSUTILS_INIFILE is not set - -# -# NxPlayer media player library / command Line -# - -# -# RAM test -# -# CONFIG_SYSTEM_RAMTEST is not set - -# -# readline() -# -CONFIG_SYSTEM_READLINE=y -CONFIG_READLINE_ECHO=y - -# -# P-Code Support -# - -# -# PHY Tool -# -# CONFIG_SYSTEM_MDIO is not set - -# -# Power Off -# -# CONFIG_SYSTEM_POWEROFF is not set - -# -# RAMTRON -# - -# -# SD Card -# - -# -# Sudoku -# -# CONFIG_SYSTEM_SUDOKU is not set - -# -# Sysinfo -# - -# -# Temperature -# +# CONFIG_SYSTEM_INSTALL is not set CONFIG_SYSTEM_LM75=y CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp" CONFIG_SYSTEM_LM75_FAHRENHEIT=y # CONFIG_SYSTEM_LM75_CENTIGRADE is not set CONFIG_SYSTEM_LM75_STACKSIZE=1024 CONFIG_SYSTEM_LM75_PRIORITY=100 - -# -# VI Work-Alike Editor -# +# CONFIG_SYSTEM_MDIO is not set +# CONFIG_SYSTEM_NETDB is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set - -# -# Stack Monitor -# - -# -# USB CDC/ACM Device Commands -# - -# -# USB Composite Device Commands -# - -# -# USB Mass Storage Device Commands -# - -# -# USB Monitor -# - -# -# Zmodem Commands -# # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/dk-tm4c129x/nsh/defconfig b/configs/dk-tm4c129x/nsh/defconfig index 158188fc44b..28ca9aa4ca4 100644 --- a/configs/dk-tm4c129x/nsh/defconfig +++ b/configs/dk-tm4c129x/nsh/defconfig @@ -41,6 +41,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -79,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -97,7 +99,9 @@ CONFIG_ARCH_CHIP_TIVA=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -108,8 +112,17 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set @@ -117,6 +130,8 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -126,6 +141,7 @@ CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -275,6 +291,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -421,6 +438,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -436,9 +454,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -479,6 +498,7 @@ CONFIG_I2C=y # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_POLLED is not set # CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y # CONFIG_SPI is not set # CONFIG_I2S is not set @@ -494,8 +514,22 @@ CONFIG_I2C=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -527,9 +561,12 @@ CONFIG_ARCH_PHY_INTERRUPT=y # CONFIG_POWER is not set CONFIG_SENSORS=y # CONFIG_AS5048B is not set +# CONFIG_BH1750FVI is not set # CONFIG_BMP180 is not set # CONFIG_LIS331DL is not set +# CONFIG_SN_LSM9DS1 is not set # CONFIG_MB7040 is not set +# CONFIG_MCP9844 is not set # CONFIG_MS58XX is not set CONFIG_MS58XX_VDD=30 # CONFIG_MPL115A is not set @@ -538,6 +575,7 @@ CONFIG_MS58XX_VDD=30 # CONFIG_MAX6675 is not set CONFIG_I2C_LM75=y CONFIG_LM75=y +CONFIG_LM75_I2C_FREQUENCY=100000 # CONFIG_LM92 is not set # CONFIG_QENCODER is not set # CONFIG_ZEROCROSS is not set @@ -545,32 +583,28 @@ CONFIG_LM75=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -779,6 +813,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -822,6 +860,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=8 @@ -860,17 +900,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # Examples # # CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -880,40 +922,47 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -925,8 +974,8 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -939,25 +988,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -977,6 +1028,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1018,6 +1070,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1050,6 +1103,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_MONITOR=y CONFIG_NSH_NETINIT_SIGNO=18 @@ -1081,6 +1135,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1095,11 +1151,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=6 CONFIG_I2CTOOL_MAXBUS=6 @@ -1107,8 +1163,14 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=400000 -# CONFIG_FSUTILS_INIFILE is not set -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_LM75=y +CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp" +CONFIG_SYSTEM_LM75_FAHRENHEIT=y +# CONFIG_SYSTEM_LM75_CENTIGRADE is not set +CONFIG_SYSTEM_LM75_STACKSIZE=1024 +CONFIG_SYSTEM_LM75_PRIORITY=100 +# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1116,13 +1178,7 @@ CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_SUDOKU is not set -CONFIG_SYSTEM_LM75=y -CONFIG_SYSTEM_LM75_DEVNAME="/dev/temp" -CONFIG_SYSTEM_LM75_FAHRENHEIT=y -# CONFIG_SYSTEM_LM75_CENTIGRADE is not set -CONFIG_SYSTEM_LM75_STACKSIZE=1024 -CONFIG_SYSTEM_LM75_PRIORITY=100 +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/dk-tm4c129x/src/dk-tm4c129x.h b/configs/dk-tm4c129x/src/dk-tm4c129x.h index 5f0b89a7079..2c78317ba9d 100644 --- a/configs/dk-tm4c129x/src/dk-tm4c129x.h +++ b/configs/dk-tm4c129x/src/dk-tm4c129x.h @@ -177,7 +177,7 @@ void tm4c_led_initialize(void); int tm4c_bringup(void); /**************************************************************************** - * Name: tiva_timer_initialize + * Name: tiva_timer_configure * * Description: * Configure the timer driver @@ -185,7 +185,7 @@ int tm4c_bringup(void); ****************************************************************************/ #ifdef CONFIG_DK_TM4C129X_TIMER -int tiva_timer_initialize(void); +int tiva_timer_configure(void); #endif #endif /* __ASSEMBLY__ */ diff --git a/configs/dk-tm4c129x/src/tm4c_appinit.c b/configs/dk-tm4c129x/src/tm4c_appinit.c index bd6c1b4b6b9..20d889d47e9 100644 --- a/configs/dk-tm4c129x/src/tm4c_appinit.c +++ b/configs/dk-tm4c129x/src/tm4c_appinit.c @@ -53,9 +53,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* If CONFIG_BOARD_INITIALIZE is selected then board initialization was * already performed in board_initialize. diff --git a/configs/dk-tm4c129x/src/tm4c_bringup.c b/configs/dk-tm4c129x/src/tm4c_bringup.c index 16ebb76ed9e..72fcac02928 100644 --- a/configs/dk-tm4c129x/src/tm4c_bringup.c +++ b/configs/dk-tm4c129x/src/tm4c_bringup.c @@ -181,7 +181,7 @@ int tm4c_bringup(void) #ifdef HAVE_TIMER /* Initialize the timer driver */ - ret = tiva_timer_initialize(); + ret = tiva_timer_configure(); if (ret < 0) { dbg("ERROR: Failed to initialize timer driver: %d\n", ret); diff --git a/configs/dk-tm4c129x/src/tm4c_ethernet.c b/configs/dk-tm4c129x/src/tm4c_ethernet.c index 9394a4522b0..8594d755596 100644 --- a/configs/dk-tm4c129x/src/tm4c_ethernet.c +++ b/configs/dk-tm4c129x/src/tm4c_ethernet.c @@ -87,7 +87,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr) nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); - /* Re-format that MAC address the way that uIP expects to see it */ + /* Re-format that MAC address the way that the network expects to see it */ ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); diff --git a/configs/dk-tm4c129x/src/tm4c_timer.c b/configs/dk-tm4c129x/src/tm4c_timer.c index e5b82d71417..e6cfe3e13cb 100644 --- a/configs/dk-tm4c129x/src/tm4c_timer.c +++ b/configs/dk-tm4c129x/src/tm4c_timer.c @@ -91,14 +91,14 @@ ****************************************************************************/ /**************************************************************************** - * Name: tiva_timer_initialize + * Name: tiva_timer_configure * * Description: * Configure the timer driver * ****************************************************************************/ -int tiva_timer_initialize(void) +int tiva_timer_configure(void) { int ret; diff --git a/configs/ea3131/nsh/defconfig b/configs/ea3131/nsh/defconfig index 1edd39ab7e2..847486498eb 100644 --- a/configs/ea3131/nsh/defconfig +++ b/configs/ea3131/nsh/defconfig @@ -358,27 +358,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_UART_SERIALDRIVER=y +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ea3131/pgnsh/defconfig b/configs/ea3131/pgnsh/defconfig index e245da9a3c6..68215a41b38 100644 --- a/configs/ea3131/pgnsh/defconfig +++ b/configs/ea3131/pgnsh/defconfig @@ -451,28 +451,28 @@ CONFIG_M25P_MEMORY_TYPE=0x20 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +CONFIG_UART_SERIALDRIVER=y +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ea3131/src/lpc31_appinit.c b/configs/ea3131/src/lpc31_appinit.c index 58e58709ca8..43ef50be72c 100644 --- a/configs/ea3131/src/lpc31_appinit.c +++ b/configs/ea3131/src/lpc31_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/ea3131/src/lpc31_appinit.c * - * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -107,9 +107,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD FAR struct sdio_dev_s *sdio; diff --git a/configs/ea3131/usbserial/defconfig b/configs/ea3131/usbserial/defconfig index c7e919046a3..e7a88724c9d 100644 --- a/configs/ea3131/usbserial/defconfig +++ b/configs/ea3131/usbserial/defconfig @@ -431,28 +431,28 @@ CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +CONFIG_UART_SERIALDRIVER=y +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ea3152/ostest/defconfig b/configs/ea3152/ostest/defconfig index bf1647db111..598fabeb5ab 100644 --- a/configs/ea3152/ostest/defconfig +++ b/configs/ea3152/ostest/defconfig @@ -357,27 +357,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +CONFIG_UART_SERIALDRIVER=y +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ea3152/src/lpc31_appinit.c b/configs/ea3152/src/lpc31_appinit.c index e77cdb63ef3..e05327622c1 100644 --- a/configs/ea3152/src/lpc31_appinit.c +++ b/configs/ea3152/src/lpc31_appinit.c @@ -107,9 +107,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD FAR struct sdio_dev_s *sdio; diff --git a/configs/eagle100/httpd/defconfig b/configs/eagle100/httpd/defconfig index f894505a3a7..96e0b09524e 100644 --- a/configs/eagle100/httpd/defconfig +++ b/configs/eagle100/httpd/defconfig @@ -352,7 +352,7 @@ CONFIG_NETDEVICES=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART0=y +CONFIG_UART0_SERIALDRIVER=y # # USART Configuration diff --git a/configs/eagle100/nettest/defconfig b/configs/eagle100/nettest/defconfig index aaf5566121d..bd692c7ffa9 100644 --- a/configs/eagle100/nettest/defconfig +++ b/configs/eagle100/nettest/defconfig @@ -475,28 +475,28 @@ CONFIG_NETDEVICES=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/eagle100/nsh/defconfig b/configs/eagle100/nsh/defconfig index 03426ceba06..77837598c15 100644 --- a/configs/eagle100/nsh/defconfig +++ b/configs/eagle100/nsh/defconfig @@ -41,6 +41,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -79,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set CONFIG_ARCH_CHIP_LM=y @@ -97,7 +99,9 @@ CONFIG_ARCH_CHIP_LM=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -108,14 +112,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -125,6 +140,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -258,6 +274,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -416,9 +433,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -459,6 +477,8 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_SPI_CMDDATA is not set CONFIG_SPI_CALLBACK=y # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -472,7 +492,20 @@ CONFIG_SPI_CALLBACK=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -484,6 +517,7 @@ CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -518,32 +552,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -719,7 +749,9 @@ CONFIG_FS_FAT=y # CONFIG_FAT_LCNAMES is not set # CONFIG_FAT_LFN is not set # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -752,6 +784,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -797,6 +833,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -804,6 +842,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -830,18 +869,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -851,18 +892,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -870,22 +912,29 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -898,8 +947,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -912,25 +961,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -949,6 +1000,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -991,6 +1043,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1023,6 +1076,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1049,6 +1103,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1063,13 +1119,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1078,5 +1133,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/eagle100/nxflat/defconfig b/configs/eagle100/nxflat/defconfig index ee72ff1b14d..67b18010a40 100644 --- a/configs/eagle100/nxflat/defconfig +++ b/configs/eagle100/nxflat/defconfig @@ -325,27 +325,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/eagle100/src/lm_appinit.c b/configs/eagle100/src/lm_appinit.c index 6594f5abb1a..72b7206fad2 100644 --- a/configs/eagle100/src/lm_appinit.c +++ b/configs/eagle100/src/lm_appinit.c @@ -103,9 +103,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { FAR struct spi_dev_s *spi; int ret; diff --git a/configs/eagle100/src/lm_ethernet.c b/configs/eagle100/src/lm_ethernet.c index 62f073697c5..7a33e1af6cb 100644 --- a/configs/eagle100/src/lm_ethernet.c +++ b/configs/eagle100/src/lm_ethernet.c @@ -86,7 +86,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr) nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); - /* Re-format that MAC address the way that uIP expects to see it */ + /* Re-format that MAC address the way that the network expects to see it */ ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); diff --git a/configs/eagle100/thttpd/defconfig b/configs/eagle100/thttpd/defconfig index 081cb7a9830..9bd0ee452b5 100644 --- a/configs/eagle100/thttpd/defconfig +++ b/configs/eagle100/thttpd/defconfig @@ -459,28 +459,28 @@ CONFIG_NETDEVICES=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/efm32-g8xx-stk/nsh/defconfig b/configs/efm32-g8xx-stk/nsh/defconfig index 899fdd919c7..a3112c194cb 100644 --- a/configs/efm32-g8xx-stk/nsh/defconfig +++ b/configs/efm32-g8xx-stk/nsh/defconfig @@ -384,28 +384,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/efm32gg-stk3700/nsh/defconfig b/configs/efm32gg-stk3700/nsh/defconfig index 0649d6b5e1a..d8d3ea37a76 100644 --- a/configs/efm32gg-stk3700/nsh/defconfig +++ b/configs/efm32gg-stk3700/nsh/defconfig @@ -411,28 +411,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/ekk-lm3s9b96/nsh/defconfig b/configs/ekk-lm3s9b96/nsh/defconfig index 146fb4c3cce..946038cb057 100644 --- a/configs/ekk-lm3s9b96/nsh/defconfig +++ b/configs/ekk-lm3s9b96/nsh/defconfig @@ -37,6 +37,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set CONFIG_ARCH_CHIP_LM=y @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_LM=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -121,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -247,6 +263,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -405,9 +422,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -448,6 +466,8 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_SPI_CMDDATA is not set CONFIG_SPI_CALLBACK=y # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -461,7 +481,20 @@ CONFIG_SPI_CALLBACK=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=0 # CONFIG_MMCSD_READONLY is not set @@ -473,6 +506,7 @@ CONFIG_MMCSD_SPICLOCK=20000000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -507,32 +541,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -708,7 +738,9 @@ CONFIG_FS_FAT=y # CONFIG_FAT_LCNAMES is not set # CONFIG_FAT_LFN is not set # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set CONFIG_NFS=y # CONFIG_NFS_STATISTICS is not set # CONFIG_FS_NXFFS is not set @@ -742,6 +774,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -787,6 +823,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -794,6 +832,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -820,18 +859,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -841,18 +882,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -860,22 +902,29 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -888,8 +937,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -901,25 +950,27 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -938,6 +989,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -981,6 +1033,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1013,6 +1066,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1041,6 +1095,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1055,13 +1111,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1070,5 +1125,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ekk-lm3s9b96/src/lm_appinit.c b/configs/ekk-lm3s9b96/src/lm_appinit.c index 313bdc9783f..21be2c1952a 100644 --- a/configs/ekk-lm3s9b96/src/lm_appinit.c +++ b/configs/ekk-lm3s9b96/src/lm_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/ekk-lm3s9b96/src/lm_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Jose Pablo Rojas V. * @@ -60,9 +60,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/ekk-lm3s9b96/src/lm_ethernet.c b/configs/ekk-lm3s9b96/src/lm_ethernet.c index 622a972b3ea..c3627e4a16c 100644 --- a/configs/ekk-lm3s9b96/src/lm_ethernet.c +++ b/configs/ekk-lm3s9b96/src/lm_ethernet.c @@ -87,7 +87,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr) nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); - /* Re-format that MAC address the way that uIP expects to see it */ + /* Re-format that MAC address the way that the network expects to see it */ ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); diff --git a/configs/ez80f910200kitg/ostest/defconfig b/configs/ez80f910200kitg/ostest/defconfig index b85a58b23ce..106998a223d 100644 --- a/configs/ez80f910200kitg/ostest/defconfig +++ b/configs/ez80f910200kitg/ostest/defconfig @@ -381,28 +381,28 @@ CONFIG_MMCSD_HAVECARDDETECT=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ez80f910200zco/dhcpd/defconfig b/configs/ez80f910200zco/dhcpd/defconfig index 7767fcc543a..615994d436c 100644 --- a/configs/ez80f910200zco/dhcpd/defconfig +++ b/configs/ez80f910200zco/dhcpd/defconfig @@ -427,28 +427,28 @@ CONFIG_ETH0_PHY_AM79C874=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ez80f910200zco/httpd/defconfig b/configs/ez80f910200zco/httpd/defconfig index 084ec33edf6..fe55d601b77 100644 --- a/configs/ez80f910200zco/httpd/defconfig +++ b/configs/ez80f910200zco/httpd/defconfig @@ -436,28 +436,28 @@ CONFIG_ETH0_PHY_AM79C874=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ez80f910200zco/nettest/defconfig b/configs/ez80f910200zco/nettest/defconfig index 8dd72d76fbc..66eb97ef721 100644 --- a/configs/ez80f910200zco/nettest/defconfig +++ b/configs/ez80f910200zco/nettest/defconfig @@ -428,28 +428,28 @@ CONFIG_ETH0_PHY_AM79C874=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ez80f910200zco/nsh/defconfig b/configs/ez80f910200zco/nsh/defconfig index 714dccfa3f3..c4cfa6c95d4 100644 --- a/configs/ez80f910200zco/nsh/defconfig +++ b/configs/ez80f910200zco/nsh/defconfig @@ -53,7 +53,6 @@ CONFIG_DEBUG=y # # Subsystem Debug Options # -# CONFIG_DEBUG_AUDIO is not set # CONFIG_DEBUG_BINFMT is not set # CONFIG_DEBUG_FS is not set # CONFIG_DEBUG_GRAPHICS is not set @@ -159,6 +158,8 @@ CONFIG_EZ80_UART0=y # CONFIG_EZ80_UART2 is not set CONFIG_EZ80_EMAC=y CONFIG_EZ80_TOOLCHAIN_ZDSII=y +# CONFIG_EZ80_ZDSII_V511 is not set +CONFIG_EZ80_ZDSII_V521=y CONFIG_EZ80_FIAD=0x1f CONFIG_EZ80_PHYCONFIG=1 CONFIG_EZ80_RAMADDR=0xf7c000 @@ -181,6 +182,7 @@ CONFIG_ARCH_TIMERHOOK=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set # CONFIG_ARCH_HAVE_VFORK is not set # CONFIG_ARCH_HAVE_MMU is not set # CONFIG_ARCH_HAVE_MPU is not set @@ -375,12 +377,18 @@ CONFIG_DEV_NULL=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support # # CONFIG_USERLED is not set +# CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set # CONFIG_MODEM is not set @@ -439,32 +447,28 @@ CONFIG_ETH0_PHY_AM79C874=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -673,6 +677,10 @@ CONFIG_HEAP2_SIZE=0 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -716,6 +724,7 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_ARCH_HAVE_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=4 @@ -752,14 +761,15 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -769,18 +779,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -788,17 +799,16 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # @@ -806,6 +816,11 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_FSUTILS_INIFILE is not set +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + # # Graphics Support # @@ -816,8 +831,8 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -830,20 +845,21 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -868,6 +884,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -942,6 +959,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # CONFIG_NSH_NETINIT_DEBUG is not set @@ -987,12 +1005,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1001,6 +1019,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ez80f910200zco/poll/defconfig b/configs/ez80f910200zco/poll/defconfig index 336e8aa08a7..b8effce8d09 100644 --- a/configs/ez80f910200zco/poll/defconfig +++ b/configs/ez80f910200zco/poll/defconfig @@ -435,28 +435,28 @@ CONFIG_ETH0_PHY_AM79C874=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/fire-stm32v2/include/board.h b/configs/fire-stm32v2/include/board.h index 880ea6d6c7d..0f9e7c11aaf 100644 --- a/configs/fire-stm32v2/include/board.h +++ b/configs/fire-stm32v2/include/board.h @@ -2,7 +2,7 @@ * configs/fire-stm32v2/include/board.h * include/arch/board/board.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -103,14 +103,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ @@ -120,8 +120,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/fire-stm32v2/nsh/defconfig b/configs/fire-stm32v2/nsh/defconfig index bc729a38586..a914c0624aa 100644 --- a/configs/fire-stm32v2/nsh/defconfig +++ b/configs/fire-stm32v2/nsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -204,6 +209,7 @@ CONFIG_SDIO_DMA=y CONFIG_ARCH_CHIP_STM32F103VE=y # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -248,6 +254,7 @@ CONFIG_ARCH_CHIP_STM32F103VE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -418,20 +425,38 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set # CONFIG_STM32_DMACAPABLE is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -729,7 +754,12 @@ CONFIG_RTC=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -793,34 +823,28 @@ CONFIG_ENC28J60_FREQUENCY=20000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1131,6 +1155,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1174,15 +1200,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1192,17 +1219,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1210,8 +1237,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1219,11 +1246,10 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -1247,8 +1273,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1261,20 +1287,21 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1376,6 +1403,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1420,11 +1448,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=1 CONFIG_I2CTOOL_MAXBUS=2 @@ -1432,7 +1460,7 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=100000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1441,7 +1469,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set CONFIG_SYSTEM_USBMSC=y CONFIG_SYSTEM_USBMSC_NLUNS=1 @@ -1454,4 +1481,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768 CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100 +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/fire-stm32v2/src/stm32_appinit.c b/configs/fire-stm32v2/src/stm32_appinit.c index 8c45062a8f3..e8711ef204a 100644 --- a/configs/fire-stm32v2/src/stm32_appinit.c +++ b/configs/fire-stm32v2/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/fire-stm32v2/src/stm32_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -196,9 +196,24 @@ static void stm32_i2ctool(void) * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_MMCSD) || defined(HAVE_W25) int ret; diff --git a/configs/freedom-kl25z/README.txt b/configs/freedom-kl25z/README.txt index 23390503de5..f2cc8e0c027 100644 --- a/configs/freedom-kl25z/README.txt +++ b/configs/freedom-kl25z/README.txt @@ -301,6 +301,86 @@ Where is one of the following: configuration. This configuration has far fewer features than the nsh configuration but is also a fraction of the size. + This minnsh configuration is a "proof-of-concept" and not very usable in + its current state. This configuration was created by disabling + everything possible INCLUDING file system support. Without file system + support, NuttX is pretty much crippled. Here are some of the + consequences of disabling the file system: + + - All features that depend on the file system are lost: device drivers, + mountpoints, message queues, named semaphores. + + - Without device drivers, you cannot interact with the RTOS using POSIX + interfaces. You would have to work with NuttX as with those other + tiny RTOSs: As a scheduler and a callable hardare abstraction layer + (HAL). + + - You cannot use any of the NuttX upper half device drivers since they + depend on the pseudo-file system and device nodes. You can, of + course, continue to use the lower half drivers either directly. Or, + perhaps, you could write some custom minnsh upper half drivers that + do not depend on a file system and expose a HAL interface. + + There is a special version of readline() the NSH uses when there is no + file system. It uses a special up_putc() to write data to the console + and a special function up_getc() to read data from the console. + + - The current up_getc() implementationsa are a kludge. They are + analogous to the up_putc() implementations: They directly poll the + hardware for serial availability, locking up all lower priority tasks + in the entire system while they poll. So a version of NSH that uses + up_getc() essentially blocks the system until a character is received. + + This, of course, could be fixed by creating a special, upper half + implementation of the interrupt-driven serial lower half (like + stm32_serial) that just supports single character console I/O + (perhaps called up_putc and up_getc?). The NSH could wait for serial + input without blocking the system. But then that would increase the + footprint too. + + So although the minnsh configurations are a good starting point for + making things small, they not are really very practical. Why might + you want a NuttX minnsh solution? Perhaps you have software that runs + on a family of chips including some very tiny MCUs. Then perhaps having + the RTOS compatibility would justify the loss of functionality? + + You can re-enable the file system and (true) serial console with + these settings: + + Enable the file system: + CONFIG_NFILE_DESCRIPTORS=5 + CONFIG_NFILE_STREAMS=5 + + Enable the console device: + CONFIG_DEV_CONSOLE=y + + Disable most new NSH commands. Some like 'ls' are really mandatory + with a file system: + CONFIG_NSH_DISABLE_xxx=y + + Enable the upper half serial driver: + CONFIG_SERIAL=y + CONFIG_STANDARD_SERIAL=y + + Enable the USART1 serial driver: + CONFIG_STM32_USART1=y + CONFIG_STM32_USART1_SERIALDRIVER=y + CONFIG_USART1_SERIAL_CONSOLE=y + + CONFIG_USART1_2STOP=0 + CONFIG_USART1_BAUD=115200 + CONFIG_USART1_BITS=8 + CONFIG_USART1_PARITY=0 + CONFIG_USART1_RXBUFSIZE=16 + CONFIG_USART1_TXBUFSIZE=16 + + With these changes, NSH should behave better and we preserve the device + driver interface. But this result in a total size increase of about + 7KB: That is about 5KB of additional OS support for the file system and + serial console PLUS about 2KB for the 'ls' command logic (including OS + support for opendir(), readdir(), closedir(), stat(), and probably other + things). + nsh: --- Configures the NuttShell (nsh) located at apps/examples/nsh. The diff --git a/configs/freedom-kl25z/minnsh/defconfig b/configs/freedom-kl25z/minnsh/defconfig index 0bcfe2f3407..753da383ba1 100644 --- a/configs/freedom-kl25z/minnsh/defconfig +++ b/configs/freedom-kl25z/minnsh/defconfig @@ -353,28 +353,28 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/freedom-kl25z/nsh/defconfig b/configs/freedom-kl25z/nsh/defconfig index b95602880d4..7a97b9a5bb5 100644 --- a/configs/freedom-kl25z/nsh/defconfig +++ b/configs/freedom-kl25z/nsh/defconfig @@ -385,28 +385,28 @@ CONFIG_PWM=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/freedom-kl25z/src/kl_appinit.c b/configs/freedom-kl25z/src/kl_appinit.c index a58a43c0bd6..a00e675cdd8 100644 --- a/configs/freedom-kl25z/src/kl_appinit.c +++ b/configs/freedom-kl25z/src/kl_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/stm32f4discovery/src/kl_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -59,13 +59,26 @@ * Name: board_app_initialize * * Description: - * Perform application specific initialization. This function is never - * called directly from application code, but only indirectly via the - * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * Perform architecture specific initialization + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(CONFIG_SENSORS_ADXL345) int ret; diff --git a/configs/freedom-kl25z/src/kl_boardinitialize.c b/configs/freedom-kl25z/src/kl_boardinitialize.c index 2ab54047bef..4da407d2385 100644 --- a/configs/freedom-kl25z/src/kl_boardinitialize.c +++ b/configs/freedom-kl25z/src/kl_boardinitialize.c @@ -124,7 +124,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif /* CC3000 wireless initialization */ diff --git a/configs/freedom-kl26z/README.txt b/configs/freedom-kl26z/README.txt index 260ee1b6be1..55f593c7d07 100644 --- a/configs/freedom-kl26z/README.txt +++ b/configs/freedom-kl26z/README.txt @@ -279,6 +279,86 @@ Where is one of the following: configuration. This configuration has far fewer features than the nsh configuration but is also a fraction of the size. + This minnsh configuration is a "proof-of-concept" and not very usable in + its current state. This configuration was created by disabling + everything possible INCLUDING file system support. Without file system + support, NuttX is pretty much crippled. Here are some of the + consequences of disabling the file system: + + - All features that depend on the file system are lost: device drivers, + mountpoints, message queues, named semaphores. + + - Without device drivers, you cannot interact with the RTOS using POSIX + interfaces. You would have to work with NuttX as with those other + tiny RTOSs: As a scheduler and a callable hardare abstraction layer + (HAL). + + - You cannot use any of the NuttX upper half device drivers since they + depend on the pseudo-file system and device nodes. You can, of + course, continue to use the lower half drivers either directly. Or, + perhaps, you could write some custom minnsh upper half drivers that + do not depend on a file system and expose a HAL interface. + + There is a special version of readline() the NSH uses when there is no + file system. It uses a special up_putc() to write data to the console + and a special function up_getc() to read data from the console. + + - The current up_getc() implementationsa are a kludge. They are + analogous to the up_putc() implementations: They directly poll the + hardware for serial availability, locking up all lower priority tasks + in the entire system while they poll. So a version of NSH that uses + up_getc() essentially blocks the system until a character is received. + + This, of course, could be fixed by creating a special, upper half + implementation of the interrupt-driven serial lower half (like + stm32_serial) that just supports single character console I/O + (perhaps called up_putc and up_getc?). The NSH could wait for serial + input without blocking the system. But then that would increase the + footprint too. + + So although the minnsh configurations are a good starting point for + making things small, they not are really very practical. Why might + you want a NuttX minnsh solution? Perhaps you have software that runs + on a family of chips including some very tiny MCUs. Then perhaps having + the RTOS compatibility would justify the loss of functionality? + + You can re-enable the file system and (true) serial console with + these settings: + + Enable the file system: + CONFIG_NFILE_DESCRIPTORS=5 + CONFIG_NFILE_STREAMS=5 + + Enable the console device: + CONFIG_DEV_CONSOLE=y + + Disable most new NSH commands. Some like 'ls' are really mandatory + with a file system: + CONFIG_NSH_DISABLE_xxx=y + + Enable the upper half serial driver: + CONFIG_SERIAL=y + CONFIG_STANDARD_SERIAL=y + + Enable the USART1 serial driver: + CONFIG_STM32_USART1=y + CONFIG_STM32_USART1_SERIALDRIVER=y + CONFIG_USART1_SERIAL_CONSOLE=y + + CONFIG_USART1_2STOP=0 + CONFIG_USART1_BAUD=115200 + CONFIG_USART1_BITS=8 + CONFIG_USART1_PARITY=0 + CONFIG_USART1_RXBUFSIZE=16 + CONFIG_USART1_TXBUFSIZE=16 + + With these changes, NSH should behave better and we preserve the device + driver interface. But this result in a total size increase of about + 7KB: That is about 5KB of additional OS support for the file system and + serial console PLUS about 2KB for the 'ls' command logic (including OS + support for opendir(), readdir(), closedir(), stat(), and probably other + things). + nsh: --- Configures the NuttShell (nsh) located at apps/examples/nsh. The diff --git a/configs/freedom-kl26z/minnsh/defconfig b/configs/freedom-kl26z/minnsh/defconfig index 74c11f304a5..843bd482e05 100644 --- a/configs/freedom-kl26z/minnsh/defconfig +++ b/configs/freedom-kl26z/minnsh/defconfig @@ -356,28 +356,28 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/freedom-kl26z/nsh/defconfig b/configs/freedom-kl26z/nsh/defconfig index ec69cb5241e..40157e1b53b 100644 --- a/configs/freedom-kl26z/nsh/defconfig +++ b/configs/freedom-kl26z/nsh/defconfig @@ -385,28 +385,28 @@ CONFIG_PWM=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/freedom-kl26z/src/kl_appinit.c b/configs/freedom-kl26z/src/kl_appinit.c index c4e5ad7d424..96ac70a0617 100644 --- a/configs/freedom-kl26z/src/kl_appinit.c +++ b/configs/freedom-kl26z/src/kl_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/stm32f4discovery/src/kl_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -57,13 +57,26 @@ * Name: board_app_initialize * * Description: - * Perform application specific initialization. This function is never - * called directly from application code, but only indirectly via the - * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * Perform architecture specific initialization + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/freedom-kl26z/src/kl_boardinitialize.c b/configs/freedom-kl26z/src/kl_boardinitialize.c index 004274c6f62..3a3be5190a2 100644 --- a/configs/freedom-kl26z/src/kl_boardinitialize.c +++ b/configs/freedom-kl26z/src/kl_boardinitialize.c @@ -124,7 +124,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif diff --git a/configs/hymini-stm32v/buttons/defconfig b/configs/hymini-stm32v/buttons/defconfig index edda72f4cff..3141e0c1605 100644 --- a/configs/hymini-stm32v/buttons/defconfig +++ b/configs/hymini-stm32v/buttons/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -408,13 +414,17 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -677,33 +687,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -841,6 +846,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -925,7 +932,6 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -961,6 +967,7 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/hymini-stm32v/include/board.h b/configs/hymini-stm32v/include/board.h index ba55bdecdfa..dd39fde960f 100644 --- a/configs/hymini-stm32v/include/board.h +++ b/configs/hymini-stm32v/include/board.h @@ -1,9 +1,10 @@ /************************************************************************************ * configs/hymini-stm32v/include/board.h - * include/arch/board/board.h * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2011 Laurent Latil. All rights reserved. * Author: Laurent Latil + * Gregory Nutt * * Derives, in part, from configs/stm3210e-eval/include/board.h * @@ -98,14 +99,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ @@ -115,8 +116,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/hymini-stm32v/nsh/defconfig b/configs/hymini-stm32v/nsh/defconfig index c968013077c..69662e887c4 100644 --- a/configs/hymini-stm32v/nsh/defconfig +++ b/configs/hymini-stm32v/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -411,13 +417,17 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -706,33 +716,28 @@ CONFIG_SDIO_PREFLIGHT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -878,6 +883,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -990,6 +997,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/hymini-stm32v/nsh2/defconfig b/configs/hymini-stm32v/nsh2/defconfig index faabb689b9a..e36492fc6aa 100644 --- a/configs/hymini-stm32v/nsh2/defconfig +++ b/configs/hymini-stm32v/nsh2/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -418,13 +424,17 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -794,33 +804,28 @@ CONFIG_SDIO_PREFLIGHT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -857,7 +862,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=128 -# CONFIG_USBDEV_TRACE_STRINGS is not set # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -952,6 +956,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1096,6 +1101,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1191,6 +1198,7 @@ CONFIG_EXAMPLES_NXIMAGE=y CONFIG_EXAMPLES_NXIMAGE_VPLANE=0 CONFIG_EXAMPLES_NXIMAGE_DEVNO=0 CONFIG_EXAMPLES_NXIMAGE_BPP=16 +# CONFIG_EXAMPLES_NXIMAGE_GREYSCALE is not set # CONFIG_EXAMPLES_NXIMAGE_XSCALEp5 is not set CONFIG_EXAMPLES_NXIMAGE_XSCALE1p0=y # CONFIG_EXAMPLES_NXIMAGE_XSCALE1p5 is not set @@ -1266,6 +1274,7 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/hymini-stm32v/src/stm32_appinit.c b/configs/hymini-stm32v/src/stm32_appinit.c index df8adca9070..4a7b2206337 100644 --- a/configs/hymini-stm32v/src/stm32_appinit.c +++ b/configs/hymini-stm32v/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/hymini-stm32v/src/stm32_appinit.c * - * Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -151,9 +151,24 @@ static int nsh_cdinterrupt(int irq, FAR void *context) * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD int ret; diff --git a/configs/hymini-stm32v/usbmsc/defconfig b/configs/hymini-stm32v/usbmsc/defconfig index b5514012449..a38efa7b82f 100644 --- a/configs/hymini-stm32v/usbmsc/defconfig +++ b/configs/hymini-stm32v/usbmsc/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -413,14 +419,20 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -525,7 +537,14 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y # Board-Specific Options # CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -701,34 +720,28 @@ CONFIG_SDIO_PREFLIGHT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -922,6 +935,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1033,6 +1048,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/hymini-stm32v/usbnsh/defconfig b/configs/hymini-stm32v/usbnsh/defconfig index a5bc5c22840..d744b1a2ca9 100644 --- a/configs/hymini-stm32v/usbnsh/defconfig +++ b/configs/hymini-stm32v/usbnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -408,13 +414,17 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -516,7 +526,14 @@ CONFIG_NSH_MMCSDMINOR=0 # Board-Specific Options # CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -680,33 +697,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -760,8 +772,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -886,6 +898,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1006,6 +1020,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/hymini-stm32v/usbserial/defconfig b/configs/hymini-stm32v/usbserial/defconfig index 7d41d164709..6183ec98d4f 100644 --- a/configs/hymini-stm32v/usbserial/defconfig +++ b/configs/hymini-stm32v/usbserial/defconfig @@ -117,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -135,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -241,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -412,14 +415,20 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -686,34 +695,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1008,6 +1011,7 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/kwikstik-k40/ostest/defconfig b/configs/kwikstik-k40/ostest/defconfig index 1f886be274e..51b5c56a7a4 100644 --- a/configs/kwikstik-k40/ostest/defconfig +++ b/configs/kwikstik-k40/ostest/defconfig @@ -420,28 +420,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -CONFIG_ARCH_HAVE_UART5=y -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +CONFIG_UART5_SERIALDRIVER=y +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/kwikstik-k40/src/k40_appinit.c b/configs/kwikstik-k40/src/k40_appinit.c index 1fb77c36346..43694bce935 100644 --- a/configs/kwikstik-k40/src/k40_appinit.c +++ b/configs/kwikstik-k40/src/k40_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/kwikstik-k40/src/k40_appinit.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -185,9 +185,24 @@ static int kinetis_cdinterrupt(int irq, FAR void *context) * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD int ret; diff --git a/configs/launchxl-tms57004/nsh/defconfig b/configs/launchxl-tms57004/nsh/defconfig index c0a16a9c21c..082be95f2bd 100644 --- a/configs/launchxl-tms57004/nsh/defconfig +++ b/configs/launchxl-tms57004/nsh/defconfig @@ -424,28 +424,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -CONFIG_ARCH_HAVE_SCI1=y -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +CONFIG_SCI1_SERIALDRIVER=y +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/launchxl-tms57004/src/tms570_appinit.c b/configs/launchxl-tms57004/src/tms570_appinit.c index 448ea165775..6a187b033fd 100644 --- a/configs/launchxl-tms57004/src/tms570_appinit.c +++ b/configs/launchxl-tms57004/src/tms570_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/launchxl_tms57004/src/sim_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -50,14 +50,27 @@ * Name: board_app_initialize * * Description: - * Perform application specific initialization. This function is never - * called directly from application code, but only indirectly via the - * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * Perform architecture specific initialization + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ #ifdef CONFIG_LIB_BOARDCTL -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifndef CONFIG_BOARD_INITIALIZE /* Perform application level board initialization (if that was not already diff --git a/configs/lincoln60/netnsh/defconfig b/configs/lincoln60/netnsh/defconfig index d8da29e553d..c48f2977868 100644 --- a/configs/lincoln60/netnsh/defconfig +++ b/configs/lincoln60/netnsh/defconfig @@ -41,6 +41,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -79,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -97,7 +99,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -108,14 +112,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -125,6 +140,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -233,6 +249,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -378,6 +395,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -393,9 +411,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -447,8 +466,22 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -502,32 +535,28 @@ CONFIG_ETH0_PHY_KSZ8041=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -706,7 +735,9 @@ CONFIG_FS_FAT=y # CONFIG_FAT_LCNAMES is not set # CONFIG_FAT_LFN is not set # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -739,6 +770,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -784,6 +819,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -791,6 +828,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -817,18 +855,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -838,18 +878,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -857,22 +898,29 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -885,8 +933,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -899,25 +947,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -936,6 +986,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -978,6 +1029,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1010,6 +1062,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1039,6 +1092,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1053,13 +1108,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1068,5 +1122,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lincoln60/nsh/defconfig b/configs/lincoln60/nsh/defconfig index 71ddd71b843..54c6ad3f8cc 100644 --- a/configs/lincoln60/nsh/defconfig +++ b/configs/lincoln60/nsh/defconfig @@ -428,28 +428,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lincoln60/src/lpc17_appinit.c b/configs/lincoln60/src/lpc17_appinit.c index a10646e7517..2e1426635ca 100644 --- a/configs/lincoln60/src/lpc17_appinit.c +++ b/configs/lincoln60/src/lpc17_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/lincoln60/src/lpc17_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,10 +47,6 @@ #include #include -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -61,9 +57,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/lincoln60/thttpd-binfs/defconfig b/configs/lincoln60/thttpd-binfs/defconfig index fe49078c526..a752c4c72ff 100644 --- a/configs/lincoln60/thttpd-binfs/defconfig +++ b/configs/lincoln60/thttpd-binfs/defconfig @@ -466,28 +466,28 @@ CONFIG_ETH0_PHY_KSZ8041=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lm3s6432-s2e/nsh/defconfig b/configs/lm3s6432-s2e/nsh/defconfig index 0c8509b814c..0d4695c79b7 100644 --- a/configs/lm3s6432-s2e/nsh/defconfig +++ b/configs/lm3s6432-s2e/nsh/defconfig @@ -37,6 +37,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set CONFIG_ARCH_CHIP_LM=y @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_LM=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -121,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -242,6 +258,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -398,9 +415,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -449,8 +467,22 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -485,32 +517,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -729,6 +757,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -772,6 +804,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=4 @@ -804,17 +838,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -824,18 +860,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -843,22 +880,28 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -870,8 +913,8 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -884,25 +927,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -921,6 +966,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -962,6 +1008,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -994,6 +1041,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1020,6 +1068,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1034,13 +1084,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1049,5 +1098,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s6432-s2e/src/lm_appinit.c b/configs/lm3s6432-s2e/src/lm_appinit.c index ff747854259..d787ea32583 100644 --- a/configs/lm3s6432-s2e/src/lm_appinit.c +++ b/configs/lm3s6432-s2e/src/lm_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/lm3s6432-s2e/src/lm_appinit.c * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,10 +47,6 @@ #include #include -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -61,9 +57,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/lm3s6432-s2e/src/lm_ethernet.c b/configs/lm3s6432-s2e/src/lm_ethernet.c index 2d6bb5a0886..c10d261adc8 100644 --- a/configs/lm3s6432-s2e/src/lm_ethernet.c +++ b/configs/lm3s6432-s2e/src/lm_ethernet.c @@ -86,7 +86,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr) nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); - /* Re-format that MAC address the way that uIP expects to see it */ + /* Re-format that MAC address the way that the network expects to see it */ ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); diff --git a/configs/lm3s6965-ek/discover/defconfig b/configs/lm3s6965-ek/discover/defconfig index 3a0a9d97456..3a31755617a 100644 --- a/configs/lm3s6965-ek/discover/defconfig +++ b/configs/lm3s6965-ek/discover/defconfig @@ -37,6 +37,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set CONFIG_ARCH_CHIP_LM=y @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_LM=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -121,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -252,6 +268,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -410,9 +427,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -453,6 +471,8 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_SPI_CMDDATA is not set CONFIG_SPI_CALLBACK=y # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -466,7 +486,20 @@ CONFIG_SPI_CALLBACK=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -478,6 +511,7 @@ CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -512,32 +546,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -713,7 +743,9 @@ CONFIG_FS_FAT=y # CONFIG_FAT_LCNAMES is not set # CONFIG_FAT_LFN is not set # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -746,6 +778,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -791,6 +827,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -798,6 +836,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -824,18 +863,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -845,18 +886,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -864,22 +906,29 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -892,8 +941,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -906,25 +955,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -943,6 +994,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -985,6 +1037,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1017,6 +1070,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1046,6 +1100,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1060,13 +1116,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1075,5 +1130,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s6965-ek/nsh/defconfig b/configs/lm3s6965-ek/nsh/defconfig index 3a0a9d97456..3a31755617a 100644 --- a/configs/lm3s6965-ek/nsh/defconfig +++ b/configs/lm3s6965-ek/nsh/defconfig @@ -37,6 +37,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set CONFIG_ARCH_CHIP_LM=y @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_LM=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -121,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -252,6 +268,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -410,9 +427,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -453,6 +471,8 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_SPI_CMDDATA is not set CONFIG_SPI_CALLBACK=y # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -466,7 +486,20 @@ CONFIG_SPI_CALLBACK=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -478,6 +511,7 @@ CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -512,32 +546,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -713,7 +743,9 @@ CONFIG_FS_FAT=y # CONFIG_FAT_LCNAMES is not set # CONFIG_FAT_LFN is not set # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -746,6 +778,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -791,6 +827,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -798,6 +836,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -824,18 +863,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -845,18 +886,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -864,22 +906,29 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -892,8 +941,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -906,25 +955,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -943,6 +994,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -985,6 +1037,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1017,6 +1070,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1046,6 +1100,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1060,13 +1116,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1075,5 +1130,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s6965-ek/nx/defconfig b/configs/lm3s6965-ek/nx/defconfig index bdafa45c256..3d779630f9d 100644 --- a/configs/lm3s6965-ek/nx/defconfig +++ b/configs/lm3s6965-ek/nx/defconfig @@ -491,28 +491,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lm3s6965-ek/src/lm_appinit.c b/configs/lm3s6965-ek/src/lm_appinit.c index 6f2480b80d0..c9eaf61d81c 100644 --- a/configs/lm3s6965-ek/src/lm_appinit.c +++ b/configs/lm3s6965-ek/src/lm_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/lm3s6965-ek/src/lm_appinit.c * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -107,9 +107,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD FAR struct spi_dev_s *spi; diff --git a/configs/lm3s6965-ek/src/lm_ethernet.c b/configs/lm3s6965-ek/src/lm_ethernet.c index 6d4d62f5fa0..4a467dd4591 100644 --- a/configs/lm3s6965-ek/src/lm_ethernet.c +++ b/configs/lm3s6965-ek/src/lm_ethernet.c @@ -86,7 +86,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr) nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); - /* Re-format that MAC address the way that uIP expects to see it */ + /* Re-format that MAC address the way that the network expects to see it */ ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); diff --git a/configs/lm3s6965-ek/tcpecho/defconfig b/configs/lm3s6965-ek/tcpecho/defconfig index a50ae7f2bc9..e655d4d6c13 100644 --- a/configs/lm3s6965-ek/tcpecho/defconfig +++ b/configs/lm3s6965-ek/tcpecho/defconfig @@ -481,28 +481,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lm3s8962-ek/nsh/defconfig b/configs/lm3s8962-ek/nsh/defconfig index 0a28a1cea2a..57c304ce134 100644 --- a/configs/lm3s8962-ek/nsh/defconfig +++ b/configs/lm3s8962-ek/nsh/defconfig @@ -41,6 +41,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -79,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set CONFIG_ARCH_CHIP_LM=y @@ -97,7 +99,9 @@ CONFIG_ARCH_CHIP_LM=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -108,14 +112,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -125,6 +140,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -262,6 +278,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -420,9 +437,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -463,6 +481,8 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_SPI_CMDDATA is not set CONFIG_SPI_CALLBACK=y # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -476,7 +496,20 @@ CONFIG_SPI_CALLBACK=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -488,6 +521,7 @@ CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -522,32 +556,28 @@ CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -723,7 +753,9 @@ CONFIG_FS_FAT=y # CONFIG_FAT_LCNAMES is not set # CONFIG_FAT_LFN is not set # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -756,6 +788,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -801,6 +837,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -808,6 +846,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -834,18 +873,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -855,18 +896,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -874,22 +916,29 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -902,8 +951,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -916,25 +965,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -953,6 +1004,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -995,6 +1047,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1027,6 +1080,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1055,6 +1109,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1069,13 +1125,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1084,5 +1139,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lm3s8962-ek/nx/defconfig b/configs/lm3s8962-ek/nx/defconfig index db5c996245f..c72dc447b56 100644 --- a/configs/lm3s8962-ek/nx/defconfig +++ b/configs/lm3s8962-ek/nx/defconfig @@ -501,28 +501,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lm3s8962-ek/src/lm_appinit.c b/configs/lm3s8962-ek/src/lm_appinit.c index 7a027dda55a..ba601eacb67 100644 --- a/configs/lm3s8962-ek/src/lm_appinit.c +++ b/configs/lm3s8962-ek/src/lm_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/lm3s8962-ek/src/lm_appinit.c * - * Copyright (C) 2010, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -109,9 +109,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD FAR struct spi_dev_s *spi; diff --git a/configs/lm3s8962-ek/src/lm_ethernet.c b/configs/lm3s8962-ek/src/lm_ethernet.c index fb5db9e1525..a6d4da70e97 100644 --- a/configs/lm3s8962-ek/src/lm_ethernet.c +++ b/configs/lm3s8962-ek/src/lm_ethernet.c @@ -86,7 +86,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr) nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); - /* Re-format that MAC address the way that uIP expects to see it */ + /* Re-format that MAC address the way that the network expects to see it */ ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); diff --git a/configs/lm4f120-launchpad/nsh/defconfig b/configs/lm4f120-launchpad/nsh/defconfig index 8156396e3e6..61ff3481e35 100644 --- a/configs/lm4f120-launchpad/nsh/defconfig +++ b/configs/lm4f120-launchpad/nsh/defconfig @@ -327,27 +327,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lm4f120-launchpad/src/lm4f_appinit.c b/configs/lm4f120-launchpad/src/lm4f_appinit.c index b557f771f57..f667597398d 100644 --- a/configs/lm4f120-launchpad/src/lm4f_appinit.c +++ b/configs/lm4f120-launchpad/src/lm4f_appinit.c @@ -2,7 +2,7 @@ * config/lm4f120-launchpad/src/lm4f_appinit.c * arch/arm/src/board/lm4f_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -79,9 +79,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/lpc4330-xplorer/nsh/defconfig b/configs/lpc4330-xplorer/nsh/defconfig index 5250c0f226c..a6a461ba6c9 100644 --- a/configs/lpc4330-xplorer/nsh/defconfig +++ b/configs/lpc4330-xplorer/nsh/defconfig @@ -471,33 +471,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/lpc4330-xplorer/src/lpc43_appinit.c b/configs/lpc4330-xplorer/src/lpc43_appinit.c index 6377c62de57..48225e0dde4 100644 --- a/configs/lpc4330-xplorer/src/lpc43_appinit.c +++ b/configs/lpc4330-xplorer/src/lpc43_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/lpc4330-xplorer/src/lpc43_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -139,9 +139,24 @@ static int nsh_spifi_initialize(void) * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* Initialize the SPIFI block device */ diff --git a/configs/lpc4337-ws/nsh/defconfig b/configs/lpc4337-ws/nsh/defconfig index 52536d55b2b..4f36719c26f 100644 --- a/configs/lpc4337-ws/nsh/defconfig +++ b/configs/lpc4337-ws/nsh/defconfig @@ -468,33 +468,32 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART2_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/lpc4337-ws/src/lpc43_appinit.c b/configs/lpc4337-ws/src/lpc43_appinit.c index 83b8cddc1e9..976b78a4181 100644 --- a/configs/lpc4337-ws/src/lpc43_appinit.c +++ b/configs/lpc4337-ws/src/lpc43_appinit.c @@ -116,9 +116,24 @@ static void lpc43_i2ctool(void) * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* Register I2C drivers on behalf of the I2C tool */ diff --git a/configs/lpc4357-evb/nsh/defconfig b/configs/lpc4357-evb/nsh/defconfig index 68050c94d6d..e1f25c97d57 100644 --- a/configs/lpc4357-evb/nsh/defconfig +++ b/configs/lpc4357-evb/nsh/defconfig @@ -403,33 +403,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/lpc4357-evb/src/lpc43_appinit.c b/configs/lpc4357-evb/src/lpc43_appinit.c index 2555797f22c..43efc040cee 100644 --- a/configs/lpc4357-evb/src/lpc43_appinit.c +++ b/configs/lpc4357-evb/src/lpc43_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/lpc4357-evb/src/lpc43_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -139,9 +139,24 @@ static int nsh_spifi_initialize(void) * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* Initialize the SPIFI block device */ diff --git a/configs/lpc4370-link2/nsh/defconfig b/configs/lpc4370-link2/nsh/defconfig index 949db2b1e72..8a14cef0675 100644 --- a/configs/lpc4370-link2/nsh/defconfig +++ b/configs/lpc4370-link2/nsh/defconfig @@ -466,33 +466,32 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART2_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/lpc4370-link2/src/lpc43_appinit.c b/configs/lpc4370-link2/src/lpc43_appinit.c index 74fce0eb1f4..660fb2e5f7c 100644 --- a/configs/lpc4370-link2/src/lpc43_appinit.c +++ b/configs/lpc4370-link2/src/lpc43_appinit.c @@ -116,9 +116,24 @@ static void lpc43_i2ctool(void) * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* Register I2C drivers on behalf of the I2C tool */ diff --git a/configs/lpcxpresso-lpc1115/README.txt b/configs/lpcxpresso-lpc1115/README.txt index 3a0beb1e7fc..bfe29dc6d50 100644 --- a/configs/lpcxpresso-lpc1115/README.txt +++ b/configs/lpcxpresso-lpc1115/README.txt @@ -687,6 +687,86 @@ Where is one of the following: configuration. This configuration has far fewer features than the nsh configuration but is also a fraction of the size. + This minnsh configuration is a "proof-of-concept" and not very usable in + its current state. This configuration was created by disabling + everything possible INCLUDING file system support. Without file system + support, NuttX is pretty much crippled. Here are some of the + consequences of disabling the file system: + + - All features that depend on the file system are lost: device drivers, + mountpoints, message queues, named semaphores. + + - Without device drivers, you cannot interact with the RTOS using POSIX + interfaces. You would have to work with NuttX as with those other + tiny RTOSs: As a scheduler and a callable hardare abstraction layer + (HAL). + + - You cannot use any of the NuttX upper half device drivers since they + depend on the pseudo-file system and device nodes. You can, of + course, continue to use the lower half drivers either directly. Or, + perhaps, you could write some custom minnsh upper half drivers that + do not depend on a file system and expose a HAL interface. + + There is a special version of readline() the NSH uses when there is no + file system. It uses a special up_putc() to write data to the console + and a special function up_getc() to read data from the console. + + - The current up_getc() implementationsa are a kludge. They are + analogous to the up_putc() implementations: They directly poll the + hardware for serial availability, locking up all lower priority tasks + in the entire system while they poll. So a version of NSH that uses + up_getc() essentially blocks the system until a character is received. + + This, of course, could be fixed by creating a special, upper half + implementation of the interrupt-driven serial lower half (like + stm32_serial) that just supports single character console I/O + (perhaps called up_putc and up_getc?). The NSH could wait for serial + input without blocking the system. But then that would increase the + footprint too. + + So although the minnsh configurations are a good starting point for + making things small, they not are really very practical. Why might + you want a NuttX minnsh solution? Perhaps you have software that runs + on a family of chips including some very tiny MCUs. Then perhaps having + the RTOS compatibility would justify the loss of functionality? + + You can re-enable the file system and (true) serial console with + these settings: + + Enable the file system: + CONFIG_NFILE_DESCRIPTORS=5 + CONFIG_NFILE_STREAMS=5 + + Enable the console device: + CONFIG_DEV_CONSOLE=y + + Disable most new NSH commands. Some like 'ls' are really mandatory + with a file system: + CONFIG_NSH_DISABLE_xxx=y + + Enable the upper half serial driver: + CONFIG_SERIAL=y + CONFIG_STANDARD_SERIAL=y + + Enable the USART1 serial driver: + CONFIG_STM32_USART1=y + CONFIG_STM32_USART1_SERIALDRIVER=y + CONFIG_USART1_SERIAL_CONSOLE=y + + CONFIG_USART1_2STOP=0 + CONFIG_USART1_BAUD=115200 + CONFIG_USART1_BITS=8 + CONFIG_USART1_PARITY=0 + CONFIG_USART1_RXBUFSIZE=16 + CONFIG_USART1_TXBUFSIZE=16 + + With these changes, NSH should behave better and we preserve the device + driver interface. But this result in a total size increase of about + 7KB: That is about 5KB of additional OS support for the file system and + serial console PLUS about 2KB for the 'ls' command logic (including OS + support for opendir(), readdir(), closedir(), stat(), and probably other + things). + STATUS: 2015-6-10 The nuttx.bin minnsh firmware file size: diff --git a/configs/lpcxpresso-lpc1115/minnsh/defconfig b/configs/lpcxpresso-lpc1115/minnsh/defconfig index d17358614bc..58ea587ca6b 100644 --- a/configs/lpcxpresso-lpc1115/minnsh/defconfig +++ b/configs/lpcxpresso-lpc1115/minnsh/defconfig @@ -367,28 +367,28 @@ CONFIG_DISABLE_POLL=y # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lpcxpresso-lpc1115/nsh/defconfig b/configs/lpcxpresso-lpc1115/nsh/defconfig index bca4b63188b..fc7f470f6da 100644 --- a/configs/lpcxpresso-lpc1115/nsh/defconfig +++ b/configs/lpcxpresso-lpc1115/nsh/defconfig @@ -385,28 +385,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c b/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c index bbe61c493da..3ca2de59692 100644 --- a/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c +++ b/configs/lpcxpresso-lpc1115/src/lpc11_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/lpcxpresso-lpc1115/src/lpc11_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -99,14 +99,6 @@ # define CONFIG_NSH_MMCSDMINOR 0 #endif -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -117,9 +109,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD FAR struct spi_dev_s *ssp; diff --git a/configs/lpcxpresso-lpc1768/dhcpd/defconfig b/configs/lpcxpresso-lpc1768/dhcpd/defconfig index c7504dbae6c..aca1a2a69b5 100644 --- a/configs/lpcxpresso-lpc1768/dhcpd/defconfig +++ b/configs/lpcxpresso-lpc1768/dhcpd/defconfig @@ -457,28 +457,28 @@ CONFIG_ETH0_PHY_LAN8720=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lpcxpresso-lpc1768/nsh/defconfig b/configs/lpcxpresso-lpc1768/nsh/defconfig index 2726b4626c4..e5151fc9614 100644 --- a/configs/lpcxpresso-lpc1768/nsh/defconfig +++ b/configs/lpcxpresso-lpc1768/nsh/defconfig @@ -37,6 +37,7 @@ CONFIG_INTELHEX_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -121,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set CONFIG_ARMV7M_TOOLCHAIN_CODEREDL=y # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -225,6 +241,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -276,6 +293,7 @@ CONFIG_RAM_SIZE=32768 # CONFIG_ARCH_BOARD_LPCXPRESSO=y # CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set # CONFIG_ARCH_BOARD_ZKITARM is not set # CONFIG_ARCH_BOARD_CUSTOM is not set CONFIG_ARCH_BOARD="lpcxpresso-lpc1768" @@ -371,6 +389,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -386,9 +405,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -432,6 +452,8 @@ CONFIG_SPI=y # CONFIG_SPI_CMDDATA is not set # CONFIG_SPI_CALLBACK is not set # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -445,7 +467,20 @@ CONFIG_SPI=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -457,6 +492,7 @@ CONFIG_MMCSD_SPICLOCK=20000000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set CONFIG_MTD=y # @@ -479,10 +515,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -537,32 +575,28 @@ CONFIG_ETH0_PHY_LAN8720=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -738,7 +772,9 @@ CONFIG_FS_FAT=y # CONFIG_FAT_LCNAMES is not set # CONFIG_FAT_LFN is not set # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -771,6 +807,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -816,6 +856,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -823,6 +865,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -849,18 +892,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -870,18 +915,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -889,22 +935,30 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -917,8 +971,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -931,25 +985,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -968,6 +1024,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1010,6 +1067,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1042,6 +1100,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1070,6 +1129,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1084,13 +1145,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1099,5 +1159,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/lpcxpresso-lpc1768/nx/defconfig b/configs/lpcxpresso-lpc1768/nx/defconfig index bc3568b5aee..e604f2997f8 100644 --- a/configs/lpcxpresso-lpc1768/nx/defconfig +++ b/configs/lpcxpresso-lpc1768/nx/defconfig @@ -469,28 +469,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c b/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c index a9b760b87c7..0aefdd37d44 100644 --- a/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c +++ b/configs/lpcxpresso-lpc1768/src/lpc17_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/lpcxpresso-lpc1768/src/lpc17_appinit.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -120,9 +120,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD FAR struct spi_dev_s *ssp; diff --git a/configs/lpcxpresso-lpc1768/thttpd/defconfig b/configs/lpcxpresso-lpc1768/thttpd/defconfig index 5fc4662adc7..69b2148fdfc 100644 --- a/configs/lpcxpresso-lpc1768/thttpd/defconfig +++ b/configs/lpcxpresso-lpc1768/thttpd/defconfig @@ -457,28 +457,28 @@ CONFIG_ETH0_PHY_LAN8720=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/lpcxpresso-lpc1768/usbmsc/defconfig b/configs/lpcxpresso-lpc1768/usbmsc/defconfig index 8d68fff8ce0..a6d2fa0c3da 100644 --- a/configs/lpcxpresso-lpc1768/usbmsc/defconfig +++ b/configs/lpcxpresso-lpc1768/usbmsc/defconfig @@ -447,28 +447,28 @@ CONFIG_MMCSD_SPIMODE=0 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/maple/include/board.h b/configs/maple/include/board.h index 8b4da7dd35c..c45cef1005f 100644 --- a/configs/maple/include/board.h +++ b/configs/maple/include/board.h @@ -2,7 +2,7 @@ * configs/maple/include/board.h * include/arch/board/board.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Librae * @@ -94,14 +94,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ @@ -111,8 +111,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/maple/nsh/defconfig b/configs/maple/nsh/defconfig index b791dbad74a..54ebb6d22ea 100644 --- a/configs/maple/nsh/defconfig +++ b/configs/maple/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -405,13 +411,17 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -667,33 +677,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -730,7 +735,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -# CONFIG_USBDEV_TRACE_STRINGS is not set # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -860,6 +864,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -936,7 +942,6 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -972,6 +977,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/maple/nx/defconfig b/configs/maple/nx/defconfig index 3d35cb2cfc0..b60f26e071e 100644 --- a/configs/maple/nx/defconfig +++ b/configs/maple/nx/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -414,13 +420,17 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -539,7 +549,14 @@ CONFIG_NSH_MMCSDMINOR=0 # CONFIG_MAPLE_MINI=y CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -728,6 +745,7 @@ CONFIG_LCD_LANDSCAPE=y # Alphanumeric/Segment LCD Devices # # CONFIG_LCD_LCD1602 is not set +# CONFIG_LCD_BACKPACK is not set # # LED Support @@ -747,33 +765,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -810,7 +823,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -# CONFIG_USBDEV_TRACE_STRINGS is not set # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -830,8 +842,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -902,6 +914,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1044,6 +1057,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1102,6 +1117,7 @@ CONFIG_EXAMPLES_NX_DEFAULT_FONT=y CONFIG_EXAMPLES_NX_BPP=1 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 +# CONFIG_EXAMPLES_NX_EXTERNINIT is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set CONFIG_EXAMPLES_NXHELLO=y @@ -1118,6 +1134,7 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_COLORS=y # Example Font Configuration # CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y +# CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTEXT is not set @@ -1177,6 +1194,7 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/maple/src/stm32_appinit.c b/configs/maple/src/stm32_appinit.c index 37878339005..d1a7c50d22b 100644 --- a/configs/maple/src/stm32_appinit.c +++ b/configs/maple/src/stm32_appinit.c @@ -55,9 +55,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/maple/usbnsh/defconfig b/configs/maple/usbnsh/defconfig index be3bc097cb6..fe4466fd045 100644 --- a/configs/maple/usbnsh/defconfig +++ b/configs/maple/usbnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -405,13 +411,17 @@ CONFIG_STM32_JTAG_DISABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -514,7 +524,14 @@ CONFIG_NSH_MMCSDMINOR=0 # CONFIG_MAPLE_MINI=y CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -674,33 +691,28 @@ CONFIG_I2C=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -737,7 +749,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -# CONFIG_USBDEV_TRACE_STRINGS is not set # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -757,8 +768,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -886,6 +897,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -998,6 +1011,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/mbed/hidkbd/defconfig b/configs/mbed/hidkbd/defconfig index 87f20d30da4..ef889a04118 100644 --- a/configs/mbed/hidkbd/defconfig +++ b/configs/mbed/hidkbd/defconfig @@ -360,7 +360,7 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART0=y +CONFIG_UART0_SERIALDRIVER=y # # USART Configuration diff --git a/configs/mbed/nsh/defconfig b/configs/mbed/nsh/defconfig index 420f83f9917..dcfda7b8c9b 100644 --- a/configs/mbed/nsh/defconfig +++ b/configs/mbed/nsh/defconfig @@ -453,28 +453,28 @@ CONFIG_MTD=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/mbed/src/lpc17_appinit.c b/configs/mbed/src/lpc17_appinit.c index 505ae45545f..f70e811f3bb 100644 --- a/configs/mbed/src/lpc17_appinit.c +++ b/configs/mbed/src/lpc17_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/mbed/src/lpc17_appinit.c * - * Copyright (C) 2010 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -78,9 +78,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/mcu123-lpc214x/composite/defconfig b/configs/mcu123-lpc214x/composite/defconfig index 770a258ebad..73d1c5912dc 100644 --- a/configs/mcu123-lpc214x/composite/defconfig +++ b/configs/mcu123-lpc214x/composite/defconfig @@ -388,28 +388,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/mcu123-lpc214x/nsh/defconfig b/configs/mcu123-lpc214x/nsh/defconfig index ba8ec854ec2..4d7bbb44e84 100644 --- a/configs/mcu123-lpc214x/nsh/defconfig +++ b/configs/mcu123-lpc214x/nsh/defconfig @@ -385,28 +385,28 @@ CONFIG_MMCSD_SPIMODE=0 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/mcu123-lpc214x/src/lpc2148_appinit.c b/configs/mcu123-lpc214x/src/lpc2148_appinit.c index 6437d12bf57..1e840af3613 100644 --- a/configs/mcu123-lpc214x/src/lpc2148_appinit.c +++ b/configs/mcu123-lpc214x/src/lpc2148_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/mcu123-lpc214x/src/lpc2148_appinit.c * - * Copyright (C) 2008-2009 Gregory Nutt. All rights reserved. + * Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -108,9 +108,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef HAVE_MMCSD FAR struct spi_dev_s *spi; diff --git a/configs/mcu123-lpc214x/usbmsc/defconfig b/configs/mcu123-lpc214x/usbmsc/defconfig index 68b89aa1488..5d58f0bba79 100644 --- a/configs/mcu123-lpc214x/usbmsc/defconfig +++ b/configs/mcu123-lpc214x/usbmsc/defconfig @@ -387,28 +387,28 @@ CONFIG_MMCSD_SPIMODE=0 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/mcu123-lpc214x/usbserial/defconfig b/configs/mcu123-lpc214x/usbserial/defconfig index bd06293269b..e13970db02d 100644 --- a/configs/mcu123-lpc214x/usbserial/defconfig +++ b/configs/mcu123-lpc214x/usbserial/defconfig @@ -409,28 +409,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/micropendous3/hello/defconfig b/configs/micropendous3/hello/defconfig index 688b012fc2d..a1a6f7ceeca 100644 --- a/configs/micropendous3/hello/defconfig +++ b/configs/micropendous3/hello/defconfig @@ -246,12 +246,11 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_USART1=y +CONFIG_USART1_SERIALDRIVER=y # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_USART1_SERIAL_CONSOLE=y # CONFIG_NO_SERIAL_CONSOLE is not set diff --git a/configs/mikroe-stm32f4/fulldemo/defconfig b/configs/mikroe-stm32f4/fulldemo/defconfig index 0475e67b8fa..60e6ec45842 100644 --- a/configs/mikroe-stm32f4/fulldemo/defconfig +++ b/configs/mikroe-stm32f4/fulldemo/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -443,14 +449,26 @@ CONFIG_STM32_DMACAPABLE=y # ADC Configuration # CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_USART2_RXDMA is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -719,6 +737,7 @@ CONFIG_SPI_CALLBACK=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y CONFIG_RTC_ALARM=y +CONFIG_RTC_NALARMS=1 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -742,10 +761,14 @@ CONFIG_INPUT=y # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphipc LCD Settings # # CONFIG_LCD_CONSOLE is not set # CONFIG_LCD_NOGETRUN is not set @@ -774,11 +797,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -825,10 +844,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff # CONFIG_MTD_AT45DB is not set CONFIG_MTD_M25P=y CONFIG_M25P_SPIMODE=0 +CONFIG_M25P_SPIFREQUENCY=20000000 CONFIG_M25P_MANUFACTURER=0x1C CONFIG_M25P_MEMORY_TYPE=0x31 CONFIG_M25P_SUBSECTOR_ERASE=y # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set CONFIG_MTD_SMART=y # CONFIG_SMART_DEV_LOOP is not set CONFIG_MTD_SMART_SECTOR_SIZE=512 @@ -841,6 +862,7 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -852,33 +874,28 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -932,8 +949,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -1016,6 +1033,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1218,6 +1236,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1341,6 +1361,7 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # # File System Utilities # +CONFIG_FSUTILS_FLASH_ERASEALL=y # CONFIG_FSUTILS_INIFILE is not set CONFIG_FSUTILS_MKSMARTFS=y # CONFIG_FSUTILS_PASSWD is not set @@ -1373,6 +1394,7 @@ CONFIG_FSUTILS_MKSMARTFS=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1513,6 +1535,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=2048 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # @@ -1707,8 +1730,8 @@ CONFIG_MIKROE_STM32F4_CONFIGDATA_PART=y # CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set CONFIG_SYSTEM_FLASH_ERASEALL=y +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_NXPLAYER=y diff --git a/configs/mikroe-stm32f4/include/board.h b/configs/mikroe-stm32f4/include/board.h index 796b6a62b40..a985f31e504 100644 --- a/configs/mikroe-stm32f4/include/board.h +++ b/configs/mikroe-stm32f4/include/board.h @@ -2,7 +2,7 @@ * configs/mikroe-stm32f4/include/board.h * include/arch/board/board.h * - * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -154,8 +154,14 @@ * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* LED definitions ******************************************************************/ /* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any diff --git a/configs/mikroe-stm32f4/kostest/defconfig b/configs/mikroe-stm32f4/kostest/defconfig index ce0b865be0e..53c51bc66f8 100644 --- a/configs/mikroe-stm32f4/kostest/defconfig +++ b/configs/mikroe-stm32f4/kostest/defconfig @@ -81,6 +81,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -99,6 +100,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -120,6 +122,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -128,6 +131,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y CONFIG_ARM_MPU=y CONFIG_ARM_MPU_NREGIONS=8 @@ -139,6 +143,7 @@ CONFIG_ARM_MPU_NREGIONS=8 # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -245,6 +250,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -448,13 +454,17 @@ CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y # ADC Configuration # CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -722,6 +732,7 @@ CONFIG_SPI_EXCHANGE=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y CONFIG_RTC_ALARM=y +CONFIG_RTC_NALARMS=1 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -776,10 +787,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff # CONFIG_MTD_AT45DB is not set CONFIG_MTD_M25P=y CONFIG_M25P_SPIMODE=0 +CONFIG_M25P_SPIFREQUENCY=20000000 CONFIG_M25P_MANUFACTURER=0x1C CONFIG_M25P_MEMORY_TYPE=0x31 CONFIG_M25P_SUBSECTOR_ERASE=y # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set CONFIG_MTD_SMART=y # CONFIG_SMART_DEV_LOOP is not set CONFIG_MTD_SMART_SECTOR_SIZE=512 @@ -792,6 +805,7 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -803,33 +817,28 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -883,8 +892,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -1027,6 +1036,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1156,6 +1167,7 @@ CONFIG_FSUTILS_MKSMARTFS=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/mikroe-stm32f4/nsh/defconfig b/configs/mikroe-stm32f4/nsh/defconfig index b4116fb37d1..ddff8824cb2 100644 --- a/configs/mikroe-stm32f4/nsh/defconfig +++ b/configs/mikroe-stm32f4/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -435,13 +441,25 @@ CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -699,7 +717,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -744,10 +767,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff # CONFIG_MTD_AT45DB is not set CONFIG_MTD_M25P=y CONFIG_M25P_SPIMODE=0 +CONFIG_M25P_SPIFREQUENCY=20000000 CONFIG_M25P_MANUFACTURER=0x1C CONFIG_M25P_MEMORY_TYPE=0x31 CONFIG_M25P_SUBSECTOR_ERASE=y # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set CONFIG_MTD_SMART=y # CONFIG_SMART_DEV_LOOP is not set CONFIG_MTD_SMART_SECTOR_SIZE=512 @@ -760,6 +785,7 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -770,33 +796,28 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -954,6 +975,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1055,6 +1078,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # File System Utilities # +CONFIG_FSUTILS_FLASH_ERASEALL=y # CONFIG_FSUTILS_INIFILE is not set CONFIG_FSUTILS_MKSMARTFS=y # CONFIG_FSUTILS_PASSWD is not set @@ -1087,6 +1111,7 @@ CONFIG_FSUTILS_MKSMARTFS=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1206,8 +1231,8 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set CONFIG_SYSTEM_FLASH_ERASEALL=y +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/mikroe-stm32f4/nx/defconfig b/configs/mikroe-stm32f4/nx/defconfig index bdb7a11c41a..e0bd19efdd3 100644 --- a/configs/mikroe-stm32f4/nx/defconfig +++ b/configs/mikroe-stm32f4/nx/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -790,6 +796,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -936,6 +943,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1066,6 +1075,7 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/mikroe-stm32f4/nxlines/defconfig b/configs/mikroe-stm32f4/nxlines/defconfig index f1251731bbb..61f68f82d86 100644 --- a/configs/mikroe-stm32f4/nxlines/defconfig +++ b/configs/mikroe-stm32f4/nxlines/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -790,6 +796,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -935,6 +942,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1068,6 +1077,7 @@ CONFIG_EXAMPLES_NXLINES_BPP=16 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/mikroe-stm32f4/nxtext/defconfig b/configs/mikroe-stm32f4/nxtext/defconfig index 7e01d3ae991..06e3ab7ab25 100644 --- a/configs/mikroe-stm32f4/nxtext/defconfig +++ b/configs/mikroe-stm32f4/nxtext/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -790,6 +796,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -935,6 +942,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1077,6 +1086,7 @@ CONFIG_EXAMPLES_NXTEXT_DEFAULT_FONT=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/mikroe-stm32f4/src/stm32_appinit.c b/configs/mikroe-stm32f4/src/stm32_appinit.c index 4ac23362d30..9970d6927be 100644 --- a/configs/mikroe-stm32f4/src/stm32_appinit.c +++ b/configs/mikroe-stm32f4/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/mikroe_stm32f4/src/stm32_appinit.c * - * Copyright (C) 2012-2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2012-2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -147,10 +147,6 @@ # endif #endif -/**************************************************************************** - * Private Data - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -161,9 +157,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef CONFIG_STM32_SPI3 FAR struct spi_dev_s *spi; diff --git a/configs/mikroe-stm32f4/usbnsh/defconfig b/configs/mikroe-stm32f4/usbnsh/defconfig index 1549f45fa16..aff176b9df7 100644 --- a/configs/mikroe-stm32f4/usbnsh/defconfig +++ b/configs/mikroe-stm32f4/usbnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -435,13 +441,25 @@ CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -707,7 +725,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -752,10 +775,12 @@ CONFIG_RAMMTD_ERASESTATE=0xff # CONFIG_MTD_AT45DB is not set CONFIG_MTD_M25P=y CONFIG_M25P_SPIMODE=0 +CONFIG_M25P_SPIFREQUENCY=20000000 CONFIG_M25P_MANUFACTURER=0x1C CONFIG_M25P_MEMORY_TYPE=0x31 CONFIG_M25P_SUBSECTOR_ERASE=y # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set CONFIG_MTD_SMART=y # CONFIG_SMART_DEV_LOOP is not set CONFIG_MTD_SMART_SECTOR_SIZE=512 @@ -768,6 +793,7 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -779,33 +805,28 @@ CONFIG_MTD_SMART_WEAR_LEVEL=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -859,8 +880,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -1003,6 +1024,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1104,6 +1127,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # File System Utilities # +CONFIG_FSUTILS_FLASH_ERASEALL=y # CONFIG_FSUTILS_INIFILE is not set CONFIG_FSUTILS_MKSMARTFS=y # CONFIG_FSUTILS_PASSWD is not set @@ -1136,6 +1160,7 @@ CONFIG_FSUTILS_MKSMARTFS=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1256,8 +1281,8 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set CONFIG_SYSTEM_FLASH_ERASEALL=y +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/mirtoo/nsh/defconfig b/configs/mirtoo/nsh/defconfig index 168cfab8dd8..1925e947cf0 100644 --- a/configs/mirtoo/nsh/defconfig +++ b/configs/mirtoo/nsh/defconfig @@ -475,28 +475,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/mirtoo/nxffs/defconfig b/configs/mirtoo/nxffs/defconfig index ffe67df93d3..876d762db04 100644 --- a/configs/mirtoo/nxffs/defconfig +++ b/configs/mirtoo/nxffs/defconfig @@ -506,28 +506,28 @@ CONFIG_SST25_SPIFREQUENCY=20000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/mirtoo/src/pic32_appinit.c b/configs/mirtoo/src/pic32_appinit.c index 459e97b844a..9fad1495bfa 100644 --- a/configs/mirtoo/src/pic32_appinit.c +++ b/configs/mirtoo/src/pic32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/mirtoo/src/pic32_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -96,9 +96,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef HAVE_SST25 FAR struct spi_dev_s *spi; diff --git a/configs/moteino-mega/hello/defconfig b/configs/moteino-mega/hello/defconfig index 66a682dbcc3..92218c71f21 100644 --- a/configs/moteino-mega/hello/defconfig +++ b/configs/moteino-mega/hello/defconfig @@ -274,33 +274,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set diff --git a/configs/moteino-mega/nsh/defconfig b/configs/moteino-mega/nsh/defconfig index 852f653da5e..3625027ae26 100644 --- a/configs/moteino-mega/nsh/defconfig +++ b/configs/moteino-mega/nsh/defconfig @@ -282,33 +282,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/moxa/nsh/defconfig b/configs/moxa/nsh/defconfig index 20cf894fdf5..ff3598cad69 100644 --- a/configs/moxa/nsh/defconfig +++ b/configs/moxa/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set CONFIG_ARCH_CHIP_MOXART=y @@ -106,6 +108,7 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set # CONFIG_ARCH_CORTEXR4 is not set # CONFIG_ARCH_CORTEXR4F is not set # CONFIG_ARCH_CORTEXR5 is not set @@ -114,8 +117,11 @@ CONFIG_ARCH_ARM7TDMI=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="moxart" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set # CONFIG_ARM_HAVE_MPU_UNIFIED is not set # @@ -145,6 +151,7 @@ CONFIG_UART_MOXA_SHARED_IRQ=31 # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set # CONFIG_ARCH_HAVE_MPU is not set @@ -240,6 +247,7 @@ CONFIG_PREALLOC_TIMERS=4 # # Tasks and Scheduling # +# CONFIG_SPINLOCK is not set # CONFIG_INIT_NONE is not set CONFIG_INIT_ENTRYPOINT=y # CONFIG_INIT_FILEPATH is not set @@ -358,13 +366,20 @@ CONFIG_DEV_NULL=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support # +# CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -426,32 +441,28 @@ CONFIG_16550_SUPRESS_CONFIG=y CONFIG_16550_REGINCR=1 CONFIG_16550_REGWIDTH=32 CONFIG_16550_ADDRWIDTH=32 -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # CONFIG_MCU_SERIAL is not set CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -642,6 +653,11 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + # # Binary Loader # @@ -685,6 +701,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set @@ -723,6 +741,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set @@ -732,10 +751,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -745,17 +764,18 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_ROMFS is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -763,18 +783,19 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_THTTPD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # @@ -783,6 +804,11 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + # # Graphics Support # @@ -794,8 +820,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -805,14 +831,16 @@ CONFIG_EXAMPLES_NSH=y # # Network Utilities # +# CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y # CONFIG_NETUTILS_THTTPD is not set -CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_WEBCLIENT is not set # CONFIG_NETUTILS_WEBSERVER is not set # CONFIG_NETUTILS_XMLRPC is not set @@ -841,6 +869,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_ARP=y CONFIG_NSH_DISABLE_BASENAME=y # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -917,6 +946,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -964,12 +994,12 @@ CONFIG_NSH_LOGIN_FAILCOUNT=3 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -978,5 +1008,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/moxa/src/moxart_appinit.c b/configs/moxa/src/moxart_appinit.c index f33045ccf56..1b7c8114d63 100644 --- a/configs/moxa/src/moxart_appinit.c +++ b/configs/moxa/src/moxart_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/moxart/src/moxart_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Anton D. Kachalov * * Redistribution and use in source and binary forms, with or without @@ -70,9 +70,24 @@ * CONFIG_LIB_BOARDCTL=n : * Called from board_initialize(). * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifndef CONFIG_BOARD_INITIALIZE #ifdef CONFIG_NET_FTMAC100 diff --git a/configs/mx1ads/ostest/defconfig b/configs/mx1ads/ostest/defconfig index 73b264ce0cf..0740d2a158b 100644 --- a/configs/mx1ads/ostest/defconfig +++ b/configs/mx1ads/ostest/defconfig @@ -320,27 +320,27 @@ CONFIG_SPI=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ne64badge/src/m9s12_appinit.c b/configs/ne64badge/src/m9s12_appinit.c index ba61f1eaf3c..1550f5d519e 100644 --- a/configs/ne64badge/src/m9s12_appinit.c +++ b/configs/ne64badge/src/m9s12_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/ne64badge/src/m9s12_appinit.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -61,9 +61,24 @@ * Description: * Perform architecture specific initialization * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* Configure SPI-based devices */ diff --git a/configs/ntosd-dm320/nettest/defconfig b/configs/ntosd-dm320/nettest/defconfig index 2cc06a37a6d..9b287554506 100644 --- a/configs/ntosd-dm320/nettest/defconfig +++ b/configs/ntosd-dm320/nettest/defconfig @@ -370,28 +370,28 @@ CONFIG_DM9X_MODE_AUTO=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ntosd-dm320/nsh/defconfig b/configs/ntosd-dm320/nsh/defconfig index c295c303a2c..3d30d84415e 100644 --- a/configs/ntosd-dm320/nsh/defconfig +++ b/configs/ntosd-dm320/nsh/defconfig @@ -37,6 +37,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" CONFIG_ARCH_CHIP_DM320=y # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_DM320=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set CONFIG_ARCH_ARM926EJS=y @@ -104,10 +108,21 @@ CONFIG_ARCH_ARM926EJS=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="arm" CONFIG_ARCH_CHIP="dm320" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set CONFIG_ARCH_HAVE_LOWVECTORS=y # CONFIG_ARCH_LOWVECTORS is not set # CONFIG_ARCH_ROMPGTABLE is not set @@ -141,6 +156,7 @@ CONFIG_DM320_UART1=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y CONFIG_ARCH_HAVE_MMU=y # CONFIG_ARCH_HAVE_MPU is not set @@ -284,9 +300,10 @@ CONFIG_SIG_SIGUSR1=1 CONFIG_SIG_SIGUSR2=2 CONFIG_SIG_SIGALARM=3 CONFIG_SIG_SIGCONDTIMEDOUT=16 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -335,7 +352,20 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -344,6 +374,7 @@ CONFIG_MMCSD_MMCSUPPORT=y CONFIG_MMCSD_HAVECARDDETECT=y # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -389,32 +420,28 @@ CONFIG_DM9X_MODE_AUTO=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -603,7 +630,9 @@ CONFIG_FS_FAT=y # CONFIG_FAT_LCNAMES is not set # CONFIG_FAT_LFN is not set # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set CONFIG_FS_ROMFS=y @@ -637,6 +666,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -682,6 +715,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -689,6 +724,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -715,18 +751,21 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_LEDS is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -736,18 +775,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_ROMFS is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -756,6 +796,7 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_THTTPD is not set @@ -763,17 +804,22 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -786,8 +832,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -800,25 +846,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -837,6 +885,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -879,6 +928,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -924,6 +974,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -950,6 +1001,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -964,13 +1017,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -979,5 +1031,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/ntosd-dm320/poll/defconfig b/configs/ntosd-dm320/poll/defconfig index cd4a2b6caf4..82d918604f1 100644 --- a/configs/ntosd-dm320/poll/defconfig +++ b/configs/ntosd-dm320/poll/defconfig @@ -368,28 +368,28 @@ CONFIG_DM9X_MODE_AUTO=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ntosd-dm320/thttpd/defconfig b/configs/ntosd-dm320/thttpd/defconfig index beca63893fd..55c20c37906 100644 --- a/configs/ntosd-dm320/thttpd/defconfig +++ b/configs/ntosd-dm320/thttpd/defconfig @@ -361,28 +361,28 @@ CONFIG_DM9X_MODE_AUTO=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ntosd-dm320/udp/defconfig b/configs/ntosd-dm320/udp/defconfig index aaf9d91370c..906bc57eabd 100644 --- a/configs/ntosd-dm320/udp/defconfig +++ b/configs/ntosd-dm320/udp/defconfig @@ -341,27 +341,27 @@ CONFIG_DM9X_MODE_AUTO=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ntosd-dm320/webserver/defconfig b/configs/ntosd-dm320/webserver/defconfig index 1ddee5d5599..7173e675610 100644 --- a/configs/ntosd-dm320/webserver/defconfig +++ b/configs/ntosd-dm320/webserver/defconfig @@ -375,28 +375,28 @@ CONFIG_DM9X_MODE_AUTO=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/nucleo-144/Kconfig b/configs/nucleo-144/Kconfig index 57585efaff0..96427a9a5e2 100644 --- a/configs/nucleo-144/Kconfig +++ b/configs/nucleo-144/Kconfig @@ -5,4 +5,219 @@ if ARCH_BOARD_NUCLEO_144 +choice + prompt "Select Console wiring." + default NUCLEO_ARDUINO + ---help--- + Select where you will connect the console. + + Virtual COM Port: + + Advantage: Use the ST-Link as a console. No Extra wiring + neded. + + Disdvantage: Not the best choice for initanl bring up. + + ARDUINO Connector: + + Advantage: You have a shield so it is + easy. + + Disdvantage: You loose the use of the + other functions on PC6, PC7 + + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ---- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- --- + + OR + + Morpho Connector: + + STM32F7 + MORPHO FUNCTION GPIO + -------- --------- ----- + CN12-64 USART8_RX PE0 + CN11-61 USART8_TX PE1 + -------- --------- ----- + +config NUCLEO_CONSOLE_ARDUINO + bool "ARDUINO Connector" + select STM32F7_USART6 + select USART6_SERIALDRIVER + select USART6_SERIAL_CONSOLE + +config NUCLEO_CONSOLE_VIRTUAL + bool "Virtual Comport" + select STM32F7_USART3 + select USART3_SERIALDRIVER + select USART3_SERIAL_CONSOLE + +config NUCLEO_CONSOLE_MORPHO + bool "Morpho Connector" + select STM32F7_UART8 + select UART8_SERIALDRIVER + select UART8_SERIAL_CONSOLE + +config NUCLEO_CONSOLE_NONE + bool "No Console" + +endchoice # "Select Console wiring" + +config NUCLEO_SPI_TEST + bool "Enable SPI test" + default n + ---help--- + Enable Spi test - initalize and configure SPI to send + NUCLEO_SPI_TEST_MESSAGE text. The text is sent on the + selected SPI Buses with the configured parameters. + Note the CS lines will not be asserted. + +if NUCLEO_SPI_TEST + +config NUCLEO_SPI_TEST_MESSAGE + string "Text to Send on SPI Bus(es)" + default "Hello World" + depends on NUCLEO_SPI_TEST + ---help--- + Text to sent on SPI bus(es) + +config NUCLEO_SPI1_TEST + bool "Test SPI bus 1" + default n + depends on NUCLEO_SPI_TEST + ---help--- + Enable Spi test - on SPI BUS 1 + +if NUCLEO_SPI1_TEST + +config NUCLEO_SPI1_TEST_FREQ + int "SPI 1 Clock Freq in Hz" + default 1000000 + depends on NUCLEO_SPI1_TEST + ---help--- + Sets SPI 1 Clock Freq + +config NUCLEO_SPI1_TEST_BITS + int "SPI 1 number of bits" + default 8 + depends on NUCLEO_SPI1_TEST + ---help--- + Sets SPI 1 bit length + +choice + prompt "SPI BUS 1 Clock Mode" + default NUCLEO_SPI1_TEST_MODE3 + ---help--- + Sets SPI 1 clock mode + +config NUCLEO_SPI1_TEST_MODE0 + bool "CPOL=0 CHPHA=0" + +config NUCLEO_SPI1_TEST_MODE1 + bool "CPOL=0 CHPHA=1" + +config NUCLEO_SPI1_TEST_MODE2 + bool "CPOL=1 CHPHA=0" + +config NUCLEO_SPI1_TEST_MODE3 + bool "CPOL=1 CHPHA=1" + +endchoice # "SPI BUS 1 Clock Mode" + +endif # NUCLEO_SPI1_TEST + +config NUCLEO_SPI2_TEST + bool "Test SPI bus 2" + default n + depends on NUCLEO_SPI_TEST + ---help--- + Enable Spi test - on SPI BUS 2 + +if NUCLEO_SPI2_TEST + +config NUCLEO_SPI2_TEST_FREQ + int "SPI 2 Clock Freq in Hz" + default 12000000 + depends on NUCLEO_SPI2_TEST + ---help--- + Sets SPI 2 Clock Freq + +config NUCLEO_SPI2_TEST_BITS + int "SPI 2 number of bits" + default 8 + depends on NUCLEO_SPI2_TEST + ---help--- + Sets SPI 2 bit length + +choice + prompt "SPI BUS 2 Clock Mode" + default NUCLEO_SPI2_TEST_MODE3 + ---help--- + Sets SPI 2 clock mode + +config NUCLEO_SPI2_TEST_MODE0 + bool "CPOL=0 CHPHA=0" + +config NUCLEO_SPI2_TEST_MODE1 + bool "CPOL=0 CHPHA=1" + +config NUCLEO_SPI2_TEST_MODE2 + bool "CPOL=1 CHPHA=0" + +config NUCLEO_SPI2_TEST_MODE3 + bool "CPOL=1 CHPHA=1" + +endchoice # "SPI BUS 2 Clock Mode" + +endif # NUCLEO_SPI2_TEST + +config NUCLEO_SPI3_TEST + bool "Test SPI bus 3" + default n + depends on NUCLEO_SPI_TEST + ---help--- + Enable Spi test - on SPI BUS 3 + +if NUCLEO_SPI3_TEST + +config NUCLEO_SPI3_TEST_FREQ + int "SPI 3 Clock Freq in Hz" + default 40000000 + depends on NUCLEO_SPI3_TEST + ---help--- + Sets SPI 3 Clock Freq + +config NUCLEO_SPI3_TEST_BITS + int "SPI 3 number of bits" + default 8 + depends on NUCLEO_SPI3_TEST + ---help--- + Sets SPI 3 bit length + +choice + prompt "SPI BUS 3 Clock Mode" + default NUCLEO_SPI3_TEST_MODE3 + ---help--- + Sets SPI 3 clock mode + +config NUCLEO_SPI3_TEST_MODE0 + bool "CPOL=0 CHPHA=0" + +config NUCLEO_SPI3_TEST_MODE1 + bool "CPOL=0 CHPHA=1" + +config NUCLEO_SPI3_TEST_MODE2 + bool "CPOL=1 CHPHA=0" + +config NUCLEO_SPI3_TEST_MODE3 + bool "CPOL=1 CHPHA=1" + +endchoice # "SPI BUS 3 Clock Mode" + +endif # NUCLEO_SPI3_TEST +endif # NUCLEO_SPI_TEST endif # ARCH_BOARD_NUCLEO_144 diff --git a/configs/nucleo-144/README.txt b/configs/nucleo-144/README.txt index 77ca0f01707..1a5d6f4b3b6 100644 --- a/configs/nucleo-144/README.txt +++ b/configs/nucleo-144/README.txt @@ -11,6 +11,7 @@ Contents - Nucleo-144 Boards - Nucleo F746ZG + - Nucleo F767ZI - Development Environment - IDEs - Basic configuaration & build steps @@ -18,7 +19,11 @@ Contents - Button - LED - U[S]ARTs and Serial Consoles + - SPI + - SDIO - MMC - Configurations + f7xx-nsh + f7xx-evalos Nucleo-144 Boards: ================= @@ -63,7 +68,7 @@ Common Board Features: Nucleo F746ZG ============= -At present only the ST Nucleo F746ZG board from ST Micro is supported. See +ST Nucleo F746ZG board from ST Micro is supported. See http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f746zg.html @@ -80,7 +85,7 @@ NUCLEO-F746ZG Features: + 16KB of instruction TCM RAM + 4KB of backup SRAM ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in triple interleaved mode - DMA: 16-stream DMA controllers with FIFOs and burst support + DMA: 2 X 16-stream DMA controllers with FIFOs and burst support Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower), two 32-bit timers, 2x watchdogs, SysTick GPIO: 114 I/O ports with interrupt capability @@ -105,9 +110,58 @@ NUCLEO-F746ZG Features: TRG: True random number generator RTC -See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG form additional +See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG for additional information about this board. +Nucleo F767ZI +============= + +ST Nucleo F7467ZI board from ST Micro is supported. See + +http://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-eval-tools/stm32-mcu-eval-tools/stm32-mcu-nucleo/nucleo-f767zi.html + +The Nucleo F767ZI order part number is NUCLEO-F767ZI. It is one member of +the STM32 Nucleo-144 board family. + +NUCLEO-F767ZI Features: +---------------------- + + Microprocessor: STM32F767ZIT6 Core: ARM 32-bit Cortex®-M7 CPU with DPFPU, + L1-cache: 16KB data cache and 16KB instruction cache, up to + 216 MHz, MPU, and DSP instructions. + Memory: 2048 KB Flash 512KB of SRAM (including 128KB of data TCM RAM) + + 16KB of instruction TCM RAM + 4KB of backup SRAM + ADC: 3×12-bit, 2.4 MSPS ADC: up to 24 channels and 7.2 MSPS in + triple interleaved mode + DMA: 2 X 16-stream DMA controllers with FIFOs and burst support + Timers: Up to 18 timers: up to thirteen 16-bit (1x 16-bit lowpower), + two 32-bit timers, 2x watchdogs, SysTick + GPIO: 114 I/O ports with interrupt capability + LCD: LCD-TFT Controllerwith (DMA2D), Parallel interface + I2C: 4 × I2C interfaces (SMBus/PMBus) + U[S]ARTs: 4 USARTs, 4 UARTs (27 Mbit/s, ISO7816 interface, LIN, IrDA, + modem control) + SPI/12Ss: 6/3 (simplex) (up to 50 Mbit/s), 3 with muxed simplex I2S + for audio class accuracy via internal audio PLL or external + clock + QSPI: Dual mode Quad-SPI + SAIs: 2 Serial Audio Interfaces + CAN: 3 X CAN interface + SDMMC interface + SPDIFRX interface + USB: USB 2.0 full/High-speed device/host/OTG controller with on-chip + PHY + 10/100 Ethernet: MAC with dedicated DMA: supports IEEE 1588v2 hardware, + MII/RMII + Camera Interface: 8/14 Bit + CRC calculation unit + TRG: True random number generator + RTC subsecond accuracy, hardware calendar + +As of this writting the NUCLEO-F767ZI is not available on developer.mbed.org +However, See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG for additional +useful information. + Development Environment ======================= @@ -154,8 +208,8 @@ Basic configuration & build steps Hardware ======== - GPIO - there are 144 I/O lines on the STM32F746ZGT6 with various pins pined out - on the Nucleo F746ZG. + GPIO - there are 144 I/O lines on the STM32F7xxZxT6 with various pins pined out + on the Nucleo 144. See https://developer.mbed.org/platforms/ST-Nucleo-F746ZG/ for slick graphic pinouts. @@ -168,19 +222,47 @@ Hardware Our main concern is establishing a console and LED utilization for debugging. Because so many pins can be multiplexed with so many functions, - the above mentioned graphic is super helpful in indentifying a serial port - that will not rob us of another IO feature. Namely Serial Port 8 (UART8) - with TX on PE1 and RX on PE0. Of course if your design has used those - pins you can choose another IO configuration to bring out Serial Port 8 - or choose a completely different U[S]ART to use as the console. - In that Case, You will need to edit the include/board.h to select different - U[S]ART and / or pin selections. + the above mentioned graphic may be helpful in indentifying a serial port. - Serial - ------ + There are 4 choices that can be made from the menuconfig: - SERIAL_RX PE_0 - SERIAL_TX PE_1 + CONFIG_NUCLEO_CONSOLE_ARDUINO or CONFIG_NUCLEO_CONSOLE_MORPHO or + CONFIG_NUCLEO_CONSOLE_VIRTUAL or CONFIG_NUCLEO_CONSOLE_NONE + + The CONFIG_NUCLEO_CONSOLE_NONE makes no preset for the console. YOu shuld still visit + the U[S]ART selection and Device Drivers to disable any U[S]ART reamaing. + + The CONFIG_NUCLEO_CONSOLE_ARDUINO configurations assume that you are using a + standard Arduio RS-232 shield with the serial interface with RX on pin D0 and + TX on pin D1 from USART6: + + -------- --------------- + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ----- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- ----- + + The CONFIG_NUCLEO_CONSOLE_MORPHO configurations uses Serial Port 8 (USART8) + with TX on PE1 and RX on PE0. + Serial + ------ + SERIAL_RX PE_0 + SERIAL_TX PE_1 + + The CONFIG_NUCLEO_CONSOLE_VIRTUAL configurations uses Serial Port 3 (USART3) + with TX on PD8 and RX on PD9. + Serial + ------ + SERIAL_RX PD9 + SERIAL_TX PD8 + + These signals are internalaly connected to the on board ST-Link + + Of course if your design has used those pins you can choose a completely + different U[S]ART to use as the console. In that Case, you will need to edit + the include/board.h to select different U[S]ART and / or pin selections. Buttons ------- @@ -202,32 +284,36 @@ Hardware include/board.h and src/stm32_autoleds.c. The LEDs are used to encode OS related events as follows when the LEDs are available: - SYMBOL Meaning RED GREEN BLUE - ------------------- ----------------------- ----------- + SYMBOL Meaning RED GREEN BLUE + ------------------- ----------------------- --- ----- ---- - LED_STARTED 0 OFF OFF OFF - LED_HEAPALLOCATE 0 OFF OFF OFF - LED_IRQSENABLED 0 OFF OFF OFF - LED_STACKCREATED 1 OFF ON OFF - LED_INIRQ 2 NC NC ON (momentary) - LED_SIGNAL 2 NC NC ON (momentary) - LED_ASSERTION 3 ON NC NC (momentary) - LED_PANIC 4 ON OFF OFF (flashing 2Hz) + LED_STARTED NuttX has been started OFF OFF OFF + LED_HEAPALLOCATE Heap has been allocated OFF OFF ON + LED_IRQSENABLED Interrupts enabled OFF ON OFF + LED_STACKCREATED Idle stack created OFF ON ON + LED_INIRQ In an interrupt NC NC ON (momentary) + LED_SIGNAL In a signal handler NC ON OFF (momentary) + LED_ASSERTION An assertion failed ON NC ON (momentary) + LED_PANIC The system has crashed ON OFF OFF (flashing 2Hz) + LED_IDLE MCU is is sleep mode ON OFF OFF -OFF - means that the OS is still initializing. Initialization is very fast so - if you see this at all, it probably means that the system is hanging up - somewhere in the initialization phases. -GREEN - This means that the OS completed initialization. +OFF - means that the OS is still initializing. Initialization is very fast + so if you see this at all, it probably means that the system is + hanging up somewhere in the initialization phases. -BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is - illuminated and extinguished when the interrupt or signal handler exits. +GREEN - This means that the OS completed initialization. -RED - If a recovered assertion occurs, the RED LED will be illuminated - briefly while the assertion is handled. You will probably never see this. +BLUE - Whenever and interrupt or signal handler is entered, the BLUE LED is + illuminated and extinguished when the interrupt or signal handler + exits. + +VIOLET - If a recovered assertion occurs, the RED and blue LED will be + illuminated briefly while the assertion is handled. You will + probably never see this. Flashing RED - In the event of a fatal crash, all other LEDs will be -extinguished and RED LED will FLASH at a 2Hz rate. + extinguished and RED LED will FLASH at a 2Hz rate. Thus if the GREEN LED is lit, NuttX has successfully booted and is, @@ -238,30 +324,67 @@ extinguished and RED LED will FLASH at a 2Hz rate. Serial Consoles =============== - USART8 + USART6 (CONFIG_NUCLEO_CONSOLE_ARDUINO) ------ - Pins and Connectors: - GPIO Connector NAME - RXD: PE0 CN11 pin 64, PE0 - CN10 pin 33, D34 - - TXD: PE1 CN11 pin 61, PE1 + STM32F7 + ARDUIONO FUNCTION GPIO + -- ----- --------- ----- + DO RX USART6_RX PG9 + D1 TX USART6_TX PG14 + -- ----- --------- ----- You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL Nucleo 144 FTDI TTL-232R-3V3 - ----------- ------------ - TXD - CN11 pin 64 - RXD - Pin 5 (Yellow) - RXD - CN11 pin 61 - TXD - Pin 4 (Orange) - GND CN11 pin 63 GND Pin 1 (Black) + ------------- ------------------- + TXD - D1-TXD - RXD - Pin 5 (Yellow) + RXD - D0-RXD - TXD - Pin 4 (Orange) + GND GND - GND Pin 1 (Black) + ------------- ------------------- + + *Note you will be reverse RX/TX + + Use make menuconfig to configure USART6 as the console: + + CONFIG_STM32F7_USART6=y + CONFIG_USARTs_SERIALDRIVER=y + CONFIG_USARTS_SERIAL_CONSOLE=y + CONFIG_USART6_RXBUFSIZE=256 + CONFIG_USART6_TXBUFSIZE=256 + CONFIG_USART6_BAUD=115200 + CONFIG_USART6_BITS=8 + CONFIG_USART6_PARITY=0 + CONFIG_USART6_2STOP=0 + + USART8 (CONFIG_NUCLEO_CONSOLE_MORPHO) + ------ + + Pins and Connectors: + FUNC GPIO Connector + Pin NAME + ---- --- ------- ---- + TXD: PE1 CN11-61, PE1 + RXD: PE0 CN12-64, PE0 + CN10-33, D34 + ---- --- ------- ---- + + + You must use a 3.3 TTL to RS-232 converter or a USB to 3.3V TTL + + Nucleo 144 FTDI TTL-232R-3V3 + ------------- ------------------- + TXD - CN11-61 - RXD - Pin 5 (Yellow) + RXD - CN12-64 - TXD - Pin 4 (Orange) + GND CN12-63 - GND Pin 1 (Black) + ------------- ------------------- *Note you will be reverse RX/TX Use make menuconfig to configure USART8 as the console: CONFIG_STM32F7_UART8=y - CONFIG_USART8_ISUART=y - CONFIG_USART8_SERIAL_CONSOLE=y + CONFIG_UART8_SERIALDRIVER=y + CONFIG_UART8_SERIAL_CONSOLE=y CONFIG_UART8_RXBUFSIZE=256 CONFIG_UART8_TXBUFSIZE=256 CONFIG_UART8_BAUD=115200 @@ -269,7 +392,7 @@ Serial Consoles CONFIG_UART8_PARITY=0 CONFIG_UART8_2STOP=0 - Virtual COM Port + Virtual COM Port (CONFIG_NUCLEO_CONSOLE_VIRTUAL) ---------------- Yet another option is to use USART3 and the USB virtual COM port. This option may be more convenient for long term development, but is painful @@ -290,14 +413,38 @@ Serial Consoles As shipped, SB4 and SB7 are open and SB5 and SB6 closed, so the virtual COM port is enabled. + +SPI +--- + Since this board is so generic, having a quick way to vet the SPI + configuration seams in order. So the board provides a quick test + that can be selected vi CONFIG_NUCLEO_SPI_TEST that will initalise + the selected buses (SPI1-SPI3) and send some text on the bus at + application initalization time board_app_initialize. + +SDIO +---- + To test the SD performace one can use a SparkFun microSD Sniffer + from https://www.sparkfun.com/products/9419 or similar board + and connect it as follows: + + VCC V3.3 CN11 16 + GND GND CN11-8 + CMD PD2 CN11-4 + CLK PC12 CN11-3 + DAT0 - PC8 CN12-2 + DAT1 - PC9 CN12-1 + DAT2 PC10 CN11-1 + CD PC11 CN11-2 + Configurations ============== -nsh: +f7xx-nsh: ---- Configures the NuttShell (nsh) located at apps/examples/nsh for the Nucleo-144 boards. The Configuration enables the serial interfaces - on UART6. Support for builtin applications is enabled, but in the base + on USART6. Support for builtin applications is enabled, but in the base configuration no builtin applications are selected (see NOTES below). NOTES: @@ -333,7 +480,7 @@ nsh: device configured for UART8 (see instruction above under "Serial Consoles). -evalos: +f7xx-evalos: ------- This configuration is designed to test the features of the board. - Configures the NuttShell (nsh) located at apps/examples/nsh for the diff --git a/configs/nucleo-144/f746-evalos/Make.defs b/configs/nucleo-144/f746-evalos/Make.defs new file mode 100644 index 00000000000..62c52e12f47 --- /dev/null +++ b/configs/nucleo-144/f746-evalos/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/nucleo-144/f746-evalos/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Authors: Gregory Nutt +# Mark Olsson +# David Sidrane +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = f746-flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/nucleo-144/evalos/defconfig b/configs/nucleo-144/f746-evalos/defconfig similarity index 77% rename from configs/nucleo-144/evalos/defconfig rename to configs/nucleo-144/f746-evalos/defconfig index 70b6f0d06e4..4c63ce773c0 100644 --- a/configs/nucleo-144/evalos/defconfig +++ b/configs/nucleo-144/f746-evalos/defconfig @@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y # Binary Output Formats # # CONFIG_RRLOAD_BINARY is not set -CONFIG_INTELHEX_BINARY=y +# CONFIG_INTELHEX_BINARY is not set # CONFIG_MOTOROLA_SREC is not set CONFIG_RAW_BINARY=y # CONFIG_UBOOT_UIMAGE is not set @@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y # CONFIG_DEBUG is not set CONFIG_ARCH_HAVE_HEAPCHECK=y CONFIG_ARCH_HAVE_STACKCHECK=y -# CONFIG_STACK_COLORATION is not set +CONFIG_STACK_COLORATION=y CONFIG_DEBUG_SYMBOLS=y CONFIG_ARCH_HAVE_CUSTOMOPT=y CONFIG_DEBUG_NOOPT=y @@ -124,7 +124,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set CONFIG_ARCH_HAVE_FPU=y -CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y @@ -152,23 +152,117 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARMV7M_ITMSYSLOG is not set # CONFIG_SERIAL_TERMIOS is not set # CONFIG_USART3_RS485 is not set -# CONFIG_SERIAL_DISABLE_REORDERING is not set +CONFIG_SERIAL_DISABLE_REORDERING=y # # STM32 F7 Configuration Options # -# CONFIG_ARCH_CHIP_STM32F745 is not set -CONFIG_ARCH_CHIP_STM32F746=y -# CONFIG_ARCH_CHIP_STM32F756 is not set +# CONFIG_ARCH_CHIP_STM32F745VG is not set +# CONFIG_ARCH_CHIP_STM32F745VE is not set +# CONFIG_ARCH_CHIP_STM32F745IG is not set +# CONFIG_ARCH_CHIP_STM32F745IE is not set +# CONFIG_ARCH_CHIP_STM32F745ZE is not set +# CONFIG_ARCH_CHIP_STM32F745ZG is not set +# CONFIG_ARCH_CHIP_STM32F746BG is not set +# CONFIG_ARCH_CHIP_STM32F746VG is not set +# CONFIG_ARCH_CHIP_STM32F746VE is not set +# CONFIG_ARCH_CHIP_STM32F746BE is not set +CONFIG_ARCH_CHIP_STM32F746ZG=y +# CONFIG_ARCH_CHIP_STM32F746IE is not set +# CONFIG_ARCH_CHIP_STM32F746NG is not set +# CONFIG_ARCH_CHIP_STM32F746NE is not set +# CONFIG_ARCH_CHIP_STM32F746ZE is not set +# CONFIG_ARCH_CHIP_STM32F746IG is not set +# CONFIG_ARCH_CHIP_STM32F756NG is not set +# CONFIG_ARCH_CHIP_STM32F756BG is not set +# CONFIG_ARCH_CHIP_STM32F756IG is not set +# CONFIG_ARCH_CHIP_STM32F756VG is not set +# CONFIG_ARCH_CHIP_STM32F756ZG is not set +# CONFIG_ARCH_CHIP_STM32F765NI is not set +# CONFIG_ARCH_CHIP_STM32F765VI is not set +# CONFIG_ARCH_CHIP_STM32F765VG is not set +# CONFIG_ARCH_CHIP_STM32F765BI is not set +# CONFIG_ARCH_CHIP_STM32F765NG is not set +# CONFIG_ARCH_CHIP_STM32F765ZG is not set +# CONFIG_ARCH_CHIP_STM32F765ZI is not set +# CONFIG_ARCH_CHIP_STM32F765IG is not set +# CONFIG_ARCH_CHIP_STM32F765BG is not set +# CONFIG_ARCH_CHIP_STM32F765II is not set +# CONFIG_ARCH_CHIP_STM32F767NG is not set +# CONFIG_ARCH_CHIP_STM32F767IG is not set +# CONFIG_ARCH_CHIP_STM32F767VG is not set +# CONFIG_ARCH_CHIP_STM32F767ZG is not set +# CONFIG_ARCH_CHIP_STM32F767NI is not set +# CONFIG_ARCH_CHIP_STM32F767VI is not set +# CONFIG_ARCH_CHIP_STM32F767BG is not set +# CONFIG_ARCH_CHIP_STM32F767ZI is not set +# CONFIG_ARCH_CHIP_STM32F767II is not set +# CONFIG_ARCH_CHIP_STM32F769BI is not set +# CONFIG_ARCH_CHIP_STM32F769II is not set +# CONFIG_ARCH_CHIP_STM32F769BG is not set +# CONFIG_ARCH_CHIP_STM32F769NI is not set +# CONFIG_ARCH_CHIP_STM32F769AI is not set +# CONFIG_ARCH_CHIP_STM32F769NG is not set +# CONFIG_ARCH_CHIP_STM32F769IG is not set +# CONFIG_ARCH_CHIP_STM32F777ZI is not set +# CONFIG_ARCH_CHIP_STM32F777VI is not set +# CONFIG_ARCH_CHIP_STM32F777NI is not set +# CONFIG_ARCH_CHIP_STM32F777BI is not set +# CONFIG_ARCH_CHIP_STM32F777II is not set +# CONFIG_ARCH_CHIP_STM32F778AI is not set +# CONFIG_ARCH_CHIP_STM32F779II is not set +# CONFIG_ARCH_CHIP_STM32F779NI is not set +# CONFIG_ARCH_CHIP_STM32F779BI is not set +# CONFIG_ARCH_CHIP_STM32F779AI is not set CONFIG_STM32F7_STM32F74XX=y # CONFIG_STM32F7_STM32F75XX is not set -# CONFIG_STM32F7_FLASH_512KB is not set -CONFIG_STM32F7_FLASH_1024KB=y +# CONFIG_STM32F7_STM32F76XX is not set +# CONFIG_STM32F7_STM32F77XX is not set +# CONFIG_STM32F7_IO_CONFIG_V is not set +# CONFIG_STM32F7_IO_CONFIG_I is not set +CONFIG_STM32F7_IO_CONFIG_Z=y +# CONFIG_STM32F7_IO_CONFIG_N is not set +# CONFIG_STM32F7_IO_CONFIG_B is not set +# CONFIG_STM32F7_IO_CONFIG_A is not set +# CONFIG_STM32F7_STM32F745XX is not set +CONFIG_STM32F7_STM32F746XX=y +# CONFIG_STM32F7_STM32F756XX is not set +# CONFIG_STM32F7_STM32F765XX is not set +# CONFIG_STM32F7_STM32F767XX is not set +# CONFIG_STM32F7_STM32F768XX is not set +# CONFIG_STM32F7_STM32F768AX is not set +# CONFIG_STM32F7_STM32F769XX is not set +# CONFIG_STM32F7_STM32F769AX is not set +# CONFIG_STM32F7_STM32F777XX is not set +# CONFIG_STM32F7_STM32F778XX is not set +# CONFIG_STM32F7_STM32F778AX is not set +# CONFIG_STM32F7_STM32F779XX is not set +# CONFIG_STM32F7_STM32F779AX is not set +# CONFIG_STM32F7_FLASH_CONFIG_E is not set +# CONFIG_STM32F7_FLASH_CONFIG_I is not set +CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y +# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set # # STM32 Peripheral Support # CONFIG_STM32F7_HAVE_LTDC=y +CONFIG_STM32F7_HAVE_FSMC=y +CONFIG_STM32F7_HAVE_ETHRNET=y +CONFIG_STM32F7_HAVE_RNG=y +CONFIG_STM32F7_HAVE_SPI5=y +CONFIG_STM32F7_HAVE_SPI6=y +# CONFIG_STM32F7_HAVE_SDMMC2 is not set +# CONFIG_STM32F7_HAVE_CAN3 is not set +CONFIG_STM32F7_HAVE_DCMI=y +# CONFIG_STM32F7_HAVE_DSIHOST is not set +CONFIG_STM32F7_HAVE_DMA2D=y +# CONFIG_STM32F7_HAVE_JPEG is not set +# CONFIG_STM32F7_HAVE_CRYP is not set +# CONFIG_STM32F7_HAVE_HASH is not set +# CONFIG_STM32F7_HAVE_DFSDM1 is not set # CONFIG_STM32F7_ADC is not set # CONFIG_STM32F7_CAN is not set # CONFIG_STM32F7_DAC is not set @@ -185,12 +279,12 @@ CONFIG_STM32F7_USART=y # CONFIG_STM32F7_CAN2 is not set # CONFIG_STM32F7_CEC is not set # CONFIG_STM32F7_CRC is not set -# CONFIG_STM32F7_CRYP is not set # CONFIG_STM32F7_DMA1 is not set # CONFIG_STM32F7_DMA2 is not set # CONFIG_STM32F7_DAC1 is not set # CONFIG_STM32F7_DAC2 is not set # CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_DMA2D is not set # CONFIG_STM32F7_ETHMAC is not set # CONFIG_STM32F7_FSMC is not set # CONFIG_STM32F7_I2C1 is not set @@ -198,12 +292,11 @@ CONFIG_STM32F7_USART=y # CONFIG_STM32F7_I2C3 is not set # CONFIG_STM32F7_LPTIM1 is not set # CONFIG_STM32F7_LTDC is not set -# CONFIG_STM32F7_DMA2D is not set # CONFIG_STM32F7_OTGFS is not set # CONFIG_STM32F7_OTGHS is not set # CONFIG_STM32F7_QUADSPI is not set -# CONFIG_STM32F7_SAI1 is not set # CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI1 is not set # CONFIG_STM32F7_SAI2 is not set # CONFIG_STM32F7_SDMMC1 is not set # CONFIG_STM32F7_SPDIFRX is not set @@ -242,8 +335,9 @@ CONFIG_STM32F7_USART3=y # # U[S]ART Configuration # -# CONFIG_STM32F7_FLOWCONTROL_BROKEN is not set -# CONFIG_STM32F7_USART_BREAKS is not set +CONFIG_STM32F7_FLOWCONTROL_BROKEN=y +CONFIG_STM32F7_USART_BREAKS=y +CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set # @@ -308,7 +402,6 @@ CONFIG_RAM_SIZE=245760 # Board Selection # CONFIG_ARCH_BOARD_NUCLEO_144=y -# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set # CONFIG_ARCH_BOARD_CUSTOM is not set CONFIG_ARCH_BOARD="nucleo-144" @@ -326,6 +419,11 @@ CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # +# CONFIG_NUCLEO_CONSOLE_ARDUINO is not set +CONFIG_NUCLEO_CONSOLE_VIRTUAL=y +# CONFIG_NUCLEO_CONSOLE_MORPHO is not set +# CONFIG_NUCLEO_CONSOLE_NONE is not set +# CONFIG_NUCLEO_SPI_TEST is not set CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_UNIQUEID is not set # CONFIG_BOARDCTL_TSCTEST is not set @@ -337,12 +435,7 @@ CONFIG_LIB_BOARDCTL=y # # RTOS Features # -CONFIG_DISABLE_OS_API=y -# CONFIG_DISABLE_POSIX_TIMERS is not set -# CONFIG_DISABLE_PTHREAD is not set -# CONFIG_DISABLE_SIGNALS is not set -# CONFIG_DISABLE_MQUEUE is not set -# CONFIG_DISABLE_ENVIRON is not set +# CONFIG_DISABLE_OS_API is not set # # Clocks and Timers @@ -351,9 +444,9 @@ CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set # CONFIG_CLOCK_MONOTONIC is not set # CONFIG_JULIAN_TIME is not set -CONFIG_START_YEAR=2011 -CONFIG_START_MONTH=12 -CONFIG_START_DAY=6 +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 CONFIG_MAX_WDOGPARMS=2 CONFIG_PREALLOC_WDOGS=4 CONFIG_WDOG_INTRESERVE=0 @@ -395,7 +488,9 @@ CONFIG_SDCLONE_DISABLE=y CONFIG_NFILE_DESCRIPTORS=8 CONFIG_NFILE_STREAMS=8 CONFIG_NAME_MAX=32 -# CONFIG_PRIORITY_INHERITANCE is not set +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=16 +CONFIG_SEM_NNESTPRIO=16 # # RTOS hooks @@ -404,6 +499,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -412,6 +508,7 @@ CONFIG_SIG_SIGUSR1=1 CONFIG_SIG_SIGUSR2=2 CONFIG_SIG_SIGALARM=3 CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 # # POSIX Message Queue Options @@ -423,9 +520,17 @@ CONFIG_MQ_MAXMSGSIZE=32 # # Work queue support # -# CONFIG_SCHED_WORKQUEUE is not set -# CONFIG_SCHED_HPWORK is not set -# CONFIG_SCHED_LPWORK is not set +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=100000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPNTHREADS=1 +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKPRIOMAX=176 +CONFIG_SCHED_LPWORKPERIOD=50000 +CONFIG_SCHED_LPWORKSTACKSIZE=2048 # # Stack and heap information @@ -478,7 +583,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -499,33 +609,28 @@ CONFIG_USERLED_LOWER=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -586,6 +691,7 @@ CONFIG_USART3_2STOP=0 # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set # CONFIG_FS_READABLE is not set # CONFIG_FS_WRITABLE is not set +# CONFIG_FS_AIO is not set # CONFIG_FS_NAMED_SEMAPHORES is not set CONFIG_FS_MQUEUE_MPATH="/var/mqueue" # CONFIG_FS_RAMMAP is not set @@ -696,10 +802,6 @@ CONFIG_HAVE_CXXINITIALIZE=y # Application Configuration # -# -# NxWidgets/NxWM -# - # # Built-In Applications # @@ -804,6 +906,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -904,6 +1007,10 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_NSH_LOGIN is not set # CONFIG_NSH_CONSOLE_LOGIN is not set +# +# NxWidgets/NxWM +# + # # Platform-specific Support # @@ -930,5 +1037,6 @@ CONFIG_READLINE_CMD_HISTORY_LINELEN=80 CONFIG_READLINE_CMD_HISTORY_LEN=16 # CONFIG_SYSTEM_SUDOKU is not set # CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set # CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/evalos/setenv.sh b/configs/nucleo-144/f746-evalos/setenv.sh similarity index 98% rename from configs/nucleo-144/evalos/setenv.sh rename to configs/nucleo-144/f746-evalos/setenv.sh index 0f767948bf4..84db5f90ee3 100644 --- a/configs/nucleo-144/evalos/setenv.sh +++ b/configs/nucleo-144/f746-evalos/setenv.sh @@ -1,5 +1,5 @@ #!/bin/bash -# configs/nucleo-144/evalos/setenv.sh +# configs/nucleo-144/f746-evalos/setenv.sh # # Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt diff --git a/configs/nucleo-144/nsh/Make.defs b/configs/nucleo-144/f746-nsh/Make.defs similarity index 96% rename from configs/nucleo-144/nsh/Make.defs rename to configs/nucleo-144/f746-nsh/Make.defs index 45b3f5f4aee..758b9eadb85 100644 --- a/configs/nucleo-144/nsh/Make.defs +++ b/configs/nucleo-144/f746-nsh/Make.defs @@ -1,8 +1,9 @@ ############################################################################ -# configs/nucleo-144/nsh/Make.defs +# configs/nucleo-144/f746-nsh/Make.defs # # Copyright (C) 2016 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt +# Authors: Gregory Nutt +# David Sidrane # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -37,7 +38,7 @@ include ${TOPDIR}/.config include ${TOPDIR}/tools/Config.mk include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs -LDSCRIPT = flash.ld +LDSCRIPT = f746-flash.ld ifeq ($(WINTOOL),y) # Windows-native toolchains diff --git a/configs/nucleo-144/nsh/defconfig b/configs/nucleo-144/f746-nsh/defconfig similarity index 79% rename from configs/nucleo-144/nsh/defconfig rename to configs/nucleo-144/f746-nsh/defconfig index f7fe7e2ebb7..b8bcde84fec 100644 --- a/configs/nucleo-144/nsh/defconfig +++ b/configs/nucleo-144/f746-nsh/defconfig @@ -24,7 +24,7 @@ CONFIG_BUILD_FLAT=y # Binary Output Formats # # CONFIG_RRLOAD_BINARY is not set -CONFIG_INTELHEX_BINARY=y +# CONFIG_INTELHEX_BINARY is not set # CONFIG_MOTOROLA_SREC is not set CONFIG_RAW_BINARY=y # CONFIG_UBOOT_UIMAGE is not set @@ -45,7 +45,7 @@ CONFIG_RAW_BINARY=y # CONFIG_DEBUG is not set CONFIG_ARCH_HAVE_HEAPCHECK=y CONFIG_ARCH_HAVE_STACKCHECK=y -# CONFIG_STACK_COLORATION is not set +CONFIG_STACK_COLORATION=y CONFIG_DEBUG_SYMBOLS=y CONFIG_ARCH_HAVE_CUSTOMOPT=y CONFIG_DEBUG_NOOPT=y @@ -124,7 +124,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set CONFIG_ARCH_HAVE_FPU=y -CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set # CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y @@ -151,22 +151,118 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARMV7M_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART6_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y # # STM32 F7 Configuration Options # -# CONFIG_ARCH_CHIP_STM32F745 is not set -CONFIG_ARCH_CHIP_STM32F746=y -# CONFIG_ARCH_CHIP_STM32F756 is not set +# CONFIG_ARCH_CHIP_STM32F745VG is not set +# CONFIG_ARCH_CHIP_STM32F745VE is not set +# CONFIG_ARCH_CHIP_STM32F745IG is not set +# CONFIG_ARCH_CHIP_STM32F745IE is not set +# CONFIG_ARCH_CHIP_STM32F745ZE is not set +# CONFIG_ARCH_CHIP_STM32F745ZG is not set +# CONFIG_ARCH_CHIP_STM32F746BG is not set +# CONFIG_ARCH_CHIP_STM32F746VG is not set +# CONFIG_ARCH_CHIP_STM32F746VE is not set +# CONFIG_ARCH_CHIP_STM32F746BE is not set +CONFIG_ARCH_CHIP_STM32F746ZG=y +# CONFIG_ARCH_CHIP_STM32F746IE is not set +# CONFIG_ARCH_CHIP_STM32F746NG is not set +# CONFIG_ARCH_CHIP_STM32F746NE is not set +# CONFIG_ARCH_CHIP_STM32F746ZE is not set +# CONFIG_ARCH_CHIP_STM32F746IG is not set +# CONFIG_ARCH_CHIP_STM32F756NG is not set +# CONFIG_ARCH_CHIP_STM32F756BG is not set +# CONFIG_ARCH_CHIP_STM32F756IG is not set +# CONFIG_ARCH_CHIP_STM32F756VG is not set +# CONFIG_ARCH_CHIP_STM32F756ZG is not set +# CONFIG_ARCH_CHIP_STM32F765NI is not set +# CONFIG_ARCH_CHIP_STM32F765VI is not set +# CONFIG_ARCH_CHIP_STM32F765VG is not set +# CONFIG_ARCH_CHIP_STM32F765BI is not set +# CONFIG_ARCH_CHIP_STM32F765NG is not set +# CONFIG_ARCH_CHIP_STM32F765ZG is not set +# CONFIG_ARCH_CHIP_STM32F765ZI is not set +# CONFIG_ARCH_CHIP_STM32F765IG is not set +# CONFIG_ARCH_CHIP_STM32F765BG is not set +# CONFIG_ARCH_CHIP_STM32F765II is not set +# CONFIG_ARCH_CHIP_STM32F767NG is not set +# CONFIG_ARCH_CHIP_STM32F767IG is not set +# CONFIG_ARCH_CHIP_STM32F767VG is not set +# CONFIG_ARCH_CHIP_STM32F767ZG is not set +# CONFIG_ARCH_CHIP_STM32F767NI is not set +# CONFIG_ARCH_CHIP_STM32F767VI is not set +# CONFIG_ARCH_CHIP_STM32F767BG is not set +# CONFIG_ARCH_CHIP_STM32F767ZI is not set +# CONFIG_ARCH_CHIP_STM32F767II is not set +# CONFIG_ARCH_CHIP_STM32F769BI is not set +# CONFIG_ARCH_CHIP_STM32F769II is not set +# CONFIG_ARCH_CHIP_STM32F769BG is not set +# CONFIG_ARCH_CHIP_STM32F769NI is not set +# CONFIG_ARCH_CHIP_STM32F769AI is not set +# CONFIG_ARCH_CHIP_STM32F769NG is not set +# CONFIG_ARCH_CHIP_STM32F769IG is not set +# CONFIG_ARCH_CHIP_STM32F777ZI is not set +# CONFIG_ARCH_CHIP_STM32F777VI is not set +# CONFIG_ARCH_CHIP_STM32F777NI is not set +# CONFIG_ARCH_CHIP_STM32F777BI is not set +# CONFIG_ARCH_CHIP_STM32F777II is not set +# CONFIG_ARCH_CHIP_STM32F778AI is not set +# CONFIG_ARCH_CHIP_STM32F779II is not set +# CONFIG_ARCH_CHIP_STM32F779NI is not set +# CONFIG_ARCH_CHIP_STM32F779BI is not set +# CONFIG_ARCH_CHIP_STM32F779AI is not set CONFIG_STM32F7_STM32F74XX=y # CONFIG_STM32F7_STM32F75XX is not set -# CONFIG_STM32F7_FLASH_512KB is not set -CONFIG_STM32F7_FLASH_1024KB=y +# CONFIG_STM32F7_STM32F76XX is not set +# CONFIG_STM32F7_STM32F77XX is not set +# CONFIG_STM32F7_IO_CONFIG_V is not set +# CONFIG_STM32F7_IO_CONFIG_I is not set +CONFIG_STM32F7_IO_CONFIG_Z=y +# CONFIG_STM32F7_IO_CONFIG_N is not set +# CONFIG_STM32F7_IO_CONFIG_B is not set +# CONFIG_STM32F7_IO_CONFIG_A is not set +# CONFIG_STM32F7_STM32F745XX is not set +CONFIG_STM32F7_STM32F746XX=y +# CONFIG_STM32F7_STM32F756XX is not set +# CONFIG_STM32F7_STM32F765XX is not set +# CONFIG_STM32F7_STM32F767XX is not set +# CONFIG_STM32F7_STM32F768XX is not set +# CONFIG_STM32F7_STM32F768AX is not set +# CONFIG_STM32F7_STM32F769XX is not set +# CONFIG_STM32F7_STM32F769AX is not set +# CONFIG_STM32F7_STM32F777XX is not set +# CONFIG_STM32F7_STM32F778XX is not set +# CONFIG_STM32F7_STM32F778AX is not set +# CONFIG_STM32F7_STM32F779XX is not set +# CONFIG_STM32F7_STM32F779AX is not set +# CONFIG_STM32F7_FLASH_CONFIG_E is not set +# CONFIG_STM32F7_FLASH_CONFIG_I is not set +CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y +# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set # # STM32 Peripheral Support # CONFIG_STM32F7_HAVE_LTDC=y +CONFIG_STM32F7_HAVE_FSMC=y +CONFIG_STM32F7_HAVE_ETHRNET=y +CONFIG_STM32F7_HAVE_RNG=y +CONFIG_STM32F7_HAVE_SPI5=y +CONFIG_STM32F7_HAVE_SPI6=y +# CONFIG_STM32F7_HAVE_SDMMC2 is not set +# CONFIG_STM32F7_HAVE_CAN3 is not set +CONFIG_STM32F7_HAVE_DCMI=y +# CONFIG_STM32F7_HAVE_DSIHOST is not set +CONFIG_STM32F7_HAVE_DMA2D=y +# CONFIG_STM32F7_HAVE_JPEG is not set +# CONFIG_STM32F7_HAVE_CRYP is not set +# CONFIG_STM32F7_HAVE_HASH is not set +# CONFIG_STM32F7_HAVE_DFSDM1 is not set # CONFIG_STM32F7_ADC is not set # CONFIG_STM32F7_CAN is not set # CONFIG_STM32F7_DAC is not set @@ -183,12 +279,12 @@ CONFIG_STM32F7_USART=y # CONFIG_STM32F7_CAN2 is not set # CONFIG_STM32F7_CEC is not set # CONFIG_STM32F7_CRC is not set -# CONFIG_STM32F7_CRYP is not set # CONFIG_STM32F7_DMA1 is not set # CONFIG_STM32F7_DMA2 is not set # CONFIG_STM32F7_DAC1 is not set # CONFIG_STM32F7_DAC2 is not set # CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_DMA2D is not set # CONFIG_STM32F7_ETHMAC is not set # CONFIG_STM32F7_FSMC is not set # CONFIG_STM32F7_I2C1 is not set @@ -196,12 +292,11 @@ CONFIG_STM32F7_USART=y # CONFIG_STM32F7_I2C3 is not set # CONFIG_STM32F7_LPTIM1 is not set # CONFIG_STM32F7_LTDC is not set -# CONFIG_STM32F7_DMA2D is not set # CONFIG_STM32F7_OTGFS is not set # CONFIG_STM32F7_OTGHS is not set # CONFIG_STM32F7_QUADSPI is not set -# CONFIG_STM32F7_SAI1 is not set # CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI1 is not set # CONFIG_STM32F7_SAI2 is not set # CONFIG_STM32F7_SDMMC1 is not set # CONFIG_STM32F7_SPDIFRX is not set @@ -236,6 +331,13 @@ CONFIG_STM32F7_USART6=y # CONFIG_STM32F7_UART8 is not set # CONFIG_STM32F7_IWDG is not set # CONFIG_STM32F7_WWDG is not set + +# +# U[S]ART Configuration +# +CONFIG_STM32F7_FLOWCONTROL_BROKEN=y +CONFIG_STM32F7_USART_BREAKS=y +CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set # @@ -299,7 +401,6 @@ CONFIG_RAM_SIZE=245760 # # Board Selection # -# CONFIG_ARCH_BOARD_STM32F746G_DISCO is not set CONFIG_ARCH_BOARD_NUCLEO_144=y # CONFIG_ARCH_BOARD_CUSTOM is not set CONFIG_ARCH_BOARD="nucleo-144" @@ -318,6 +419,11 @@ CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # +CONFIG_NUCLEO_CONSOLE_ARDUINO=y +# CONFIG_NUCLEO_CONSOLE_VIRTUAL is not set +# CONFIG_NUCLEO_CONSOLE_MORPHO is not set +# CONFIG_NUCLEO_CONSOLE_NONE is not set +# CONFIG_NUCLEO_SPI_TEST is not set # CONFIG_LIB_BOARDCTL is not set # @@ -337,9 +443,9 @@ CONFIG_USEC_PER_TICK=10000 # CONFIG_SYSTEM_TIME64 is not set # CONFIG_CLOCK_MONOTONIC is not set # CONFIG_JULIAN_TIME is not set -CONFIG_START_YEAR=2011 -CONFIG_START_MONTH=12 -CONFIG_START_DAY=6 +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 CONFIG_MAX_WDOGPARMS=2 CONFIG_PREALLOC_WDOGS=4 CONFIG_WDOG_INTRESERVE=0 @@ -464,7 +570,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -484,33 +595,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -CONFIG_ARCH_HAVE_USART6=y -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART6_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +CONFIG_USART6_SERIALDRIVER=y +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -778,6 +884,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -904,5 +1011,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set # CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set # CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/f746-nsh/setenv.sh b/configs/nucleo-144/f746-nsh/setenv.sh new file mode 100644 index 00000000000..6a5fa6c8011 --- /dev/null +++ b/configs/nucleo-144/f746-nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/nucleo-144/f746-nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-144/f767-evalos/Make.defs b/configs/nucleo-144/f767-evalos/Make.defs new file mode 100644 index 00000000000..3e25864217f --- /dev/null +++ b/configs/nucleo-144/f767-evalos/Make.defs @@ -0,0 +1,114 @@ +############################################################################ +# configs/nucleo-144/f767-evalos/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Authors: Gregory Nutt +# Mark Olsson +# David Sidrane +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = f767-flash.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/nucleo-144/f767-evalos/defconfig b/configs/nucleo-144/f767-evalos/defconfig new file mode 100644 index 00000000000..e4165fa20d3 --- /dev/null +++ b/configs/nucleo-144/f767-evalos/defconfig @@ -0,0 +1,1047 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32f7" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART3_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y + +# +# STM32 F7 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32F745VG is not set +# CONFIG_ARCH_CHIP_STM32F745VE is not set +# CONFIG_ARCH_CHIP_STM32F745IG is not set +# CONFIG_ARCH_CHIP_STM32F745IE is not set +# CONFIG_ARCH_CHIP_STM32F745ZE is not set +# CONFIG_ARCH_CHIP_STM32F745ZG is not set +# CONFIG_ARCH_CHIP_STM32F746BG is not set +# CONFIG_ARCH_CHIP_STM32F746VG is not set +# CONFIG_ARCH_CHIP_STM32F746VE is not set +# CONFIG_ARCH_CHIP_STM32F746BE is not set +# CONFIG_ARCH_CHIP_STM32F746ZG is not set +# CONFIG_ARCH_CHIP_STM32F746IE is not set +# CONFIG_ARCH_CHIP_STM32F746NG is not set +# CONFIG_ARCH_CHIP_STM32F746NE is not set +# CONFIG_ARCH_CHIP_STM32F746ZE is not set +# CONFIG_ARCH_CHIP_STM32F746IG is not set +# CONFIG_ARCH_CHIP_STM32F756NG is not set +# CONFIG_ARCH_CHIP_STM32F756BG is not set +# CONFIG_ARCH_CHIP_STM32F756IG is not set +# CONFIG_ARCH_CHIP_STM32F756VG is not set +# CONFIG_ARCH_CHIP_STM32F756ZG is not set +# CONFIG_ARCH_CHIP_STM32F765NI is not set +# CONFIG_ARCH_CHIP_STM32F765VI is not set +# CONFIG_ARCH_CHIP_STM32F765VG is not set +# CONFIG_ARCH_CHIP_STM32F765BI is not set +# CONFIG_ARCH_CHIP_STM32F765NG is not set +# CONFIG_ARCH_CHIP_STM32F765ZG is not set +# CONFIG_ARCH_CHIP_STM32F765ZI is not set +# CONFIG_ARCH_CHIP_STM32F765IG is not set +# CONFIG_ARCH_CHIP_STM32F765BG is not set +# CONFIG_ARCH_CHIP_STM32F765II is not set +# CONFIG_ARCH_CHIP_STM32F767NG is not set +# CONFIG_ARCH_CHIP_STM32F767IG is not set +# CONFIG_ARCH_CHIP_STM32F767VG is not set +# CONFIG_ARCH_CHIP_STM32F767ZG is not set +# CONFIG_ARCH_CHIP_STM32F767NI is not set +# CONFIG_ARCH_CHIP_STM32F767VI is not set +# CONFIG_ARCH_CHIP_STM32F767BG is not set +CONFIG_ARCH_CHIP_STM32F767ZI=y +# CONFIG_ARCH_CHIP_STM32F767II is not set +# CONFIG_ARCH_CHIP_STM32F769BI is not set +# CONFIG_ARCH_CHIP_STM32F769II is not set +# CONFIG_ARCH_CHIP_STM32F769BG is not set +# CONFIG_ARCH_CHIP_STM32F769NI is not set +# CONFIG_ARCH_CHIP_STM32F769AI is not set +# CONFIG_ARCH_CHIP_STM32F769NG is not set +# CONFIG_ARCH_CHIP_STM32F769IG is not set +# CONFIG_ARCH_CHIP_STM32F777ZI is not set +# CONFIG_ARCH_CHIP_STM32F777VI is not set +# CONFIG_ARCH_CHIP_STM32F777NI is not set +# CONFIG_ARCH_CHIP_STM32F777BI is not set +# CONFIG_ARCH_CHIP_STM32F777II is not set +# CONFIG_ARCH_CHIP_STM32F778AI is not set +# CONFIG_ARCH_CHIP_STM32F779II is not set +# CONFIG_ARCH_CHIP_STM32F779NI is not set +# CONFIG_ARCH_CHIP_STM32F779BI is not set +# CONFIG_ARCH_CHIP_STM32F779AI is not set +# CONFIG_STM32F7_STM32F74XX is not set +# CONFIG_STM32F7_STM32F75XX is not set +CONFIG_STM32F7_STM32F76XX=y +# CONFIG_STM32F7_STM32F77XX is not set +# CONFIG_STM32F7_IO_CONFIG_V is not set +# CONFIG_STM32F7_IO_CONFIG_I is not set +CONFIG_STM32F7_IO_CONFIG_Z=y +# CONFIG_STM32F7_IO_CONFIG_N is not set +# CONFIG_STM32F7_IO_CONFIG_B is not set +# CONFIG_STM32F7_IO_CONFIG_A is not set +# CONFIG_STM32F7_STM32F745XX is not set +# CONFIG_STM32F7_STM32F746XX is not set +# CONFIG_STM32F7_STM32F756XX is not set +# CONFIG_STM32F7_STM32F765XX is not set +CONFIG_STM32F7_STM32F767XX=y +# CONFIG_STM32F7_STM32F768XX is not set +# CONFIG_STM32F7_STM32F768AX is not set +# CONFIG_STM32F7_STM32F769XX is not set +# CONFIG_STM32F7_STM32F769AX is not set +# CONFIG_STM32F7_STM32F777XX is not set +# CONFIG_STM32F7_STM32F778XX is not set +# CONFIG_STM32F7_STM32F778AX is not set +# CONFIG_STM32F7_STM32F779XX is not set +# CONFIG_STM32F7_STM32F779AX is not set +# CONFIG_STM32F7_FLASH_CONFIG_E is not set +CONFIG_STM32F7_FLASH_CONFIG_I=y +CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y +# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32F7_HAVE_LTDC=y +CONFIG_STM32F7_HAVE_FSMC=y +CONFIG_STM32F7_HAVE_ETHRNET=y +CONFIG_STM32F7_HAVE_RNG=y +CONFIG_STM32F7_HAVE_SPI5=y +CONFIG_STM32F7_HAVE_SPI6=y +CONFIG_STM32F7_HAVE_SDMMC2=y +CONFIG_STM32F7_HAVE_CAN3=y +CONFIG_STM32F7_HAVE_DCMI=y +# CONFIG_STM32F7_HAVE_DSIHOST is not set +CONFIG_STM32F7_HAVE_DMA2D=y +CONFIG_STM32F7_HAVE_JPEG=y +# CONFIG_STM32F7_HAVE_CRYP is not set +# CONFIG_STM32F7_HAVE_HASH is not set +CONFIG_STM32F7_HAVE_DFSDM1=y +# CONFIG_STM32F7_ADC is not set +# CONFIG_STM32F7_CAN is not set +# CONFIG_STM32F7_DAC is not set +# CONFIG_STM32F7_DMA is not set +# CONFIG_STM32F7_I2C is not set +# CONFIG_STM32F7_SAI is not set +# CONFIG_STM32F7_SPI is not set +CONFIG_STM32F7_USART=y +# CONFIG_STM32F7_ADC1 is not set +# CONFIG_STM32F7_ADC2 is not set +# CONFIG_STM32F7_ADC3 is not set +# CONFIG_STM32F7_BKPSRAM is not set +# CONFIG_STM32F7_CAN1 is not set +# CONFIG_STM32F7_CAN2 is not set +# CONFIG_STM32F7_CAN3 is not set +# CONFIG_STM32F7_CEC is not set +# CONFIG_STM32F7_CRC is not set +# CONFIG_STM32F7_DFSDM1 is not set +# CONFIG_STM32F7_DMA1 is not set +# CONFIG_STM32F7_DMA2 is not set +# CONFIG_STM32F7_DAC1 is not set +# CONFIG_STM32F7_DAC2 is not set +# CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_DMA2D is not set +# CONFIG_STM32F7_JPEG is not set +# CONFIG_STM32F7_ETHMAC is not set +# CONFIG_STM32F7_FSMC is not set +# CONFIG_STM32F7_I2C1 is not set +# CONFIG_STM32F7_I2C2 is not set +# CONFIG_STM32F7_I2C3 is not set +# CONFIG_STM32F7_LPTIM1 is not set +# CONFIG_STM32F7_LTDC is not set +# CONFIG_STM32F7_OTGFS is not set +# CONFIG_STM32F7_OTGHS is not set +# CONFIG_STM32F7_QUADSPI is not set +# CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI1 is not set +# CONFIG_STM32F7_SAI2 is not set +# CONFIG_STM32F7_SDMMC1 is not set +# CONFIG_STM32F7_SDMMC2 is not set +# CONFIG_STM32F7_SPDIFRX is not set +# CONFIG_STM32F7_SPI1 is not set +# CONFIG_STM32F7_SPI2 is not set +# CONFIG_STM32F7_SPI3 is not set +# CONFIG_STM32F7_SPI4 is not set +# CONFIG_STM32F7_SPI5 is not set +# CONFIG_STM32F7_SPI6 is not set +# CONFIG_STM32F7_TIM1 is not set +# CONFIG_STM32F7_TIM2 is not set +# CONFIG_STM32F7_TIM3 is not set +# CONFIG_STM32F7_TIM4 is not set +# CONFIG_STM32F7_TIM5 is not set +# CONFIG_STM32F7_TIM6 is not set +# CONFIG_STM32F7_TIM7 is not set +# CONFIG_STM32F7_TIM8 is not set +# CONFIG_STM32F7_TIM9 is not set +# CONFIG_STM32F7_TIM10 is not set +# CONFIG_STM32F7_TIM11 is not set +# CONFIG_STM32F7_TIM12 is not set +# CONFIG_STM32F7_TIM13 is not set +# CONFIG_STM32F7_TIM14 is not set +# CONFIG_STM32F7_TIM15 is not set +# CONFIG_STM32F7_USART1 is not set +# CONFIG_STM32F7_USART2 is not set +CONFIG_STM32F7_USART3=y +# CONFIG_STM32F7_UART4 is not set +# CONFIG_STM32F7_UART5 is not set +# CONFIG_STM32F7_USART6 is not set +# CONFIG_STM32F7_UART7 is not set +# CONFIG_STM32F7_UART8 is not set +# CONFIG_STM32F7_IWDG is not set +# CONFIG_STM32F7_WWDG is not set + +# +# U[S]ART Configuration +# +CONFIG_STM32F7_FLOWCONTROL_BROKEN=y +CONFIG_STM32F7_USART_BREAKS=y +CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y +# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=43103 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20010000 +CONFIG_RAM_SIZE=245760 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_144=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-144" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +# CONFIG_ARCH_LEDS is not set +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_NUCLEO_CONSOLE_ARDUINO is not set +CONFIG_NUCLEO_CONSOLE_VIRTUAL=y +# CONFIG_NUCLEO_CONSOLE_MORPHO is not set +# CONFIG_NUCLEO_CONSOLE_NONE is not set +# CONFIG_NUCLEO_SPI_TEST is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +# CONFIG_DISABLE_OS_API is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +CONFIG_PRIORITY_INHERITANCE=y +CONFIG_SEM_PREALLOCHOLDERS=16 +CONFIG_SEM_NNESTPRIO=16 + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=224 +CONFIG_SCHED_HPWORKPERIOD=100000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +CONFIG_SCHED_LPWORK=y +CONFIG_SCHED_LPNTHREADS=1 +CONFIG_SCHED_LPWORKPRIORITY=50 +CONFIG_SCHED_LPWORKPRIOMAX=176 +CONFIG_SCHED_LPWORKPERIOD=50000 +CONFIG_SCHED_LPWORKSTACKSIZE=2048 + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +CONFIG_USERLED=y +CONFIG_USERLED_LOWER=y +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART3_SERIAL_CONSOLE=y +# CONFIG_UART8_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART3 Configuration +# +CONFIG_USART3_RXBUFSIZE=256 +CONFIG_USART3_TXBUFSIZE=256 +CONFIG_USART3_BAUD=115200 +CONFIG_USART3_BITS=8 +CONFIG_USART3_PARITY=0 +CONFIG_USART3_2STOP=0 +# CONFIG_USART3_IFLOWCONTROL is not set +# CONFIG_USART3_OFLOWCONTROL is not set +# CONFIG_USART3_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_AIO is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +CONFIG_EXAMPLES_HELLOXX=y +CONFIG_EXAMPLES_HELLOXX_CXXINITIALIZE=y +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +CONFIG_EXAMPLES_LEDS=y +CONFIG_EXAMPLES_LEDS_PRIORITY=100 +CONFIG_EXAMPLES_LEDS_STACKSIZE=2048 +CONFIG_EXAMPLES_LEDS_DEVPATH="/dev/userleds" +CONFIG_EXAMPLES_LEDS_LEDSET=0x0f +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LINELEN=80 +CONFIG_READLINE_CMD_HISTORY_LEN=16 +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/f767-evalos/setenv.sh b/configs/nucleo-144/f767-evalos/setenv.sh new file mode 100644 index 00000000000..cf10804e841 --- /dev/null +++ b/configs/nucleo-144/f767-evalos/setenv.sh @@ -0,0 +1,78 @@ +#!/bin/bash +# configs/nucleo-144/f767-evalos/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Author: Mark Olsson +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-144/evalos/Make.defs b/configs/nucleo-144/f767-nsh/Make.defs similarity index 96% rename from configs/nucleo-144/evalos/Make.defs rename to configs/nucleo-144/f767-nsh/Make.defs index 210c5ff0743..9b667c97efc 100644 --- a/configs/nucleo-144/evalos/Make.defs +++ b/configs/nucleo-144/f767-nsh/Make.defs @@ -1,9 +1,9 @@ ############################################################################ -# configs/nucleo-144/evalos/Make.defs +# configs/nucleo-144/f767-nsh/Make.defs # # Copyright (C) 2016 Gregory Nutt. All rights reserved. -# Author: Gregory Nutt -# Author: Mark Olsson +# Authors: Gregory Nutt +# David Sidrane # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -38,7 +38,7 @@ include ${TOPDIR}/.config include ${TOPDIR}/tools/Config.mk include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs -LDSCRIPT = flash.ld +LDSCRIPT = f767-flash.ld ifeq ($(WINTOOL),y) # Windows-native toolchains @@ -111,3 +111,4 @@ HOSTCC = gcc HOSTINCLUDES = -I. HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe HOSTLDFLAGS = + diff --git a/configs/nucleo-144/f767-nsh/defconfig b/configs/nucleo-144/f767-nsh/defconfig new file mode 100644 index 00000000000..8e7fae13a42 --- /dev/null +++ b/configs/nucleo-144/f767-nsh/defconfig @@ -0,0 +1,1021 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +CONFIG_STACK_COLORATION=y +CONFIG_DEBUG_SYMBOLS=y +CONFIG_ARCH_HAVE_CUSTOMOPT=y +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +CONFIG_ARCH_CORTEXM7=y +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32f7" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +CONFIG_ARMV7M_CMNVECTOR=y +# CONFIG_ARMV7M_LAZYFPU is not set +CONFIG_ARCH_HAVE_FPU=y +CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +CONFIG_ARMV7M_HAVE_ICACHE=y +CONFIG_ARMV7M_HAVE_DCACHE=y +CONFIG_ARMV7M_ICACHE=y +CONFIG_ARMV7M_DCACHE=y +CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y +CONFIG_ARMV7M_HAVE_ITCM=y +CONFIG_ARMV7M_HAVE_DTCM=y +# CONFIG_ARMV7M_ITCM is not set +CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART6_RS485 is not set +CONFIG_SERIAL_DISABLE_REORDERING=y + +# +# STM32 F7 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32F745VG is not set +# CONFIG_ARCH_CHIP_STM32F745VE is not set +# CONFIG_ARCH_CHIP_STM32F745IG is not set +# CONFIG_ARCH_CHIP_STM32F745IE is not set +# CONFIG_ARCH_CHIP_STM32F745ZE is not set +# CONFIG_ARCH_CHIP_STM32F745ZG is not set +# CONFIG_ARCH_CHIP_STM32F746BG is not set +# CONFIG_ARCH_CHIP_STM32F746VG is not set +# CONFIG_ARCH_CHIP_STM32F746VE is not set +# CONFIG_ARCH_CHIP_STM32F746BE is not set +# CONFIG_ARCH_CHIP_STM32F746ZG is not set +# CONFIG_ARCH_CHIP_STM32F746IE is not set +# CONFIG_ARCH_CHIP_STM32F746NG is not set +# CONFIG_ARCH_CHIP_STM32F746NE is not set +# CONFIG_ARCH_CHIP_STM32F746ZE is not set +# CONFIG_ARCH_CHIP_STM32F746IG is not set +# CONFIG_ARCH_CHIP_STM32F756NG is not set +# CONFIG_ARCH_CHIP_STM32F756BG is not set +# CONFIG_ARCH_CHIP_STM32F756IG is not set +# CONFIG_ARCH_CHIP_STM32F756VG is not set +# CONFIG_ARCH_CHIP_STM32F756ZG is not set +# CONFIG_ARCH_CHIP_STM32F765NI is not set +# CONFIG_ARCH_CHIP_STM32F765VI is not set +# CONFIG_ARCH_CHIP_STM32F765VG is not set +# CONFIG_ARCH_CHIP_STM32F765BI is not set +# CONFIG_ARCH_CHIP_STM32F765NG is not set +# CONFIG_ARCH_CHIP_STM32F765ZG is not set +# CONFIG_ARCH_CHIP_STM32F765ZI is not set +# CONFIG_ARCH_CHIP_STM32F765IG is not set +# CONFIG_ARCH_CHIP_STM32F765BG is not set +# CONFIG_ARCH_CHIP_STM32F765II is not set +# CONFIG_ARCH_CHIP_STM32F767NG is not set +# CONFIG_ARCH_CHIP_STM32F767IG is not set +# CONFIG_ARCH_CHIP_STM32F767VG is not set +# CONFIG_ARCH_CHIP_STM32F767ZG is not set +# CONFIG_ARCH_CHIP_STM32F767NI is not set +# CONFIG_ARCH_CHIP_STM32F767VI is not set +# CONFIG_ARCH_CHIP_STM32F767BG is not set +CONFIG_ARCH_CHIP_STM32F767ZI=y +# CONFIG_ARCH_CHIP_STM32F767II is not set +# CONFIG_ARCH_CHIP_STM32F769BI is not set +# CONFIG_ARCH_CHIP_STM32F769II is not set +# CONFIG_ARCH_CHIP_STM32F769BG is not set +# CONFIG_ARCH_CHIP_STM32F769NI is not set +# CONFIG_ARCH_CHIP_STM32F769AI is not set +# CONFIG_ARCH_CHIP_STM32F769NG is not set +# CONFIG_ARCH_CHIP_STM32F769IG is not set +# CONFIG_ARCH_CHIP_STM32F777ZI is not set +# CONFIG_ARCH_CHIP_STM32F777VI is not set +# CONFIG_ARCH_CHIP_STM32F777NI is not set +# CONFIG_ARCH_CHIP_STM32F777BI is not set +# CONFIG_ARCH_CHIP_STM32F777II is not set +# CONFIG_ARCH_CHIP_STM32F778AI is not set +# CONFIG_ARCH_CHIP_STM32F779II is not set +# CONFIG_ARCH_CHIP_STM32F779NI is not set +# CONFIG_ARCH_CHIP_STM32F779BI is not set +# CONFIG_ARCH_CHIP_STM32F779AI is not set +# CONFIG_STM32F7_STM32F74XX is not set +# CONFIG_STM32F7_STM32F75XX is not set +CONFIG_STM32F7_STM32F76XX=y +# CONFIG_STM32F7_STM32F77XX is not set +# CONFIG_STM32F7_IO_CONFIG_V is not set +# CONFIG_STM32F7_IO_CONFIG_I is not set +CONFIG_STM32F7_IO_CONFIG_Z=y +# CONFIG_STM32F7_IO_CONFIG_N is not set +# CONFIG_STM32F7_IO_CONFIG_B is not set +# CONFIG_STM32F7_IO_CONFIG_A is not set +# CONFIG_STM32F7_STM32F745XX is not set +# CONFIG_STM32F7_STM32F746XX is not set +# CONFIG_STM32F7_STM32F756XX is not set +# CONFIG_STM32F7_STM32F765XX is not set +CONFIG_STM32F7_STM32F767XX=y +# CONFIG_STM32F7_STM32F768XX is not set +# CONFIG_STM32F7_STM32F768AX is not set +# CONFIG_STM32F7_STM32F769XX is not set +# CONFIG_STM32F7_STM32F769AX is not set +# CONFIG_STM32F7_STM32F777XX is not set +# CONFIG_STM32F7_STM32F778XX is not set +# CONFIG_STM32F7_STM32F778AX is not set +# CONFIG_STM32F7_STM32F779XX is not set +# CONFIG_STM32F7_STM32F779AX is not set +# CONFIG_STM32F7_FLASH_CONFIG_E is not set +CONFIG_STM32F7_FLASH_CONFIG_I=y +CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y +# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set + +# +# STM32 Peripheral Support +# +CONFIG_STM32F7_HAVE_LTDC=y +CONFIG_STM32F7_HAVE_FSMC=y +CONFIG_STM32F7_HAVE_ETHRNET=y +CONFIG_STM32F7_HAVE_RNG=y +CONFIG_STM32F7_HAVE_SPI5=y +CONFIG_STM32F7_HAVE_SPI6=y +CONFIG_STM32F7_HAVE_SDMMC2=y +CONFIG_STM32F7_HAVE_CAN3=y +CONFIG_STM32F7_HAVE_DCMI=y +# CONFIG_STM32F7_HAVE_DSIHOST is not set +CONFIG_STM32F7_HAVE_DMA2D=y +CONFIG_STM32F7_HAVE_JPEG=y +# CONFIG_STM32F7_HAVE_CRYP is not set +# CONFIG_STM32F7_HAVE_HASH is not set +CONFIG_STM32F7_HAVE_DFSDM1=y +# CONFIG_STM32F7_ADC is not set +# CONFIG_STM32F7_CAN is not set +# CONFIG_STM32F7_DAC is not set +# CONFIG_STM32F7_DMA is not set +# CONFIG_STM32F7_I2C is not set +# CONFIG_STM32F7_SAI is not set +# CONFIG_STM32F7_SPI is not set +CONFIG_STM32F7_USART=y +# CONFIG_STM32F7_ADC1 is not set +# CONFIG_STM32F7_ADC2 is not set +# CONFIG_STM32F7_ADC3 is not set +# CONFIG_STM32F7_BKPSRAM is not set +# CONFIG_STM32F7_CAN1 is not set +# CONFIG_STM32F7_CAN2 is not set +# CONFIG_STM32F7_CAN3 is not set +# CONFIG_STM32F7_CEC is not set +# CONFIG_STM32F7_CRC is not set +# CONFIG_STM32F7_DFSDM1 is not set +# CONFIG_STM32F7_DMA1 is not set +# CONFIG_STM32F7_DMA2 is not set +# CONFIG_STM32F7_DAC1 is not set +# CONFIG_STM32F7_DAC2 is not set +# CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_DMA2D is not set +# CONFIG_STM32F7_JPEG is not set +# CONFIG_STM32F7_ETHMAC is not set +# CONFIG_STM32F7_FSMC is not set +# CONFIG_STM32F7_I2C1 is not set +# CONFIG_STM32F7_I2C2 is not set +# CONFIG_STM32F7_I2C3 is not set +# CONFIG_STM32F7_LPTIM1 is not set +# CONFIG_STM32F7_LTDC is not set +# CONFIG_STM32F7_OTGFS is not set +# CONFIG_STM32F7_OTGHS is not set +# CONFIG_STM32F7_QUADSPI is not set +# CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI1 is not set +# CONFIG_STM32F7_SAI2 is not set +# CONFIG_STM32F7_SDMMC1 is not set +# CONFIG_STM32F7_SDMMC2 is not set +# CONFIG_STM32F7_SPDIFRX is not set +# CONFIG_STM32F7_SPI1 is not set +# CONFIG_STM32F7_SPI2 is not set +# CONFIG_STM32F7_SPI3 is not set +# CONFIG_STM32F7_SPI4 is not set +# CONFIG_STM32F7_SPI5 is not set +# CONFIG_STM32F7_SPI6 is not set +# CONFIG_STM32F7_TIM1 is not set +# CONFIG_STM32F7_TIM2 is not set +# CONFIG_STM32F7_TIM3 is not set +# CONFIG_STM32F7_TIM4 is not set +# CONFIG_STM32F7_TIM5 is not set +# CONFIG_STM32F7_TIM6 is not set +# CONFIG_STM32F7_TIM7 is not set +# CONFIG_STM32F7_TIM8 is not set +# CONFIG_STM32F7_TIM9 is not set +# CONFIG_STM32F7_TIM10 is not set +# CONFIG_STM32F7_TIM11 is not set +# CONFIG_STM32F7_TIM12 is not set +# CONFIG_STM32F7_TIM13 is not set +# CONFIG_STM32F7_TIM14 is not set +# CONFIG_STM32F7_TIM15 is not set +# CONFIG_STM32F7_USART1 is not set +# CONFIG_STM32F7_USART2 is not set +# CONFIG_STM32F7_USART3 is not set +# CONFIG_STM32F7_UART4 is not set +# CONFIG_STM32F7_UART5 is not set +CONFIG_STM32F7_USART6=y +# CONFIG_STM32F7_UART7 is not set +# CONFIG_STM32F7_UART8 is not set +# CONFIG_STM32F7_IWDG is not set +# CONFIG_STM32F7_WWDG is not set + +# +# U[S]ART Configuration +# +CONFIG_STM32F7_FLOWCONTROL_BROKEN=y +CONFIG_STM32F7_USART_BREAKS=y +CONFIG_STM32F7_SERIALBRK_BSDCOMPAT=y +# CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=43103 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20010000 +CONFIG_RAM_SIZE=245760 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_NUCLEO_144=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="nucleo-144" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +# CONFIG_ARCH_IRQBUTTONS is not set +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_NUCLEO_CONSOLE_ARDUINO=y +# CONFIG_NUCLEO_CONSOLE_VIRTUAL is not set +# CONFIG_NUCLEO_CONSOLE_MORPHO is not set +# CONFIG_NUCLEO_CONSOLE_NONE is not set +# CONFIG_NUCLEO_SPI_TEST is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2015 +CONFIG_START_MONTH=11 +CONFIG_START_DAY=30 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +CONFIG_USART6_SERIALDRIVER=y +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART6_SERIAL_CONSOLE=y +# CONFIG_UART8_SERIAL_CONSOLE is not set +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART6 Configuration +# +CONFIG_USART6_RXBUFSIZE=256 +CONFIG_USART6_TXBUFSIZE=256 +CONFIG_USART6_BAUD=115200 +CONFIG_USART6_BITS=8 +CONFIG_USART6_PARITY=0 +CONFIG_USART6_2STOP=0 +# CONFIG_USART6_IFLOWCONTROL is not set +# CONFIG_USART6_OFLOWCONTROL is not set +# CONFIG_USART6_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=2 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NSH_CXXINITIALIZE is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CMDOPT_DF_H=y +CONFIG_NSH_CODECS_BUFSIZE=128 +CONFIG_NSH_CMDOPT_HEXDUMP=y +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_STACKMONITOR is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/f767-nsh/setenv.sh b/configs/nucleo-144/f767-nsh/setenv.sh new file mode 100644 index 00000000000..e6eabd1f70f --- /dev/null +++ b/configs/nucleo-144/f767-nsh/setenv.sh @@ -0,0 +1,77 @@ +#!/bin/bash +# configs/nucleo-144/f767-nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the Atmel GCC +# toolchain under Windows. You will also have to edit this if you install +# this toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Atmel/Atmel Toolchain/ARM GCC/Native/4.7.3.99/arm-gnu-toolchain/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/nucleo-144/include/board.h b/configs/nucleo-144/include/board.h index 63eb5df084e..d309e139387 100644 --- a/configs/nucleo-144/include/board.h +++ b/configs/nucleo-144/include/board.h @@ -2,8 +2,9 @@ * configs/nucleo-144/include/board.h * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Authors: Gregory Nutt + * Mark Olsson + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -59,17 +60,17 @@ ************************************************************************************/ /* Clocking *************************************************************************/ -/* The STM32F7 Discovery board provides the following clock sources: +/* The Nucleo-144 board provides the following clock sources: * - * X1: 24 MHz oscillator for USB OTG HS PHY and camera module (daughter board) - * X2: 25 MHz oscillator for STM32F746NGH6 microcontroller and Ethernet PHY. - * X3: 32.768 KHz crystal for STM32F746NGH6 embedded RTC + * MCO: 8 MHz from MCO output of ST-LINK is used as input clock + * X2: 32.768 KHz crystal for LSE + * X3: HSE crystal oscillator (not provided) * * So we have these clock source available within the STM32 * * HSI: 16 MHz RC factory-trimmed * LSI: 32 KHz RC - * HSE: On-board crystal frequency is 25MHz + * HSE: 8 MHz from MCO output of ST-LINK * LSE: 32.768 kHz */ @@ -106,56 +107,53 @@ * 2 <= PLLQ <= 15 */ -#if defined(CONFIG_STM32F7_USBOTHFS) /* Highest SYSCLK with USB OTG FS clock = 48 MHz * - * PLL_VCO = (8,000,000 / 8) * 384 = 384 MHz - * SYSCLK = 384 MHz / 2 = 192 MHz - * USB OTG FS, SDMMC and RNG Clock = 384 MHz / 8 = 48MHz - */ - -#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) -#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(384) -#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 -#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(8) - -#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 384) -#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) -#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 8) - -#elif defined(CONFIG_STM32F7_SDMMC1) || defined(CONFIG_STM32F7_RNG) -/* Highest SYSCLK with USB OTG FS clock <= 48MHz - * - * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz + * PLL_VCO = (8,000,000 / 4) * 216 = 432 MHz * SYSCLK = 432 MHz / 2 = 216 MHz - * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 10 = 43.2 MHz + * USB OTG FS, SDMMC and RNG Clock = 432 MHz / 9 = 48MHz */ -#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) -#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) +#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(4) +#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(216) #define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 -#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) +#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(9) -#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 432) +#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 4) * 216) #define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) -#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) +#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 9) -#else -/* Highest SYSCLK - * - * PLL_VCO = (8,000,000 / 8) * 432 = 432 MHz - * SYSCLK = 432 MHz / 2 = 216 MHz - */ +/* Configure factors for PLLSAI clock */ -#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8) -#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(432) -#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2 -#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(10) +#define STM32_RCC_PLLSAICFGR_PLLSAIN RCC_PLLSAICFGR_PLLSAIN(192) +#define STM32_RCC_PLLSAICFGR_PLLSAIP RCC_PLLSAICFGR_PLLSAIP(2) +#define STM32_RCC_PLLSAICFGR_PLLSAIQ RCC_PLLSAICFGR_PLLSAIQ(2) +#define STM32_RCC_PLLSAICFGR_PLLSAIR RCC_PLLSAICFGR_PLLSAIR(2) -#define STM32_VCO_FREQUENCY ((STM32_HSE_FREQUENCY / 8) * 432) -#define STM32_SYSCLK_FREQUENCY (STM32_VCO_FREQUENCY / 2) -#define STM32_OTGFS_FREQUENCY (STM32_VCO_FREQUENCY / 10) -#endif +/* Configure Dedicated Clock Configuration Register */ + +#define STM32_RCC_DCKCFGR_PLLI2SDIVQ RCC_DCKCFGR_PLLI2SDIVQ(1) +#define STM32_RCC_DCKCFGR_PLLSAIDIVQ RCC_DCKCFGR_PLLSAIDIVQ(1) +#define STM32_RCC_DCKCFGR_SAI1SRC RCC_DCKCFGR_SAI1SRC_PLLSAI +#define STM32_RCC_DCKCFGR_SAI2SRC RCC_DCKCFGR_SAI2SRC_PLLSAI +#define STM32_RCC_DCKCFGR_TIMPRE 0 +#define STM32_RCC_DCKCFGR_I2S1SRC RCC_DCKCFGR_SAI1SRC_PLL +#define STM32_RCC_DCKCFGR_I2S2SRC RCC_DCKCFGR_SAI2SRC_PLL + +/* Configure factors for PLLI2S clock */ + +#define STM32_RCC_PLLI2SCFGR_PLLI2SN RCC_PLLI2SCFGR_PLLI2SN(192) +#define STM32_RCC_PLLI2SCFGR_PLLI2SP RCC_PLLI2SCFGR_PLLI2SP(2) +#define STM32_RCC_PLLI2SCFGR_PLLI2SQ RCC_PLLI2SCFGR_PLLI2SQ(2) +#define STM32_RCC_PLLI2SCFGR_PLLI2SR RCC_PLLI2SCFGR_PLLI2SR(2) + +/* Configure Dedicated Clock Configuration Register 2 */ + +#define STM32_RCC_DCKCFGR2_FMPI2C1SEL RCC_DCKCFGR2_FMPI2C1SEL_APB +#define STM32_RCC_DCKCFGR2_CECSEL RCC_DCKCFGR2_CECSEL_HSI +#define STM32_RCC_DCKCFGR2_CK48MSEL RCC_DCKCFGR2_CK48MSEL_PLLSAI +#define STM32_RCC_DCKCFGR2_SDIOSEL RCC_DCKCFGR2_SDIOSEL_48MHZ +#define STM32_RCC_DCKCFGR2_SPDIFRXSEL RCC_DCKCFGR2_SPDIFRXSEL_PLL /* Several prescalers allow the configuration of the two AHB buses, the * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum @@ -215,12 +213,9 @@ #define BOARD_FLASH_WAITSTATES 7 /* LED definitions ******************************************************************/ -/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the - * reset button, that can be controlled by software (LD2 is a power indicator, LD3-6 - * indicate USB status, LD7 is controlled by the ST-Link). - * - * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. - * One end of LD1 is grounded so a high output on PI1 will illuminate the LED. +/* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a Blue + * LED and LD3 a Red LED, that can be controlled by software. The following + * definitions assume the default Solder Bridges are installed. * * If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way. * The following definitions are used to access individual LEDs. @@ -233,9 +228,9 @@ #define BOARD_LED3 2 #define BOARD_NLEDS 3 -#define BOARD_LD1 BOARD_LED1 -#define BOARD_LD2 BOARD_LED2 -#define BOARD_LD3 BOARD_LED3 +#define BOARD_LED_GREEN BOARD_LED1 +#define BOARD_LED_BLUE BOARD_LED2 +#define BOARD_LED_RED BOARD_LED3 /* LED bits for use with board_userled_all() */ @@ -247,33 +242,29 @@ * include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related * events as follows: * - * SYMBOL Meaning LD1 - * ------------------- ----------------------- ------ - * LED_STARTED NuttX has been started OFF - * LED_HEAPALLOCATE Heap has been allocated OFF - * LED_IRQSENABLED Interrupts enabled OFF - * LED_STACKCREATED Idle stack created ON - * LED_INIRQ In an interrupt N/C - * LED_SIGNAL In a signal handler N/C - * LED_ASSERTION An assertion failed N/C - * LED_PANIC The system has crashed FLASH * - * Thus is LD1 is statically on, NuttX has successfully booted and is, - * apparently, running normally. If LD1 is flashing at approximately - * 2Hz, then a fatal error has been detected and the system has halted. + * SYMBOL Meaning LED state + * Red Green Blue + * ---------------------- -------------------------- ------ ------ ----*/ + +#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */ +#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */ +#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */ +#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */ +#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */ +#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */ +#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */ +#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */ +#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */ + +/* Thus if the Green LED is statically on, NuttX has successfully booted and + * is, apparently, running normally. If the Red LED is flashing at + * approximately 2Hz, then a fatal error has been detected and the system + * has halted. */ -#define LED_STARTED 0 /* LD1=OFF */ -#define LED_HEAPALLOCATE 0 /* LD1=OFF */ -#define LED_IRQSENABLED 0 /* LD1=OFF */ -#define LED_STACKCREATED 1 /* LD1=ON */ -#define LED_INIRQ 2 /* LD1=no change */ -#define LED_SIGNAL 2 /* LD1=no change */ -#define LED_ASSERTION 2 /* LD1=no change */ -#define LED_PANIC 3 /* LD1=flashing */ - /* Button definitions ***************************************************************/ -/* The STM32F7 Discovery supports one button: Pushbutton B1, labelled "User", is +/* The STM32F7 Discovery supports one button: Pushbutton B1, labeled "User", is * connected to GPIO PI11. A high value will be sensed when the button is depressed. */ @@ -283,6 +274,7 @@ /* Alternate function pin selections ************************************************/ +#if defined(CONFIG_NUCLEO_CONSOLE_ARDUINO) /* USART6: * * These configurations assume that you are using a standard Arduio RS-232 shield @@ -292,16 +284,32 @@ * STM32F7 * ARDUIONO FUNCTION GPIO * -- ----- --------- ----- - * DO RX USART6_RX PC7 - * D1 TX USART6_TX PC6 + * DO RX USART6_RX PG9 + * D1 TX USART6_TX PG14 * -- ----- --------- ----- */ - #define GPIO_USART6_RX GPIO_USART6_RX_1 - #define GPIO_USART6_TX GPIO_USART6_TX_1 + # define GPIO_USART6_RX GPIO_USART6_RX_2 + # define GPIO_USART6_TX GPIO_USART6_TX_2 +#endif + +/* USART3: + * Use USART3 and the USB virtual COM port +*/ +#if defined(CONFIG_NUCLEO_CONSOLE_VIRTUAL) + # define GPIO_USART3_RX GPIO_USART3_RX_3 + # define GPIO_USART3_TX GPIO_USART3_TX_3 +#endif + +/* USART8: + * + * This configurations assume that you are connecting to the Morpho connector + * with the serial interface with the adaptor's RX on pin CN11 pin 64 and + * TX on pin CN11 pin 61 + * + * USART8: has noit remap + */ - #define GPIO_USART3_RX GPIO_USART3_RX_3 - #define GPIO_USART3_TX GPIO_USART3_TX_3 /* The STM32 F7 connects to a SMSC LAN8742A PHY using these pins: * diff --git a/configs/nucleo-144/scripts/flash.ld b/configs/nucleo-144/scripts/f746-flash.ld similarity index 83% rename from configs/nucleo-144/scripts/flash.ld rename to configs/nucleo-144/scripts/f746-flash.ld index 90e589ed8ab..bc8b07e4fa8 100644 --- a/configs/nucleo-144/scripts/flash.ld +++ b/configs/nucleo-144/scripts/f746-flash.ld @@ -1,10 +1,9 @@ /**************************************************************************** - * configs/nucleo-144/scripts/flash.ld + * configs/nucleo-144/scripts/f746-flash.ld * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * - * Modified 11/4/2013 for STM32F429 support * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -35,14 +34,14 @@ * ****************************************************************************/ -/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can - * be accessed from either the AXIM interface at address 0x0800:0000 or from - * the ITCM interface at address 0x0020:0000. +/* The STM32F746ZGT6 has 1024 KiB of main FLASH memory. This FLASH memory + * can be accessed from either the AXIM interface at address 0x0800:0000 or + * from the ITCM interface at address 0x0020:0000. * * Additional information, including the option bytes, is available at at * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). * - * In the STM32F746NGH6, two different boot spaces can be selected through + * In the STM32F746ZGT6, two different boot spaces can be selected through * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and * BOOT_ADD1 option bytes: * @@ -51,16 +50,16 @@ * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. * ST programmed value: System bootloader at 0x0010:0000 * - * NuttX does not modify these option byes. On the unmodified STM32F746G - * DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot - * to address 0x0020:0000 in ITCM FLASH. + * NuttX does not modify these option byes. On the unmodified NUCLEO-144 + * board, the BOOT0 pin is at ground so by default, the STM32F746ZGT6 will + * boot from address 0x0020:0000 in ITCM FLASH. * - * The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM). + * The STM32F746ZGT6 also has 320 KiB of data SRAM (in addition to ITCM SRAM). * SRAM is split up into three blocks: * - * 1) 64Kb of DTCM SRM beginning at address 0x2000:0000 - * 2) 240Kb of SRAM1 beginning at address 0x2001:0000 - * 3) 16Kb of SRAM2 beginning at address 0x2004:c000 + * 1) 64 KiB of DTCM SRM beginning at address 0x2000:0000 + * 2) 240 KiB of SRAM1 beginning at address 0x2001:0000 + * 3) 16 KiB of SRAM2 beginning at address 0x2004:c000 * * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 * where the code expects to begin execution by jumping to the entry point in diff --git a/configs/nucleo-144/scripts/f767-flash.ld b/configs/nucleo-144/scripts/f767-flash.ld new file mode 100644 index 00000000000..6654a139fee --- /dev/null +++ b/configs/nucleo-144/scripts/f767-flash.ld @@ -0,0 +1,146 @@ +/**************************************************************************** + * configs/nucleo-144/scripts/f767-flash.ld + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* The STM32F767ZIT6 has 2048 KiB of main FLASH memory. This FLASH memory + * can be accessed from either the AXIM interface at address 0x0800:0000 or + * from the ITCM interface at address 0x0020:0000. + * + * Additional information, including the option bytes, is available at at + * FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM). + * + * In the STM32F767ZIT6, two different boot spaces can be selected through + * the BOOT pin and the boot base address programmed in the BOOT_ADD0 and + * BOOT_ADD1 option bytes: + * + * 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0]. + * ST programmed value: Flash on ITCM at 0x0020:0000 + * 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0]. + * ST programmed value: System bootloader at 0x0010:0000 + * + * NuttX does not modify these option byes. On the unmodified NUCLEO-144 + * board, the BOOT0 pin is at ground so by default, the STM32F767ZIT6 will + * boot from address 0x0020:0000 in ITCM FLASH. + * + * The STM32F767ZIT6 also has 512 KiB of data SRAM (in addition to ITCM SRAM). + * SRAM is split up into three blocks: + * + * 1) 128 KiB of DTCM SRM beginning at address 0x2000:0000 + * 2) 368 KiB of SRAM1 beginning at address 0x2002:0000 + * 3) 16 KiB of SRAM2 beginning at address 0x2007:c000 + * + * When booting from FLASH, FLASH memory is aliased to address 0x0000:0000 + * where the code expects to begin execution by jumping to the entry point in + * the 0x0800:0000 address range. + */ + +MEMORY +{ + itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 2048K + flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K + dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K + sram1 (rwx) : ORIGIN = 0x20020000, LENGTH = 368K + sram2 (rwx) : ORIGIN = 0x2007c000, LENGTH = 16K +} + +OUTPUT_ARCH(arm) +EXTERN(_vectors) +ENTRY(_stext) +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > flash + + .init_section : { + _sinit = ABSOLUTE(.); + *(.init_array .init_array.*) + _einit = ABSOLUTE(.); + } > flash + + .ARM.extab : { + *(.ARM.extab*) + } > flash + + __exidx_start = ABSOLUTE(.); + .ARM.exidx : { + *(.ARM.exidx*) + } > flash + __exidx_end = ABSOLUTE(.); + + _eronly = ABSOLUTE(.); + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > sram1 AT > flash + + .bss : { + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > sram1 + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} diff --git a/configs/nucleo-144/src/Makefile b/configs/nucleo-144/src/Makefile index 2f742b273bb..e179c34a7b8 100644 --- a/configs/nucleo-144/src/Makefile +++ b/configs/nucleo-144/src/Makefile @@ -3,6 +3,7 @@ # # Copyright (C) 2015 Gregory Nutt. All rights reserved. # Author: Gregory Nutt +# David Sidrane # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -36,7 +37,7 @@ -include $(TOPDIR)/Make.defs ASRCS = -CSRCS = stm32_boot.c stm32_spi.c +CSRCS = stm32_boot.c ifeq ($(CONFIG_ARCH_LEDS),y) CSRCS += stm32_autoleds.c @@ -52,4 +53,12 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y) CSRCS += stm32_appinitialize.c endif +ifeq ($(CONFIG_SPI),y) +CSRCS += stm32_spi.c +endif + +ifeq ($(HAVE_SDIO),y) +CSRCS += stm32_sdio.c +endif + include $(TOPDIR)/configs/Board.mk diff --git a/configs/nucleo-144/src/nucleo-144.h b/configs/nucleo-144/src/nucleo-144.h index a5766c4497c..3e35c0821a7 100644 --- a/configs/nucleo-144/src/nucleo-144.h +++ b/configs/nucleo-144/src/nucleo-144.h @@ -1,9 +1,10 @@ -/**************************************************************************************************** +/************************************************************************************ * configs/nucleo-144/src/nucleo-144.h * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Authors: Gregory Nutt + * Mark Olsson + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -32,22 +33,25 @@ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * - ****************************************************************************************************/ + ************************************************************************************/ #ifndef __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H #define __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H -/**************************************************************************************************** +/************************************************************************************ * Included Files - ****************************************************************************************************/ + ************************************************************************************/ #include #include #include -/**************************************************************************************************** +/************************************************************************************ * Pre-processor Definitions - ****************************************************************************************************/ + ************************************************************************************/ + +/* Configuration ********************************************************************/ + /* procfs File System */ #ifdef CONFIG_FS_PROCFS @@ -58,49 +62,128 @@ # endif #endif -/* STM32F736G Discovery GPIOs ***********************************************************************/ -/* The STM32F746G-DISCO board has numerous LEDs but only one, LD1 located near the reset button, that - * can be controlled by software (LD2 is a power indicator, LD3-6 indicate USB status, LD7 is - * controlled by the ST-Link). +/* Nucleo-144 GPIO Pin Definitions **************************************************/ +/* LED * - * LD1 is controlled by PI1 which is also the SPI2_SCK at the Arduino interface. One end of LD1 is - * grounded so a high output on PI1 will illuminate the LED. + * The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a + * Blue LED and LD3 a Red LED, that can be controlled by software. The following definitions assume + * the default Solder Bridges are installed. */ -#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ - GPIO_PORTB | GPIO_PIN0) -#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ - GPIO_PORTB | GPIO_PIN7) -#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ - GPIO_PORTB | GPIO_PIN14) +#define GPIO_LD1 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN0) +#define GPIO_LD2 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN7) +#define GPIO_LD3 (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | GPIO_OUTPUT_CLEAR | \ + GPIO_PORTB | GPIO_PIN14) + +#define GPIO_LED_GREEN GPIO_LD1 +#define GPIO_LED_BLUE GPIO_LD2 +#define GPIO_LED_RED GPIO_LD3 #define LED_DRIVER_PATH "/dev/userleds" -/* Pushbutton B1, labelled "User", is connected to GPIO PC13. A high value will be sensed when the - * button is depressed. Note that the EXTI interrupt is configured. +/* BUTTONS + * + * The Blue pushbutton B1, labeled "User", is connected to GPIO PC13. A high value + * will be sensed when the button is depressed. + * Note: + * 1) That the EXTI is included in the definition to enable an interrupt on this + * IO. + * 2) The following definitions assume the default Solder Bridges are installed. */ -#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13) +#define GPIO_BTN_USER (GPIO_INPUT | GPIO_FLOAT | GPIO_EXTI | GPIO_PORTC | GPIO_PIN13) -/**************************************************************************************************** +/* SPI *************************************************************************** + * + */ +#define GPIO_SPI_CS (GPIO_OUTPUT | GPIO_PUSHPULL | GPIO_SPEED_50MHz | \ + GPIO_OUTPUT_SET) + +#define GPIO_SPI1_CS0 (GPIO_SPI_CS | GPIO_PORTA | GPIO_PIN15) +#define GPIO_SPI1_CS1 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN13) +#define GPIO_SPI1_CS2 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN13) +#define GPIO_SPI1_CS3 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN14) +#define GPIO_SPI2_CS0 (GPIO_SPI_CS | GPIO_PORTD | GPIO_PIN7) +#define GPIO_SPI2_CS1 (GPIO_SPI_CS | GPIO_PORTC | GPIO_PIN15) +#define GPIO_SPI2_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN2) +#define GPIO_SPI2_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN3) +#define GPIO_SPI3_CS0 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN4) +#define GPIO_SPI3_CS1 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN5) +#define GPIO_SPI3_CS2 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN6) +#define GPIO_SPI3_CS3 (GPIO_SPI_CS | GPIO_PORTG | GPIO_PIN7) + +/* Logical SPI Chip Selects used to index */ + +#define NUCLEO_SPI_BUS1_CS0 0 +#define NUCLEO_SPI_BUS1_CS1 1 +#define NUCLEO_SPI_BUS1_CS2 2 +#define NUCLEO_SPI_BUS1_CS3 3 +#define NUCLEO_SPI_BUS2_CS0 4 +#define NUCLEO_SPI_BUS2_CS1 5 +#define NUCLEO_SPI_BUS2_CS2 6 +#define NUCLEO_SPI_BUS2_CS3 7 +#define NUCLEO_SPI_BUS3_CS0 8 +#define NUCLEO_SPI_BUS3_CS1 9 +#define NUCLEO_SPI_BUS3_CS2 10 +#define NUCLEO_SPI_BUS3_CS3 11 + +#if defined(CONFIG_STM32_SDIO) +#define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI | GPIO_PORTB | GPIO_PIN15) +#endif + +/************************************************************************************ * Public data - ****************************************************************************************************/ + ************************************************************************************/ #ifndef __ASSEMBLY__ -/**************************************************************************************************** +/************************************************************************************ * Public Functions - ****************************************************************************************************/ + ************************************************************************************/ -/**************************************************************************************************** +/************************************************************************************ * Name: stm32_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the stm32f746g-disco board. + * Called to configure SPI chip select GPIO pins for the Nucleo-144 board. * - ****************************************************************************************************/ + ************************************************************************************/ -void weak_function stm32_spidev_initialize(void); +#if defined(CONFIG_SPI) +void stm32_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: stm32_spidev_bus_test + * + * Description: + * Called to create the defined SPI buses and test them by initializing them + * and sending the NUCLEO_SPI_TEST (no chip select). + * + ************************************************************************************/ + +#if defined(NUCLEO_SPI_TEST) +int stm32_spidev_bus_test(void); +#endif + +/************************************************************************************ + * Name: stm32_dma_alloc_init + * + * Description: + * Called to create a FAT DMA allocator + * + * Returned Value: + * 0 on success or -ENOMEM + * + ************************************************************************************/ + +void stm32_dma_alloc_init(void); + +#if defined (CONFIG_FAT_DMAMEMORY) +int stm32_dma_alloc_init(void); +#endif #endif /* __ASSEMBLY__ */ #endif /* __CONFIGS_NUCLEO_144_SRC_NUCLEO_144_H */ diff --git a/configs/nucleo-144/src/stm32_appinitialize.c b/configs/nucleo-144/src/stm32_appinitialize.c index 8dabb2bc4f2..df411ad94e1 100644 --- a/configs/nucleo-144/src/stm32_appinitialize.c +++ b/configs/nucleo-144/src/stm32_appinitialize.c @@ -2,8 +2,9 @@ * config/nucleo-144/src/stm32_appinitilaize.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Authors: Gregory Nutt + * Mark Olsson + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -39,6 +40,8 @@ ****************************************************************************/ #include + +#include #include #include "nucleo-144.h" @@ -56,13 +59,39 @@ * called directly from application code, but only indirectly via the * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { -#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER) int ret; +#ifdef CONFIG_FS_PROCFS + /* Mount the procfs file system */ + + ret = mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, "ERROR: Failed to mount procfs at %s: %d\n", + STM32_PROCFS_MOUNTPOINT, ret); + } +#endif + +#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER) /* Register the LED driver */ ret = userled_lower_initialize(LED_DRIVER_PATH); @@ -72,5 +101,36 @@ int board_app_initialize(void) } #endif +#if defined(CONFIG_FAT_DMAMEMORY) + if (stm32_dma_alloc_init() < 0) + { + syslog(LOG_ERR, "DMA alloc FAILED"); + } +#endif + +#if defined(CONFIG_NUCLEO_SPI_TEST) + /* Create SPI interfaces */ + + ret = stm32_spidev_bus_init(); + if (ret != OK) + { + fdbg("ERROR: Failed to initialize SPI interfaces: %d\n", ret); + return ret; + } +#endif + +#if defined(CONFIG_MMCSD) + /* Configure SDIO */ + /* Initialize the SDIO block driver */ + + ret = stm32_sdio_initialize(); + if (ret != OK) + { + fdbg("ERROR: Failed to initialize MMC/SD driver: %d\n", ret); + return ret; + } +#endif + + UNUSED(ret); return OK; } diff --git a/configs/nucleo-144/src/stm32_autoleds.c b/configs/nucleo-144/src/stm32_autoleds.c index e9114391aff..e78621c9040 100644 --- a/configs/nucleo-144/src/stm32_autoleds.c +++ b/configs/nucleo-144/src/stm32_autoleds.c @@ -2,7 +2,8 @@ * configs/nucleo-144/src/stm32_autoleds.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -43,10 +44,10 @@ #include #include +#include #include "stm32_gpio.h" #include "nucleo-144.h" - #ifdef CONFIG_ARCH_LEDS /**************************************************************************** @@ -65,6 +66,34 @@ # define ledvdbg(x...) #endif +#define ArraySize(x) (sizeof((x)) / sizeof((x)[0])) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/* Indexed by BOARD_LED_ */ + +static const uint32_t g_ledmap[BOARD_NLEDS] = +{ + GPIO_LED_GREEN, + GPIO_LED_BLUE, + GPIO_LED_RED, +}; + +static bool g_initialized; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void phy_set_led(int led, bool state) +{ + /* Active High */ + + stm32_gpiowrite(g_ledmap[led], state); +} + /**************************************************************************** * Public Functions ****************************************************************************/ @@ -75,9 +104,14 @@ void board_autoled_initialize(void) { + int i; + /* Configure the LD1 GPIO for output. Initial state is OFF */ - stm32_configgpio(GPIO_LD1); + for (i = 0; i < ArraySize(g_ledmap); i++) + { + stm32_configgpio(g_ledmap[i]); + } } /**************************************************************************** @@ -86,28 +120,47 @@ void board_autoled_initialize(void) void board_autoled_on(int led) { - bool ledstate = false; - switch (led) { - case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ - /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ - /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ - break; /* Leave ledstate == true to turn OFF */ - default: - case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ - /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ - /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ - return; /* Return to leave STATUS LED unchanged */ - - case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ - case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ - ledstate = true; /* Set ledstate == false to turn ON */ break; - } - stm32_gpiowrite(GPIO_LD1, ledstate); + case LED_HEAPALLOCATE: + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_IRQSENABLED: + phy_set_led(BOARD_LED_BLUE, false); + phy_set_led(BOARD_LED_GREEN, true); + break; + + case LED_STACKCREATED: + phy_set_led(BOARD_LED_GREEN, true); + phy_set_led(BOARD_LED_BLUE, true); + g_initialized = true; + break; + + case LED_INIRQ: + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_SIGNAL: + phy_set_led(BOARD_LED_GREEN, true); + break; + + case LED_ASSERTION: + phy_set_led(BOARD_LED_RED, true); + phy_set_led(BOARD_LED_BLUE, true); + break; + + case LED_PANIC: + phy_set_led(BOARD_LED_RED, true); + break; + + case LED_IDLE : /* IDLE */ + phy_set_led(BOARD_LED_RED, true); + break; + } } /**************************************************************************** @@ -118,26 +171,29 @@ void board_autoled_off(int led) { switch (led) { - /* These should not happen and are ignored */ - default: - case 0: /* LED_STARTED: NuttX has been started STATUS LED=OFF */ - /* LED_HEAPALLOCATE: Heap has been allocated STATUS LED=OFF */ - /* LED_IRQSENABLED: Interrupts enabled STATUS LED=OFF */ - case 1: /* LED_STACKCREATED: Idle stack created STATUS LED=ON */ - - /* These result in no-change */ - - case 2: /* LED_INIRQ: In an interrupt STATUS LED=N/C */ - /* LED_SIGNAL: In a signal handler STATUS LED=N/C */ - /* LED_ASSERTION: An assertion failed STATUS LED=N/C */ - return; /* Return to leave STATUS LED unchanged */ - - /* Turn STATUS LED off set driving the output high */ - - case 3: /* LED_PANIC: The system has crashed STATUS LED=FLASH */ - stm32_gpiowrite(GPIO_LD1, false); break; + + case LED_SIGNAL: + phy_set_led(BOARD_LED_GREEN, false); + break; + + case LED_INIRQ: + phy_set_led(BOARD_LED_BLUE, false); + break; + + case LED_ASSERTION: + phy_set_led(BOARD_LED_RED, false); + phy_set_led(BOARD_LED_BLUE, false); + break; + + case LED_PANIC: + phy_set_led(BOARD_LED_RED, false); + break; + + case LED_IDLE : /* IDLE */ + phy_set_led(BOARD_LED_RED, false); + break; } } diff --git a/configs/nucleo-144/src/stm32_boot.c b/configs/nucleo-144/src/stm32_boot.c index 3a6b8cb9515..87286e934d7 100644 --- a/configs/nucleo-144/src/stm32_boot.c +++ b/configs/nucleo-144/src/stm32_boot.c @@ -2,7 +2,8 @@ * configs/nucleo-144/src/stm32_boot.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -63,24 +64,17 @@ void stm32_boardinitialize(void) { -#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ - defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ - defined(CONFIG_STM32F7_SPI5) - /* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function - * stm32_spidev_initialize() has been brought into the link. - */ - - if (stm32_spidev_initialize) - { - stm32_spidev_initialize(); - } -#endif - #ifdef CONFIG_ARCH_LEDS /* Configure on-board LEDs if LED support has been selected. */ board_autoled_initialize(); #endif + +#if defined(CONFIG__SPI) + /* Configure SPI chip selects */ + + stm32_spidev_initialize(); +#endif } /************************************************************************************ @@ -105,7 +99,7 @@ void board_initialize(void) * but the initialization function must run in kernel space. */ - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif diff --git a/configs/nucleo-144/src/stm32_buttons.c b/configs/nucleo-144/src/stm32_buttons.c index 54a7dafbfba..c2d16e50b1b 100644 --- a/configs/nucleo-144/src/stm32_buttons.c +++ b/configs/nucleo-144/src/stm32_buttons.c @@ -2,7 +2,8 @@ * configs/nucleo-144/src/stm32_buttons.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt + * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -102,7 +103,14 @@ uint8_t board_buttons(void) #ifdef CONFIG_ARCH_IRQBUTTONS xcpt_t board_button_irq(int id, xcpt_t irqhandler) { -#warning Missing logic + xcpt_t oldhandler = NULL; + + if (id == BUTTON_USER) + { + oldhandler = stm32_gpiosetevent(GPIO_BTN_USER, true, true, true, irqhandler); + } + + return oldhandler; } #endif #endif /* CONFIG_ARCH_BUTTONS */ diff --git a/configs/nucleo-144/src/stm32_dma_alloc.c b/configs/nucleo-144/src/stm32_dma_alloc.c new file mode 100644 index 00000000000..7ce0af1790d --- /dev/null +++ b/configs/nucleo-144/src/stm32_dma_alloc.c @@ -0,0 +1,117 @@ +/**************************************************************************** + * configs/nucleo-144/stc/stm32_dma_alloc.c + * + * Copyright (C) 2016 PX4 Development Team. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name PX4 nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include +#include +#include +#include + +#include "nucleo-144.h" + +#if defined(CONFIG_FAT_DMAMEMORY) + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#if !defined(CONFIG_GRAN) +# error microSD DMA support requires CONFIG_GRAN +#endif + +#define BOARD_DMA_ALLOC_POOL_SIZE (8*512) + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +static GRAN_HANDLE dma_allocator; + +/* The DMA heap size constrains the total number of things that can be + * ready to do DMA at a time. + * + * For example, FAT DMA depends on one sector-sized buffer per filesystem plus + * one sector-sized buffer per file. + * + * We use a fundamental alignment / granule size of 64B; this is sufficient + * to guarantee alignment for the largest STM32 DMA burst (16 beats x 32bits). + */ + +static uint8_t g_dma_heap[BOARD_DMA_ALLOC_POOL_SIZE] __attribute__((aligned(64))); + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: stm32_dma_alloc_init + * + * Description: + * All boards may optionally provide this API to instantiate a pool of + * memory for uses with FAST FS DMA operations. + * + ************************************************************************************/ + +int stm32_dma_alloc_init(void) +{ + dma_allocator = gran_initialize(g_dma_heap, + sizeof(g_dma_heap), + 7, /* 128B granule - must be > alignment (XXX bug?) */ + 6); /* 64B alignment */ + + if (dma_allocator == NULL) + { + return -ENOMEM; + } + + return OK; +} + +/* DMA-aware allocator stubs for the FAT filesystem. */ + +void *fat_dma_alloc(size_t size) +{ + return gran_alloc(dma_allocator, size); +} + +void fat_dma_free(FAR void *memory, size_t size) +{ + gran_free(dma_allocator, memory, size); +} + +#endif /* CONFIG_FAT_DMAMEMORY */ diff --git a/drivers/mtd/flash_eraseall.c b/configs/nucleo-144/src/stm32_sdio.c similarity index 56% rename from drivers/mtd/flash_eraseall.c rename to configs/nucleo-144/src/stm32_sdio.c index 185da7695c0..21c5d2eafd3 100644 --- a/drivers/mtd/flash_eraseall.c +++ b/configs/nucleo-144/src/stm32_sdio.c @@ -1,7 +1,7 @@ /**************************************************************************** - * drivers/mtd/flash_eraseall.c + * config/nucleo-144/src/stm32_sdio.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -39,79 +39,138 @@ #include -#include +#include +#include #include +#include -#include -#include -#include +#include +#include + +#include "stm32.h" +#include "nucleo-144.h" + +#ifdef HAVE_SDIO /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ -/**************************************************************************** - * Private Types - ****************************************************************************/ +/* Configuration ************************************************************/ -/**************************************************************************** - * Private Function Prototypes - ****************************************************************************/ +/* Card detections requires card support and a card detection GPIO */ + +#define HAVE_NCD 1 +#if !defined(CONFIG_STM32_SDIO) || !defined(GPIO_SDIO_NCD) +# undef HAVE_NCD +#endif /**************************************************************************** * Private Data ****************************************************************************/ +static FAR struct sdio_dev_s *g_sdio_dev; +#ifdef HAVE_NCD +static bool g_sd_inserted = 0xff; /* Impossible value */ +#endif + /**************************************************************************** * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: stm32_ncd_interrupt + * + * Description: + * Card detect interrupt handler. + * + ****************************************************************************/ + +#ifdef HAVE_NCD +static int stm32_ncd_interrupt(int irq, FAR void *context) +{ + bool present; + + present = !stm32_gpioread(GPIO_SDIO_NCD); + if (present != g_sd_inserted) + { + sdio_mediachange(g_sdio_dev, present); + g_sd_inserted = present; + } + + return OK; +} +#endif + /**************************************************************************** * Public Functions ****************************************************************************/ /**************************************************************************** - * Name: flash_eraseall + * Name: stm32_sdio_initialize * * Description: - * Call a block driver with the MDIOC_BULKERASE ioctl command. This will - * cause the MTD driver to erase all of the flash. + * Initialize SDIO-based MMC/SD card support * ****************************************************************************/ -int flash_eraseall(FAR const char *driver) +int stm32_sdio_initialize(void) { - FAR struct inode *inode; - FAR const struct block_operations *ops; int ret; - /* Open the block driver */ +#ifdef HAVE_NCD + /* Card detect */ - ret = open_blockdriver(driver, 0, &inode); - if (ret < 0) + bool cd_status; + + /* Configure the card detect GPIO */ + + stm32_configgpio(GPIO_SDIO_NCD); + + /* Register an interrupt handler for the card detect pin */ + + stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true, stm32_ncd_interrupt); +#endif + + /* Mount the SDIO-based MMC/SD block driver */ + /* First, get an instance of the SDIO interface */ + + fvdbg("Initializing SDIO slot %d\n", SDIO_SLOTNO); + + g_sdio_dev = sdio_initialize(SDIO_SLOTNO); + if (!g_sdio_dev) { - fdbg("ERROR: Failed to open '%s': %d\n", driver, ret); + fdbg("Failed to initialize SDIO slot %d\n", SDIO_SLOTNO); + return -ENODEV; + } + + /* Now bind the SDIO interface to the MMC/SD driver */ + + fvdbg("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR); + + ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev); + if (ret != OK) + { + fdbg("Failed to bind SDIO to the MMC/SD driver: %d\n", ret); return ret; } - /* Get the block operations */ + fvdbg("Successfully bound SDIO to the MMC/SD driver\n"); - ops = inode->u.i_bops; +#ifdef HAVE_NCD + /* Use SD card detect pin to check if a card is g_sd_inserted */ - /* Invoke the block driver ioctl method */ + cd_status = !stm32_gpioread(GPIO_SDIO_NCD); + fvdbg("Card detect : %d\n", cd_status); - ret = -EPERM; - if (ops->ioctl) - { - ret = ops->ioctl(inode, MTDIOC_BULKERASE, 0); - if (ret < 0) - { - fdbg("ERROR: MTD ioctl(%04x) failed: %d\n", MTDIOC_BULKERASE, ret); - } - } + sdio_mediachange(g_sdio_dev, cd_status); +#else + /* Assume that the SD card is inserted. What choice do we have? */ - /* Close the block driver */ + sdio_mediachange(g_sdio_dev, true); +#endif - close_blockdriver(inode); - return ret; + return OK; } + +#endif /* HAVE_SDIO */ diff --git a/configs/nucleo-144/src/stm32_spi.c b/configs/nucleo-144/src/stm32_spi.c index e31a63a11de..906815d5324 100644 --- a/configs/nucleo-144/src/stm32_spi.c +++ b/configs/nucleo-144/src/stm32_spi.c @@ -3,6 +3,7 @@ * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -49,13 +50,12 @@ #include "up_arch.h" #include "chip.h" +#include "stm32_gpio.h" #include "stm32_spi.h" #include "nucleo-144.h" -#if defined(CONFIG_STM32F7_SPI1) || defined(CONFIG_STM32F7_SPI2) || \ - defined(CONFIG_STM32F7_SPI3) || defined(CONFIG_STM32F7_SPI4) || \ - defined(CONFIG_STM32F7_SPI5) +#if defined(CONFIG_SPI) /************************************************************************************ * Pre-processor Definitions @@ -74,6 +74,108 @@ # define spivdbg(x...) #endif +#define ArraySize(x) (sizeof((x)) / sizeof((x)[0])) + +#if defined(CONFIG_NUCLEO_SPI1_TEST) +# if defined(CONFIG_NUCLEO_SPI1_TEST_MODE0) +# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE0 +# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE1) +# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE1 +# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE2) +# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE2 +# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE3) +# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE3 +# else +# error "No CONFIG_NUCLEO_SPI1_TEST_MODEx defined" +# endif +#endif + +#if defined(CONFIG_NUCLEO_SPI2_TEST) +# if defined(CONFIG_NUCLEO_SPI2_TEST_MODE0) +# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE0 +# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE1) +# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE1 +# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE2) +# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE2 +# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE3) +# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE3 +# else +# error "No CONFIG_NUCLEO_SPI2_TEST_MODEx defined" +# endif +#endif + +#if defined(CONFIG_NUCLEO_SPI3_TEST) +# if defined(CONFIG_NUCLEO_SPI3_TEST_MODE0) +# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE0 +# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE1) +# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE1 +# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE2) +# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE2 +# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE3) +# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE3 +# else +# error "No CONFIG_NUCLEO_SPI3_TEST_MODEx defined" +# endif +#endif + +/************************************************************************************ + * Private Data + ************************************************************************************/ + +/* Indexed by NUCLEO_SPI_BUSx_CSx */ + +static const uint32_t g_spigpio[] = +{ +#if defined(GPIO_SPI1_CS0) + GPIO_SPI1_CS0, +#endif +#if defined(GPIO_SPI1_CS1) + GPIO_SPI1_CS1, +#endif +#if defined(GPIO_SPI1_CS2) + GPIO_SPI1_CS2, +#endif +#if defined(GPIO_SPI1_CS3) + GPIO_SPI1_CS3, +#endif +#if defined(GPIO_SPI2_CS0) + GPIO_SPI2_CS0, +#endif +#if defined(GPIO_SPI2_CS1) + GPIO_SPI2_CS1, +#endif +#if defined(GPIO_SPI2_CS2) + GPIO_SPI2_CS2, +#endif +#if defined(GPIO_SPI2_CS3) + GPIO_SPI2_CS3, +#endif +#if defined(GPIO_SPI3_CS0) + GPIO_SPI3_CS0, +#endif +#if defined(GPIO_SPI3_CS1) + GPIO_SPI3_CS1, +#endif +#if defined(GPIO_SPI3_CS2) + GPIO_SPI3_CS2, +#endif +#if defined(GPIO_SPI3_CS3) + GPIO_SPI3_CS3, +#endif +}; + +#if defined(CONFIG_NUCLEO_SPI_TEST) +# if defined(CONFIG_STM32F7_SPI1) +struct spi_dev_s *spi1; +# endif +# if defined(CONFIG_STM32F7_SPI2) +struct spi_dev_s *spi2; +# endif +# if defined(CONFIG_STM32F7_SPI3) +struct spi_dev_s *spi3; +# endif +#endif + /************************************************************************************ * Public Functions ************************************************************************************/ @@ -82,12 +184,20 @@ * Name: stm32_spidev_initialize * * Description: - * Called to configure SPI chip select GPIO pins for the stm32f746g-disco board. + * Called to configure SPI chip select GPIO pins for the Nucleo-144 board. * ************************************************************************************/ void weak_function stm32_spidev_initialize(void) { + int i; + + /* Configure SPI CS GPIO for output */ + + for (i = 0; i < ArraySize(g_spigpio); i++) + { + stm32_configgpio(g_spigpio[i]); + } } /**************************************************************************** @@ -119,6 +229,7 @@ void weak_function stm32_spidev_initialize(void) void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -131,6 +242,7 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -143,6 +255,7 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -152,9 +265,14 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) #endif #ifdef CONFIG_STM32F7_SPI4 +# ifndef NUCLEO_SPI_BUS4_CS0 +# error "NUCLEO_SPI_BUS4_CSn Are not defined" +# endif + void stm32_spi4select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -164,9 +282,30 @@ uint8_t stm32_spi4status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) #endif #ifdef CONFIG_STM32F7_SPI5 +# ifndef NUCLEO_SPI_BUS5_CS0 +# error "NUCLEO_SPI_BUS4_CSn Are not defined" +# endif + void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) { spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); +} + +uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) +{ + return 0; +} +#endif + +#ifdef CONFIG_STM32F7_SPI6 +# ifndef NUCLEO_SPI_BUS6_CS +# error "NUCLEO_SPI_BUS4_CSn Are not defined" +# endif +void stm32_spi5select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected) +{ + spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert"); + stm32_gpiowrite(g_spigpio[i], !selected); } uint8_t stm32_spi5status(FAR struct spi_dev_s *dev, enum spi_dev_e devid) @@ -234,5 +373,72 @@ int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) } #endif +#ifdef CONFIG_STM32F7_SPI6 +int stm32_spi5cmddata(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool cmd) +{ + return -ENODEV; +} +#endif + #endif /* CONFIG_SPI_CMDDATA */ -#endif /* CONFIG_STM32F7_SPI1 || ... CONFIG_STM32F7_SPI5 */ + +#if defined(CONFIG_NUCLEO_SPI_TEST) +int stm32_spidev_bus_init(void) +{ + /* Configure and test SPI-*/ + + uint8_t *tx = CONFIG_NUCLEO_SPI_TEST_MESSAGE; + +#if defined(CONFIG_NUCLEO_SPI1_TEST) + spi1 = stm32_spibus_initialize(1); + + if (!spi1) + { + syslog(LOG_ERR, "ERROR Failed to initialize SPI port 1\n"); + return -ENODEV; + } + + /* Default SPI1 to NUCLEO_SPI1_FREQ and mode */ + + SPI_SETFREQUENCY(spi1, CONFIG_NUCLEO_SPI1_TEST_FREQ); + SPI_SETBITS(spi1, CONFIG_NUCLEO_SPI1_TEST_BITS); + SPI_SETMODE(spi1, CONFIG_NUCLEO_SPI1_TEST_MODE); + SPI_EXCHANGE(spi1, tx, NULL, ArraySize(CONFIG_NUCLEO_SPI_TEST_MESSAGE)); +#endif + +#if defined(CONFIG_NUCLEO_SPI2_TEST) + spi2 = stm32_spibus_initialize(2); + + if (!spi2) + { + syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Default SPI1 to NUCLEO_SPI2_FREQ and mode */ + + SPI_SETFREQUENCY(spi2, CONFIG_NUCLEO_SPI1_TEST_FREQ); + SPI_SETBITS(spi2, CONFIG_NUCLEO_SPI2_TEST_BITS); + SPI_SETMODE(spi2, CONFIG_NUCLEO_SPI2_TEST_MODE); + SPI_EXCHANGE(spi2, tx, NULL, ArraySize(CONFIG_NUCLEO_SPI_TEST_MESSAGE)); +#endif + +#if defined(CONFIG_NUCLEO_SPI3_TEST) + spi3 = stm32_spibus_initialize(3); + + if (!spi3) + { + syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n"); + return -ENODEV; + } + + /* Default SPI1 to NUCLEO_SPI3_FREQ and mode */ + + SPI_SETFREQUENCY(spi3, CONFIG_NUCLEO_SPI3_TEST_FREQ); + SPI_SETBITS(spi3, CONFIG_NUCLEO_SPI3_TEST_BITS); + SPI_SETMODE(spi3, CONFIG_NUCLEO_SPI3_TEST_MODE); + SPI_EXCHANGE(spi3, tx, NULL, ArraySize(CONFIG_NUCLEO_SPI_TEST_MESSAGE)); +#endif +} +#endif /* NUCLEO_SPI_TEST */ +#endif /* defined(CONFIG_SPI) */ diff --git a/configs/nucleo-144/src/stm32_userleds.c b/configs/nucleo-144/src/stm32_userleds.c index 4ec9f209479..a2e4577f15a 100644 --- a/configs/nucleo-144/src/stm32_userleds.c +++ b/configs/nucleo-144/src/stm32_userleds.c @@ -2,8 +2,9 @@ * configs/nucleo-144/src/stm32_userleds.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Gregory Nutt - * Author: Mark Olsson + * Authors: Gregory Nutt + * Mark Olsson + * David Sidrane * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -43,6 +44,7 @@ #include #include +#include #include #include "stm32_gpio.h" @@ -66,15 +68,21 @@ # define ledvdbg(x...) #endif +#define ArraySize(x) (sizeof((x)) / sizeof((x)[0])) + /**************************************************************************** * Private Data ****************************************************************************/ -/* This array maps an LED number to GPIO pin configuration */ +/* This array maps an LED number to GPIO pin configuration and is indexed by + * BOARD_LED_ + */ -static const uint32_t g_ledcfg[3] = +static const uint32_t g_ledcfg[BOARD_NLEDS] = { - GPIO_LD1, GPIO_LD2, GPIO_LD3 + GPIO_LED_GREEN, + GPIO_LED_BLUE, + GPIO_LED_RED, }; /**************************************************************************** @@ -98,7 +106,7 @@ void board_userled_initialize(void) /* Configure LED1-3 GPIOs for output */ - for (i = 0; i < 3; i++) + for (i = 0; i < ArraySize(g_ledcfg); i++) { stm32_configgpio(g_ledcfg[i]); } @@ -116,10 +124,10 @@ void board_userled_initialize(void) void board_userled(int led, bool ledon) { - if ((unsigned)led < 3) - { - stm32_gpiowrite(g_ledcfg[led], ledon); - } + if ((unsigned)led < ArraySize(g_ledcfg)) + { + stm32_gpiowrite(g_ledcfg[led], ledon); + } } /**************************************************************************** @@ -139,7 +147,7 @@ void board_userled_all(uint8_t ledset) /* Configure LED1-3 GPIOs for output */ - for (i = 0; i < 3; i++) + for (i = 0; i < ArraySize(g_ledcfg); i++) { stm32_gpiowrite(g_ledcfg[i], (ledset & (1 << i)) != 0); } diff --git a/configs/nucleo-f303re/adc/defconfig b/configs/nucleo-f303re/adc/defconfig index 5932a9fe6fb..4a26a328f99 100644 --- a/configs/nucleo-f303re/adc/defconfig +++ b/configs/nucleo-f303re/adc/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -805,6 +811,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -918,6 +926,7 @@ CONFIG_EXAMPLES_ADC_SWTRIG=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/nucleo-f303re/can/defconfig b/configs/nucleo-f303re/can/defconfig index df3f7c0a933..3fe7a7e6ffd 100644 --- a/configs/nucleo-f303re/can/defconfig +++ b/configs/nucleo-f303re/can/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -243,6 +248,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -807,6 +813,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -920,6 +928,7 @@ CONFIG_EXAMPLES_CAN_READWRITE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/nucleo-f303re/include/board.h b/configs/nucleo-f303re/include/board.h index c645b46b808..3a8d91c6c46 100644 --- a/configs/nucleo-f303re/include/board.h +++ b/configs/nucleo-f303re/include/board.h @@ -2,7 +2,7 @@ * configs/nucleo-f303re/include/board.h * include/arch/board/board.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. * Authors: Gregory Nutt * Paul Alexander Patience @@ -96,13 +96,14 @@ #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK #define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 1 and 8, 15-17 */ -/* APB2 timers 1 and 8 will receive PCLK2. */ +/* APB2 timers 1 and 8, 15-17 will receive PCLK2. */ + +/* Timers driven from APB2 will be PCLK2 */ #define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) - #define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY) @@ -112,50 +113,38 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (REVISIT) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ #define STM32_CFGR_USBPRE 0 -/* Timers driven from APB1 will be twice PCLK1 */ - -#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) /* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ #define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* Timers driven from APB2 will be twice PCLK2 */ - -#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* LED definitions **********************************************************/ /* The Nucleo F303RE board has three LEDs. Two of these are controlled by diff --git a/configs/nucleo-f303re/nxlines/defconfig b/configs/nucleo-f303re/nxlines/defconfig index ddcbc7c5d3c..6ea676faa0e 100644 --- a/configs/nucleo-f303re/nxlines/defconfig +++ b/configs/nucleo-f303re/nxlines/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -240,6 +245,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -821,6 +827,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -963,6 +970,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -989,6 +998,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # Examples # # CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CAN is not set # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set @@ -1079,6 +1089,7 @@ CONFIG_EXAMPLES_NXLINES_EXTERNINIT=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/nucleo-f303re/pwm/defconfig b/configs/nucleo-f303re/pwm/defconfig index af0ecd9cbc9..08973aff2a7 100644 --- a/configs/nucleo-f303re/pwm/defconfig +++ b/configs/nucleo-f303re/pwm/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -812,6 +818,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -933,6 +941,7 @@ CONFIG_EXAMPLES_PWM_CHANNEL2=2 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/nucleo-f303re/serialrx/defconfig b/configs/nucleo-f303re/serialrx/defconfig index 4748e044c44..2203ccbe87e 100644 --- a/configs/nucleo-f303re/serialrx/defconfig +++ b/configs/nucleo-f303re/serialrx/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -413,13 +419,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_UART4_SERIALDRIVER=y +# CONFIG_STM32_UART4_1WIREDRIVER is not set # CONFIG_UART4_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -690,32 +700,28 @@ CONFIG_ADC_FIFOSIZE=8 # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -CONFIG_ARCH_HAVE_UART4=y -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +CONFIG_UART4_SERIALDRIVER=y +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -857,6 +863,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -974,6 +982,7 @@ CONFIG_EXAMPLES_SERIALRX_PRINTSTR=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/nucleo-f303re/src/stm32_appinitialize.c b/configs/nucleo-f303re/src/stm32_appinitialize.c index dce4fd50909..d79c7d50412 100644 --- a/configs/nucleo-f303re/src/stm32_appinitialize.c +++ b/configs/nucleo-f303re/src/stm32_appinitialize.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/nucleo-f303re/src/stm32_appinitialize.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved. * Authors: Gregory Nutt * Paul Alexander Patience @@ -61,9 +61,24 @@ * called directly from application code, but only indirectly via the * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/nucleo-f303re/src/stm32_boot.c b/configs/nucleo-f303re/src/stm32_boot.c index 783a231f7c3..6410d202d00 100644 --- a/configs/nucleo-f303re/src/stm32_boot.c +++ b/configs/nucleo-f303re/src/stm32_boot.c @@ -86,7 +86,7 @@ void stm32_boardinitialize(void) } #endif -#ifdef CONFIG_CANUTILS_UAVCAN +#ifdef CONFIG_CANUTILS_LIBUAVCAN (void)stm32_configgpio(GPIO_CAN1_RX); (void)stm32_configgpio(GPIO_CAN1_TX); #endif diff --git a/configs/nucleo-f303re/uavcan/defconfig b/configs/nucleo-f303re/uavcan/defconfig index 6fe165d4615..c68b048740a 100644 --- a/configs/nucleo-f303re/uavcan/defconfig +++ b/configs/nucleo-f303re/uavcan/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F303RE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -784,6 +790,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -812,36 +820,36 @@ CONFIG_HAVE_CXXINITIALIZE=y # # CAN Utilities # -CONFIG_CANUTILS_UAVCAN=y -CONFIG_UAVCAN_LIBUAVCAN_URL="https://github.com/UAVCAN/libuavcan/archive" -CONFIG_UAVCAN_LIBUAVCAN_VERSION="b04396ace50155573e545ed9bf2fb09964ee2367" -CONFIG_UAVCAN_DSDL_URL="https://github.com/UAVCAN/dsdl/archive" -CONFIG_UAVCAN_DSDL_VERSION="9804a3e6972825586be252ce08dd899f44994b14" -CONFIG_UAVCAN_PYUAVCAN_URL="https://github.com/UAVCAN/pyuavcan/archive" -CONFIG_UAVCAN_PYUAVCAN_VERSION="c58477a644d20ccf95a20c151f3a0402f271c3b8" -CONFIG_UAVCAN_STM32_NUM_IFACES=1 -CONFIG_UAVCAN_STM32_TIM2=y -# CONFIG_UAVCAN_STM32_TIM3 is not set -# CONFIG_UAVCAN_STM32_TIM4 is not set -# CONFIG_UAVCAN_STM32_TIM6 is not set -# CONFIG_UAVCAN_STM32_TIM7 is not set -CONFIG_UAVCAN_CPP03=y -# CONFIG_UAVCAN_CPP11 is not set -# CONFIG_UAVCAN_DEBUG is not set -# CONFIG_UAVCAN_EXCEPTIONS is not set -# CONFIG_UAVCAN_TINY is not set -# CONFIG_UAVCAN_NO_GLOBAL_DATA_TYPE_REGISTRY is not set -# CONFIG_UAVCAN_IMPLEMENT_PLACEMENT_NEW is not set -# CONFIG_UAVCAN_USE_EXTERNAL_SNPRINTF is not set -# CONFIG_UAVCAN_USE_EXTERNAL_FLOAT16_CONVERSION is not set -# CONFIG_UAVCAN_NO_ASSERTIONS is not set -CONFIG_UAVCAN_MEM_POOL_BLOCK_SIZE=0 -CONFIG_UAVCAN_FLOAT_COMPARISON_EPSILON_MULT=0 -CONFIG_UAVCAN_MAX_CAN_ACCEPTANCE_FILTERS=0 -CONFIG_UAVCAN_MAX_NETWORK_SIZE_HINT=0 -CONFIG_UAVCAN_RX_QUEUE_CAPACITY=0 -CONFIG_UAVCAN_BIT_RATE=0 -CONFIG_UAVCAN_INIT_RETRIES=0 +CONFIG_CANUTILS_LIBUAVCAN=y +CONFIG_LIBUAVCAN_URL="https://github.com/UAVCAN/libuavcan/archive" +CONFIG_LIBUAVCAN_VERSION="b04396ace50155573e545ed9bf2fb09964ee2367" +CONFIG_LIBUAVCAN_DSDL_URL="https://github.com/UAVCAN/dsdl/archive" +CONFIG_LIBUAVCAN_DSDL_VERSION="9804a3e6972825586be252ce08dd899f44994b14" +CONFIG_LIBUAVCAN_PYUAVCAN_URL="https://github.com/UAVCAN/pyuavcan/archive" +CONFIG_LIBUAVCAN_PYUAVCAN_VERSION="c58477a644d20ccf95a20c151f3a0402f271c3b8" +CONFIG_LIBUAVCAN_STM32_NUM_IFACES=1 +CONFIG_LIBUAVCAN_STM32_TIM2=y +# CONFIG_LIBUAVCAN_STM32_TIM3 is not set +# CONFIG_LIBUAVCAN_STM32_TIM4 is not set +# CONFIG_LIBUAVCAN_STM32_TIM6 is not set +# CONFIG_LIBUAVCAN_STM32_TIM7 is not set +CONFIG_LIBUAVCAN_CPP03=y +# CONFIG_LIBUAVCAN_CPP11 is not set +# CONFIG_LIBUAVCAN_DEBUG is not set +# CONFIG_LIBUAVCAN_EXCEPTIONS is not set +# CONFIG_LIBUAVCAN_TINY is not set +# CONFIG_LIBUAVCAN_NO_GLOBAL_DATA_TYPE_REGISTRY is not set +# CONFIG_LIBUAVCAN_IMPLEMENT_PLACEMENT_NEW is not set +# CONFIG_LIBUAVCAN_USE_EXTERNAL_SNPRINTF is not set +# CONFIG_LIBUAVCAN_USE_EXTERNAL_FLOAT16_CONVERSION is not set +# CONFIG_LIBUAVCAN_NO_ASSERTIONS is not set +CONFIG_LIBUAVCAN_MEM_POOL_BLOCK_SIZE=0 +CONFIG_LIBUAVCAN_FLOAT_COMPARISON_EPSILON_MULT=0 +CONFIG_LIBUAVCAN_MAX_CAN_ACCEPTANCE_FILTERS=0 +CONFIG_LIBUAVCAN_MAX_NETWORK_SIZE_HINT=0 +CONFIG_LIBUAVCAN_RX_QUEUE_CAPACITY=0 +CONFIG_LIBUAVCAN_BIT_RATE=0 +CONFIG_LIBUAVCAN_INIT_RETRIES=0 # # Examples @@ -899,7 +907,6 @@ CONFIG_EXAMPLES_UAVCAN_NODE_MEM_POOL_SIZE=4096 CONFIG_EXAMPLES_UAVCAN_NODE_ID=1 CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan" # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -936,6 +943,7 @@ CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan" # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/nucleo-f4x1re/README.txt b/configs/nucleo-f4x1re/README.txt index 066474d69e1..4a84121a400 100644 --- a/configs/nucleo-f4x1re/README.txt +++ b/configs/nucleo-f4x1re/README.txt @@ -395,7 +395,7 @@ Serial Consoles To configure USART1 as the console: CONFIG_STM32_USART1=y - CONFIG_USART1_ISUART=y + CONFIG_USART1_SERIALDRIVER=y CONFIG_USART1_SERIAL_CONSOLE=y CONFIG_USART1_RXBUFSIZE=256 CONFIG_USART1_TXBUFSIZE=256 @@ -434,7 +434,7 @@ Serial Consoles To configure USART2 as the console: CONFIG_STM32_USART2=y - CONFIG_USART2_ISUART=y + CONFIG_USART2_SERIALDRIVER=y CONFIG_USART2_SERIAL_CONSOLE=y CONFIG_USART2_RXBUFSIZE=256 CONFIG_USART2_TXBUFSIZE=256 @@ -455,7 +455,7 @@ Serial Consoles To configure USART6 as the console: CONFIG_STM32_USART6=y - CONFIG_USART6_ISUART=y + CONFIG_USART6_SERIALDRIVER=y CONFIG_USART6_SERIAL_CONSOLE=y CONFIG_USART6_RXBUFSIZE=256 CONFIG_USART6_TXBUFSIZE=256 diff --git a/configs/nucleo-f4x1re/f401-nsh/defconfig b/configs/nucleo-f4x1re/f401-nsh/defconfig index 6ac2b9ea553..bdacfd5723e 100644 --- a/configs/nucleo-f4x1re/f401-nsh/defconfig +++ b/configs/nucleo-f4x1re/f401-nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set CONFIG_ARCH_CHIP_STM32F401RE=y # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -410,13 +416,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM10_CAP is not set # CONFIG_STM32_TIM11_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -682,33 +692,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -852,6 +857,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -939,7 +946,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -975,6 +981,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/nucleo-f4x1re/f411-nsh/defconfig b/configs/nucleo-f4x1re/f411-nsh/defconfig index df0a12a77ee..1192acfa94b 100644 --- a/configs/nucleo-f4x1re/f411-nsh/defconfig +++ b/configs/nucleo-f4x1re/f411-nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set CONFIG_ARCH_CHIP_STM32F411RE=y +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -412,13 +418,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM10_CAP is not set # CONFIG_STM32_TIM11_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -684,33 +694,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -854,6 +859,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -941,7 +948,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -977,6 +983,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/nucleo-f4x1re/include/board.h b/configs/nucleo-f4x1re/include/board.h index cd6db041bd0..8580b8045a0 100644 --- a/configs/nucleo-f4x1re/include/board.h +++ b/configs/nucleo-f4x1re/include/board.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/nucleo-f4x1re/include/board.h * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without diff --git a/configs/nucleo-f4x1re/include/nucleo-f401re.h b/configs/nucleo-f4x1re/include/nucleo-f401re.h index 581c154e706..1460f5c3cc3 100644 --- a/configs/nucleo-f4x1re/include/nucleo-f401re.h +++ b/configs/nucleo-f4x1re/include/nucleo-f401re.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/nucleo-f4x1re/include/nucleo-f401re.h * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -168,8 +168,14 @@ */ /* REVISIT */ -#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY) -#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM1_FREQUENCY (2*STM32_PCLK2_FREQUENCY) +#define BOARD_TIM2_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM3_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM4_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM5_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM6_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM7_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM8_FREQUENCY (2*STM32_PCLK2_FREQUENCY) /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/nucleo-f4x1re/include/nucleo-f411re.h b/configs/nucleo-f4x1re/include/nucleo-f411re.h index 84018f7d4be..1d6908bae52 100644 --- a/configs/nucleo-f4x1re/include/nucleo-f411re.h +++ b/configs/nucleo-f4x1re/include/nucleo-f411re.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/nucleo-f4x1re/include/nucleo-f411re.h * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -164,8 +164,14 @@ */ /* REVISIT */ -#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY) -#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM1_FREQUENCY (2*STM32_PCLK2_FREQUENCY) +#define BOARD_TIM2_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM3_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM4_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM5_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM6_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM7_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM8_FREQUENCY (2*STM32_PCLK2_FREQUENCY) /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/nucleo-f4x1re/src/stm32_ajoystick.c b/configs/nucleo-f4x1re/src/stm32_ajoystick.c index 9d79e99cc7f..61eaccf244f 100644 --- a/configs/nucleo-f4x1re/src/stm32_ajoystick.c +++ b/configs/nucleo-f4x1re/src/stm32_ajoystick.c @@ -46,6 +46,7 @@ #include #include +#include #include #include "stm32_gpio.h" @@ -108,10 +109,6 @@ AJOY_BUTTON_7_BIT ) #endif -/**************************************************************************** - * Private Types - ****************************************************************************/ - /**************************************************************************** * Private Function Prototypes ****************************************************************************/ @@ -158,9 +155,9 @@ static const struct ajoy_lowerhalf_s g_ajoylower = }; #ifndef NO_JOYSTICK_ADC -/* Descriptor for the open ADC driver */ +/* Thread-independent file structure for the open ADC driver */ -static int g_adcfd = -1; +static struct file g_adcfile; #endif /* Current interrupt handler and argument */ @@ -209,7 +206,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, * channels are enabled). */ - nread = read(g_adcfd, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s)); + nread = file_read(&g_adcfile, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s)); if (nread < 0) { int errcode = get_errno(); @@ -454,6 +451,8 @@ int board_ajoy_initialize(void) int i; #ifndef NO_JOYSTICK_ADC + int fd; + ivdbg("Initialize ADC driver: /dev/adc0\n"); /* Initialize ADC. We will need this to read the ADC inputs */ @@ -465,15 +464,27 @@ int board_ajoy_initialize(void) return ret; } - /* Open the ADC driver for reading */ + /* Open the ADC driver for reading. */ - g_adcfd = open("/dev/adc0", O_RDONLY); - if (g_adcfd < 0) + fd = open("/dev/adc0", O_RDONLY); + if (fd < 0) { int errcode = get_errno(); idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode); return -errcode; } + + /* Detach the file structure from the file descriptor so that it can be + * used on any thread. + */ + + ret = file_detach(fd, &g_adcfile); + if (ret < 0) + { + idbg("ERROR: Failed to detach from file descriptor: %d\n", ret); + (void)close(fd); + return ret; + } #endif /* Configure the GPIO pins as interrupting inputs. NOTE: This is @@ -497,8 +508,7 @@ int board_ajoy_initialize(void) { idbg("ERROR: ajoy_register failed: %d\n", ret); #ifndef NO_JOYSTICK_ADC - close(g_adcfd); - g_adcfd = -1; + file_close_detached(&g_adcfile); #endif } diff --git a/configs/nucleo-f4x1re/src/stm32_appinit.c b/configs/nucleo-f4x1re/src/stm32_appinit.c index 7f0d889d475..97cbc4ffc48 100644 --- a/configs/nucleo-f4x1re/src/stm32_appinit.c +++ b/configs/nucleo-f4x1re/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/nucleo-f4x1re/src/stm32_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -89,11 +89,28 @@ void up_netinitialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_MMCSD) || defined(CONFIG_AJOYSTICK) int ret; diff --git a/configs/nucleo-f4x1re/src/stm32_boot.c b/configs/nucleo-f4x1re/src/stm32_boot.c index 580b2d08c46..2b6f69e65ec 100644 --- a/configs/nucleo-f4x1re/src/stm32_boot.c +++ b/configs/nucleo-f4x1re/src/stm32_boot.c @@ -121,7 +121,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - board_app_initialize(); + board_app_initialize(0); #endif /* CC3000 wireless initialization */ diff --git a/configs/nucleo-l476rg/README.txt b/configs/nucleo-l476rg/README.txt index ab8ff50b27a..d576d83d880 100644 --- a/configs/nucleo-l476rg/README.txt +++ b/configs/nucleo-l476rg/README.txt @@ -377,7 +377,7 @@ Serial Consoles To configure USART1 as the console: CONFIG_STM32_USART1=y - CONFIG_USART1_ISUART=y + CONFIG_USART1_SERIALDRIVER=y CONFIG_USART1_SERIAL_CONSOLE=y CONFIG_USART1_RXBUFSIZE=256 CONFIG_USART1_TXBUFSIZE=256 @@ -416,7 +416,7 @@ Serial Consoles To configure USART2 as the console: CONFIG_STM32_USART2=y - CONFIG_USART2_ISUART=y + CONFIG_USART2_SERIALDRIVER=y CONFIG_USART2_SERIAL_CONSOLE=y CONFIG_USART2_RXBUFSIZE=256 CONFIG_USART2_TXBUFSIZE=256 @@ -437,7 +437,7 @@ Serial Consoles To configure USART6 as the console: CONFIG_STM32_USART6=y - CONFIG_USART6_ISUART=y + CONFIG_USART6_SERIALDRIVER=y CONFIG_USART6_SERIAL_CONSOLE=y CONFIG_USART6_RXBUFSIZE=256 CONFIG_USART6_TXBUFSIZE=256 diff --git a/configs/nucleo-l476rg/include/board.h b/configs/nucleo-l476rg/include/board.h index cc132e838b0..32462f24775 100644 --- a/configs/nucleo-l476rg/include/board.h +++ b/configs/nucleo-l476rg/include/board.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/nucleo-l476rg/include/board.h * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -64,7 +64,7 @@ /* Values defined in arch/arm/src/stm32l4/chip/stm32l4x6xx_dma.h */ -#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices */ +#define DMACHAN_SDMMC DMACHAN_SDMMC_1 /* 2 choices */ #define DMACHAN_SPI1_RX DMACHAN_SPI1_RX_1 /* 2 choices */ #define DMACHAN_SPI1_TX DMACHAN_SPI1_TX_1 /* 2 choices */ @@ -109,22 +109,29 @@ * but are normally-high GPIOs. */ -#define GPIO_I2C1_SCL GPIO_I2C1_SCL_2 -#define GPIO_I2C1_SDA GPIO_I2C1_SDA_2 +#define GPIO_I2C1_SCL \ + (GPIO_I2C1_SCL_2 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET) +#define GPIO_I2C1_SDA \ + (GPIO_I2C1_SDA_2 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET) #define GPIO_I2C1_SCL_GPIO \ - (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN8) + (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN8) #define GPIO_I2C1_SDA_GPIO \ - (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9) + (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN9) -#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 -#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 +#define GPIO_I2C2_SCL \ + (GPIO_I2C2_SCL_1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET) +#define GPIO_I2C2_SDA \ + (GPIO_I2C2_SDA_1 | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET) #define GPIO_I2C2_SCL_GPIO \ - (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10) + (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN10) #define GPIO_I2C2_SDA_GPIO \ - (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN11) + (GPIO_OUTPUT | GPIO_OPENDRAIN | GPIO_SPEED_50MHz | GPIO_OUTPUT_SET | \ + GPIO_PORTB | GPIO_PIN11) -/* SPI - */ +/* SPI */ #define GPIO_SPI1_MISO GPIO_SPI1_MISO_1 #define GPIO_SPI1_MOSI GPIO_SPI1_MOSI_1 diff --git a/configs/nucleo-l476rg/nsh/defconfig b/configs/nucleo-l476rg/nsh/defconfig index a4c68715642..4f2c7c8da4e 100644 --- a/configs/nucleo-l476rg/nsh/defconfig +++ b/configs/nucleo-l476rg/nsh/defconfig @@ -559,33 +559,32 @@ CONFIG_RTC_IOCTL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART2_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/nucleo-l476rg/src/nucleo-l476rg.h b/configs/nucleo-l476rg/src/nucleo-l476rg.h index 7f1ef0feef7..d35d247349a 100644 --- a/configs/nucleo-l476rg/src/nucleo-l476rg.h +++ b/configs/nucleo-l476rg/src/nucleo-l476rg.h @@ -52,9 +52,19 @@ ************************************************************************************/ /* Configuration ********************************************************************/ +#define HAVE_PROC 1 #define HAVE_RTC_DRIVER 1 #define HAVE_MMCSD 1 +#if !defined(CONFIG_FS_PROCFS) +# undef HAVE_PROC +#endif + +#if defined(HAVE_PROC) && defined(CONFIG_DISABLE_MOUNTPOINT) +# warning Mountpoints disabled. No procfs support +# undef HAVE_PROC +#endif + /* Check if we can support the RTC driver */ #if !defined(CONFIG_RTC) || !defined(CONFIG_RTC_DRIVER) diff --git a/configs/nucleo-l476rg/src/stm32_ajoystick.c b/configs/nucleo-l476rg/src/stm32_ajoystick.c index 53d58a77d9b..bd57040a78f 100644 --- a/configs/nucleo-l476rg/src/stm32_ajoystick.c +++ b/configs/nucleo-l476rg/src/stm32_ajoystick.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/nucleo-f3x1re/src/stm32_ajoystick.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -45,6 +45,7 @@ #include #include +#include #include #include "stm32l4_gpio.h" @@ -107,10 +108,6 @@ AJOY_BUTTON_7_BIT ) #endif -/**************************************************************************** - * Private Types - ****************************************************************************/ - /**************************************************************************** * Private Function Prototypes ****************************************************************************/ @@ -157,9 +154,9 @@ static const struct ajoy_lowerhalf_s g_ajoylower = }; #ifndef NO_JOYSTICK_ADC -/* Descriptor for the open ADC driver */ +/* Thread-independent file structure for the open ADC driver */ -static int g_adcfd = -1; +static struct file g_adcfile; #endif /* Current interrupt handler and argument */ @@ -208,7 +205,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, * channels are enabled). */ - nread = read(g_adcfd, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s)); + nread = file_read(&g_adcfile, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s)); if (nread < 0) { int errcode = get_errno(); @@ -453,6 +450,8 @@ int board_ajoy_initialize(void) int i; #ifndef NO_JOYSTICK_ADC + int fd; + ivdbg("Initialize ADC driver: /dev/adc0\n"); /* Initialize ADC. We will need this to read the ADC inputs */ @@ -464,15 +463,27 @@ int board_ajoy_initialize(void) return ret; } - /* Open the ADC driver for reading */ + /* Open the ADC driver for reading. */ - g_adcfd = open("/dev/adc0", O_RDONLY); - if (g_adcfd < 0) + fd = open("/dev/adc0", O_RDONLY); + if (fd < 0) { int errcode = get_errno(); idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode); return -errcode; } + + /* Detach the file structure from the file descriptor so that it can be + * used on any thread. + */ + + ret = file_detach(fd, &g_adcfile); + if (ret < 0) + { + idbg("ERROR: Failed to detach from file descriptor: %d\n", ret); + (void)close(fd); + return ret; + } #endif /* Configure the GPIO pins as interrupting inputs. NOTE: This is @@ -496,8 +507,7 @@ int board_ajoy_initialize(void) { idbg("ERROR: ajoy_register failed: %d\n", ret); #ifndef NO_JOYSTICK_ADC - close(g_adcfd); - g_adcfd = -1; + file_close_detached(&g_adcfile); #endif } diff --git a/configs/nucleo-l476rg/src/stm32_appinit.c b/configs/nucleo-l476rg/src/stm32_appinit.c index 5a8b78513ab..96190c07c54 100644 --- a/configs/nucleo-l476rg/src/stm32_appinit.c +++ b/configs/nucleo-l476rg/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/nucleo-l476rg/src/stm32_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -39,7 +39,11 @@ #include +#include +#include #include +#include +#include #include #include @@ -82,11 +86,28 @@ void up_netinitialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef HAVE_RTC_DRIVER FAR struct rtc_lowerhalf_s *rtclower; @@ -101,6 +122,21 @@ int board_app_initialize(void) cpuload_initialize_once(); #endif +#ifdef HAVE_PROC + /* Mount the proc filesystem */ + + syslog(LOG_INFO, "Mounting procfs to /proc\n"); + + ret = mount(NULL, CONFIG_NSH_PROC_MOUNTPOINT, "procfs", 0, NULL); + if (ret < 0) + { + syslog(LOG_ERR, + "ERROR: Failed to mount the PROC filesystem: %d (%d)\n", + ret, errno); + return ret; + } +#endif + #ifdef HAVE_RTC_DRIVER /* Instantiate the STM32L4 lower-half RTC driver */ diff --git a/configs/nucleo-l476rg/src/stm32_boot.c b/configs/nucleo-l476rg/src/stm32_boot.c index 52d1a28f08f..0389d18cf11 100644 --- a/configs/nucleo-l476rg/src/stm32_boot.c +++ b/configs/nucleo-l476rg/src/stm32_boot.c @@ -121,7 +121,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT) - board_app_initialize(); + board_app_initialize(0); #endif /* CC3000 wireless initialization */ diff --git a/configs/nutiny-nuc120/nsh/defconfig b/configs/nutiny-nuc120/nsh/defconfig index 9858f39fee4..9c73cbc043c 100644 --- a/configs/nutiny-nuc120/nsh/defconfig +++ b/configs/nutiny-nuc120/nsh/defconfig @@ -316,7 +316,7 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART1=y +CONFIG_UART1_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_UART1_SERIAL_CONSOLE=y diff --git a/configs/olimex-efm32g880f128-stk/nsh/defconfig b/configs/olimex-efm32g880f128-stk/nsh/defconfig index 8783912c3e0..99b47aac95b 100644 --- a/configs/olimex-efm32g880f128-stk/nsh/defconfig +++ b/configs/olimex-efm32g880f128-stk/nsh/defconfig @@ -374,28 +374,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/olimex-lpc-h3131/nsh/defconfig b/configs/olimex-lpc-h3131/nsh/defconfig index 2e88b0d0884..f3463176647 100644 --- a/configs/olimex-lpc-h3131/nsh/defconfig +++ b/configs/olimex-lpc-h3131/nsh/defconfig @@ -382,28 +382,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +CONFIG_UART_SERIALDRIVER=y +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc-h3131/src/lpc31_appinit.c b/configs/olimex-lpc-h3131/src/lpc31_appinit.c index d24c412ffd6..551a2d9bb6c 100644 --- a/configs/olimex-lpc-h3131/src/lpc31_appinit.c +++ b/configs/olimex-lpc-h3131/src/lpc31_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/olimex-lpc-h3131/src/lpc31_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -79,11 +79,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_MMCSD) || defined(HAVE_USBHOST) int ret; diff --git a/configs/olimex-lpc1766stk/ftpc/defconfig b/configs/olimex-lpc1766stk/ftpc/defconfig index bcad3a75a0f..612214ee670 100644 --- a/configs/olimex-lpc1766stk/ftpc/defconfig +++ b/configs/olimex-lpc1766stk/ftpc/defconfig @@ -37,6 +37,7 @@ CONFIG_INTELHEX_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -92,7 +94,11 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAM34 is not set # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set # CONFIG_ARCH_ARM920T is not set @@ -102,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -119,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -223,11 +241,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y # CONFIG_ARCH_NAND_HWECC is not set # CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y # CONFIG_ARCH_USE_MPU is not set # CONFIG_ARCH_IRQPRIO is not set CONFIG_ARCH_STACKDUMP=y @@ -290,6 +311,8 @@ CONFIG_NSH_MMCSDSPIPORTNO=0 # Board-Specific Options # CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set # CONFIG_BOARDCTL_TSCTEST is not set # CONFIG_BOARDCTL_ADCTEST is not set # CONFIG_BOARDCTL_PWMTEST is not set @@ -329,6 +352,7 @@ CONFIG_INIT_ENTRYPOINT=y # CONFIG_INIT_FILEPATH is not set CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set CONFIG_TASK_NAME_SIZE=0 CONFIG_MAX_TASKS=16 # CONFIG_SCHED_HAVE_PARENT is not set @@ -365,6 +389,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -380,9 +405,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -416,14 +442,18 @@ CONFIG_DEV_NULL=y # CONFIG_RAMDISK is not set # CONFIG_CAN is not set # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set # CONFIG_PWM is not set # CONFIG_ARCH_HAVE_I2CRESET is not set # CONFIG_I2C is not set CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set # CONFIG_SPI_EXCHANGE is not set # CONFIG_SPI_CMDDATA is not set CONFIG_SPI_CALLBACK=y # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -437,7 +467,20 @@ CONFIG_SPI_CALLBACK=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -449,6 +492,7 @@ CONFIG_MMCSD_SPICLOCK=20000000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -456,7 +500,11 @@ CONFIG_NETDEVICES=y # # General Ethernet MAC Driver Options # +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set # CONFIG_NETDEV_MULTINIC is not set +CONFIG_ARCH_HAVE_NETDEV_STATISTICS=y +# CONFIG_NETDEV_LATEINIT is not set # # External Ethernet MAC Device Support @@ -466,6 +514,7 @@ CONFIG_NETDEVICES=y # CONFIG_ENCX24J600 is not set # CONFIG_NET_E1000 is not set # CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set # CONFIG_NET_VNET is not set # @@ -475,6 +524,7 @@ CONFIG_NETDEVICES=y # CONFIG_ETH0_PHY_NONE is not set # CONFIG_ETH0_PHY_AM79C874 is not set CONFIG_ETH0_PHY_KS8721=y +# CONFIG_ETH0_PHY_KSZ8041 is not set # CONFIG_ETH0_PHY_KSZ8051 is not set # CONFIG_ETH0_PHY_KSZ8061 is not set # CONFIG_ETH0_PHY_KSZ8081 is not set @@ -483,6 +533,7 @@ CONFIG_ETH0_PHY_KS8721=y # CONFIG_ETH0_PHY_LAN8720 is not set # CONFIG_ETH0_PHY_LAN8740 is not set # CONFIG_ETH0_PHY_LAN8740A is not set +# CONFIG_ETH0_PHY_LAN8742A is not set # CONFIG_ETH0_PHY_DM9161 is not set # CONFIG_PIPES is not set # CONFIG_PM is not set @@ -492,37 +543,34 @@ CONFIG_ETH0_PHY_KS8721=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y CONFIG_UART0_SERIAL_CONSOLE=y # CONFIG_OTHER_SERIAL_CONSOLE is not set @@ -539,6 +587,7 @@ CONFIG_UART0_PARITY=0 CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set # CONFIG_DRIVERS_WIRELESS is not set @@ -575,6 +624,7 @@ CONFIG_NET_GUARDSIZE=2 # # CONFIG_NET_MULTILINK is not set CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set # CONFIG_NET_TUN is not set # @@ -665,6 +715,7 @@ CONFIG_IOB_NCHAINS=8 # Routing Table Configuration # # CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" # # Crypto API @@ -691,13 +742,17 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set # CONFIG_FS_SMARTFS is not set # CONFIG_FS_BINFS is not set # CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set # # System Logging @@ -723,6 +778,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -768,6 +827,19 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_HOSTFILE is not set +CONFIG_NETDB_DNSCLIENT=y +CONFIG_NETDB_DNSCLIENT_ENTRIES=4 +CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 +CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 +CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set +# CONFIG_NETDB_DNSSERVER_NOADDR is not set +CONFIG_NETDB_DNSSERVER_IPv4=y +CONFIG_NETDB_DNSSERVER_IPv4ADDR=0x0a000001 # # Non-standard Library Support @@ -790,23 +862,28 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_BUILTIN_PROXY_STACKSIZE=1024 +# +# CAN Utilities +# + # # Examples # -# CONFIG_EXAMPLES_BUTTONS is not set -# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set @@ -815,39 +892,51 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXFLAT is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set -# CONFIG_EXAMPLES_THTTPD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + # # Graphics Support # @@ -859,47 +948,42 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set - -# -# Network Utilities -# - -# -# Networking Utilities -# -# CONFIG_NETUTILS_CODECS is not set -# CONFIG_NETUTILS_DHCPC is not set -# CONFIG_NETUTILS_DHCPD is not set -CONFIG_NETUTILS_FTPC=y -# CONFIG_NETUTILS_FTPD is not set -# CONFIG_NETUTILS_JSON is not set -CONFIG_LIBC_NETDB=y -CONFIG_NETDB_DNSCLIENT=y -CONFIG_NETDB_DNSCLIENT_ENTRIES=4 -CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 -# CONFIG_NETUTILS_SMTP is not set -# CONFIG_NETUTILS_TELNETD is not set -# CONFIG_NETUTILS_TFTPC is not set -# CONFIG_NETUTILS_THTTPD is not set -CONFIG_NETUTILS_NETLIB=y -# CONFIG_NETUTILS_WEBCLIENT is not set -# CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set -# CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus # # CONFIG_MODBUS is not set +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DHCPC is not set +# CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set +CONFIG_NETUTILS_FTPC=y +# CONFIG_NETUTILS_FTPD is not set +# CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_THTTPD is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -919,6 +1003,8 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set +# CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set # CONFIG_NSH_DISABLE_CP is not set @@ -927,6 +1013,7 @@ CONFIG_NSH_DISABLE_DATE=y # CONFIG_NSH_DISABLE_DD is not set # CONFIG_NSH_DISABLE_DF is not set # CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set # CONFIG_NSH_DISABLE_ECHO is not set # CONFIG_NSH_DISABLE_EXEC is not set # CONFIG_NSH_DISABLE_EXIT is not set @@ -935,8 +1022,10 @@ CONFIG_NSH_DISABLE_GET=y # CONFIG_NSH_DISABLE_HELP is not set # CONFIG_NSH_DISABLE_HEXDUMP is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y # CONFIG_NSH_DISABLE_KILL is not set # CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_LS is not set # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set @@ -947,6 +1036,7 @@ CONFIG_NSH_DISABLE_GET=y # CONFIG_NSH_DISABLE_MOUNT is not set # CONFIG_NSH_DISABLE_MV is not set # CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_NSLOOKUP is not set # CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PING is not set CONFIG_NSH_DISABLE_PUT=y @@ -956,8 +1046,10 @@ CONFIG_NSH_DISABLE_PUT=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set # CONFIG_NSH_DISABLE_UNSET is not set # CONFIG_NSH_DISABLE_USLEEP is not set CONFIG_NSH_DISABLE_WGET=y @@ -988,6 +1080,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1005,6 +1098,8 @@ CONFIG_NSH_NOMAC=y CONFIG_NSH_SWMAC=y CONFIG_NSH_MACADDR=0x00e0deadbeef CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # # NxWidgets/NxWM @@ -1018,16 +1113,20 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y -# CONFIG_SYSTEM_POWEROFF is not set +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/hidkbd/defconfig b/configs/olimex-lpc1766stk/hidkbd/defconfig index 57ff6174b35..995016cfd6e 100644 --- a/configs/olimex-lpc1766stk/hidkbd/defconfig +++ b/configs/olimex-lpc1766stk/hidkbd/defconfig @@ -459,28 +459,28 @@ CONFIG_MMCSD_NSLOTS=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc1766stk/hidmouse/defconfig b/configs/olimex-lpc1766stk/hidmouse/defconfig index 9128e7a1bae..f4e746ef762 100644 --- a/configs/olimex-lpc1766stk/hidmouse/defconfig +++ b/configs/olimex-lpc1766stk/hidmouse/defconfig @@ -41,6 +41,7 @@ CONFIG_INTELHEX_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -79,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -97,7 +99,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -108,14 +112,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -125,6 +140,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -210,7 +226,6 @@ CONFIG_LPC17_UART0=y # # Serial driver options # -# CONFIG_LPC17_MULTICAST is not set # # USB host driver options @@ -237,6 +252,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -384,6 +400,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -399,9 +416,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -463,8 +481,22 @@ CONFIG_MOUSE=y # CONFIG_BUTTONS is not set # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set # CONFIG_NETDEVICES is not set @@ -478,32 +510,28 @@ CONFIG_NETDEV_TELNET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -702,7 +730,9 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -736,6 +766,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -781,6 +815,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -788,6 +824,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -819,18 +856,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -840,26 +879,28 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXFLAT is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set @@ -870,15 +911,21 @@ CONFIG_EXAMPLES_TOUCHSCREEN_MOUSE=y CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -891,8 +938,8 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -905,25 +952,27 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -943,6 +992,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -985,6 +1035,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1017,6 +1068,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1046,6 +1098,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1060,13 +1114,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1075,5 +1128,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/nettest/defconfig b/configs/olimex-lpc1766stk/nettest/defconfig index 9913ba909f7..d9b56621523 100644 --- a/configs/olimex-lpc1766stk/nettest/defconfig +++ b/configs/olimex-lpc1766stk/nettest/defconfig @@ -469,28 +469,28 @@ CONFIG_ETH0_PHY_KS8721=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc1766stk/nsh/defconfig b/configs/olimex-lpc1766stk/nsh/defconfig index 402f5851469..5de7c1a619c 100644 --- a/configs/olimex-lpc1766stk/nsh/defconfig +++ b/configs/olimex-lpc1766stk/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -106,6 +108,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set # CONFIG_ARCH_CORTEXR4 is not set # CONFIG_ARCH_CORTEXR4F is not set # CONFIG_ARCH_CORTEXR5 is not set @@ -114,12 +117,15 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -130,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -462,7 +469,12 @@ CONFIG_SPI=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -534,32 +546,28 @@ CONFIG_ETH0_PHY_KS8721=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -773,6 +781,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -818,6 +830,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -861,15 +875,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -879,18 +894,18 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXFLAT is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -898,8 +913,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -907,11 +922,10 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -935,8 +949,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -949,20 +963,21 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1064,6 +1079,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1109,12 +1125,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1123,6 +1139,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-lpc1766stk/nx/defconfig b/configs/olimex-lpc1766stk/nx/defconfig index cefbb19eb23..34b2d4c3f07 100644 --- a/configs/olimex-lpc1766stk/nx/defconfig +++ b/configs/olimex-lpc1766stk/nx/defconfig @@ -481,28 +481,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc1766stk/slip-httpd/defconfig b/configs/olimex-lpc1766stk/slip-httpd/defconfig index 9b7dacd49d6..bf9a212683f 100644 --- a/configs/olimex-lpc1766stk/slip-httpd/defconfig +++ b/configs/olimex-lpc1766stk/slip-httpd/defconfig @@ -414,28 +414,28 @@ CONFIG_NET_SLIP=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc1766stk/src/lpc17_appinit.c b/configs/olimex-lpc1766stk/src/lpc17_appinit.c index 89fd701173c..a8176afa25e 100644 --- a/configs/olimex-lpc1766stk/src/lpc17_appinit.c +++ b/configs/olimex-lpc1766stk/src/lpc17_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/olimex-lpc1766stk/src/lpc17_appinit.c * - * Copyright (C) 2010, 2013-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2013-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -320,11 +320,28 @@ static int nsh_usbhostinitialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret; diff --git a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig index af5952f5440..da3dca2d7e3 100644 --- a/configs/olimex-lpc1766stk/thttpd-binfs/defconfig +++ b/configs/olimex-lpc1766stk/thttpd-binfs/defconfig @@ -466,28 +466,28 @@ CONFIG_ETH0_PHY_KS8721=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig index e6bb9d820b3..ae4b8bfd3e2 100644 --- a/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig +++ b/configs/olimex-lpc1766stk/thttpd-nxflat/defconfig @@ -458,28 +458,28 @@ CONFIG_ETH0_PHY_KS8721=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc1766stk/usbmsc/defconfig b/configs/olimex-lpc1766stk/usbmsc/defconfig index c534bd45561..f499036204d 100644 --- a/configs/olimex-lpc1766stk/usbmsc/defconfig +++ b/configs/olimex-lpc1766stk/usbmsc/defconfig @@ -449,28 +449,28 @@ CONFIG_MMCSD_SPIMODE=0 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc1766stk/usbserial/defconfig b/configs/olimex-lpc1766stk/usbserial/defconfig index 90b9bfad375..28806b7c2b2 100644 --- a/configs/olimex-lpc1766stk/usbserial/defconfig +++ b/configs/olimex-lpc1766stk/usbserial/defconfig @@ -473,28 +473,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc1766stk/zmodem/defconfig b/configs/olimex-lpc1766stk/zmodem/defconfig index 9a1e0933a8f..5150356081b 100644 --- a/configs/olimex-lpc1766stk/zmodem/defconfig +++ b/configs/olimex-lpc1766stk/zmodem/defconfig @@ -37,6 +37,7 @@ CONFIG_INTELHEX_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -121,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -227,6 +243,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -374,6 +391,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -389,9 +407,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -435,6 +454,8 @@ CONFIG_SPI=y # CONFIG_SPI_CMDDATA is not set # CONFIG_SPI_CALLBACK is not set # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -448,7 +469,20 @@ CONFIG_SPI=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -460,6 +494,7 @@ CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -512,32 +547,28 @@ CONFIG_ETH0_PHY_KS8721=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -729,7 +760,9 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -763,6 +796,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -808,6 +845,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -815,6 +854,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -846,18 +886,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -867,41 +909,49 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXFLAT is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -914,8 +964,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -927,25 +977,27 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -965,6 +1017,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1007,6 +1060,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1039,6 +1093,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1067,6 +1122,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1081,13 +1138,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1096,6 +1152,7 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set CONFIG_SYSTEM_ZMODEM=y CONFIG_SYSTEM_ZMODEM_DEVNAME="/dev/ttyS1" diff --git a/configs/olimex-lpc2378/nsh/defconfig b/configs/olimex-lpc2378/nsh/defconfig index 63e4b7cb562..207ae574d59 100644 --- a/configs/olimex-lpc2378/nsh/defconfig +++ b/configs/olimex-lpc2378/nsh/defconfig @@ -379,28 +379,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -CONFIG_ARCH_HAVE_UART2=y -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +CONFIG_UART2_SERIALDRIVER=y +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-lpc2378/src/lpc2378_appinit.c b/configs/olimex-lpc2378/src/lpc2378_appinit.c index 6f7e8b194f6..ed9ee4910ab 100644 --- a/configs/olimex-lpc2378/src/lpc2378_appinit.c +++ b/configs/olimex-lpc2378/src/lpc2378_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/olimex-lpc2378/src/lpc2378_appinit.c * - * Copyright (C) 2010 Rommel Marcelo. All rights reserved. + * Copyright (C) 2010, 2016 Rommel Marcelo. All rights reserved. * Author: Rommel Marcelo * * This is part of the NuttX RTOS and based on the LPC2148 port: @@ -88,11 +88,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/olimex-stm32-h405/include/board.h b/configs/olimex-stm32-h405/include/board.h index 462d34751d8..86d98da3fab 100644 --- a/configs/olimex-stm32-h405/include/board.h +++ b/configs/olimex-stm32-h405/include/board.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/olimex-stm32-h405/include/board.h * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -129,8 +129,14 @@ * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* LED definitions ******************************************************************/ /* If CONFIG_ARCH_LEDS is not defined, then the user can control the status LED in any diff --git a/configs/olimex-stm32-h405/src/stm32_appinit.c b/configs/olimex-stm32-h405/src/stm32_appinit.c index 623d9e34289..776b5ffa5c3 100644 --- a/configs/olimex-stm32-h405/src/stm32_appinit.c +++ b/configs/olimex-stm32-h405/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/olimex-stm32-h405/src/stm32_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -73,7 +73,9 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * * CONFIG_LIB_BOARDCTL=y : * Called from the NSH library @@ -82,9 +84,24 @@ * CONFIG_LIB_BOARDCTL=n : * Called from board_initialize(). * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(CONFIG_CAN) || defined(CONFIG_ADC) int ret; diff --git a/configs/olimex-stm32-h405/src/stm32_boot.c b/configs/olimex-stm32-h405/src/stm32_boot.c index f057314fb49..7332b8a4ef1 100644 --- a/configs/olimex-stm32-h405/src/stm32_boot.c +++ b/configs/olimex-stm32-h405/src/stm32_boot.c @@ -118,7 +118,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - board_app_initialize(); + board_app_initialize(0); #endif } #endif diff --git a/configs/olimex-stm32-h405/usbnsh/defconfig b/configs/olimex-stm32-h405/usbnsh/defconfig index 4b3b04b27bd..5ba6d946fc5 100644 --- a/configs/olimex-stm32-h405/usbnsh/defconfig +++ b/configs/olimex-stm32-h405/usbnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -245,6 +250,7 @@ CONFIG_CAN_TSEG2=8 # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set CONFIG_ARCH_CHIP_STM32F405RG=y # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -450,13 +456,17 @@ CONFIG_STM32_ADC1_TIMTRIG=0 # ADC Configuration # CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -746,33 +756,28 @@ CONFIG_ADC_FIFOSIZE=8 CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -826,8 +831,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -955,6 +960,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1100,6 +1107,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/olimex-stm32-h407/include/board.h b/configs/olimex-stm32-h407/include/board.h index a116f5bb65a..9418619164f 100644 --- a/configs/olimex-stm32-h407/include/board.h +++ b/configs/olimex-stm32-h407/include/board.h @@ -164,8 +164,14 @@ * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/olimex-stm32-h407/nsh/defconfig b/configs/olimex-stm32-h407/nsh/defconfig index edcd8070ec2..808193295bd 100644 --- a/configs/olimex-stm32-h407/nsh/defconfig +++ b/configs/olimex-stm32-h407/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -434,13 +440,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -706,33 +716,28 @@ CONFIG_SPI=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -884,6 +889,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -972,7 +979,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1010,6 +1016,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/olimex-stm32-h407/src/stm32_appinit.c b/configs/olimex-stm32-h407/src/stm32_appinit.c index e67ab3138bb..6f0cd2dd64a 100644 --- a/configs/olimex-stm32-h407/src/stm32_appinit.c +++ b/configs/olimex-stm32-h407/src/stm32_appinit.c @@ -71,16 +71,33 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * * CONFIG_LIB_BOARDCTL=y: * If CONFIG_NSH_ARCHINITIALIZE=y: * Called from the NSH library (or other application) * Otherse, assumed to be called from some other application. * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return stm32_bringup(); } diff --git a/configs/olimex-stm32-p107/include/board.h b/configs/olimex-stm32-p107/include/board.h index e82a41cb1ca..c6d0aa873b7 100644 --- a/configs/olimex-stm32-p107/include/board.h +++ b/configs/olimex-stm32-p107/include/board.h @@ -98,14 +98,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* MCO output driven by PLL3. From above, we already have PLL3 input frequency as: * diff --git a/configs/olimex-stm32-p107/nsh/defconfig b/configs/olimex-stm32-p107/nsh/defconfig index b867a39067d..5d921f8c5c4 100644 --- a/configs/olimex-stm32-p107/nsh/defconfig +++ b/configs/olimex-stm32-p107/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -196,6 +201,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -240,6 +246,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -403,19 +410,35 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -680,7 +703,12 @@ CONFIG_ARCH_HAVE_I2CRESET=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -718,10 +746,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -773,33 +803,28 @@ CONFIG_ETH0_PHY_KS8721=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -1053,6 +1078,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=8 @@ -1095,14 +1122,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1112,17 +1140,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1130,8 +1158,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1139,16 +1167,15 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # @@ -1166,8 +1193,8 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1180,21 +1207,22 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set # CONFIG_NETUTILS_TELNETD is not set CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1296,6 +1324,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1328,13 +1357,13 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1343,6 +1372,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-stm32-p207/include/board.h b/configs/olimex-stm32-p207/include/board.h index c0005369054..62cb1437553 100644 --- a/configs/olimex-stm32-p207/include/board.h +++ b/configs/olimex-stm32-p207/include/board.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/olimex-stm32-p207/include/board.h * - * Copyright (C) 2009, 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -129,8 +129,14 @@ * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* LED definitions ******************************************************************/ /* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any diff --git a/configs/olimex-stm32-p207/nsh/defconfig b/configs/olimex-stm32-p207/nsh/defconfig index 8e72e8d52a5..645352677cc 100644 --- a/configs/olimex-stm32-p207/nsh/defconfig +++ b/configs/olimex-stm32-p207/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -203,6 +208,7 @@ CONFIG_CAN_TSEG2=8 # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -247,6 +253,7 @@ CONFIG_ARCH_CHIP_STM32F207ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -429,6 +436,10 @@ CONFIG_STM32_JTAG_SW_ENABLE=y CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_PWM is not set CONFIG_STM32_TIM1_ADC=y CONFIG_STM32_TIM1_ADC1=y @@ -451,13 +462,25 @@ CONFIG_STM32_ADC1_TIMTRIG=0 # ADC Configuration # CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -753,7 +776,12 @@ CONFIG_ADC_FIFOSIZE=8 # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -813,33 +841,28 @@ CONFIG_ETH0_PHY_KS8721=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1102,6 +1125,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=8 @@ -1164,20 +1189,22 @@ CONFIG_EXAMPLES_BUTTONS_NAME4="Button 4" CONFIG_EXAMPLES_BUTTONS_NAME5="Button 5" CONFIG_EXAMPLES_BUTTONS_NAME6="Button 6" CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" +# CONFIG_EXAMPLES_CAN is not set # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1188,17 +1215,17 @@ CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1206,8 +1233,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1215,11 +1242,10 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -1241,8 +1267,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1254,18 +1280,19 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set # CONFIG_NETUTILS_TELNETD is not set # CONFIG_NETUTILS_TFTPC is not set -CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_WEBCLIENT is not set # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1367,6 +1394,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1399,12 +1427,12 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1413,6 +1441,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/olimex-stm32-p207/src/stm32_appinit.c b/configs/olimex-stm32-p207/src/stm32_appinit.c index 01f6362c344..695cc0607b4 100644 --- a/configs/olimex-stm32-p207/src/stm32_appinit.c +++ b/configs/olimex-stm32-p207/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/olimex-stm32-p207/src/stm32_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -102,7 +102,9 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * * CONFIG_LIB_BOARDCTL=y : * Called from the NSH library @@ -111,9 +113,24 @@ * CONFIG_LIB_BOARDCTL=n : * Called from board_initialize(). * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || defined(CONFIG_ADC) int ret; diff --git a/configs/olimex-stm32-p207/src/stm32_boot.c b/configs/olimex-stm32-p207/src/stm32_boot.c index 7234449534e..1d81c621094 100644 --- a/configs/olimex-stm32-p207/src/stm32_boot.c +++ b/configs/olimex-stm32-p207/src/stm32_boot.c @@ -47,14 +47,6 @@ #include "olimex-stm32-p207.h" -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - -/************************************************************************************ - * Private Functions - ************************************************************************************/ - /************************************************************************************ * Public Functions ************************************************************************************/ @@ -119,7 +111,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - board_app_initialize(); + board_app_initialize(0); #endif } #endif diff --git a/configs/olimex-strp711/nettest/defconfig b/configs/olimex-strp711/nettest/defconfig index f8c48131aa7..2f698cc8bdc 100644 --- a/configs/olimex-strp711/nettest/defconfig +++ b/configs/olimex-strp711/nettest/defconfig @@ -413,28 +413,28 @@ CONFIG_ENC28J60_STATS=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/olimex-strp711/nsh/defconfig b/configs/olimex-strp711/nsh/defconfig index d45d72b3ced..790273c4220 100644 --- a/configs/olimex-strp711/nsh/defconfig +++ b/configs/olimex-strp711/nsh/defconfig @@ -324,8 +324,8 @@ CONFIG_MMCSD_SPIMODE=0 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y # # USART Configuration diff --git a/configs/olimex-strp711/src/str71_appinit.c b/configs/olimex-strp711/src/str71_appinit.c index 44cca74773f..e064cd59883 100644 --- a/configs/olimex-strp711/src/str71_appinit.c +++ b/configs/olimex-strp711/src/str71_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/olimex-strp711/src/str71_appinit.c * - * Copyright (C) 2009-2010 Gregory Nutt. All rights reserved. + * Copyright (C) 2009-2010, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -105,11 +105,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD FAR struct spi_dev_s *spi; diff --git a/configs/olimexino-stm32/can/defconfig b/configs/olimexino-stm32/can/defconfig index b8c9da6ec56..866967575ef 100644 --- a/configs/olimexino-stm32/can/defconfig +++ b/configs/olimexino-stm32/can/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -243,6 +248,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -431,13 +437,17 @@ CONFIG_STM32_FORCEPOWER=y # ADC Configuration # CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set CONFIG_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_FLOWCONTROL_BROKEN=y +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -743,33 +753,28 @@ CONFIG_ANALOG=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -924,6 +929,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -958,6 +965,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768 # # CAN Utilities # +# CONFIG_CANUTILS_LIBCANARD is not set # # Examples @@ -1059,6 +1067,7 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/olimexino-stm32/composite/defconfig b/configs/olimexino-stm32/composite/defconfig index 3dfff329ac8..bb7055ac686 100644 --- a/configs/olimexino-stm32/composite/defconfig +++ b/configs/olimexino-stm32/composite/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -426,16 +432,22 @@ CONFIG_STM32_DMACAPABLE=y # # CONFIG_STM32_ADC1_DMA is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_USART1_RXDMA is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_USART2_RXDMA is not set CONFIG_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_FLOWCONTROL_BROKEN=y +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -745,34 +757,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -853,8 +859,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=64 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=64 -CONFIG_CDCACM_NWRREQS=2 CONFIG_CDCACM_NRDREQS=2 +CONFIG_CDCACM_NWRREQS=2 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=96 CONFIG_CDCACM_TXBUFSIZE=96 @@ -1011,6 +1017,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1045,7 +1053,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768 # # CAN Utilities # -# CONFIG_CANUTILS_UAVCAN is not set +# CONFIG_CANUTILS_LIBUAVCAN is not set # # Examples @@ -1153,6 +1161,7 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/olimexino-stm32/include/board.h b/configs/olimexino-stm32/include/board.h index ac695f9710d..997dcfe7bea 100644 --- a/configs/olimexino-stm32/include/board.h +++ b/configs/olimexino-stm32/include/board.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/olimexino-stm32/include/board.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * David Sidrane * @@ -102,14 +102,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ @@ -119,8 +119,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* Buttons *************************************************************************/ diff --git a/configs/olimexino-stm32/nsh/defconfig b/configs/olimexino-stm32/nsh/defconfig index 63b15cb7fcb..bff7b461199 100644 --- a/configs/olimexino-stm32/nsh/defconfig +++ b/configs/olimexino-stm32/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -426,16 +432,22 @@ CONFIG_STM32_DMACAPABLE=y # # CONFIG_STM32_ADC1_DMA is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_USART1_RXDMA is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_USART2_RXDMA is not set CONFIG_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_FLOWCONTROL_BROKEN=y +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -743,34 +755,28 @@ CONFIG_MMCSD_SPIMODE=0 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -939,6 +945,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -973,7 +981,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768 # # CAN Utilities # -# CONFIG_CANUTILS_UAVCAN is not set +# CONFIG_CANUTILS_LIBUAVCAN is not set # # Examples @@ -1081,6 +1089,7 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/olimexino-stm32/smallnsh/defconfig b/configs/olimexino-stm32/smallnsh/defconfig index fbaa9d791eb..1429b4c2b49 100644 --- a/configs/olimexino-stm32/smallnsh/defconfig +++ b/configs/olimexino-stm32/smallnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -243,6 +248,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -423,13 +429,17 @@ CONFIG_STM32_FORCEPOWER=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set CONFIG_SERIAL_DISABLE_REORDERING=y # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -721,33 +731,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -892,6 +897,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -925,6 +932,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768 # # CAN Utilities # +# CONFIG_CANUTILS_LIBCANARD is not set # # Examples @@ -1021,6 +1029,7 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/olimexino-stm32/src/stm32_appinit.c b/configs/olimexino-stm32/src/stm32_appinit.c index c7de1858b3a..e9cd7fe0b4d 100644 --- a/configs/olimexino-stm32/src/stm32_appinit.c +++ b/configs/olimexino-stm32/src/stm32_appinit.c @@ -68,11 +68,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret = OK; diff --git a/configs/olimexino-stm32/src/stm32_boot.c b/configs/olimexino-stm32/src/stm32_boot.c index e7f0b807e8a..1d8d40bb3fb 100644 --- a/configs/olimexino-stm32/src/stm32_boot.c +++ b/configs/olimexino-stm32/src/stm32_boot.c @@ -136,7 +136,7 @@ void board_initialize(void) * space but the initialization function must run in kernel space. */ - board_app_initialize(); + board_app_initialize(0); #endif #if defined(CONFIG_USBDEV) diff --git a/configs/olimexino-stm32/tiny/defconfig b/configs/olimexino-stm32/tiny/defconfig index d4c89d090a7..4fe4bb5a901 100644 --- a/configs/olimexino-stm32/tiny/defconfig +++ b/configs/olimexino-stm32/tiny/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -243,6 +248,7 @@ CONFIG_ARCH_CHIP_STM32F103RB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -423,13 +429,17 @@ CONFIG_STM32_FORCEPOWER=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set CONFIG_SERIAL_DISABLE_REORDERING=y CONFIG_STM32_FLOWCONTROL_BROKEN=y +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -725,33 +735,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -889,6 +894,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -922,6 +929,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=768 # # CAN Utilities # +# CONFIG_CANUTILS_LIBCANARD is not set # # Examples @@ -1017,6 +1025,7 @@ CONFIG_EXAMPLES_CAN_READWRITE=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/open1788/knsh/defconfig b/configs/open1788/knsh/defconfig index 9081e8dba9e..566df000ae0 100644 --- a/configs/open1788/knsh/defconfig +++ b/configs/open1788/knsh/defconfig @@ -426,27 +426,27 @@ CONFIG_PIPES=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/open1788/nsh/defconfig b/configs/open1788/nsh/defconfig index 13381a0bb9f..82a8f975de5 100644 --- a/configs/open1788/nsh/defconfig +++ b/configs/open1788/nsh/defconfig @@ -463,28 +463,28 @@ CONFIG_PIPES=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/open1788/nxlines/defconfig b/configs/open1788/nxlines/defconfig index 93dd9d965f7..486cc41cb0f 100644 --- a/configs/open1788/nxlines/defconfig +++ b/configs/open1788/nxlines/defconfig @@ -367,7 +367,7 @@ CONFIG_PIPES=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART0=y +CONFIG_UART0_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/open1788/src/lpc17_appinit.c b/configs/open1788/src/lpc17_appinit.c index 53dd70aeb9d..d1ccc94df21 100644 --- a/configs/open1788/src/lpc17_appinit.c +++ b/configs/open1788/src/lpc17_appinit.c @@ -1,8 +1,7 @@ /**************************************************************************** * config/open1788/src/lpc17_appinit.c - * arch/arm/src/board/lpc17_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -362,7 +361,9 @@ static int nsh_usbhostinitialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization for NSH. + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * * CONFIG_LIB_BOARDCTL=y : * Called from the NSH library @@ -371,9 +372,24 @@ static int nsh_usbhostinitialize(void) * CONFIG_LIB_BOARDCTL=n: * Called from board_initialize(). * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret; diff --git a/configs/open1788/src/lpc17_boardinitialize.c b/configs/open1788/src/lpc17_boardinitialize.c index 201e6ff210e..0a4a3d11a0e 100644 --- a/configs/open1788/src/lpc17_boardinitialize.c +++ b/configs/open1788/src/lpc17_boardinitialize.c @@ -136,7 +136,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif diff --git a/configs/pcblogic-pic32mx/nsh/defconfig b/configs/pcblogic-pic32mx/nsh/defconfig index 35dc7761453..7a3de04abac 100644 --- a/configs/pcblogic-pic32mx/nsh/defconfig +++ b/configs/pcblogic-pic32mx/nsh/defconfig @@ -472,28 +472,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/pcblogic-pic32mx/src/pic32mx_appinit.c b/configs/pcblogic-pic32mx/src/pic32mx_appinit.c index 97baa0009ea..414d4b395b2 100644 --- a/configs/pcblogic-pic32mx/src/pic32mx_appinit.c +++ b/configs/pcblogic-pic32mx/src/pic32mx_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/pcblocic-pic32mx/src/pic32mx_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -65,11 +65,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret = OK; diff --git a/configs/pcduino-a10/nsh/defconfig b/configs/pcduino-a10/nsh/defconfig index a2bf40bf07f..95833160ff6 100644 --- a/configs/pcduino-a10/nsh/defconfig +++ b/configs/pcduino-a10/nsh/defconfig @@ -416,27 +416,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/pcduino-a10/src/a1x_boot.c b/configs/pcduino-a10/src/a1x_boot.c index 951e8a87750..265d7287319 100644 --- a/configs/pcduino-a10/src/a1x_boot.c +++ b/configs/pcduino-a10/src/a1x_boot.c @@ -96,7 +96,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/pic32mx-starterkit/nsh/defconfig b/configs/pic32mx-starterkit/nsh/defconfig index 2ed828d4892..f337701d2ec 100644 --- a/configs/pic32mx-starterkit/nsh/defconfig +++ b/configs/pic32mx-starterkit/nsh/defconfig @@ -511,28 +511,28 @@ CONFIG_MTD=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration @@ -889,7 +889,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/pic32mx-starterkit/nsh2/defconfig b/configs/pic32mx-starterkit/nsh2/defconfig index d6d57e13e88..99d95697952 100644 --- a/configs/pic32mx-starterkit/nsh2/defconfig +++ b/configs/pic32mx-starterkit/nsh2/defconfig @@ -41,6 +41,7 @@ CONFIG_INTELHEX_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -77,7 +78,6 @@ CONFIG_NET_NRXDESC=7 CONFIG_NET_PRIORITY=28 # CONFIG_NET_WOL is not set # CONFIG_NET_HASH is not set -# CONFIG_PIC32MX_MULTICAST is not set CONFIG_ARCH_CHIP_PIC32MX=y # CONFIG_ARCH_CHIP_PIC32MZ is not set CONFIG_ARCH_MIPS32=y @@ -242,6 +242,7 @@ CONFIG_PIC32MX_T1PRIO=16 # # PIC32MX PHY/Ethernet device driver settings # +# CONFIG_PIC32MX_MULTICAST is not set # # Device Configuration 0 (DEVCFG0) @@ -276,6 +277,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set # CONFIG_ARCH_HAVE_MPU is not set @@ -431,9 +433,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -482,7 +485,20 @@ CONFIG_DEV_NULL=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -491,6 +507,7 @@ CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_HAVECARDDETECT is not set # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set CONFIG_MTD=y # @@ -513,10 +530,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -570,32 +589,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # CONFIG_MCU_SERIAL is not set # CONFIG_STANDARD_SERIAL is not set # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -762,7 +777,9 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -797,6 +814,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -842,6 +863,7 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_ARCH_HAVE_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -849,6 +871,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -880,18 +903,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -901,41 +926,50 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -948,8 +982,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -959,29 +993,32 @@ CONFIG_EXAMPLES_NSH=y # # Network Utilities # +# CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -1001,6 +1038,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1043,6 +1081,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1075,6 +1114,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1101,6 +1141,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1115,14 +1157,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1131,5 +1172,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pic32mx-starterkit/src/pic32mx_appinit.c b/configs/pic32mx-starterkit/src/pic32mx_appinit.c index 64236307337..64bba54fc73 100644 --- a/configs/pic32mx-starterkit/src/pic32mx_appinit.c +++ b/configs/pic32mx-starterkit/src/pic32mx_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/pic32mx-starterkit/src/pic32mx_appinit.c * - * Copyright (C) 2011, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -351,11 +351,28 @@ static int nsh_usbdevinitialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret; diff --git a/configs/pic32mx7mmb/nsh/defconfig b/configs/pic32mx7mmb/nsh/defconfig index 64bd042c81a..13adb9973c8 100644 --- a/configs/pic32mx7mmb/nsh/defconfig +++ b/configs/pic32mx7mmb/nsh/defconfig @@ -41,6 +41,7 @@ CONFIG_INTELHEX_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -77,7 +78,6 @@ CONFIG_NET_NRXDESC=7 CONFIG_NET_PRIORITY=28 # CONFIG_NET_WOL is not set # CONFIG_NET_HASH is not set -# CONFIG_PIC32MX_MULTICAST is not set CONFIG_ARCH_CHIP_PIC32MX=y # CONFIG_ARCH_CHIP_PIC32MZ is not set CONFIG_ARCH_MIPS32=y @@ -250,6 +250,7 @@ CONFIG_PIC32MX_USBPRIO=16 # # PIC32MX PHY/Ethernet device driver settings # +# CONFIG_PIC32MX_MULTICAST is not set # # Device Configuration 0 (DEVCFG0) @@ -284,6 +285,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set # CONFIG_ARCH_HAVE_MPU is not set @@ -441,9 +443,10 @@ CONFIG_SIG_SIGCONDTIMEDOUT=16 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # # CONFIG_SCHED_WORKQUEUE is not set # CONFIG_SCHED_HPWORK is not set @@ -484,6 +487,8 @@ CONFIG_SPI=y # CONFIG_SPI_CMDDATA is not set # CONFIG_SPI_CALLBACK is not set # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -497,7 +502,20 @@ CONFIG_SPI=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -509,6 +527,7 @@ CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set CONFIG_MTD=y # @@ -531,10 +550,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -588,32 +609,28 @@ CONFIG_ETH0_PHY_LAN8720=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -825,7 +842,9 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -859,6 +878,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -904,6 +927,7 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_ARCH_HAVE_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -911,6 +935,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=4 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -942,18 +967,20 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -963,40 +990,49 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -1009,8 +1045,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1023,25 +1059,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -1061,6 +1099,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1103,6 +1142,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1135,6 +1175,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1161,6 +1202,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1175,14 +1218,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1191,7 +1233,7 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set CONFIG_SYSTEM_USBMSC=y CONFIG_SYSTEM_USBMSC_NLUNS=1 CONFIG_SYSTEM_USBMSC_DEVMINOR1=0 @@ -1203,4 +1245,5 @@ CONFIG_SYSTEM_USBMSC_DEVPATH3="/dev/mmcsd2" # CONFIG_SYSTEM_USBMSC_DEBUGMM is not set CONFIG_SYSTEM_USBMSC_CMD_STACKSIZE=768 CONFIG_SYSTEM_USBMSC_CMD_PRIORITY=100 +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/pic32mx7mmb/src/pic32_appinit.c b/configs/pic32mx7mmb/src/pic32_appinit.c index 0970e277817..8c62c9a766f 100644 --- a/configs/pic32mx7mmb/src/pic32_appinit.c +++ b/configs/pic32mx7mmb/src/pic32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/pic32mx7mmb/src/pic32_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -361,11 +361,28 @@ static int nsh_usbdevinitialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret; diff --git a/configs/pic32mz-starterkit/nsh/defconfig b/configs/pic32mz-starterkit/nsh/defconfig index 983aa750862..4948a286e67 100644 --- a/configs/pic32mz-starterkit/nsh/defconfig +++ b/configs/pic32mz-starterkit/nsh/defconfig @@ -438,28 +438,28 @@ CONFIG_MTD=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration @@ -816,7 +816,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/pic32mz-starterkit/src/pic32mz_appinit.c b/configs/pic32mz-starterkit/src/pic32mz_appinit.c index a312b0e3272..0b3a3dc8238 100644 --- a/configs/pic32mz-starterkit/src/pic32mz_appinit.c +++ b/configs/pic32mz-starterkit/src/pic32mz_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/pic32mz-starterkit/src/pic32mz_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -53,11 +53,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* If CONFIG_BOARD_INITIALIZE is selected then board initialization was * already performed in board_initialize. diff --git a/configs/pirelli_dpl10/nsh_highram/defconfig b/configs/pirelli_dpl10/nsh_highram/defconfig index c24e5a51ec7..d8eac38010b 100644 --- a/configs/pirelli_dpl10/nsh_highram/defconfig +++ b/configs/pirelli_dpl10/nsh_highram/defconfig @@ -369,28 +369,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/pirelli_dpl10/src/boot.c b/configs/pirelli_dpl10/src/boot.c index 4cd07fb0a69..38d1fe8ac2b 100644 --- a/configs/pirelli_dpl10/src/boot.c +++ b/configs/pirelli_dpl10/src/boot.c @@ -44,10 +44,33 @@ * Public Functions ****************************************************************************/ -/* Application initialization stub for boardctl() */ +/**************************************************************************** + * Name: board_app_initialize + * + * Description: + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ #ifdef CONFIG_LIB_BOARDCTL -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return 0; } diff --git a/configs/qemu-i486/nsh/defconfig b/configs/qemu-i486/nsh/defconfig index 68cf8bcff9b..c07faea1dac 100644 --- a/configs/qemu-i486/nsh/defconfig +++ b/configs/qemu-i486/nsh/defconfig @@ -264,27 +264,27 @@ CONFIG_16550_SUPRESS_CONFIG=y CONFIG_16550_REGINCR=1 CONFIG_16550_REGWIDTH=8 CONFIG_16550_ADDRWIDTH=16 -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/qemu-i486/ostest/defconfig b/configs/qemu-i486/ostest/defconfig index 75ebb89269f..9306bec0db8 100644 --- a/configs/qemu-i486/ostest/defconfig +++ b/configs/qemu-i486/ostest/defconfig @@ -242,27 +242,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/rgmp/arm/default/defconfig b/configs/rgmp/arm/default/defconfig index 5089009ade1..4b1bf3a25ca 100644 --- a/configs/rgmp/arm/default/defconfig +++ b/configs/rgmp/arm/default/defconfig @@ -243,27 +243,27 @@ CONFIG_VNET_NINTERFACES=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/rgmp/arm/nsh/defconfig b/configs/rgmp/arm/nsh/defconfig index e6422b47095..1d9e1737409 100644 --- a/configs/rgmp/arm/nsh/defconfig +++ b/configs/rgmp/arm/nsh/defconfig @@ -265,27 +265,27 @@ CONFIG_VNET_NINTERFACES=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/rgmp/x86/cxxtest/defconfig b/configs/rgmp/x86/cxxtest/defconfig index 80f6559d66e..40ff45293e5 100644 --- a/configs/rgmp/x86/cxxtest/defconfig +++ b/configs/rgmp/x86/cxxtest/defconfig @@ -272,27 +272,27 @@ CONFIG_VNET_NINTERFACES=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/rgmp/x86/default/defconfig b/configs/rgmp/x86/default/defconfig index 58c51f727bc..6f10a9ed0e4 100644 --- a/configs/rgmp/x86/default/defconfig +++ b/configs/rgmp/x86/default/defconfig @@ -251,27 +251,27 @@ CONFIG_VNET_NINTERFACES=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/rgmp/x86/helloxx/defconfig b/configs/rgmp/x86/helloxx/defconfig index d7f663d4cb6..039dd3aa9c7 100644 --- a/configs/rgmp/x86/helloxx/defconfig +++ b/configs/rgmp/x86/helloxx/defconfig @@ -272,27 +272,27 @@ CONFIG_VNET_NINTERFACES=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/rgmp/x86/nsh/defconfig b/configs/rgmp/x86/nsh/defconfig index 74022b3e8d6..8723d56a26d 100644 --- a/configs/rgmp/x86/nsh/defconfig +++ b/configs/rgmp/x86/nsh/defconfig @@ -273,27 +273,27 @@ CONFIG_VNET_NINTERFACES=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sabre-6quad/README.txt b/configs/sabre-6quad/README.txt index 6999763c0a2..122f28e8d46 100644 --- a/configs/sabre-6quad/README.txt +++ b/configs/sabre-6quad/README.txt @@ -20,56 +20,109 @@ Status ====== 2016-02-28: The i.MX6Q port is just beginning. A few files have been -populated with the port is a long way from being complete or even ready to -begin any kind of testing. + populated with the port is a long way from being complete or even ready to + begin any kind of testing. 2016-03-12: The i.MX6Q port is code complete including initial -implementation of logic needed for CONFIG_SMP=y . There is no clock -configuration logic. This is probably not an issue if we are loaded into -SDRAM by a bootloader (because we cannot change the clocking anyway in -that case). + implementation of logic needed for CONFIG_SMP=y . There is no clock + configuration logic. This is probably not an issue if we are loaded into + SDRAM by a bootloader (because we cannot change the clocking anyway in + that case). -There is a lot of testing that could be done but, unfortunately, I still -have no i.MX6 hardware to test on. + There is a lot of testing that could be done but, unfortunately, I still + have no i.MX6 hardware to test on. -In additional to the unexpected issues, I do expect to run into some -cache coherency issues when I get to testing an SMP configuration. + In additional to the unexpected issues, I do expect to run into some + cache coherency issues when I get to testing an SMP configuration. 2016-03-28: I now have a used MCIMX6Q-SDB which is similar to the target -configuration described below except that it does not have the 10.1" LVDS -display. Next step: Figure out how to run a copy of NuttX using U-Boot. + configuration described below except that it does not have the 10.1" LVDS + display. Next step: Figure out how to run a copy of NuttX using U-Boot. 2016-03-31: Most all of the boot of the NSH configuration seems to be -working. It gets to NSH and NSH appears to run normally. Non-interrupt -driver serial output to the VCOM console is working (llsyslog). However, -there does not appear to be any interrupt activity: No timer interrupts, -no interrupt driver serial console output (syslog, printf). + working. It gets to NSH and NSH appears to run normally. Non-interrupt + driver serial output to the VCOM console is working (llsyslog). However, + there does not appear to be any interrupt activity: No timer interrupts, + no interrupt driver serial console output (syslog, printf). 2016-05-16: I now get serial interrupts (but not timer interrupts). This -involves a few changes to GIC bit settings that I do not fully understand. -With this change, the NSH serial console works: + involves a few changes to GIC bit settings that I do not fully understand. + With this change, the NSH serial console works: - MX6Q SABRESD U-Boot > ABEFGHILMN + MX6Q SABRESD U-Boot > ABEFGHILMN - NuttShell (NSH) - nsh> + NuttShell (NSH) + nsh> -But there are still no timer interrupts. LEDs do not appear to be working. + But there are still no timer interrupts. LEDs do not appear to be working. 2016-05-17: Timer interrupts now work. This turned out to be just a minor -bit setting error in the timer configuration. LEDs were not working simply -because board_autoled_initialize() was not being called in the board startup -logic. + bit setting error in the timer configuration. LEDs were not working simply + because board_autoled_initialize() was not being called in the board startup + logic. -At this point, I would say that the basic NSH port is complete. + At this point, I would say that the basic NSH port is complete. 2016-05-18: Started looking at the SMP configuration. Initially, I verfied -that the NSH configuration works with CONFIG_SMP_NCPUS=1. Not a very -interesting case, but this does exercise a lot of the basic SMP logic. + that the NSH configuration works with CONFIG_SMP_NCPUS=1. Not a very + interesting case, but this does exercise a lot of the basic SMP logic. -When more than one CPU is configured, then there are certain failures that -appear to be stack corruption problem. See the open issues below under -SMP. + When more than one CPU is configured, then there are certain failures that + appear to be stack corruption problem. See the open issues below under + SMP. + +2016-05-22: In a simple NSH case, SMP does not seem to be working. But there + are known SMP open issues so I assume if the tasking were stressed more there + would be additional failures. See the open issues below under SMP. + + An smp configuration was added. This is not quite the same as the + configuration that I used for testing. I enabled DEBUG output, ran with + only 2 CPUS, and disabled the RAMLOG: + + +CONFIG_DEBUG=y + +CONFIG_DEBUG_VERBOSE=y + +CONFIG_DEBUG_SCHED=y + +CONFIG_DEBUG_SYMBOLS=y + + -CONFIG_DEBUG_FULLOPT=y + +CONFIG_DEBUG_NOOPT=y + + -CONFIG_SMP_NCPUS=4 + +CONFIG_SMP_NCPUS=2 + + -CONFIG_RAMLOG=y + -CONFIG_RAMLOG_SYSLOG=y + -CONFIG_RAMLOG_BUFSIZE=16384 + -CONFIG_RAMLOG_NONBLOCKING=y + -CONFIG_RAMLOG_NPOLLWAITERS=4 + -CONFIG_SYSLOG=y + + I would also disable debug output from CPU0 so that I could better see the + debug output from CPU1: + + $ diff -u libc/syslog/lib_lowsyslog.c libc/syslog/lib_lowsyslog.c.SAVE + --- libc/syslog/lib_lowsyslog.c 2016-05-22 14:56:35.130096500 -0600 + +++ libc/syslog/lib_lowsyslog.c.SAVE 2016-05-20 13:36:22.588330100 -0600 + @@ -126,7 +126,0 @@ + { + va_list ap; + int ret; + +if (up_cpu_index() == 0) return 17; // REMOVE ME + + /* Let lowvsyslog do the work */ + + va_start(ap, fmt); + + $ diff -u libc/syslog/lib_syslog.c libc/syslog/lib_syslog.c.SAVE + --- libc/syslog/lib_syslog.c 2016-05-22 14:56:35.156098100 -0600 + +++ libc/syslog/lib_syslog.c.SAVE 2016-05-20 13:36:15.331284000 -0600 + @@ -192,6 +192,7 @@ + { + va_list ap; + int ret; + +if (up_cpu_index() == 0) return 17; // REMOVE ME + + /* Let vsyslog do the work */ Platform Features ================= @@ -502,12 +555,17 @@ Open Issues: PMD_SECT_DOM(0) | PMD_SECT_XN) #define MMU_STRONGLY_ORDERED (PMD_TYPE_SECT | PMD_SECT_AP_RW1 | \ -3. Assertions. On a fatal assertions, other CPUs need to be stopped. +3. Assertions. On a fatal assertions, other CPUs need to be stopped. The SCR, + however, only supports disabling CPUs 1 through 3. Perhaps if the assertion + occurs on CPUn, n > 0, then it should use and SGI to perform the assertion + on CPU0 always. From CPU0, CPU1-3 can be disabled. 4. Caching probabaly interferes with spinlocks as they are currently implemented. Waiting on a cached copy of the spinlock may result in a hang or a failure to wait. +5. Do spinlocks need to go into a special "strongly ordered" memory region? + Configurations ============== @@ -598,3 +656,16 @@ Configuration sub-directories File Systems: CONFIG_SYSLOG Device Drivers: CONFIG_RAMLOG + + smp + --- + This is a configuration of testing the SMP configuration. It is + essentially equivalent to the SMP configuration except has SMP enabled. + + NOTES: + + 1. See the notest for the nsh configuration. Since this configuration + is essentially the same all of those comments apply. + + 2. SMP is not fully functional. See the STATUS and SMP sections above + for detailed SMP-related issues. diff --git a/configs/sabre-6quad/nsh/defconfig b/configs/sabre-6quad/nsh/defconfig index d5726e1d2f6..25b14c99ff4 100644 --- a/configs/sabre-6quad/nsh/defconfig +++ b/configs/sabre-6quad/nsh/defconfig @@ -121,6 +121,8 @@ CONFIG_ARCH_CORTEXA9=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="imx6" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y @@ -426,28 +428,28 @@ CONFIG_DEV_ZERO=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration @@ -517,7 +519,7 @@ CONFIG_RAMLOG_NPOLLWAITERS=4 # CONFIG_DISABLE_MOUNTPOINT is not set # CONFIG_FS_AUTOMOUNTER is not set # CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set -# CONFIG_FS_READABLE is not set +CONFIG_FS_READABLE=y # CONFIG_FS_WRITABLE is not set # CONFIG_FS_NAMED_SEMAPHORES is not set CONFIG_FS_MQUEUE_MPATH="/var/mqueue" @@ -528,7 +530,15 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue" # CONFIG_FS_TMPFS is not set # CONFIG_FS_SMARTFS is not set # CONFIG_FS_BINFS is not set -# CONFIG_FS_PROCFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set # CONFIG_FS_UNIONFS is not set # @@ -607,6 +617,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 CONFIG_ARCH_HAVE_TLS=y # CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set # # Non-standard Library Support @@ -701,6 +712,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # File System Utilities # # CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set # # GPS Utilities @@ -716,6 +728,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # Interpreters # +# CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set # CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set @@ -730,6 +743,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -812,6 +826,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_CMDOPT_DF_H is not set CONFIG_NSH_CODECS_BUFSIZE=128 # CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" CONFIG_NSH_FILEIOSIZE=512 # diff --git a/configs/sabre-6quad/nsh/setenv.sh b/configs/sabre-6quad/nsh/setenv.sh index cbdfc139bca..e6eae017974 100755 --- a/configs/sabre-6quad/nsh/setenv.sh +++ b/configs/sabre-6quad/nsh/setenv.sh @@ -1,5 +1,5 @@ #!/bin/bash -# configs/sabre-6quad/nsh/Make.defs +# configs/sabre-6quad/nsh/setenv.sh # # Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt diff --git a/configs/sabre-6quad/smp/Make.defs b/configs/sabre-6quad/smp/Make.defs new file mode 100644 index 00000000000..b5ba0e4111d --- /dev/null +++ b/configs/sabre-6quad/smp/Make.defs @@ -0,0 +1,134 @@ +############################################################################ +# configs/sabre-6quad/smp/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}$(DELIM)arch$(DELIM)arm$(DELIM)src$(DELIM)armv7-a$(DELIM)Toolchain.defs + +LDSCRIPT = dramboot.ld + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include}" -isystem "${shell cygpath -w $(TOPDIR)$(DELIM)include$(DELIM)cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + ARCHINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)$(DELIM)include -isystem $(TOPDIR)$(DELIM)include$(DELIM)cxx + ARCHSCRIPT = -T$(TOPDIR)$(DELIM)configs$(DELIM)$(CONFIG_ARCH_BOARD)$(DELIM)scripts$(DELIM)$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16 +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +# NXFLAT module definitions + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)$(DELIM)binfmt$(DELIM)libnxflat$(DELIM)gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +# ELF module definitions + +CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs +CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs + +LDELFFLAGS = -r -e main +ifeq ($(WINTOOL),y) + LDELFFLAGS += -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld}" +else + LDELFFLAGS += -T $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/gnu-elf.ld +endif + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = +ifeq ($(CONFIG_HOST_WINDOWS),y) + HOSTEXEEXT = .exe +else + HOSTEXEEXT = +endif + +ifeq ($(WINTOOL),y) + # Windows-native host tools + DIRLINK = $(TOPDIR)$(DELIM)tools$(DELIM)copydir.sh + DIRUNLINK = $(TOPDIR)$(DELIM)tools$(DELIM)unlink.sh + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkwindeps.sh +else + # Linux/Cygwin-native host tools + MKDEP = $(TOPDIR)$(DELIM)tools$(DELIM)mkdeps$(HOSTEXEEXT) +endif diff --git a/configs/sabre-6quad/smp/defconfig b/configs/sabre-6quad/smp/defconfig new file mode 100644 index 00000000000..2cd36db1274 --- /dev/null +++ b/configs/sabre-6quad/smp/defconfig @@ -0,0 +1,883 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +# CONFIG_HOST_LINUX is not set +# CONFIG_HOST_OSX is not set +CONFIG_HOST_WINDOWS=y +# CONFIG_HOST_OTHER is not set +# CONFIG_WINDOWS_NATIVE is not set +CONFIG_WINDOWS_CYGWIN=y +# CONFIG_WINDOWS_MSYS is not set +# CONFIG_WINDOWS_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +CONFIG_ARCH_CHIP_IMX6=y +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +CONFIG_ARCH_CORTEXA9=y +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-a" +CONFIG_ARCH_CHIP="imx6" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +CONFIG_ARCH_FPU=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_ARCH_TRUSTZONE_SECURE=y +# CONFIG_ARCH_TRUSTZONE_NONSECURE is not set +# CONFIG_ARCH_TRUSTZONE_BOTH is not set +# CONFIG_ARM_HAVE_MPU_UNIFIED is not set +CONFIG_ARCH_HAVE_LOWVECTORS=y +CONFIG_ARCH_LOWVECTORS=y +# CONFIG_ARCH_ROMPGTABLE is not set + +# +# ARMv7-A Configuration Options +# +CONFIG_ARMV7A_HAVE_GICv2=y +CONFIG_ARMV7A_HAVE_GTM=y +CONFIG_ARMV7A_HAVE_PTM=y +CONFIG_ARMV7A_HAVE_L2CC=y +CONFIG_ARMV7A_HAVE_L2CC_PL310=y + +# +# L2 Cache Configuration +# +# CONFIG_ARMV7A_L2CC_PL310 is not set +# CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW is not set +# CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM is not set +# CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL is not set +CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y +# CONFIG_ARMV7A_TOOLCHAIN_GNU_OABI is not set +# CONFIG_ARMV7A_DECODEFIQ is not set + +# +# iMX.6 Chip Selection +# +# CONFIG_ARCH_CHIP_IMX6_6SOLOLITE is not set +# CONFIG_ARCH_CHIP_IMX6_6SOLO is not set +# CONFIG_ARCH_CHIP_IMX6_6DUALLITE is not set +# CONFIG_ARCH_CHIP_IMX6_6DUAL is not set +CONFIG_ARCH_CHIP_IMX6_6QUAD=y +# CONFIG_IMX6_HAVE_HDCP is not set + +# +# iMX.6 Peripheral Selection +# +CONFIG_IMX6_UART1=y +# CONFIG_IMX6_UART2 is not set +# CONFIG_IMX6_UART3 is not set +# CONFIG_IMX6_UART4 is not set +# CONFIG_IMX6_UART5 is not set +# CONFIG_IMX6_SPI1 is not set +# CONFIG_IMX6_SPI2 is not set +CONFIG_IMX_DDR_SIZE=1073741824 +# CONFIG_IMX6_BOOT_OCRAM is not set +CONFIG_IMX6_BOOT_SDRAM=y +# CONFIG_IMX6_BOOT_NOR is not set +# CONFIG_IMX6_BOOT_SRAM is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +CONFIG_ARCH_HAVE_ADDRENV=y +CONFIG_ARCH_NEED_ADDRENV_MAPPING=y +CONFIG_ARCH_HAVE_MULTICPU=y +CONFIG_ARCH_HAVE_VFORK=y +CONFIG_ARCH_HAVE_MMU=y +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_USE_MMU=y +# CONFIG_ARCH_ADDRENV is not set +# CONFIG_PAGING is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=99369 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=2048 +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +# CONFIG_BOOT_RUNFROMFLASH is not set +# CONFIG_BOOT_RUNFROMISRAM is not set +CONFIG_BOOT_RUNFROMSDRAM=y +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x10000000 +CONFIG_RAM_VSTART=0x10000000 +CONFIG_RAM_SIZE=1073741824 +CONFIG_ARCH_HAVE_SDRAM=y + +# +# Board Selection +# +CONFIG_ARCH_BOARD_SABRE_6QUAD=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="sabre-6quad" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_ARCH_HAVE_BUTTONS=y +CONFIG_ARCH_BUTTONS=y +CONFIG_ARCH_HAVE_IRQBUTTONS=y +CONFIG_ARCH_IRQBUTTONS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2016 +CONFIG_START_MONTH=3 +CONFIG_START_DAY=1 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=32 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +CONFIG_SPINLOCK=y +CONFIG_SMP=y +CONFIG_SMP_NCPUS=4 +CONFIG_SMP_IDLETHREAD_STACKSIZE=2048 +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=31 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +# CONFIG_SDCLONE_DISABLE is not set +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 +CONFIG_SIG_SIGWORK=17 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +CONFIG_SCHED_WORKQUEUE=y +CONFIG_SCHED_HPWORK=y +CONFIG_SCHED_HPWORKPRIORITY=192 +CONFIG_SCHED_HPWORKPERIOD=50000 +CONFIG_SCHED_HPWORKSTACKSIZE=2048 +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +# CONFIG_DISABLE_POLL is not set +CONFIG_DEV_NULL=y +CONFIG_DEV_ZERO=y +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set +# CONFIG_LCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set + +# +# USART Configuration +# +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +CONFIG_SERIAL_NPOLLWAITERS=2 +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +CONFIG_RAMLOG=y +CONFIG_RAMLOG_SYSLOG=y +# CONFIG_RAMLOG_CONSOLE is not set +CONFIG_RAMLOG_BUFSIZE=16384 +# CONFIG_RAMLOG_CRLF is not set +CONFIG_RAMLOG_NONBLOCKING=y +CONFIG_RAMLOG_NPOLLWAITERS=4 +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +CONFIG_FS_READABLE=y +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +CONFIG_FS_PROCFS=y +# CONFIG_FS_PROCFS_REGISTER is not set + +# +# Exclude individual procfs entries +# +# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set +# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set +# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +CONFIG_SYSLOG=y +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_CHAR is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set +# CONFIG_MM_PGALLOC is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +CONFIG_SYMTAB_ORDEREDBYNAME=y + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set +# CONFIG_NETDB_HOSTFILE is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +CONFIG_HAVE_CXX=y +CONFIG_HAVE_CXXINITIALIZE=y +# CONFIG_CXX_NEWLONG is not set + +# +# uClibc++ Standard C++ Library +# +# CONFIG_UCLIBCXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_BUTTONS is not set +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_CXXTEST is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HELLOXX is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_BAS is not set +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CHAT is not set +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +CONFIG_NSH_CMDPARMS=y +CONFIG_NSH_MAXARGUMENTS=6 +CONFIG_NSH_ARGCAT=y +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +# CONFIG_NSH_DISABLE_DATE is not set +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +# CONFIG_NSH_DISABLE_IFUPDOWN is not set +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_PROC_MOUNTPOINT="/proc" +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/nucleo-144/nsh/setenv.sh b/configs/sabre-6quad/smp/setenv.sh similarity index 98% rename from configs/nucleo-144/nsh/setenv.sh rename to configs/sabre-6quad/smp/setenv.sh index 8498950aed9..1d0eacadd57 100644 --- a/configs/nucleo-144/nsh/setenv.sh +++ b/configs/sabre-6quad/smp/setenv.sh @@ -1,5 +1,5 @@ #!/bin/bash -# configs/nucleo-144/nsh/setenv.sh +# configs/sabre-6quad/smp/setenv.sh # # Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt diff --git a/configs/sabre-6quad/src/imx_appinit.c b/configs/sabre-6quad/src/imx_appinit.c index a1022c6cf13..7b7f66ead61 100644 --- a/configs/sabre-6quad/src/imx_appinit.c +++ b/configs/sabre-6quad/src/imx_appinit.c @@ -55,11 +55,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifndef CONFIG_BOARD_INITIALIZE /* Perform board initialization */ diff --git a/configs/sam3u-ek/README.txt b/configs/sam3u-ek/README.txt index d2e92fb08be..2a03890a2ca 100644 --- a/configs/sam3u-ek/README.txt +++ b/configs/sam3u-ek/README.txt @@ -379,10 +379,10 @@ SAM3U-EK-specific Configuration Options CONFIG_SAM34_GPIOA_IRQ CONFIG_SAM34_GPIOB_IRQ CONFIG_SAM34_GPIOC_IRQ - CONFIG_USART0_ISUART - CONFIG_USART1_ISUART - CONFIG_USART2_ISUART - CONFIG_USART3_ISUART + CONFIG_USART0_SERIALDRIVER + CONFIG_USART1_SERIALDRIVER + CONFIG_USART2_SERIALDRIVER + CONFIG_USART3_SERIALDRIVER CONFIG_SAM34_NAND - NAND memory SAM3U specific device driver settings diff --git a/configs/sam3u-ek/knsh/defconfig b/configs/sam3u-ek/knsh/defconfig index d6568a852c5..e7e5b4d898b 100644 --- a/configs/sam3u-ek/knsh/defconfig +++ b/configs/sam3u-ek/knsh/defconfig @@ -504,28 +504,28 @@ CONFIG_MMCSD_NSLOTS=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sam3u-ek/nsh/defconfig b/configs/sam3u-ek/nsh/defconfig index 57859252931..028d86b604a 100644 --- a/configs/sam3u-ek/nsh/defconfig +++ b/configs/sam3u-ek/nsh/defconfig @@ -491,28 +491,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sam3u-ek/nx/defconfig b/configs/sam3u-ek/nx/defconfig index a67abe25d4e..5a1d8b24660 100644 --- a/configs/sam3u-ek/nx/defconfig +++ b/configs/sam3u-ek/nx/defconfig @@ -518,28 +518,28 @@ CONFIG_LCD_PORTRAIT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sam3u-ek/nxwm/defconfig b/configs/sam3u-ek/nxwm/defconfig index c8c85da0048..407a4e34d5c 100644 --- a/configs/sam3u-ek/nxwm/defconfig +++ b/configs/sam3u-ek/nxwm/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH_CHIP_SAM34=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,12 +117,15 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -131,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -335,7 +341,7 @@ CONFIG_NSH_MMCSDMINOR=0 CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_RESET is not set # CONFIG_BOARDCTL_UNIQUEID is not set -# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_TSCTEST=y # CONFIG_BOARDCTL_ADCTEST is not set # CONFIG_BOARDCTL_PWMTEST is not set # CONFIG_BOARDCTL_GRAPHICS is not set @@ -508,10 +514,14 @@ CONFIG_ADS7843E_THRESHY=39 # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set # CONFIG_LCD_NOGETRUN is not set @@ -540,11 +550,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -564,32 +570,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -675,6 +677,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 CONFIG_NX_WRITEONLY=y +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -838,6 +841,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -956,6 +961,7 @@ CONFIG_CXX_NEWLONG=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1078,6 +1084,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # diff --git a/configs/sam3u-ek/src/sam_appinit.c b/configs/sam3u-ek/src/sam_appinit.c index 481cc8ffbc1..632d630394e 100644 --- a/configs/sam3u-ek/src/sam_appinit.c +++ b/configs/sam3u-ek/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sam3u-ek/src/sam_appinit.c * - * Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2010, 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -105,11 +105,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVE_MMCSD FAR struct sdio_dev_s *sdio; diff --git a/configs/sam4e-ek/README.txt b/configs/sam4e-ek/README.txt index 22f9ab157b6..90b979059ee 100644 --- a/configs/sam4e-ek/README.txt +++ b/configs/sam4e-ek/README.txt @@ -1189,10 +1189,10 @@ SAM4E-EK-specific Configuration Options CONFIG_SAM34_GPIOP_IRQ CONFIG_SAM34_GPIOQ_IRQ - CONFIG_USART0_ISUART - CONFIG_USART1_ISUART - CONFIG_USART2_ISUART - CONFIG_USART3_ISUART + CONFIG_USART0_SERIALDRIVER + CONFIG_USART1_SERIALDRIVER + CONFIG_USART2_SERIALDRIVER + CONFIG_USART3_SERIALDRIVER SAM3U specific device driver settings diff --git a/configs/sam4e-ek/nsh/defconfig b/configs/sam4e-ek/nsh/defconfig index 1a2c5869105..9790e30919f 100644 --- a/configs/sam4e-ek/nsh/defconfig +++ b/configs/sam4e-ek/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH_CHIP_SAM34=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,12 +117,15 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -131,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -527,7 +533,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -561,10 +572,12 @@ CONFIG_AT25_SPIFREQUENCY=20000000 # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -618,33 +631,28 @@ CONFIG_ETH0_PHY_KSZ8051=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -923,6 +931,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -967,15 +977,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -985,17 +996,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1003,8 +1014,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1012,15 +1023,15 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1040,8 +1051,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1054,20 +1065,21 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1169,6 +1181,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1213,13 +1226,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1228,6 +1241,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4e-ek/nxwm/defconfig b/configs/sam4e-ek/nxwm/defconfig index 67b3f0cdc11..c5e1de7a6b8 100644 --- a/configs/sam4e-ek/nxwm/defconfig +++ b/configs/sam4e-ek/nxwm/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH_CHIP_SAM34=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,12 +117,15 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -131,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -554,10 +560,14 @@ CONFIG_ADS7843E_THRESHY=39 # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set # CONFIG_LCD_NOGETRUN is not set @@ -586,11 +596,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -624,10 +630,12 @@ CONFIG_AT25_SPIFREQUENCY=20000000 # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -681,33 +689,28 @@ CONFIG_ETH0_PHY_KSZ8051=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -926,6 +929,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x95fa # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1091,6 +1095,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1143,16 +1149,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_LCDRW is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set @@ -1163,17 +1170,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1181,8 +1188,8 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1190,15 +1197,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1218,8 +1225,8 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1232,20 +1239,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1347,6 +1355,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1402,6 +1411,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # @@ -1569,13 +1579,13 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1584,6 +1594,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4e-ek/src/sam_appinit.c b/configs/sam4e-ek/src/sam_appinit.c index 0a577dc9250..6eef6121874 100644 --- a/configs/sam4e-ek/src/sam_appinit.c +++ b/configs/sam4e-ek/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sam4e-ek/src/sam_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -66,11 +66,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_AT25) || defined(HAVE_HSMCI) || defined(HAVE_USBMONITOR) int ret; diff --git a/configs/sam4e-ek/src/sam_boot.c b/configs/sam4e-ek/src/sam_boot.c index d75f6bebc34..ba95e746544 100644 --- a/configs/sam4e-ek/src/sam_boot.c +++ b/configs/sam4e-ek/src/sam_boot.c @@ -47,10 +47,6 @@ #include "up_arch.h" #include "sam4e-ek.h" -/************************************************************************************ - * Pre-processor Definitions - ************************************************************************************/ - /************************************************************************************ * Private Functions ************************************************************************************/ @@ -70,10 +66,10 @@ #ifdef CONFIG_SAM34_USART1 static inline void board_config_usart1(void) { -#if defined(CONFIG_USART1_ISUART) - (void)sam_configgpio(GPIO_RS232_ENABLE); -#else /* if defined(CONFIG_USART1_RS485) */ +#if defined(CONFIG_USART1_RS485) (void)sam_configgpio(GPIO_RS485_ENABLE); +#else /* if defined(CONFIG_USART1_SERIALDRIVER) */ + (void)sam_configgpio(GPIO_RS232_ENABLE); #endif } #else @@ -152,7 +148,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sam4e-ek/usbnsh/defconfig b/configs/sam4e-ek/usbnsh/defconfig index dce360c2850..09a19f5aea3 100644 --- a/configs/sam4e-ek/usbnsh/defconfig +++ b/configs/sam4e-ek/usbnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH_CHIP_SAM34=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,12 +117,15 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="sam34" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -131,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -528,7 +534,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -562,10 +573,12 @@ CONFIG_AT25_SPIFREQUENCY=20000000 # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -619,33 +632,28 @@ CONFIG_ETH0_PHY_KSZ8051=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -713,8 +721,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=3 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -962,6 +970,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1006,15 +1016,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1024,17 +1035,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1042,8 +1053,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1051,15 +1062,15 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1079,8 +1090,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1093,20 +1104,21 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1209,6 +1221,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1253,13 +1266,14 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CDCACM is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1268,7 +1282,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set -# CONFIG_SYSTEM_CDCACM is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sam4l-xplained/README.txt b/configs/sam4l-xplained/README.txt index de3ef5a81c9..a52b8ae8c44 100644 --- a/configs/sam4l-xplained/README.txt +++ b/configs/sam4l-xplained/README.txt @@ -566,10 +566,10 @@ SAM4L Xplained Pro-specific Configuration Options CONFIG_SAM34_GPIOA_IRQ CONFIG_SAM34_GPIOB_IRQ CONFIG_SAM34_GPIOC_IRQ - CONFIG_USART0_ISUART - CONFIG_USART1_ISUART - CONFIG_USART2_ISUART - CONFIG_USART3_ISUART + CONFIG_USART0_SERIALDRIVER + CONFIG_USART1_SERIALDRIVER + CONFIG_USART2_SERIALDRIVER + CONFIG_USART3_SERIALDRIVER ST91SAM4L specific device driver settings diff --git a/configs/sam4l-xplained/nsh/defconfig b/configs/sam4l-xplained/nsh/defconfig index 2668c210120..223ce701c65 100644 --- a/configs/sam4l-xplained/nsh/defconfig +++ b/configs/sam4l-xplained/nsh/defconfig @@ -507,33 +507,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/sam4l-xplained/src/sam_appinit.c b/configs/sam4l-xplained/src/sam_appinit.c index 48c072c98af..15330a80a24 100644 --- a/configs/sam4l-xplained/src/sam_appinit.c +++ b/configs/sam4l-xplained/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sam4l-xplained/src/sam_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -79,11 +79,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(CONFIG_SAM34_LCDCA) && defined(CONFIG_SAM4L_XPLAINED_SLCD1MODULE) /* Initialize the SLCD and register the SLCD device as /dev/slcd */ diff --git a/configs/sam4s-xplained-pro/README.txt b/configs/sam4s-xplained-pro/README.txt index b0b76de1cd5..83f19be9296 100644 --- a/configs/sam4s-xplained-pro/README.txt +++ b/configs/sam4s-xplained-pro/README.txt @@ -464,10 +464,10 @@ SAM4S Xplained-specific Configuration Options CONFIG_GPIOA_IRQ CONFIG_GPIOB_IRQ CONFIG_GPIOC_IRQ - CONFIG_USART0_ISUART - CONFIG_USART1_ISUART - CONFIG_USART2_ISUART - CONFIG_USART3_ISUART + CONFIG_USART0_SERIALDRIVER + CONFIG_USART1_SERIALDRIVER + CONFIG_USART2_SERIALDRIVER + CONFIG_USART3_SERIALDRIVER ST91SAM4S specific device driver settings diff --git a/configs/sam4s-xplained-pro/nsh/defconfig b/configs/sam4s-xplained-pro/nsh/defconfig index 251b028c779..d5008bd41a2 100644 --- a/configs/sam4s-xplained-pro/nsh/defconfig +++ b/configs/sam4s-xplained-pro/nsh/defconfig @@ -559,33 +559,32 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/sam4s-xplained-pro/src/sam_appinit.c b/configs/sam4s-xplained-pro/src/sam_appinit.c index e85b97ae934..7e0d3c3d086 100644 --- a/configs/sam4s-xplained-pro/src/sam_appinit.c +++ b/configs/sam4s-xplained-pro/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sam4s-xplained-pro/src/sam_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * Bob Doiron * @@ -81,11 +81,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined (HAVE_USBDEV) || defined(HAVE_HSMCI) || defined (HAVE_PROC) || \ defined(HAVE_USBMONITOR) diff --git a/configs/sam4s-xplained/README.txt b/configs/sam4s-xplained/README.txt index 4d49a0a5bf1..d5af219e241 100644 --- a/configs/sam4s-xplained/README.txt +++ b/configs/sam4s-xplained/README.txt @@ -456,10 +456,10 @@ SAM4S Xplained-specific Configuration Options CONFIG_SAM34_GPIOA_IRQ CONFIG_SAM34_GPIOB_IRQ CONFIG_SAM34_GPIOC_IRQ - CONFIG_USART0_ISUART - CONFIG_USART1_ISUART - CONFIG_USART2_ISUART - CONFIG_USART3_ISUART + CONFIG_USART0_SERIALDRIVER + CONFIG_USART1_SERIALDRIVER + CONFIG_USART2_SERIALDRIVER + CONFIG_USART3_SERIALDRIVER ST91SAM4S specific device driver settings diff --git a/configs/sam4s-xplained/nsh/defconfig b/configs/sam4s-xplained/nsh/defconfig index a4292f7b453..583fa8d9269 100644 --- a/configs/sam4s-xplained/nsh/defconfig +++ b/configs/sam4s-xplained/nsh/defconfig @@ -487,28 +487,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sama5d2-xult/README.txt b/configs/sama5d2-xult/README.txt index 8adbabe7fdf..9af903ada86 100644 --- a/configs/sama5d2-xult/README.txt +++ b/configs/sama5d2-xult/README.txt @@ -849,11 +849,11 @@ REVISIT: Unverified, cloned text from the SAMA5D4-EK README.txt CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts - CONFIG_USART0_ISUART - Flexcom0 is configured as a UART - CONFIG_USART1_ISUART - Flexcom1 is configured as a UART - CONFIG_USART2_ISUART - Flexcom2 is configured as a UART - CONFIG_USART3_ISUART - Flexcom3 is configured as a UART - CONFIG_USART4_ISUART - Flexcom4 is configured as a UART + CONFIG_USART0_SERIALDRIVER - Flexcom0 is configured as a UART + CONFIG_USART1_SERIALDRIVER - Flexcom1 is configured as a UART + CONFIG_USART2_SERIALDRIVER - Flexcom2 is configured as a UART + CONFIG_USART3_SERIALDRIVER - Flexcom3 is configured as a UART + CONFIG_USART4_SERIALDRIVER - Flexcom4 is configured as a UART AT91SAMA5 specific device driver settings diff --git a/configs/sama5d2-xult/nsh/defconfig b/configs/sama5d2-xult/nsh/defconfig index 064eb50ef50..537cb8d4ea1 100644 --- a/configs/sama5d2-xult/nsh/defconfig +++ b/configs/sama5d2-xult/nsh/defconfig @@ -571,33 +571,32 @@ CONFIG_RTC_DATETIME=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART4_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/sama5d2-xult/src/sam_appinit.c b/configs/sama5d2-xult/src/sam_appinit.c index 8472bc995cd..518dc376968 100644 --- a/configs/sama5d2-xult/src/sam_appinit.c +++ b/configs/sama5d2-xult/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sama5d2-xult/src/sam_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -57,11 +57,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifndef CONFIG_BOARD_INITIALIZE /* Perform board initialization */ diff --git a/configs/sama5d3-xplained/README.txt b/configs/sama5d3-xplained/README.txt index 5421b218f93..93cfb9a6c2e 100644 --- a/configs/sama5d3-xplained/README.txt +++ b/configs/sama5d3-xplained/README.txt @@ -2915,10 +2915,10 @@ SAMA5D3-Xplained Configuration Options CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts - CONFIG_USART0_ISUART - USART0 is configured as a UART - CONFIG_USART1_ISUART - USART1 is configured as a UART - CONFIG_USART2_ISUART - USART2 is configured as a UART - CONFIG_USART3_ISUART - USART3 is configured as a UART + CONFIG_USART0_SERIALDRIVER - USART0 is configured as a UART + CONFIG_USART1_SERIALDRIVER - USART1 is configured as a UART + CONFIG_USART2_SERIALDRIVER - USART2 is configured as a UART + CONFIG_USART3_SERIALDRIVER - USART3 is configured as a UART AT91SAMA5 specific device driver settings diff --git a/configs/sama5d3-xplained/bridge/defconfig b/configs/sama5d3-xplained/bridge/defconfig index 72f4e683255..59d6feb7a20 100644 --- a/configs/sama5d3-xplained/bridge/defconfig +++ b/configs/sama5d3-xplained/bridge/defconfig @@ -606,28 +606,28 @@ CONFIG_ETH1_PHY_KSZ8081=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/sama5d3-xplained/nsh/defconfig b/configs/sama5d3-xplained/nsh/defconfig index d24d9a19fab..9e517d9edb5 100644 --- a/configs/sama5d3-xplained/nsh/defconfig +++ b/configs/sama5d3-xplained/nsh/defconfig @@ -525,28 +525,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -CONFIG_ARCH_HAVE_OTHER_UART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +CONFIG_OTHER_UART_SERIALDRIVER=y # # USART Configuration diff --git a/configs/sama5d3-xplained/src/sam_ajoystick.c b/configs/sama5d3-xplained/src/sam_ajoystick.c index 20c24c424ef..d05f46eeaf3 100644 --- a/configs/sama5d3-xplained/src/sam_ajoystick.c +++ b/configs/sama5d3-xplained/src/sam_ajoystick.c @@ -46,6 +46,7 @@ #include #include +#include #include #include "sam_pio.h" @@ -93,10 +94,6 @@ AJOY_BUTTON_5_BIT | AJOY_BUTTON_6_BIT | \ AJOY_BUTTON_7_BIT ) -/**************************************************************************** - * Private Types - ****************************************************************************/ - /**************************************************************************** * Private Function Prototypes ****************************************************************************/ @@ -141,9 +138,9 @@ static const struct ajoy_lowerhalf_s g_ajoylower = .al_enable = ajoy_enable, }; -/* Descriptor for the open ADC driver */ +/* Thread-independent file structure for the open ADC driver */ -static int g_adcfd = -1; +static struct file g_adcfile; /* Current interrupt handler and argument */ @@ -190,7 +187,7 @@ static int ajoy_sample(FAR const struct ajoy_lowerhalf_s *lower, * channels are enabled). */ - nread = read(g_adcfd, adcmsg, SAM_ADC_NCHANNELS * sizeof(struct adc_msg_s)); + nread = file_read(&g_adcfile, adcmsg, MAX_ADC_CHANNELS * sizeof(struct adc_msg_s)); if (nread < 0) { int errcode = get_errno(); @@ -405,6 +402,7 @@ static int ajoy_interrupt(int irq, FAR void *context) int sam_ajoy_initialization(void) { int ret; + int fd; int i; /* Initialize ADC. We will need this to read the ADC inputs */ @@ -416,16 +414,28 @@ int sam_ajoy_initialization(void) return ret; } - /* Open the ADC driver for reading */ + /* Open the ADC driver for reading. */ - g_adcfd = open("/dev/adc0", O_RDONLY); - if (g_adcfd < 0) + fd = open("/dev/adc0", O_RDONLY); + if (fd < 0) { int errcode = get_errno(); idbg("ERROR: Failed to open /dev/adc0: %d\n", errcode); return -errcode; } + /* Detach the file structure from the file descriptor so that it can be + * used on any thread. + */ + + ret = file_detach(fd, &g_adcfile); + if (ret < 0) + { + idbg("ERROR: Failed to detach from file descriptor: %d\n", ret); + (void)close(fd); + return ret; + } + /* Configure the GPIO pins as interrupting inputs. */ for (i = 0; i < AJOY_NGPIOS; i++) @@ -449,8 +459,7 @@ int sam_ajoy_initialization(void) if (ret < 0) { idbg("ERROR: ajoy_register failed: %d\n", ret); - close(g_adcfd); - g_adcfd = -1; + file_close_detached(&g_adcfile); } return ret; diff --git a/configs/sama5d3-xplained/src/sam_appinit.c b/configs/sama5d3-xplained/src/sam_appinit.c index 1215fea5950..cfee95be1f8 100644 --- a/configs/sama5d3-xplained/src/sam_appinit.c +++ b/configs/sama5d3-xplained/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sama5d3-xplained/src/sam_appinit.c * - * Copyright (C) 2014-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -54,10 +54,6 @@ #include "sama5d3-xplained.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -66,11 +62,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_NAND) || defined(HAVE_AT25) || defined(HAVE_HSMCI) || \ defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) || \\ diff --git a/configs/sama5d3-xplained/src/sam_boot.c b/configs/sama5d3-xplained/src/sam_boot.c index 9a3c34c8256..901c30e2430 100644 --- a/configs/sama5d3-xplained/src/sam_boot.c +++ b/configs/sama5d3-xplained/src/sam_boot.c @@ -153,7 +153,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sama5d3x-ek/README.txt b/configs/sama5d3x-ek/README.txt index 3a7ebc57294..82a5c2fd4cc 100644 --- a/configs/sama5d3x-ek/README.txt +++ b/configs/sama5d3x-ek/README.txt @@ -3240,10 +3240,10 @@ SAMA5D3x-EK Configuration Options CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts - CONFIG_USART0_ISUART - USART0 is configured as a UART - CONFIG_USART1_ISUART - USART1 is configured as a UART - CONFIG_USART2_ISUART - USART2 is configured as a UART - CONFIG_USART3_ISUART - USART3 is configured as a UART + CONFIG_USART0_SERIALDRIVER - USART0 is configured as a UART + CONFIG_USART1_SERIALDRIVER - USART1 is configured as a UART + CONFIG_USART2_SERIALDRIVER - USART2 is configured as a UART + CONFIG_USART3_SERIALDRIVER - USART3 is configured as a UART AT91SAMA5 specific device driver settings diff --git a/configs/sama5d3x-ek/demo/defconfig b/configs/sama5d3x-ek/demo/defconfig index 71ae2304638..6805bd04ab0 100644 --- a/configs/sama5d3x-ek/demo/defconfig +++ b/configs/sama5d3x-ek/demo/defconfig @@ -648,33 +648,32 @@ CONFIG_AT25_SPIFREQUENCY=10000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1132,7 +1131,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/sama5d3x-ek/hello/defconfig b/configs/sama5d3x-ek/hello/defconfig index d6b76a8c74a..0be49453e11 100644 --- a/configs/sama5d3x-ek/hello/defconfig +++ b/configs/sama5d3x-ek/hello/defconfig @@ -506,33 +506,32 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set diff --git a/configs/sama5d3x-ek/norboot/defconfig b/configs/sama5d3x-ek/norboot/defconfig index b0481632b11..56b211c95f5 100644 --- a/configs/sama5d3x-ek/norboot/defconfig +++ b/configs/sama5d3x-ek/norboot/defconfig @@ -520,33 +520,32 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set diff --git a/configs/sama5d3x-ek/nsh/defconfig b/configs/sama5d3x-ek/nsh/defconfig index e0e8a622b11..78c20734934 100644 --- a/configs/sama5d3x-ek/nsh/defconfig +++ b/configs/sama5d3x-ek/nsh/defconfig @@ -524,33 +524,32 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/sama5d3x-ek/nx/defconfig b/configs/sama5d3x-ek/nx/defconfig index 7faf908eecc..7a4734bead8 100644 --- a/configs/sama5d3x-ek/nx/defconfig +++ b/configs/sama5d3x-ek/nx/defconfig @@ -565,33 +565,32 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/sama5d3x-ek/nxplayer/defconfig b/configs/sama5d3x-ek/nxplayer/defconfig index b7495de3e84..7a1878be00b 100644 --- a/configs/sama5d3x-ek/nxplayer/defconfig +++ b/configs/sama5d3x-ek/nxplayer/defconfig @@ -623,33 +623,32 @@ CONFIG_SDIO_BLOCKSETUP=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/sama5d3x-ek/nxwm/defconfig b/configs/sama5d3x-ek/nxwm/defconfig index 1fbbd687983..bc5e3694ac1 100644 --- a/configs/sama5d3x-ek/nxwm/defconfig +++ b/configs/sama5d3x-ek/nxwm/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH_CHIP_SAMA5=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,9 +121,12 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y +# CONFIG_ARCH_HAVE_TRUSTZONE is not set # CONFIG_ARM_HAVE_MPU_UNIFIED is not set CONFIG_ARCH_HAVE_LOWVECTORS=y CONFIG_ARCH_LOWVECTORS=y @@ -131,6 +136,8 @@ CONFIG_ARCH_LOWVECTORS=y # ARMv7-A Configuration Options # # CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_GTM is not set +# CONFIG_ARMV7A_HAVE_PTM is not set # CONFIG_ARMV7A_HAVE_L2CC is not set # CONFIG_ARMV7A_HAVE_L2CC_PL310 is not set # CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT is not set @@ -182,7 +189,6 @@ CONFIG_SAMA5_HAVE_PIOE=y # CONFIG_SAMA5_HAVE_TC is not set # CONFIG_SAMA5_HAVE_TC1 is not set # CONFIG_SAMA5_HAVE_TC2 is not set -# CONFIG_ARCH_HAVE_TRUSTZONE is not set # CONFIG_SAMA5_HAVE_TWI3 is not set # CONFIG_SAMA5_HAVE_VDEC is not set # CONFIG_SAMA5_FLEXCOM is not set @@ -437,7 +443,7 @@ CONFIG_SAMA5D3xEK_TSD_DEVMINOR=0 # CONFIG_SAMA5D3xEK_SLOWCLOCK is not set CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_UNIQUEID is not set -# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_TSCTEST=y # CONFIG_BOARDCTL_ADCTEST is not set # CONFIG_BOARDCTL_PWMTEST is not set # CONFIG_BOARDCTL_GRAPHICS is not set @@ -603,7 +609,12 @@ CONFIG_INPUT=y # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -623,33 +634,28 @@ CONFIG_INPUT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -744,6 +750,7 @@ CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x95fa # CONFIG_NX_ANTIALIASING is not set # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -908,6 +915,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -946,6 +955,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +# CONFIG_EXAMPLES_ADC is not set # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set @@ -1032,6 +1042,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1156,6 +1167,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # diff --git a/configs/sama5d3x-ek/ov2640/defconfig b/configs/sama5d3x-ek/ov2640/defconfig index e6d4510e1a0..c058dd759b8 100644 --- a/configs/sama5d3x-ek/ov2640/defconfig +++ b/configs/sama5d3x-ek/ov2640/defconfig @@ -591,33 +591,32 @@ CONFIG_OV2640_SVGA_RESOLUTION=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set diff --git a/configs/sama5d3x-ek/src/sam_appinit.c b/configs/sama5d3x-ek/src/sam_appinit.c index 56589915ce7..9f4fff0f73d 100644 --- a/configs/sama5d3x-ek/src/sam_appinit.c +++ b/configs/sama5d3x-ek/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sama5d3x-ek/src/sam_appinit.c * - * Copyright (C) 2013-2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2013-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -66,11 +66,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_NAND) || defined(HAVE_AT25) || defined(HAVE_AT24) || \ defined(HAVE_HSMCI) || defined(HAVE_USBHOST) || defined(HAVE_USBMONITOR) ||\ diff --git a/configs/sama5d3x-ek/src/sam_boot.c b/configs/sama5d3x-ek/src/sam_boot.c index ce065150c4c..d12ec87c751 100644 --- a/configs/sama5d3x-ek/src/sam_boot.c +++ b/configs/sama5d3x-ek/src/sam_boot.c @@ -153,7 +153,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif /* CONFIG_BOARD_INITIALIZE */ diff --git a/configs/sama5d4-ek/README.txt b/configs/sama5d4-ek/README.txt index 5f2e569a087..7e3f33bd3bb 100644 --- a/configs/sama5d4-ek/README.txt +++ b/configs/sama5d4-ek/README.txt @@ -3526,10 +3526,10 @@ SAMA4D4-EK Configuration Options CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts - CONFIG_USART0_ISUART - USART0 is configured as a UART - CONFIG_USART1_ISUART - USART1 is configured as a UART - CONFIG_USART2_ISUART - USART2 is configured as a UART - CONFIG_USART3_ISUART - USART3 is configured as a UART + CONFIG_USART0_SERIALDRIVER - USART0 is configured as a UART + CONFIG_USART1_SERIALDRIVER - USART1 is configured as a UART + CONFIG_USART2_SERIALDRIVER - USART2 is configured as a UART + CONFIG_USART3_SERIALDRIVER - USART3 is configured as a UART AT91SAMA5 specific device driver settings diff --git a/configs/sama5d4-ek/at25boot/defconfig b/configs/sama5d4-ek/at25boot/defconfig index cec1129ef6e..64151008f58 100644 --- a/configs/sama5d4-ek/at25boot/defconfig +++ b/configs/sama5d4-ek/at25boot/defconfig @@ -584,33 +584,32 @@ CONFIG_AT25_SPIFREQUENCY=20000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/sama5d4-ek/bridge/defconfig b/configs/sama5d4-ek/bridge/defconfig index 39d09056da1..e777febe93b 100644 --- a/configs/sama5d4-ek/bridge/defconfig +++ b/configs/sama5d4-ek/bridge/defconfig @@ -624,33 +624,32 @@ CONFIG_ETH1_PHY_KSZ8081=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/sama5d4-ek/dramboot/defconfig b/configs/sama5d4-ek/dramboot/defconfig index 05daad298ed..f12701c0c51 100644 --- a/configs/sama5d4-ek/dramboot/defconfig +++ b/configs/sama5d4-ek/dramboot/defconfig @@ -541,33 +541,32 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/sama5d4-ek/elf/defconfig b/configs/sama5d4-ek/elf/defconfig index 3ac09f52df6..b598b3f7cc9 100644 --- a/configs/sama5d4-ek/elf/defconfig +++ b/configs/sama5d4-ek/elf/defconfig @@ -567,34 +567,32 @@ CONFIG_AUDIO_DEVICES=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/sama5d4-ek/ipv6/defconfig b/configs/sama5d4-ek/ipv6/defconfig index e327a02d9ac..4a1d810af90 100644 --- a/configs/sama5d4-ek/ipv6/defconfig +++ b/configs/sama5d4-ek/ipv6/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH_CHIP_SAMA5=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,9 +121,13 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_ARCH_TRUSTZONE_SECURE=y # CONFIG_ARM_HAVE_MPU_UNIFIED is not set CONFIG_ARCH_HAVE_LOWVECTORS=y CONFIG_ARCH_LOWVECTORS=y @@ -131,6 +137,8 @@ CONFIG_ARCH_LOWVECTORS=y # ARMv7-A Configuration Options # # CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_GTM is not set +# CONFIG_ARMV7A_HAVE_PTM is not set CONFIG_ARMV7A_HAVE_L2CC=y CONFIG_ARMV7A_HAVE_L2CC_PL310=y @@ -191,7 +199,6 @@ CONFIG_SAMA5_HAVE_SPI2=y # CONFIG_SAMA5_HAVE_TC is not set CONFIG_SAMA5_HAVE_TC1=y CONFIG_SAMA5_HAVE_TC2=y -CONFIG_ARCH_HAVE_TRUSTZONE=y CONFIG_SAMA5_HAVE_TWI3=y CONFIG_SAMA5_HAVE_VDEC=y # CONFIG_SAMA5_FLEXCOM is not set @@ -697,7 +704,12 @@ CONFIG_MXT_NPOLLWAITERS=4 # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -768,34 +780,28 @@ CONFIG_ETH0_PHY_KSZ8081=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -1048,6 +1054,7 @@ CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x7b5d # CONFIG_NX_ANTIALIASING is not set # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1226,6 +1233,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set # CONFIG_NETDB_DNSCLIENT is not set @@ -1283,16 +1292,17 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1311,17 +1321,17 @@ CONFIG_EXAMPLES_NX_BPP=16 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RANDOM is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set @@ -1331,8 +1341,8 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1345,12 +1355,11 @@ CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # @@ -1375,8 +1384,8 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1388,19 +1397,20 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set # CONFIG_NETUTILS_TELNETD is not set # CONFIG_NETUTILS_TFTPC is not set -CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_WEBCLIENT is not set # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1515,6 +1525,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 @@ -1578,11 +1589,11 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 CONFIG_I2CTOOL_MAXBUS=0 @@ -1590,7 +1601,7 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=100000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set CONFIG_SYSTEM_NXPLAYER=y CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 @@ -1611,6 +1622,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/knsh/defconfig b/configs/sama5d4-ek/knsh/defconfig index ce61a0458e2..1992f4004bc 100644 --- a/configs/sama5d4-ek/knsh/defconfig +++ b/configs/sama5d4-ek/knsh/defconfig @@ -596,34 +596,32 @@ CONFIG_SDIO_BLOCKSETUP=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/sama5d4-ek/knsh/defconfig.ROMFS b/configs/sama5d4-ek/knsh/defconfig.ROMFS index 769bfdb4035..a069c2d2a7d 100644 --- a/configs/sama5d4-ek/knsh/defconfig.ROMFS +++ b/configs/sama5d4-ek/knsh/defconfig.ROMFS @@ -487,33 +487,33 @@ CONFIG_RTC_DATETIME=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 diff --git a/configs/sama5d4-ek/nsh/defconfig b/configs/sama5d4-ek/nsh/defconfig index 479649266ef..cf1cd2d601e 100644 --- a/configs/sama5d4-ek/nsh/defconfig +++ b/configs/sama5d4-ek/nsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH_CHIP_SAMA5=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,9 +121,13 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_ARCH_TRUSTZONE_SECURE=y # CONFIG_ARM_HAVE_MPU_UNIFIED is not set CONFIG_ARCH_HAVE_LOWVECTORS=y CONFIG_ARCH_LOWVECTORS=y @@ -131,6 +137,8 @@ CONFIG_ARCH_LOWVECTORS=y # ARMv7-A Configuration Options # # CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_GTM is not set +# CONFIG_ARMV7A_HAVE_PTM is not set CONFIG_ARMV7A_HAVE_L2CC=y CONFIG_ARMV7A_HAVE_L2CC_PL310=y @@ -191,7 +199,6 @@ CONFIG_SAMA5_HAVE_SPI2=y # CONFIG_SAMA5_HAVE_TC is not set CONFIG_SAMA5_HAVE_TC1=y CONFIG_SAMA5_HAVE_TC2=y -CONFIG_ARCH_HAVE_TRUSTZONE=y CONFIG_SAMA5_HAVE_TWI3=y CONFIG_SAMA5_HAVE_VDEC=y # CONFIG_SAMA5_FLEXCOM is not set @@ -697,7 +704,12 @@ CONFIG_MXT_NPOLLWAITERS=4 # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -770,34 +782,28 @@ CONFIG_ETH0_PHY_KSZ8081=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -1052,6 +1058,7 @@ CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x7b5d # CONFIG_NX_ANTIALIASING is not set # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1230,6 +1237,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1294,16 +1303,17 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1322,17 +1332,17 @@ CONFIG_EXAMPLES_NX_BPP=16 # CONFIG_EXAMPLES_NX_RAWWINDOWS is not set CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 # CONFIG_EXAMPLES_NX_EXTERNINIT is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RANDOM is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set @@ -1342,8 +1352,8 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1356,12 +1366,11 @@ CONFIG_EXAMPLES_TOUCHSCREEN_DEVPATH="/dev/input0" CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # @@ -1386,8 +1395,8 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1401,21 +1410,22 @@ CONFIG_EXAMPLES_TOUCHSCREEN_ARCHINIT=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1532,6 +1542,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 @@ -1579,11 +1590,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 CONFIG_I2CTOOL_MAXBUS=0 @@ -1591,7 +1602,7 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=100000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set CONFIG_SYSTEM_NXPLAYER=y CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 @@ -1612,6 +1623,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/nxwm/defconfig b/configs/sama5d4-ek/nxwm/defconfig index b3bdbe87167..0144af933e8 100644 --- a/configs/sama5d4-ek/nxwm/defconfig +++ b/configs/sama5d4-ek/nxwm/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH_CHIP_SAMA5=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,9 +121,13 @@ CONFIG_ARCH_CORTEXA5=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-a" CONFIG_ARCH_CHIP="sama5" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +# CONFIG_ARM_TOOLCHAIN_GNU is not set CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set CONFIG_ARCH_FPU=y +CONFIG_ARCH_HAVE_TRUSTZONE=y +CONFIG_ARCH_TRUSTZONE_SECURE=y # CONFIG_ARM_HAVE_MPU_UNIFIED is not set CONFIG_ARCH_HAVE_LOWVECTORS=y CONFIG_ARCH_LOWVECTORS=y @@ -131,6 +137,8 @@ CONFIG_ARCH_LOWVECTORS=y # ARMv7-A Configuration Options # # CONFIG_ARMV7A_HAVE_GICv2 is not set +# CONFIG_ARMV7A_HAVE_GTM is not set +# CONFIG_ARMV7A_HAVE_PTM is not set CONFIG_ARMV7A_HAVE_L2CC=y CONFIG_ARMV7A_HAVE_L2CC_PL310=y @@ -191,7 +199,6 @@ CONFIG_SAMA5_HAVE_SPI2=y # CONFIG_SAMA5_HAVE_TC is not set CONFIG_SAMA5_HAVE_TC1=y CONFIG_SAMA5_HAVE_TC2=y -CONFIG_ARCH_HAVE_TRUSTZONE=y CONFIG_SAMA5_HAVE_TWI3=y CONFIG_SAMA5_HAVE_VDEC=y # CONFIG_SAMA5_FLEXCOM is not set @@ -666,7 +673,12 @@ CONFIG_MXT_NPOLLWAITERS=4 # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -739,34 +751,28 @@ CONFIG_ETH0_PHY_KSZ8081=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -1019,6 +1025,7 @@ CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x95fa # CONFIG_NX_ANTIALIASING is not set # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1218,6 +1225,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1282,16 +1291,17 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1301,17 +1311,17 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RANDOM is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set @@ -1321,8 +1331,8 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1331,12 +1341,11 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # @@ -1361,8 +1370,8 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1376,21 +1385,22 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1507,6 +1517,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 @@ -1564,6 +1575,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # @@ -1767,11 +1779,11 @@ CONFIG_NXWM_MEDIAPLAYER_MINVOLUMEHEIGHT=6 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 CONFIG_I2CTOOL_MAXBUS=0 @@ -1779,7 +1791,7 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=100000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set CONFIG_SYSTEM_NXPLAYER=y CONFIG_NXPLAYER_PLAYTHREAD_STACKSIZE=1500 @@ -1799,6 +1811,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sama5d4-ek/ramtest/defconfig b/configs/sama5d4-ek/ramtest/defconfig index f9981f1e3e8..4490b66233c 100644 --- a/configs/sama5d4-ek/ramtest/defconfig +++ b/configs/sama5d4-ek/ramtest/defconfig @@ -541,33 +541,32 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/sama5d4-ek/src/sam_appinit.c b/configs/sama5d4-ek/src/sam_appinit.c index 9632e33353f..066bbf00c3a 100644 --- a/configs/sama5d4-ek/src/sam_appinit.c +++ b/configs/sama5d4-ek/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sama5d4-ek/src/sam_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -57,11 +57,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifndef CONFIG_BOARD_INITIALIZE /* Perform board initialization */ diff --git a/configs/samd20-xplained/nsh/defconfig b/configs/samd20-xplained/nsh/defconfig index e868b72f611..5df5b16c4d0 100644 --- a/configs/samd20-xplained/nsh/defconfig +++ b/configs/samd20-xplained/nsh/defconfig @@ -470,34 +470,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/samd20-xplained/src/sam_appinit.c b/configs/samd20-xplained/src/sam_appinit.c index dd0ca0c9f30..8bc9a35b4f8 100644 --- a/configs/samd20-xplained/src/sam_appinit.c +++ b/configs/samd20-xplained/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/samd20-xplained/src/sam_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -97,11 +97,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(SAMDL_HAVE_SPI0) && defined(CONFIG_SAMD20_XPLAINED_IOMODULE) /* Initialize the SPI-based MMC/SD slot */ diff --git a/configs/samd21-xplained/nsh/defconfig b/configs/samd21-xplained/nsh/defconfig index 70fb4c59cf8..1610bf7397e 100644 --- a/configs/samd21-xplained/nsh/defconfig +++ b/configs/samd21-xplained/nsh/defconfig @@ -468,34 +468,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/samd21-xplained/src/sam_appinit.c b/configs/samd21-xplained/src/sam_appinit.c index e0bca030107..56afb0ff24f 100644 --- a/configs/samd21-xplained/src/sam_appinit.c +++ b/configs/samd21-xplained/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/samd21-xplained/src/sam_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -97,11 +97,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(SAMDL_HAVE_SPI0) && defined(CONFIG_SAMD21_XPLAINED_IOMODULE) /* Initialize the SPI-based MMC/SD slot */ diff --git a/configs/same70-xplained/README.txt b/configs/same70-xplained/README.txt index 9a0ed6fa835..548e496e0a3 100644 --- a/configs/same70-xplained/README.txt +++ b/configs/same70-xplained/README.txt @@ -1139,7 +1139,7 @@ NOTES: USART1. UART3 might be a good option (the Arduino RXD/TXD): -CONFIG_SAMV7_USART1=y - -CONFIG_USART1_ISUART=y + -CONFIG_USART1_SERIALDRIVER=y -CONFIG_USART1_SERIAL_CONSOLE=y -CONFIG_USART1_RXBUFSIZE=256 -CONFIG_USART1_TXBUFSIZE=256 diff --git a/configs/same70-xplained/netnsh/defconfig b/configs/same70-xplained/netnsh/defconfig index 88af9ee4ad4..6fbb830a236 100644 --- a/configs/same70-xplained/netnsh/defconfig +++ b/configs/same70-xplained/netnsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" CONFIG_ARCH_CHIP_SAMV7=y # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,8 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="samv7" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y @@ -127,6 +131,7 @@ CONFIG_ARCH_HAVE_FPU=y CONFIG_ARCH_HAVE_DPFPU=y CONFIG_ARCH_FPU=y CONFIG_ARCH_DPFPU=y +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -142,6 +147,7 @@ CONFIG_ARMV7M_HAVE_ITCM=y CONFIG_ARMV7M_HAVE_DTCM=y # CONFIG_ARMV7M_ITCM is not set # CONFIG_ARMV7M_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -257,6 +263,13 @@ CONFIG_SAMV7_USART1=y # CONFIG_SAMV7_USART2 is not set # CONFIG_SAMV7_WDT is not set # CONFIG_SAMV7_RSWDT is not set +# CONFIG_SAMV7_JTAG_DISABLE is not set +CONFIG_SAMV7_JTAG_FULL_ENABLE=y +# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set +# CONFIG_SAMV7_JTAG_SW_ENABLE is not set +# CONFIG_SAMV7_ERASE_DISABLE is not set +CONFIG_SAMV7_ERASE_ENABLE=y +# CONFIG_SAMV7_SYSTEMRESET is not set CONFIG_SAMV7_GPIO_IRQ=y CONFIG_SAMV7_GPIOA_IRQ=y # CONFIG_SAMV7_GPIOB_IRQ is not set @@ -543,7 +556,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -597,10 +615,12 @@ CONFIG_AT25_SPIFREQUENCY=20000000 # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -655,33 +675,28 @@ CONFIG_ETH0_PHY_KSZ8081=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -956,6 +971,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1012,15 +1029,16 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1030,17 +1048,17 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1048,8 +1066,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1057,15 +1075,15 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1085,8 +1103,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1099,20 +1117,21 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1215,6 +1234,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_MONITOR=y CONFIG_NSH_NETINIT_SIGNO=18 @@ -1262,12 +1282,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 CONFIG_I2CTOOL_MAXBUS=0 @@ -1275,7 +1295,8 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=400000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1283,8 +1304,7 @@ CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/same70-xplained/nsh/defconfig b/configs/same70-xplained/nsh/defconfig index 4f668b0230e..07e012f98ee 100644 --- a/configs/same70-xplained/nsh/defconfig +++ b/configs/same70-xplained/nsh/defconfig @@ -597,33 +597,32 @@ CONFIG_AT25_SPIFREQUENCY=20000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1032,7 +1031,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 diff --git a/configs/same70-xplained/src/sam_appinit.c b/configs/same70-xplained/src/sam_appinit.c index d3d14471228..5e8a871522a 100644 --- a/configs/same70-xplained/src/sam_appinit.c +++ b/configs/same70-xplained/src/sam_appinit.c @@ -55,11 +55,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifndef CONFIG_BOARD_INITIALIZE /* Perform board initialization */ diff --git a/configs/saml21-xplained/nsh/defconfig b/configs/saml21-xplained/nsh/defconfig index 2baa5782c38..c44ddac15aa 100644 --- a/configs/saml21-xplained/nsh/defconfig +++ b/configs/saml21-xplained/nsh/defconfig @@ -456,34 +456,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -CONFIG_ARCH_HAVE_USART4=y -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +CONFIG_USART4_SERIALDRIVER=y +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART3_ISUART=y -CONFIG_USART4_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/saml21-xplained/src/sam_appinit.c b/configs/saml21-xplained/src/sam_appinit.c index 98d66e9213f..9f299c1f716 100644 --- a/configs/saml21-xplained/src/sam_appinit.c +++ b/configs/saml21-xplained/src/sam_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/saml21-xplained/src/sam_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -97,11 +97,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(SAMDL_HAVE_SPI0) && defined(CONFIG_SAML21_XPLAINED_IOMODULE) /* Initialize the SPI-based MMC/SD slot */ diff --git a/configs/samv71-xult/knsh/defconfig b/configs/samv71-xult/knsh/defconfig index 2716784db29..de6d5d57f67 100644 --- a/configs/samv71-xult/knsh/defconfig +++ b/configs/samv71-xult/knsh/defconfig @@ -612,28 +612,28 @@ CONFIG_AT25_SPIFREQUENCY=20000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/samv71-xult/module/defconfig b/configs/samv71-xult/module/defconfig index 8300fa0f3a8..b55a4699a4c 100644 --- a/configs/samv71-xult/module/defconfig +++ b/configs/samv71-xult/module/defconfig @@ -528,28 +528,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/samv71-xult/mxtxplnd/defconfig b/configs/samv71-xult/mxtxplnd/defconfig index 32751004cc5..2186d42ddf7 100644 --- a/configs/samv71-xult/mxtxplnd/defconfig +++ b/configs/samv71-xult/mxtxplnd/defconfig @@ -645,33 +645,32 @@ CONFIG_AT25_SPIFREQUENCY=20000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART0_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1177,7 +1176,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 diff --git a/configs/samv71-xult/netnsh/defconfig b/configs/samv71-xult/netnsh/defconfig index c40145daf3f..98334e64370 100644 --- a/configs/samv71-xult/netnsh/defconfig +++ b/configs/samv71-xult/netnsh/defconfig @@ -265,6 +265,13 @@ CONFIG_SAMV7_UART3=y # CONFIG_SAMV7_USART2 is not set # CONFIG_SAMV7_WDT is not set # CONFIG_SAMV7_RSWDT is not set +# CONFIG_SAMV7_JTAG_DISABLE is not set +CONFIG_SAMV7_JTAG_FULL_ENABLE=y +# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set +# CONFIG_SAMV7_JTAG_SW_ENABLE is not set +# CONFIG_SAMV7_ERASE_DISABLE is not set +CONFIG_SAMV7_ERASE_ENABLE=y +# CONFIG_SAMV7_SYSTEMRESET is not set CONFIG_SAMV7_GPIO_IRQ=y CONFIG_SAMV7_GPIOA_IRQ=y CONFIG_SAMV7_GPIOB_IRQ=y @@ -552,7 +559,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -606,10 +618,12 @@ CONFIG_AT25_SPIFREQUENCY=20000000 # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -664,32 +678,28 @@ CONFIG_ETH0_PHY_KSZ8061=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1023,15 +1033,16 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1041,17 +1052,17 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="Button 7" CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1059,8 +1070,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1068,15 +1079,15 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1096,8 +1107,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1110,20 +1121,21 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1226,6 +1238,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_MONITOR=y CONFIG_NSH_NETINIT_SIGNO=18 @@ -1273,12 +1286,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 CONFIG_I2CTOOL_MAXBUS=0 @@ -1286,7 +1299,8 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=400000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1294,8 +1308,7 @@ CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samv71-xult/nsh/defconfig b/configs/samv71-xult/nsh/defconfig index c3c64d50fa0..235b9afd19f 100644 --- a/configs/samv71-xult/nsh/defconfig +++ b/configs/samv71-xult/nsh/defconfig @@ -605,28 +605,28 @@ CONFIG_AT25_SPIFREQUENCY=20000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration @@ -1041,7 +1041,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 diff --git a/configs/samv71-xult/nxwm/defconfig b/configs/samv71-xult/nxwm/defconfig index e12363decd6..cae079b2d78 100644 --- a/configs/samv71-xult/nxwm/defconfig +++ b/configs/samv71-xult/nxwm/defconfig @@ -264,6 +264,13 @@ CONFIG_SAMV7_USART0=y # CONFIG_SAMV7_USART2 is not set # CONFIG_SAMV7_WDT is not set # CONFIG_SAMV7_RSWDT is not set +# CONFIG_SAMV7_JTAG_DISABLE is not set +CONFIG_SAMV7_JTAG_FULL_ENABLE=y +# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set +# CONFIG_SAMV7_JTAG_SW_ENABLE is not set +# CONFIG_SAMV7_ERASE_DISABLE is not set +CONFIG_SAMV7_ERASE_ENABLE=y +# CONFIG_SAMV7_SYSTEMRESET is not set CONFIG_SAMV7_GPIO_IRQ=y CONFIG_SAMV7_GPIOA_IRQ=y CONFIG_SAMV7_GPIOB_IRQ=y @@ -549,10 +556,14 @@ CONFIG_MXT_THRESHY=8 # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set CONFIG_LCD_NOGETRUN=y @@ -581,11 +592,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -639,10 +646,12 @@ CONFIG_AT25_SPIFREQUENCY=20000000 # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -654,33 +663,28 @@ CONFIG_AT25_SPIFREQUENCY=20000000 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -CONFIG_ARCH_HAVE_USART0=y -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART0_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +CONFIG_USART0_SERIALDRIVER=y +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -774,6 +778,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x95fa CONFIG_NX_WRITEONLY=y +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1037,6 +1042,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1068,6 +1074,7 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1192,6 +1199,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=2048 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # @@ -1363,8 +1371,8 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5 # CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_HEX2BIN is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=0 diff --git a/configs/samv71-xult/src/sam_appinit.c b/configs/samv71-xult/src/sam_appinit.c index 451c97600d9..f7215ff4650 100644 --- a/configs/samv71-xult/src/sam_appinit.c +++ b/configs/samv71-xult/src/sam_appinit.c @@ -55,11 +55,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifndef CONFIG_BOARD_INITIALIZE /* Perform board initialization */ diff --git a/configs/samv71-xult/vnc/defconfig b/configs/samv71-xult/vnc/defconfig index 087f0b0f1d1..d13af25cab7 100644 --- a/configs/samv71-xult/vnc/defconfig +++ b/configs/samv71-xult/vnc/defconfig @@ -264,6 +264,13 @@ CONFIG_SAMV7_UART3=y # CONFIG_SAMV7_USART2 is not set # CONFIG_SAMV7_WDT is not set # CONFIG_SAMV7_RSWDT is not set +# CONFIG_SAMV7_JTAG_DISABLE is not set +CONFIG_SAMV7_JTAG_FULL_ENABLE=y +# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set +# CONFIG_SAMV7_JTAG_SW_ENABLE is not set +# CONFIG_SAMV7_ERASE_DISABLE is not set +CONFIG_SAMV7_ERASE_ENABLE=y +# CONFIG_SAMV7_SYSTEMRESET is not set CONFIG_SAMV7_GPIO_IRQ=y CONFIG_SAMV7_GPIOA_IRQ=y CONFIG_SAMV7_GPIOB_IRQ=y @@ -552,7 +559,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -611,6 +623,7 @@ CONFIG_AT25_SPIFREQUENCY=20000000 # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -666,32 +679,28 @@ CONFIG_ETH0_PHY_KSZ8061=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1109,10 +1118,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1122,7 +1131,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set CONFIG_EXAMPLES_NXIMAGE=y @@ -1139,12 +1147,13 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y # CONFIG_EXAMPLES_NXIMAGE_YSCALE1p5 is not set # CONFIG_EXAMPLES_NXIMAGE_YSCALE2p0 is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1152,21 +1161,22 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1186,8 +1196,8 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1198,11 +1208,12 @@ CONFIG_EXAMPLES_NXIMAGE_YSCALE1p0=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 @@ -1311,6 +1322,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 @@ -1354,14 +1366,15 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_I2CTOOL is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1369,8 +1382,7 @@ CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/samv71-xult/vnxwm/defconfig b/configs/samv71-xult/vnxwm/defconfig index 3e074f27096..9f7df955c9f 100644 --- a/configs/samv71-xult/vnxwm/defconfig +++ b/configs/samv71-xult/vnxwm/defconfig @@ -264,6 +264,13 @@ CONFIG_SAMV7_UART3=y # CONFIG_SAMV7_USART2 is not set # CONFIG_SAMV7_WDT is not set # CONFIG_SAMV7_RSWDT is not set +# CONFIG_SAMV7_JTAG_DISABLE is not set +CONFIG_SAMV7_JTAG_FULL_ENABLE=y +# CONFIG_SAMV7_JTAG_FULL_SW_ENABLE is not set +# CONFIG_SAMV7_JTAG_SW_ENABLE is not set +# CONFIG_SAMV7_ERASE_DISABLE is not set +CONFIG_SAMV7_ERASE_ENABLE=y +# CONFIG_SAMV7_SYSTEMRESET is not set CONFIG_SAMV7_GPIO_IRQ=y CONFIG_SAMV7_GPIOA_IRQ=y CONFIG_SAMV7_GPIOB_IRQ=y @@ -555,7 +562,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -614,6 +626,7 @@ CONFIG_AT25_SPIFREQUENCY=20000000 # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -669,32 +682,28 @@ CONFIG_ETH0_PHY_KSZ8061=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1142,10 +1151,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1155,17 +1164,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1173,21 +1182,22 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1207,8 +1217,8 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1219,11 +1229,12 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 @@ -1332,6 +1343,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 @@ -1545,14 +1557,15 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_I2CTOOL is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1560,8 +1573,7 @@ CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/shenzhou/include/board.h b/configs/shenzhou/include/board.h index c7b60a9ca3d..f55ca113dfb 100644 --- a/configs/shenzhou/include/board.h +++ b/configs/shenzhou/include/board.h @@ -100,14 +100,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* MCO output driven by PLL3. From above, we already have PLL3 input frequency as: * diff --git a/configs/shenzhou/nsh/defconfig b/configs/shenzhou/nsh/defconfig index d0b0b741d7a..468531b33a7 100644 --- a/configs/shenzhou/nsh/defconfig +++ b/configs/shenzhou/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -194,6 +199,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -238,6 +244,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -403,19 +410,35 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -702,7 +725,12 @@ CONFIG_RTC=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -774,33 +802,28 @@ CONFIG_ETH0_PHY_DM9161=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1062,6 +1085,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1113,16 +1138,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1132,17 +1158,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1150,8 +1176,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1159,11 +1185,10 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -1187,8 +1212,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1200,20 +1225,21 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1315,6 +1341,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1359,12 +1386,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1373,6 +1400,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/shenzhou/nxwm/defconfig b/configs/shenzhou/nxwm/defconfig index 46709722a30..ccb8ecf3ab7 100644 --- a/configs/shenzhou/nxwm/defconfig +++ b/configs/shenzhou/nxwm/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -202,6 +207,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -246,6 +252,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -411,19 +418,35 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -569,7 +592,7 @@ CONFIG_NSH_MMCSDMINOR=0 CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_RESET is not set # CONFIG_BOARDCTL_UNIQUEID is not set -# CONFIG_BOARDCTL_TSCTEST is not set +CONFIG_BOARDCTL_TSCTEST=y # CONFIG_BOARDCTL_ADCTEST is not set # CONFIG_BOARDCTL_PWMTEST is not set # CONFIG_BOARDCTL_GRAPHICS is not set @@ -729,7 +752,7 @@ CONFIG_INPUT=y # CONFIG_INPUT_TSC2007 is not set CONFIG_INPUT_ADS7843E=y # CONFIG_ADS7843E_MULTIPLE is not set -CONFIG_ADS7843E_SPIDEV=0 +CONFIG_ADS7843E_SPIDEV=3 CONFIG_ADS7843E_DEVMINOR=0 CONFIG_ADS7843E_SPIMODE=0 CONFIG_ADS7843E_FREQUENCY=100000 @@ -742,10 +765,14 @@ CONFIG_ADS7843E_THRESHY=51 # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set CONFIG_LCD_NOGETRUN=y @@ -777,11 +804,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -843,33 +866,28 @@ CONFIG_ETH0_PHY_DM9161=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1064,6 +1082,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 CONFIG_NX_WRITEONLY=y +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1230,6 +1249,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=4 @@ -1274,15 +1295,16 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_LCDRW is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set @@ -1293,18 +1315,18 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1320,11 +1342,10 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # @@ -1347,8 +1368,8 @@ CONFIG_HAVE_CXXINITIALIZE=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1360,20 +1381,21 @@ CONFIG_HAVE_CXXINITIALIZE=y # # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1473,6 +1495,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1528,6 +1551,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=1596 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # @@ -1639,7 +1663,7 @@ CONFIG_NXWM_TOUCHSCREEN_DEVINIT=y CONFIG_NXWM_TOUCHSCREEN_DEVNO=0 CONFIG_NXWM_TOUCHSCREEN_DEVPATH="/dev/input0" CONFIG_NXWM_TOUCHSCREEN_SIGNO=5 -CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=100 +CONFIG_NXWM_TOUCHSCREEN_LISTENERPRIO=101 CONFIG_NXWM_TOUCHSCREEN_LISTENERSTACK=1596 # @@ -1689,12 +1713,12 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1703,6 +1727,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/shenzhou/src/stm32_appinit.c b/configs/shenzhou/src/stm32_appinit.c index 4ef9ad82db2..9b18c80d5d3 100644 --- a/configs/shenzhou/src/stm32_appinit.c +++ b/configs/shenzhou/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/shenzhou/src/stm32_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -142,11 +142,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(HAVE_MMCSD) || defined(HAVE_USBHOST) || defined(HAVE_W25) int ret; diff --git a/configs/shenzhou/thttpd/defconfig b/configs/shenzhou/thttpd/defconfig index 6eab31a470f..900329f2a2d 100644 --- a/configs/shenzhou/thttpd/defconfig +++ b/configs/shenzhou/thttpd/defconfig @@ -103,6 +103,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -121,6 +122,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -142,6 +144,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -149,6 +152,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # CONFIG_DEBUG_HARDFAULT is not set @@ -160,6 +164,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -223,6 +228,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -267,6 +273,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -432,19 +439,35 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -730,7 +753,12 @@ CONFIG_RTC=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -762,10 +790,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set CONFIG_MTD_W25=y CONFIG_W25_SPIMODE=0 @@ -826,33 +856,28 @@ CONFIG_ETH0_PHY_DM9161=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -1117,6 +1142,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1168,16 +1195,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1187,18 +1215,18 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXFLAT is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_ROMFS is not set @@ -1207,8 +1235,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1220,17 +1248,17 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1250,8 +1278,8 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1265,9 +1293,14 @@ CONFIG_EXAMPLES_THTTPD_NETMASK=0xffffff00 # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y @@ -1303,15 +1336,11 @@ CONFIG_THTTPD_IDLE_SEND_LIMIT_SEC=300 CONFIG_THTTPD_TILDE_MAP_NONE=y # CONFIG_THTTPD_GENERATE_INDICES is not set # CONFIG_THTTPD_USE_URLPATTERN is not set -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1413,6 +1442,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # CONFIG_NSH_NETINIT_DEBUG is not set @@ -1458,13 +1488,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1473,6 +1503,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/bas/defconfig b/configs/sim/bas/defconfig index 940018a8ad4..a20524034a8 100644 --- a/configs/sim/bas/defconfig +++ b/configs/sim/bas/defconfig @@ -305,28 +305,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/configdata/defconfig b/configs/sim/configdata/defconfig index d03050535df..3da0ca88e8f 100644 --- a/configs/sim/configdata/defconfig +++ b/configs/sim/configdata/defconfig @@ -326,28 +326,28 @@ CONFIG_RAMMTD_FLASHSIM=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/cxxtest/defconfig b/configs/sim/cxxtest/defconfig index 67bad24948c..bd146760dc6 100644 --- a/configs/sim/cxxtest/defconfig +++ b/configs/sim/cxxtest/defconfig @@ -317,28 +317,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/mount/defconfig b/configs/sim/mount/defconfig index 3465d1daed5..e95d92e04a5 100644 --- a/configs/sim/mount/defconfig +++ b/configs/sim/mount/defconfig @@ -316,28 +316,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/mtdpart/defconfig b/configs/sim/mtdpart/defconfig index d8c84e8a95c..ac90d3010b6 100644 --- a/configs/sim/mtdpart/defconfig +++ b/configs/sim/mtdpart/defconfig @@ -324,28 +324,28 @@ CONFIG_RAMMTD_FLASHSIM=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/mtdrwb/defconfig b/configs/sim/mtdrwb/defconfig index f4b00409293..18f38462f07 100644 --- a/configs/sim/mtdrwb/defconfig +++ b/configs/sim/mtdrwb/defconfig @@ -355,28 +355,28 @@ CONFIG_RAMMTD_FLASHSIM=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/nettest/defconfig b/configs/sim/nettest/defconfig index acfdb509990..d5a3b826519 100644 --- a/configs/sim/nettest/defconfig +++ b/configs/sim/nettest/defconfig @@ -308,28 +308,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/nsh/defconfig b/configs/sim/nsh/defconfig index 5d8fe8b2179..7fecde9a3d5 100644 --- a/configs/sim/nsh/defconfig +++ b/configs/sim/nsh/defconfig @@ -74,6 +74,8 @@ CONFIG_HOST_X86_64=y CONFIG_SIM_X8664_SYSTEMV=y # CONFIG_SIM_X8664_MICROSOFT is not set CONFIG_SIM_WALLTIME=y +CONFIG_SIM_NET_HOST_ROUTE=y +# CONFIG_SIM_NET_BRIDGE is not set # CONFIG_SIM_FRAMEBUFFER is not set # CONFIG_SIM_SPIFLASH is not set @@ -88,6 +90,7 @@ CONFIG_SIM_WALLTIME=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +CONFIG_ARCH_HAVE_MULTICPU=y # CONFIG_ARCH_HAVE_VFORK is not set # CONFIG_ARCH_HAVE_MMU is not set # CONFIG_ARCH_HAVE_MPU is not set @@ -296,11 +299,17 @@ CONFIG_DEV_LOOP=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support # +# CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set # CONFIG_MODEM is not set @@ -314,32 +323,28 @@ CONFIG_DEV_LOOP=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # CONFIG_MCU_SERIAL is not set # CONFIG_STANDARD_SERIAL is not set # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -392,7 +397,9 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_FS_NXFFS is not set CONFIG_FS_ROMFS=y # CONFIG_FS_TMPFS is not set @@ -434,6 +441,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -483,6 +494,8 @@ CONFIG_TIME_EXTENDED=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -525,10 +538,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_HELLO=y CONFIG_EXAMPLES_HELLO_PRIORITY=100 CONFIG_EXAMPLES_HELLO_STACKSIZE=8192 -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -537,17 +550,18 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=8192 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_ROMFS is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -555,18 +569,19 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_THTTPD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -581,6 +596,11 @@ CONFIG_FSUTILS_PASSWD_KEY2=0x9abcdef0 CONFIG_FSUTILS_PASSWD_KEY3=0x12345678 CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0 +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + # # Graphics Support # @@ -592,8 +612,8 @@ CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0 # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -604,6 +624,7 @@ CONFIG_FSUTILS_PASSWD_KEY4=0x9abcdef0 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -741,12 +762,12 @@ CONFIG_NSH_LOGIN_FAILCOUNT=3 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y @@ -756,7 +777,7 @@ CONFIG_READLINE_MAX_BUILTINS=64 CONFIG_READLINE_MAX_EXTCMDS=64 # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_SYMTAB is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/nsh2/defconfig b/configs/sim/nsh2/defconfig index f30165ec1d3..4ff288e4844 100644 --- a/configs/sim/nsh2/defconfig +++ b/configs/sim/nsh2/defconfig @@ -314,28 +314,28 @@ CONFIG_INPUT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/nx/defconfig b/configs/sim/nx/defconfig index a59b295ec7f..14c4f151056 100644 --- a/configs/sim/nx/defconfig +++ b/configs/sim/nx/defconfig @@ -320,28 +320,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/nx11/defconfig b/configs/sim/nx11/defconfig index 31cbedd1085..5db318657fb 100644 --- a/configs/sim/nx11/defconfig +++ b/configs/sim/nx11/defconfig @@ -321,28 +321,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/nxffs/defconfig b/configs/sim/nxffs/defconfig index 878f5a9b760..167222da6c9 100644 --- a/configs/sim/nxffs/defconfig +++ b/configs/sim/nxffs/defconfig @@ -301,28 +301,28 @@ CONFIG_RAMMTD_FLASHSIM=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/nxlines/defconfig b/configs/sim/nxlines/defconfig index 9b878efec1b..b31cb37fa47 100644 --- a/configs/sim/nxlines/defconfig +++ b/configs/sim/nxlines/defconfig @@ -312,28 +312,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/nxwm/defconfig b/configs/sim/nxwm/defconfig index 5629cecde1d..1c872a87925 100644 --- a/configs/sim/nxwm/defconfig +++ b/configs/sim/nxwm/defconfig @@ -311,28 +311,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/ostest/defconfig b/configs/sim/ostest/defconfig index 142326ee31f..b5065b098b5 100644 --- a/configs/sim/ostest/defconfig +++ b/configs/sim/ostest/defconfig @@ -328,28 +328,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/pashello/defconfig b/configs/sim/pashello/defconfig index 70e3e55df05..2fed08f743c 100644 --- a/configs/sim/pashello/defconfig +++ b/configs/sim/pashello/defconfig @@ -293,28 +293,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/src/sim_appinit.c b/configs/sim/src/sim_appinit.c index eecf0415cf6..4100ec736bd 100644 --- a/configs/sim/src/sim_appinit.c +++ b/configs/sim/src/sim_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * configs/sim/src/sim_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -54,10 +54,25 @@ * called directly from application code, but only indirectly via the * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ #ifdef CONFIG_LIB_BOARDCTL -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifndef CONFIG_BOARD_INITIALIZE sim_bringup(); diff --git a/configs/sim/touchscreen/defconfig b/configs/sim/touchscreen/defconfig index 7baca3000ab..5887fafd2a9 100644 --- a/configs/sim/touchscreen/defconfig +++ b/configs/sim/touchscreen/defconfig @@ -343,28 +343,28 @@ CONFIG_INPUT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/traveler/defconfig b/configs/sim/traveler/defconfig index f001ac56491..86e5d9cc773 100644 --- a/configs/sim/traveler/defconfig +++ b/configs/sim/traveler/defconfig @@ -335,28 +335,28 @@ CONFIG_AJOYSTICK=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/udgram/defconfig b/configs/sim/udgram/defconfig index c46a0d0bddd..8a1b8ce8a65 100644 --- a/configs/sim/udgram/defconfig +++ b/configs/sim/udgram/defconfig @@ -299,7 +299,12 @@ CONFIG_DEV_NULL=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -320,32 +325,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # CONFIG_MCU_SERIAL is not set # CONFIG_STANDARD_SERIAL is not set # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -619,10 +620,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_HELLO=y CONFIG_EXAMPLES_HELLO_PRIORITY=100 CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -631,17 +632,17 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_ROMFS is not set @@ -650,18 +651,14 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_THTTPD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_UNIONFS is not set -# CONFIG_EXAMPLES_USBSERIAL is not set -# CONFIG_EXAMPLES_USBTERM is not set CONFIG_EXAMPLES_UDGRAM=y CONFIG_EXAMPLES_UDGRAM_ADDR="/dev/fifo" CONFIG_EXAMPLES_UDGRAM_SERVER_APPNAME="server" @@ -670,8 +667,12 @@ CONFIG_EXAMPLES_UDGRAM_SERVER_PRIORITY=100 CONFIG_EXAMPLES_UDGRAM_CLIENT_APPNAME="client" CONFIG_EXAMPLES_UDGRAM_CLIENT_STACKSIZE=4096 CONFIG_EXAMPLES_UDGRAM_CLIENT_PRIORITY=100 +# CONFIG_EXAMPLES_UNIONFS is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_USTREAM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -695,8 +696,8 @@ CONFIG_EXAMPLES_UDGRAM_CLIENT_PRIORITY=100 # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -707,10 +708,11 @@ CONFIG_EXAMPLES_UDGRAM_CLIENT_PRIORITY=100 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set -# CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_SMTP is not set # # NSH Library @@ -825,6 +827,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -847,12 +850,12 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -861,7 +864,7 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_SYMTAB is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/sim/unionfs/defconfig b/configs/sim/unionfs/defconfig index ca5af52a631..5646c7bccde 100644 --- a/configs/sim/unionfs/defconfig +++ b/configs/sim/unionfs/defconfig @@ -305,28 +305,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sim/ustream/defconfig b/configs/sim/ustream/defconfig index 10b60384dc6..237e32d66fa 100644 --- a/configs/sim/ustream/defconfig +++ b/configs/sim/ustream/defconfig @@ -299,7 +299,12 @@ CONFIG_DEV_NULL=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -320,32 +325,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # CONFIG_MCU_SERIAL is not set # CONFIG_STANDARD_SERIAL is not set # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -619,10 +620,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_HELLO=y CONFIG_EXAMPLES_HELLO_PRIORITY=100 CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -631,17 +632,17 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_ROMFS is not set @@ -650,23 +651,23 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_THTTPD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set -# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UDGRAM is not set # CONFIG_EXAMPLES_UNIONFS is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set -# CONFIG_EXAMPLES_UDGRAM is not set CONFIG_EXAMPLES_USTREAM=y CONFIG_EXAMPLES_USTREAM_ADDR="/dev/fifo" # CONFIG_EXAMPLES_USTREAM_USE_POLL is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -690,8 +691,8 @@ CONFIG_EXAMPLES_USTREAM_ADDR="/dev/fifo" # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -702,10 +703,11 @@ CONFIG_EXAMPLES_USTREAM_ADDR="/dev/fifo" # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set -# CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_SMTP is not set # # NSH Library @@ -820,6 +822,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -842,12 +845,12 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -856,7 +859,7 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_SYMTAB is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/spark/composite/defconfig b/configs/spark/composite/defconfig index eb394d18573..bb01a161b57 100644 --- a/configs/spark/composite/defconfig +++ b/configs/spark/composite/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -407,14 +413,18 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_USART2_RXDMA is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -710,6 +720,7 @@ CONFIG_MTD_BYTE_WRITE=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set CONFIG_MTD_SST25=y @@ -720,6 +731,7 @@ CONFIG_SST25_SECTOR512=y # CONFIG_SST25_SLOWWRITE is not set # CONFIG_SST25_SLOWREAD is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -732,33 +744,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -795,7 +802,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -CONFIG_USBDEV_TRACE_STRINGS=y # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -827,8 +833,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=64 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=64 -CONFIG_CDCACM_NWRREQS=2 CONFIG_CDCACM_NRDREQS=2 +CONFIG_CDCACM_NWRREQS=2 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=96 CONFIG_CDCACM_TXBUFSIZE=96 @@ -1002,6 +1008,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1123,6 +1131,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1243,7 +1252,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/spark/include/board.h b/configs/spark/include/board.h index 197f53ebb84..b44dce3aab7 100644 --- a/configs/spark/include/board.h +++ b/configs/spark/include/board.h @@ -2,7 +2,7 @@ * configs/spark/include/board.h * include/arch/board/board.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Librae * @@ -98,14 +98,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ @@ -115,8 +115,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/spark/nsh/defconfig b/configs/spark/nsh/defconfig index a0a949c9b75..6f2a5f631ab 100644 --- a/configs/spark/nsh/defconfig +++ b/configs/spark/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -407,14 +413,18 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_USART2_RXDMA is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -529,6 +539,7 @@ CONFIG_SPARK_FLASH_MINOR=0 CONFIG_LIB_BOARDCTL=y # CONFIG_BOARDCTL_RESET is not set # CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_USBDEVCTRL is not set # CONFIG_BOARDCTL_TSCTEST is not set # CONFIG_BOARDCTL_ADCTEST is not set # CONFIG_BOARDCTL_PWMTEST is not set @@ -709,6 +720,7 @@ CONFIG_MTD_BYTE_WRITE=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set CONFIG_MTD_SST25=y @@ -719,6 +731,7 @@ CONFIG_SST25_SECTOR512=y # CONFIG_SST25_SLOWWRITE is not set # CONFIG_SST25_SLOWREAD is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -731,33 +744,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -794,7 +802,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -# CONFIG_USBDEV_TRACE_STRINGS is not set # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -826,8 +833,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=100 CONFIG_CDCACM_RXBUFSIZE=100 CONFIG_CDCACM_TXBUFSIZE=80 @@ -1001,6 +1008,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1122,6 +1131,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1244,7 +1254,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/spark/src/stm32_appinit.c b/configs/spark/src/stm32_appinit.c index 9b2d965a31c..c91969cd590 100644 --- a/configs/spark/src/stm32_appinit.c +++ b/configs/spark/src/stm32_appinit.c @@ -130,11 +130,28 @@ static bool g_app_initialzed; * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* Check if already initialized */ diff --git a/configs/spark/src/stm32_boot.c b/configs/spark/src/stm32_boot.c index 763538bebdf..6d278fb5029 100644 --- a/configs/spark/src/stm32_boot.c +++ b/configs/spark/src/stm32_boot.c @@ -123,7 +123,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - board_app_initialize(); + board_app_initialize(0); #endif /* CC3000 wireless initialization diff --git a/configs/spark/src/stm32_usbmsc.c b/configs/spark/src/stm32_usbmsc.c index 23c4cc9533e..57e9e30d82c 100644 --- a/configs/spark/src/stm32_usbmsc.c +++ b/configs/spark/src/stm32_usbmsc.c @@ -62,7 +62,7 @@ int board_usbmsc_initialize(int port) { - return board_app_initialize(); + return board_app_initialize(0); } #endif /* CONFIG_USBMSC && CONFIG_BOARDCTL_USBDEVCTRL */ diff --git a/configs/spark/usbmsc/defconfig b/configs/spark/usbmsc/defconfig index eba276536d4..cb4040ef822 100644 --- a/configs/spark/usbmsc/defconfig +++ b/configs/spark/usbmsc/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -407,14 +413,18 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_USART2_RXDMA is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -710,6 +720,7 @@ CONFIG_MTD_BYTE_WRITE=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set CONFIG_MTD_SST25=y @@ -720,6 +731,7 @@ CONFIG_SST25_SECTOR512=y # CONFIG_SST25_SLOWWRITE is not set # CONFIG_SST25_SLOWREAD is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -731,33 +743,28 @@ CONFIG_SST25_SECTOR512=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -794,7 +801,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -CONFIG_USBDEV_TRACE_STRINGS=y # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -966,6 +972,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1087,6 +1095,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1208,7 +1217,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/spark/usbnsh/defconfig b/configs/spark/usbnsh/defconfig index 30e873009d5..4d3c51a5ffa 100644 --- a/configs/spark/usbnsh/defconfig +++ b/configs/spark/usbnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -407,14 +413,18 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_USART2_RXDMA is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -526,7 +536,14 @@ CONFIG_SPARK_FLASH_SPI=2 CONFIG_SPARK_FLASH_MINOR=0 # CONFIG_SPARK_FLASH_PART is not set CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -704,6 +721,7 @@ CONFIG_MTD_BYTE_WRITE=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set CONFIG_MTD_SST25=y @@ -714,6 +732,7 @@ CONFIG_SST25_SPIFREQUENCY=20000000 # CONFIG_SST25_SLOWWRITE is not set # CONFIG_SST25_SLOWREAD is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -725,33 +744,28 @@ CONFIG_SST25_SPIFREQUENCY=20000000 CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -788,7 +802,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -# CONFIG_USBDEV_TRACE_STRINGS is not set # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -808,8 +821,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -945,6 +958,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1061,6 +1076,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1184,7 +1200,6 @@ CONFIG_USBDEV_MINOR=0 # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/spark/usbserial/defconfig b/configs/spark/usbserial/defconfig index cfa672320f6..aba09edc985 100644 --- a/configs/spark/usbserial/defconfig +++ b/configs/spark/usbserial/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103CB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -407,14 +413,18 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_USART2_RXDMA is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -526,7 +536,14 @@ CONFIG_SPARK_FLASH_SPI=2 CONFIG_SPARK_FLASH_MINOR=0 # CONFIG_SPARK_FLASH_PART is not set CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -707,6 +724,7 @@ CONFIG_MTD_BYTE_WRITE=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set CONFIG_MTD_SST25=y @@ -717,6 +735,7 @@ CONFIG_SST25_SECTOR512=y # CONFIG_SST25_SLOWWRITE is not set # CONFIG_SST25_SLOWREAD is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -729,33 +748,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -792,7 +806,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -CONFIG_USBDEV_TRACE_STRINGS=y # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -812,8 +825,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=64 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=64 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=40 CONFIG_CDCACM_TXBUFSIZE=40 @@ -969,6 +982,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=0 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1096,6 +1111,7 @@ CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3210e-eval/buttons/defconfig b/configs/stm3210e-eval/buttons/defconfig index 77af75773e5..11783f56529 100644 --- a/configs/stm3210e-eval/buttons/defconfig +++ b/configs/stm3210e-eval/buttons/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -139,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -249,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -421,14 +424,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -678,34 +687,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -972,6 +975,7 @@ CONFIG_EXAMPLES_BUTTONS_NAME7="UP" # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3210e-eval/composite/defconfig b/configs/stm3210e-eval/composite/defconfig index fcd3a3edff5..d4664da4222 100644 --- a/configs/stm3210e-eval/composite/defconfig +++ b/configs/stm3210e-eval/composite/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -139,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -251,6 +253,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -424,14 +427,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -735,10 +744,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -751,34 +762,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1120,6 +1125,7 @@ CONFIG_ARCH_HAVE_TLS=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3210e-eval/include/board.h b/configs/stm3210e-eval/include/board.h index 462d07ca538..087b762bc2c 100644 --- a/configs/stm3210e-eval/include/board.h +++ b/configs/stm3210e-eval/include/board.h @@ -1,8 +1,7 @@ /************************************************************************************ * configs/stm3210e-eval/include/board.h - * include/arch/board/board.h * - * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -94,14 +93,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ @@ -111,8 +110,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/stm3210e-eval/nsh/defconfig b/configs/stm3210e-eval/nsh/defconfig index c97a503b7a5..bc1df0013a4 100644 --- a/configs/stm3210e-eval/nsh/defconfig +++ b/configs/stm3210e-eval/nsh/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -139,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -252,6 +254,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -425,14 +428,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -738,10 +747,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -753,34 +764,28 @@ CONFIG_MTD=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1078,6 +1083,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3210e-eval/nsh2/defconfig b/configs/stm3210e-eval/nsh2/defconfig index 41120894428..f2a22b3f389 100644 --- a/configs/stm3210e-eval/nsh2/defconfig +++ b/configs/stm3210e-eval/nsh2/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -139,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -251,6 +253,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -426,14 +429,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -752,6 +761,7 @@ CONFIG_LCD_RPORTRAIT=y # Alphanumeric/Segment LCD Devices # # CONFIG_LCD_LCD1602 is not set +# CONFIG_LCD_BACKPACK is not set # # LED Support @@ -795,10 +805,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -810,34 +822,28 @@ CONFIG_MTD=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -980,6 +986,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1277,6 +1284,7 @@ CONFIG_EXAMPLES_NXHELLO_FONTID=6 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1394,7 +1402,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=1 diff --git a/configs/stm3210e-eval/nx/defconfig b/configs/stm3210e-eval/nx/defconfig index 4adf156d805..2554b724aac 100644 --- a/configs/stm3210e-eval/nx/defconfig +++ b/configs/stm3210e-eval/nx/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -139,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -249,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -424,14 +427,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -748,34 +757,28 @@ CONFIG_LCD_RPORTRAIT=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -888,6 +891,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1152,6 +1156,7 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3210e-eval/nxterm/defconfig b/configs/stm3210e-eval/nxterm/defconfig index 3bb2e0e1758..4a19b0a255c 100644 --- a/configs/stm3210e-eval/nxterm/defconfig +++ b/configs/stm3210e-eval/nxterm/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -139,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -249,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -422,14 +425,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -744,34 +753,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -872,6 +875,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1153,6 +1157,7 @@ CONFIG_EXAMPLES_NXTERM=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3210e-eval/pm/defconfig b/configs/stm3210e-eval/pm/defconfig index af1908d6354..4acbe0d3a7e 100644 --- a/configs/stm3210e-eval/pm/defconfig +++ b/configs/stm3210e-eval/pm/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -139,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -249,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -425,14 +428,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -703,6 +712,7 @@ CONFIG_RTC=y CONFIG_RTC_HIRES=y CONFIG_RTC_FREQUENCY=16384 CONFIG_RTC_ALARM=y +CONFIG_RTC_NALARMS=1 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -785,34 +795,28 @@ CONFIG_PM_SLEEPENTER_COUNT=70 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -913,6 +917,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1205,6 +1210,7 @@ CONFIG_EXAMPLES_NXHELLO_FONTID=6 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3210e-eval/src/stm32_appinit.c b/configs/stm3210e-eval/src/stm32_appinit.c index abc4e5881d0..4a5d55c9ebe 100644 --- a/configs/stm3210e-eval/src/stm32_appinit.c +++ b/configs/stm3210e-eval/src/stm32_appinit.c @@ -176,11 +176,28 @@ static void stm32_i2ctool(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef CONFIG_STM32_SPI1 FAR struct spi_dev_s *spi; diff --git a/configs/stm3210e-eval/usbmsc/defconfig b/configs/stm3210e-eval/usbmsc/defconfig index 78ad7a1b5f2..001c83e4f56 100644 --- a/configs/stm3210e-eval/usbmsc/defconfig +++ b/configs/stm3210e-eval/usbmsc/defconfig @@ -117,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -135,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -244,6 +246,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -417,14 +420,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -716,34 +725,28 @@ CONFIG_SDIO_PREFLIGHT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1050,6 +1053,7 @@ CONFIG_ARCH_HAVE_TLS=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3210e-eval/usbserial/defconfig b/configs/stm3210e-eval/usbserial/defconfig index b20ad0966ca..4e6b606f275 100644 --- a/configs/stm3210e-eval/usbserial/defconfig +++ b/configs/stm3210e-eval/usbserial/defconfig @@ -117,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -135,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -242,6 +244,7 @@ CONFIG_ARCH_CHIP_STM32F103ZE=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -414,14 +417,20 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -692,34 +701,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1014,6 +1017,7 @@ CONFIG_EXAMPLES_USBSERIAL_BUFSIZE=512 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3220g-eval/dhcpd/defconfig b/configs/stm3220g-eval/dhcpd/defconfig index 2817808c5e9..1a09df8349a 100644 --- a/configs/stm3220g-eval/dhcpd/defconfig +++ b/configs/stm3220g-eval/dhcpd/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -246,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F207IG=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -438,13 +444,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -745,33 +755,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1002,6 +1007,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_DNSCLIENT is not set @@ -1090,7 +1097,6 @@ CONFIG_EXAMPLES_DHCPD_NETMASK=0xffffff00 # CONFIG_EXAMPLES_UDPBLASTER is not set # CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1140,6 +1146,7 @@ CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00 CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808 CONFIG_NETUTILS_DHCPD_OFFERTIME=3600 CONFIG_NETUTILS_DHCPD_DECLINETIME=3600 +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3220g-eval/ide/nsh/iar/libdrivers.ewp b/configs/stm3220g-eval/ide/nsh/iar/libdrivers.ewp index b009ac58d0f..0f2f399a3ec 100644 --- a/configs/stm3220g-eval/ide/nsh/iar/libdrivers.ewp +++ b/configs/stm3220g-eval/ide/nsh/iar/libdrivers.ewp @@ -1991,9 +1991,6 @@ $PROJ_DIR$/../../../../../drivers/mtd/at45db.c - - $PROJ_DIR$/../../../../../drivers/mtd/flash_eraseall.c - $PROJ_DIR$/../../../../../drivers/mtd/ftl.c diff --git a/configs/stm3220g-eval/ide/nsh/uvision/libdrivers.uvproj b/configs/stm3220g-eval/ide/nsh/uvision/libdrivers.uvproj index f1343317b79..f31ea50bf86 100644 --- a/configs/stm3220g-eval/ide/nsh/uvision/libdrivers.uvproj +++ b/configs/stm3220g-eval/ide/nsh/uvision/libdrivers.uvproj @@ -383,11 +383,6 @@ 1 ../../../../../drivers/mtd/at45db.c - - flash_eraseall.c - 1 - ../../../../../drivers/mtd/flash_eraseall.c - ftl.c 1 diff --git a/configs/stm3220g-eval/include/board.h b/configs/stm3220g-eval/include/board.h index d8dad32f74f..74d2b5bea78 100644 --- a/configs/stm3220g-eval/include/board.h +++ b/configs/stm3220g-eval/include/board.h @@ -1,8 +1,7 @@ /************************************************************************************ * configs/stm3220g-eval/include/board.h - * include/arch/board/board.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -162,8 +161,14 @@ * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/stm3220g-eval/nettest/defconfig b/configs/stm3220g-eval/nettest/defconfig index 0e4dc1d9843..59d9ac24fad 100644 --- a/configs/stm3220g-eval/nettest/defconfig +++ b/configs/stm3220g-eval/nettest/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -246,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F207IG=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -438,13 +444,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -746,33 +756,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -1007,6 +1012,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1101,7 +1108,6 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WGET is not set @@ -1138,6 +1144,7 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3220g-eval/nsh/defconfig b/configs/stm3220g-eval/nsh/defconfig index 8dcfe1f1b7b..2d730e87079 100644 --- a/configs/stm3220g-eval/nsh/defconfig +++ b/configs/stm3220g-eval/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -194,6 +199,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set CONFIG_ARCH_CHIP_STM32F207IG=y @@ -238,6 +244,7 @@ CONFIG_ARCH_CHIP_STM32F207IG=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -419,6 +426,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set @@ -431,13 +442,25 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -716,7 +739,12 @@ CONFIG_RTC_DATETIME=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -755,10 +783,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -810,33 +840,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1098,6 +1123,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1150,16 +1177,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1170,17 +1198,17 @@ CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1188,8 +1216,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1197,15 +1225,14 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1225,8 +1252,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1239,20 +1266,21 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set # CONFIG_NETUTILS_TELNETD is not set CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1355,6 +1383,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1385,14 +1414,14 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_I2CTOOL is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1401,6 +1430,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/nsh2/defconfig b/configs/stm3220g-eval/nsh2/defconfig index f3c606bc6c1..94a88d9a224 100644 --- a/configs/stm3220g-eval/nsh2/defconfig +++ b/configs/stm3220g-eval/nsh2/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -203,6 +208,7 @@ CONFIG_SDIO_DMA=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set CONFIG_ARCH_CHIP_STM32F207IG=y @@ -247,6 +253,7 @@ CONFIG_ARCH_CHIP_STM32F207IG=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -429,6 +436,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set # CONFIG_STM32_DMACAPABLE is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set @@ -734,7 +745,12 @@ CONFIG_RTC_DATETIME=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -778,10 +794,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -834,32 +852,28 @@ CONFIG_ETH0_PHY_DP83848C=y # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # CONFIG_MCU_SERIAL is not set # CONFIG_STANDARD_SERIAL is not set # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1110,6 +1124,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -1161,16 +1177,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1181,17 +1198,17 @@ CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1199,8 +1216,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1208,16 +1225,16 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1237,8 +1254,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1252,21 +1269,22 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1368,6 +1386,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1412,12 +1431,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=1 CONFIG_I2CTOOL_MAXBUS=3 @@ -1425,7 +1444,7 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=100000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1434,6 +1453,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/nxwm/defconfig b/configs/stm3220g-eval/nxwm/defconfig index 90a124b33c9..9ba451d2030 100644 --- a/configs/stm3220g-eval/nxwm/defconfig +++ b/configs/stm3220g-eval/nxwm/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -202,6 +207,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set CONFIG_ARCH_CHIP_STM32F207IG=y @@ -246,6 +252,7 @@ CONFIG_ARCH_CHIP_STM32F207IG=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -428,6 +435,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set # CONFIG_STM32_FSMC_SRAM is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set @@ -440,13 +451,25 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -583,7 +606,14 @@ CONFIG_NSH_MMCSDSLOTNO=0 # CONFIG_STM32_ILI9325_DISABLE is not set CONFIG_STM3220G_LCD=y CONFIG_LCD_RDSHIFT=5 -# CONFIG_LIB_BOARDCTL is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -756,10 +786,14 @@ CONFIG_STMPE811_TEMP_DISABLE=y # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set CONFIG_LCD_NOGETRUN=y @@ -787,11 +821,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -860,33 +890,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1088,6 +1113,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 CONFIG_NX_WRITEONLY=y +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1256,6 +1282,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set # CONFIG_NETDB_DNSCLIENT is not set @@ -1295,16 +1323,17 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_LCDRW is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set @@ -1315,18 +1344,18 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1342,11 +1371,10 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # @@ -1371,8 +1399,8 @@ CONFIG_HAVE_CXXINITIALIZE=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1384,20 +1412,21 @@ CONFIG_HAVE_CXXINITIALIZE=y # # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1497,6 +1526,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1537,6 +1567,7 @@ CONFIG_NXWIDGETS=y # NX Server/Device Configuration # CONFIG_NXWIDGETS_FLICKERFREE=y +# CONFIG_NXWIDGETS_EXTERNINIT is not set CONFIG_NXWIDGETS_DEVNO=0 CONFIG_NXWIDGET_SERVERINIT=y CONFIG_NXWIDGETS_SERVERPRIO=110 @@ -1550,6 +1581,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=2048 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # @@ -1716,13 +1748,13 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_I2CTOOL is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1731,6 +1763,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3220g-eval/src/stm32_appinit.c b/configs/stm3220g-eval/src/stm32_appinit.c index 54311e8fe82..89795b54d50 100644 --- a/configs/stm3220g-eval/src/stm32_appinit.c +++ b/configs/stm3220g-eval/src/stm32_appinit.c @@ -189,11 +189,28 @@ static void stm32_i2ctool(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef CONFIG_STM32_SPI1 FAR struct spi_dev_s *spi; diff --git a/configs/stm3220g-eval/telnetd/defconfig b/configs/stm3220g-eval/telnetd/defconfig index 813c57655da..2e65dced627 100644 --- a/configs/stm3220g-eval/telnetd/defconfig +++ b/configs/stm3220g-eval/telnetd/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -246,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F207IG=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -438,13 +444,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -748,33 +758,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -1009,6 +1014,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1098,7 +1105,6 @@ CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048 # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WGET is not set @@ -1135,6 +1141,7 @@ CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3240g-eval/dhcpd/defconfig b/configs/stm3240g-eval/dhcpd/defconfig index dc62ffb0f30..e78e7312170 100644 --- a/configs/stm3240g-eval/dhcpd/defconfig +++ b/configs/stm3240g-eval/dhcpd/defconfig @@ -252,6 +252,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -447,13 +448,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -754,33 +759,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1150,6 +1150,7 @@ CONFIG_NETUTILS_DHCPD_NETMASK=0xffffff00 CONFIG_NETUTILS_DHCPD_DNSIP=0x08080808 CONFIG_NETUTILS_DHCPD_OFFERTIME=3600 CONFIG_NETUTILS_DHCPD_DECLINETIME=3600 +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3240g-eval/discover/defconfig b/configs/stm3240g-eval/discover/defconfig index c6758e8b190..6e6116857e0 100644 --- a/configs/stm3240g-eval/discover/defconfig +++ b/configs/stm3240g-eval/discover/defconfig @@ -244,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -440,13 +441,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -777,33 +782,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1205,6 +1205,7 @@ CONFIG_EXAMPLES_DISCOVER_NETMASK=0xffffff00 # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3240g-eval/include/board.h b/configs/stm3240g-eval/include/board.h index d693bdacf65..674d58000e2 100644 --- a/configs/stm3240g-eval/include/board.h +++ b/configs/stm3240g-eval/include/board.h @@ -2,7 +2,7 @@ * configs/stm3240g-eval/include/board.h * include/arch/board/board.h * - * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -161,8 +161,14 @@ * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/stm3240g-eval/knxwm/defconfig b/configs/stm3240g-eval/knxwm/defconfig index 35a346cf75c..9d2baf17c6d 100644 --- a/configs/stm3240g-eval/knxwm/defconfig +++ b/configs/stm3240g-eval/knxwm/defconfig @@ -259,6 +259,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -443,6 +444,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set # CONFIG_STM32_CCMEXCLUDE is not set # CONFIG_STM32_FSMC_SRAM is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM2_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -456,13 +461,25 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -581,7 +598,14 @@ CONFIG_STM3240G_LCD_RDSHIFT=5 # CONFIG_STM3240G_ILI9325_DISABLE is not set CONFIG_STM3240G_BOARDINIT_PRIO=196 CONFIG_STM3240G_BOARDINIT_STACK=2048 -# CONFIG_LIB_BOARDCTL is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -725,7 +749,6 @@ CONFIG_I2C_POLLED=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y # CONFIG_RTC_ALARM is not set -CONFIG_RTC_NALARMS=2 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -757,10 +780,14 @@ CONFIG_STMPE811_TEMP_DISABLE=y # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set CONFIG_LCD_NOGETRUN=y @@ -788,11 +815,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -812,33 +835,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -931,6 +949,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1175,6 +1194,7 @@ CONFIG_CXX_NEWLONG=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1212,6 +1232,7 @@ CONFIG_CXX_NEWLONG=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1230,6 +1251,7 @@ CONFIG_NXWIDGETS=y # NX Server/Device Configuration # CONFIG_NXWIDGETS_FLICKERFREE=y +# CONFIG_NXWIDGETS_EXTERNINIT is not set CONFIG_NXWIDGETS_DEVNO=0 CONFIG_NXWIDGETS_CLIENTPRIO=100 CONFIG_NXWIDGETS_LISTENERPRIO=100 @@ -1240,6 +1262,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=2048 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # diff --git a/configs/stm3240g-eval/nettest/defconfig b/configs/stm3240g-eval/nettest/defconfig index a0a47bc9ea0..d8f93001ea3 100644 --- a/configs/stm3240g-eval/nettest/defconfig +++ b/configs/stm3240g-eval/nettest/defconfig @@ -252,6 +252,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -447,13 +448,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -755,33 +760,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -1148,6 +1148,7 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3240g-eval/nsh/defconfig b/configs/stm3240g-eval/nsh/defconfig index 0abef4de7e9..fa7c9c4e385 100644 --- a/configs/stm3240g-eval/nsh/defconfig +++ b/configs/stm3240g-eval/nsh/defconfig @@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -252,6 +253,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -435,6 +437,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set # CONFIG_STM32_CCMEXCLUDE is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM2_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -448,13 +454,25 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -724,7 +742,6 @@ CONFIG_I2C_DRIVER=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y # CONFIG_RTC_ALARM is not set -CONFIG_RTC_NALARMS=2 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -735,7 +752,12 @@ CONFIG_RTC_NALARMS=2 # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -797,33 +819,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1138,16 +1155,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1158,17 +1176,17 @@ CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RANDOM is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set @@ -1177,8 +1195,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1186,10 +1204,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -1213,8 +1230,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1227,20 +1244,21 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1342,6 +1360,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1386,11 +1405,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=1 CONFIG_I2CTOOL_MAXBUS=3 @@ -1398,7 +1417,7 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=100000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1407,6 +1426,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/nsh2/defconfig b/configs/stm3240g-eval/nsh2/defconfig index b38f5dd43b2..d839e77cb2c 100644 --- a/configs/stm3240g-eval/nsh2/defconfig +++ b/configs/stm3240g-eval/nsh2/defconfig @@ -209,6 +209,7 @@ CONFIG_SDIO_DMA=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -253,6 +254,7 @@ CONFIG_SDIO_DMA=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -437,6 +439,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set CONFIG_STM32_CCMEXCLUDE=y # CONFIG_STM32_DMACAPABLE is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM2_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -733,7 +739,6 @@ CONFIG_I2C_DRIVER=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y # CONFIG_RTC_ALARM is not set -CONFIG_RTC_NALARMS=2 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -744,7 +749,12 @@ CONFIG_RTC_NALARMS=2 # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -788,10 +798,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -844,32 +856,28 @@ CONFIG_ETH0_PHY_DP83848C=y # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # CONFIG_MCU_SERIAL is not set # CONFIG_STANDARD_SERIAL is not set # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1173,16 +1181,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1193,17 +1202,17 @@ CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1211,8 +1220,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1220,16 +1229,16 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1249,8 +1258,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1264,21 +1273,22 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1380,6 +1390,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1424,12 +1435,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_FLASH_ERASEALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=1 CONFIG_I2CTOOL_MAXBUS=3 @@ -1437,7 +1448,7 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=100000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1446,6 +1457,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/nxterm/defconfig b/configs/stm3240g-eval/nxterm/defconfig index b7f8ec8a405..ddc8ede129e 100644 --- a/configs/stm3240g-eval/nxterm/defconfig +++ b/configs/stm3240g-eval/nxterm/defconfig @@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -252,6 +253,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -436,6 +438,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set # CONFIG_STM32_CCMEXCLUDE is not set CONFIG_STM32_FSMC_SRAM=y + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM2_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -449,13 +455,25 @@ CONFIG_STM32_FSMC_SRAM=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -727,7 +745,6 @@ CONFIG_I2C_DRIVER=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y # CONFIG_RTC_ALARM is not set -CONFIG_RTC_NALARMS=2 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -738,10 +755,14 @@ CONFIG_RTC_NALARMS=2 # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set CONFIG_LCD_NOGETRUN=y @@ -769,11 +790,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -835,33 +852,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1057,6 +1069,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1276,15 +1289,16 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_LCDRW is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set @@ -1295,17 +1309,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -CONFIG_EXAMPLES_NXTERM=y # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +CONFIG_EXAMPLES_NXTERM=y # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1313,8 +1327,8 @@ CONFIG_EXAMPLES_NXTERM=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1322,10 +1336,9 @@ CONFIG_EXAMPLES_NXTERM=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -1347,8 +1360,8 @@ CONFIG_EXAMPLES_NXTERM=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1361,20 +1374,21 @@ CONFIG_EXAMPLES_NXTERM=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1475,6 +1489,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1520,11 +1535,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=1 CONFIG_I2CTOOL_MAXBUS=3 @@ -1532,7 +1547,7 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=100000 -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1541,6 +1556,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/nxwm/defconfig b/configs/stm3240g-eval/nxwm/defconfig index b29baa006b5..a4f272fb43c 100644 --- a/configs/stm3240g-eval/nxwm/defconfig +++ b/configs/stm3240g-eval/nxwm/defconfig @@ -208,6 +208,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -252,6 +253,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -436,6 +438,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set # CONFIG_STM32_CCMEXCLUDE is not set # CONFIG_STM32_FSMC_SRAM is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM2_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -449,13 +455,25 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -591,7 +609,14 @@ CONFIG_STM3240G_LCD=y CONFIG_STM3240G_LCD_RDSHIFT=5 # CONFIG_STM3240G_ILI9320_DISABLE is not set # CONFIG_STM3240G_ILI9325_DISABLE is not set -# CONFIG_LIB_BOARDCTL is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_TSCTEST=y +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -733,7 +758,6 @@ CONFIG_I2C_POLLED=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y # CONFIG_RTC_ALARM is not set -CONFIG_RTC_NALARMS=2 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -765,10 +789,14 @@ CONFIG_STMPE811_TEMP_DISABLE=y # CONFIG_DJOYSTICK is not set # CONFIG_AJOYSTICK is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set CONFIG_LCD_NOGETRUN=y @@ -796,11 +824,7 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set - -# -# Alphanumeric/Segment LCD Devices -# -# CONFIG_LCD_LCD1602 is not set +# CONFIG_SLCD is not set # # LED Support @@ -862,33 +886,28 @@ CONFIG_ETH0_PHY_NONE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1090,6 +1109,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1306,16 +1326,17 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_LCDRW is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set @@ -1326,18 +1347,18 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1353,10 +1374,10 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # @@ -1381,8 +1402,8 @@ CONFIG_HAVE_CXXINITIALIZE=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1394,20 +1415,21 @@ CONFIG_HAVE_CXXINITIALIZE=y # # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1508,6 +1530,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1549,6 +1572,7 @@ CONFIG_NXWIDGETS=y # NX Server/Device Configuration # CONFIG_NXWIDGETS_FLICKERFREE=y +# CONFIG_NXWIDGETS_EXTERNINIT is not set CONFIG_NXWIDGETS_DEVNO=0 CONFIG_NXWIDGET_SERVERINIT=y CONFIG_NXWIDGETS_SERVERPRIO=110 @@ -1562,6 +1586,7 @@ CONFIG_NXWIDGETS_LISTENERSTACK=2048 # NXWidget Configuration # CONFIG_NXWIDGETS_BPP=16 +# CONFIG_NXWIDGETS_GREYSCALE is not set CONFIG_NXWIDGETS_SIZEOFCHAR=1 # @@ -1728,13 +1753,13 @@ CONFIG_NXWM_HEXCALCULATOR_FONTID=5 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_I2CTOOL is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1743,6 +1768,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/src/stm32_appinit.c b/configs/stm3240g-eval/src/stm32_appinit.c index fd161511273..469180c390c 100644 --- a/configs/stm3240g-eval/src/stm32_appinit.c +++ b/configs/stm3240g-eval/src/stm32_appinit.c @@ -207,11 +207,28 @@ static void stm32_i2ctool(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef HAVE_RTC_DRIVER FAR struct rtc_lowerhalf_s *lower; diff --git a/configs/stm3240g-eval/src/stm32_boot.c b/configs/stm3240g-eval/src/stm32_boot.c index 47322b69cd5..09b3b82eed4 100644 --- a/configs/stm3240g-eval/src/stm32_boot.c +++ b/configs/stm3240g-eval/src/stm32_boot.c @@ -161,7 +161,7 @@ static int board_initthread(int argc, char *argv[]) * but the initialization function must run in kernel space. */ - ret = board_app_initialize(); + ret = board_app_initialize(0); if (ret < 0) { gdbg("ERROR: board_app_initialize failed: %d\n", ret); diff --git a/configs/stm3240g-eval/telnetd/defconfig b/configs/stm3240g-eval/telnetd/defconfig index 56cd01cf5db..b2cc945bdd4 100644 --- a/configs/stm3240g-eval/telnetd/defconfig +++ b/configs/stm3240g-eval/telnetd/defconfig @@ -252,6 +252,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -447,13 +448,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -757,33 +762,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -1145,6 +1145,7 @@ CONFIG_EXAMPLES_TELNETD_CLIENTSTACKSIZE=2048 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm3240g-eval/webserver/defconfig b/configs/stm3240g-eval/webserver/defconfig index 2e3767b6f1f..22e9eae028b 100644 --- a/configs/stm3240g-eval/webserver/defconfig +++ b/configs/stm3240g-eval/webserver/defconfig @@ -200,6 +200,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -244,6 +245,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -427,6 +429,10 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set CONFIG_STM32_CCMEXCLUDE=y + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM2_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -440,13 +446,25 @@ CONFIG_STM32_CCMEXCLUDE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -714,7 +732,6 @@ CONFIG_I2C_POLLED=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y # CONFIG_RTC_ALARM is not set -CONFIG_RTC_NALARMS=2 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -725,7 +742,12 @@ CONFIG_RTC_NALARMS=2 # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -757,10 +779,12 @@ CONFIG_MTD=y # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set # CONFIG_MTD_SMART is not set # CONFIG_MTD_RAMTRON is not set # CONFIG_MTD_SST25 is not set # CONFIG_MTD_SST25XX is not set +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -814,33 +838,28 @@ CONFIG_ETH0_PHY_NONE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1142,16 +1161,17 @@ CONFIG_HAVE_CXXINITIALIZE=y # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1174,18 +1194,18 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1201,19 +1221,19 @@ CONFIG_EXAMPLES_NETTEST_CLIENTIP=0x0a000001 # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set CONFIG_EXAMPLES_WEBSERVER=y CONFIG_EXAMPLES_WEBSERVER_IPADDR=0x0a000002 CONFIG_EXAMPLES_WEBSERVER_DRIPADDR=0x0a000001 CONFIG_EXAMPLES_WEBSERVER_NETMASK=0xffffff00 CONFIG_EXAMPLES_WEBSERVER_NOMAC=y -# CONFIG_EXAMPLES_USBTERM is not set -# CONFIG_EXAMPLES_WATCHDOG is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_FLASH_ERASEALL is not set # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set @@ -1233,8 +1253,8 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1246,12 +1266,16 @@ CONFIG_EXAMPLES_WEBSERVER_NOMAC=y # # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y # CONFIG_NETUTILS_TFTPC is not set -CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_WEBCLIENT is not set CONFIG_NETUTILS_WEBSERVER=y # CONFIG_NETUTILS_HTTPD_SINGLECONNECT is not set @@ -1265,10 +1289,7 @@ CONFIG_NETUTILS_HTTPD_CLASSIC=y # CONFIG_NETUTILS_HTTPD_MMAP is not set # CONFIG_NETUTILS_HTTPD_SENDFILE is not set CONFIG_NETUTILS_HTTPD_KEEPALIVE_DISABLE=y -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1368,6 +1389,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1411,13 +1433,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_SYSTEM_I2CTOOL is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_I2CTOOL is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1426,6 +1448,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm3240g-eval/xmlrpc/defconfig b/configs/stm3240g-eval/xmlrpc/defconfig index f5cbd7e159a..010bb5d881c 100644 --- a/configs/stm3240g-eval/xmlrpc/defconfig +++ b/configs/stm3240g-eval/xmlrpc/defconfig @@ -244,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -440,13 +441,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART3_SERIALDRIVER=y +# CONFIG_STM32_USART3_1WIREDRIVER is not set # CONFIG_USART3_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -772,33 +777,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -CONFIG_ARCH_HAVE_USART3=y -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART3_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +CONFIG_USART3_SERIALDRIVER=y +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -1204,6 +1204,7 @@ CONFIG_EXAMPLES_XMLRPC_NETMASK=0xffffff00 # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set diff --git a/configs/stm32_tiny/include/board.h b/configs/stm32_tiny/include/board.h index d393437c50c..30b472ca186 100644 --- a/configs/stm32_tiny/include/board.h +++ b/configs/stm32_tiny/include/board.h @@ -1,8 +1,7 @@ /************************************************************************************ * configs/stm32_tiny/include/board.h - * include/arch/board/board.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Authors: Gregory Nutt * Laurent Latil * @@ -94,14 +93,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ @@ -111,8 +110,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/stm32_tiny/nsh/defconfig b/configs/stm32_tiny/nsh/defconfig index d5e94e12524..488ebd637b0 100644 --- a/configs/stm32_tiny/nsh/defconfig +++ b/configs/stm32_tiny/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARCH_CHIP_STM32F103C8=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -407,13 +413,17 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -502,6 +512,7 @@ CONFIG_RAM_SIZE=20480 # Board Selection # CONFIG_ARCH_BOARD_STM32_TINY=y +# CONFIG_ARCH_BOARD_STM32F103_MINIMUM is not set # CONFIG_ARCH_BOARD_CUSTOM is not set CONFIG_ARCH_BOARD="stm32_tiny" @@ -688,33 +699,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -867,6 +873,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -980,6 +988,7 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32_tiny/src/stm32_appinit.c b/configs/stm32_tiny/src/stm32_appinit.c index 2f117d2c2e7..4b590de5d53 100644 --- a/configs/stm32_tiny/src/stm32_appinit.c +++ b/configs/stm32_tiny/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/stm32_tiny/src/stm32_appinit.c * - * Copyright (C) 2009, 2011, 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2009, 2011, 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -49,10 +49,6 @@ #include "stm32.h" #include "stm32_tiny.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -61,11 +57,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(CONFIG_WL_NRF24L01) syslog(LOG_INFO, "Register the nRF24L01 module"); diff --git a/configs/stm32_tiny/usbnsh/defconfig b/configs/stm32_tiny/usbnsh/defconfig index f839062025a..18a9cdab677 100644 --- a/configs/stm32_tiny/usbnsh/defconfig +++ b/configs/stm32_tiny/usbnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -122,6 +125,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -132,6 +136,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103C8=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -405,13 +411,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -495,6 +505,7 @@ CONFIG_RAM_SIZE=20480 # Board Selection # CONFIG_ARCH_BOARD_STM32_TINY=y +# CONFIG_ARCH_BOARD_STM32F103_MINIMUM is not set # CONFIG_ARCH_BOARD_CUSTOM is not set CONFIG_ARCH_BOARD="stm32_tiny" @@ -509,7 +520,14 @@ CONFIG_NSH_MMCSDMINOR=0 # Board-Specific Options # CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -663,33 +681,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -726,7 +739,6 @@ CONFIG_USBDEV_MAXPOWER=100 # CONFIG_ARCH_USBDEV_STALLQUEUE is not set CONFIG_USBDEV_TRACE=y CONFIG_USBDEV_TRACE_NRECORDS=32 -# CONFIG_USBDEV_TRACE_STRINGS is not set # CONFIG_USBDEV_TRACE_INITIALIDSET is not set # @@ -746,8 +758,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -875,6 +887,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -987,6 +1001,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f103-minimum/README.txt b/configs/stm32f103-minimum/README.txt index 59bef3ef6a8..4f8ff5849fb 100644 --- a/configs/stm32f103-minimum/README.txt +++ b/configs/stm32f103-minimum/README.txt @@ -421,6 +421,133 @@ instead of configure.sh: Where is one of the following: + minnsh: + ------ + + This is a experiment to see just how small we can get a usable NSH + configuration. This configuration has far fewer features than the nsh + configuration but is also a fraction of the size. + + This minnsh configuration is a "proof-of-concept" and not very usable in + its current state. This configuration was created by disabling + everything possible INCLUDING file system support. Without file system + support, NuttX is pretty much crippled. Here are some of the + consequences of disabling the file system: + + - All features that depend on the file system are lost: device drivers, + mountpoints, message queues, named semaphores. + + - Without device drivers, you cannot interact with the RTOS using POSIX + interfaces. You would have to work with NuttX as with those other + tiny RTOSs: As a scheduler and a callable hardare abstraction layer + (HAL). + + - You cannot use any of the NuttX upper half device drivers since they + depend on the pseudo-file system and device nodes. You can, of + course, continue to use the lower half drivers either directly. Or, + perhaps, you could write some custom minnsh upper half drivers that + do not depend on a file system and expose a HAL interface. + + There is a special version of readline() the NSH uses when there is no + file system. It uses a special up_putc() to write data to the console + and a special function up_getc() to read data from the console. + + - The current up_getc() implementationsa are a kludge. They are + analogous to the up_putc() implementations: They directly poll the + hardware for serial availability, locking up all lower priority tasks + in the entire system while they poll. So a version of NSH that uses + up_getc() essentially blocks the system until a character is received. + + This, of course, could be fixed by creating a special, upper half + implementation of the interrupt-driven serial lower half (like + stm32_serial) that just supports single character console I/O + (perhaps called up_putc and up_getc?). The NSH could wait for serial + input without blocking the system. But then that would increase the + footprint too. + + So although the minnsh configurations are a good starting point for + making things small, they not are really very practical. Why might + you want a NuttX minnsh solution? Perhaps you have software that runs + on a family of chips including some very tiny MCUs. Then perhaps having + the RTOS compatibility would justify the loss of functionality? + + STATUS: + 2016-06-03: Using that config I got this: + + $ ls -l nuttx.bin + -rwxr-xr-x 1 alan alan 12543 Jun 3 17:58 nuttx.bin + + $ arm-none-eabi-size nuttx + text data bss dec hex filename + 12542 1 816 13359 342f nuttx + + And this is free command from NuttX shell: + + NuttShell (NSH) + nsh> free + total used free largest + Mem: 18624 2328 16296 16296 + nsh> + + 2016-06-07: As another experiment, I tried enabling just (1) the file + system, (2) the console device, and (3) the upper half serial driver in + the minnsh configuration. With these changes, NSH should behave better + and we preserve the device driver interface. I made the following + configuration changes: + + Enable the file system: + CONFIG_NFILE_DESCRIPTORS=5 + CONFIG_NFILE_STREAMS=5 + + Enable the console device: + CONFIG_DEV_CONSOLE=y + + Disable most new NSH commands. Some like 'ls' are really mandatory + with a file system: + CONFIG_NSH_DISABLE_xxx=y + + Enable the upper half serial driver: + CONFIG_SERIAL=y + CONFIG_STANDARD_SERIAL=y + + Enable the USART1 serial driver: + CONFIG_STM32_USART1=y + CONFIG_STM32_USART1_SERIALDRIVER=y + CONFIG_USART1_SERIAL_CONSOLE=y + + CONFIG_USART1_2STOP=0 + CONFIG_USART1_BAUD=115200 + CONFIG_USART1_BITS=8 + CONFIG_USART1_PARITY=0 + CONFIG_USART1_RXBUFSIZE=16 + CONFIG_USART1_TXBUFSIZE=16 + + The resulting code was bigger as expected: + + $ arm-none-eabi-size nuttx + text data bss dec hex filename + 19853 88 876 20817 5151 nuttx + + I am sure that other things that could be disabled were also drawn into + the build, so perhaps this could be reduced. This amounts to a size + increase of around 7KB. + + One major part of this size increase is due to the addition of the NSH + 'ls' command. Now, if I disable the 'ls' command, I get: + + $ arm-none-eabi-size nuttx + text data bss dec hex filename + 17804 80 864 18748 493c nuttx + + Or an increase of only 5.1 KB. This, of course, not only excludes the + 'ls' command logic, but also the things that were drawn into the link + when 'ls' was enabled: opendir(), readdir(), closedir(), stat(), and + probably other things. + + So I think we can say that the cost of the file system and true serial + console device was about 5 KB (primarily OS support) and the cost of + the NSH 'ls' command (including OS support) is about 2KB. + nsh: --- Configures the NuttShell (nsh) located at apps/examples/nsh. This diff --git a/configs/stm32f103-minimum/include/board.h b/configs/stm32f103-minimum/include/board.h index 8c5385e45b4..217e4dfd894 100644 --- a/configs/stm32f103-minimum/include/board.h +++ b/configs/stm32f103-minimum/include/board.h @@ -93,14 +93,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ @@ -110,8 +110,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/stm32f103-minimum/minnsh/Make.defs b/configs/stm32f103-minimum/minnsh/Make.defs new file mode 100644 index 00000000000..b77741df255 --- /dev/null +++ b/configs/stm32f103-minimum/minnsh/Make.defs @@ -0,0 +1,113 @@ +############################################################################ +# configs/stm32f103-minimum/nsh/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = + diff --git a/configs/stm32f103-minimum/minnsh/defconfig b/configs/stm32f103-minimum/minnsh/defconfig new file mode 100644 index 00000000000..16568484f0b --- /dev/null +++ b/configs/stm32f103-minimum/minnsh/defconfig @@ -0,0 +1,1052 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +CONFIG_ARCH_HAVE_HEAPCHECK=y +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +# CONFIG_ARCH_CHIP_KINETIS is not set +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +CONFIG_ARCH_CHIP_STM32=y +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +CONFIG_ARCH_CORTEXM3=y +# CONFIG_ARCH_CORTEXM4 is not set +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_CMNVECTOR=y +# CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set +# CONFIG_ARCH_HAVE_FPU is not set +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +CONFIG_ARMV7M_HAVE_STACKCHECK=y +# CONFIG_ARMV7M_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set +# CONFIG_SERIAL_TERMIOS is not set + +# +# STM32 Configuration Options +# +# CONFIG_ARCH_CHIP_STM32L151C6 is not set +# CONFIG_ARCH_CHIP_STM32L151C8 is not set +# CONFIG_ARCH_CHIP_STM32L151CB is not set +# CONFIG_ARCH_CHIP_STM32L151R6 is not set +# CONFIG_ARCH_CHIP_STM32L151R8 is not set +# CONFIG_ARCH_CHIP_STM32L151RB is not set +# CONFIG_ARCH_CHIP_STM32L151V6 is not set +# CONFIG_ARCH_CHIP_STM32L151V8 is not set +# CONFIG_ARCH_CHIP_STM32L151VB is not set +# CONFIG_ARCH_CHIP_STM32L152C6 is not set +# CONFIG_ARCH_CHIP_STM32L152C8 is not set +# CONFIG_ARCH_CHIP_STM32L152CB is not set +# CONFIG_ARCH_CHIP_STM32L152R6 is not set +# CONFIG_ARCH_CHIP_STM32L152R8 is not set +# CONFIG_ARCH_CHIP_STM32L152RB is not set +# CONFIG_ARCH_CHIP_STM32L152V6 is not set +# CONFIG_ARCH_CHIP_STM32L152V8 is not set +# CONFIG_ARCH_CHIP_STM32L152VB is not set +# CONFIG_ARCH_CHIP_STM32L162ZD is not set +# CONFIG_ARCH_CHIP_STM32L162VE is not set +# CONFIG_ARCH_CHIP_STM32F100C8 is not set +# CONFIG_ARCH_CHIP_STM32F100CB is not set +# CONFIG_ARCH_CHIP_STM32F100R8 is not set +# CONFIG_ARCH_CHIP_STM32F100RB is not set +# CONFIG_ARCH_CHIP_STM32F100RC is not set +# CONFIG_ARCH_CHIP_STM32F100RD is not set +# CONFIG_ARCH_CHIP_STM32F100RE is not set +# CONFIG_ARCH_CHIP_STM32F100V8 is not set +# CONFIG_ARCH_CHIP_STM32F100VB is not set +# CONFIG_ARCH_CHIP_STM32F100VC is not set +# CONFIG_ARCH_CHIP_STM32F100VD is not set +# CONFIG_ARCH_CHIP_STM32F100VE is not set +# CONFIG_ARCH_CHIP_STM32F102CB is not set +# CONFIG_ARCH_CHIP_STM32F103T8 is not set +# CONFIG_ARCH_CHIP_STM32F103TB is not set +# CONFIG_ARCH_CHIP_STM32F103C4 is not set +CONFIG_ARCH_CHIP_STM32F103C8=y +# CONFIG_ARCH_CHIP_STM32F103CB is not set +# CONFIG_ARCH_CHIP_STM32F103R8 is not set +# CONFIG_ARCH_CHIP_STM32F103RB is not set +# CONFIG_ARCH_CHIP_STM32F103RC is not set +# CONFIG_ARCH_CHIP_STM32F103RD is not set +# CONFIG_ARCH_CHIP_STM32F103RE is not set +# CONFIG_ARCH_CHIP_STM32F103RG is not set +# CONFIG_ARCH_CHIP_STM32F103V8 is not set +# CONFIG_ARCH_CHIP_STM32F103VB is not set +# CONFIG_ARCH_CHIP_STM32F103VC is not set +# CONFIG_ARCH_CHIP_STM32F103VE is not set +# CONFIG_ARCH_CHIP_STM32F103ZE is not set +# CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F107VC is not set +# CONFIG_ARCH_CHIP_STM32F205RG is not set +# CONFIG_ARCH_CHIP_STM32F207IG is not set +# CONFIG_ARCH_CHIP_STM32F207ZE is not set +# CONFIG_ARCH_CHIP_STM32F302K6 is not set +# CONFIG_ARCH_CHIP_STM32F302K8 is not set +# CONFIG_ARCH_CHIP_STM32F302CB is not set +# CONFIG_ARCH_CHIP_STM32F302CC is not set +# CONFIG_ARCH_CHIP_STM32F302RB is not set +# CONFIG_ARCH_CHIP_STM32F302RC is not set +# CONFIG_ARCH_CHIP_STM32F302VB is not set +# CONFIG_ARCH_CHIP_STM32F302VC is not set +# CONFIG_ARCH_CHIP_STM32F303K6 is not set +# CONFIG_ARCH_CHIP_STM32F303K8 is not set +# CONFIG_ARCH_CHIP_STM32F303C6 is not set +# CONFIG_ARCH_CHIP_STM32F303C8 is not set +# CONFIG_ARCH_CHIP_STM32F303CB is not set +# CONFIG_ARCH_CHIP_STM32F303CC is not set +# CONFIG_ARCH_CHIP_STM32F303RB is not set +# CONFIG_ARCH_CHIP_STM32F303RC is not set +# CONFIG_ARCH_CHIP_STM32F303RD is not set +# CONFIG_ARCH_CHIP_STM32F303RE is not set +# CONFIG_ARCH_CHIP_STM32F303VB is not set +# CONFIG_ARCH_CHIP_STM32F303VC is not set +# CONFIG_ARCH_CHIP_STM32F372C8 is not set +# CONFIG_ARCH_CHIP_STM32F372R8 is not set +# CONFIG_ARCH_CHIP_STM32F372V8 is not set +# CONFIG_ARCH_CHIP_STM32F372CB is not set +# CONFIG_ARCH_CHIP_STM32F372RB is not set +# CONFIG_ARCH_CHIP_STM32F372VB is not set +# CONFIG_ARCH_CHIP_STM32F372CC is not set +# CONFIG_ARCH_CHIP_STM32F372RC is not set +# CONFIG_ARCH_CHIP_STM32F372VC is not set +# CONFIG_ARCH_CHIP_STM32F373C8 is not set +# CONFIG_ARCH_CHIP_STM32F373R8 is not set +# CONFIG_ARCH_CHIP_STM32F373V8 is not set +# CONFIG_ARCH_CHIP_STM32F373CB is not set +# CONFIG_ARCH_CHIP_STM32F373RB is not set +# CONFIG_ARCH_CHIP_STM32F373VB is not set +# CONFIG_ARCH_CHIP_STM32F373CC is not set +# CONFIG_ARCH_CHIP_STM32F373RC is not set +# CONFIG_ARCH_CHIP_STM32F373VC is not set +# CONFIG_ARCH_CHIP_STM32F401RE is not set +# CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set +# CONFIG_ARCH_CHIP_STM32F405RG is not set +# CONFIG_ARCH_CHIP_STM32F405VG is not set +# CONFIG_ARCH_CHIP_STM32F405ZG is not set +# CONFIG_ARCH_CHIP_STM32F407VE is not set +# CONFIG_ARCH_CHIP_STM32F407VG is not set +# CONFIG_ARCH_CHIP_STM32F407ZE is not set +# CONFIG_ARCH_CHIP_STM32F407ZG is not set +# CONFIG_ARCH_CHIP_STM32F407IE is not set +# CONFIG_ARCH_CHIP_STM32F407IG is not set +# CONFIG_ARCH_CHIP_STM32F427V is not set +# CONFIG_ARCH_CHIP_STM32F427Z is not set +# CONFIG_ARCH_CHIP_STM32F427I is not set +# CONFIG_ARCH_CHIP_STM32F429V is not set +# CONFIG_ARCH_CHIP_STM32F429Z is not set +# CONFIG_ARCH_CHIP_STM32F429I is not set +# CONFIG_ARCH_CHIP_STM32F429B is not set +# CONFIG_ARCH_CHIP_STM32F429N is not set +# CONFIG_ARCH_CHIP_STM32F446M is not set +# CONFIG_ARCH_CHIP_STM32F446R is not set +# CONFIG_ARCH_CHIP_STM32F446V is not set +# CONFIG_ARCH_CHIP_STM32F446Z is not set +# CONFIG_ARCH_CHIP_STM32F469A is not set +# CONFIG_ARCH_CHIP_STM32F469I is not set +# CONFIG_ARCH_CHIP_STM32F469B is not set +# CONFIG_ARCH_CHIP_STM32F469N is not set +CONFIG_STM32_FLASH_CONFIG_DEFAULT=y +# CONFIG_STM32_FLASH_CONFIG_4 is not set +# CONFIG_STM32_FLASH_CONFIG_6 is not set +# CONFIG_STM32_FLASH_CONFIG_8 is not set +# CONFIG_STM32_FLASH_CONFIG_B is not set +# CONFIG_STM32_FLASH_CONFIG_C is not set +# CONFIG_STM32_FLASH_CONFIG_D is not set +# CONFIG_STM32_FLASH_CONFIG_E is not set +# CONFIG_STM32_FLASH_CONFIG_F is not set +# CONFIG_STM32_FLASH_CONFIG_G is not set +# CONFIG_STM32_FLASH_CONFIG_I is not set +# CONFIG_STM32_STM32L15XX is not set +# CONFIG_STM32_ENERGYLITE is not set +CONFIG_STM32_STM32F10XX=y +# CONFIG_STM32_VALUELINE is not set +# CONFIG_STM32_CONNECTIVITYLINE is not set +CONFIG_STM32_PERFORMANCELINE=y +# CONFIG_STM32_USBACCESSLINE is not set +# CONFIG_STM32_HIGHDENSITY is not set +CONFIG_STM32_MEDIUMDENSITY=y +# CONFIG_STM32_LOWDENSITY is not set +# CONFIG_STM32_STM32F20XX is not set +# CONFIG_STM32_STM32F205 is not set +# CONFIG_STM32_STM32F207 is not set +# CONFIG_STM32_STM32F30XX is not set +# CONFIG_STM32_STM32F302 is not set +# CONFIG_STM32_STM32F303 is not set +# CONFIG_STM32_STM32F37XX is not set +# CONFIG_STM32_STM32F40XX is not set +# CONFIG_STM32_STM32F401 is not set +# CONFIG_STM32_STM32F411 is not set +# CONFIG_STM32_STM32F405 is not set +# CONFIG_STM32_STM32F407 is not set +# CONFIG_STM32_STM32F427 is not set +# CONFIG_STM32_STM32F429 is not set +# CONFIG_STM32_STM32F446 is not set +# CONFIG_STM32_STM32F469 is not set +# CONFIG_STM32_DFU is not set + +# +# STM32 Peripheral Support +# +# CONFIG_STM32_HAVE_CCM is not set +CONFIG_STM32_HAVE_USBDEV=y +# CONFIG_STM32_HAVE_OTGFS is not set +# CONFIG_STM32_HAVE_FSMC is not set +# CONFIG_STM32_HAVE_LTDC is not set +CONFIG_STM32_HAVE_USART3=y +CONFIG_STM32_HAVE_UART4=y +CONFIG_STM32_HAVE_UART5=y +# CONFIG_STM32_HAVE_USART6 is not set +# CONFIG_STM32_HAVE_UART7 is not set +# CONFIG_STM32_HAVE_UART8 is not set +CONFIG_STM32_HAVE_TIM1=y +# CONFIG_STM32_HAVE_TIM2 is not set +CONFIG_STM32_HAVE_TIM3=y +CONFIG_STM32_HAVE_TIM4=y +CONFIG_STM32_HAVE_TIM5=y +CONFIG_STM32_HAVE_TIM6=y +CONFIG_STM32_HAVE_TIM7=y +CONFIG_STM32_HAVE_TIM8=y +# CONFIG_STM32_HAVE_TIM9 is not set +# CONFIG_STM32_HAVE_TIM10 is not set +# CONFIG_STM32_HAVE_TIM11 is not set +# CONFIG_STM32_HAVE_TIM12 is not set +# CONFIG_STM32_HAVE_TIM13 is not set +# CONFIG_STM32_HAVE_TIM14 is not set +# CONFIG_STM32_HAVE_TIM15 is not set +# CONFIG_STM32_HAVE_TIM16 is not set +# CONFIG_STM32_HAVE_TIM17 is not set +CONFIG_STM32_HAVE_ADC2=y +CONFIG_STM32_HAVE_ADC3=y +# CONFIG_STM32_HAVE_ADC4 is not set +# CONFIG_STM32_HAVE_ADC1_DMA is not set +# CONFIG_STM32_HAVE_ADC2_DMA is not set +# CONFIG_STM32_HAVE_ADC3_DMA is not set +# CONFIG_STM32_HAVE_ADC4_DMA is not set +CONFIG_STM32_HAVE_CAN1=y +# CONFIG_STM32_HAVE_CAN2 is not set +# CONFIG_STM32_HAVE_DAC1 is not set +# CONFIG_STM32_HAVE_DAC2 is not set +# CONFIG_STM32_HAVE_RNG is not set +# CONFIG_STM32_HAVE_ETHMAC is not set +CONFIG_STM32_HAVE_I2C2=y +# CONFIG_STM32_HAVE_I2C3 is not set +CONFIG_STM32_HAVE_SPI2=y +CONFIG_STM32_HAVE_SPI3=y +# CONFIG_STM32_HAVE_SPI4 is not set +# CONFIG_STM32_HAVE_SPI5 is not set +# CONFIG_STM32_HAVE_SPI6 is not set +# CONFIG_STM32_HAVE_SAIPLL is not set +# CONFIG_STM32_HAVE_I2SPLL is not set +# CONFIG_STM32_ADC1 is not set +# CONFIG_STM32_ADC2 is not set +# CONFIG_STM32_ADC3 is not set +# CONFIG_STM32_BKP is not set +# CONFIG_STM32_CAN1 is not set +# CONFIG_STM32_CRC is not set +# CONFIG_STM32_DMA1 is not set +# CONFIG_STM32_DMA2 is not set +# CONFIG_STM32_I2C1 is not set +# CONFIG_STM32_I2C2 is not set +# CONFIG_STM32_PWR is not set +# CONFIG_STM32_SDIO is not set +# CONFIG_STM32_SPI1 is not set +# CONFIG_STM32_SPI2 is not set +# CONFIG_STM32_SPI3 is not set +# CONFIG_STM32_TIM1 is not set +# CONFIG_STM32_TIM2 is not set +# CONFIG_STM32_TIM3 is not set +# CONFIG_STM32_TIM4 is not set +# CONFIG_STM32_TIM5 is not set +# CONFIG_STM32_TIM6 is not set +# CONFIG_STM32_TIM7 is not set +# CONFIG_STM32_TIM8 is not set +CONFIG_STM32_USART1=y +# CONFIG_STM32_USART2 is not set +# CONFIG_STM32_USART3 is not set +# CONFIG_STM32_UART4 is not set +# CONFIG_STM32_UART5 is not set +# CONFIG_STM32_USB is not set +# CONFIG_STM32_IWDG is not set +# CONFIG_STM32_WWDG is not set +# CONFIG_STM32_NOEXT_VECTORS is not set + +# +# Alternate Pin Mapping +# +# CONFIG_STM32_USART1_REMAP is not set +# CONFIG_STM32_JTAG_DISABLE is not set +CONFIG_STM32_JTAG_FULL_ENABLE=y +# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set +# CONFIG_STM32_JTAG_SW_ENABLE is not set +CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y +# CONFIG_STM32_FORCEPOWER is not set +# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set +# CONFIG_STM32_TIM1_CAP is not set +# CONFIG_STM32_TIM3_CAP is not set +# CONFIG_STM32_TIM4_CAP is not set +# CONFIG_STM32_TIM5_CAP is not set +# CONFIG_STM32_TIM8_CAP is not set +CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y + +# +# U[S]ART Configuration +# + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set +# CONFIG_USART1_RS485 is not set + +# +# Serial Driver Configuration +# +# CONFIG_SERIAL_DISABLE_REORDERING is not set +# CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set +# CONFIG_STM32_USART_SINGLEWIRE is not set +CONFIG_STM32_HAVE_RTC_COUNTER=y +# CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set + +# +# USB FS Host Configuration +# + +# +# USB HS Host Configuration +# + +# +# USB Host Debug Configuration +# + +# +# USB Device Configuration +# + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +# CONFIG_ARCH_STACKDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=5483 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x20000000 +CONFIG_RAM_SIZE=20480 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +# CONFIG_ARCH_BOARD_STM32_TINY is not set +CONFIG_ARCH_BOARD_STM32F103_MINIMUM=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="stm32f103-minimum" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2013 +CONFIG_START_MONTH=2 +CONFIG_START_DAY=26 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +# CONFIG_DEV_CONSOLE is not set +CONFIG_FDCLONE_DISABLE=y +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=0 +CONFIG_NFILE_STREAMS=0 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_MODULE is not set + +# +# Work queue support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +# CONFIG_DEV_NULL is not set +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +CONFIG_ARCH_HAVE_I2CRESET=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y +CONFIG_USART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# USART1 Configuration +# +CONFIG_USART1_RXBUFSIZE=64 +CONFIG_USART1_TXBUFSIZE=64 +CONFIG_USART1_BAUD=115200 +CONFIG_USART1_BITS=8 +CONFIG_USART1_PARITY=0 +CONFIG_USART1_2STOP=0 +# CONFIG_USART1_IFLOWCONTROL is not set +# CONFIG_USART1_OFLOWCONTROL is not set +# CONFIG_USART1_DMA is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +CONFIG_NOPRINTF_FIELDWIDTH=y +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POLL is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_PCODE is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=80 +CONFIG_NSH_DISABLE_SEMICOLON=y +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set + +# +# Disable Individual commands +# +CONFIG_NSH_DISABLE_ADDROUTE=y +CONFIG_NSH_DISABLE_BASENAME=y +# CONFIG_NSH_DISABLE_CAT is not set +CONFIG_NSH_DISABLE_CD=y +CONFIG_NSH_DISABLE_CP=y +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +CONFIG_NSH_DISABLE_DD=y +CONFIG_NSH_DISABLE_DF=y +CONFIG_NSH_DISABLE_DELROUTE=y +CONFIG_NSH_DISABLE_DIRNAME=y +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +CONFIG_NSH_DISABLE_GET=y +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +CONFIG_NSH_DISABLE_IFCONFIG=y +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +CONFIG_NSH_DISABLE_LOSETUP=y +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +CONFIG_NSH_DISABLE_MKDIR=y +# CONFIG_NSH_DISABLE_MKFIFO is not set +CONFIG_NSH_DISABLE_MKRD=y +# CONFIG_NSH_DISABLE_MH is not set +CONFIG_NSH_DISABLE_MOUNT=y +CONFIG_NSH_DISABLE_MV=y +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +CONFIG_NSH_DISABLE_PUT=y +# CONFIG_NSH_DISABLE_PWD is not set +CONFIG_NSH_DISABLE_RM=y +CONFIG_NSH_DISABLE_RMDIR=y +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +CONFIG_NSH_DISABLE_TIME=y +# CONFIG_NSH_DISABLE_TEST is not set +CONFIG_NSH_DISABLE_UMOUNT=y +CONFIG_NSH_DISABLE_UNAME=y +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +CONFIG_NSH_DISABLE_WGET=y +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=64 + +# +# Scripting Support +# +CONFIG_NSH_DISABLESCRIPT=y + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +# CONFIG_NSH_ALTCONDEV is not set +# CONFIG_NSH_ARCHINIT is not set +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_RAMTEST is not set +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f103-minimum/minnsh/setenv.sh b/configs/stm32f103-minimum/minnsh/setenv.sh new file mode 100644 index 00000000000..73dfab5a4d0 --- /dev/null +++ b/configs/stm32f103-minimum/minnsh/setenv.sh @@ -0,0 +1,100 @@ +#!/bin/bash +# configs//stm32f103-minimum/nsh/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/stm32f103-minimum/nsh/defconfig b/configs/stm32f103-minimum/nsh/defconfig index 75bd71a8872..c489f2182c9 100644 --- a/configs/stm32f103-minimum/nsh/defconfig +++ b/configs/stm32f103-minimum/nsh/defconfig @@ -243,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103C8=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -410,10 +411,13 @@ CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set @@ -680,33 +684,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -966,6 +965,7 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f103-minimum/src/stm32_appinit.c b/configs/stm32f103-minimum/src/stm32_appinit.c index 73544527b1a..d9291f9a160 100644 --- a/configs/stm32f103-minimum/src/stm32_appinit.c +++ b/configs/stm32f103-minimum/src/stm32_appinit.c @@ -57,11 +57,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/stm32f103-minimum/usbnsh/defconfig b/configs/stm32f103-minimum/usbnsh/defconfig index e84a34454e1..84579e2f49f 100644 --- a/configs/stm32f103-minimum/usbnsh/defconfig +++ b/configs/stm32f103-minimum/usbnsh/defconfig @@ -243,6 +243,7 @@ CONFIG_ARCH_CHIP_STM32F103C8=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -410,10 +411,13 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set @@ -677,33 +681,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1002,6 +1001,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f3discovery/include/board.h b/configs/stm32f3discovery/include/board.h index e1fd1ed2a3d..bde225476e1 100644 --- a/configs/stm32f3discovery/include/board.h +++ b/configs/stm32f3discovery/include/board.h @@ -1,8 +1,7 @@ /************************************************************************************ * configs/stm32f3discovery/include/board.h - * include/arch/board/board.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -92,13 +91,14 @@ #define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK #define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */ +#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 1 and 8, 15-17 */ -/* APB2 timers 1 and 8 will receive PCLK2. */ +/* APB2 timers 1 and 8, 15-17 will receive PCLK2. */ + +/* Timers driven from APB2 will be PCLK2 */ #define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY) - #define STM32_APB1_TIM15_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_APB1_TIM16_CLKIN (STM32_PCLK2_FREQUENCY) #define STM32_APB1_TIM17_CLKIN (STM32_PCLK2_FREQUENCY) @@ -108,50 +108,32 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (REVISIT) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 */ #define STM32_CFGR_USBPRE 0 -/* Timers driven from APB1 will be twice PCLK1 */ - -#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY) - -/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */ - -#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */ -#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2) - -/* Timers driven from APB2 will be twice PCLK2 */ - -#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY) -#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY) /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* LED definitions ******************************************************************/ /* The STM32F3Discovery board has ten LEDs. Two of these are controlled by logic on diff --git a/configs/stm32f3discovery/nsh/defconfig b/configs/stm32f3discovery/nsh/defconfig index cb828eb2346..9c48a2059a9 100644 --- a/configs/stm32f3discovery/nsh/defconfig +++ b/configs/stm32f3discovery/nsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -247,6 +252,7 @@ CONFIG_ARCH_CHIP_STM32F303VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -418,13 +424,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -526,7 +536,14 @@ CONFIG_NSH_MMCSDMINOR=0 # Board-Specific Options # CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -686,33 +703,28 @@ CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -766,8 +778,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -896,6 +908,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1019,6 +1033,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f3discovery/src/stm32_appinit.c b/configs/stm32f3discovery/src/stm32_appinit.c index 445dfbc2c4d..3d23db62969 100644 --- a/configs/stm32f3discovery/src/stm32_appinit.c +++ b/configs/stm32f3discovery/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/stm32f3discovery/src/stm32_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -92,11 +92,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef HAVE_USBMONITOR int ret; diff --git a/configs/stm32f3discovery/usbnsh/defconfig b/configs/stm32f3discovery/usbnsh/defconfig index c1c75193436..ed5e23a9d98 100644 --- a/configs/stm32f3discovery/usbnsh/defconfig +++ b/configs/stm32f3discovery/usbnsh/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -140,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -250,6 +252,7 @@ CONFIG_ARCH_CHIP_STM32F303VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -422,13 +425,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -709,33 +716,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1045,6 +1047,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f411e-disco/include/board.h b/configs/stm32f411e-disco/include/board.h index 46d2df971e0..a50e2d3a533 100644 --- a/configs/stm32f411e-disco/include/board.h +++ b/configs/stm32f411e-disco/include/board.h @@ -163,8 +163,14 @@ */ /* REVISIT */ -#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY) -#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY) +#define BOARD_TIM1_FREQUENCY (2 * STM32_PCLK2_FREQUENCY) +#define BOARD_TIM2_FREQUENCY (2 * STM32_PCLK1_FREQUENCY) +#define BOARD_TIM3_FREQUENCY (2 * STM32_PCLK1_FREQUENCY) +#define BOARD_TIM4_FREQUENCY (2 * STM32_PCLK1_FREQUENCY) +#define BOARD_TIM5_FREQUENCY (2 * STM32_PCLK1_FREQUENCY) +#define BOARD_TIM6_FREQUENCY (2 * STM32_PCLK1_FREQUENCY) +#define BOARD_TIM7_FREQUENCY (2 * STM32_PCLK1_FREQUENCY) +#define BOARD_TIM8_FREQUENCY (2 * STM32_PCLK2_FREQUENCY) /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/stm32f411e-disco/nsh/defconfig b/configs/stm32f411e-disco/nsh/defconfig index 31f933afc75..e9719959a96 100644 --- a/configs/stm32f411e-disco/nsh/defconfig +++ b/configs/stm32f411e-disco/nsh/defconfig @@ -418,10 +418,13 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM10_CAP is not set # CONFIG_STM32_TIM11_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set @@ -678,33 +681,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -884,12 +882,6 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CAN Utilities # -# -# Custom -# -# CONFIG_CUSTOM_BRIDGE is not set -# CONFIG_CUSTOM_J1939 is not set - # # Examples # @@ -977,6 +969,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f411e-disco/src/stm32_appinit.c b/configs/stm32f411e-disco/src/stm32_appinit.c index 9f35fd24f8c..9228ec0366e 100644 --- a/configs/stm32f411e-disco/src/stm32_appinit.c +++ b/configs/stm32f411e-disco/src/stm32_appinit.c @@ -61,11 +61,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef CONFIG_SCHED_INSTRUMENTATION /* Configure CPU load estimation */ diff --git a/configs/stm32f411e-disco/src/stm32_boot.c b/configs/stm32f411e-disco/src/stm32_boot.c index 5164e8837e2..dec40d4b70b 100644 --- a/configs/stm32f411e-disco/src/stm32_boot.c +++ b/configs/stm32f411e-disco/src/stm32_boot.c @@ -112,7 +112,7 @@ void board_initialize(void) * but the initialization function must run in kernel space. */ - board_app_initialize(); + board_app_initialize(0); #endif } diff --git a/configs/stm32f429i-disco/extflash/defconfig b/configs/stm32f429i-disco/extflash/defconfig index 15e6f97c7ba..e277a69d2ab 100644 --- a/configs/stm32f429i-disco/extflash/defconfig +++ b/configs/stm32f429i-disco/extflash/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -440,13 +446,25 @@ CONFIG_STM32_FSMC_SRAM=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -718,7 +736,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -757,6 +780,7 @@ CONFIG_RAMMTD_ERASESTATE=0xff # CONFIG_MTD_AT45DB is not set # CONFIG_MTD_M25P is not set # CONFIG_MTD_S25FL1 is not set +# CONFIG_MTD_N25QXXX is not set CONFIG_MTD_SMART=y # CONFIG_SMART_DEV_LOOP is not set CONFIG_MTD_SMART_SECTOR_SIZE=512 @@ -773,6 +797,7 @@ CONFIG_SST25XX_SPIMODE=0 CONFIG_SST25XX_SPIFREQUENCY=20000000 CONFIG_SST25XX_MANUFACTURER=0xBF CONFIG_SST25XX_MEMORY_TYPE=0x25 +# CONFIG_MTD_SST26 is not set # CONFIG_MTD_SST39FV is not set # CONFIG_MTD_W25 is not set # CONFIG_EEPROM is not set @@ -784,33 +809,28 @@ CONFIG_SST25XX_MEMORY_TYPE=0x25 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -973,6 +993,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1072,6 +1094,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # File System Utilities # +CONFIG_FSUTILS_FLASH_ERASEALL=y # CONFIG_FSUTILS_INIFILE is not set CONFIG_FSUTILS_MKSMARTFS=y # CONFIG_FSUTILS_PASSWD is not set @@ -1104,6 +1127,7 @@ CONFIG_FSUTILS_MKSMARTFS=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set @@ -1221,8 +1245,8 @@ CONFIG_PLATFORM_CONFIGDATA=y # CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set CONFIG_SYSTEM_FLASH_ERASEALL=y +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/stm32f429i-disco/include/board.h b/configs/stm32f429i-disco/include/board.h index adcd72adde2..723b3984928 100644 --- a/configs/stm32f429i-disco/include/board.h +++ b/configs/stm32f429i-disco/include/board.h @@ -2,7 +2,7 @@ * configs/stm32f429i-disco/include/board.h * include/arch/board/board.h * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -154,8 +154,14 @@ * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* LED definitions ******************************************************************/ /* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any diff --git a/configs/stm32f429i-disco/lcd/defconfig b/configs/stm32f429i-disco/lcd/defconfig index 01f3b48574e..7d399bb3996 100644 --- a/configs/stm32f429i-disco/lcd/defconfig +++ b/configs/stm32f429i-disco/lcd/defconfig @@ -77,6 +77,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -95,6 +96,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -116,6 +118,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -124,6 +127,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -134,6 +138,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -240,6 +245,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -440,13 +446,17 @@ CONFIG_STM32_FSMC_SRAM=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -756,33 +766,28 @@ CONFIG_LCD_ILI9341_IFACE0_RGB565=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -869,6 +874,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1017,6 +1023,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -1124,7 +1132,6 @@ CONFIG_EXAMPLES_NX_NOTIFYSIGNO=4 # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1160,6 +1167,7 @@ CONFIG_EXAMPLES_NX_NOTIFYSIGNO=4 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f429i-disco/ltdc/defconfig b/configs/stm32f429i-disco/ltdc/defconfig index ca7bc393514..f4eb8234c75 100644 --- a/configs/stm32f429i-disco/ltdc/defconfig +++ b/configs/stm32f429i-disco/ltdc/defconfig @@ -102,6 +102,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -120,6 +121,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -141,6 +143,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -149,6 +152,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # CONFIG_DEBUG_HARDFAULT is not set @@ -160,6 +164,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL=y @@ -266,6 +271,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -468,13 +474,17 @@ CONFIG_STM32_FSMC_SRAM=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -798,33 +808,28 @@ CONFIG_SPI_CMDDATA=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -920,6 +925,7 @@ CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_ANTIALIASING is not set # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1064,6 +1070,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1160,7 +1168,6 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1198,6 +1205,7 @@ CONFIG_EXAMPLES_NX_TOOLBAR_HEIGHT=16 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f429i-disco/nsh/defconfig b/configs/stm32f429i-disco/nsh/defconfig index db6f5e0e56b..37e776417d6 100644 --- a/configs/stm32f429i-disco/nsh/defconfig +++ b/configs/stm32f429i-disco/nsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -439,13 +445,17 @@ CONFIG_STM32_FSMC_SRAM=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -714,33 +724,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -886,6 +891,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -973,7 +980,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1009,6 +1015,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f429i-disco/src/stm32_appinit.c b/configs/stm32f429i-disco/src/stm32_appinit.c index 719ebc031ab..29bbb24320d 100644 --- a/configs/stm32f429i-disco/src/stm32_appinit.c +++ b/configs/stm32f429i-disco/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/stm32f429i-disco/src/stm32_appinit.c * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -121,7 +121,9 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * * CONFIG_LIB_BOARDCTL=y : * Called from the NSH library @@ -130,9 +132,24 @@ * CONFIG_LIB_BOARDCTL=n : * Called from board_initialize(). * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #if defined(CONFIG_STM32_SPI4) FAR struct spi_dev_s *spi; diff --git a/configs/stm32f429i-disco/src/stm32_boot.c b/configs/stm32f429i-disco/src/stm32_boot.c index 77653432e08..33f855a28ce 100644 --- a/configs/stm32f429i-disco/src/stm32_boot.c +++ b/configs/stm32f429i-disco/src/stm32_boot.c @@ -149,7 +149,7 @@ void board_initialize(void) * but the initialization function must run in kernel space. */ - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif diff --git a/configs/stm32f429i-disco/usbmsc/defconfig b/configs/stm32f429i-disco/usbmsc/defconfig index a750b9bd063..802ff5915b9 100644 --- a/configs/stm32f429i-disco/usbmsc/defconfig +++ b/configs/stm32f429i-disco/usbmsc/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -242,6 +247,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -442,13 +448,17 @@ CONFIG_STM32_FSMC_SRAM=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -738,33 +748,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -927,6 +932,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1054,6 +1061,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f429i-disco/usbnsh/defconfig b/configs/stm32f429i-disco/usbnsh/defconfig index 021da9ecf46..0a9deac0461 100644 --- a/configs/stm32f429i-disco/usbnsh/defconfig +++ b/configs/stm32f429i-disco/usbnsh/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -239,6 +244,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -439,13 +445,17 @@ CONFIG_STM32_FSMC_SRAM=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -722,33 +732,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -802,8 +807,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -942,6 +947,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1069,6 +1076,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/cxxtest/defconfig b/configs/stm32f4discovery/cxxtest/defconfig index 98e5442adce..7a4a6262adb 100644 --- a/configs/stm32f4discovery/cxxtest/defconfig +++ b/configs/stm32f4discovery/cxxtest/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -247,6 +252,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -442,13 +448,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -708,33 +718,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -868,6 +873,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -952,7 +959,6 @@ CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -988,6 +994,7 @@ CONFIG_EXAMPLES_CXXTEST_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/elf/defconfig b/configs/stm32f4discovery/elf/defconfig index 673675f373d..d31cbd08ca0 100644 --- a/configs/stm32f4discovery/elf/defconfig +++ b/configs/stm32f4discovery/elf/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y CONFIG_ARMV7M_USEBASEPRI=y CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -248,6 +253,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -443,13 +449,17 @@ CONFIG_STM32_CCMEXCLUDE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -708,33 +718,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -882,6 +887,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -969,7 +976,6 @@ CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0" # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1008,6 +1014,7 @@ CONFIG_EXAMPLES_ELF_DEVPATH="/dev/ram0" # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/include/board.h b/configs/stm32f4discovery/include/board.h index 2ab3c99132f..10cc583ab01 100644 --- a/configs/stm32f4discovery/include/board.h +++ b/configs/stm32f4discovery/include/board.h @@ -156,8 +156,14 @@ * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY (STM32_HCLK_FREQUENCY/2) +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2) +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* SDIO dividers. Note that slower clocking is required when DMA is disabled * in order to avoid RX overrun/TX underrun errors due to delayed responses diff --git a/configs/stm32f4discovery/ipv6/defconfig b/configs/stm32f4discovery/ipv6/defconfig index cb9ccd09092..07b3a1fc08d 100644 --- a/configs/stm32f4discovery/ipv6/defconfig +++ b/configs/stm32f4discovery/ipv6/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -205,6 +210,7 @@ CONFIG_SDIO_DMA=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -249,6 +255,7 @@ CONFIG_SDIO_DMA=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -433,6 +440,10 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set CONFIG_STM32_CCMEXCLUDE=y CONFIG_STM32_DMACAPABLE=y + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM2_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -446,14 +457,26 @@ CONFIG_STM32_DMACAPABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART6_SERIALDRIVER=y +# CONFIG_STM32_USART6_1WIREDRIVER is not set # CONFIG_USART6_RS485 is not set # CONFIG_USART6_RXDMA is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -745,7 +768,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -818,33 +846,28 @@ CONFIG_ETH0_PHY_LAN8720=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -CONFIG_ARCH_HAVE_USART6=y -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART6_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +CONFIG_USART6_SERIALDRIVER=y +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1116,6 +1139,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set # CONFIG_NETDB_DNSCLIENT is not set @@ -1161,16 +1186,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1181,17 +1207,17 @@ CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1199,8 +1225,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1208,11 +1234,10 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -1236,8 +1261,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1248,18 +1273,19 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set # CONFIG_NETUTILS_TELNETD is not set # CONFIG_NETUTILS_TFTPC is not set -CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_WEBCLIENT is not set # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1360,6 +1386,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1420,12 +1447,12 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1434,6 +1461,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/kostest/defconfig b/configs/stm32f4discovery/kostest/defconfig index b4f0d966edf..c3f18548776 100644 --- a/configs/stm32f4discovery/kostest/defconfig +++ b/configs/stm32f4discovery/kostest/defconfig @@ -85,6 +85,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -103,6 +104,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -124,6 +126,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -132,6 +135,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y CONFIG_ARM_MPU=y CONFIG_ARM_MPU_NREGIONS=8 @@ -143,6 +147,7 @@ CONFIG_ARM_MPU_NREGIONS=8 # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -253,6 +258,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -448,13 +454,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -716,33 +726,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -876,6 +881,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -953,7 +960,6 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -989,6 +995,7 @@ CONFIG_EXAMPLES_OSTEST_WAITRESULT=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/netnsh/defconfig b/configs/stm32f4discovery/netnsh/defconfig index 13c5d36b556..1edd9ec625e 100644 --- a/configs/stm32f4discovery/netnsh/defconfig +++ b/configs/stm32f4discovery/netnsh/defconfig @@ -121,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -140,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -208,6 +210,7 @@ CONFIG_SDIO_DMA=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set # CONFIG_ARCH_CHIP_STM32F107VC is not set # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -252,6 +255,7 @@ CONFIG_SDIO_DMA=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -436,6 +440,10 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set CONFIG_STM32_CCMEXCLUDE=y CONFIG_STM32_DMACAPABLE=y + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM2_CAP is not set # CONFIG_STM32_TIM3_CAP is not set @@ -449,14 +457,26 @@ CONFIG_STM32_DMACAPABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART6_SERIALDRIVER=y +# CONFIG_STM32_USART6_1WIREDRIVER is not set # CONFIG_USART6_RS485 is not set # CONFIG_USART6_RXDMA is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -748,7 +768,12 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -823,33 +848,28 @@ CONFIG_ETH0_PHY_LAN8720=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -CONFIG_ARCH_HAVE_USART6=y -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART6_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +CONFIG_USART6_SERIALDRIVER=y +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1177,16 +1197,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1197,17 +1218,17 @@ CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1215,8 +1236,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1224,11 +1245,10 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -1252,8 +1272,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1266,20 +1286,21 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1384,6 +1405,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 @@ -1430,12 +1452,13 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1443,8 +1466,7 @@ CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f4discovery/nsh/defconfig b/configs/stm32f4discovery/nsh/defconfig index a7a485a6d48..e57c9fd05e3 100644 --- a/configs/stm32f4discovery/nsh/defconfig +++ b/configs/stm32f4discovery/nsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -247,6 +252,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -443,13 +449,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -723,33 +733,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -901,6 +906,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -989,7 +996,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1027,6 +1033,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/nxlines/defconfig b/configs/stm32f4discovery/nxlines/defconfig index 32ee8e04f23..284eef1c4cf 100644 --- a/configs/stm32f4discovery/nxlines/defconfig +++ b/configs/stm32f4discovery/nxlines/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -247,6 +252,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -444,13 +450,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -763,33 +773,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -883,6 +888,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -1028,6 +1034,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1121,7 +1129,6 @@ CONFIG_EXAMPLES_NXLINES_BPP=16 # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1159,6 +1166,7 @@ CONFIG_EXAMPLES_NXLINES_BPP=16 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/pm/defconfig b/configs/stm32f4discovery/pm/defconfig index 2d646c89862..f9444cbdbeb 100644 --- a/configs/stm32f4discovery/pm/defconfig +++ b/configs/stm32f4discovery/pm/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -247,6 +252,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -443,13 +449,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -700,6 +710,7 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_RTC=y CONFIG_RTC_DATETIME=y CONFIG_RTC_ALARM=y +CONFIG_RTC_NALARMS=1 # CONFIG_RTC_DRIVER is not set # CONFIG_RTC_EXTERNAL is not set # CONFIG_WATCHDOG is not set @@ -723,39 +734,52 @@ CONFIG_RTC_ALARM=y # CONFIG_EEPROM is not set # CONFIG_PIPES is not set CONFIG_PM=y +CONFIG_PM_SLICEMS=100 +CONFIG_PM_NDOMAINS=1 +CONFIG_PM_MEMORY=2 +CONFIG_PM_COEFN=1 +CONFIG_PM_COEF1=1 +CONFIG_PM_COEF2=1 +CONFIG_PM_COEF3=1 +CONFIG_PM_COEF4=1 +CONFIG_PM_COEF5=1 +CONFIG_PM_IDLEENTER_THRESH=1 +CONFIG_PM_IDLEEXIT_THRESH=2 +CONFIG_PM_IDLEENTER_COUNT=30 +CONFIG_PM_STANDBYENTER_THRESH=1 +CONFIG_PM_STANDBYEXIT_THRESH=2 +CONFIG_PM_STANDBYENTER_COUNT=50 +CONFIG_PM_SLEEPENTER_THRESH=1 +CONFIG_PM_SLEEPEXIT_THRESH=2 +CONFIG_PM_SLEEPENTER_COUNT=70 # CONFIG_POWER is not set # CONFIG_SENSORS is not set # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -907,6 +931,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -996,7 +1022,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1034,6 +1059,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/posix_spawn/defconfig b/configs/stm32f4discovery/posix_spawn/defconfig index dc2c60aacb7..2eaef404731 100644 --- a/configs/stm32f4discovery/posix_spawn/defconfig +++ b/configs/stm32f4discovery/posix_spawn/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -248,6 +253,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -443,13 +449,17 @@ CONFIG_STM32_CCMEXCLUDE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -708,33 +718,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set @@ -885,6 +890,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -971,7 +978,6 @@ CONFIG_EXAMPLES_POSIXSPAWN_DEVPATH="/dev/ram0" # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_UNIONFS is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1010,6 +1016,7 @@ CONFIG_EXAMPLES_POSIXSPAWN_DEVPATH="/dev/ram0" # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/rgbled/defconfig b/configs/stm32f4discovery/rgbled/defconfig index 91e1e9dd0f5..27023676715 100644 --- a/configs/stm32f4discovery/rgbled/defconfig +++ b/configs/stm32f4discovery/rgbled/defconfig @@ -102,6 +102,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -120,6 +121,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -141,6 +143,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -149,6 +152,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # CONFIG_DEBUG_HARDFAULT is not set @@ -160,6 +164,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -266,6 +271,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -475,13 +481,17 @@ CONFIG_STM32_TIM3_CHMODE=0 # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -757,33 +767,28 @@ CONFIG_RGBLED=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -936,6 +941,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1027,7 +1034,6 @@ CONFIG_EXAMPLES_RGBLED_STACKSIZE=2048 # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -1065,6 +1071,7 @@ CONFIG_EXAMPLES_RGBLED_STACKSIZE=2048 # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/src/stm32_appinit.c b/configs/stm32f4discovery/src/stm32_appinit.c index 4ce0e55bdb0..75e635988ca 100644 --- a/configs/stm32f4discovery/src/stm32_appinit.c +++ b/configs/stm32f4discovery/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/stm32f4discovery/src/stm32_appinit.c * - * Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -59,12 +59,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture-specific initialization (if this was not already - * done by board_initialize(); + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef CONFIG_BMP180 stm32_bmp180initialize("/dev/press0"); diff --git a/configs/stm32f4discovery/src/stm32_boot.c b/configs/stm32f4discovery/src/stm32_boot.c index 888317b1cee..41eb13dcc72 100644 --- a/configs/stm32f4discovery/src/stm32_boot.c +++ b/configs/stm32f4discovery/src/stm32_boot.c @@ -104,10 +104,10 @@ void stm32_boardinitialize(void) } #endif -#ifdef CONFIG_CANUTILS_UAVCAN +#ifdef CONFIG_CANUTILS_LIBUAVCAN (void)stm32_configgpio(GPIO_CAN1_RX); (void)stm32_configgpio(GPIO_CAN1_TX); -# if CONFIG_UAVCAN_STM32_NUM_IFACES > 1 +# if CONFIG_LIBUAVCAN_STM32_NUM_IFACES > 1 (void)stm32_configgpio(GPIO_CAN2_RX); (void)stm32_configgpio(GPIO_CAN2_TX); # endif diff --git a/configs/stm32f4discovery/uavcan/defconfig b/configs/stm32f4discovery/uavcan/defconfig index 1bc92535c77..97db93590ef 100644 --- a/configs/stm32f4discovery/uavcan/defconfig +++ b/configs/stm32f4discovery/uavcan/defconfig @@ -76,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -94,6 +95,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -115,6 +117,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -123,6 +126,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -133,6 +137,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -238,6 +243,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -813,6 +819,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -841,37 +849,37 @@ CONFIG_HAVE_CXXINITIALIZE=y # # CAN Utilities # -CONFIG_CANUTILS_UAVCAN=y -CONFIG_UAVCAN_LIBUAVCAN_URL="https://github.com/UAVCAN/libuavcan/archive" -CONFIG_UAVCAN_LIBUAVCAN_VERSION="b04396ace50155573e545ed9bf2fb09964ee2367" -CONFIG_UAVCAN_DSDL_URL="https://github.com/UAVCAN/dsdl/archive" -CONFIG_UAVCAN_DSDL_VERSION="9804a3e6972825586be252ce08dd899f44994b14" -CONFIG_UAVCAN_PYUAVCAN_URL="https://github.com/UAVCAN/pyuavcan/archive" -CONFIG_UAVCAN_PYUAVCAN_VERSION="c58477a644d20ccf95a20c151f3a0402f271c3b8" -CONFIG_UAVCAN_STM32_NUM_IFACES=1 -# CONFIG_UAVCAN_STM32_TIM2 is not set -# CONFIG_UAVCAN_STM32_TIM3 is not set -# CONFIG_UAVCAN_STM32_TIM4 is not set -# CONFIG_UAVCAN_STM32_TIM5 is not set -CONFIG_UAVCAN_STM32_TIM6=y -# CONFIG_UAVCAN_STM32_TIM7 is not set -CONFIG_UAVCAN_CPP03=y -# CONFIG_UAVCAN_CPP11 is not set -# CONFIG_UAVCAN_DEBUG is not set -# CONFIG_UAVCAN_EXCEPTIONS is not set -# CONFIG_UAVCAN_TINY is not set -# CONFIG_UAVCAN_NO_GLOBAL_DATA_TYPE_REGISTRY is not set -# CONFIG_UAVCAN_IMPLEMENT_PLACEMENT_NEW is not set -# CONFIG_UAVCAN_USE_EXTERNAL_SNPRINTF is not set -# CONFIG_UAVCAN_USE_EXTERNAL_FLOAT16_CONVERSION is not set -# CONFIG_UAVCAN_NO_ASSERTIONS is not set -CONFIG_UAVCAN_MEM_POOL_BLOCK_SIZE=0 -CONFIG_UAVCAN_FLOAT_COMPARISON_EPSILON_MULT=0 -CONFIG_UAVCAN_MAX_CAN_ACCEPTANCE_FILTERS=0 -CONFIG_UAVCAN_MAX_NETWORK_SIZE_HINT=0 -CONFIG_UAVCAN_RX_QUEUE_CAPACITY=0 -CONFIG_UAVCAN_BIT_RATE=0 -CONFIG_UAVCAN_INIT_RETRIES=0 +CONFIG_CANUTILS_LIBUAVCAN=y +CONFIG_LIBUAVCAN_URL="https://github.com/UAVCAN/libuavcan/archive" +CONFIG_LIBUAVCAN_VERSION="b04396ace50155573e545ed9bf2fb09964ee2367" +CONFIG_LIBUAVCAN_DSDL_URL="https://github.com/UAVCAN/dsdl/archive" +CONFIG_LIBUAVCAN_DSDL_VERSION="9804a3e6972825586be252ce08dd899f44994b14" +CONFIG_LIBUAVCAN_PYUAVCAN_URL="https://github.com/UAVCAN/pyuavcan/archive" +CONFIG_LIBUAVCAN_PYUAVCAN_VERSION="c58477a644d20ccf95a20c151f3a0402f271c3b8" +CONFIG_LIBUAVCAN_STM32_NUM_IFACES=1 +CONFIG_LIBUAVCAN_STM32_TIM2=y +# CONFIG_LIBUAVCAN_STM32_TIM3 is not set +# CONFIG_LIBUAVCAN_STM32_TIM4 is not set +# CONFIG_LIBUAVCAN_STM32_TIM5 is not set +# CONFIG_LIBUAVCAN_STM32_TIM6 is not set +# CONFIG_LIBUAVCAN_STM32_TIM7 is not set +CONFIG_LIBUAVCAN_CPP03=y +# CONFIG_LIBUAVCAN_CPP11 is not set +# CONFIG_LIBUAVCAN_DEBUG is not set +# CONFIG_LIBUAVCAN_EXCEPTIONS is not set +# CONFIG_LIBUAVCAN_TINY is not set +# CONFIG_LIBUAVCAN_NO_GLOBAL_DATA_TYPE_REGISTRY is not set +# CONFIG_LIBUAVCAN_IMPLEMENT_PLACEMENT_NEW is not set +# CONFIG_LIBUAVCAN_USE_EXTERNAL_SNPRINTF is not set +# CONFIG_LIBUAVCAN_USE_EXTERNAL_FLOAT16_CONVERSION is not set +# CONFIG_LIBUAVCAN_NO_ASSERTIONS is not set +CONFIG_LIBUAVCAN_MEM_POOL_BLOCK_SIZE=0 +CONFIG_LIBUAVCAN_FLOAT_COMPARISON_EPSILON_MULT=0 +CONFIG_LIBUAVCAN_MAX_CAN_ACCEPTANCE_FILTERS=0 +CONFIG_LIBUAVCAN_MAX_NETWORK_SIZE_HINT=0 +CONFIG_LIBUAVCAN_RX_QUEUE_CAPACITY=0 +CONFIG_LIBUAVCAN_BIT_RATE=0 +CONFIG_LIBUAVCAN_INIT_RETRIES=0 # # Examples @@ -929,7 +937,6 @@ CONFIG_EXAMPLES_UAVCAN_NODE_MEM_POOL_SIZE=4096 CONFIG_EXAMPLES_UAVCAN_NODE_ID=1 CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan" # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -966,6 +973,7 @@ CONFIG_EXAMPLES_UAVCAN_NODE_NAME="org.nuttx.apps.examples.uavcan" # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/usbnsh/defconfig b/configs/stm32f4discovery/usbnsh/defconfig index b5ce28b6894..66134476b76 100644 --- a/configs/stm32f4discovery/usbnsh/defconfig +++ b/configs/stm32f4discovery/usbnsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -127,6 +130,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -137,6 +141,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -247,6 +252,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -443,13 +449,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART2_SERIALDRIVER=y +# CONFIG_STM32_USART2_1WIREDRIVER is not set # CONFIG_USART2_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # @@ -731,33 +741,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART2_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -811,8 +816,8 @@ CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 CONFIG_CDCACM_EPBULKIN=2 CONFIG_CDCACM_EPBULKIN_FSSIZE=64 CONFIG_CDCACM_EPBULKIN_HSSIZE=512 -CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 CONFIG_CDCACM_BULKIN_REQLEN=96 CONFIG_CDCACM_RXBUFSIZE=256 CONFIG_CDCACM_TXBUFSIZE=256 @@ -950,6 +955,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -1076,6 +1083,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32f4discovery/winbuild/defconfig b/configs/stm32f4discovery/winbuild/defconfig index 9fd11d2f18a..079f197c1ff 100644 --- a/configs/stm32f4discovery/winbuild/defconfig +++ b/configs/stm32f4discovery/winbuild/defconfig @@ -658,33 +658,32 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART2_ISUART=y CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set diff --git a/configs/stm32f746g-disco/knsh/defconfig b/configs/stm32f746g-disco/knsh/defconfig index 94ee604860a..6edc370a236 100644 --- a/configs/stm32f746g-disco/knsh/defconfig +++ b/configs/stm32f746g-disco/knsh/defconfig @@ -494,33 +494,32 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -CONFIG_ARCH_HAVE_USART6=y -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +CONFIG_USART6_SERIALDRIVER=y +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART6_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/stm32f746g-disco/netnsh/defconfig b/configs/stm32f746g-disco/netnsh/defconfig index 3d0180bd2ce..5fe8fa019da 100644 --- a/configs/stm32f746g-disco/netnsh/defconfig +++ b/configs/stm32f746g-disco/netnsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set CONFIG_ARCH_CHIP_STM32F7=y +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,14 +121,16 @@ CONFIG_ARCH_CORTEXM7=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32f7" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARMV7M_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set CONFIG_ARCH_HAVE_FPU=y -CONFIG_ARCH_HAVE_DPFPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -142,6 +146,7 @@ CONFIG_ARMV7M_HAVE_ITCM=y CONFIG_ARMV7M_HAVE_DTCM=y # CONFIG_ARMV7M_ITCM is not set CONFIG_ARMV7M_DTCM=y +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -154,22 +159,118 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARMV7M_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # CONFIG_SERIAL_TERMIOS is not set +# CONFIG_USART6_RS485 is not set +# CONFIG_SERIAL_DISABLE_REORDERING is not set # # STM32 F7 Configuration Options # -# CONFIG_ARCH_CHIP_STM32F745 is not set -CONFIG_ARCH_CHIP_STM32F746=y -# CONFIG_ARCH_CHIP_STM32F756 is not set +CONFIG_ARCH_CHIP_STM32F745VG=y +# CONFIG_ARCH_CHIP_STM32F745VE is not set +# CONFIG_ARCH_CHIP_STM32F745IG is not set +# CONFIG_ARCH_CHIP_STM32F745IE is not set +# CONFIG_ARCH_CHIP_STM32F745ZE is not set +# CONFIG_ARCH_CHIP_STM32F745ZG is not set +# CONFIG_ARCH_CHIP_STM32F746BG is not set +# CONFIG_ARCH_CHIP_STM32F746VG is not set +# CONFIG_ARCH_CHIP_STM32F746VE is not set +# CONFIG_ARCH_CHIP_STM32F746BE is not set +# CONFIG_ARCH_CHIP_STM32F746ZG is not set +# CONFIG_ARCH_CHIP_STM32F746IE is not set +# CONFIG_ARCH_CHIP_STM32F746NG is not set +# CONFIG_ARCH_CHIP_STM32F746NE is not set +# CONFIG_ARCH_CHIP_STM32F746ZE is not set +# CONFIG_ARCH_CHIP_STM32F746IG is not set +# CONFIG_ARCH_CHIP_STM32F756NG is not set +# CONFIG_ARCH_CHIP_STM32F756BG is not set +# CONFIG_ARCH_CHIP_STM32F756IG is not set +# CONFIG_ARCH_CHIP_STM32F756VG is not set +# CONFIG_ARCH_CHIP_STM32F756ZG is not set +# CONFIG_ARCH_CHIP_STM32F765NI is not set +# CONFIG_ARCH_CHIP_STM32F765VI is not set +# CONFIG_ARCH_CHIP_STM32F765VG is not set +# CONFIG_ARCH_CHIP_STM32F765BI is not set +# CONFIG_ARCH_CHIP_STM32F765NG is not set +# CONFIG_ARCH_CHIP_STM32F765ZG is not set +# CONFIG_ARCH_CHIP_STM32F765ZI is not set +# CONFIG_ARCH_CHIP_STM32F765IG is not set +# CONFIG_ARCH_CHIP_STM32F765BG is not set +# CONFIG_ARCH_CHIP_STM32F765II is not set +# CONFIG_ARCH_CHIP_STM32F767NG is not set +# CONFIG_ARCH_CHIP_STM32F767IG is not set +# CONFIG_ARCH_CHIP_STM32F767VG is not set +# CONFIG_ARCH_CHIP_STM32F767ZG is not set +# CONFIG_ARCH_CHIP_STM32F767NI is not set +# CONFIG_ARCH_CHIP_STM32F767VI is not set +# CONFIG_ARCH_CHIP_STM32F767BG is not set +# CONFIG_ARCH_CHIP_STM32F767ZI is not set +# CONFIG_ARCH_CHIP_STM32F767II is not set +# CONFIG_ARCH_CHIP_STM32F769BI is not set +# CONFIG_ARCH_CHIP_STM32F769II is not set +# CONFIG_ARCH_CHIP_STM32F769BG is not set +# CONFIG_ARCH_CHIP_STM32F769NI is not set +# CONFIG_ARCH_CHIP_STM32F769AI is not set +# CONFIG_ARCH_CHIP_STM32F769NG is not set +# CONFIG_ARCH_CHIP_STM32F769IG is not set +# CONFIG_ARCH_CHIP_STM32F777ZI is not set +# CONFIG_ARCH_CHIP_STM32F777VI is not set +# CONFIG_ARCH_CHIP_STM32F777NI is not set +# CONFIG_ARCH_CHIP_STM32F777BI is not set +# CONFIG_ARCH_CHIP_STM32F777II is not set +# CONFIG_ARCH_CHIP_STM32F778AI is not set +# CONFIG_ARCH_CHIP_STM32F779II is not set +# CONFIG_ARCH_CHIP_STM32F779NI is not set +# CONFIG_ARCH_CHIP_STM32F779BI is not set +# CONFIG_ARCH_CHIP_STM32F779AI is not set CONFIG_STM32F7_STM32F74XX=y # CONFIG_STM32F7_STM32F75XX is not set -# CONFIG_STM32F7_FLASH_512KB is not set -CONFIG_STM32F7_FLASH_1024KB=y +# CONFIG_STM32F7_STM32F76XX is not set +# CONFIG_STM32F7_STM32F77XX is not set +CONFIG_STM32F7_IO_CONFIG_V=y +# CONFIG_STM32F7_IO_CONFIG_I is not set +# CONFIG_STM32F7_IO_CONFIG_Z is not set +# CONFIG_STM32F7_IO_CONFIG_N is not set +# CONFIG_STM32F7_IO_CONFIG_B is not set +# CONFIG_STM32F7_IO_CONFIG_A is not set +CONFIG_STM32F7_STM32F745XX=y +# CONFIG_STM32F7_STM32F746XX is not set +# CONFIG_STM32F7_STM32F756XX is not set +# CONFIG_STM32F7_STM32F765XX is not set +# CONFIG_STM32F7_STM32F767XX is not set +# CONFIG_STM32F7_STM32F768XX is not set +# CONFIG_STM32F7_STM32F768AX is not set +# CONFIG_STM32F7_STM32F769XX is not set +# CONFIG_STM32F7_STM32F769AX is not set +# CONFIG_STM32F7_STM32F777XX is not set +# CONFIG_STM32F7_STM32F778XX is not set +# CONFIG_STM32F7_STM32F778AX is not set +# CONFIG_STM32F7_STM32F779XX is not set +# CONFIG_STM32F7_STM32F779AX is not set +# CONFIG_STM32F7_FLASH_CONFIG_E is not set +# CONFIG_STM32F7_FLASH_CONFIG_I is not set +CONFIG_STM32F7_FLASH_OVERRIDE_DEFAULT=y +# CONFIG_STM32F7_FLASH_OVERRIDE_E is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_G is not set +# CONFIG_STM32F7_FLASH_OVERRIDE_I is not set # # STM32 Peripheral Support # -CONFIG_STM32F7_HAVE_LTDC=y +# CONFIG_STM32F7_HAVE_LTDC is not set +CONFIG_STM32F7_HAVE_FSMC=y +CONFIG_STM32F7_HAVE_ETHRNET=y +CONFIG_STM32F7_HAVE_RNG=y +# CONFIG_STM32F7_HAVE_SPI5 is not set +# CONFIG_STM32F7_HAVE_SPI6 is not set +# CONFIG_STM32F7_HAVE_SDMMC2 is not set +# CONFIG_STM32F7_HAVE_CAN3 is not set +CONFIG_STM32F7_HAVE_DCMI=y +# CONFIG_STM32F7_HAVE_DSIHOST is not set +CONFIG_STM32F7_HAVE_DMA2D=y +# CONFIG_STM32F7_HAVE_JPEG is not set +# CONFIG_STM32F7_HAVE_CRYP is not set +# CONFIG_STM32F7_HAVE_HASH is not set +# CONFIG_STM32F7_HAVE_DFSDM1 is not set # CONFIG_STM32F7_ADC is not set # CONFIG_STM32F7_CAN is not set # CONFIG_STM32F7_DAC is not set @@ -186,25 +287,23 @@ CONFIG_STM32F7_USART=y # CONFIG_STM32F7_CAN2 is not set # CONFIG_STM32F7_CEC is not set # CONFIG_STM32F7_CRC is not set -# CONFIG_STM32F7_CRYP is not set # CONFIG_STM32F7_DMA1 is not set # CONFIG_STM32F7_DMA2 is not set # CONFIG_STM32F7_DAC1 is not set # CONFIG_STM32F7_DAC2 is not set # CONFIG_STM32F7_DCMI is not set +# CONFIG_STM32F7_DMA2D is not set CONFIG_STM32F7_ETHMAC=y # CONFIG_STM32F7_FSMC is not set # CONFIG_STM32F7_I2C1 is not set # CONFIG_STM32F7_I2C2 is not set # CONFIG_STM32F7_I2C3 is not set # CONFIG_STM32F7_LPTIM1 is not set -# CONFIG_STM32F7_LTDC is not set -# CONFIG_STM32F7_DMA2D is not set # CONFIG_STM32F7_OTGFS is not set # CONFIG_STM32F7_OTGHS is not set # CONFIG_STM32F7_QUADSPI is not set -# CONFIG_STM32F7_SAI1 is not set # CONFIG_STM32F7_RNG is not set +# CONFIG_STM32F7_SAI1 is not set # CONFIG_STM32F7_SAI2 is not set # CONFIG_STM32F7_SDMMC1 is not set # CONFIG_STM32F7_SPDIFRX is not set @@ -212,8 +311,6 @@ CONFIG_STM32F7_ETHMAC=y # CONFIG_STM32F7_SPI2 is not set # CONFIG_STM32F7_SPI3 is not set # CONFIG_STM32F7_SPI4 is not set -# CONFIG_STM32F7_SPI5 is not set -# CONFIG_STM32F7_SPI6 is not set # CONFIG_STM32F7_TIM1 is not set # CONFIG_STM32F7_TIM2 is not set # CONFIG_STM32F7_TIM3 is not set @@ -239,6 +336,12 @@ CONFIG_STM32F7_USART6=y # CONFIG_STM32F7_UART8 is not set # CONFIG_STM32F7_IWDG is not set # CONFIG_STM32F7_WWDG is not set + +# +# U[S]ART Configuration +# +# CONFIG_STM32F7_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32F7_USART_BREAKS is not set # CONFIG_STM32F7_CUSTOM_CLOCKCONFIG is not set # @@ -322,19 +425,22 @@ CONFIG_RAM_SIZE=245760 # # Board Selection # -CONFIG_ARCH_BOARD_STM32F746G_DISCO=y -# CONFIG_ARCH_BOARD_CUSTOM is not set -CONFIG_ARCH_BOARD="stm32f746g-disco" +CONFIG_ARCH_BOARD_CUSTOM=y + +# +# Custom Board Configuration +# +CONFIG_ARCH_BOARD_CUSTOM_NAME="" +CONFIG_ARCH_BOARD_CUSTOM_DIR="" +# CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH is not set +# CONFIG_BOARD_CRASHDUMP is not set +# CONFIG_BOARD_CUSTOM_LEDS is not set +# CONFIG_BOARD_CUSTOM_BUTTONS is not set +# CONFIG_BOARD_CUSTOM_INTERRUPT is not set # # Common Board Options # -CONFIG_ARCH_HAVE_LEDS=y -CONFIG_ARCH_LEDS=y -CONFIG_ARCH_HAVE_BUTTONS=y -CONFIG_ARCH_BUTTONS=y -CONFIG_ARCH_HAVE_IRQBUTTONS=y -# CONFIG_ARCH_IRQBUTTONS is not set CONFIG_NSH_MMCSDMINOR=0 # @@ -491,12 +597,16 @@ CONFIG_SPI_EXCHANGE=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support # -# CONFIG_USERLED is not set # CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set @@ -553,33 +663,28 @@ CONFIG_ETH0_PHY_LAN8742A=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -CONFIG_ARCH_HAVE_USART6=y -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART6_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +CONFIG_USART6_SERIALDRIVER=y +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -846,6 +951,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_DNSCLIENT is not set @@ -884,21 +991,21 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # -# CONFIG_EXAMPLES_BUTTONS is not set # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_CXXTEST is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set # CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -909,17 +1016,17 @@ CONFIG_EXAMPLES_NSH=y CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -927,8 +1034,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -936,11 +1043,9 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities @@ -962,8 +1067,8 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -976,18 +1081,19 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y # CONFIG_NETUTILS_TFTPC is not set -CONFIG_NETUTILS_NETLIB=y # CONFIG_NETUTILS_WEBCLIENT is not set # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1087,6 +1193,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1166,12 +1273,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1180,6 +1287,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/stm32f746g-disco/nsh/defconfig b/configs/stm32f746g-disco/nsh/defconfig index b73ab07398d..fdac7f8dd68 100644 --- a/configs/stm32f746g-disco/nsh/defconfig +++ b/configs/stm32f746g-disco/nsh/defconfig @@ -486,33 +486,32 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -CONFIG_ARCH_HAVE_USART6=y -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +CONFIG_USART6_SERIALDRIVER=y +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART6_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/stm32f746g-disco/src/stm32_appinitialize.c b/configs/stm32f746g-disco/src/stm32_appinitialize.c index aa2818899ab..88d62fc154d 100644 --- a/configs/stm32f746g-disco/src/stm32_appinitialize.c +++ b/configs/stm32f746g-disco/src/stm32_appinitialize.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/stm32f746g-disco/src/stm32_appinitilaize.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -42,10 +42,6 @@ #include "stm32_ccm.h" #include "stm32f746g-disco.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -58,9 +54,24 @@ * called directly from application code, but only indirectly via the * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef CONFIG_FS_PROCFS int ret; diff --git a/configs/stm32f746g-disco/src/stm32_boot.c b/configs/stm32f746g-disco/src/stm32_boot.c index 381925dee1f..c5954af1771 100644 --- a/configs/stm32f746g-disco/src/stm32_boot.c +++ b/configs/stm32f746g-disco/src/stm32_boot.c @@ -121,7 +121,7 @@ void board_initialize(void) * but the initialization function must run in kernel space. */ - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif diff --git a/configs/stm32l476vg-disco/README.txt b/configs/stm32l476vg-disco/README.txt index f6f0479ad54..e8355e79bc8 100644 --- a/configs/stm32l476vg-disco/README.txt +++ b/configs/stm32l476vg-disco/README.txt @@ -379,7 +379,7 @@ Serial Consoles To configure USART1 as the console: CONFIG_STM32_USART1=y - CONFIG_USART1_ISUART=y + CONFIG_USART1_SERIALDRIVER=y CONFIG_USART1_SERIAL_CONSOLE=y CONFIG_USART1_RXBUFSIZE=256 CONFIG_USART1_TXBUFSIZE=256 @@ -418,7 +418,7 @@ Serial Consoles To configure USART2 as the console: CONFIG_STM32_USART2=y - CONFIG_USART2_ISUART=y + CONFIG_USART2_SERIALDRIVER=y CONFIG_USART2_SERIAL_CONSOLE=y CONFIG_USART2_RXBUFSIZE=256 CONFIG_USART2_TXBUFSIZE=256 @@ -439,7 +439,7 @@ Serial Consoles To configure USART6 as the console: CONFIG_STM32_USART6=y - CONFIG_USART6_ISUART=y + CONFIG_USART6_SERIALDRIVER=y CONFIG_USART6_SERIAL_CONSOLE=y CONFIG_USART6_RXBUFSIZE=256 CONFIG_USART6_TXBUFSIZE=256 diff --git a/configs/stm32l476vg-disco/include/board.h b/configs/stm32l476vg-disco/include/board.h index c3e1efd354c..c05f74a7e5d 100644 --- a/configs/stm32l476vg-disco/include/board.h +++ b/configs/stm32l476vg-disco/include/board.h @@ -115,8 +115,8 @@ * */ -#define GPIO_I2C1_SCL GPIO_I2C1_SCL_1 -#define GPIO_I2C1_SDA GPIO_I2C1_SDA_1 +#define GPIO_I2C1_SCL (GPIO_I2C1_SCL_1|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET) +#define GPIO_I2C1_SDA (GPIO_I2C1_SDA_1|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET) #define GPIO_I2C1_SCL_GPIO \ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN6) #define GPIO_I2C1_SDA_GPIO \ @@ -126,8 +126,8 @@ #if 0 -#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 -#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 +#define GPIO_I2C2_SCL (GPIO_I2C2_SCL_1|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET) +#define GPIO_I2C2_SDA (GPIO_I2C2_SDA_1|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET) #define GPIO_I2C2_SCL_GPIO \ (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN10) #define GPIO_I2C2_SDA_GPIO \ diff --git a/configs/stm32l476vg-disco/nsh/defconfig b/configs/stm32l476vg-disco/nsh/defconfig index 78242a4deb8..9d68963f5d5 100644 --- a/configs/stm32l476vg-disco/nsh/defconfig +++ b/configs/stm32l476vg-disco/nsh/defconfig @@ -607,33 +607,32 @@ CONFIG_N25QXXX_SECTOR512=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -CONFIG_ARCH_HAVE_USART2=y -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +CONFIG_USART2_SERIALDRIVER=y +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART2_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -1074,7 +1073,6 @@ CONFIG_NSH_ARCHINIT=y # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set # CONFIG_SYSTEM_INSTALL is not set -# CONFIG_SYSTEM_FLASH_ERASEALL is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set # CONFIG_SYSTEM_RAMTEST is not set diff --git a/configs/stm32l476vg-disco/src/stm32_appinit.c b/configs/stm32l476vg-disco/src/stm32_appinit.c index ec485fa1f13..0c5591dcfa3 100644 --- a/configs/stm32l476vg-disco/src/stm32_appinit.c +++ b/configs/stm32l476vg-disco/src/stm32_appinit.c @@ -123,12 +123,29 @@ FAR struct mtd_dev_s *g_mtd_fs; * Name: board_app_initialize * * Description: - * Application initialization stub for boardctl() + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ #ifdef CONFIG_LIB_BOARDCTL -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef HAVE_RTC_DRIVER FAR struct rtc_lowerhalf_s *rtclower; diff --git a/configs/stm32l476vg-disco/src/stm32_boot.c b/configs/stm32l476vg-disco/src/stm32_boot.c index 58861833804..59d3822f2fe 100644 --- a/configs/stm32l476vg-disco/src/stm32_boot.c +++ b/configs/stm32l476vg-disco/src/stm32_boot.c @@ -113,7 +113,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_NSH_ARCHINIT) - board_app_initialize(); + board_app_initialize(0); #endif } #endif diff --git a/configs/stm32ldiscovery/nsh/defconfig b/configs/stm32ldiscovery/nsh/defconfig index 68f9a4cb725..d497e5e5d92 100644 --- a/configs/stm32ldiscovery/nsh/defconfig +++ b/configs/stm32ldiscovery/nsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -246,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32L152RB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -412,13 +418,17 @@ CONFIG_STM32_JTAG_SW_ENABLE=y # CONFIG_STM32_TIM10_CAP is not set # CONFIG_STM32_TIM11_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set # CONFIG_STM32_HAVE_RTC_COUNTER is not set CONFIG_STM32_HAVE_RTC_SUBSECONDS=y @@ -669,33 +679,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -824,6 +829,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # @@ -895,7 +902,6 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -931,6 +937,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/stm32ldiscovery/src/stm32_appinit.c b/configs/stm32ldiscovery/src/stm32_appinit.c index 6141247b0e8..359e271eb95 100644 --- a/configs/stm32ldiscovery/src/stm32_appinit.c +++ b/configs/stm32ldiscovery/src/stm32_appinit.c @@ -2,7 +2,7 @@ * config/stm32ldiscovery/src/stm32_appinit.c * arch/arm/src/board/stm32_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -59,11 +59,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef CONFIG_STM32_LCD /* Initialize the SLCD and register the SLCD device as /dev/slcd */ diff --git a/configs/stm32vldiscovery/include/board.h b/configs/stm32vldiscovery/include/board.h index efbb3f3e8cd..19e167309d3 100644 --- a/configs/stm32vldiscovery/include/board.h +++ b/configs/stm32vldiscovery/include/board.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/stm32vldiscovery/include/board.h * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * Freddie Chopin * @@ -110,8 +110,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,15-17 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /* LED definitions ******************************************************************/ diff --git a/configs/stm32vldiscovery/nsh/defconfig b/configs/stm32vldiscovery/nsh/defconfig index 5e0c83b09fb..d1911fb9616 100644 --- a/configs/stm32vldiscovery/nsh/defconfig +++ b/configs/stm32vldiscovery/nsh/defconfig @@ -80,6 +80,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -98,6 +99,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_SAMV7 is not set CONFIG_ARCH_CHIP_STM32=y # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -119,6 +121,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="stm32" +# CONFIG_ARM_TOOLCHAIN_IAR is not set CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y @@ -126,6 +129,7 @@ CONFIG_ARMV7M_CMNVECTOR=y # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set @@ -136,6 +140,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARW is not set # CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set @@ -246,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F100RB=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -415,13 +421,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM13_CAP is not set # CONFIG_STM32_TIM14_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -688,33 +698,28 @@ CONFIG_RTC=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -867,6 +872,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set # CONFIG_LIBC_NETDB is not set # CONFIG_NETDB_HOSTFILE is not set @@ -945,7 +952,6 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_WEBSERVER is not set -# CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set @@ -983,6 +989,7 @@ CONFIG_EXAMPLES_NSH=y # Network Utilities # # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/sure-pic32mx/nsh/defconfig b/configs/sure-pic32mx/nsh/defconfig index 5db19ac5c00..25e91c17f2e 100644 --- a/configs/sure-pic32mx/nsh/defconfig +++ b/configs/sure-pic32mx/nsh/defconfig @@ -483,28 +483,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -CONFIG_ARCH_HAVE_UART2=y -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +CONFIG_UART2_SERIALDRIVER=y +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/sure-pic32mx/src/pic32mx_appinit.c b/configs/sure-pic32mx/src/pic32mx_appinit.c index 6992300bd01..ef09c7641c9 100644 --- a/configs/sure-pic32mx/src/pic32mx_appinit.c +++ b/configs/sure-pic32mx/src/pic32mx_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/sure-pic32mx/src/pic32mx_appinit.c * - * Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2013, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -359,11 +359,28 @@ static int nsh_usbdevinitialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret; diff --git a/configs/sure-pic32mx/usbnsh/defconfig b/configs/sure-pic32mx/usbnsh/defconfig index 66d0bb5e3b8..572454b95ab 100644 --- a/configs/sure-pic32mx/usbnsh/defconfig +++ b/configs/sure-pic32mx/usbnsh/defconfig @@ -485,28 +485,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_SERIAL_REMOVABLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -CONFIG_ARCH_HAVE_UART2=y -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +CONFIG_UART2_SERIALDRIVER=y +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/teensy-2.0/hello/defconfig b/configs/teensy-2.0/hello/defconfig index a1c37c8e317..423049ad667 100644 --- a/configs/teensy-2.0/hello/defconfig +++ b/configs/teensy-2.0/hello/defconfig @@ -305,33 +305,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set diff --git a/configs/teensy-2.0/nsh/defconfig b/configs/teensy-2.0/nsh/defconfig index 0257552769d..eaf3e24cc9e 100644 --- a/configs/teensy-2.0/nsh/defconfig +++ b/configs/teensy-2.0/nsh/defconfig @@ -316,33 +316,32 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set diff --git a/configs/teensy-2.0/usbmsc/defconfig b/configs/teensy-2.0/usbmsc/defconfig index b4ec32ec9ac..b185f2467c6 100644 --- a/configs/teensy-2.0/usbmsc/defconfig +++ b/configs/teensy-2.0/usbmsc/defconfig @@ -338,33 +338,32 @@ CONFIG_MMCSD_SPIMODE=0 CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration # -CONFIG_USART1_ISUART=y CONFIG_MCU_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set diff --git a/configs/teensy-3.x/include/board.h b/configs/teensy-3.x/include/board.h index 5fc8db18e7e..2fd7bb83685 100644 --- a/configs/teensy-3.x/include/board.h +++ b/configs/teensy-3.x/include/board.h @@ -2,7 +2,7 @@ * configs/teensy-3.x/include/board.h * include/arch/board/board.h * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -56,6 +56,15 @@ /* The teensy-3.1 has a 16MHz crystal on board */ #undef BOARD_EXTCLOCK /* Crystal */ +#define BOARD_EXTAL_LP /* Low Power, as opposed to Hi Gain */ + +/* BOARD_FR_DIV is MCG_C1_FRDIV_DIV512 from kinetis_mcg.h. According to the k20 + * reference manual, when transitioning MCG clock modes to FLL Bypassed External + * the C1 divider must be set so that the FLL clock is between 31.25 and 39.0625 khz. + * For teensy-3.x that works out to a divider of 512. + */ + +#define BOARD_FR_DIV (4 << 3) #define BOARD_EXTAL_FREQ 16000000 /* 16MHz crystal frequency (REFCLK) */ #define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator (not populated) */ diff --git a/configs/teensy-3.x/nsh/defconfig b/configs/teensy-3.x/nsh/defconfig index c66150a460b..2b5dfa6aecb 100644 --- a/configs/teensy-3.x/nsh/defconfig +++ b/configs/teensy-3.x/nsh/defconfig @@ -438,28 +438,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/teensy-3.x/src/Makefile b/configs/teensy-3.x/src/Makefile index ad839632dda..ff73a6953a4 100644 --- a/configs/teensy-3.x/src/Makefile +++ b/configs/teensy-3.x/src/Makefile @@ -43,6 +43,9 @@ CSRCS += k20_autoleds.c else CSRCS += k20_userleds.c endif +ifeq ($(CONFIG_KINETIS_USBOTG),y) +CSRCS += k20_usbdev.c +endif ifeq ($(CONFIG_LIB_BOARDCTL),y) CSRCS += k20_appinit.c diff --git a/configs/teensy-3.x/src/k20_appinit.c b/configs/teensy-3.x/src/k20_appinit.c index d5cf13fe619..f027eb71673 100644 --- a/configs/teensy-3.x/src/k20_appinit.c +++ b/configs/teensy-3.x/src/k20_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/teensy-3.x/src/k20_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -38,28 +38,12 @@ ****************************************************************************/ #include - +#include #include +#include "kinetis_usbotg.h" #include "teensy-3x.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ -/* Configuration ************************************************************/ - -/**************************************************************************** - * Private Types - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -68,11 +52,36 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { +#ifdef CONFIG_USBDEV + /* Teensy is powered from usb and (bug?) only boots from being programmed, + * so if usb is compiled in signal the controller driver that we're attached now. + */ + + khci_usbattach(); +#endif + return OK; } diff --git a/configs/teensy-3.x/src/k20_usbdev.c b/configs/teensy-3.x/src/k20_usbdev.c new file mode 100644 index 00000000000..ca0ed25800e --- /dev/null +++ b/configs/teensy-3.x/src/k20_usbdev.c @@ -0,0 +1,141 @@ +/************************************************************************************ + * configs/teensy-3.x/src/k20_usbdev.c + * + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "up_arch.h" +#include "kinetis.h" +#include "kinetis_usbotg.h" +#include "kinetis_sim.h" +#include "teensy-3x.h" + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +#define khci_getreg(addr) getreg8(addr) +#define khci_putreg(val,addr) putreg8(val,addr) +#define SIM_CLKDIV2_USBDIV(n) (uint32_t)(((n) & 0x07) << 1) + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: kinetis_usbinitialize + * + * Description: + * Called to setup USB-related GPIO pins for the KwikStik-K40 board. + * + ************************************************************************************/ + +void kinetis_usbinitialize(void) +{ +} + +/************************************************************************************ + * Name: kinetis_usbpullup + * + * Description: + * If USB is supported and the board supports a pullup via GPIO (for USB software + * connect and disconnect), then the board software must provide kinetis_pullup. + * See include/nuttx/usb/usbdev.h for additional description of this method. + * Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be + * NULL. + * + ************************************************************************************/ + +int kinetis_usbpullup(FAR struct usbdev_s *dev, bool enable) +{ + usbtrace(TRACE_DEVPULLUP, (uint16_t)enable); +#if 0 + uint32_t regval; +#endif + + if (enable) + { + khci_putreg(USB_CONTROL_DPPULLUPNONOTG, KINETIS_USB0_CONTROL); + } + else + { + khci_putreg(0,KINETIS_USB0_CONTROL); + } + +#if 0 + regval = khci_getreg(KINETIS_USB0_OTGCTL); + + if (enable) + { + regval |= (1 << 2); + } + else + { + regval &= ~(1 << 2); + } + + khci_putreg(regval,KINETIS_USB0_OTGCTL); +#endif + + return OK; +} + +/************************************************************************************ + * Name: kinetis_usbsuspend + * + * Description: + * Board logic must provide the kinetis_usbsuspend logic if the USBDEV driver is + * used. This function is called whenever the USB enters or leaves suspend mode. + * This is an opportunity for the board logic to shutdown clocks, power, etc. + * while the USB is suspended. + * + ************************************************************************************/ + +void kinetis_usbsuspend(FAR struct usbdev_s *dev, bool resume) +{ + ulldbg("resume: %d\n", resume); +#warning "Missing logic" +} diff --git a/configs/teensy-3.x/usbnsh/Make.defs b/configs/teensy-3.x/usbnsh/Make.defs new file mode 100644 index 00000000000..e750c7b5705 --- /dev/null +++ b/configs/teensy-3.x/usbnsh/Make.defs @@ -0,0 +1,116 @@ +############################################################################ +# configs/teensy-3.1/nsh/Make.defs +# +# Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs + +ifeq ($(CONFIG_ARCH_CHIP_MK20DX256VLH7),y) + LDSCRIPT = mk20dx256vlh7.ld +else ifeq ($(CONFIG_ARCH_CHIP_MK20DX128VLH5),y) + LDSCRIPT = mk20dx128vlh5.ld +endif + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem $(TOPDIR)/include + ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(ARCROSSDEV)ar rcs +NM = $(ARCROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'} +ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1} + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fno-rtti +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = +ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10 + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS) +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + +ifneq ($(CROSSDEV),arm-nuttx-elf-) + LDFLAGS += -nostartfiles -nodefaultlibs +endif +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + LDFLAGS += -g +endif + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/teensy-3.x/usbnsh/defconfig b/configs/teensy-3.x/usbnsh/defconfig new file mode 100644 index 00000000000..1e750e8e6fd --- /dev/null +++ b/configs/teensy-3.x/usbnsh/defconfig @@ -0,0 +1,966 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +CONFIG_EXPERIMENTAL=y +# CONFIG_DEFAULT_SMALL is not set +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +CONFIG_INTELHEX_BINARY=y +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +# CONFIG_DEBUG is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_ARCH_HAVE_STACKCHECK=y +# CONFIG_STACK_COLORATION is not set +# CONFIG_DEBUG_SYMBOLS is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y +# CONFIG_DEBUG_NOOPT is not set +# CONFIG_DEBUG_CUSTOMOPT is not set +CONFIG_DEBUG_FULLOPT=y + +# +# System Type +# +CONFIG_ARCH_ARM=y +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_SH is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="arm" + +# +# ARM Options +# +# CONFIG_ARCH_CHIP_A1X is not set +# CONFIG_ARCH_CHIP_C5471 is not set +# CONFIG_ARCH_CHIP_CALYPSO is not set +# CONFIG_ARCH_CHIP_DM320 is not set +# CONFIG_ARCH_CHIP_EFM32 is not set +# CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set +CONFIG_ARCH_CHIP_KINETIS=y +# CONFIG_ARCH_CHIP_KL is not set +# CONFIG_ARCH_CHIP_LM is not set +# CONFIG_ARCH_CHIP_TIVA is not set +# CONFIG_ARCH_CHIP_LPC11XX is not set +# CONFIG_ARCH_CHIP_LPC17XX is not set +# CONFIG_ARCH_CHIP_LPC214X is not set +# CONFIG_ARCH_CHIP_LPC2378 is not set +# CONFIG_ARCH_CHIP_LPC31XX is not set +# CONFIG_ARCH_CHIP_LPC43XX is not set +# CONFIG_ARCH_CHIP_NUC1XX is not set +# CONFIG_ARCH_CHIP_SAMA5 is not set +# CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set +# CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set +# CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set +# CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set +# CONFIG_ARCH_ARM7TDMI is not set +# CONFIG_ARCH_ARM926EJS is not set +# CONFIG_ARCH_ARM920T is not set +# CONFIG_ARCH_CORTEXM0 is not set +# CONFIG_ARCH_CORTEXM3 is not set +CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set +# CONFIG_ARCH_CORTEXA5 is not set +# CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set +CONFIG_ARCH_FAMILY="armv7-m" +CONFIG_ARCH_CHIP="kinetis" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y +# CONFIG_ARMV7M_USEBASEPRI is not set +CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y +# CONFIG_ARM_MPU is not set + +# +# ARMV7M Configuration Options +# +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set +# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set +# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set +CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set +# CONFIG_ARMV7M_ITMSYSLOG is not set + +# +# Kinetis Configuration Options +# +# CONFIG_ARCH_CHIP_MK20DN32VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX32VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DN64VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX64VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DN128VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX128VLH5 is not set +# CONFIG_ARCH_CHIP_MK20DX64VLH7 is not set +# CONFIG_ARCH_CHIP_MK20DX128VLH7 is not set +CONFIG_ARCH_CHIP_MK20DX256VLH7=y +# CONFIG_ARCH_CHIP_MK40N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X128VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X128VMD100 is not set +# CONFIG_ARCH_CHIP_MK40X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK40X256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N256VMD100 is not set +# CONFIG_ARCH_CHIP_MK60N512VLL100 is not set +# CONFIG_ARCH_CHIP_MK60N512VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60N512VMD100 is not set +# CONFIG_ARCH_CHIP_MK60X256VLQ100 is not set +# CONFIG_ARCH_CHIP_MK60X256VMD100 is not set +CONFIG_ARCH_FAMILY_K20=y +# CONFIG_ARCH_FAMILY_K40 is not set +# CONFIG_ARCH_FAMILY_K60 is not set + +# +# Kinetis Peripheral Support +# +# CONFIG_KINETIS_TRACE is not set +# CONFIG_KINETIS_FLEXBUS is not set +CONFIG_KINETIS_UART0=y +# CONFIG_KINETIS_UART1 is not set +# CONFIG_KINETIS_UART2 is not set +# CONFIG_KINETIS_UART3 is not set +# CONFIG_KINETIS_UART4 is not set +# CONFIG_KINETIS_UART5 is not set +# CONFIG_KINETIS_FLEXCAN0 is not set +# CONFIG_KINETIS_FLEXCAN1 is not set +# CONFIG_KINETIS_SPI0 is not set +# CONFIG_KINETIS_SPI1 is not set +# CONFIG_KINETIS_SPI2 is not set +# CONFIG_KINETIS_I2C0 is not set +# CONFIG_KINETIS_I2C1 is not set +# CONFIG_KINETIS_I2S is not set +# CONFIG_KINETIS_DAC0 is not set +# CONFIG_KINETIS_DAC1 is not set +# CONFIG_KINETIS_ADC0 is not set +# CONFIG_KINETIS_ADC1 is not set +# CONFIG_KINETIS_CMP is not set +# CONFIG_KINETIS_VREF is not set +# CONFIG_KINETIS_SDHC is not set +# CONFIG_KINETIS_FTM0 is not set +# CONFIG_KINETIS_FTM1 is not set +# CONFIG_KINETIS_FTM2 is not set +# CONFIG_KINETIS_LPTIMER is not set +# CONFIG_KINETIS_RTC is not set +# CONFIG_KINETIS_EWM is not set +# CONFIG_KINETIS_CMT is not set +CONFIG_KINETIS_USBOTG=y +# CONFIG_KINETIS_USBDCD is not set +# CONFIG_KINETIS_LLWU is not set +# CONFIG_KINETIS_TSI is not set +# CONFIG_KINETIS_FTFL is not set +# CONFIG_KINETIS_DMA is not set +# CONFIG_KINETIS_CRC is not set +# CONFIG_KINETIS_PDB is not set +# CONFIG_KINETIS_PIT is not set + +# +# Kinetis GPIO Interrupt Configuration +# +# CONFIG_GPIO_IRQ is not set + +# +# Kinetis UART Configuration +# +CONFIG_KINETIS_UARTFIFOS=y + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +CONFIG_ARCH_HAVE_IRQPRIO=y +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +CONFIG_ARCH_HAVE_VFORK=y +# CONFIG_ARCH_HAVE_MMU is not set +CONFIG_ARCH_HAVE_MPU=y +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y +# CONFIG_ARCH_USE_MPU is not set +# CONFIG_ARCH_IRQPRIO is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ARCH_USBDUMP is not set +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +CONFIG_ARCH_HAVE_RAMFUNCS=y +CONFIG_ARCH_RAMFUNCS=y +CONFIG_ARCH_HAVE_RAMVECTORS=y +# CONFIG_ARCH_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=6024 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 +CONFIG_ARCH_HAVE_HIPRI_INTERRUPT=y +# CONFIG_ARCH_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x1fff8000 +CONFIG_RAM_SIZE=65536 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_TEENSY_3X=y +# CONFIG_ARCH_BOARD_CUSTOM is not set +CONFIG_ARCH_BOARD="teensy-3.x" + +# +# Common Board Options +# +CONFIG_ARCH_HAVE_LEDS=y +CONFIG_ARCH_LEDS=y +CONFIG_NSH_MMCSDMINOR=0 + +# +# Board-Specific Options +# +# CONFIG_TEENSY_3X_OVERCLOCK is not set +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +CONFIG_BOARDCTL_USBDEVCTRL=y +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +# CONFIG_DISABLE_POSIX_TIMERS is not set +# CONFIG_DISABLE_PTHREAD is not set +# CONFIG_DISABLE_SIGNALS is not set +# CONFIG_DISABLE_MQUEUE is not set +# CONFIG_DISABLE_ENVIRON is not set + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=12 +CONFIG_START_DAY=6 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=16 +CONFIG_WDOG_INTRESERVE=4 +CONFIG_PREALLOC_TIMERS=4 + +# +# Tasks and Scheduling +# +# CONFIG_SPINLOCK is not set +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="nsh_main" +CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=16 +# CONFIG_SCHED_HAVE_PARENT is not set +CONFIG_SCHED_WAITPID=y + +# +# Pthread Options +# +# CONFIG_MUTEX_TYPES is not set +CONFIG_NPTHREAD_KEYS=4 + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=8 +CONFIG_NFILE_STREAMS=8 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set + +# +# Signal Numbers +# +CONFIG_SIG_SIGUSR1=1 +CONFIG_SIG_SIGUSR2=2 +CONFIG_SIG_SIGALARM=3 +CONFIG_SIG_SIGCONDTIMEDOUT=16 + +# +# POSIX Message Queue Options +# +CONFIG_PREALLOC_MQ_MSGS=4 +CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set + +# +# Work queue support +# +# CONFIG_SCHED_WORKQUEUE is not set +# CONFIG_SCHED_HPWORK is not set +# CONFIG_SCHED_LPWORK is not set + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=1024 +CONFIG_USERMAIN_STACKSIZE=2048 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=2048 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +CONFIG_SPI=y +# CONFIG_SPI_SLAVE is not set +CONFIG_SPI_EXCHANGE=y +# CONFIG_SPI_CMDDATA is not set +# CONFIG_SPI_CALLBACK is not set +# CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +# CONFIG_DEV_LOWCONSOLE is not set +CONFIG_SERIAL_REMOVABLE=y +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +CONFIG_MCU_SERIAL=y +CONFIG_STANDARD_SERIAL=y +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART0_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART0 Configuration +# +CONFIG_UART0_RXBUFSIZE=256 +CONFIG_UART0_TXBUFSIZE=256 +CONFIG_UART0_BAUD=115200 +CONFIG_UART0_BITS=8 +CONFIG_UART0_PARITY=0 +CONFIG_UART0_2STOP=0 +# CONFIG_UART0_IFLOWCONTROL is not set +# CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set +CONFIG_USBDEV=y + +# +# USB Device Controller Driver Options +# +# CONFIG_USBDEV_ISOCHRONOUS is not set +CONFIG_USBDEV_DUALSPEED=y +CONFIG_USBDEV_SELFPOWERED=y +# CONFIG_USBDEV_BUSPOWERED is not set +CONFIG_USBDEV_MAXPOWER=100 +# CONFIG_USBDEV_DMA is not set +# CONFIG_ARCH_USBDEV_STALLQUEUE is not set +CONFIG_USBDEV_TRACE=y +CONFIG_USBDEV_TRACE_NRECORDS=128 +CONFIG_USBDEV_TRACE_INITIALIDSET=y + +# +# USB Device Class Driver Options +# +# CONFIG_USBDEV_COMPOSITE is not set +# CONFIG_PL2303 is not set +CONFIG_CDCACM=y +# CONFIG_CDCACM_CONSOLE is not set +# CONFIG_CDCACM_IFLOWCONTROL is not set +CONFIG_CDCACM_EP0MAXPACKET=64 +CONFIG_CDCACM_EPINTIN=1 +CONFIG_CDCACM_EPINTIN_FSSIZE=64 +CONFIG_CDCACM_EPINTIN_HSSIZE=64 +CONFIG_CDCACM_EPBULKOUT=3 +CONFIG_CDCACM_EPBULKOUT_FSSIZE=64 +CONFIG_CDCACM_EPBULKOUT_HSSIZE=512 +CONFIG_CDCACM_EPBULKIN=2 +CONFIG_CDCACM_EPBULKIN_FSSIZE=64 +CONFIG_CDCACM_EPBULKIN_HSSIZE=512 +CONFIG_CDCACM_NRDREQS=4 +CONFIG_CDCACM_NWRREQS=4 +CONFIG_CDCACM_BULKIN_REQLEN=768 +CONFIG_CDCACM_RXBUFSIZE=513 +CONFIG_CDCACM_TXBUFSIZE=769 +CONFIG_CDCACM_VENDORID=0x0525 +CONFIG_CDCACM_PRODUCTID=0xa4a7 +CONFIG_CDCACM_VENDORSTR="NuttX" +CONFIG_CDCACM_PRODUCTSTR="CDC/ACM Serial" +# CONFIG_USBMSC is not set +# CONFIG_USBHOST is not set +# CONFIG_DRIVERS_WIRELESS is not set + +# +# System Logging Device Options +# + +# +# System Logging +# +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_CONSOLE is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +# CONFIG_DISABLE_MOUNTPOINT is not set +# CONFIG_FS_AUTOMOUNTER is not set +# CONFIG_DISABLE_PSEUDOFS_OPERATIONS is not set +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +CONFIG_FS_MQUEUE_MPATH="/var/mqueue" +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_FAT is not set +# CONFIG_FS_NXFFS is not set +# CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set +# CONFIG_FS_SMARTFS is not set +# CONFIG_FS_BINFS is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# System Logging +# +# CONFIG_SYSLOG is not set +# CONFIG_SYSLOG_TIMESTAMP is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +# CONFIG_MM_SMALL is not set +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# +# CONFIG_WIRELESS is not set + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_BINFMT_EXEPATH is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +CONFIG_BUILTIN=y +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=64 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=2 +CONFIG_LIB_HOMEDIR="/" +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +CONFIG_LIBC_LONG_LONG=y +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# Built-In Applications +# +CONFIG_BUILTIN_PROXY_STACKSIZE=1024 + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_CPUHOG is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +# CONFIG_EXAMPLES_HELLO is not set +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +CONFIG_EXAMPLES_NSH=y +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_PIPE is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBSERIAL is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set + +# +# Command Line Configuration +# +CONFIG_NSH_READLINE=y +# CONFIG_NSH_CLE is not set +CONFIG_NSH_LINELEN=64 +# CONFIG_NSH_DISABLE_SEMICOLON is not set +# CONFIG_NSH_CMDPARMS is not set +CONFIG_NSH_MAXARGUMENTS=6 +# CONFIG_NSH_ARGCAT is not set +CONFIG_NSH_NESTDEPTH=3 +# CONFIG_NSH_DISABLEBG is not set +CONFIG_NSH_BUILTIN_APPS=y + +# +# Disable Individual commands +# +# CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set +# CONFIG_NSH_DISABLE_CAT is not set +# CONFIG_NSH_DISABLE_CD is not set +# CONFIG_NSH_DISABLE_CP is not set +# CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y +# CONFIG_NSH_DISABLE_DD is not set +# CONFIG_NSH_DISABLE_DF is not set +# CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set +# CONFIG_NSH_DISABLE_ECHO is not set +# CONFIG_NSH_DISABLE_EXEC is not set +# CONFIG_NSH_DISABLE_EXIT is not set +# CONFIG_NSH_DISABLE_FREE is not set +# CONFIG_NSH_DISABLE_GET is not set +# CONFIG_NSH_DISABLE_HELP is not set +# CONFIG_NSH_DISABLE_HEXDUMP is not set +# CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y +# CONFIG_NSH_DISABLE_KILL is not set +# CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y +# CONFIG_NSH_DISABLE_LS is not set +# CONFIG_NSH_DISABLE_MB is not set +# CONFIG_NSH_DISABLE_MKDIR is not set +# CONFIG_NSH_DISABLE_MKFIFO is not set +# CONFIG_NSH_DISABLE_MKRD is not set +# CONFIG_NSH_DISABLE_MH is not set +# CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set +# CONFIG_NSH_DISABLE_MW is not set +# CONFIG_NSH_DISABLE_PS is not set +# CONFIG_NSH_DISABLE_PUT is not set +# CONFIG_NSH_DISABLE_PWD is not set +# CONFIG_NSH_DISABLE_RM is not set +# CONFIG_NSH_DISABLE_RMDIR is not set +# CONFIG_NSH_DISABLE_SET is not set +# CONFIG_NSH_DISABLE_SH is not set +# CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set +# CONFIG_NSH_DISABLE_TEST is not set +# CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set +# CONFIG_NSH_DISABLE_UNSET is not set +# CONFIG_NSH_DISABLE_USLEEP is not set +# CONFIG_NSH_DISABLE_WGET is not set +# CONFIG_NSH_DISABLE_XD is not set + +# +# Configure Command Options +# +# CONFIG_NSH_CMDOPT_DF_H is not set +CONFIG_NSH_CODECS_BUFSIZE=128 +# CONFIG_NSH_CMDOPT_HEXDUMP is not set +CONFIG_NSH_FILEIOSIZE=512 + +# +# Scripting Support +# +# CONFIG_NSH_DISABLESCRIPT is not set +# CONFIG_NSH_DISABLE_ITEF is not set +# CONFIG_NSH_DISABLE_LOOPS is not set + +# +# Console Configuration +# +CONFIG_NSH_CONSOLE=y +CONFIG_NSH_USBCONSOLE=y +CONFIG_NSH_USBCONDEV="/dev/ttyACM0" +CONFIG_USBDEV_MINOR=0 + +# +# USB Device Trace Support +# +# CONFIG_NSH_USBDEV_TRACE is not set +CONFIG_NSH_ARCHINIT=y +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +CONFIG_SYSTEM_CDCACM=y +CONFIG_SYSTEM_CDCACM_DEVMINOR=0 +# CONFIG_SYSTEM_CDCACM_TRACEINIT is not set +# CONFIG_SYSTEM_CDCACM_TRACECLASS is not set +# CONFIG_SYSTEM_CDCACM_TRACETRANSFERS is not set +# CONFIG_SYSTEM_CDCACM_TRACECONTROLLER is not set +# CONFIG_SYSTEM_CDCACM_TRACEINTERRUPTS is not set +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +CONFIG_SYSTEM_HEXED=y +CONFIG_SYSTEM_HEXED_STACKSIZE=2048 +CONFIG_SYSTEM_HEXED_PRIORITY=100 +# CONFIG_SYSTEM_INSTALL is not set +CONFIG_SYSTEM_RAMTEST=y +CONFIG_READLINE_HAVE_EXTMATCH=y +CONFIG_SYSTEM_READLINE=y +CONFIG_READLINE_ECHO=y +CONFIG_READLINE_TABCOMPLETION=y +CONFIG_READLINE_MAX_BUILTINS=64 +CONFIG_READLINE_MAX_EXTCMDS=64 +CONFIG_READLINE_CMD_HISTORY=y +CONFIG_READLINE_CMD_HISTORY_LINELEN=80 +CONFIG_READLINE_CMD_HISTORY_LEN=16 +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +CONFIG_SYSTEM_USBMONITOR=y +CONFIG_SYSTEM_USBMONITOR_STACKSIZE=2048 +CONFIG_SYSTEM_USBMONITOR_PRIORITY=50 +CONFIG_SYSTEM_USBMONITOR_INTERVAL=2 +CONFIG_SYSTEM_USBMONITOR_TRACEINIT=y +CONFIG_SYSTEM_USBMONITOR_TRACECLASS=y +CONFIG_SYSTEM_USBMONITOR_TRACETRANSFERS=y +CONFIG_SYSTEM_USBMONITOR_TRACECONTROLLER=y +CONFIG_SYSTEM_USBMONITOR_TRACEINTERRUPTS=y +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/teensy-3.x/usbnsh/setenv.sh b/configs/teensy-3.x/usbnsh/setenv.sh new file mode 100755 index 00000000000..dedab5191ed --- /dev/null +++ b/configs/teensy-3.x/usbnsh/setenv.sh @@ -0,0 +1,76 @@ +#!/bin/bash +# configs/teensy-3.1/nsh/setenv.sh +# +# Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the RIDE +# toolchain under windows. You will also have to edit this if you install +# the RIDE toolchain in any other location +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/Raisonance/Ride/arm-gcc/bin" + +# This is the Cygwin path to the location where I installed the CodeSourcery +# toolchain under windows. You will also have to edit this if you install +# the CodeSourcery toolchain in any other location +# export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin" +# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin" + +# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors" +# You can this free toolchain here https://launchpad.net/gcc-arm-embedded +export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin" + +# This is the path to the location where I installed the devkitARM toolchain +# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/ +#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin" + +# Add the path to the toolchain to the PATH variable +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/teensy-lc/nsh/defconfig b/configs/teensy-lc/nsh/defconfig index 07296c553f4..f19be237185 100644 --- a/configs/teensy-lc/nsh/defconfig +++ b/configs/teensy-lc/nsh/defconfig @@ -421,28 +421,28 @@ CONFIG_SPI_EXCHANGE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/teensy-lc/src/kl_appinit.c b/configs/teensy-lc/src/kl_appinit.c index 8d96c28e763..fdd1e3bd307 100644 --- a/configs/teensy-lc/src/kl_appinit.c +++ b/configs/teensy-lc/src/kl_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/teensy-lc/src/kl_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -47,10 +47,6 @@ #ifdef CONFIG_LIB_BOARDCTL -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -63,9 +59,24 @@ * called directly from application code, but only indirectly via the * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/configs/teensy-lc/src/kl_boardinitialize.c b/configs/teensy-lc/src/kl_boardinitialize.c index 119a2d4ca6c..576e941ee27 100644 --- a/configs/teensy-lc/src/kl_boardinitialize.c +++ b/configs/teensy-lc/src/kl_boardinitialize.c @@ -136,7 +136,7 @@ void board_initialize(void) */ #if defined(CONFIG_NSH_LIBRARY) && !defined(CONFIG_LIB_BOARDCTL) - (void)board_app_initialize(); + (void)board_app_initialize(0); #endif } #endif diff --git a/configs/tm4c123g-launchpad/nsh/defconfig b/configs/tm4c123g-launchpad/nsh/defconfig index ec7ec4fb482..454af5b842f 100644 --- a/configs/tm4c123g-launchpad/nsh/defconfig +++ b/configs/tm4c123g-launchpad/nsh/defconfig @@ -453,28 +453,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h b/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h index abb2193f3a0..b9ca7ce4808 100644 --- a/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h +++ b/configs/tm4c123g-launchpad/src/tm4c123g-launchpad.h @@ -226,7 +226,7 @@ int tm4c_at24_automount(int minor); #endif /**************************************************************************** - * Name: tiva_timer_initialize + * Name: tiva_timer_configure * * Description: * Configure the timer driver @@ -234,7 +234,7 @@ int tm4c_at24_automount(int minor); ****************************************************************************/ #ifdef CONFIG_TIVA_TIMER -int tiva_timer_initialize(void); +int tiva_timer_configure(void); #endif /************************************************************************************ diff --git a/configs/tm4c123g-launchpad/src/tm4c_appinit.c b/configs/tm4c123g-launchpad/src/tm4c_appinit.c index 0763742bf1a..c1ad4dd105f 100644 --- a/configs/tm4c123g-launchpad/src/tm4c_appinit.c +++ b/configs/tm4c123g-launchpad/src/tm4c_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/tm4c123g-launchpad/src/tm4c_appinit.c * - * Copyright (C) 2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,10 +43,6 @@ #include "tm4c123g-launchpad.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -55,11 +51,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* If CONFIG_BOARD_INITIALIZE is selected then board initialization was * already performed in board_initialize. diff --git a/configs/tm4c123g-launchpad/src/tm4c_bringup.c b/configs/tm4c123g-launchpad/src/tm4c_bringup.c index c277fbb7109..48a8d649fea 100644 --- a/configs/tm4c123g-launchpad/src/tm4c_bringup.c +++ b/configs/tm4c123g-launchpad/src/tm4c_bringup.c @@ -77,10 +77,10 @@ int tm4c_bringup(void) #ifdef CONFIG_TIVA_TIMER /* Initialize the timer driver */ - ret = tiva_timer_initialize(); + ret = tiva_timer_configure(); if (ret < 0) { - syslog(LOG_ERR, "ERROR: tiva_timer_initialize failed: %d\n", ret); + syslog(LOG_ERR, "ERROR: tiva_timer_configure failed: %d\n", ret); return ret; } #endif /* CONFIG_TIVA_TIMER */ diff --git a/configs/tm4c123g-launchpad/src/tm4c_timer.c b/configs/tm4c123g-launchpad/src/tm4c_timer.c index 8bc01c6edac..19e961dd3f9 100644 --- a/configs/tm4c123g-launchpad/src/tm4c_timer.c +++ b/configs/tm4c123g-launchpad/src/tm4c_timer.c @@ -62,14 +62,14 @@ ****************************************************************************/ /**************************************************************************** - * Name: tiva_timer_initialize + * Name: tiva_timer_configure * * Description: * Configure the timer driver for the timer example application. * ****************************************************************************/ -int tiva_timer_initialize(void) +int tiva_timer_configure(void) { static bool initialized = false; int ret = OK; diff --git a/configs/tm4c1294-launchpad/ipv6/defconfig b/configs/tm4c1294-launchpad/ipv6/defconfig index faedcc29fea..95080731f66 100644 --- a/configs/tm4c1294-launchpad/ipv6/defconfig +++ b/configs/tm4c1294-launchpad/ipv6/defconfig @@ -37,6 +37,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,10 +76,12 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set CONFIG_ARCH_CHIP_TIVA=y +# CONFIG_ARCH_CHIP_LPC11XX is not set # CONFIG_ARCH_CHIP_LPC17XX is not set # CONFIG_ARCH_CHIP_LPC214X is not set # CONFIG_ARCH_CHIP_LPC2378 is not set @@ -87,33 +90,59 @@ CONFIG_ARCH_CHIP_TIVA=y # CONFIG_ARCH_CHIP_NUC1XX is not set # CONFIG_ARCH_CHIP_SAMA5 is not set # CONFIG_ARCH_CHIP_SAMD is not set +# CONFIG_ARCH_CHIP_SAML is not set # CONFIG_ARCH_CHIP_SAM34 is not set +# CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set +# CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set +# CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set # CONFIG_ARCH_ARM920T is not set # CONFIG_ARCH_CORTEXM0 is not set # CONFIG_ARCH_CORTEXM3 is not set CONFIG_ARCH_CORTEXM4=y +# CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set +# CONFIG_ARMV7M_LAZYFPU is not set CONFIG_ARCH_HAVE_FPU=y +# CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # # ARMV7M Configuration Options # +# CONFIG_ARMV7M_HAVE_ICACHE is not set +# CONFIG_ARMV7M_HAVE_DCACHE is not set +# CONFIG_ARMV7M_HAVE_ITCM is not set +# CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y +# CONFIG_ARMV7M_HAVE_STACKCHECK is not set # CONFIG_ARMV7M_ITMSYSLOG is not set # @@ -233,7 +262,7 @@ CONFIG_TIVA_I2C_TIMEOMS=500 CONFIG_TIVA_I2C_TIMEOTICKS=500 # -# Tiva Ethernet Configuration +# Ethernet Configuration # CONFIG_TIVA_PHY_INTERNAL=y CONFIG_TIVA_AUTONEG=y @@ -254,11 +283,14 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y # CONFIG_ARCH_NAND_HWECC is not set # CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +CONFIG_ARCH_HAVE_RESET=y # CONFIG_ARCH_USE_MPU is not set # CONFIG_ARCH_IRQPRIO is not set CONFIG_ARCH_STACKDUMP=y @@ -317,6 +349,14 @@ CONFIG_NSH_MMCSDMINOR=0 # # Board-Specific Options # +CONFIG_LIB_BOARDCTL=y +# CONFIG_BOARDCTL_RESET is not set +# CONFIG_BOARDCTL_UNIQUEID is not set +# CONFIG_BOARDCTL_TSCTEST is not set +# CONFIG_BOARDCTL_ADCTEST is not set +# CONFIG_BOARDCTL_PWMTEST is not set +# CONFIG_BOARDCTL_GRAPHICS is not set +# CONFIG_BOARDCTL_IOCTL is not set # # RTOS Features @@ -351,6 +391,7 @@ CONFIG_INIT_ENTRYPOINT=y # CONFIG_INIT_FILEPATH is not set CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_RR_INTERVAL=200 +# CONFIG_SCHED_SPORADIC is not set CONFIG_TASK_NAME_SIZE=31 CONFIG_MAX_TASKS=16 # CONFIG_SCHED_HAVE_PARENT is not set @@ -387,6 +428,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -402,9 +444,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -438,24 +481,45 @@ CONFIG_DEV_NULL=y # CONFIG_RAMDISK is not set # CONFIG_CAN is not set # CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set # CONFIG_PWM is not set # CONFIG_ARCH_HAVE_I2CRESET is not set CONFIG_I2C=y # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_POLLED is not set # CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y # CONFIG_SPI is not set # CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set # CONFIG_RTC is not set # CONFIG_WATCHDOG is not set -# CONFIG_TIMER is not set +# CONFIG_TIMERS_CS2100CP is not set # CONFIG_ANALOG is not set # CONFIG_AUDIO_DEVICES is not set # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -463,7 +527,11 @@ CONFIG_NETDEVICES=y # # General Ethernet MAC Driver Options # +# CONFIG_NETDEV_LOOPBACK is not set +# CONFIG_NETDEV_TELNET is not set # CONFIG_NETDEV_MULTINIC is not set +# CONFIG_ARCH_HAVE_NETDEV_STATISTICS is not set +# CONFIG_NETDEV_LATEINIT is not set # # External Ethernet MAC Device Support @@ -473,6 +541,7 @@ CONFIG_NETDEVICES=y # CONFIG_ENCX24J600 is not set # CONFIG_NET_E1000 is not set # CONFIG_NET_SLIP is not set +# CONFIG_NET_FTMAC100 is not set # CONFIG_NET_VNET is not set CONFIG_ARCH_PHY_INTERRUPT=y # CONFIG_PIPES is not set @@ -483,36 +552,33 @@ CONFIG_ARCH_PHY_INTERRUPT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set CONFIG_UART0_SERIAL_CONSOLE=y # CONFIG_OTHER_SERIAL_CONSOLE is not set @@ -529,6 +595,7 @@ CONFIG_UART0_PARITY=0 CONFIG_UART0_2STOP=0 # CONFIG_UART0_IFLOWCONTROL is not set # CONFIG_UART0_OFLOWCONTROL is not set +# CONFIG_UART0_DMA is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set # CONFIG_DRIVERS_WIRELESS is not set @@ -565,6 +632,8 @@ CONFIG_NET_GUARDSIZE=2 # # CONFIG_NET_MULTILINK is not set CONFIG_NET_ETHERNET=y +# CONFIG_NET_LOOPBACK is not set +# CONFIG_NET_TUN is not set # # Network Device Operations @@ -654,6 +723,7 @@ CONFIG_NET_STATISTICS=y # Routing Table Configuration # # CONFIG_NET_ROUTE is not set +CONFIG_NET_HOSTNAME="" # # Crypto API @@ -676,12 +746,13 @@ CONFIG_NET_STATISTICS=y CONFIG_FS_MQUEUE_MPATH="/var/mqueue" # CONFIG_FS_RAMMAP is not set # CONFIG_FS_FAT is not set -# CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set +# CONFIG_FS_TMPFS is not set # CONFIG_FS_SMARTFS is not set # CONFIG_FS_BINFS is not set # CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set # # System Logging @@ -707,6 +778,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -746,9 +821,14 @@ CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 # CONFIG_LIBC_PERROR_STDOUT is not set CONFIG_ARCH_LOWPUTC=y # CONFIG_LIBC_LOCALTIME is not set +# CONFIG_TIME_EXTENDED is not set CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set +CONFIG_LIBC_NETDB=y +# CONFIG_NETDB_DNSCLIENT is not set # # Non-standard Library Support @@ -771,23 +851,28 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_BUILTIN_PROXY_STACKSIZE=1024 +# +# CAN Utilities +# + # # Examples # # CONFIG_EXAMPLES_BUTTONS is not set -# CONFIG_EXAMPLES_CAN is not set +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_HELLOXX is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set # CONFIG_EXAMPLES_MOUNT is not set @@ -796,37 +881,47 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set -# CONFIG_EXAMPLES_NXFLAT is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set -# CONFIG_EXAMPLES_ROMFS is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set -# CONFIG_EXAMPLES_THTTPD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set +# CONFIG_EXAMPLES_UDPBLASTER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -838,41 +933,37 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set - -# -# Network Utilities -# - -# -# Networking Utilities -# -# CONFIG_NETUTILS_CODECS is not set -# CONFIG_NETUTILS_FTPC is not set -# CONFIG_NETUTILS_FTPD is not set -# CONFIG_NETUTILS_JSON is not set -# CONFIG_NETDB_DNSCLIENT is not set -# CONFIG_NETUTILS_SMTP is not set -# CONFIG_NETUTILS_TELNETD is not set -# CONFIG_NETUTILS_TFTPC is not set -# CONFIG_NETUTILS_THTTPD is not set -CONFIG_NETUTILS_NETLIB=y -# CONFIG_NETUTILS_WEBCLIENT is not set -# CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set -# CONFIG_NETUTILS_XMLRPC is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus # # CONFIG_MODBUS is not set +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set +# CONFIG_NETUTILS_SMTP is not set +# CONFIG_NETUTILS_TELNETD is not set +# CONFIG_NETUTILS_TFTPC is not set +# CONFIG_NETUTILS_WEBCLIENT is not set +# CONFIG_NETUTILS_WEBSERVER is not set +# CONFIG_NETUTILS_XMLRPC is not set + # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -892,13 +983,16 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set # CONFIG_NSH_DISABLE_CP is not set # CONFIG_NSH_DISABLE_CMP is not set +CONFIG_NSH_DISABLE_DATE=y # CONFIG_NSH_DISABLE_DD is not set # CONFIG_NSH_DISABLE_DF is not set # CONFIG_NSH_DISABLE_DELROUTE is not set +# CONFIG_NSH_DISABLE_DIRNAME is not set # CONFIG_NSH_DISABLE_ECHO is not set # CONFIG_NSH_DISABLE_EXEC is not set # CONFIG_NSH_DISABLE_EXIT is not set @@ -907,8 +1001,10 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_HELP is not set # CONFIG_NSH_DISABLE_HEXDUMP is not set # CONFIG_NSH_DISABLE_IFCONFIG is not set +CONFIG_NSH_DISABLE_IFUPDOWN=y # CONFIG_NSH_DISABLE_KILL is not set # CONFIG_NSH_DISABLE_LOSETUP is not set +CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_LS is not set # CONFIG_NSH_DISABLE_MB is not set # CONFIG_NSH_DISABLE_MKDIR is not set @@ -916,6 +1012,7 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_MKRD is not set # CONFIG_NSH_DISABLE_MH is not set # CONFIG_NSH_DISABLE_MOUNT is not set +# CONFIG_NSH_DISABLE_MV is not set # CONFIG_NSH_DISABLE_MW is not set # CONFIG_NSH_DISABLE_PS is not set # CONFIG_NSH_DISABLE_PUT is not set @@ -925,8 +1022,10 @@ CONFIG_NSH_BUILTIN_APPS=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set +# CONFIG_NSH_DISABLE_UNAME is not set # CONFIG_NSH_DISABLE_UNSET is not set # CONFIG_NSH_DISABLE_USLEEP is not set # CONFIG_NSH_DISABLE_WGET is not set @@ -953,11 +1052,11 @@ CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_CONSOLE=y # CONFIG_NSH_ALTCONDEV is not set CONFIG_NSH_ARCHINIT=y -CONFIG_LIB_BOARDCTL=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_MONITOR=y CONFIG_NSH_NETINIT_SIGNO=18 @@ -1006,6 +1105,8 @@ CONFIG_NSH_IPv6NETMASK_7=0xffff CONFIG_NSH_IPv6NETMASK_8=0xff80 # CONFIG_NSH_NOMAC is not set CONFIG_NSH_MAX_ROUNDTRIP=20 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # # NxWidgets/NxWM @@ -1019,39 +1120,11 @@ CONFIG_NSH_MAX_ROUNDTRIP=20 # # System Libraries and NSH Add-Ons # - -# -# Custom Free Memory Command -# -# CONFIG_SYSTEM_FREE is not set - -# -# EMACS-like Command Line Editor -# # CONFIG_SYSTEM_CLE is not set - -# -# CU Minimal Terminal -# # CONFIG_SYSTEM_CUTERM is not set - -# -# FLASH Program Installation -# -# CONFIG_SYSTEM_INSTALL is not set - -# -# FLASH Erase-all Command -# - -# -# Intel HEX to binary conversion -# +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set - -# -# I2C tool -# +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=6 CONFIG_I2CTOOL_MAXBUS=6 @@ -1059,88 +1132,16 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=400000 - -# -# INI File Parser -# -# CONFIG_FSUTILS_INIFILE is not set - -# -# NxPlayer media player library / command Line -# - -# -# RAM test -# +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_MDIO is not set +# CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set - -# -# readline() -# +CONFIG_READLINE_HAVE_EXTMATCH=y CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y - -# -# P-Code Support -# - -# -# PHY Tool -# -# CONFIG_SYSTEM_MDIO is not set - -# -# Power Off -# -# CONFIG_SYSTEM_POWEROFF is not set - -# -# RAMTRON -# - -# -# SD Card -# - -# -# Sudoku -# +# CONFIG_READLINE_TABCOMPLETION is not set +# CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set - -# -# Sysinfo -# - -# -# Temperature -# - -# -# VI Work-Alike Editor -# +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set - -# -# Stack Monitor -# - -# -# USB CDC/ACM Device Commands -# - -# -# USB Composite Device Commands -# - -# -# USB Mass Storage Device Commands -# - -# -# USB Monitor -# - -# -# Zmodem Commands -# # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/tm4c1294-launchpad/nsh/defconfig b/configs/tm4c1294-launchpad/nsh/defconfig index afd503223fc..00bf8e7e7c2 100644 --- a/configs/tm4c1294-launchpad/nsh/defconfig +++ b/configs/tm4c1294-launchpad/nsh/defconfig @@ -37,6 +37,7 @@ CONFIG_RAW_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_TIVA=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,8 +108,17 @@ CONFIG_ARCH_CORTEXM4=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="tiva" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set @@ -113,6 +126,8 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARCH_HAVE_DPFPU is not set # CONFIG_ARCH_FPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -122,6 +137,7 @@ CONFIG_ARCH_HAVE_FPU=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -267,6 +283,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -411,6 +428,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -426,9 +444,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -469,6 +488,7 @@ CONFIG_I2C=y # CONFIG_I2C_SLAVE is not set # CONFIG_I2C_POLLED is not set # CONFIG_I2C_TRACE is not set +CONFIG_I2C_DRIVER=y # CONFIG_SPI is not set # CONFIG_I2S is not set @@ -484,8 +504,22 @@ CONFIG_I2C=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -520,32 +554,28 @@ CONFIG_ARCH_PHY_INTERRUPT=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -754,6 +784,10 @@ CONFIG_MM_REGIONS=1 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -797,6 +831,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=8 @@ -834,17 +870,19 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -854,40 +892,47 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -899,8 +944,8 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -913,25 +958,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set # CONFIG_NETUTILS_DHCPC is not set # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -951,6 +998,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -992,6 +1040,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1024,6 +1073,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_MONITOR=y CONFIG_NSH_NETINIT_SIGNO=18 @@ -1055,6 +1105,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1069,11 +1121,11 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set CONFIG_SYSTEM_I2CTOOL=y CONFIG_I2CTOOL_MINBUS=6 CONFIG_I2CTOOL_MAXBUS=6 @@ -1081,8 +1133,8 @@ CONFIG_I2CTOOL_MINADDR=0x03 CONFIG_I2CTOOL_MAXADDR=0x77 CONFIG_I2CTOOL_MAXREGADDR=0xff CONFIG_I2CTOOL_DEFFREQ=400000 -# CONFIG_FSUTILS_INIFILE is not set -# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1090,7 +1142,7 @@ CONFIG_SYSTEM_READLINE=y CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set -# CONFIG_SYSTEM_MDIO is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/tm4c1294-launchpad/src/tm4c1294-launchpad.h b/configs/tm4c1294-launchpad/src/tm4c1294-launchpad.h index f18fa39eb1c..fb392a6c852 100644 --- a/configs/tm4c1294-launchpad/src/tm4c1294-launchpad.h +++ b/configs/tm4c1294-launchpad/src/tm4c1294-launchpad.h @@ -166,7 +166,7 @@ void tm4c_led_initialize(void); int tm4c_bringup(void); /**************************************************************************** - * Name: tiva_timer_initialize + * Name: tiva_timer_configure * * Description: * Configure the timer driver @@ -174,7 +174,7 @@ int tm4c_bringup(void); ****************************************************************************/ #ifdef CONFIG_TM4C1294_LAUNCHPAD_TIMER -int tiva_timer_initialize(void); +int tiva_timer_configure(void); #endif #endif /* __ASSEMBLY__ */ diff --git a/configs/tm4c1294-launchpad/src/tm4c_appinit.c b/configs/tm4c1294-launchpad/src/tm4c_appinit.c index c360d7f00cb..2245ac31e9e 100644 --- a/configs/tm4c1294-launchpad/src/tm4c_appinit.c +++ b/configs/tm4c1294-launchpad/src/tm4c_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/tm4c1294-launchpad/src/tm4c_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -43,10 +43,6 @@ #include "tm4c1294-launchpad.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -55,11 +51,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { /* If CONFIG_BOARD_INITIALIZE is selected then board initialization was * already performed in board_initialize. diff --git a/configs/tm4c1294-launchpad/src/tm4c_bringup.c b/configs/tm4c1294-launchpad/src/tm4c_bringup.c index da1778d0fda..a6608ff431a 100644 --- a/configs/tm4c1294-launchpad/src/tm4c_bringup.c +++ b/configs/tm4c1294-launchpad/src/tm4c_bringup.c @@ -161,7 +161,7 @@ int tm4c_bringup(void) #ifdef HAVE_TIMER /* Initialize the timer driver */ - ret = tiva_timer_initialize(); + ret = tiva_timer_configure(); if (ret < 0) { dbg("ERROR: Failed to initialize timer driver: %d\n", ret); diff --git a/configs/tm4c1294-launchpad/src/tm4c_ethernet.c b/configs/tm4c1294-launchpad/src/tm4c_ethernet.c index f668660342a..3b70b238532 100644 --- a/configs/tm4c1294-launchpad/src/tm4c_ethernet.c +++ b/configs/tm4c1294-launchpad/src/tm4c_ethernet.c @@ -87,7 +87,7 @@ void tiva_ethernetmac(struct ether_addr *ethaddr) nlldbg("user: %06x:%06x\n", user1 & 0x00ffffff, user0 & 0x00ffffff); DEBUGASSERT(user0 != 0xffffffff && user1 != 0xffffffff); - /* Re-format that MAC address the way that uIP expects to see it */ + /* Re-format that MAC address the way that the network expects to see it */ ethaddr->ether_addr_octet[0] = ((user0 >> 0) & 0xff); ethaddr->ether_addr_octet[1] = ((user0 >> 8) & 0xff); diff --git a/configs/tm4c1294-launchpad/src/tm4c_timer.c b/configs/tm4c1294-launchpad/src/tm4c_timer.c index 94f6ab0bb43..0d661307c39 100644 --- a/configs/tm4c1294-launchpad/src/tm4c_timer.c +++ b/configs/tm4c1294-launchpad/src/tm4c_timer.c @@ -90,14 +90,14 @@ ****************************************************************************/ /**************************************************************************** - * Name: tiva_timer_initialize + * Name: tiva_timer_configure * * Description: * Configure the timer driver * ****************************************************************************/ -int tiva_timer_initialize(void) +int tiva_timer_configure(void) { int ret; diff --git a/configs/twr-k60n512/nsh/defconfig b/configs/twr-k60n512/nsh/defconfig index a4110d0ccfa..ac65d4c0257 100644 --- a/configs/twr-k60n512/nsh/defconfig +++ b/configs/twr-k60n512/nsh/defconfig @@ -422,28 +422,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/twr-k60n512/src/k60_appinit.c b/configs/twr-k60n512/src/k60_appinit.c index 6c6795c2ad8..ffcb0b7f9f3 100644 --- a/configs/twr-k60n512/src/k60_appinit.c +++ b/configs/twr-k60n512/src/k60_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/twr-k60n512/src/k60_appinit.c * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -193,11 +193,28 @@ static int kinetis_cdinterrupt(int irq, FAR void *context) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef NSH_HAVEMMCSD int ret; diff --git a/configs/u-blox-c027/nsh/defconfig b/configs/u-blox-c027/nsh/defconfig index 51b5dc2e962..923f1c5046d 100644 --- a/configs/u-blox-c027/nsh/defconfig +++ b/configs/u-blox-c027/nsh/defconfig @@ -49,7 +49,6 @@ CONFIG_DEBUG=y # # Subsystem Debug Options # -# CONFIG_DEBUG_AUDIO is not set # CONFIG_DEBUG_BINFMT is not set # CONFIG_DEBUG_FS is not set # CONFIG_DEBUG_GRAPHICS is not set @@ -101,6 +100,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -119,6 +119,7 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set # CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set @@ -131,6 +132,7 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set # CONFIG_ARCH_CORTEXR4 is not set # CONFIG_ARCH_CORTEXR4F is not set # CONFIG_ARCH_CORTEXR5 is not set @@ -139,12 +141,15 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # CONFIG_DEBUG_HARDFAULT is not set @@ -156,6 +161,7 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set # CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -268,6 +274,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -486,12 +493,18 @@ CONFIG_DEV_ZERO=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support # # CONFIG_USERLED is not set +# CONFIG_RGBLED is not set # CONFIG_PCA9635PW is not set # CONFIG_MMCSD is not set CONFIG_MODEM=y @@ -562,32 +575,28 @@ CONFIG_ETH1_PHY_NONE=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -CONFIG_ARCH_HAVE_UART2=y -CONFIG_ARCH_HAVE_UART3=y -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +CONFIG_UART2_SERIALDRIVER=y +CONFIG_UART3_SERIALDRIVER=y +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -818,7 +827,9 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -861,6 +872,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -904,6 +919,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -955,15 +972,16 @@ CONFIG_EXAMPLES_CHAT_PRESET3="\"\" AT+USOWR=0,5,\\\"NuttX\\\" PAUSE 10 OK AT+USO # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -973,36 +991,37 @@ CONFIG_EXAMPLES_CHAT_PRESET3="\"\" AT+USOWR=0,5,\\\"NuttX\\\" PAUSE 10 OK AT+USO CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -CONFIG_EXAMPLES_PPPD=y # CONFIG_EXAMPLES_POSIXSPAWN is not set +CONFIG_EXAMPLES_PPPD=y +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # @@ -1011,6 +1030,11 @@ CONFIG_EXAMPLES_PPPD=y # CONFIG_FSUTILS_INIFILE is not set # CONFIG_FSUTILS_PASSWD is not set +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + # # Graphics Support # @@ -1022,8 +1046,8 @@ CONFIG_EXAMPLES_PPPD=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1037,23 +1061,24 @@ CONFIG_NETUTILS_CHAT=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +CONFIG_NETUTILS_PPPD=y +CONFIG_NETUTILS_PPPD_STACKSIZE=2048 +CONFIG_NETUTILS_PPPD_PAP=y # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/7.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -CONFIG_NETUTILS_PPPD=y -CONFIG_NETUTILS_PPPD_STACKSIZE=2048 -CONFIG_NETUTILS_PPPD_PAP=y # # NSH Library @@ -1079,6 +1104,7 @@ CONFIG_NSH_BUILTIN_APPS=y # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1156,6 +1182,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 @@ -1209,13 +1236,13 @@ CONFIG_NSH_LOGIN_FAILCOUNT=3 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set CONFIG_SYSTEM_CLE=y CONFIG_SYSTEM_CLE_DEBUGLEVEL=0 # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1224,10 +1251,10 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set CONFIG_SYSTEM_UBLOXMODEM=y CONFIG_SYSTEM_UBLOXMODEM_TTY_DEVNODE="/dev/ttyS1" CONFIG_SYSTEM_UBLOXMODEM_DEVNODE="/dev/ubxmdm" +# CONFIG_SYSTEM_VI is not set CONFIG_SYSTEM_ZMODEM=y CONFIG_SYSTEM_ZMODEM_DEVNAME="/dev/console" CONFIG_SYSTEM_ZMODEM_RCVBUFSIZE=512 diff --git a/configs/u-blox-c027/src/lpc17_appinit.c b/configs/u-blox-c027/src/lpc17_appinit.c index ce83755f4d3..f315953dfb9 100644 --- a/configs/u-blox-c027/src/lpc17_appinit.c +++ b/configs/u-blox-c027/src/lpc17_appinit.c @@ -126,11 +126,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret; diff --git a/configs/ubw32/nsh/defconfig b/configs/ubw32/nsh/defconfig index c97c791aa5c..b6ec91adbca 100644 --- a/configs/ubw32/nsh/defconfig +++ b/configs/ubw32/nsh/defconfig @@ -490,28 +490,28 @@ CONFIG_MMCSD_NSLOTS=1 CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/ubw32/src/pic32_appinit.c b/configs/ubw32/src/pic32_appinit.c index 612e3aa70f9..22cf57b4b00 100644 --- a/configs/ubw32/src/pic32_appinit.c +++ b/configs/ubw32/src/pic32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/ubw32/src/pic32_appinit.c * - * Copyright (C) 2012 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -89,11 +89,28 @@ static int nsh_usbdevinitialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { int ret; diff --git a/configs/us7032evb1/nsh/defconfig b/configs/us7032evb1/nsh/defconfig index 03a12a8a280..e18cd49cc8c 100644 --- a/configs/us7032evb1/nsh/defconfig +++ b/configs/us7032evb1/nsh/defconfig @@ -243,27 +243,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -CONFIG_ARCH_HAVE_SCI1=y -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +CONFIG_SCI1_SERIALDRIVER=y +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/us7032evb1/ostest/defconfig b/configs/us7032evb1/ostest/defconfig index ec108a9870e..7490f982d79 100644 --- a/configs/us7032evb1/ostest/defconfig +++ b/configs/us7032evb1/ostest/defconfig @@ -242,27 +242,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -CONFIG_ARCH_HAVE_SCI1=y -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +CONFIG_SCI1_SERIALDRIVER=y +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/viewtool-stm32f107/highpri/defconfig b/configs/viewtool-stm32f107/highpri/defconfig index ce65df1ebc1..0fcfc13a51b 100644 --- a/configs/viewtool-stm32f107/highpri/defconfig +++ b/configs/viewtool-stm32f107/highpri/defconfig @@ -251,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F103VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -421,13 +422,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -692,33 +697,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -972,6 +972,7 @@ CONFIG_ARCH_HAVE_TLS=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/viewtool-stm32f107/include/board-stm32f103vct6.h b/configs/viewtool-stm32f107/include/board-stm32f103vct6.h index 54731ecf726..a1e40a9bd26 100644 --- a/configs/viewtool-stm32f107/include/board-stm32f103vct6.h +++ b/configs/viewtool-stm32f107/include/board-stm32f103vct6.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/viewtool-stm32f107/include/board-stm32f103vct6.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -93,14 +93,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 * @@ -113,8 +113,14 @@ * otherwise frequency is 2xAPBx. * Note: TIM1,8 are on APB2, others on APB1 */ -#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY -#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM3_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM4_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM5_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM6_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM7_FREQUENCY STM32_HCLK_FREQUENCY +#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY /************************************************************************************ * Public Data diff --git a/configs/viewtool-stm32f107/include/board-stm32f107vct6.h b/configs/viewtool-stm32f107/include/board-stm32f107vct6.h index 1c200a133e8..7f5088f2c12 100644 --- a/configs/viewtool-stm32f107/include/board-stm32f107vct6.h +++ b/configs/viewtool-stm32f107/include/board-stm32f107vct6.h @@ -97,14 +97,14 @@ #define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 #define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2) -/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */ +/* APB1 timers 2-7 will be twice PCLK1 */ #define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY) #define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY) -#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY) +#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY) /* USB divider -- Divide PLL clock by 1.5 * diff --git a/configs/viewtool-stm32f107/include/board.h b/configs/viewtool-stm32f107/include/board.h index 242feeb67ae..2fea6a29dae 100644 --- a/configs/viewtool-stm32f107/include/board.h +++ b/configs/viewtool-stm32f107/include/board.h @@ -1,7 +1,7 @@ /************************************************************************************ * configs/viewtool-stm32f107/include/board.h * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without diff --git a/configs/viewtool-stm32f107/netnsh/defconfig b/configs/viewtool-stm32f107/netnsh/defconfig index b355d5ad913..13098391893 100644 --- a/configs/viewtool-stm32f107/netnsh/defconfig +++ b/configs/viewtool-stm32f107/netnsh/defconfig @@ -207,6 +207,7 @@ CONFIG_ARMV7M_HAVE_STACKCHECK=y # CONFIG_ARCH_CHIP_STM32F103VE is not set # CONFIG_ARCH_CHIP_STM32F103ZE is not set # CONFIG_ARCH_CHIP_STM32F105VB is not set +# CONFIG_ARCH_CHIP_STM32F105RB is not set CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F205RG is not set # CONFIG_ARCH_CHIP_STM32F207IG is not set @@ -251,6 +252,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -414,19 +416,35 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set # CONFIG_STM32_FORCEPOWER is not set # CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set + +# +# Timer Configuration +# # CONFIG_STM32_TIM1_CAP is not set # CONFIG_STM32_TIM3_CAP is not set # CONFIG_STM32_TIM4_CAP is not set # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # + +# +# U[S]ART Device Configuration +# +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set + +# +# Serial Driver Configuration +# # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -689,7 +707,12 @@ CONFIG_ARCH_HAVE_I2CRESET=y # CONFIG_BCH is not set # CONFIG_INPUT is not set # CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set # # LED Support @@ -751,33 +774,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -1077,14 +1095,15 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -1094,17 +1113,17 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024 CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set # CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set @@ -1112,8 +1131,8 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERIALRX is not set # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set -# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMART_TEST is not set # CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set @@ -1121,10 +1140,9 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_XMLRPC is not set # @@ -1147,8 +1165,8 @@ CONFIG_EXAMPLES_NSH=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1162,21 +1180,22 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_FTPD is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library @@ -1277,6 +1296,7 @@ CONFIG_NSH_CONSOLE=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y CONFIG_NSH_NETINIT_THREAD=y CONFIG_NSH_NETINIT_THREAD_STACKSIZE=1568 CONFIG_NSH_NETINIT_THREAD_PRIORITY=80 @@ -1324,12 +1344,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1338,6 +1358,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set -# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/viewtool-stm32f107/nsh/defconfig b/configs/viewtool-stm32f107/nsh/defconfig index ef29399bbb0..eac5f7d9147 100644 --- a/configs/viewtool-stm32f107/nsh/defconfig +++ b/configs/viewtool-stm32f107/nsh/defconfig @@ -251,6 +251,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y # CONFIG_ARCH_CHIP_STM32F373VC is not set # CONFIG_ARCH_CHIP_STM32F401RE is not set # CONFIG_ARCH_CHIP_STM32F411RE is not set +# CONFIG_ARCH_CHIP_STM32F411VE is not set # CONFIG_ARCH_CHIP_STM32F405RG is not set # CONFIG_ARCH_CHIP_STM32F405VG is not set # CONFIG_ARCH_CHIP_STM32F405ZG is not set @@ -419,13 +420,17 @@ CONFIG_STM32_JTAG_FULL_ENABLE=y # CONFIG_STM32_TIM5_CAP is not set # CONFIG_STM32_TIM8_CAP is not set CONFIG_STM32_USART=y +CONFIG_STM32_SERIALDRIVER=y # # U[S]ART Configuration # +CONFIG_STM32_USART1_SERIALDRIVER=y +# CONFIG_STM32_USART1_1WIREDRIVER is not set # CONFIG_USART1_RS485 is not set # CONFIG_SERIAL_DISABLE_REORDERING is not set # CONFIG_STM32_FLOWCONTROL_BROKEN is not set +# CONFIG_STM32_USART_BREAKS is not set # CONFIG_STM32_USART_SINGLEWIRE is not set CONFIG_STM32_HAVE_RTC_COUNTER=y # CONFIG_STM32_HAVE_RTC_SUBSECONDS is not set @@ -690,33 +695,28 @@ CONFIG_ARCH_HAVE_I2CRESET=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -# CONFIG_ARCH_HAVE_UART0 is not set -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -CONFIG_ARCH_HAVE_USART1=y -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# -CONFIG_USART1_ISUART=y +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +CONFIG_USART1_SERIALDRIVER=y +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_SERIAL_NPOLLWAITERS=2 @@ -976,6 +976,7 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_NETUTILS_CHAT is not set # CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set # CONFIG_NETUTILS_SMTP is not set diff --git a/configs/viewtool-stm32f107/src/stm32_appinit.c b/configs/viewtool-stm32f107/src/stm32_appinit.c index 5884d7d0531..8bc77a200c1 100644 --- a/configs/viewtool-stm32f107/src/stm32_appinit.c +++ b/configs/viewtool-stm32f107/src/stm32_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/viewtool-stm32f107/src/stm32_appinit.c * - * Copyright (C) 2013 Gregory Nutt. All rights reserved. + * Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -123,11 +123,28 @@ static int rtc_driver_initialize(void) * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef HAVE_RTC_DRIVER (void)rtc_driver_initialize(); diff --git a/configs/xtrs/nsh/defconfig b/configs/xtrs/nsh/defconfig index 79355d8226d..fed3d18a034 100644 --- a/configs/xtrs/nsh/defconfig +++ b/configs/xtrs/nsh/defconfig @@ -197,7 +197,7 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y +CONFIG_UART_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_UART_SERIAL_CONSOLE is not set diff --git a/configs/xtrs/ostest/defconfig b/configs/xtrs/ostest/defconfig index 5f79aab570c..d0f9abadd0d 100644 --- a/configs/xtrs/ostest/defconfig +++ b/configs/xtrs/ostest/defconfig @@ -196,7 +196,7 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y +CONFIG_UART_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_UART_SERIAL_CONSOLE=y diff --git a/configs/xtrs/pashello/defconfig b/configs/xtrs/pashello/defconfig index 1865c540b75..eeceb9e5829 100644 --- a/configs/xtrs/pashello/defconfig +++ b/configs/xtrs/pashello/defconfig @@ -197,7 +197,7 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y +CONFIG_UART_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_UART_SERIAL_CONSOLE=y # CONFIG_NO_SERIAL_CONSOLE is not set diff --git a/configs/z16f2800100zcog/nsh/defconfig b/configs/z16f2800100zcog/nsh/defconfig index 9f8dda80443..fe61c46aa11 100644 --- a/configs/z16f2800100zcog/nsh/defconfig +++ b/configs/z16f2800100zcog/nsh/defconfig @@ -299,27 +299,27 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/z16f2800100zcog/ostest/defconfig b/configs/z16f2800100zcog/ostest/defconfig index 219c0a203d3..6ee164a4eaf 100644 --- a/configs/z16f2800100zcog/ostest/defconfig +++ b/configs/z16f2800100zcog/ostest/defconfig @@ -257,8 +257,8 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y # # USART Configuration diff --git a/configs/z16f2800100zcog/pashello/defconfig b/configs/z16f2800100zcog/pashello/defconfig index 34e162a24df..3d4744e0908 100644 --- a/configs/z16f2800100zcog/pashello/defconfig +++ b/configs/z16f2800100zcog/pashello/defconfig @@ -220,8 +220,8 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_UART0_SERIAL_CONSOLE=y diff --git a/configs/z80sim/nsh/defconfig b/configs/z80sim/nsh/defconfig index 347d7f9cd77..ab5c5da665c 100644 --- a/configs/z80sim/nsh/defconfig +++ b/configs/z80sim/nsh/defconfig @@ -197,7 +197,7 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y +CONFIG_UART_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_UART_SERIAL_CONSOLE is not set diff --git a/configs/z80sim/ostest/defconfig b/configs/z80sim/ostest/defconfig index 36ed405f12f..dc0a04bc13f 100644 --- a/configs/z80sim/ostest/defconfig +++ b/configs/z80sim/ostest/defconfig @@ -196,7 +196,7 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y +CONFIG_UART_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y CONFIG_UART_SERIAL_CONSOLE=y diff --git a/configs/z80sim/pashello/defconfig b/configs/z80sim/pashello/defconfig index 9a049337cde..4a702c26389 100644 --- a/configs/z80sim/pashello/defconfig +++ b/configs/z80sim/pashello/defconfig @@ -196,7 +196,7 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -CONFIG_ARCH_HAVE_UART=y +CONFIG_UART_SERIALDRIVER=y CONFIG_MCU_SERIAL=y CONFIG_UART_SERIAL_CONSOLE=y # CONFIG_NO_SERIAL_CONSOLE is not set diff --git a/configs/z8encore000zco/ostest/defconfig b/configs/z8encore000zco/ostest/defconfig index 5625226e181..aa8fc953588 100644 --- a/configs/z8encore000zco/ostest/defconfig +++ b/configs/z8encore000zco/ostest/defconfig @@ -359,28 +359,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/z8f64200100kit/ostest/defconfig b/configs/z8f64200100kit/ostest/defconfig index ed522a5bb1d..df99499d711 100644 --- a/configs/z8f64200100kit/ostest/defconfig +++ b/configs/z8f64200100kit/ostest/defconfig @@ -359,28 +359,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/zkit-arm-1769/hello/defconfig b/configs/zkit-arm-1769/hello/defconfig index 17c6a81fc97..4cbbb539541 100644 --- a/configs/zkit-arm-1769/hello/defconfig +++ b/configs/zkit-arm-1769/hello/defconfig @@ -458,28 +458,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/zkit-arm-1769/nsh/defconfig b/configs/zkit-arm-1769/nsh/defconfig index d3a2937712f..05e99cc696b 100644 --- a/configs/zkit-arm-1769/nsh/defconfig +++ b/configs/zkit-arm-1769/nsh/defconfig @@ -37,6 +37,7 @@ CONFIG_INTELHEX_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -121,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -226,6 +242,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -277,6 +294,7 @@ CONFIG_RAM_SIZE=32768 # # CONFIG_ARCH_BOARD_LPCXPRESSO is not set # CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set CONFIG_ARCH_BOARD_ZKITARM=y # CONFIG_ARCH_BOARD_CUSTOM is not set CONFIG_ARCH_BOARD="zkit-arm-1769" @@ -372,6 +390,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -387,9 +406,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -433,6 +453,8 @@ CONFIG_SPI=y # CONFIG_SPI_CMDDATA is not set # CONFIG_SPI_CALLBACK is not set # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -446,7 +468,20 @@ CONFIG_SPI=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# # CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -458,6 +493,7 @@ CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -510,32 +546,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -713,7 +745,9 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FAT_MAXFNAME=32 # CONFIG_FS_FATTIME is not set +# CONFIG_FAT_FORCE_INDIRECT is not set # CONFIG_FAT_DMAMEMORY is not set +# CONFIG_FAT_DIRECT_RETRY is not set # CONFIG_NFS is not set # CONFIG_FS_NXFFS is not set # CONFIG_FS_ROMFS is not set @@ -746,6 +780,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -791,6 +829,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y # CONFIG_NETDB_HOSTFILE is not set CONFIG_NETDB_DNSCLIENT=y @@ -798,6 +838,7 @@ CONFIG_NETDB_DNSCLIENT_ENTRIES=8 CONFIG_NETDB_DNSCLIENT_NAMESIZE=32 CONFIG_NETDB_DNSCLIENT_LIFESEC=3600 CONFIG_NETDB_DNSCLIENT_MAXRESPONSE=96 +# CONFIG_NETDB_RESOLVCONF is not set CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_NETDB_DNSSERVER_IPv4 is not set @@ -824,18 +865,20 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FSTEST is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set # CONFIG_EXAMPLES_MODBUS is not set @@ -845,18 +888,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -864,22 +908,29 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set +# CONFIG_FSUTILS_PASSWD is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -892,8 +943,8 @@ CONFIG_EXAMPLES_NSH=y # # CONFIG_INTERPRETERS_BAS is not set # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -906,25 +957,27 @@ CONFIG_EXAMPLES_NSH=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -943,6 +996,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -985,6 +1039,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1017,6 +1072,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1046,6 +1102,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1060,13 +1118,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1075,5 +1132,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/zkit-arm-1769/nxhello/defconfig b/configs/zkit-arm-1769/nxhello/defconfig index 9bff2a9046b..afb737eae7e 100644 --- a/configs/zkit-arm-1769/nxhello/defconfig +++ b/configs/zkit-arm-1769/nxhello/defconfig @@ -37,6 +37,7 @@ CONFIG_INTELHEX_BINARY=y # CONFIG_ARCH_MATH_H is not set # CONFIG_ARCH_FLOAT_H is not set # CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set # # Debug Options @@ -75,6 +76,7 @@ CONFIG_ARCH="arm" # CONFIG_ARCH_CHIP_DM320 is not set # CONFIG_ARCH_CHIP_EFM32 is not set # CONFIG_ARCH_CHIP_IMX1 is not set +# CONFIG_ARCH_CHIP_IMX6 is not set # CONFIG_ARCH_CHIP_KINETIS is not set # CONFIG_ARCH_CHIP_KL is not set # CONFIG_ARCH_CHIP_LM is not set @@ -93,7 +95,9 @@ CONFIG_ARCH_CHIP_LPC17XX=y # CONFIG_ARCH_CHIP_SAMV7 is not set # CONFIG_ARCH_CHIP_STM32 is not set # CONFIG_ARCH_CHIP_STM32F7 is not set +# CONFIG_ARCH_CHIP_STM32L4 is not set # CONFIG_ARCH_CHIP_STR71X is not set +# CONFIG_ARCH_CHIP_TMS570 is not set # CONFIG_ARCH_CHIP_MOXART is not set # CONFIG_ARCH_ARM7TDMI is not set # CONFIG_ARCH_ARM926EJS is not set @@ -104,14 +108,25 @@ CONFIG_ARCH_CORTEXM3=y # CONFIG_ARCH_CORTEXM7 is not set # CONFIG_ARCH_CORTEXA5 is not set # CONFIG_ARCH_CORTEXA8 is not set +# CONFIG_ARCH_CORTEXA9 is not set +# CONFIG_ARCH_CORTEXR4 is not set +# CONFIG_ARCH_CORTEXR4F is not set +# CONFIG_ARCH_CORTEXR5 is not set +# CONFIG_ARCH_CORTEX5F is not set +# CONFIG_ARCH_CORTEXR7 is not set +# CONFIG_ARCH_CORTEXR7F is not set CONFIG_ARCH_FAMILY="armv7-m" CONFIG_ARCH_CHIP="lpc17xx" +# CONFIG_ARM_TOOLCHAIN_IAR is not set +CONFIG_ARM_TOOLCHAIN_GNU=y # CONFIG_ARMV7M_USEBASEPRI is not set CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_CMNVECTOR is not set # CONFIG_ARMV7M_LAZYFPU is not set # CONFIG_ARCH_HAVE_FPU is not set # CONFIG_ARCH_HAVE_DPFPU is not set +# CONFIG_ARCH_HAVE_TRUSTZONE is not set +CONFIG_ARM_HAVE_MPU_UNIFIED=y # CONFIG_ARM_MPU is not set # @@ -121,6 +136,7 @@ CONFIG_ARCH_HAVE_CMNVECTOR=y # CONFIG_ARMV7M_HAVE_DCACHE is not set # CONFIG_ARMV7M_HAVE_ITCM is not set # CONFIG_ARMV7M_HAVE_DTCM is not set +# CONFIG_ARMV7M_TOOLCHAIN_IARL is not set CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT=y # CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set # CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set @@ -226,6 +242,7 @@ CONFIG_ARCH_HAVE_IRQPRIO=y # CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set # CONFIG_ARCH_HAVE_ADDRENV is not set # CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set CONFIG_ARCH_HAVE_VFORK=y # CONFIG_ARCH_HAVE_MMU is not set CONFIG_ARCH_HAVE_MPU=y @@ -277,6 +294,7 @@ CONFIG_RAM_SIZE=32768 # # CONFIG_ARCH_BOARD_LPCXPRESSO is not set # CONFIG_ARCH_BOARD_MBED is not set +# CONFIG_ARCH_BOARD_U_BLOX_C027 is not set CONFIG_ARCH_BOARD_ZKITARM=y # CONFIG_ARCH_BOARD_CUSTOM is not set CONFIG_ARCH_BOARD="zkit-arm-1769" @@ -372,6 +390,7 @@ CONFIG_NAME_MAX=32 # CONFIG_SCHED_STARTHOOK is not set # CONFIG_SCHED_ATEXIT is not set # CONFIG_SCHED_ONEXIT is not set +# CONFIG_SIG_EVTHREAD is not set # # Signal Numbers @@ -387,9 +406,10 @@ CONFIG_SIG_SIGWORK=17 # CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_MQ_MAXMSGSIZE=32 +# CONFIG_MODULE is not set # -# Work Queue Support +# Work queue support # CONFIG_SCHED_WORKQUEUE=y CONFIG_SCHED_HPWORK=y @@ -433,6 +453,8 @@ CONFIG_SPI=y CONFIG_SPI_CMDDATA=y # CONFIG_SPI_CALLBACK is not set # CONFIG_SPI_BITBANG is not set +# CONFIG_SPI_HWFEATURES is not set +# CONFIG_SPI_CRCGENERATION is not set # CONFIG_I2S is not set # @@ -446,10 +468,15 @@ CONFIG_SPI_CMDDATA=y # CONFIG_VIDEO_DEVICES is not set # CONFIG_BCH is not set # CONFIG_INPUT is not set +# CONFIG_IOEXPANDER is not set + +# +# LCD Driver Support +# CONFIG_LCD=y # -# Common LCD Settings +# Common Graphic LCD Settings # # CONFIG_LCD_CONSOLE is not set # CONFIG_LCD_NOGETRUN is not set @@ -484,11 +511,14 @@ CONFIG_LCD_LANDSCAPE=y # CONFIG_LCD_RLANDSCAPE is not set # CONFIG_LCD_ILI9341 is not set # CONFIG_LCD_RA8875 is not set +# CONFIG_SLCD is not set # -# Alphanumeric/Segment LCD Devices +# LED Support # -# CONFIG_LCD_LCD1602 is not set +# CONFIG_USERLED is not set +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set CONFIG_MMCSD=y CONFIG_MMCSD_NSLOTS=1 # CONFIG_MMCSD_READONLY is not set @@ -500,6 +530,7 @@ CONFIG_MMCSD_SPICLOCK=12500000 CONFIG_MMCSD_SPIMODE=0 # CONFIG_ARCH_HAVE_SDIO is not set # CONFIG_ARCH_HAVE_SDIOWAIT_WRCOMPLETE is not set +# CONFIG_MODEM is not set # CONFIG_MTD is not set # CONFIG_EEPROM is not set CONFIG_NETDEVICES=y @@ -552,32 +583,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set - -# -# USART Configuration -# +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set CONFIG_MCU_SERIAL=y CONFIG_STANDARD_SERIAL=y # CONFIG_SERIAL_IFLOWCONTROL is not set @@ -773,6 +800,7 @@ CONFIG_NX_LCDDRIVER=y CONFIG_NX_NPLANES=1 CONFIG_NX_BGCOLOR=0x0 # CONFIG_NX_WRITEONLY is not set +# CONFIG_NX_UPDATE is not set # # Supported Pixel Depths @@ -871,6 +899,10 @@ CONFIG_MM_REGIONS=2 # # CONFIG_AUDIO is not set +# +# Wireless Support +# + # # Binary Loader # @@ -914,6 +946,8 @@ CONFIG_ARCH_LOWPUTC=y CONFIG_LIB_SENDFILE_BUFSIZE=512 # CONFIG_ARCH_ROMGETC is not set # CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +CONFIG_ARCH_HAVE_TLS=y +# CONFIG_TLS is not set CONFIG_LIBC_NETDB=y CONFIG_NETDB_DNSCLIENT=y CONFIG_NETDB_DNSCLIENT_ENTRIES=8 @@ -946,17 +980,19 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # # Examples # +# CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_CPUHOG is not set # CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_DISCOVER is not set # CONFIG_EXAMPLES_ELF is not set # CONFIG_EXAMPLES_FTPC is not set # CONFIG_EXAMPLES_FTPD is not set # CONFIG_EXAMPLES_HELLO is not set -# CONFIG_EXAMPLES_JSON is not set # CONFIG_EXAMPLES_HIDKBD is not set -# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set # CONFIG_EXAMPLES_LCDRW is not set # CONFIG_EXAMPLES_MEDIA is not set # CONFIG_EXAMPLES_MM is not set @@ -967,7 +1003,6 @@ CONFIG_NETDB_DNSSERVER_NOADDR=y # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set # CONFIG_EXAMPLES_NX is not set -# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXFFS is not set CONFIG_EXAMPLES_NXHELLO=y CONFIG_EXAMPLES_NXHELLO_VPLANE=0 @@ -988,13 +1023,15 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y # CONFIG_EXAMPLES_NXHELLO_EXTERNINIT is not set # CONFIG_EXAMPLES_NXIMAGE is not set # CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set # CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set # CONFIG_EXAMPLES_PIPE is not set # CONFIG_EXAMPLES_POLL is not set -# CONFIG_EXAMPLES_PPPD is not set # CONFIG_EXAMPLES_POSIXSPAWN is not set -# CONFIG_EXAMPLES_QENCODER is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RGBLED is not set # CONFIG_EXAMPLES_RGMP is not set # CONFIG_EXAMPLES_SENDMAIL is not set # CONFIG_EXAMPLES_SERIALBLASTER is not set @@ -1002,22 +1039,28 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y # CONFIG_EXAMPLES_SERLOOP is not set # CONFIG_EXAMPLES_SLCD is not set # CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set # CONFIG_EXAMPLES_TCPECHO is not set # CONFIG_EXAMPLES_TELNETD is not set # CONFIG_EXAMPLES_TIFF is not set # CONFIG_EXAMPLES_TOUCHSCREEN is not set # CONFIG_EXAMPLES_UDP is not set # CONFIG_EXAMPLES_UDPBLASTER is not set -# CONFIG_EXAMPLES_DISCOVER is not set -# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_USBSERIAL is not set # CONFIG_EXAMPLES_USBTERM is not set # CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set # CONFIG_EXAMPLES_WGET is not set # # File System Utilities # +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set # # Graphics Support @@ -1029,8 +1072,8 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y # Interpreters # # CONFIG_INTERPRETERS_FICL is not set -# CONFIG_INTERPRETERS_PCODE is not set # CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_PCODE is not set # # FreeModBus @@ -1043,25 +1086,27 @@ CONFIG_EXAMPLES_NXHELLO_DEFAULT_FONT=y # CONFIG_NETUTILS_CODECS is not set CONFIG_NETUTILS_DHCPC=y # CONFIG_NETUTILS_DHCPD is not set +# CONFIG_NETUTILS_DISCOVER is not set +# CONFIG_NETUTILS_ESP8266 is not set # CONFIG_NETUTILS_FTPC is not set # CONFIG_NETUTILS_JSON is not set +CONFIG_NETUTILS_NETLIB=y +# CONFIG_NETUTILS_NTPCLIENT is not set +# CONFIG_NETUTILS_PPPD is not set # CONFIG_NETUTILS_SMTP is not set CONFIG_NETUTILS_TELNETD=y CONFIG_NETUTILS_TFTPC=y -CONFIG_NETUTILS_NETLIB=y CONFIG_NETUTILS_WEBCLIENT=y CONFIG_NSH_WGET_USERAGENT="NuttX/6.xx.x (; http://www.nuttx.org/)" CONFIG_WEBCLIENT_TIMEOUT=10 # CONFIG_NETUTILS_WEBSERVER is not set -# CONFIG_NETUTILS_NTPCLIENT is not set -# CONFIG_NETUTILS_DISCOVER is not set # CONFIG_NETUTILS_XMLRPC is not set -# CONFIG_NETUTILS_PPPD is not set # # NSH Library # CONFIG_NSH_LIBRARY=y +# CONFIG_NSH_MOTD is not set # # Command Line Configuration @@ -1080,6 +1125,7 @@ CONFIG_NSH_NESTDEPTH=3 # Disable Individual commands # # CONFIG_NSH_DISABLE_ADDROUTE is not set +# CONFIG_NSH_DISABLE_ARP is not set # CONFIG_NSH_DISABLE_BASENAME is not set # CONFIG_NSH_DISABLE_CAT is not set # CONFIG_NSH_DISABLE_CD is not set @@ -1121,6 +1167,7 @@ CONFIG_NSH_DISABLE_LOSMART=y # CONFIG_NSH_DISABLE_SET is not set # CONFIG_NSH_DISABLE_SH is not set # CONFIG_NSH_DISABLE_SLEEP is not set +# CONFIG_NSH_DISABLE_TIME is not set # CONFIG_NSH_DISABLE_TEST is not set # CONFIG_NSH_DISABLE_UMOUNT is not set # CONFIG_NSH_DISABLE_UNAME is not set @@ -1153,6 +1200,7 @@ CONFIG_NSH_ARCHINIT=y # # Networking Configuration # +CONFIG_NSH_NETINIT=y # CONFIG_NSH_NETINIT_THREAD is not set # @@ -1182,6 +1230,8 @@ CONFIG_NSH_TELNETD_DAEMONSTACKSIZE=2048 CONFIG_NSH_TELNETD_CLIENTPRIO=100 CONFIG_NSH_TELNETD_CLIENTSTACKSIZE=2048 CONFIG_NSH_IOBUFFER_SIZE=512 +# CONFIG_NSH_LOGIN is not set +# CONFIG_NSH_CONSOLE_LOGIN is not set # CONFIG_NSH_TELNET_LOGIN is not set # @@ -1196,13 +1246,12 @@ CONFIG_NSH_IOBUFFER_SIZE=512 # # System Libraries and NSH Add-Ons # -# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_CLE is not set # CONFIG_SYSTEM_CUTERM is not set -# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_FREE is not set # CONFIG_SYSTEM_HEX2BIN is not set -# CONFIG_FSUTILS_INIFILE is not set # CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set # CONFIG_SYSTEM_NETDB is not set # CONFIG_SYSTEM_RAMTEST is not set CONFIG_READLINE_HAVE_EXTMATCH=y @@ -1211,5 +1260,6 @@ CONFIG_READLINE_ECHO=y # CONFIG_READLINE_TABCOMPLETION is not set # CONFIG_READLINE_CMD_HISTORY is not set # CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set # CONFIG_SYSTEM_VI is not set # CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/zkit-arm-1769/src/lpc17_appinit.c b/configs/zkit-arm-1769/src/lpc17_appinit.c index e9d9c1baa12..9817d76c336 100644 --- a/configs/zkit-arm-1769/src/lpc17_appinit.c +++ b/configs/zkit-arm-1769/src/lpc17_appinit.c @@ -129,14 +129,6 @@ # endif #endif -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -145,11 +137,28 @@ * Name: board_app_initialize * * Description: - * Perform architecture specific initialization + * Perform application specific initialization. This function is never + * called directly from application code, but only indirectly via the + * (non-standard) boardctl() interface using the command BOARDIOC_INIT. + * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { #ifdef CONFIG_NSH_HAVEMMCSD FAR struct spi_dev_s *spi; diff --git a/configs/zkit-arm-1769/thttpd/defconfig b/configs/zkit-arm-1769/thttpd/defconfig index 958ac134e92..5f7f9ab01a8 100644 --- a/configs/zkit-arm-1769/thttpd/defconfig +++ b/configs/zkit-arm-1769/thttpd/defconfig @@ -457,28 +457,28 @@ CONFIG_ETH0_PHY_DP83848C=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -# CONFIG_ARCH_HAVE_UART1 is not set -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/zp214xpa/nsh/defconfig b/configs/zp214xpa/nsh/defconfig index cec8851c194..1fa5f238cc5 100644 --- a/configs/zp214xpa/nsh/defconfig +++ b/configs/zp214xpa/nsh/defconfig @@ -364,28 +364,28 @@ CONFIG_DEV_NULL=y CONFIG_SERIAL=y # CONFIG_DEV_LOWCONSOLE is not set # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/zp214xpa/nxlines/defconfig b/configs/zp214xpa/nxlines/defconfig index 8dab6945300..580c2a8070c 100644 --- a/configs/zp214xpa/nxlines/defconfig +++ b/configs/zp214xpa/nxlines/defconfig @@ -403,28 +403,28 @@ CONFIG_LCD_LANDSCAPE=y CONFIG_SERIAL=y CONFIG_DEV_LOWCONSOLE=y # CONFIG_16550_UART is not set -# CONFIG_ARCH_HAVE_UART is not set -CONFIG_ARCH_HAVE_UART0=y -CONFIG_ARCH_HAVE_UART1=y -# CONFIG_ARCH_HAVE_UART2 is not set -# CONFIG_ARCH_HAVE_UART3 is not set -# CONFIG_ARCH_HAVE_UART4 is not set -# CONFIG_ARCH_HAVE_UART5 is not set -# CONFIG_ARCH_HAVE_UART6 is not set -# CONFIG_ARCH_HAVE_UART7 is not set -# CONFIG_ARCH_HAVE_UART8 is not set -# CONFIG_ARCH_HAVE_SCI0 is not set -# CONFIG_ARCH_HAVE_SCI1 is not set -# CONFIG_ARCH_HAVE_USART0 is not set -# CONFIG_ARCH_HAVE_USART1 is not set -# CONFIG_ARCH_HAVE_USART2 is not set -# CONFIG_ARCH_HAVE_USART3 is not set -# CONFIG_ARCH_HAVE_USART4 is not set -# CONFIG_ARCH_HAVE_USART5 is not set -# CONFIG_ARCH_HAVE_USART6 is not set -# CONFIG_ARCH_HAVE_USART7 is not set -# CONFIG_ARCH_HAVE_USART8 is not set -# CONFIG_ARCH_HAVE_OTHER_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +CONFIG_UART0_SERIALDRIVER=y +CONFIG_UART1_SERIALDRIVER=y +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set # # USART Configuration diff --git a/configs/zp214xpa/src/lpc2148_appinit.c b/configs/zp214xpa/src/lpc2148_appinit.c index ae403949bc1..b5efe183443 100644 --- a/configs/zp214xpa/src/lpc2148_appinit.c +++ b/configs/zp214xpa/src/lpc2148_appinit.c @@ -1,7 +1,7 @@ /**************************************************************************** * config/zp214xpa/src/lpc2148_appinit.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -56,9 +56,24 @@ * called directly from application code, but only indirectly via the * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void) +int board_app_initialize(uintptr_t arg) { return OK; } diff --git a/drivers/Kconfig b/drivers/Kconfig index 31c5b1e7a82..df45c0d1722 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -373,22 +373,7 @@ if IOEXPANDER source drivers/ioexpander/Kconfig endif # IOEXPANDER -menuconfig LCD - bool "LCD Driver Support" - default n - select NX_LCDDRIVER - ---help--- - Drivers for parallel and serial LCD and OLED type devices. These - drivers support interfaces as defined in include/nuttx/lcd/lcd.h - - This selection is necessary to enable support for LCD drivers in - drivers/lcd as well as for board-specific LCD drivers in the configs/ - subdirectories. - -if LCD source drivers/lcd/Kconfig -endif # LCD - source drivers/leds/Kconfig menuconfig MMCSD diff --git a/drivers/analog/Kconfig b/drivers/analog/Kconfig index bc054804224..20d99f8acb4 100644 --- a/drivers/analog/Kconfig +++ b/drivers/analog/Kconfig @@ -11,6 +11,16 @@ config ADC not only Analog-to-Digital Converters (ADC) but also amplifiers and analog multiplexers. + This selection enables: + + - The upper half, device-independent ADC character driver, and + - Selection of common lower half ADC drivers. + + MCU-specific, lower half drivers may be selected independently of + CONFIG_ADC. However, if CONFIG_ADC is selected, then it is assume + that lower half ADC drivers will be used only with the commoun ADC + upper half driver. + if ADC config ADC_FIFOSIZE @@ -46,6 +56,7 @@ config ADC_ADS125X bool "TI ADS1255/ADS1256 support" default n select SPI + select SCHED_HPWORK if ADC_ADS125X diff --git a/drivers/analog/ad5410.c b/drivers/analog/ad5410.c index 33da3c76615..58db6a7ceaf 100644 --- a/drivers/analog/ad5410.c +++ b/drivers/analog/ad5410.c @@ -1,9 +1,10 @@ /************************************************************************************ * arch/drivers/analog/ad5410.c * + * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2011 Li Zhuoyi. All rights reserved. * Author: Li Zhuoyi - * History: 0.1 2011-08-05 initial version + * Gregory Nutt * * This file is a part of NuttX: * @@ -85,6 +86,9 @@ struct up_dev_s * ad_private Function Prototypes ****************************************************************************/ +static void dac_lock(FAR struct spi_dev_s *spi); +static void dac_unlock(FAR struct spi_dev_s *spi); + /* DAC methods */ static void dac_reset(FAR struct dac_dev_s *dev); @@ -121,64 +125,136 @@ static struct dac_dev_s g_dacdev = * ad_private Functions ****************************************************************************/ -/* Reset the DAC device. Called early to initialize the hardware. This - * is called, before ao_setup() and on error conditions. - */ +/**************************************************************************** + * Name: dac_lock + * + * Description: + * Lock and configure the SPI bus. + * + ****************************************************************************/ + +static void dac_lock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, true); + SPI_SETMODE(spi, SPIDEV_MODE0); + SPI_SETBITS(spi, 8); + (void)SPI_HWFEATURES(spi, 0); + SPI_SETFREQUENCY(spi, 400000); +} + +/**************************************************************************** + * Name: dac_unlock + * + * Description: + * Unlock the SPI bus. + * + ****************************************************************************/ + +static void dac_unlock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, false); +} + +/**************************************************************************** + * Name: dac_reset + * + * Description: + * Reset the DAC device. Called early to initialize the hardware. This + * is called, before ao_setup() and on error conditions. + * + ****************************************************************************/ static void dac_reset(FAR struct dac_dev_s *dev) { } -/* Configure the DAC. This method is called the first time that the DAC - * device is opened. This will occur when the port is first opened. - * This setup includes configuring and attaching DAC interrupts. Interrupts - * are all disabled upon return. - */ +/**************************************************************************** + * Name: dac_setup + * + * Description: + * Configure the DAC. This method is called the first time that the DAC + * device is opened. This will occur when the port is first opened. + * This setup includes configuring and attaching DAC interrupts. Interrupts + * are all disabled upon return. + * + ****************************************************************************/ static int dac_setup(FAR struct dac_dev_s *dev) { FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv; FAR struct spi_dev_s *spi = priv->spi; + dac_lock(spi); + SPI_SELECT(spi, priv->devno, true); SPI_SEND(spi, AD5410_REG_CMD); SPI_SEND(spi, (AD5410_CMD_OUTEN | AD5410_CMD_420MA) >> 8); SPI_SEND(spi, AD5410_CMD_OUTEN | AD5410_CMD_420MA); SPI_SELECT(spi, priv->devno, false); + + dac_unlock(spi); return OK; } -/* Disable the DAC. This method is called when the DAC device is closed. - * This method reverses the operation the setup method. - */ +/**************************************************************************** + * Name: dac_shutdown + * + * Description: + * Disable the DAC. This method is called when the DAC device is closed. + * This method reverses the operation the setup method. + * + ****************************************************************************/ static void dac_shutdown(FAR struct dac_dev_s *dev) { } -/* Call to enable or disable TX interrupts */ +/**************************************************************************** + * Name: dac_txint + * + * Description: + * Call to enable or disable TX interrupts + * + ****************************************************************************/ static void dac_txint(FAR struct dac_dev_s *dev, bool enable) { } -static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg) +/**************************************************************************** + * Name: dac_send + * + * Description: + * + ****************************************************************************/ + +static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg) { FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv; FAR struct spi_dev_s *spi = priv->spi; + dac_lock(spi); + SPI_SELECT(spi, priv->devno, true); SPI_SEND(spi, AD5410_REG_WR); SPI_SEND(spi, (uint8_t)(msg->am_data >> 24)); SPI_SEND(spi, (uint8_t)(msg->am_data >> 16)); SPI_SELECT(spi, priv->devno, false); + + dac_unlock(spi); dac_txdone(&g_dacdev); return 0; } -/* All ioctl calls will be routed through this method */ +/**************************************************************************** + * Name: dac_ioctl + * + * Description: + * All ioctl calls will be routed through this method + * + ****************************************************************************/ -static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg) +static int dac_ioctl(FAR struct dac_dev_s *dev, int cmd, unsigned long arg) { dbg("Fix me:Not Implemented\n"); return 0; diff --git a/drivers/analog/adc.c b/drivers/analog/adc.c index ff6031ee68a..3dc8a4e42c9 100644 --- a/drivers/analog/adc.c +++ b/drivers/analog/adc.c @@ -1,9 +1,10 @@ /**************************************************************************** * drivers/analog/adc.c * + * Copyright (C) 2008-2009, 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2011 Li Zhuoyi. All rights reserved. * Author: Li Zhuoyi - * History: 0.1 2011-08-04 initial version + * Gregory Nutt * * Derived from drivers/can.c * @@ -70,12 +71,14 @@ static int adc_close(FAR struct file *filep); static ssize_t adc_read(FAR struct file *fielp, FAR char *buffer, size_t buflen); static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg); +static int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, + int32_t data); /**************************************************************************** * Private Data ****************************************************************************/ -static const struct file_operations adc_fops = +static const struct file_operations g_adc_fops = { adc_open, /* open */ adc_close, /* close */ @@ -88,6 +91,11 @@ static const struct file_operations adc_fops = #endif }; +static const struct adc_callback_s g_adc_callback = +{ + adc_receive /* au_receive */ +}; + /**************************************************************************** * Private Functions ****************************************************************************/ @@ -361,15 +369,11 @@ static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg) return ret; } -/**************************************************************************** - * Public Functions - ****************************************************************************/ - /**************************************************************************** * Name: adc_receive ****************************************************************************/ -int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data) +static int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data) { FAR struct adc_fifo_s *fifo = &dev->ad_recv; int nexttail; @@ -408,12 +412,30 @@ int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data) return err; } +/**************************************************************************** + * Public Functions + ****************************************************************************/ + /**************************************************************************** * Name: adc_register ****************************************************************************/ int adc_register(FAR const char *path, FAR struct adc_dev_s *dev) { + int ret; + + DEBUGASSERT(path != NULL && dev != NULL); + + /* Bind the upper-half callbacks to the lower half ADC driver */ + + DEBUGASSERT(dev->ad_ops != NULL && dev->ad_ops->ao_bind != NULL); + ret = dev->ad_ops->ao_bind(dev, &g_adc_callback); + if (ret < 0) + { + adbg("ERROR: Failed to bind callbacks: %d\n", ret); + return ret; + } + /* Initialize the ADC device structure */ dev->ad_ocount = 0; @@ -421,7 +443,19 @@ int adc_register(FAR const char *path, FAR struct adc_dev_s *dev) sem_init(&dev->ad_recv.af_sem, 0, 0); sem_init(&dev->ad_closesem, 0, 1); + /* Reset the ADC hardware */ + + DEBUGASSERT(dev->ad_ops->ao_reset != NULL); dev->ad_ops->ao_reset(dev); - return register_driver(path, &adc_fops, 0444, dev); + /* Register the ADC character driver */ + + ret = register_driver(path, &g_adc_fops, 0444, dev); + if (ret < 0) + { + sem_destroy(&dev->ad_recv.af_sem); + sem_destroy(&dev->ad_closesem); + } + + return ret; } diff --git a/drivers/analog/ads1242.c b/drivers/analog/ads1242.c index 93b82942c2c..ccd9c0d18d0 100644 --- a/drivers/analog/ads1242.c +++ b/drivers/analog/ads1242.c @@ -2,8 +2,10 @@ * drivers/sensors/ads1242.c * Character driver for the MCP3426 Differential Input 16 Bit Delta/Sigma ADC * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2015 DS-Automotion GmbH. All rights reserved. * Author: Alexander Entinger + * Gregory Nutt * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -70,6 +72,8 @@ struct ads1242_dev_s /* SPI Helpers */ +static void ads1242_lock(FAR struct spi_dev_s *spi); +static void ads1242_unlock(FAR struct spi_dev_s *spi); static void ads1242_reset(FAR struct ads1242_dev_s *dev); static void ads1242_performSelfGainCalibration( FAR struct ads1242_dev_s *dev); @@ -128,19 +132,50 @@ static const struct file_operations g_ads1242_fops = * Private Functions ****************************************************************************/ +/**************************************************************************** + * Name: ads1242_lock + * + * Description: + * Lock and configure the SPI bus. + * + ****************************************************************************/ + +static void ads1242_lock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, true); + SPI_SETMODE(spi, ADS1242_SPI_MODE); + SPI_SETBITS(spi, 8); + (void)SPI_HWFEATURES(spi, 0); + SPI_SETFREQUENCY(spi, ADS1242_SPI_FREQUENCY); +} + +/**************************************************************************** + * Name: ads1242_unlock + * + * Description: + * Unlock the SPI bus. + * + ****************************************************************************/ + +static void ads1242_unlock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, false); +} + /**************************************************************************** * Name: ads1242_reset ****************************************************************************/ static void ads1242_reset(FAR struct ads1242_dev_s *dev) { + ads1242_lock(dev->spi); + SPI_SELECT(dev->spi, 0, true); /* Set nADC_SPI_CS to low which selects the ADS1242 */ - SPI_SEND(dev->spi, ADS1242_CMD_RESET);/* Issue reset command */ - SPI_SELECT(dev->spi, 0, false); /* Set nADC_SPI_CS to high which deselects the ADS1242 */ - up_mdelay(100); /* Wait a little so the device has time to perform a proper reset */ + + ads1242_unlock(dev->spi); } /**************************************************************************** @@ -149,11 +184,13 @@ static void ads1242_reset(FAR struct ads1242_dev_s *dev) static void ads1242_performSelfGainCalibration(FAR struct ads1242_dev_s *dev) { + ads1242_lock(dev->spi); + SPI_SELECT(dev->spi, 0, true); - SPI_SEND(dev->spi, ADS1242_CMD_SELF_GAIN_CALIB); - SPI_SELECT(dev->spi, 0, false); + + ads1242_unlock(dev->spi); } /**************************************************************************** @@ -162,11 +199,13 @@ static void ads1242_performSelfGainCalibration(FAR struct ads1242_dev_s *dev) static void ads1242_performSelfOffsetCalibration(FAR struct ads1242_dev_s *dev) { + ads1242_lock(dev->spi); + SPI_SELECT(dev->spi, 0, true); - SPI_SEND(dev->spi, ADS1242_CMD_SELF_OFFSET_CALIB); - SPI_SELECT(dev->spi, 0, false); + + ads1242_unlock(dev->spi); } /**************************************************************************** @@ -176,11 +215,13 @@ static void ads1242_performSelfOffsetCalibration(FAR struct ads1242_dev_s *dev) static void ads1242_performSystemOffsetCalibration(FAR struct ads1242_dev_s *dev) { + ads1242_lock(dev->spi); + SPI_SELECT(dev->spi, 0, true); - SPI_SEND(dev->spi, ADS1242_CMD_SYSTEM_OFFSET_CALIB); - SPI_SELECT(dev->spi, 0, false); + + ads1242_unlock(dev->spi); } /**************************************************************************** @@ -190,8 +231,9 @@ ads1242_performSystemOffsetCalibration(FAR struct ads1242_dev_s *dev) static void ads1242_read_conversion_result(FAR struct ads1242_dev_s *dev, FAR uint32_t *conversion_result) { - SPI_SELECT(dev->spi, 0, true); + ads1242_lock(dev->spi); + SPI_SELECT(dev->spi, 0, true); SPI_SEND(dev->spi, ADS1242_CMD_READ_DATA); /* Delay between last SCLK edge for DIN and first SCLK edge for DOUT: @@ -212,6 +254,8 @@ static void ads1242_read_conversion_result(FAR struct ads1242_dev_s *dev, *conversion_result |= ((uint32_t)(SPI_SEND(dev->spi, 0xFF))) << 0; SPI_SELECT(dev->spi, 0, false); + + ads1242_unlock(dev->spi); } /**************************************************************************** @@ -227,11 +271,15 @@ static void ads1242_read_conversion_result(FAR struct ads1242_dev_s *dev, static void ads1242_write_reg(FAR struct ads1242_dev_s *dev, uint8_t const reg_addr, uint8_t const reg_value) { + ads1242_lock(dev->spi); + SPI_SELECT(dev->spi, 0, true); SPI_SEND(dev->spi, ADS1242_CMD_WRITE_REGISTER | reg_addr); SPI_SEND(dev->spi, 0x00); /* Write 1 Byte */ SPI_SEND(dev->spi, reg_value); SPI_SELECT(dev->spi, 0, false); + + ads1242_unlock(dev->spi); } /**************************************************************************** @@ -248,6 +296,8 @@ static void ads1242_write_reg(FAR struct ads1242_dev_s *dev, static void ads1242_read_reg(FAR struct ads1242_dev_s *dev, uint8_t const reg_addr, FAR uint8_t *reg_value) { + ads1242_lock(dev->spi); + SPI_SELECT(dev->spi, 0, true); SPI_SEND(dev->spi, ADS1242_CMD_READ_REGISTER | reg_addr); SPI_SEND(dev->spi, 0x00); /* Read 1 Byte */ @@ -261,6 +311,8 @@ static void ads1242_read_reg(FAR struct ads1242_dev_s *dev, *reg_value = SPI_SEND(dev->spi, 0xFF); SPI_SELECT(dev->spi, 0, false); + + ads1242_unlock(dev->spi); } /**************************************************************************** @@ -562,14 +614,6 @@ int ads1242_register(FAR const char *devpath, FAR struct spi_dev_s *spi, kmm_free(priv); } - /* setup SPI frequency */ - - SPI_SETFREQUENCY(spi, ADS1242_SPI_FREQUENCY); - - /* Setup SPI mode */ - - SPI_SETMODE(spi, ADS1242_SPI_MODE); - return ret; } diff --git a/drivers/analog/ads1255.c b/drivers/analog/ads1255.c index 432b7dd7660..adb8933b380 100644 --- a/drivers/analog/ads1255.c +++ b/drivers/analog/ads1255.c @@ -1,10 +1,10 @@ /************************************************************************************ * arch/drivers/analog/ads1255.c * + * Copyright (C) 2010, 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2011 Li Zhuoyi. All rights reserved. * Author: Li Zhuoyi - * History: 0.1 2011-08-05 initial version - * 0.2 2011-08-25 fix bug in g_adcdev (cd_ops -> ad_ops,cd_priv -> ad_priv) + * Gregory Nutt * * This file is a part of NuttX: * @@ -39,6 +39,10 @@ * ************************************************************************************/ +/**************************************************************************** + * Included Files + ****************************************************************************/ + #include #include @@ -47,15 +51,20 @@ #include #include #include +#include #include -#include #include +#include #include #include #if defined(CONFIG_ADC_ADS1255) +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + #define ADS125X_BUFON 0x02 #define ADS125X_BUFOFF 0x00 @@ -102,11 +111,14 @@ #endif /**************************************************************************** - * ad_private Types + * Private Types ****************************************************************************/ -struct up_dev_s +struct ads1255_dev_s { + FAR const struct adc_callback_s *cb; + FAR struct spi_dev_s *spi; /* Cached SPI device reference */ + struct work_s work; uint8_t channel; uint32_t sps; uint8_t pga; @@ -114,36 +126,45 @@ struct up_dev_s const uint8_t *mux; int irq; int devno; - FAR struct spi_dev_s *spi; /* Cached SPI device reference */ }; /**************************************************************************** - * ad_private Function Prototypes + * Private Function Prototypes ****************************************************************************/ +static void adc_lock(FAR struct spi_dev_s *spi); +static void adc_unlock(FAR struct spi_dev_s *spi); + /* ADC methods */ +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); static void adc_reset(FAR struct adc_dev_s *dev); static int adc_setup(FAR struct adc_dev_s *dev); static void adc_shutdown(FAR struct adc_dev_s *dev); static void adc_rxint(FAR struct adc_dev_s *dev, bool enable); static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg); + +/* Interrupt handling */ + +static void adc_worker(FAR void *arg); static int adc_interrupt(int irq, void *context); /**************************************************************************** - * ad_private Data + * Private Data ****************************************************************************/ static const struct adc_ops_s g_adcops = { - .ao_reset = adc_reset, /* ao_reset */ - .ao_setup = adc_setup, /* ao_setup */ + .ao_bind = adc_bind, /* ao_bind */ + .ao_reset = adc_reset, /* ao_reset */ + .ao_setup = adc_setup, /* ao_setup */ .ao_shutdown = adc_shutdown, /* ao_shutdown */ - .ao_rxint = adc_rxint, /* ao_rxint */ - .ao_ioctl = adc_ioctl /* ao_read */ + .ao_rxint = adc_rxint, /* ao_rxint */ + .ao_ioctl = adc_ioctl /* ao_read */ }; -static struct up_dev_s g_adcpriv = +static struct ads1255_dev_s g_adcpriv = { .mux = (const uint8_t []) { @@ -190,43 +211,112 @@ static uint8_t getspsreg(uint16_t sps) } /**************************************************************************** - * ad_private Functions + * Private Functions ****************************************************************************/ -/* Reset the ADC device. Called early to initialize the hardware. This - * is called, before ao_setup() and on error conditions. - */ -static void adc_reset(FAR struct adc_dev_s *dev) +/**************************************************************************** + * Name: adc_lock + * + * Description: + * Lock and configure the SPI bus. + * + ****************************************************************************/ + +static void adc_lock(FAR struct spi_dev_s *spi) { - FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv; - FAR struct spi_dev_s *spi = priv->spi; - + (void)SPI_LOCK(spi, true); SPI_SETMODE(spi, SPIDEV_MODE1); SPI_SETBITS(spi, 8); (void)SPI_HWFEATURES(spi, 0); SPI_SETFREQUENCY(spi, CONFIG_ADS1255_FREQUENCY); +} + +/**************************************************************************** + * Name: adc_unlock + * + * Description: + * Unlock the SPI bus. + * + ****************************************************************************/ + +static void adc_unlock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, false); +} + +/**************************************************************************** + * Name: adc_bind + * + * Description: + * Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + * + ****************************************************************************/ + +static int adc_bind(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback) +{ + FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + priv->cb = callback; + return OK; +} + +/**************************************************************************** + * Name: adc_reset + * + * Description: + * Reset the ADC device. Called early to initialize the hardware. This + * is called, before ao_setup() and on error conditions. + * + ****************************************************************************/ + +static void adc_reset(FAR struct adc_dev_s *dev) +{ + FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)dev->ad_priv; + FAR struct spi_dev_s *spi; + + DEBUGASSERT(priv != NULL && priv->spi != NULL); + spi = priv->spi; + + adc_lock(spi); usleep(1000); + SPI_SELECT(spi, priv->devno, true); SPI_SEND(spi, ADS125X_WREG + 0x03); /* WRITE SPS REG */ SPI_SEND(spi, 0x00); /* count=1 */ SPI_SEND(spi, 0x63); SPI_SELECT(spi, priv->devno, false); + + adc_unlock(spi); } -/* Configure the ADC. This method is called the first time that the ADC - * device is opened. This will occur when the port is first opened. - * This setup includes configuring and attaching ADC interrupts. Interrupts - * are all disabled upon return. - */ +/**************************************************************************** + * Name: adc_setup + * + * Description: + * Configure the ADC. This method is called the first time that the ADC + * device is opened. This will occur when the port is first opened. + * This setup includes configuring and attaching ADC interrupts. Interrupts + * are all disabled upon return. + * + ****************************************************************************/ -static int adc_setup(FAR struct adc_dev_s *dev) +static int adc_setup(FAR struct adc_dev_s *dev) { - FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv; - FAR struct spi_dev_s *spi = priv->spi; - int ret = irq_attach(priv->irq, adc_interrupt); + FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)dev->ad_priv; + FAR struct spi_dev_s *spi; + int ret; + DEBUGASSERT(priv != NULL && priv->spi != NULL); + spi = priv->spi; + + ret = irq_attach(priv->irq, adc_interrupt); if (ret == OK) { + adc_lock(spi); + SPI_SELECT(spi, priv->devno, true); SPI_SEND(spi, ADS125X_WREG); /* WRITE REG from 0 */ SPI_SEND(spi, 0x03); /* count=4+1 */ @@ -245,28 +335,47 @@ static int adc_setup(FAR struct adc_dev_s *dev) usleep(1000); SPI_SEND(spi, ADS125X_SELFCAL); SPI_SELECT(spi, priv->devno, false); + + adc_unlock(spi); up_enable_irq(priv->irq); } return ret; } -/* Disable the ADC. This method is called when the ADC device is closed. - * This method reverses the operation the setup method. - */ +/**************************************************************************** + * Name: adc_shutdown + * + * Description: + * Disable the ADC. This method is called when the ADC device is closed. + * This method reverses the operation the setup method. + * + ****************************************************************************/ static void adc_shutdown(FAR struct adc_dev_s *dev) { - FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv; + FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + up_disable_irq(priv->irq); irq_detach(priv->irq); } -/* Call to enable or disable RX interrupts */ +/**************************************************************************** + * Name: adc_rxint + * + * Description: + * Call to enable or disable RX interrupts + * + ****************************************************************************/ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable) { - FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->ad_priv; + FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)dev->ad_priv; + + DEBUGASSERT(priv != NULL); + if (enable) { up_enable_irq(priv->irq); @@ -277,21 +386,44 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable) } } -/* All ioctl calls will be routed through this method */ +/**************************************************************************** + * Name: adc_ioctl + * + * Description: + * All ioctl calls will be routed through this method + * + ****************************************************************************/ -static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) +static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg) { dbg("Fix me:Not Implemented\n"); return 0; } -static int adc_interrupt(int irq, void *context) +/**************************************************************************** + * Name: adc_worker + * + * Description: + * ADC interrupt work + * + ****************************************************************************/ + +static void adc_worker(FAR void *arg) { - FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv; - FAR struct spi_dev_s *spi = priv->spi; + FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)arg; + FAR struct spi_dev_s *spi; unsigned char buf[4]; unsigned char ch; + DEBUGASSERT(priv != NULL && priv->spi != NULL); + spi = priv->spi; + + /* REVISIT: Cannot perform SPI operations from an interrupt handler! + * Need to use the high priority work queue. + */ + + adc_lock(spi); + SPI_SELECT(spi, priv->devno, true); SPI_SEND(spi, ADS125X_RDATA); up_udelay(10); @@ -316,7 +448,46 @@ static int adc_interrupt(int irq, void *context) SPI_SEND(spi, ADS125X_WAKEUP); SPI_SELECT(spi, priv->devno, false); - adc_receive(&g_adcdev, priv->channel, *(int32_t *)buf); + adc_unlock(spi); + + /* Verify that the upper-half driver has bound its callback functions */ + + if (priv->cb != NULL) + { + /* Perform the data received callback */ + + DEBUGASSERT(priv->cb->au_receive != NULL); + priv->cb->au_receive(&g_adcdev, priv->channel, *(int32_t *)buf); + } + + /* Re-enable ADC interrupts */ + + up_enable_irq(priv->irq); +} + +/**************************************************************************** + * Name: adc_interrupt + * + * Description: + * ADC interrupt handler + * + ****************************************************************************/ + +static int adc_interrupt(int irq, void *context) +{ + FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)g_adcdev.ad_priv; + + DEBUGASSERT(priv != NULL); + + /* Disable further ADC interrupts until the worker thread has executed. */ + + up_disable_irq(priv->irq); + + /* Schedule the ADC work for the worker thread. Whent he sample has been + * processed, the ADC interrupt will be re-enabled. + */ + + DEBUGVERIFY(work_queue(HPWORK, &priv->work, adc_worker, priv, 0)); return OK; } @@ -341,10 +512,13 @@ static int adc_interrupt(int irq, void *context) FAR struct adc_dev_s *up_ads1255initialize(FAR struct spi_dev_s *spi, unsigned int devno) { - FAR struct up_dev_s *priv = (FAR struct up_dev_s *)g_adcdev.ad_priv; + FAR struct ads1255_dev_s *priv = (FAR struct ads1255_dev_s *)g_adcdev.ad_priv; + + DEBUGASSERT(spi != NULL); /* Driver state data */ + priv->cb = NULL; priv->spi = spi; priv->devno = devno; return &g_adcdev; diff --git a/drivers/dev_null.c b/drivers/dev_null.c index eca30dd8e10..ff535df3444 100644 --- a/drivers/dev_null.c +++ b/drivers/dev_null.c @@ -65,15 +65,18 @@ static int devnull_poll(FAR struct file *filep, FAR struct pollfd *fds, static const struct file_operations devnull_fops = { - 0, /* open */ - 0, /* close */ + NULL, /* open */ + NULL, /* close */ devnull_read, /* read */ devnull_write, /* write */ - 0, /* seek */ - 0 /* ioctl */ + NULL, /* seek */ + NULL /* ioctl */ #ifndef CONFIG_DISABLE_POLL , devnull_poll /* poll */ #endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ +#endif }; /**************************************************************************** diff --git a/drivers/dev_zero.c b/drivers/dev_zero.c index 0bb31688be8..5a0ce669252 100644 --- a/drivers/dev_zero.c +++ b/drivers/dev_zero.c @@ -65,15 +65,18 @@ static int devzero_poll(FAR struct file *filep, FAR struct pollfd *fds, static const struct file_operations devzero_fops = { - 0, /* open */ - 0, /* close */ + NULL, /* open */ + NULL, /* close */ devzero_read, /* read */ devzero_write, /* write */ - 0, /* seek */ - 0 /* ioctl */ + NULL, /* seek */ + NULL /* ioctl */ #ifndef CONFIG_DISABLE_POLL , devzero_poll /* poll */ #endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ +#endif }; /**************************************************************************** diff --git a/drivers/lcd/Kconfig b/drivers/lcd/Kconfig index a7be77550c3..97618eba04b 100644 --- a/drivers/lcd/Kconfig +++ b/drivers/lcd/Kconfig @@ -3,7 +3,23 @@ # see the file kconfig-language.txt in the NuttX tools repository. # -comment "Common LCD Settings" +menu "LCD Driver Support" + +menuconfig LCD + bool "Graphic LCD Driver Support" + default n + select NX_LCDDRIVER if NX + ---help--- + Drivers for parallel and serial LCD and OLED type devices. These + drivers support interfaces as defined in include/nuttx/lcd/lcd.h + + This selection is necessary to enable support for LCD drivers in + drivers/lcd as well as for board-specific LCD drivers in the configs/ + subdirectories. + +if LCD + +comment "Common Graphic LCD Settings" config LCD_CONSOLE bool "LCD console output" @@ -990,8 +1006,21 @@ config LCD_RA8875_EXTENDED driver anyway. endif # LCD_RA8875 +endif # LCD -comment "Alphanumeric/Segment LCD Devices" +menuconfig SLCD + bool "Alphanumeric/Segment LCD Devices" + default n + ---help--- + Drivers for Alphanumeric ans Segment LCDs (SLCDs). These + drivers support interfaces as defined in include/nuttx/lcd/slcd_ioctl.h + amd slcd_codec.h + + This selection is necessary to enable support for SLCD drivers in + drivers/lcd as well as for board-specific LCD drivers in the configs/ + subdirectories. + +if SLCD config LCD_LCD1602 bool "LCD 1602" @@ -1003,3 +1032,21 @@ config LCD_LCD1602 NOTE: There is no common implementation of the LCD1602 driver. Rather, there are board-by-board implementations. See, for example, configs/pcblogic-pic32mx/src/up_lcd1602.c. + +config LCD_BACKPACK + bool "PCF8574 LCD Backpack" + default n + depends on I2C + select LIB_SLCDCODEC + ---help--- + Enable support for PCF8574 LCD Backpack driver. This driver supports + an interface board that is based on the PCF8574 io expander and + supports the HD44780-based (or compatible) LCD modules. There are + a myriad of different vendors of such, but they are principally the + same, save wiring and minor features like jumpers for I2C addresses. + This driver supports known and unknown variants. + + See pcf8574_lcd_backpack_readme.txt + +endif # SLCD +endmenu # LCD Driver Support diff --git a/drivers/lcd/Make.defs b/drivers/lcd/Make.defs index 1becc0fa973..3eb60c791c2 100644 --- a/drivers/lcd/Make.defs +++ b/drivers/lcd/Make.defs @@ -33,11 +33,9 @@ # ############################################################################ -# Don't build anything if there is no NX support for LCD drivers - ifeq ($(CONFIG_NX_LCDDRIVER),y) -# Include LCD drivers +# Include support for Graphics LCD drivers ifeq ($(CONFIG_LCD_P14201),y) CSRCS += p14201.c @@ -102,11 +100,25 @@ endif ifeq ($(CONFIG_LCD_RA8875),y) CSRCS += ra8875.c endif +endif # CONFIG_NX_LCDDRIVER -# Include LCD driver build support +ifeq ($(CONFIG_SLCD),y) -DEPPATH += --dep-path lcd -VPATH += :lcd -CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)lcd} +# Include support for Alphanumeric/Segment LCD drivers + +ifeq ($(CONFIG_LCD_BACKPACK),y) + CSRCS += pcf8574_lcd_backpack.c endif +endif # CONFIG_SLCD +# Include LCD driver build support (the nested if-then-else implements an OR) + +ifeq ($(CONFIG_NX_LCDDRIVER),y) + DEPPATH += --dep-path lcd + VPATH += :lcd + CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)lcd} +else ifeq ($(CONFIG_SLCD),y) + DEPPATH += --dep-path lcd + VPATH += :lcd + CFLAGS += ${shell $(INCDIR) $(INCDIROPT) "$(CC)" $(TOPDIR)$(DELIM)drivers$(DELIM)lcd} +endif diff --git a/drivers/lcd/README.txt b/drivers/lcd/README.txt index 0a49c64efcb..85d4f52d71b 100644 --- a/drivers/lcd/README.txt +++ b/drivers/lcd/README.txt @@ -149,6 +149,11 @@ Re-usable LCD drivers reside in the drivers/lcd directory: configs/stm32f4discovery configs/sam4l-xplained + Segment LCDS (SLCDs): + --------------------- + + pcf8574_lcd_backpack.c: See pcf8574_lcd_backpack_readme.txt. + Examples: configs/ ================== diff --git a/drivers/lcd/pcf8574_lcd_backpack.c b/drivers/lcd/pcf8574_lcd_backpack.c new file mode 100644 index 00000000000..a8e288c6cc3 --- /dev/null +++ b/drivers/lcd/pcf8574_lcd_backpack.c @@ -0,0 +1,1622 @@ +/**************************************************************************** + * drivers/lcd/pcf8574_lcd_backpack.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include + +#ifndef CONFIG_LIB_SLCDCODEC +# error please also select Library Routines, Segment LCD CODEC +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* The PCF8574 is a 100 KHz device */ + +#define I2C_FREQ 100000 + +/* timing characteristics of the LCD interface */ + +#define DELAY_US_NYBBLE0 20 +#define DELAY_US_NYBBLE1 10 +#define DELAY_US_WRITE 40 +#define DELAY_US_HOMECLEAR 1500 + +/* HD44780 commands */ + +#define CMD_CLEAR 0x01 +#define CMD_HOME 0x02 +#define CMD_CURSOR_ON_SOLID 0x0e +#define CMD_CURSOR_OFF 0x0c +#define CMD_CURSOR_ON_BLINK 0x0f +#define CMD_SET_CGADDR 0x40 +#define CMD_SET_DDADDR 0x80 + +#ifdef CONFIG_DEBUG_LCD +# define lcddbg dbg +# define lcdvdbg vdbg +#else +# define lcddbg(x...) +# define lcdvdbg(x...) +#endif + +#define MAX_OPENCNT (255) /* Limit of uint8_t */ + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct pcf8574_lcd_dev_s +{ + FAR struct i2c_master_s *i2c; /* I2C interface */ + struct pcf8574_lcd_backpack_config_s cfg; /* gpio configuration */ + uint8_t bl_bit; /* current backlight bit */ + uint8_t refs; /* Number of references */ + uint8_t unlinked; /* We are unlinked, so teardown on last close */ + sem_t sem_excl; /* mutex */ +}; + +struct lcd_instream_s +{ + struct lib_instream_s stream; + FAR const char *buffer; + ssize_t nbytes; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Character driver methods */ + +static int pcf8574_lcd_open(FAR struct file *filep); +static int pcf8574_lcd_close(FAR struct file *filep); +static ssize_t pcf8574_lcd_read(FAR struct file *filep, FAR char *buffer, + size_t buflen); +static ssize_t pcf8574_lcd_write(FAR struct file *filep, + FAR const char *buffer, size_t buflen); +static off_t pcf8574_lcd_seek(FAR struct file *filep, off_t offset, int whence); +static int pcf8574_lcd_ioctl(FAR struct file *filep, int cmd, + unsigned long arg); +#ifndef CONFIG_DISABLE_POLL +static int pcf8574lcd_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup); +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS +static int pcf8574_lcd_unlink(FAR struct inode *inode); +#endif + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct file_operations g_pcf8574_lcd_fops = +{ + pcf8574_lcd_open, /* open */ + pcf8574_lcd_close, /* close */ + pcf8574_lcd_read, /* read */ + pcf8574_lcd_write, /* write */ + pcf8574_lcd_seek, /* seek */ + pcf8574_lcd_ioctl, /* ioctl */ +#ifndef CONFIG_DISABLE_POLL + pcf8574lcd_poll, /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + pcf8574_lcd_unlink /* unlink */ +#endif +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pca8574_write + * + * Description: + * primitive I2C write operation for the PCA8574, which is the IO expander + * device used on the board. The board essentially byte-bangs the + * parallel interface in nybble mode much as one might with a conventional + * GPIO based interface. The I2C interface simply sets the state of the + * 8 IO lines to control the 4 data, 3 control, and one for backlight, + * signals. + * + ****************************************************************************/ + +static void pca8574_write(FAR struct pcf8574_lcd_dev_s *priv, uint8_t data) +{ + struct i2c_config_s config; + int ret; + + /* Set up the I2C configuration */ + + config.frequency = I2C_FREQ; + config.address = priv->cfg.addr; + config.addrlen = 7; + + /* Write the value */ + + ret = i2c_write(priv->i2c, &config, &data, 1); + if (ret < 0) + { + lcdvdbg("pca8574_write() failed: %d\n", ret); + return; + } + + return; +} + +/**************************************************************************** + * Name: pca8574_read + * + * Description: + * primitive I2C read operation for the PCA8574, which is the IO expander + * device used on the board. The PCF8574 is 'interesting' in that it doesn't + * really have a data direction register, but instead the outputs are current- + * limited when high, so by setting an IO line high, you are also making it + * an input. Consequently, before using this method, you'll need to perform a + * pca8574_write() setting the bits you are interested in reading to 1's, + * then call this method. + * + ****************************************************************************/ + +static int pca8574_read(FAR struct pcf8574_lcd_dev_s *priv, uint8_t* data) +{ + struct i2c_config_s config; + int ret; + + /* Set up the I2C configuration */ + + config.frequency = I2C_FREQ; + config.address = priv->cfg.addr; + config.addrlen = 7; + + /* Read the value */ + + ret = i2c_read(priv->i2c, &config, data, 1); + if (ret < 0) + { + lcdvdbg("pca8574_read() failed: %d\n", ret); + } + + return ret; +} + +/**************************************************************************** + * Name: lcd_backlight + * + * Description: + * turn on, or off, the LCD backlight + * + ****************************************************************************/ + +static void lcd_backlight(FAR struct pcf8574_lcd_dev_s *priv, bool blOn) +{ + uint8_t data; + + data = ((blOn && priv->cfg.bl_active_high) || + (!blOn && !priv->cfg.bl_active_high)) ? (1 << priv->cfg.bl) : 0; + pca8574_write(priv, data); + priv->bl_bit = data; +} + +/**************************************************************************** + * Name: rc2addr + * + * Description: + * This converts a row/column pair to a screen memory address. + * + ****************************************************************************/ + +static inline uint8_t rc2addr(FAR struct pcf8574_lcd_dev_s *priv, + uint8_t row, uint8_t col) +{ + if (row < 2) + { + /* 1 and 2 line displays are simple; line0 @ 0x00, line1 @ 0x40 */ + + return row * 0x40 + col; + } + else + { + /* 4 line displays are intersting; third line really is a continuation + * of first line, and fourth line is a continuation of second. + */ + + return (row - 2) * 0x40 + (col + priv->cfg.cols); + } +} + +/**************************************************************************** + * Name: addr2rc + * + * Description: + * This converts a screen memory address to a row/column pair. + * + ****************************************************************************/ + +static inline void addr2rc(FAR struct pcf8574_lcd_dev_s *priv, + uint8_t addr, uint8_t* row, uint8_t* col) +{ + + *row = addr / 0x40; + *col = addr % 0x40; + + if (*col >= priv->cfg.cols) + { + /* 4 line displays have third and fourth lines really as continuation + * of first and second. + */ + + *row += 2; + *col -= priv->cfg.cols; + } +} + +/**************************************************************************** + * Name: prepare_nybble + * + * Description: + * This is a bit tedious, but scramble the bits of the nybble into position + * as per this board's particular wiring. Most boards are either on the + * top four bits, or bottom four, so a shift would do typically in those + * cases, but this gives us ultimate flexibility. + * + ****************************************************************************/ + +uint8_t prepare_nybble(FAR struct pcf8574_lcd_dev_s *priv, uint8_t nybble) +{ + uint8_t lcddata = 0; + + if (nybble & 0x08) + { + lcddata |= (1 << priv->cfg.d7); + } + + if (nybble & 0x04) + { + lcddata |= (1 << priv->cfg.d6); + } + + if (nybble & 0x02) + { + lcddata |= (1 << priv->cfg.d5); + } + + if (nybble & 0x01) + { + lcddata |= (1 << priv->cfg.d4); + } + + return lcddata; +} + +/**************************************************************************** + * Name: unprepare_nybble + * + * Description: + * This is the opposite of prepare_nybble(), and is used to unscramble bits + * when reading data from the display, as per board wiring. + * + ****************************************************************************/ + +uint8_t unprepare_nybble(FAR struct pcf8574_lcd_dev_s *priv, uint8_t lcddata) +{ + uint8_t data = 0; + + if (lcddata & (1 << priv->cfg.d7)) + { + data |= 0x08; + } + + if (lcddata & (1 << priv->cfg.d6)) + { + data |= 0x04; + } + + if (lcddata & (1 << priv->cfg.d5)) + { + data |= 0x02; + } + + if (lcddata & (1 << priv->cfg.d4)) + { + data |= 0x01; + } + + return data; +} + +/**************************************************************************** + * Name: latch_nybble + * + * Description: + * Latch a nybble on the LCD bus. This is done for each of two halves of a + * write operation in 4-bit mode. The 'rs' param is false for command + * transfers, and true for data transfers. + * + ****************************************************************************/ + +static void latch_nybble(FAR struct pcf8574_lcd_dev_s *priv, uint8_t nybble, + bool rs) +{ + uint8_t lcddata; + uint8_t en_bit; + uint8_t rs_bit; + + en_bit = 1 << priv->cfg.en; + rs_bit = rs ? (1 << priv->cfg.rs) : 0; + + /* Put the nybble, preserving backlight, reset R/~W and maybe RS */ + + lcddata = prepare_nybble(priv, nybble) | priv->bl_bit | rs_bit; + pca8574_write(priv, lcddata); + + /* Now set EN */ + + lcddata |= en_bit; + pca8574_write(priv, lcddata); + up_udelay(DELAY_US_NYBBLE0); /* setup */ + + /* Latch on EN falling edge */ + + lcddata &= ~en_bit; + pca8574_write(priv, lcddata); + up_udelay(DELAY_US_NYBBLE1); /* hold */ +} + +/**************************************************************************** + * Name: load_nybble + * + * Description: + * Load a nybble from the LCD bus. This is done for each of two halves of a + * read operation in 4-bit mode. The 'rs' param is false for command + * transfers (the only one is to read status and the address register), and + * true for data transfers. + * + ****************************************************************************/ + +static uint8_t load_nybble(FAR struct pcf8574_lcd_dev_s *priv, bool rs) +{ + uint8_t lcddata; + uint8_t en_bit; + uint8_t rs_bit; + uint8_t rw_bit; + uint8_t data; + + en_bit = 1 << priv->cfg.en; + rs_bit = rs ? (1 << priv->cfg.rs) : 0; + rw_bit = 1 << priv->cfg.rw; + + /* Put highs on the data lines, preserve, set R/~W and maybe RS */ + + lcddata = prepare_nybble(priv, 0x0f) | priv->bl_bit | rw_bit | rs_bit; + pca8574_write(priv, lcddata); + + /* Now set EN */ + + lcddata |= en_bit; + pca8574_write(priv, lcddata); + up_udelay(DELAY_US_NYBBLE0); /* setup */ + + /* Now read the data */ + + pca8574_read(priv, &data); + data = unprepare_nybble(priv, data); + + /* Transaction completed on EN falling edge */ + + lcddata &= ~en_bit; + pca8574_write(priv, lcddata); + up_udelay(DELAY_US_NYBBLE1); /* hold */ + + return data; +} + +/**************************************************************************** + * Name: lcd_putcmd + * + * Description: + * Write a command to the LCD. Most of the time this is done in nybble + * mode in two phases, but in special cases (like initialization) we do not + * do two phases. + * + ****************************************************************************/ + +static void lcd_putcmd(FAR struct pcf8574_lcd_dev_s *priv, uint8_t data) +{ + latch_nybble(priv, data >> 4, false); + latch_nybble(priv, data, false); + up_udelay(DELAY_US_WRITE); +} + +/**************************************************************************** + * Name: lcd_putdata + * + * Description: + * Write a byte to the LCD. This is used both for screen data and for + * character generator data, depending on a previous command that selected + * which ever is the destination. + * + ****************************************************************************/ + +static inline void lcd_putdata(FAR struct pcf8574_lcd_dev_s *priv, + uint8_t data) +{ + latch_nybble(priv, data >> 4, true); + latch_nybble(priv, data, true); + up_udelay(DELAY_US_WRITE); +} + +/**************************************************************************** + * Name: lcd_getdata + * + * Description: + * Read a data byte from the LCD. + * + ****************************************************************************/ + +static inline uint8_t lcd_getdata(FAR struct pcf8574_lcd_dev_s *priv) +{ + uint8_t data; + data = (load_nybble(priv, true) << 4) | load_nybble(priv, true); + return data; +} + +/**************************************************************************** + * Name: lcd_getcmd + * + * Description: + * Read a command byte from the LCD. There really is only one such read: + * get 'busy' status, and current address value. + * + ****************************************************************************/ + +static inline uint8_t lcd_getcmd(FAR struct pcf8574_lcd_dev_s *priv) +{ + uint8_t data; + data = (load_nybble(priv, false) << 4) | load_nybble(priv, false); + return data; +} + +/**************************************************************************** + * Name: lcd_read_busy_addr + * + * Description: + * Read the busy flag, and, optionally, the current value of the address + * register (data or character generator dependent on a previous command). + * + ****************************************************************************/ + +static bool lcd_read_busy_addr(FAR struct pcf8574_lcd_dev_s *priv, uint8_t* addr) +{ + uint8_t data = lcd_getcmd(priv); + + if (NULL != addr) + { + *addr = data & 0x7f; + } + + return (data & 0x80) ? true : false; +} + +/**************************************************************************** + * Name: lcd_init + * + * Description: + * perform the initialization sequence to get the LCD into a known state. + * + ****************************************************************************/ + +static void lcd_init(FAR struct pcf8574_lcd_dev_s *priv) +{ + /* Wait for more than 15 ms after Vcc for the LCD to stabilize */ + + usleep(50000); + + /* Perform the init sequence. This sequence of commands is constructed so + * that it will get the device into nybble mode irrespective of what state + * the device is currently in (could be 8 bit, 4 bit nyb 0, 4 bit nyb 1). + * By sending the 'set 8-bit mode' three times, we will definitely end up + * in 8 bit mode, and then we can reliably transition to 4 bit mode for + * the remainder of operations. + */ + + /* Send Command 0x30, set 8-bit mode, and wait > 4.1 ms */ + + latch_nybble(priv, 0x30>>4, false); + usleep(5000); + + /* Send Command 0x30, set 8-bit mode, and wait > 100 us */ + + latch_nybble(priv, 0x30>>4, false); + usleep(5000); + + /* Send Command 0x30, set 8-bit mode */ + + latch_nybble(priv, 0x30>>4, false); + usleep(200); + + /* now Function set: Set interface to be 4 bits long (only 1 cycle write for the first time). */ + + latch_nybble(priv, 0x20>>4, false); + usleep(5000); + + /* Function set: DL=0;Interface is 4 bits, N=1 (2 Lines), F=0 (5x8 dots font) */ + + lcd_putcmd(priv, 0x28); + + /* Display Off: D=0 (Display off), C=0 (Cursor Off), B=0 (Blinking Off) */ + + lcd_putcmd(priv, 0x08); + + /* Display Clear */ + + lcd_putcmd(priv, CMD_CLEAR); + up_udelay(DELAY_US_HOMECLEAR); /* clear needs extra time */ + + /* Entry Mode Set: I/D=1 (Increment), S=0 (No shift) */ + + lcd_putcmd(priv, 0x06); + + /* Display On, Cursor Off */ + + lcd_putcmd(priv, 0x0C); +} + +/**************************************************************************** + * Name: lcd_create_char + * + * Description: + * This creates a custom character pattern. There can be 8 5x8 patterns. + * The bitmap proceeds top to bottom, msb-lsb, and is right justified (i.e. + * only bits 4-0 are used). By convention, you are meant to always leave the + * last line (byte) zero so that the cursor can use this line, but this is + * not strictly required. + * + * Parameters: + * priv - device instance + * idxchar - which character is being imaged; 0 - 7 + * chardata - the character image bitmap; must be 8 bytes always + * + ****************************************************************************/ + +static void lcd_create_char(FAR struct pcf8574_lcd_dev_s *priv, + uint8_t idxchar, const uint8_t *chardata) +{ + int nIdx; + uint8_t addr; + + (void)lcd_read_busy_addr(priv, &addr); + lcd_putcmd(priv, CMD_SET_CGADDR | (idxchar << 3)); /* set CGRAM address */ + + for (nIdx = 0; nIdx < 8; ++nIdx) + { + lcd_putdata(priv, chardata[nIdx]); + } + + lcd_putcmd(priv, CMD_SET_DDADDR | addr); /* restore DDRAM address */ +} + +/**************************************************************************** + * Name: lcd_set_curpos + * + * Description: + * This sets the cursor position based on row, column addressing. + * + * Parameters: + * priv - device instance + * row - row position + * col - column position + * + ****************************************************************************/ + +static void lcd_set_curpos(FAR struct pcf8574_lcd_dev_s *priv, + uint8_t row, uint8_t col) +{ + uint8_t addr; + addr = rc2addr(priv, row, col); + lcd_putcmd(priv, CMD_SET_DDADDR | addr); /* set DDRAM address */ +} + +/**************************************************************************** + * Name: lcd_get_curpos + * + * Description: + * This gets the cursor position based on row, column addressing. + * + * Parameters: + * priv - device instance + * row - row position + * col - column position + * + ****************************************************************************/ + +static void lcd_get_curpos(FAR struct pcf8574_lcd_dev_s *priv, + uint8_t *row, uint8_t *col) +{ + uint8_t addr; + + (void)lcd_read_busy_addr(priv, &addr); + addr2rc(priv, addr, row, col); +} + +/**************************************************************************** + * Name: lcd_scroll_up + * + * Description: + * Scroll the display up, and clear the new (last) line. + * + ****************************************************************************/ + +static void lcd_scroll_up(FAR struct pcf8574_lcd_dev_s *priv) +{ + uint8_t *data; + int nRow; + int nCol; + + data = (uint8_t *)malloc(priv->cfg.cols); + if (NULL == data) + { + lcdvdbg("Failed to allocate buffer in lcd_scroll_up()\n"); + return; + } + + for (nRow = 1; nRow < priv->cfg.rows; ++nRow) + { + lcd_set_curpos(priv, nRow, 0); + for (nCol = 0; nCol < priv->cfg.cols; ++nCol) + { + data[nCol] = lcd_getdata(priv); + } + + lcd_set_curpos(priv, nRow - 1, 0); + for (nCol = 0; nCol < priv->cfg.cols; ++nCol) + { + lcd_putdata(priv, data[nCol]); + } + } + + lcd_set_curpos(priv, priv->cfg.rows - 1, 0); + for (nCol = 0; nCol < priv->cfg.cols; ++nCol) + { + lcd_putdata(priv, ' '); + } + + lcd_set_curpos(priv, priv->cfg.rows - 1, 0); + + free(data); + return; +} + +/**************************************************************************** + * Name: lcd_codec_action + * + * Description: + * Perform an 'action' as per the Segment LCD codec. + * + * Parameters: + * priv - device instance + * code - SLCD code action code + * count - count param for those actions that take it + * + ****************************************************************************/ + +static void lcd_codec_action(FAR struct pcf8574_lcd_dev_s *priv, + enum slcdcode_e code, uint8_t count) +{ + switch (code) + { + /* Erasure */ + + case SLCDCODE_BACKDEL: /* Backspace (backward delete) N characters */ + { + if (count <= 0) /* silly case */ + break; + + else + { + uint8_t row; + uint8_t col; + + lcd_get_curpos(priv, &row, &col); + if (count > col) /* saturate to preceding columns available */ + { + count = col; + } + + lcd_set_curpos(priv, row, col-count); + } + + /* ... and conscientiously fall through to next case ... */ + } + + case SLCDCODE_FWDDEL: /* Delete (forward delete) N characters, moving text */ + { + if (count <= 0) /* silly case */ + { + break; + } + + else + { + uint8_t row; + uint8_t col; + uint8_t start; + uint8_t end; + uint8_t nIdx; + uint8_t data; + + lcd_get_curpos(priv, &row, &col); + start = col + count; + + if (start >= priv->cfg.cols) /* silly case of nothing left */ + { + break; + } + + end = start + count; + if (end > priv->cfg.cols) /* saturate */ + { + end = priv->cfg.cols; + } + + for(nIdx = col; nIdx < end; ++start, ++nIdx) /* much like memmove */ + { + lcd_set_curpos(priv, row, start); + data = lcd_getdata(priv); + lcd_set_curpos(priv, row, nIdx); + lcd_putdata(priv, data); + } + + for(;nIdx < priv->cfg.cols; ++nIdx) /* much like memset */ + { + lcd_putdata(priv, ' '); + } + + lcd_set_curpos(priv, row, col); + } + } + break; + + case SLCDCODE_ERASE: /* Erase N characters from the cursor position */ + if (count > 0) + { + uint8_t row; + uint8_t col; + uint8_t end; + uint8_t nIdx; + + lcd_get_curpos(priv, &row, &col); + end = col + count; + if (end > priv->cfg.cols) + { + end = priv->cfg.cols; + } + + for (nIdx = col; nIdx < end; ++nIdx) + { + lcd_putdata(priv, ' '); + } + + lcd_set_curpos(priv, row, col); + } + break; + + case SLCDCODE_CLEAR: /* Home the cursor and erase the entire display */ + { + lcd_putcmd(priv, CMD_CLEAR); + up_udelay(DELAY_US_HOMECLEAR); /* clear needs extra time */ + } + break; + + case SLCDCODE_ERASEEOL: /* Erase from the cursor position to the end of line */ + { + uint8_t row; + uint8_t col; + uint8_t nIdx; + + lcd_get_curpos(priv, &row, &col); + + for (nIdx = col; nIdx < priv->cfg.cols; ++nIdx) + { + lcd_putdata(priv, ' '); + } + + lcd_set_curpos(priv, row, col); + } + break; + + /* Cursor movement */ + + case SLCDCODE_LEFT: /* Cursor left by N characters */ + { + uint8_t row; + uint8_t col; + + lcd_get_curpos(priv, &row, &col); + if (count > col) + { + col = 0; + } + else + { + col -= count; + } + + lcd_set_curpos(priv, row, col); + } + break; + + case SLCDCODE_RIGHT: /* Cursor right by N characters */ + { + uint8_t row; + uint8_t col; + + lcd_get_curpos(priv, &row, &col); + col += count; + if (col >= priv->cfg.cols) + { + col = priv->cfg.cols-1; + } + + lcd_set_curpos(priv, row, col); + } + break; + + case SLCDCODE_UP: /* Cursor up by N lines */ + { + uint8_t row; + uint8_t col; + + lcd_get_curpos(priv, &row, &col); + if (count > row) + { + row = 0; + } + else + { + row -= count; + } + + lcd_set_curpos(priv, row, col); + } + break; + + case SLCDCODE_DOWN: /* Cursor down by N lines */ + { + uint8_t row; + uint8_t col; + + lcd_get_curpos(priv, &row, &col); + row += count; + if (row >= priv->cfg.rows) + { + row = priv->cfg.rows - 1; + } + + lcd_set_curpos(priv, row, col); + } + break; + + case SLCDCODE_HOME: /* Cursor home */ + { + uint8_t row; + uint8_t col; + + lcd_get_curpos(priv, &row, &col); + lcd_set_curpos(priv, row, 0); + } + break; + + case SLCDCODE_END: /* Cursor end */ + { + uint8_t row; + uint8_t col; + + lcd_get_curpos(priv, &row, &col); + lcd_set_curpos(priv, row, priv->cfg.cols - 1); + } + break; + + case SLCDCODE_PAGEUP: /* Cursor up by N pages */ + case SLCDCODE_PAGEDOWN: /* Cursor down by N pages */ + break; /* Not supportable on this SLCD */ + + /* Blinking */ + + case SLCDCODE_BLINKSTART: /* Start blinking with current cursor position */ + lcd_putcmd(priv, CMD_CURSOR_ON_BLINK); + break; + + case SLCDCODE_BLINKEND: /* End blinking after the current cursor position */ + case SLCDCODE_BLINKOFF: /* Turn blinking off */ + lcd_putcmd(priv, CMD_CURSOR_OFF); + break; /* Not implemented */ + + /* These are actually unreportable errors */ + + default: + case SLCDCODE_NORMAL: /* Not a special keycode */ + break; + } +} + +/**************************************************************************** + * Name: lcd_getstream + * + * Description: + * Get one character from the LCD codec stream. + * + ****************************************************************************/ + +static int lcd_getstream(FAR struct lib_instream_s *instream) +{ + FAR struct lcd_instream_s *lcdstream = (FAR struct lcd_instream_s *)instream; + + if (lcdstream->nbytes > 0) + { + lcdstream->nbytes--; + lcdstream->stream.nget++; + return (int)*lcdstream->buffer++; + } + + return EOF; +} + +/**************************************************************************** + * Name: lcd_fpos_to_curpos + * + * Description: + * Convert a file logical offset to a screen cursor pos (row,col). This + * discounts 'synthesized' line feeds at the end of screen lines. + * + ****************************************************************************/ + +static void lcd_fpos_to_curpos(FAR struct pcf8574_lcd_dev_s *priv, + off_t fpos, uint8_t *row, uint8_t *col, bool* onlf) +{ + int virtcols; + + virtcols = (priv->cfg.cols + 1); + + /* Determine if this is a 'virtual' position (on the synthetic LF) */ + + *onlf = (priv->cfg.cols == fpos % virtcols); + + /* Adjust off any preceding synthetic LF's to get linear position */ + + fpos -= fpos / virtcols; + + /* Compute row/col from linear position */ + + *row = fpos / priv->cfg.cols; + *col = fpos % priv->cfg.cols; +} + +/**************************************************************************** + * Name: lcd_curpos_to_fpos + * + * Description: + * Convert a screen cursor pos (row,col) to a file logical offset. This + * includes 'synthesized' line feeds at the end of screen lines. + * + ****************************************************************************/ + +static void lcd_curpos_to_fpos(FAR struct pcf8574_lcd_dev_s *priv, + uint8_t row, uint8_t col, off_t* fpos) +{ + /* the logical file position is the linear position plus any synthetic LF */ + + *fpos = (row * priv->cfg.cols) + col + row; +} + +/**************************************************************************** + * Name: pcf8574_lcd_open + * + * Description: + * requisite device 'open' method; we don't do anything special + * + ****************************************************************************/ + +static int pcf8574_lcd_open(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + + /* Increment the reference count */ + + sem_wait(&priv->sem_excl); + if (priv->refs == MAX_OPENCNT) + { + return -EMFILE; + } + else + { + priv->refs++; + } + + sem_post(&priv->sem_excl); + return OK; +} + +/**************************************************************************** + * Name: pcf8574_lcd_close + * + * Description: + * requisite device 'close' method; we don't do anything special + * + ****************************************************************************/ + +static int pcf8574_lcd_close(FAR struct file *filep) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + int ret; + + /* Decrement the reference count */ + + sem_wait(&priv->sem_excl); + + if (priv->refs == 0) + { + ret = -EIO; + } + else + { + priv->refs--; + + /* If we had previously unlinked, but there were open references at the + * time, we need to do the final teardown now. + */ + + if (priv->refs == 0 && priv->unlinked) + { + /* We have no real teardown at present */ + } + ret = OK; + } + + sem_post(&priv->sem_excl); + return ret; +} + +/**************************************************************************** + * Name: pcf8574_lcd_read + * + * Description: + * This simply reads as much of the display memory as possible. This is + * generally not very interesting, but we do it in a way that allows us to + * 'cat' the LCD contents via the shell. + * + ****************************************************************************/ + +static ssize_t pcf8574_lcd_read(FAR struct file *filep, FAR char *buffer, + size_t buflen) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + int nIdx; + uint8_t addr; + uint8_t row; + uint8_t col; + bool onlf; + + sem_wait(&priv->sem_excl); + + /* Get current cursor position so we can restore it */ + + (void)lcd_read_busy_addr(priv, &addr); + + /* Convert file position to row/col address and position DDADDR there */ + + lcd_fpos_to_curpos(priv, filep->f_pos, &row, &col, &onlf); + lcd_set_curpos(priv, row, col); + + /* Read as much of the display as possible */ + + nIdx = 0; + while (nIdx < buflen && row < priv->cfg.rows) + { + /* Synthesize end-of-line LF and advance to start of next row */ + + if (onlf) + { + /* Synthesize LF for all but last row */ + + if ( row < priv->cfg.rows-1) + { + buffer[nIdx] = '\x0a'; + onlf = false; + ++filep->f_pos; + ++nIdx; + } + ++row; + col = 0; + continue; + } + + /* If we are at start of line we will need to update DDRAM address */ + + if (0 == col) + { + lcd_set_curpos(priv, row, 0); + } + + buffer[nIdx] = lcd_getdata(priv); + + ++filep->f_pos; + ++nIdx; + ++col; + + /* If we are now at the end of a line, we setup for the synthetic LF */ + + if (priv->cfg.cols == col) + { + onlf = true; + } + } + + lcd_putcmd(priv, CMD_SET_DDADDR | addr); /* Restore DDRAM address */ + + sem_post(&priv->sem_excl); + return nIdx; +} + +/**************************************************************************** + * Name: pcf8574_lcd_write + * + * Description: + * Output a sequence of characters to the device. + * + ****************************************************************************/ + +static ssize_t pcf8574_lcd_write(FAR struct file *filep, + FAR const char *buffer, + size_t buflen) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + struct lcd_instream_s instream; + uint8_t row; + uint8_t col; + struct slcdstate_s state; + enum slcdret_e result; + uint8_t ch; + uint8_t count; + + sem_wait(&priv->sem_excl); + + /* Initialize the stream for use with the SLCD CODEC */ + + instream.stream.get = lcd_getstream; + instream.stream.nget = 0; + instream.buffer = buffer; + instream.nbytes = buflen; + + /* Get the current cursor position now; we'll keep track of it as we go */ + + lcd_get_curpos(priv, &row, &col); + + /* Now decode and process every byte in the input buffer */ + + memset(&state, 0, sizeof(struct slcdstate_s)); + while ((result = slcd_decode(&instream.stream, &state, &ch, &count)) != SLCDRET_EOF) + { + if (result == SLCDRET_CHAR) /* A normal character was returned */ + { + /* Check for ASCII control characters */ + + if (ch == ASCII_TAB) + { + lcd_putcmd(priv, CMD_CURSOR_ON_BLINK); + } + else if (ch == ASCII_VT) + { + /* Turn the backlight on */ + + lcd_backlight(priv, true); + } + else if (ch == ASCII_FF) + { + /* Turn the backlight off */ + + lcd_backlight(priv, false); + } + else if (ch == ASCII_CR) + { + /* Perform a Home */ + + lcd_putcmd(priv, CMD_HOME); + up_udelay(DELAY_US_HOMECLEAR); /* home needs extra time */ + row = 0; + col = 0; + } + else if (ch == ASCII_SO) + { + lcd_putcmd(priv, CMD_CURSOR_OFF); + } + else if (ch == ASCII_SI) + { + /* Perform the re-initialize */ + + lcd_init(priv); + row = 0; + col = 0; + } + else if (ch == ASCII_LF) + { + /* unixian line term; go to start of next line */ + + row += 1; + if (row >= priv->cfg.rows) + { + lcd_scroll_up(priv); + row = priv->cfg.rows - 1; + } + + col = 0; + lcd_set_curpos(priv, row, col); + } + else if (ch == ASCII_BS) + { + /* Perform the backward deletion */ + + lcd_codec_action(priv, SLCDCODE_BACKDEL, 1); + + lcd_get_curpos(priv, &row, &col); + } + else if (ch == ASCII_DEL) + { + /* Perform the forward deletion */ + + lcd_codec_action(priv, SLCDCODE_FWDDEL, 1); + + lcd_get_curpos(priv, &row, &col); + } + else + { + /* All others are fair game. See if we need to wrap line. */ + + if (col >= priv->cfg.cols) + { + row += 1; + if (row >= priv->cfg.rows) + { + lcd_scroll_up(priv); + row = priv->cfg.rows - 1; + } + + col = 0; + lcd_set_curpos(priv, row, col); + } + + lcd_putdata(priv, ch); + ++col; + } + } + else /* (result == SLCDRET_SPEC) */ /* A special SLCD action was returned */ + { + lcd_codec_action(priv, (enum slcdcode_e)ch, count); + + /* we can't know what happened, so it's easier just to re-inquire + * as to where we are. + */ + + lcd_get_curpos(priv, &row, &col); + } + } + + /* Wherever we wound up, update our logical file pos to reflect it */ + + lcd_curpos_to_fpos(priv, row, col, &filep->f_pos); + + sem_post(&priv->sem_excl); + return buflen; +} + +/**************************************************************************** + * Name: pcf8574_lcd_seek + * + * Description: + * Seek the logical file pointer to the specified position. This is + * probably not very interesting except possibly for (SEEK_SET, 0) to + * rewind the pointer for a subsequent read(). + * The file pointer is logical, and includes synthesized LF chars at the + * end of the display lines. + * + ****************************************************************************/ + +static off_t pcf8574_lcd_seek(FAR struct file *filep, off_t offset, int whence) +{ + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + int maxpos; + + sem_wait(&priv->sem_excl); + + maxpos = priv->cfg.rows * priv->cfg.cols + (priv->cfg.rows - 1); + switch (whence) + { + case SEEK_CUR: + filep->f_pos += offset; + if (filep->f_pos > maxpos) + filep->f_pos = maxpos; + break; + + case SEEK_SET: + filep->f_pos = offset; + if (filep->f_pos > maxpos) + filep->f_pos = maxpos; + break; + + case SEEK_END: + filep->f_pos = maxpos; + break; + + default: + /* Return EINVAL if the whence argument is invalid */ + filep->f_pos = -EINVAL; + } + + sem_post(&priv->sem_excl); + return filep->f_pos; +} + +/**************************************************************************** + * Name: pcf8574_lcd_ioctl + * + * Description: + * Perform device operations that are outside the standard I/O model. + * + ****************************************************************************/ + +static int pcf8574_lcd_ioctl(FAR struct file *filep, int cmd, + unsigned long arg) +{ + switch (cmd) + { + case SLCDIOC_GETATTRIBUTES: /* SLCDIOC_GETATTRIBUTES: Get the attributes of the SLCD */ + { + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + FAR struct slcd_attributes_s *attr = (FAR struct slcd_attributes_s *)((uintptr_t)arg); + + lcdvdbg("SLCDIOC_GETATTRIBUTES:\n"); + + if (!attr) + { + return -EINVAL; + } + + attr->nrows = priv->cfg.rows; + attr->ncolumns = priv->cfg.cols; + attr->nbars = 0; + attr->maxcontrast = 0; + attr->maxbrightness = 1; /* 'brightness' for us is the backlight */ + } + break; + + case SLCDIOC_CURPOS: /* SLCDIOC_CURPOS: Get the SLCD cursor position */ + { + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + FAR struct slcd_curpos_s *attr = (FAR struct slcd_curpos_s *)((uintptr_t)arg); + uint8_t row; + uint8_t col; + + sem_wait(&priv->sem_excl); + + lcd_get_curpos(priv, &row, &col); + attr->row = row; + attr->column = col; + + sem_post(&priv->sem_excl); + } + break; + + case SLCDIOC_GETBRIGHTNESS: /* Get the current brightness setting */ + { + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + bool bOn; + + bOn = (priv->bl_bit && priv->cfg.bl_active_high) || (!priv->bl_bit && !priv->cfg.bl_active_high); + *(int*)((uintptr_t)arg) = bOn ? 1 : 0; + } + break; + + case SLCDIOC_SETBRIGHTNESS: /* Set the brightness to a new value */ + { + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + + sem_wait(&priv->sem_excl); + lcd_backlight(priv, arg ? true : false); + sem_post(&priv->sem_excl); + } + break; + + case SLCDIOC_CREATECHAR: /* Create a custom character pattern */ + { + FAR struct inode *inode = filep->f_inode; + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + FAR struct slcd_createchar_s *attr = (FAR struct slcd_createchar_s *)((uintptr_t)arg); + + sem_wait(&priv->sem_excl); + lcd_create_char(priv, attr->idx, attr->bmp); + sem_post(&priv->sem_excl); + } + break; + + case SLCDIOC_SETBAR: /* SLCDIOC_SETBAR: Set bars on a bar display */ + case SLCDIOC_GETCONTRAST: /* SLCDIOC_GETCONTRAST: Get the current contrast setting */ + case SLCDIOC_SETCONTRAST: /* SLCDIOC_SETCONTRAST: Set the contrast to a new value */ + default: + return -ENOTTY; + } + + return OK; +} + +/**************************************************************************** + * Name: pcf8574lcd_poll + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_POLL +static int pcf8574lcd_poll(FAR struct file *filep, FAR struct pollfd *fds, + bool setup) +{ + if (setup) + { + /* Data is always available to be read */ + + fds->revents |= (fds->events & (POLLIN|POLLOUT)); + if (fds->revents != 0) + { + sem_post(fds->sem); + } + } + + return OK; +} +#endif + +/**************************************************************************** + * Name: pcf8574_lcd_unlink + ****************************************************************************/ + +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS +static int pcf8574_lcd_unlink(FAR struct inode *inode) +{ + FAR struct pcf8574_lcd_dev_s *priv = (FAR struct pcf8574_lcd_dev_s *)inode->i_private; + int ret = OK; + + sem_wait(&priv->sem_excl); + + priv->unlinked = true; + + /* If there are no open references to the driver then tear it down now */ + if (priv->refs == 0) + { + /* We have no real teardown at present */ + ret = OK; + } + + sem_post(&priv->sem_excl); + return ret; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pcf8574_lcd_backpack_register + * + * Description: + * Register a character driver that is an I2C LCD 'backpack' for the + * ever-popular HD44780 based 16x2 LCD via pcf8574 I2C IO expander. + * + ****************************************************************************/ + +int pcf8574_lcd_backpack_register(FAR const char *devpath, + FAR struct i2c_master_s *i2c, + FAR struct pcf8574_lcd_backpack_config_s *cfg) +{ + FAR struct pcf8574_lcd_dev_s *priv; + int ret; + + /* Sanity check on geometry */ + + if (cfg->rows < 1 || cfg->rows > 4) + { + lcdvdbg("Display rows must be 1-4\n"); + return -EINVAL; + } + + if ((cfg->cols < 1 || cfg->cols > 64) || (cfg->rows == 4 && cfg->cols > 32)) + { + lcdvdbg("Display cols must be 1-64, and may not be part of a 4x40 configuration\n"); + return -EINVAL; + } + + /* Initialize the device structure */ + + priv = (FAR struct pcf8574_lcd_dev_s *)kmm_malloc(sizeof(struct pcf8574_lcd_dev_s)); + if (!priv) + { + lcdvdbg("Failed to allocate instance\n"); + return -ENOMEM; + } + + priv->i2c = i2c; + priv->cfg = *cfg; + priv->bl_bit = priv->cfg.bl_active_high ? 0 : (1 << priv->cfg.bl); + priv->refs = 0; + priv->unlinked = false; + sem_init(&priv->sem_excl, 0, 1); + + /* Initialize */ + + lcd_init(priv); + + /* Register the character driver */ + + ret = register_driver(devpath, &g_pcf8574_lcd_fops, 0666, priv); + if (ret < 0) + { + lcdvdbg("Failed to register driver: %d\n", ret); + kmm_free(priv); + } + + lcdvdbg("pcf8574_lcd_backpack driver loaded successfully!\n"); + return ret; +} diff --git a/drivers/lcd/pcf8574_lcd_backpack_readme.txt b/drivers/lcd/pcf8574_lcd_backpack_readme.txt new file mode 100644 index 00000000000..edae94e0b60 --- /dev/null +++ b/drivers/lcd/pcf8574_lcd_backpack_readme.txt @@ -0,0 +1,252 @@ +pcf8574 lcd backpack - readme.txt +20160524a, ziggurat29 + +Abstract +======== + +This describes the use of the pcf8574_lcd_backpack.h, .c driver module for NuttX. + +Contents +======== + + o Summary for Those Who Don't Like to Read + o Introduction + o Usage + - Specifying the I2C Address + - Specifying the LCD Display Format + - Specifying Unknown/New Backpacks + o Special Features + - Codec + - Ioctl + o Troubleshooting + +Summary for Those Who Don't Like to Read +======================================== + +To use, in your board_app_initialize(), + +1) instantiate an I2C bus: + + FAR struct i2c_master_s* i2c = stm32l4_i2cbus_initialize(1); + +2) set the configuration for the particular make of board, and LCD format: + + struct pcf8574_lcd_backpack_config_s cfg = LCD_I2C_BACKPACK_CFG_MJKDZ; + cfg.rows = 2; + cfg.cols = 16; + +3) instantiate the device on the I2C bus previously created: + + ret = pcf8574_lcd_backpack_register("/dev/slcd0", i2c, &cfg); + +Introduction +============ + +The character LCD modules based on the HD44780 (and compatible ST7706U, KS0066U, +SED1278, etc.) drivers have been around for many decades and are quite popular. +One challenge is that they require a large number of GPIO (11 in 8-bit mode, 7 +in 4-bit mode, and an additional line if you control the backlight). + +To address this, several folks have created daughter boards for the LCD module +which present a two-wire I2C interface. Generally, folks call these interface +boards an 'lcd backpack'. A large class of them (and in particular, the very +inexpensive ones found on ebay, q.v. google "ebay i2c lcd backpack"; they're +usually about $USD 1), use the same design: a PCF8574 I2C IO expander. +Variations occur in mapping GPIO line to LCD pins, but otherwise the +expectation is that you control the LCD at a low-level tweaking the lines +("byte-banging"?) + +My original motivation for producing this was to simply serve as a test device +for some I2C driver work I was doing, but it occurred to me that it may be +useful to others, given the popularity of the 'lcd backpack', so I cleaned up +the code and made it general to support all the variations on the market, and +also to adopt the NuttX notion of a 'segment lcd codec', which is used to +transport escape sequences (for doing things like clearing the display, turning +on/off the cursor, etc), and also the standard ioctls. + +I believe it should support all "lcd backpack"s on the market (because you can +specify the particular wiring), and all HD44780-based LCD modules in 1-line, +2-line, and 4-line configurations (except 4x40 -- this is not supported by +the hardware). + +This module should be cpu-architecture-neutral, and work with any standard I2C +bus object. At the time of this writing it has been tested only with the +STM32L4 chip and with the 'MJKDZ' backpack board with a 16x2 lcd module. + +Usage +===== + +The driver is contained in the files pcf8574_lcd_backpack.h and +pcf8574_lcd_backpack.c; you can include these in your build in whatever manner +you choose (e.g. copy them into your board's src directory, and reference them +in the Makefile). + +As with other I2C devices, you first instantiate the I2C bus, and then +instantiate the driver on that bus. When instantiating the driver, you also +provide a configuration 'descriptor' that specified board wiring and LCD +format parameters. You can explicitly specify any wiring configuration, and +some known popular boards are already #defined for your convenience. + +E.g.: + + #include + #include "pcf8574_lcd_backpack.h" + + #define MJKDZ_I2C_PORTNO 1 + #define MJKDZ_DEVICE_NAME "/dev/lcd0" + + FAR struct i2c_master_s* g_i2cMJKDZ = NULL; + + .... + + g_i2cMJKDZ = stm32l4_i2cbus_initialize(MJKDZ_I2C_PORTNO); + + .... + + struct pcf8574_lcd_backpack_config_s cfg = LCD_I2C_BACKPACK_CFG_MJKDZ; + cfg.rows = 2; + cfg.cols = 16; + + ret = pcf8574_lcd_backpack_register(MJKDZ_DEVICE_NAME, g_i2cMJKDZ, &cfg); + +If all the above executes successfully, you should wind up with a character +device node "/dev/lcd0". Applications can open that node and write() to it, +and the shell can emit data to it (e.g. 'echo Hi, there! > /dev/lcd0'). + +That is the basic configuration. Some additional configuration points are +worth noting. + +Specifying the I2C Address +-------------------------- + +The 'struct pcf8574_lcd_backpack_config_s' shown above is initialized using +the convenience macro LCD_I2C_BACKPACK_CFG_MJKDZ. Those convenience macros +use the default I2C address for the board, however many of the boards allow +altering the address (by jumpers, or removing pullups). You need to specify +the correct address for your board's physical configuration. You can do that +via + + cfg.addr = 0x23; + +Specifying the LCD Display Format +--------------------------------- + +The LCD modules cannot 'self-describe' their physical format, so it must be +explicitly provided to the driver. The correct format is important for +computing screen coordinate addresses and for scrolling and line wrap. + +In the example above, the screen format is specifying by setting the +fields in the configuration descriptor: + + cfg.rows = 2; + cfg.cols = 16; + +The lcd backpack can accomodate all known 1-line and 2-line displays, and +4-line displays up to 4 x 32. Explicitly, the 4 x 40 /cannot/ be supported +because it has an important hardware difference (it is actually two 4x20 +controllers, and the LCD backpack does not have the wiring for the +second controller's 'E' line). This is a hardware limitation of the +lcd backpack, rather than the driver. + +Specifying Unknown/New Backpacks +-------------------------------- + +The descriptor initializer macros in the form LCD_I2C_BACKPACK_CFG_xxx +located near the top of pcf8574_lcd_backpack.h are provided for convenience. +However, their use is not required, and it can be useful to initialize the +descriptor with explicit values, say, for custom or unknown boards. + +The format of this descriptor is conscientiously chosen to be semantically +similar to an equivalent initialization mechanism popular in the Arduino +community used in their LCD support libraries. It specifies: + + * I2C address + * pin mapping for data lines + * pin mapping for control lines + * pin mapping for backlight control line + * polarity sense of backlight control line + +and we add to that + + * (row, column) size of display + +(the Arduino libraries specify display size at a different point in code) +You should be able to readily port a functional Arduino project by cutting- +and-pasting the sequence of numbers that are the pin defs for the lcd +backpack you are using. + +Special Features +================ + +Codec +----- + +The driver supports the NuttX 'segment lcd codec', which facilitates the +encoding of control functions into the write() stream. These can be used +to clear the display, move the cursor, etc. For details, q.v. + + nuttx/lcd/slcd_codec.h + +Ioctl +----- + +The driver supports the NuttX ioctl definitions for segment lcd. Q.v. + + nuttx/lcd/slcd_ioctl.h + +Additionally, the ioctl SLCDIOC_CREATECHAR is provided to allow the +creation of custom characters. + +The HD44780 devices generally support the creation of 8 custom +characters, which map to code points 0-7. The characters are 5x8 +pixels (with the expectation that the last row is left blank, to +accommodate the underscore cursor, though this is not strictly a +requirement). + +The SLCDIOC_CREATECHAR ioctl takes a parameter, which is a struct +consisting of the character index being programmed (0-7) and the +8-byte bitmap of the character image. The bitmap is constructed +with each byte representing a row, from top row to bottom row. +Each row is imaged left to right, MSB to LSB, right-justified (i.e., +bit 4 is leftmost, bit 0 is rightmost, and bits 7-5 are unused). + +You may reference these characters simply by including them in +the data you write() to the device, e.g. + + write(fd, "\x01,\x02Hi, there!\n", 13); + +Example of programming a character image: + + static const struct slcd_createchar_s custom_char = + { 4, { 0x04, 0x0e, 0x15, 0x04, 0x04, 0x04, 0x04, 0x00 } }; /* up arrow */ + + ret = ioctl(fd, SLCDIOC_CREATECHAR, (unsigned long)custom_char); + +Now character '\x04' will display as an 'up arrow'. + +Note, you might consider avoiding the use of code point 0x00 unless +you absolutely need it, because the embedded nul character can cause +problems. The driver, and write() apis are binary, and unaffected, +but things like printf() and puts() assume C-style strings, and are +affected. + +Troubleshooting +=============== + +* Check your I2C address. turn on debugging output so you can see + bus timeouts that suggest a non-responsive slave. +* Check your board wiring and configuration specification. Buzz + out the lines if you have to. +* Remember to set the (ros,cols) geometry in pcf8574_lcd_backpack_config_s + before registration of the driver, since this cannot be determined + programmatically. +* If the driver registration step seems to 'hang' it could be the I2C + driver performing retries due to no response from the LCD backpack. Check + the address. Turning on debug output for I2C can help make this visible. +* Don't forget to check the 'contrast' potentiometer. The voltage at the + central wiper should be approximately 0.3 V - 2.4 V, but the actual value + is is dependent on the physics of the attached LCD module. The useful + range of voltages at this pin for any given LCD is quite narrow, and + outside that range there will be nothing visible on the display, so most + of the turn range of the pot is non-useful. It's less 'contrast' and + more 'LCD segment drive bias'. diff --git a/drivers/lcd/st7565.c b/drivers/lcd/st7565.c index 6b4a1c02883..323fda4c73a 100644 --- a/drivers/lcd/st7565.c +++ b/drivers/lcd/st7565.c @@ -1017,7 +1017,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd, /* Follow NHD-C12864KGZ DISPLAY INITIALIZATION... */ -#ifdef CONFIG_NHD_C12864KGZ +#if defined(CONFIG_NHD_C12864KGZ) (void)st7565_send_one_data(priv, ST7565_BIAS_1_9); @@ -1027,7 +1027,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd, (void)st7565_send_one_data(priv, ST7565_POWERCTRL_INT); (void)st7565_send_one_data(priv, ST7565_SETSTARTLINE); -#elif CONFIG_ERC_12864_3 +#elif defined(CONFIG_ERC_12864_3) (void)st7565_send_one_data(priv, ST7565_ADCNORMAL); (void)st7565_send_one_data(priv, ST7565_SETCOMREVERSE); diff --git a/drivers/leds/userled_upper.c b/drivers/leds/userled_upper.c index 5c8f0a0997b..68fd8d5f7a6 100644 --- a/drivers/leds/userled_upper.c +++ b/drivers/leds/userled_upper.c @@ -140,12 +140,15 @@ static const struct file_operations userled_fops = { userled_open, /* open */ userled_close, /* close */ - 0, /* read */ + NULL, /* read */ userled_write, /* write */ - 0, /* seek */ + NULL, /* seek */ userled_ioctl /* ioctl */ #ifndef CONFIG_DISABLE_POLL - , 0 /* poll */ + , NULL /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ #endif }; @@ -441,7 +444,7 @@ static int userled_ioctl(FAR struct file *filep, int cmd, unsigned long arg) /* Check that a valid LED is being set */ - if (led < 8 * sizeof(userled_set_t) && + if ((size_t)led < 8 * sizeof(userled_set_t) && (priv->lu_supported & (1 << led)) != 0) { /* Update the LED state */ diff --git a/drivers/loop/losetup.c b/drivers/loop/losetup.c index dadd44891cd..ccc75a7971a 100644 --- a/drivers/loop/losetup.c +++ b/drivers/loop/losetup.c @@ -107,16 +107,19 @@ static int loop_geometry(FAR struct inode *inode, static const struct block_operations g_bops = { - loop_open, /* open */ - loop_close, /* close */ - loop_read, /* read */ + loop_open, /* open */ + loop_close, /* close */ + loop_read, /* read */ #ifdef CONFIG_FS_WRITABLE - loop_write, /* write */ + loop_write, /* write */ #else - NULL, /* write */ + NULL, /* write */ #endif loop_geometry, /* geometry */ - NULL /* ioctl */ + NULL /* ioctl */ +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ +#endif }; /**************************************************************************** diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 89f130ccb16..44fd420d7ba 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -397,6 +397,23 @@ config AT45DB_PWRSAVE endif # MTD_AT45DB +config MTD_IS25XP + bool "SPI-based IS25XP FLASH" + default n + select SPI + +if MTD_IS25XP + +config IS25XP_SPIMODE + int "IS25 SPI Mode" + default 0 + +config IS25XP_SPIFREQUENCY + int "IS25 SPI Frequency" + default 20000000 + +endif # MTD_IS25XP + config MTD_M25P bool "SPI-based M25P FLASH" default n @@ -496,7 +513,7 @@ config MTD_N25QXXX default n ---help--- Support the N25Q016A, N25Q032A, N25Q064A, N25Q128A, N25Q256A - + if MTD_N25QXXX @@ -814,6 +831,11 @@ config SST26_MEMORY_TYPE The memory type for SST26VF0xx series is 0x26, but this can be modified if needed to support compatible devices from different manufacturers. +config SST26_DEBUG + bool "Debug output from the SST26 driver" + depends on DEBUG_FS + default n + endif # MTD_SST26 config MTD_SST39FV diff --git a/drivers/mtd/Make.defs b/drivers/mtd/Make.defs index 1d1ba6d26b7..9a8396a7fbf 100644 --- a/drivers/mtd/Make.defs +++ b/drivers/mtd/Make.defs @@ -39,7 +39,7 @@ ifeq ($(CONFIG_MTD),y) -CSRCS += at45db.c flash_eraseall.c ftl.c m25px.c ramtron.c mtd_config.c +CSRCS += at45db.c ftl.c m25px.c ramtron.c mtd_config.c ifeq ($(CONFIG_MTD_PARTITION),y) CSRCS += mtd_partition.c @@ -112,6 +112,10 @@ ifeq ($(CONFIG_MTD_N25QXXX),y) CSRCS += n25qxxx.c endif +ifeq ($(CONFIG_MTD_IS25XP),y) +CSRCS += is25xp.c +endif + ifeq ($(CONFIG_MTD_SMART),y) ifeq ($(CONFIG_FS_SMARTFS),y) CSRCS += smart.c diff --git a/drivers/mtd/is25xp.c b/drivers/mtd/is25xp.c new file mode 100644 index 00000000000..0c685d3ef02 --- /dev/null +++ b/drivers/mtd/is25xp.c @@ -0,0 +1,1002 @@ +/************************************************************************************ + * drivers/mtd/is25xp.c + * Driver for SPI-based IS25LPxx parts 32MBit and larger. + * + * Copyright (C) 2016 Marten Svanfeldt. All rights reserved. + * + * Copyright (C) 2009-2011, 2013 Gregory Nutt. All rights reserved. + * Author: Ken Pettit + * + * Copied from / based on m25px.c and sst25.c drivers written by + * Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ + +/* Configuration ********************************************************************/ +/* Per the data sheet, IS25xP parts can be driven with either SPI mode 0 (CPOL=0 and + * CPHA=0) or mode 3 (CPOL=1 and CPHA=1). So you may need to specify + * CONFIG_IS25XP_SPIMODE to select the best mode for your device. If + * CONFIG_IS25XP_SPIMODE is not defined, mode 0 will be used. + */ + +#ifndef CONFIG_IS25XP_SPIMODE +# define CONFIG_IS25XP_SPIMODE SPIDEV_MODE0 +#endif + +/* SPI Frequency. May be up to 50MHz. */ + +#ifndef CONFIG_IS25XP_SPIFREQUENCY +# define CONFIG_IS25XP_SPIFREQUENCY 20000000 +#endif + +/* IS25 Registers *******************************************************************/ +/* Indentification register values */ + +#define IS25_MANUFACTURER 0x9d +#define IS25_MEMORY_TYPE 0x60 + +/* IS25LP064 capacity is 8,388,608 bytes: + * (2,048 sectors) * (4,096 bytes per sector) + * (32,768 pages) * (256 bytes per page) + */ + +#define IS25_IS25LP064_CAPACITY 0x17 +#define IS25_IS25LP064_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4,096 */ +#define IS25_IS25LP064_NSECTORS 2048 +#define IS25_IS25LP064_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */ +#define IS25_IS25LP064_NPAGES 32768 + +/* IS25LP128 capacity is 16,777,216 bytes: + * (4,096 sectors) * (4,096 bytes per sector) + * (65,536 pages) * (256 bytes per page) + */ + +#define IS25_IS25LP128_CAPACITY 0x18 +#define IS25_IS25LP128_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4,096 */ +#define IS25_IS25LP128_NSECTORS 4096 +#define IS25_IS25LP128_PAGE_SHIFT 8 /* Page size 1 << 8 = 256 */ +#define IS25_IS25LP128_NPAGES 65536 + + +/* Instructions */ +/* Command Value N Description Addr Dummy Data */ +#define IS25_WREN 0x06 /* 1 Write Enable 0 0 0 */ +#define IS25_WRDI 0x04 /* 1 Write Disable 0 0 0 */ +#define IS25_RDID 0x9f /* 1 Read Identification 0 0 1-3 */ +#define IS25_RDSR 0x05 /* 1 Read Status Register 0 0 >=1 */ +//#define IS25_EWSR 0x50 /* 1 Write enable status 0 0 0 */ +#define IS25_WRSR 0x01 /* 1 Write Status Register 0 0 1 */ +#define IS25_READ 0x03 /* 1 Read Data Bytes 3 0 >=1 */ +#define IS25_FAST_READ 0x0b /* 1 Higher speed read 3 1 >=1 */ +#define IS25_PP 0x02 /* 1 Page Program 3 0 1-256 */ +#define IS25_SE 0x20 /* 1 Sector Erase 3 0 0 */ +#define IS25_BE32 0x52 /* 2 32K Block Erase 3 0 0 */ +#define IS25_BE64 0xD8 /* 2 64K Block Erase 3 0 0 */ +#define IS25_CER 0xC7 /* 1 Chip Erase 0 0 0 */ + +/* NOTE 1: All parts. + * NOTE 2: In IS25XP terminology, 0x52 and 0xd8 are block erase and 0x20 + * is a sector erase. Block erase provides a faster way to erase + * multiple 4K sectors at once. + */ + +/* Status register bit definitions */ + +#define IS25_SR_WIP (1 << 0) /* Bit 0: Write in progress bit */ +#define IS25_SR_WEL (1 << 1) /* Bit 1: Write enable latch bit */ +#define IS25_SR_BP_SHIFT (2) /* Bits 2-5: Block protect bits */ +#define IS25_SR_BP_MASK (15 << IS25_SR_BP_SHIFT) +# define IS25_SR_BP_NONE (0 << IS25_SR_BP_SHIFT) /* Unprotected */ +# define IS25_SR_BP_UPPER128th (1 << IS25_SR_BP_SHIFT) /* Upper 128th */ +# define IS25_SR_BP_UPPER64th (2 << IS25_SR_BP_SHIFT) /* Upper 64th */ +# define IS25_SR_BP_UPPER32nd (3 << IS25_SR_BP_SHIFT) /* Upper 32nd */ +# define IS25_SR_BP_UPPER16th (4 << IS25_SR_BP_SHIFT) /* Upper 16th */ +# define IS25_SR_BP_UPPER8th (5 << IS25_SR_BP_SHIFT) /* Upper 8th */ +# define IS25_SR_BP_UPPERQTR (6 << IS25_SR_BP_SHIFT) /* Upper quarter */ +# define IS25_SR_BP_UPPERHALF (7 << IS25_SR_BP_SHIFT) /* Upper half */ +# define IS25_SR_BP_ALL (8 << IS25_SR_BP_SHIFT) /* All sectors */ +#define IS25_SR_QE (1 << 6) /* Bit 6: Quad (QSPI) enable bit */ +#define IS25_SR_SRWD (1 << 7) /* Bit 7: Status register write protect */ + +#define IS25_DUMMY 0xa5 + +/************************************************************************************ + * Private Types + ************************************************************************************/ + +/* This type represents the state of the MTD device. The struct mtd_dev_s + * must appear at the beginning of the definition so that you can freely + * cast between pointers to struct mtd_dev_s and struct is25xp_dev_s. + */ + +struct is25xp_dev_s +{ + struct mtd_dev_s mtd; /* MTD interface */ + FAR struct spi_dev_s *dev; /* Saved SPI interface instance */ + uint8_t sectorshift; /* 12 */ + uint8_t pageshift; /* 8 */ + uint16_t nsectors; /* 2,048 or 4,096 */ + uint32_t npages; /* 32,768 or 65,536 */ + uint8_t lastwaswrite; /* Indicates if last operation was write */ +}; + +/************************************************************************************ + * Private Function Prototypes + ************************************************************************************/ + +/* Helpers */ + +static void is25xp_lock(FAR struct spi_dev_s *dev); +static inline void is25xp_unlock(FAR struct spi_dev_s *dev); +static inline int is25xp_readid(struct is25xp_dev_s *priv); +static void is25xp_waitwritecomplete(struct is25xp_dev_s *priv); +static void is25xp_writeenable(struct is25xp_dev_s *priv); +static inline void is25xp_sectorerase(struct is25xp_dev_s *priv, off_t offset, uint8_t type); +static inline int is25xp_bulkerase(struct is25xp_dev_s *priv); +static inline void is25xp_pagewrite(struct is25xp_dev_s *priv, FAR const uint8_t *buffer, + off_t offset); + +/* MTD driver methods */ + +static int is25xp_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks); +static ssize_t is25xp_bread(FAR struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, FAR uint8_t *buf); +static ssize_t is25xp_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, + size_t nblocks, FAR const uint8_t *buf); +static ssize_t is25xp_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, + FAR uint8_t *buffer); +#ifdef CONFIG_MTD_BYTE_WRITE +static ssize_t is25xp_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, + FAR const uint8_t *buffer); +#endif +static int is25xp_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg); + +/************************************************************************************ + * Name: is25xp_lock + ************************************************************************************/ + +static void is25xp_lock(FAR struct spi_dev_s *dev) +{ + /* On SPI busses where there are multiple devices, it will be necessary to + * lock SPI to have exclusive access to the busses for a sequence of + * transfers. The bus should be locked before the chip is selected. + * + * This is a blocking call and will not return until we have exclusiv access to + * the SPI buss. We will retain that exclusive access until the bus is unlocked. + */ + + (void)SPI_LOCK(dev, true); + + /* After locking the SPI bus, the we also need call the setfrequency, setbits, and + * setmode methods to make sure that the SPI is properly configured for the device. + * If the SPI buss is being shared, then it may have been left in an incompatible + * state. + */ + + SPI_SETMODE(dev, CONFIG_IS25XP_SPIMODE); + SPI_SETBITS(dev, 8); + (void)SPI_HWFEATURES(dev, 0); + (void)SPI_SETFREQUENCY(dev, CONFIG_IS25XP_SPIFREQUENCY); +} + +/************************************************************************************ + * Name: is25xp_unlock + ************************************************************************************/ + +static inline void is25xp_unlock(FAR struct spi_dev_s *dev) +{ + (void)SPI_LOCK(dev, false); +} + +/************************************************************************************ + * Name: is25xp_readid + ************************************************************************************/ + +static inline int is25xp_readid(struct is25xp_dev_s *priv) +{ + uint16_t manufacturer; + uint16_t memory; + uint16_t capacity; + + fvdbg("priv: %p\n", priv); + + /* Lock the SPI bus, configure the bus, and select this FLASH part. */ + + is25xp_lock(priv->dev); + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send the "Read ID (RDID)" command and read the first three ID bytes */ + + (void)SPI_SEND(priv->dev, IS25_RDID); + manufacturer = SPI_SEND(priv->dev, IS25_DUMMY); + memory = SPI_SEND(priv->dev, IS25_DUMMY); + capacity = SPI_SEND(priv->dev, IS25_DUMMY); + + /* Deselect the FLASH and unlock the bus */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + is25xp_unlock(priv->dev); + + fvdbg("manufacturer: %02x memory: %02x capacity: %02x\n", + manufacturer, memory, capacity); + + /* Check for a valid manufacturer and memory type */ + + if (manufacturer == IS25_MANUFACTURER && memory == IS25_MEMORY_TYPE) + { + /* Okay.. is it a FLASH capacity that we understand? */ + + if (capacity == IS25_IS25LP064_CAPACITY) + { + /* Save the FLASH geometry */ + + priv->sectorshift = IS25_IS25LP064_SECTOR_SHIFT; + priv->nsectors = IS25_IS25LP064_NSECTORS; + priv->pageshift = IS25_IS25LP064_PAGE_SHIFT; + priv->npages = IS25_IS25LP064_NPAGES; + return OK; + } + else if (capacity == IS25_IS25LP128_CAPACITY) + { + /* Save the FLASH geometry */ + + priv->sectorshift = IS25_IS25LP128_SECTOR_SHIFT; + priv->nsectors = IS25_IS25LP128_NSECTORS; + priv->pageshift = IS25_IS25LP128_PAGE_SHIFT; + priv->npages = IS25_IS25LP128_NPAGES; + return OK; + } + } + + return -ENODEV; +} + +/************************************************************************************ + * Name: is25xp_waitwritecomplete + ************************************************************************************/ + +static void is25xp_waitwritecomplete(struct is25xp_dev_s *priv) +{ + uint8_t status; + + /* No need to check if no write / erase was done */ + +#if 0 + if (!priv->lastwaswrite) + { + return; + } +#endif + + /* Are we the only device on the bus? */ + +#ifdef CONFIG_SPI_OWNBUS + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Read Status Register (RDSR)" command */ + + (void)SPI_SEND(priv->dev, IS25_RDSR); + + /* Loop as long as the memory is busy with a write cycle */ + + do + { + /* Send a dummy byte to generate the clock needed to shift out the status */ + + status = SPI_SEND(priv->dev, IS25_DUMMY); + } + while ((status & IS25_SR_WIP) != 0); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + +#else + + /* Loop as long as the memory is busy with a write cycle */ + + do + { + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Read Status Register (RDSR)" command */ + + (void)SPI_SEND(priv->dev, IS25_RDSR); + + /* Send a dummy byte to generate the clock needed to shift out the status */ + + status = SPI_SEND(priv->dev, IS25_DUMMY); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + + /* Given that writing could take up to few tens of milliseconds, and erasing + * could take more. The following short delay in the "busy" case will allow + * other peripherals to access the SPI bus. + */ + + if ((status & IS25_SR_WIP) != 0) + { + is25xp_unlock(priv->dev); + usleep(1000); + is25xp_lock(priv->dev); + } + } + while ((status & IS25_SR_WIP) != 0); +#endif + + priv->lastwaswrite = false; + + fvdbg("Complete\n"); +} + +/************************************************************************************ + * Name: is25xp_writeenable + ************************************************************************************/ + +static void is25xp_writeenable(struct is25xp_dev_s *priv) +{ + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Write Enable (WREN)" command */ + + (void)SPI_SEND(priv->dev, IS25_WREN); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + fvdbg("Enabled\n"); +} + +/************************************************************************************ + * Name: is25xp_unprotect + ************************************************************************************/ + +static void is25xp_unprotect(struct is25xp_dev_s *priv) +{ + /* Make writeable */ + + is25xp_writeenable(priv); + + /* Send "Write status (WRSR)" */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + SPI_SEND(priv->dev, IS25_WRSR); + + /* Followed by the new status value */ + + SPI_SEND(priv->dev, 0); + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); +} + +/************************************************************************************ + * Name: is25xp_sectorerase + ************************************************************************************/ + +static void is25xp_sectorerase(struct is25xp_dev_s *priv, off_t sector, uint8_t type) +{ + off_t offset; + + offset = sector << priv->sectorshift; + + fvdbg("sector: %08lx\n", (long)sector); + + /* Wait for any preceding write to complete. We could simplify things by + * perform this wait at the end of each write operation (rather than at + * the beginning of ALL operations), but have the wait first will slightly + * improve performance. + */ + + is25xp_waitwritecomplete(priv); + + /* Send write enable instruction */ + + is25xp_writeenable(priv); + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send the "Sector Erase (SE)" or Sub-Sector Erase (SSE) instruction + * that was passed in as the erase type. + */ + + (void)SPI_SEND(priv->dev, type); + + /* Send the sector offset high byte first. For all of the supported + * parts, the sector number is completely contained in the first byte + * and the values used in the following two bytes don't really matter. + */ + + (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff); + (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff); + (void)SPI_SEND(priv->dev, offset & 0xff); + priv->lastwaswrite = true; + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + fvdbg("Erased\n"); +} + +/************************************************************************************ + * Name: is25xp_bulkerase + ************************************************************************************/ + +static inline int is25xp_bulkerase(struct is25xp_dev_s *priv) +{ + fvdbg("priv: %p\n", priv); + + /* Wait for any preceding write to complete. We could simplify things by + * perform this wait at the end of each write operation (rather than at + * the beginning of ALL operations), but have the wait first will slightly + * improve performance. + */ + + is25xp_waitwritecomplete(priv); + + /* Send write enable instruction */ + + is25xp_writeenable(priv); + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send the "Chip Erase (CER)" instruction */ + + (void)SPI_SEND(priv->dev, IS25_CER); + + /* Deselect the FLASH */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + is25xp_waitwritecomplete(priv); + + fvdbg("Return: OK\n"); + return OK; +} + +/************************************************************************************ + * Name: is25xp_pagewrite + ************************************************************************************/ + +static inline void is25xp_pagewrite(struct is25xp_dev_s *priv, FAR const uint8_t *buffer, + off_t page) +{ + off_t offset = page << priv->pageshift; + + fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset); + + /* Wait for any preceding write to complete. We could simplify things by + * perform this wait at the end of each write operation (rather than at + * the beginning of ALL operations), but have the wait first will slightly + * improve performance. + */ + + is25xp_waitwritecomplete(priv); + + /* Enable the write access to the FLASH */ + + is25xp_writeenable(priv); + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Page Program (PP)" command */ + + (void)SPI_SEND(priv->dev, IS25_PP); + + /* Send the page offset high byte first. */ + + (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff); + (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff); + (void)SPI_SEND(priv->dev, offset & 0xff); + + /* Then write the specified number of bytes */ + + SPI_SNDBLOCK(priv->dev, buffer, 1 << priv->pageshift); + priv->lastwaswrite = true; + + /* Deselect the FLASH: Chip Select high */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + fvdbg("Written\n"); +} + +/************************************************************************************ + * Name: is25xp_bytewrite + ************************************************************************************/ + +#ifdef CONFIG_MTD_BYTE_WRITE +static inline void is25xp_bytewrite(struct is25xp_dev_s *priv, FAR const uint8_t *buffer, + off_t offset, uint16_t count) +{ + fvdbg("offset: %08lx count:%d\n", (long)offset, count); + + /* Wait for any preceding write to complete. We could simplify things by + * perform this wait at the end of each write operation (rather than at + * the beginning of ALL operations), but have the wait first will slightly + * improve performance. + */ + + is25xp_waitwritecomplete(priv); + + /* Enable the write access to the FLASH */ + + is25xp_writeenable(priv); + + /* Select this FLASH part */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Page Program (PP)" command */ + + (void)SPI_SEND(priv->dev, IS25_PP); + + /* Send the page offset high byte first. */ + + (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff); + (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff); + (void)SPI_SEND(priv->dev, offset & 0xff); + + /* Then write the specified number of bytes */ + + SPI_SNDBLOCK(priv->dev, buffer, count); + priv->lastwaswrite = true; + + /* Deselect the FLASH: Chip Select high */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + fvdbg("Written\n"); +} +#endif + +/************************************************************************************ + * Name: is25xp_erase + ************************************************************************************/ + +static int is25xp_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks) +{ + FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev; + size_t blocksleft = nblocks; + + fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + + /* Lock access to the SPI bus until we complete the erase */ + + is25xp_lock(priv->dev); + while (blocksleft > 0) + { + size_t sectorboundry; + size_t blkper; + + /* We will erase in either 4K sectors or 32K or 64K blocks depending + * on the largest unit we can use given the startblock and nblocks. + * This will reduce erase time (in the event we have partitions + * enabled and are doing a bulk erase which is translated into + * a block erase operation). + */ + + /* Test for 64K alignment */ + + blkper = 64 / 4; + sectorboundry = (startblock + blkper - 1) / blkper; + sectorboundry *= blkper; + + /* If we are on a sector boundry and have at least a full sector + * of blocks left to erase, then we can do a full sector erase. + */ + + if (startblock == sectorboundry && blocksleft >= blkper) + { + /* Do a 64k block erase */ + + is25xp_sectorerase(priv, startblock, IS25_BE64); + startblock += blkper; + blocksleft -= blkper; + continue; + } + + /* Test for 32K block alignment */ + + blkper = 32 / 4; + sectorboundry = (startblock + blkper - 1) / blkper; + sectorboundry *= blkper; + + if (startblock == sectorboundry && blocksleft >= blkper) + { + /* Do a 32k block erase */ + + is25xp_sectorerase(priv, startblock, IS25_BE32); + startblock += blkper; + blocksleft -= blkper; + continue; + } + else + { + /* Just do a sector erase */ + + is25xp_sectorerase(priv, startblock, IS25_SE); + startblock++; + blocksleft--; + continue; + } + } + + is25xp_unlock(priv->dev); + return (int)nblocks; +} + +/************************************************************************************ + * Name: is25xp_bread + ************************************************************************************/ + +static ssize_t is25xp_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, + FAR uint8_t *buffer) +{ + FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev; + ssize_t nbytes; + + fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + + /* On this device, we can handle the block read just like the byte-oriented read */ + + nbytes = is25xp_read(dev, startblock << priv->pageshift, nblocks << priv->pageshift, buffer); + if (nbytes > 0) + { + return nbytes >> priv->pageshift; + } + + return (int)nbytes; +} + +/************************************************************************************ + * Name: is25xp_bwrite + ************************************************************************************/ + +static ssize_t is25xp_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks, + FAR const uint8_t *buffer) +{ + FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev; + size_t blocksleft = nblocks; + size_t pagesize = 1 << priv->pageshift; + + fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + + /* Lock the SPI bus and write each page to FLASH */ + + is25xp_lock(priv->dev); + while (blocksleft-- > 0) + { + is25xp_pagewrite(priv, buffer, startblock); + buffer += pagesize; + startblock++; + } + + is25xp_unlock(priv->dev); + return nblocks; +} + +/************************************************************************************ + * Name: is25xp_read + ************************************************************************************/ + +static ssize_t is25xp_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, + FAR uint8_t *buffer) +{ + FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev; + + fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes); + + /* Wait for any preceding write to complete. We could simplify things by + * perform this wait at the end of each write operation (rather than at + * the beginning of ALL operations), but have the wait first will slightly + * improve performance. + */ + + if (priv->lastwaswrite) + { + is25xp_waitwritecomplete(priv); + } + + /* Lock the SPI bus and select this FLASH part */ + + is25xp_lock(priv->dev); + SPI_SELECT(priv->dev, SPIDEV_FLASH, true); + + /* Send "Read from Memory " instruction */ + + (void)SPI_SEND(priv->dev, IS25_READ); + + /* Send the page offset high byte first. */ + + (void)SPI_SEND(priv->dev, (offset >> 16) & 0xff); + (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff); + (void)SPI_SEND(priv->dev, offset & 0xff); + + /* Then read all of the requested bytes */ + + SPI_RECVBLOCK(priv->dev, buffer, nbytes); + + /* Deselect the FLASH and unlock the SPI bus */ + + SPI_SELECT(priv->dev, SPIDEV_FLASH, false); + is25xp_unlock(priv->dev); + fvdbg("return nbytes: %d\n", (int)nbytes); + return nbytes; +} + +/************************************************************************************ + * Name: is25xp_write + ************************************************************************************/ + +#ifdef CONFIG_MTD_BYTE_WRITE +static ssize_t is25xp_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes, + FAR const uint8_t *buffer) +{ + FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev; + int startpage; + int endpage; + int count; + int index; + int pagesize; + int bytestowrite; + + fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes); + + /* We must test if the offset + count crosses one or more pages + * and perform individual writes. The devices can only write in + * page increments. + */ + + startpage = offset / (1 << priv->pageshift); + endpage = (offset + nbytes) / (1 << priv->pageshift); + + if (startpage == endpage) + { + /* All bytes within one programmable page. Just do the write. */ + + is25xp_bytewrite(priv, buffer, offset, nbytes); + } + else + { + /* Write the 1st partial-page */ + + count = nbytes; + pagesize = (1 << priv->pageshift); + bytestowrite = pagesize - (offset & (pagesize-1)); + is25xp_bytewrite(priv, buffer, offset, bytestowrite); + + /* Update offset and count */ + + offset += bytestowrite; + count -= bytestowrite; + index = bytestowrite; + + /* Write full pages */ + + while (count >= pagesize) + { + is25xp_bytewrite(priv, &buffer[index], offset, pagesize); + + /* Update offset and count */ + + offset += pagesize; + count -= pagesize; + index += pagesize; + } + + /* Now write any partial page at the end */ + + if (count > 0) + { + is25xp_bytewrite(priv, &buffer[index], offset, count); + } + + priv->lastwaswrite = true; + } + + return nbytes; +} +#endif /* CONFIG_MTD_BYTE_WRITE */ + +/************************************************************************************ + * Name: is25xp_ioctl + ************************************************************************************/ + +static int is25xp_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) +{ + FAR struct is25xp_dev_s *priv = (FAR struct is25xp_dev_s *)dev; + int ret = -EINVAL; /* Assume good command with bad parameters */ + + fvdbg("cmd: %d \n", cmd); + + switch (cmd) + { + case MTDIOC_GEOMETRY: + { + FAR struct mtd_geometry_s *geo = (FAR struct mtd_geometry_s *)((uintptr_t)arg); + if (geo) + { + /* Populate the geometry structure with information need to know + * the capacity and how to access the device. + * + * NOTE: that the device is treated as though it where just an array + * of fixed size blocks. That is most likely not true, but the client + * will expect the device logic to do whatever is necessary to make it + * appear so. + */ + + geo->blocksize = (1 << priv->pageshift); + geo->erasesize = (1 << priv->sectorshift); + geo->neraseblocks = priv->nsectors; + + ret = OK; + + fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n", + geo->blocksize, geo->erasesize, geo->neraseblocks); + } + } + break; + + case MTDIOC_BULKERASE: + { + /* Erase the entire device */ + + is25xp_lock(priv->dev); + ret = is25xp_bulkerase(priv); + is25xp_unlock(priv->dev); + } + break; + + case MTDIOC_XIPBASE: + default: + ret = -ENOTTY; /* Bad command */ + break; + } + + fvdbg("return %d\n", ret); + return ret; +} + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: is25xp_initialize + * + * Description: + * Create an initialize MTD device instance. MTD devices are not registered + * in the file system, but are created as instances that can be bound to + * other functions (such as a block or character driver front end). + * + ************************************************************************************/ + +FAR struct mtd_dev_s *is25xp_initialize(FAR struct spi_dev_s *dev) +{ + FAR struct is25xp_dev_s *priv; + int ret; + + fvdbg("dev: %p\n", dev); + + /* Allocate a state structure (we allocate the structure instead of using + * a fixed, static allocation so that we can handle multiple FLASH devices. + * The current implementation would handle only one FLASH part per SPI + * device (only because of the SPIDEV_FLASH definition) and so would have + * to be extended to handle multiple FLASH parts on the same SPI bus. + */ + + priv = (FAR struct is25xp_dev_s *)kmm_zalloc(sizeof(struct is25xp_dev_s)); + if (priv) + { + /* Initialize the allocated structure. (unsupported methods were + * nullified by kmm_zalloc). + */ + + priv->mtd.erase = is25xp_erase; + priv->mtd.bread = is25xp_bread; + priv->mtd.bwrite = is25xp_bwrite; + priv->mtd.read = is25xp_read; +#ifdef CONFIG_MTD_BYTE_WRITE + priv->mtd.write = is25xp_write; +#endif + priv->mtd.ioctl = is25xp_ioctl; + priv->dev = dev; + priv->lastwaswrite = false; + + /* Deselect the FLASH */ + + SPI_SELECT(dev, SPIDEV_FLASH, false); + + /* Identify the FLASH chip and get its capacity */ + + ret = is25xp_readid(priv); + if (ret != OK) + { + /* Unrecognized! Discard all of that work we just did and return NULL */ + + fdbg("Unrecognized\n"); + kmm_free(priv); + priv = NULL; + } + else + { + /* Make sure that the FLASH is unprotected so that we can write into it */ + + is25xp_unprotect(priv); + } + } + + /* Register the MTD with the procfs system if enabled */ + +#ifdef CONFIG_MTD_REGISTRATION + mtd_register(&priv->mtd, "is25xp"); +#endif + + /* Return the implementation-specific state structure as the MTD device */ + + fvdbg("Return %p\n", priv); + return (FAR struct mtd_dev_s *)priv; +} + diff --git a/drivers/mtd/sst26.c b/drivers/mtd/sst26.c index 6790af73763..94226064ccd 100644 --- a/drivers/mtd/sst26.c +++ b/drivers/mtd/sst26.c @@ -205,6 +205,20 @@ #define SST26_DUMMY 0xa5 +/* Debug ****************************************************************************/ + +#ifdef CONFIG_SST26_DEBUG +# define sstdbg(format, ...) dbg(format, ##__VA_ARGS__) +# define sstlldbg(format, ...) lldbg(format, ##__VA_ARGS__) +# define sstvdbg(format, ...) vdbg(format, ##__VA_ARGS__) +# define sstllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__) +#else +# define sstdbg(x...) +# define sstlldbg(x...) +# define sstvdbg(x...) +# define sstllvdbg(x...) +#endif + /************************************************************************************ * Private Types ************************************************************************************/ @@ -307,7 +321,7 @@ static inline int sst26_readid(struct sst26_dev_s *priv) uint16_t memory; uint16_t capacity; - fvdbg("priv: %p\n", priv); + sstvdbg("priv: %p\n", priv); /* Lock the SPI bus, configure the bus, and select this FLASH part. */ @@ -402,7 +416,7 @@ static void sst26_waitwritecomplete(struct sst26_dev_s *priv) } while ((status & SST26_SR_WIP) != 0); - fvdbg("Complete\n"); + sstvdbg("Complete\n"); } /************************************************************************************ @@ -425,7 +439,7 @@ static void sst26_globalunlock(struct sst26_dev_s *priv) SPI_SELECT(priv->dev, SPIDEV_FLASH, false); - fvdbg("Device unlocked.\n"); + sstvdbg("Device unlocked.\n"); } /************************************************************************************ @@ -446,7 +460,7 @@ static void sst26_writeenable(struct sst26_dev_s *priv) SPI_SELECT(priv->dev, SPIDEV_FLASH, false); - fvdbg("Enabled\n"); + sstvdbg("Enabled\n"); } /************************************************************************************ @@ -459,7 +473,7 @@ static void sst26_sectorerase(struct sst26_dev_s *priv, off_t sector, uint8_t ty offset = sector << priv->sectorshift; - fvdbg("sector: %08lx\n", (long)sector); + sstvdbg("sector: %08lx\n", (long)sector); /* Send write enable instruction */ @@ -490,7 +504,7 @@ static void sst26_sectorerase(struct sst26_dev_s *priv, off_t sector, uint8_t ty sst26_waitwritecomplete(priv); - fvdbg("Erased\n"); + sstvdbg("Erased\n"); } /************************************************************************************ @@ -499,7 +513,7 @@ static void sst26_sectorerase(struct sst26_dev_s *priv, off_t sector, uint8_t ty static inline int sst26_chiperase(struct sst26_dev_s *priv) { - fvdbg("priv: %p\n", priv); + sstvdbg("priv: %p\n", priv); /* Send write enable instruction */ @@ -519,7 +533,7 @@ static inline int sst26_chiperase(struct sst26_dev_s *priv) sst26_waitwritecomplete(priv); - fvdbg("Return: OK\n"); + sstvdbg("Return: OK\n"); return OK; } @@ -532,7 +546,7 @@ static inline void sst26_pagewrite(struct sst26_dev_s *priv, { off_t offset = page << priv->pageshift; - fvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset); + sstvdbg("page: %08lx offset: %08lx\n", (long)page, (long)offset); /* Enable the write access to the FLASH */ @@ -562,7 +576,7 @@ static inline void sst26_pagewrite(struct sst26_dev_s *priv, sst26_waitwritecomplete(priv); - fvdbg("Written\n"); + sstvdbg("Written\n"); } /************************************************************************************ @@ -574,7 +588,7 @@ static inline void sst26_bytewrite(struct sst26_dev_s *priv, FAR const uint8_t *buffer, off_t offset, uint16_t count) { - fvdbg("offset: %08lx count:%d\n", (long)offset, count); + sstvdbg("offset: %08lx count:%d\n", (long)offset, count); /* Enable the write access to the FLASH */ @@ -605,7 +619,7 @@ static inline void sst26_bytewrite(struct sst26_dev_s *priv, sst26_waitwritecomplete(priv); - fvdbg("Written\n"); + sstvdbg("Written\n"); } #endif @@ -620,7 +634,7 @@ static int sst26_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nbloc FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev; size_t blocksleft = nblocks; - fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + sstvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); /* Lock access to the SPI bus until we complete the erase */ @@ -650,7 +664,7 @@ static ssize_t sst26_bread(FAR struct mtd_dev_s *dev, off_t startblock, FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev; ssize_t nbytes; - fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + sstvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); /* On this device, we can handle the block read just like the byte-oriented read */ @@ -675,7 +689,7 @@ static ssize_t sst26_bwrite(FAR struct mtd_dev_s *dev, off_t startblock, size_t size_t blocksleft = nblocks; size_t pagesize = 1 << priv->pageshift; - fvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); + sstvdbg("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks); /* Lock the SPI bus and write each page to FLASH */ @@ -700,7 +714,7 @@ static ssize_t sst26_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes { FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev; - fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes); + sstvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes); /* Lock the SPI bus and select this FLASH part */ @@ -717,7 +731,8 @@ static ssize_t sst26_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes (void)SPI_SEND(priv->dev, (offset >> 8) & 0xff); (void)SPI_SEND(priv->dev, offset & 0xff); - /* dummy read */ + /* Dummy read */ + (void)SPI_SEND(priv->dev, SST26_DUMMY); /* Then read all of the requested bytes */ @@ -728,7 +743,7 @@ static ssize_t sst26_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes SPI_SELECT(priv->dev, SPIDEV_FLASH, false); sst26_unlock(priv->dev); - fvdbg("return nbytes: %d\n", (int)nbytes); + sstvdbg("return nbytes: %d\n", (int)nbytes); return nbytes; } @@ -748,7 +763,7 @@ static ssize_t sst26_write(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyte int pagesize; int bytestowrite; - fvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes); + sstvdbg("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes); /* We must test if the offset + count crosses one or more pages * and perform individual writes. The devices can only write in @@ -815,7 +830,7 @@ static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) FAR struct sst26_dev_s *priv = (FAR struct sst26_dev_s *)dev; int ret = -EINVAL; /* Assume good command with bad parameters */ - fvdbg("cmd: %d \n", cmd); + sstvdbg("cmd: %d \n", cmd); switch (cmd) { @@ -839,8 +854,8 @@ static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) ret = OK; - fvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n", - geo->blocksize, geo->erasesize, geo->neraseblocks); + sstvdbg("blocksize: %d erasesize: %d neraseblocks: %d\n", + geo->blocksize, geo->erasesize, geo->neraseblocks); } } break; @@ -861,7 +876,7 @@ static int sst26_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg) break; } - fvdbg("return %d\n", ret); + sstvdbg("return %d\n", ret); return ret; } @@ -884,7 +899,7 @@ FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev) FAR struct sst26_dev_s *priv; int ret; - fvdbg("dev: %p\n", dev); + sstvdbg("dev: %p\n", dev); /* Allocate a state structure (we allocate the structure instead of using * a fixed, static allocation so that we can handle multiple FLASH devices. @@ -921,7 +936,7 @@ FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev) { /* Unrecognized! Discard all of that work we just did and return NULL */ - fdbg("Unrecognized\n"); + sstdbg("Unrecognized\n"); kmm_free(priv); priv = NULL; } @@ -941,6 +956,6 @@ FAR struct mtd_dev_s *sst26_initialize_spi(FAR struct spi_dev_s *dev) /* Return the implementation-specific state structure as the MTD device */ - fvdbg("Return %p\n", priv); + sstvdbg("Return %p\n", priv); return (FAR struct mtd_dev_s *)priv; } diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c index dfaf2d63840..be6a890d1b0 100644 --- a/drivers/net/cs89x0.c +++ b/drivers/net/cs89x0.c @@ -314,7 +314,7 @@ static int cs89x0_transmit(struct cs89x0_driver_s *cs89x0) * Function: cs89x0_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -436,7 +436,7 @@ static void cs89x0_receive(FAR struct cs89x0_driver_s *cs89x0, uint16_t isq) return; } - /* Check if the packet is a valid size for the uIP buffer configuration */ + /* Check if the packet is a valid size for the network buffer configuration */ if (rxlength > ???) { @@ -618,7 +618,7 @@ static void cs89x0_txdone(struct cs89x0_driver_s *cs89x0, uint16_t isq) wd_cancel(cs89x0->cs_txtimeout); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&cs89x0->cs_dev, cs89x0_txpoll); } @@ -759,7 +759,7 @@ static void cs89x0_txtimeout(int argc, uint32_t arg, ...) /* Then reset the hardware */ #warning "Missing logic" - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&cs89x0->cs_dev, cs89x0_txpoll); } @@ -788,7 +788,7 @@ static void cs89x0_polltimer(int argc, uint32_t arg, ...) /* Check if there is room in the send another TXr packet. */ #warning "Missing logic" - /* If so, update TCP timing states and poll uIP for new XMIT data */ + /* If so, update TCP timing states and poll the network for new XMIT data */ (void)devif_timer(&cs89x0->cs_dev, cs89x0_txpoll); @@ -909,7 +909,7 @@ static int cs89x0_txavail(struct net_driver_s *dev) /* Check if there is room in the hardware to hold another outgoing packet. */ #warning "Missing logic" - /* If so, then poll uIP for new XMIT data */ + /* If so, then poll the network for new XMIT data */ (void)devif_poll(&cs89x0->cs_dev, cs89x0_txpoll); } diff --git a/drivers/net/dm90x0.c b/drivers/net/dm90x0.c index caaf0c1872d..c1807b53037 100644 --- a/drivers/net/dm90x0.c +++ b/drivers/net/dm90x0.c @@ -309,7 +309,7 @@ struct dm9x_driver_s void (*dm_write)(const uint8_t *ptr, int len); void (*dm_discard)(int len); - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ struct net_driver_s dm_dev; }; @@ -737,7 +737,7 @@ static int dm9x_transmit(struct dm9x_driver_s *dm9x) * Function: dm9x_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -873,7 +873,7 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x) dm9x->dm_discard(rx.desc.rx_len); } - /* Also check if the packet is a valid size for the uIP configuration */ + /* Also check if the packet is a valid size for the network configuration */ else if (rx.desc.rx_len < ETH_HDRLEN || rx.desc.rx_len > (CONFIG_NET_ETH_MTU + 2)) { @@ -886,7 +886,7 @@ static void dm9x_receive(FAR struct dm9x_driver_s *dm9x) } else { - /* Good packet... Copy the packet data out of SRAM and pass it one to uIP */ + /* Good packet... Copy the packet data out of SRAM and pass it one to the network */ dm9x->dm_dev.d_len = rx.desc.rx_len; dm9x->dm_read(dm9x->dm_dev.d_buf, rx.desc.rx_len); @@ -1065,7 +1065,7 @@ static void dm9x_txdone(struct dm9x_driver_s *dm9x) wd_cancel(dm9x->dm_txtimeout); } - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&dm9x->dm_dev, dm9x_txpoll); } @@ -1222,7 +1222,7 @@ static void dm9x_txtimeout(int argc, uint32_t arg, ...) dm9x_reset(dm9x); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&dm9x->dm_dev, dm9x_txpoll); } @@ -1264,7 +1264,7 @@ static void dm9x_polltimer(int argc, uint32_t arg, ...) if (dm9x->dm_ntxpending < 1 || (dm9x->dm_b100M && dm9x->dm_ntxpending < 2)) { - /* If so, update TCP timing states and poll uIP for new XMIT data */ + /* If so, update TCP timing states and poll the network for new XMIT data */ (void)devif_timer(&dm9x->dm_dev, dm9x_txpoll); } @@ -1470,7 +1470,7 @@ static int dm9x_txavail(struct net_driver_s *dev) if (dm9x->dm_ntxpending < 1 || (dm9x->dm_b100M && dm9x->dm_ntxpending < 2)) { - /* If so, then poll uIP for new XMIT data */ + /* If so, then poll the network for new XMIT data */ (void)devif_poll(&dm9x->dm_dev, dm9x_txpoll); } diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 11a44529892..e7f3e2385c8 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -127,7 +127,7 @@ struct e1000_dev WDOG_ID txpoll; /* TX poll timer */ WDOG_ID txtimeout; /* TX timeout timer */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ struct net_driver_s netdev; /* Interface understood by networking layer */ }; @@ -462,7 +462,7 @@ static int e1000_transmit(struct e1000_dev *e1000) * Function: e1000_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -570,7 +570,7 @@ static void e1000_receive(struct e1000_dev *e1000) goto next; } - /* Check if the packet is a valid size for the uIP buffer configuration */ + /* Check if the packet is a valid size for the network buffer configuration */ /* get the number of actual data-bytes in this packet */ @@ -728,7 +728,7 @@ static void e1000_txtimeout(int argc, uint32_t arg, ...) e1000_init(e1000); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&e1000->netdev, e1000_txpoll); } @@ -765,7 +765,7 @@ static void e1000_polltimer(int argc, uint32_t arg, ...) return; } - /* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm.. + /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm.. * might be bug here. Does this mean if there is a transmit in progress, * we will missing TCP time state updates? */ diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index 2ae3a01ebd5..df1fe7db47a 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c @@ -252,9 +252,9 @@ struct enc_driver_s FAR struct spi_dev_s *spi; - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ }; /**************************************************************************** @@ -1154,7 +1154,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv) * Function: enc_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets ready + * The transmitter is available, check if the network has any outgoing packets ready * to send. This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -1168,7 +1168,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv) * OK on success; a negated errno on failure * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1261,7 +1261,7 @@ static void enc_linkstatus(FAR struct enc_driver_s *priv) * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1288,7 +1288,7 @@ static void enc_txif(FAR struct enc_driver_s *priv) (void)wd_start(priv->txpoll, ENC_WDDELAY, enc_polltimer, 1, (wdparm_t)priv); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->dev, enc_txpoll); } @@ -1362,7 +1362,7 @@ static void enc_rxerif(FAR struct enc_driver_s *priv) * Function: enc_rxdispatch * * Description: - * Give the newly received packet to uIP. + * Give the newly received packet to the network. * * Parameters: * priv - Reference to the driver state structure @@ -1371,7 +1371,7 @@ static void enc_rxerif(FAR struct enc_driver_s *priv) * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1502,7 +1502,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv) * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1578,7 +1578,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv) enc_rdbuffer(priv, priv->dev.d_buf, priv->dev.d_len); enc_dumppacket("Received Packet", priv->dev.d_buf, priv->dev.d_len); - /* Dispatch the packet to uIP */ + /* Dispatch the packet to the network */ enc_rxdispatch(priv); } @@ -1620,7 +1620,7 @@ static void enc_irqworker(FAR void *arg) DEBUGASSERT(priv); - /* Get exclusive access to both uIP and the SPI bus. */ + /* Get exclusive access to both the network and the SPI bus. */ lock = net_lock(); enc_lock(priv); @@ -1810,7 +1810,7 @@ static void enc_irqworker(FAR void *arg) enc_bfsgreg(priv, ENC_EIE, EIE_INTIE); - /* Release lock on the SPI bus and uIP */ + /* Release lock on the SPI bus and the network */ enc_unlock(priv); net_unlock(lock); @@ -1881,7 +1881,7 @@ static void enc_toworker(FAR void *arg) nlldbg("Tx timeout\n"); DEBUGASSERT(priv); - /* Get exclusive access to uIP */ + /* Get exclusive access to the network */ lock = net_lock(); @@ -1899,11 +1899,11 @@ static void enc_toworker(FAR void *arg) DEBUGASSERT(ret == OK); UNUSED(ret); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->dev, enc_txpoll); - /* Release lock on uIP */ + /* Release lock on the network */ net_unlock(lock); } @@ -1973,7 +1973,7 @@ static void enc_pollworker(FAR void *arg) DEBUGASSERT(priv); - /* Get exclusive access to both uIP and the SPI bus. */ + /* Get exclusive access to both the network and the SPI bus. */ lock = net_lock(); enc_lock(priv); @@ -1986,7 +1986,7 @@ static void enc_pollworker(FAR void *arg) if ((enc_rdgreg(priv, ENC_ECON1) & ECON1_TXRTS) == 0) { - /* Yes.. update TCP timing states and poll uIP for new XMIT data. Hmmm.. + /* Yes.. update TCP timing states and poll the network for new XMIT data. Hmmm.. * looks like a bug here to me. Does this mean if there is a transmit * in progress, we will missing TCP time state updates? */ @@ -1994,7 +1994,7 @@ static void enc_pollworker(FAR void *arg) (void)devif_timer(&priv->dev, enc_txpoll); } - /* Release lock on the SPI bus and uIP */ + /* Release lock on the SPI bus and the network */ enc_unlock(priv); net_unlock(lock); @@ -2212,7 +2212,7 @@ static int enc_txavail(struct net_driver_s *dev) if ((enc_rdgreg(priv, ENC_ECON1) & ECON1_TXRTS) == 0) { - /* The interface is up and TX is idle; poll uIP for new XMIT data */ + /* The interface is up and TX is idle; poll the network for new XMIT data */ (void)devif_poll(&priv->dev, enc_txpoll); } diff --git a/drivers/net/encx24j600.c b/drivers/net/encx24j600.c index aae63dcebb0..c341c5486f7 100644 --- a/drivers/net/encx24j600.c +++ b/drivers/net/encx24j600.c @@ -265,9 +265,9 @@ struct enc_driver_s FAR struct spi_dev_s *spi; - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ }; /**************************************************************************** @@ -1081,7 +1081,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv) * * Assumptions: * A packet is available in d_buf. - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1138,7 +1138,7 @@ static int enc_txenqueue(FAR struct enc_driver_s *priv) * Function: enc_txpoll * * Description: - * Enqueues uIP packets if available. + * Enqueues network packets if available. * This is a callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, @@ -1152,7 +1152,7 @@ static int enc_txenqueue(FAR struct enc_driver_s *priv) * OK on success; a negated errno on failure * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1273,7 +1273,7 @@ static void enc_linkstatus(FAR struct enc_driver_s *priv) * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1322,7 +1322,7 @@ static void enc_txif(FAR struct enc_driver_s *priv) * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1362,7 +1362,7 @@ static void enc_rxldpkt(FAR struct enc_driver_s *priv, * A free rx descriptor * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1395,7 +1395,7 @@ static struct enc_descr_s *enc_rxgetdescr(FAR struct enc_driver_s *priv) * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1443,7 +1443,7 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *d * Function: enc_rxdispatch * * Description: - * Give the newly received packet to uIP. + * Give the newly received packet to the network. * * Parameters: * priv - Reference to the driver state structure @@ -1452,7 +1452,7 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *d * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1633,7 +1633,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv) * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1763,7 +1763,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv) * None * * Assumptions: - * Interrupts are enabled but the caller holds the uIP lock. + * Interrupts are enabled but the caller holds the network lock. * ****************************************************************************/ @@ -1832,7 +1832,7 @@ static void enc_irqworker(FAR void *arg) DEBUGASSERT(priv); - /* Get exclusive access to both uIP and the SPI bus. */ + /* Get exclusive access to both the network and the SPI bus. */ lock = net_lock(); enc_lock(priv); @@ -1975,7 +1975,7 @@ static void enc_irqworker(FAR void *arg) enc_bfs(priv, ENC_EIE, EIE_INTIE); - /* Release lock on the SPI bus and uIP */ + /* Release lock on the SPI bus and the network */ enc_unlock(priv); net_unlock(lock); @@ -2046,7 +2046,7 @@ static void enc_toworker(FAR void *arg) nlldbg("Tx timeout\n"); DEBUGASSERT(priv); - /* Get exclusive access to uIP. */ + /* Get exclusive access to the network. */ lock = net_lock(); @@ -2064,11 +2064,11 @@ static void enc_toworker(FAR void *arg) DEBUGASSERT(ret == OK); (void)ret; - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->dev, enc_txpoll); - /* Release uIP */ + /* Release the network */ net_unlock(lock); } @@ -2138,7 +2138,7 @@ static void enc_pollworker(FAR void *arg) DEBUGASSERT(priv); - /* Get exclusive access to both uIP and the SPI bus. */ + /* Get exclusive access to both the network and the SPI bus. */ lock = net_lock(); enc_lock(priv); @@ -2151,7 +2151,7 @@ static void enc_pollworker(FAR void *arg) if ((enc_rdreg(priv, ENC_ECON1) & ECON1_TXRTS) == 0) { - /* Yes.. update TCP timing states and poll uIP for new XMIT data. Hmmm.. + /* Yes.. update TCP timing states and poll the network for new XMIT data. Hmmm.. * looks like a bug here to me. Does this mean if there is a transmit * in progress, we will missing TCP time state updates? */ @@ -2159,7 +2159,7 @@ static void enc_pollworker(FAR void *arg) (void)devif_timer(&priv->dev, enc_txpoll); } - /* Release lock on the SPI bus and uIP */ + /* Release lock on the SPI bus and the network */ enc_unlock(priv); net_unlock(lock); @@ -2381,7 +2381,7 @@ static int enc_txavail(struct net_driver_s *dev) if ((enc_rdreg(priv, ENC_ECON1) & ECON1_TXRTS) == 0) { - /* The interface is up and TX is idle; poll uIP for new XMIT data */ + /* The interface is up and TX is idle; poll the network for new XMIT data */ (void)devif_poll(&priv->dev, enc_txpoll); } diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c index fdf23a87e12..9cbdba7022d 100644 --- a/drivers/net/ftmac100.c +++ b/drivers/net/ftmac100.c @@ -171,9 +171,9 @@ struct ftmac100_driver_s struct work_s ft_work; /* For deferring work to the work queue */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s ft_dev; /* Interface understood by uIP */ + struct net_driver_s ft_dev; /* Interface understood by the network */ }; /**************************************************************************** @@ -331,7 +331,7 @@ static int ftmac100_transmit(FAR struct ftmac100_driver_s *priv) * Function: ftmac100_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets + * The transmitter is available, check if the network has any outgoing packets * ready to send. This is a callback from devif_poll(). devif_poll() may * be called: * @@ -849,7 +849,7 @@ static void ftmac100_txdone(FAR struct ftmac100_driver_s *priv) (void)wd_start(priv->ft_txpoll, FTMAC100_WDDELAY, ftmac100_poll_expiry, 1, (wdparm_t)priv); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->ft_dev, ftmac100_txpoll); } @@ -1089,7 +1089,7 @@ static inline void ftmac100_txtimeout_process(FAR struct ftmac100_driver_s *priv nvdbg("TXTIMEOUT\n"); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ (void)devif_poll(&priv->ft_dev, ftmac100_txpoll); } @@ -1195,7 +1195,7 @@ static inline void ftmac100_poll_process(FAR struct ftmac100_driver_s *priv) * the TX poll if he are unable to accept another packet for transmission. */ - /* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm.. + /* If so, update TCP timing states and poll the network for new XMIT data. Hmmm.. * might be bug here. Does this mean if there is a transmit in progress, * we will missing TCP time state updates? */ @@ -1421,7 +1421,7 @@ static inline void ftmac100_txavail_process(FAR struct ftmac100_driver_s *priv) { /* Check if there is room in the hardware to hold another outgoing packet. */ - /* If so, then poll uIP for new XMIT data */ + /* If so, then poll the network for new XMIT data */ (void)devif_poll(&priv->ft_dev, ftmac100_txpoll); } diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c index 3b750b80513..5b275474d09 100644 --- a/drivers/net/loopback.c +++ b/drivers/net/loopback.c @@ -99,9 +99,9 @@ struct lo_driver_s WDOG_ID lo_polldog; /* TX poll timer */ struct work_s lo_work; /* For deferring work to the work queue */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s lo_dev; /* Interface understood by uIP */ + struct net_driver_s lo_dev; /* Interface understood by the network */ }; /**************************************************************************** diff --git a/drivers/net/slip.c b/drivers/net/slip.c index c02ebb0e935..3691580341c 100644 --- a/drivers/net/slip.c +++ b/drivers/net/slip.c @@ -146,11 +146,11 @@ struct slip_driver_s uint16_t rxlen; /* The number of bytes in rxbuf */ pid_t rxpid; /* Receiver thread ID */ pid_t txpid; /* Transmitter thread ID */ - sem_t waitsem; /* Mutually exclusive access to uIP */ + sem_t waitsem; /* Mutually exclusive access to the network */ - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ uint8_t rxbuf[CONFIG_NET_SLIP_MTU + 2]; uint8_t txbuf[CONFIG_NET_SLIP_MTU + 2]; }; @@ -378,7 +378,7 @@ static int slip_transmit(FAR struct slip_driver_s *priv) * Function: slip_txpoll * * Description: - * Check if uIP has any outgoing packets ready to send. This is a + * Check if the network has any outgoing packets ready to send. This is a * callback from devif_poll(). devif_poll() may be called: * * 1. When the preceding TX packet send is complete, or @@ -471,7 +471,7 @@ static void slip_txtask(int argc, FAR char *argv[]) if (priv->bifup) { - /* Get exclusive access to uIP (if it it is already being used + /* Get exclusive access to the network (if it it is already being used * slip_rxtask, then we have to wait). */ @@ -725,7 +725,7 @@ static int slip_rxtask(int argc, FAR char *argv[]) { NETDEV_RXIPV4(&priv->dev); - /* Handle the IP input. Get exclusive access to uIP. */ + /* Handle the IP input. Get exclusive access to the network. */ slip_semtake(priv); priv->dev.d_buf = priv->rxbuf; diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 1221b56ad89..9435f4a6177 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c @@ -129,9 +129,9 @@ struct tun_device_s sem_t waitsem; sem_t read_wait_sem; - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s dev; /* Interface understood by uIP */ + struct net_driver_s dev; /* Interface understood by the network */ }; struct tun_driver_s @@ -345,7 +345,7 @@ static int tun_transmit(FAR struct tun_device_s *priv) * Function: tun_txpoll * * Description: - * The transmitter is available, check if uIP has any outgoing packets + * The transmitter is available, check if the network has any outgoing packets * ready to send. This is a callback from devif_poll(). devif_poll() may * be called: * @@ -498,7 +498,7 @@ static void tun_txdone(FAR struct tun_device_s *priv) NETDEV_TXDONE(&priv->dev); - /* Then poll uIP for new XMIT data */ + /* Then poll the network for new XMIT data */ priv->dev.d_buf = priv->read_buf; (void)devif_poll(&priv->dev, tun_txpoll); @@ -529,7 +529,7 @@ static void tun_poll_process(FAR struct tun_device_s *priv) if (priv->read_d_len == 0) { - /* If so, poll uIP for new XMIT data. */ + /* If so, poll the network for new XMIT data. */ priv->dev.d_buf = priv->read_buf; (void)devif_timer(&priv->dev, tun_txpoll); @@ -746,7 +746,7 @@ static int tun_txavail(struct net_driver_s *dev) if (priv->bifup) { - /* Poll uIP for new XMIT data */ + /* Poll the network for new XMIT data */ priv->dev.d_buf = priv->read_buf; (void)devif_poll(&priv->dev, tun_txpoll); diff --git a/drivers/pipes/pipe_common.c b/drivers/pipes/pipe_common.c index a7676571eb7..862d244527f 100644 --- a/drivers/pipes/pipe_common.c +++ b/drivers/pipes/pipe_common.c @@ -92,7 +92,7 @@ static void pipecommon_semtake(sem_t *sem); * Name: pipecommon_semtake ****************************************************************************/ -static void pipecommon_semtake(sem_t *sem) +static void pipecommon_semtake(FAR sem_t *sem) { while (sem_wait(sem) != 0) { @@ -109,7 +109,8 @@ static void pipecommon_semtake(sem_t *sem) ****************************************************************************/ #ifndef CONFIG_DISABLE_POLL -static void pipecommon_pollnotify(FAR struct pipe_dev_s *dev, pollevent_t eventset) +static void pipecommon_pollnotify(FAR struct pipe_dev_s *dev, + pollevent_t eventset) { int i; @@ -120,7 +121,7 @@ static void pipecommon_pollnotify(FAR struct pipe_dev_s *dev, pollevent_t events for (i = 0; i < CONFIG_DEV_PIPE_NPOLLWAITERS; i++) { - struct pollfd *fds = dev->d_fds[i]; + FAR struct pollfd *fds = dev->d_fds[i]; if (fds) { fds->revents |= eventset & (fds->events | POLLERR | POLLHUP); @@ -158,7 +159,7 @@ FAR struct pipe_dev_s *pipecommon_allocdev(void) /* Allocate a private structure to manage the pipe */ - dev = (struct pipe_dev_s *)kmm_malloc(sizeof(struct pipe_dev_s)); + dev = (FAR struct pipe_dev_s *)kmm_malloc(sizeof(struct pipe_dev_s)); if (dev) { /* Initialize the private structure */ @@ -190,10 +191,10 @@ void pipecommon_freedev(FAR struct pipe_dev_s *dev) int pipecommon_open(FAR struct file *filep) { - FAR struct inode *inode = filep->f_inode; - FAR struct pipe_dev_s *dev = inode->i_private; - int sval; - int ret; + FAR struct inode *inode = filep->f_inode; + FAR struct pipe_dev_s *dev = inode->i_private; + int sval; + int ret; DEBUGASSERT(dev != NULL); @@ -302,9 +303,9 @@ int pipecommon_open(FAR struct file *filep) int pipecommon_close(FAR struct file *filep) { - struct inode *inode = filep->f_inode; - struct pipe_dev_s *dev = inode->i_private; - int sval; + FAR struct inode *inode = filep->f_inode; + FAR struct pipe_dev_s *dev = inode->i_private; + int sval; DEBUGASSERT(dev && dev->d_refs > 0); @@ -408,14 +409,14 @@ int pipecommon_close(FAR struct file *filep) ssize_t pipecommon_read(FAR struct file *filep, FAR char *buffer, size_t len) { - struct inode *inode = filep->f_inode; - struct pipe_dev_s *dev = inode->i_private; + FAR struct inode *inode = filep->f_inode; + FAR struct pipe_dev_s *dev = inode->i_private; #ifdef CONFIG_DEV_PIPEDUMP - FAR uint8_t *start = (FAR uint8_t *)buffer; + FAR uint8_t *start = (FAR uint8_t *)buffer; #endif - ssize_t nread = 0; - int sval; - int ret; + ssize_t nread = 0; + int sval; + int ret; DEBUGASSERT(dev); @@ -467,7 +468,7 @@ ssize_t pipecommon_read(FAR struct file *filep, FAR char *buffer, size_t len) /* Then return whatever is available in the pipe (which is at least one byte) */ nread = 0; - while (nread < len && dev->d_wrndx != dev->d_rdndx) + while ((size_t)nread < len && dev->d_wrndx != dev->d_rdndx) { *buffer++ = dev->d_buffer[dev->d_rdndx]; if (++dev->d_rdndx >= CONFIG_DEV_PIPE_SIZE) @@ -497,14 +498,15 @@ ssize_t pipecommon_read(FAR struct file *filep, FAR char *buffer, size_t len) * Name: pipecommon_write ****************************************************************************/ -ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer, size_t len) +ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer, + size_t len) { - struct inode *inode = filep->f_inode; - struct pipe_dev_s *dev = inode->i_private; - ssize_t nwritten = 0; - ssize_t last; - int nxtwrndx; - int sval; + FAR struct inode *inode = filep->f_inode; + FAR struct pipe_dev_s *dev = inode->i_private; + ssize_t nwritten = 0; + ssize_t last; + int nxtwrndx; + int sval; DEBUGASSERT(dev); pipe_dumpbuffer("To PIPE:", (FAR uint8_t *)buffer, len); @@ -559,7 +561,8 @@ ssize_t pipecommon_write(FAR struct file *filep, FAR const char *buffer, size_t /* Is the write complete? */ - if (++nwritten >= len) + nwritten++; + if ((size_t)nwritten >= len) { /* Yes.. Notify all of the waiting readers that more data is available */ @@ -717,7 +720,7 @@ int pipecommon_poll(FAR struct file *filep, FAR struct pollfd *fds, { /* This is a request to tear down the poll. */ - struct pollfd **slot = (struct pollfd **)fds->priv; + FAR struct pollfd **slot = (FAR struct pollfd **)fds->priv; #ifdef CONFIG_DEBUG if (!slot) @@ -745,9 +748,9 @@ errout: int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg) { - FAR struct inode *inode = filep->f_inode; - struct pipe_dev_s *dev = inode->i_private; - int ret = -EINVAL; + FAR struct inode *inode = filep->f_inode; + FAR struct pipe_dev_s *dev = inode->i_private; + int ret = -EINVAL; #ifdef CONFIG_DEBUG /* Some sanity checking */ @@ -792,7 +795,7 @@ int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg) count = dev->d_wrndx - dev->d_rdndx; } - *(int *)arg = count; + *(FAR int *)arg = count; ret = 0; } break; @@ -812,7 +815,7 @@ int pipecommon_ioctl(FAR struct file *filep, int cmd, unsigned long arg) count = ((CONFIG_DEV_PIPE_SIZE - dev->d_wrndx) + dev->d_rdndx) - 1; } - *(int *)arg = count; + *(FAR int *)arg = count; ret = 0; } break; diff --git a/drivers/sensors/max31855.c b/drivers/sensors/max31855.c index c239d9688d8..d3e5b8e8f6e 100644 --- a/drivers/sensors/max31855.c +++ b/drivers/sensors/max31855.c @@ -83,6 +83,9 @@ struct max31855_dev_s * Private Function Prototypes ****************************************************************************/ +static void max31855_lock(FAR struct spi_dev_s *spi); +static void max31855_unlock(FAR struct spi_dev_s *spi); + /* Character driver methods */ static int max31855_open(FAR struct file *filep); @@ -112,6 +115,37 @@ static const struct file_operations g_max31855fops = /**************************************************************************** * Private Functions ****************************************************************************/ + +/**************************************************************************** + * Name: max31855_lock + * + * Description: + * Lock and configure the SPI bus. + * + ****************************************************************************/ + +static void max31855_lock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, true); + SPI_SETMODE(spi, SPIDEV_MODE0); + SPI_SETBITS(spi, 8); + (void)SPI_HWFEATURES(spi, 0); + SPI_SETFREQUENCY(spi, 400000); +} + +/**************************************************************************** + * Name: max31855_unlock + * + * Description: + * Unlock the SPI bus. + * + ****************************************************************************/ + +static void max31855_unlock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, false); +} + /**************************************************************************** * Name: max31855_open * @@ -167,6 +201,7 @@ static ssize_t max31855_read(FAR struct file *filep, FAR char *buffer, size_t bu /* Enable MAX31855's chip select */ + max31855_lock(priv->spi); SPI_SELECT(priv->spi, SPIDEV_TEMPERATURE, true); /* Read temperature */ @@ -176,6 +211,7 @@ static ssize_t max31855_read(FAR struct file *filep, FAR char *buffer, size_t bu /* Disable MAX31855's chip select */ SPI_SELECT(priv->spi, SPIDEV_TEMPERATURE, false); + max31855_unlock(priv->spi); regval = (regmsb & 0xFF000000) >> 24; regval |= (regmsb & 0xFF0000) >> 8; diff --git a/drivers/sensors/max6675.c b/drivers/sensors/max6675.c index 38aa6c18a7f..329f5185c5c 100644 --- a/drivers/sensors/max6675.c +++ b/drivers/sensors/max6675.c @@ -80,6 +80,9 @@ struct max6675_dev_s * Private Function Prototypes ****************************************************************************/ +static void max6675_lock(FAR struct spi_dev_s *spi) +static void max6675_unlock(FAR struct spi_dev_s *spi) + /* Character driver methods */ static int max6675_open(FAR struct file *filep); @@ -108,6 +111,37 @@ static const struct file_operations g_max6675fops = /**************************************************************************** * Private Functions ****************************************************************************/ + +/**************************************************************************** + * Name: max6675_lock + * + * Description: + * Lock and configure the SPI bus. + * + ****************************************************************************/ + +static void max6675_lock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, true); + SPI_SETMODE(spi, SPIDEV_MODE0); + SPI_SETBITS(spi, 8); + (void)SPI_HWFEATURES(spi, 0); + SPI_SETFREQUENCY(spi, 400000); +} + +/**************************************************************************** + * Name: max6675_unlock + * + * Description: + * Unlock the SPI bus. + * + ****************************************************************************/ + +static void max6675_unlock(FAR struct spi_dev_s *spi) +{ + (void)SPI_LOCK(spi, false); +} + /**************************************************************************** * Name: max6675_open * @@ -163,6 +197,7 @@ static ssize_t max6675_read(FAR struct file *filep, FAR char *buffer, size_t buf /* Enable MAX6675's chip select */ + max6675_lock(priv->spi); SPI_SELECT(priv->spi, SPIDEV_TEMPERATURE, true); /* Read temperature */ @@ -172,6 +207,7 @@ static ssize_t max6675_read(FAR struct file *filep, FAR char *buffer, size_t buf /* Disable MAX6675's chip select */ SPI_SELECT(priv->spi, SPIDEV_TEMPERATURE, false); + max6675_unlock(priv->spi); regval = (regmsb & 0xFF00) >> 8; regval |= (regmsb & 0xFF) << 8; diff --git a/drivers/sensors/ms58xx.c b/drivers/sensors/ms58xx.c index 410a391a725..1cbcdc37e94 100644 --- a/drivers/sensors/ms58xx.c +++ b/drivers/sensors/ms58xx.c @@ -139,7 +139,7 @@ struct ms58xx_dev_s ****************************************************************************/ /* CRC Calculation */ -static uint8_t ms58xx_crc(FAR uint16_t *src, uint8_t crcIndex); +static uint8_t ms58xx_crc(FAR uint16_t *src, uint8_t crcndx, uint16_t crcmask); /* I2C Helpers */ @@ -200,7 +200,7 @@ static const struct file_operations g_fops = * ****************************************************************************/ -static uint8_t ms58xx_crc(FAR uint16_t *src, uint8_t crcIndex) +static uint8_t ms58xx_crc(FAR uint16_t *src, uint8_t crcndx, uint16_t crcmask) { uint16_t cnt; uint16_t n_rem; @@ -208,8 +208,8 @@ static uint8_t ms58xx_crc(FAR uint16_t *src, uint8_t crcIndex) uint8_t n_bit; n_rem = 0x00; - crc_read = src[crcIndex]; - src[crcIndex] = (0xff00 & (src[7])); + crc_read = src[crcndx]; + src[crcndx] &= ~crcmask; for (cnt = 0; cnt < 16; cnt++) { @@ -236,7 +236,7 @@ static uint8_t ms58xx_crc(FAR uint16_t *src, uint8_t crcIndex) } n_rem = (0x000F & (n_rem >> 12)); - src[crcIndex] = crc_read; + src[crcndx] = crc_read; return (n_rem ^ 0x00); } @@ -369,24 +369,73 @@ static int ms58xx_readadc(FAR struct ms58xx_dev_s *priv, FAR uint32_t *adc) *adc = (uint32_t)buffer[0] << 16 | (uint32_t)buffer[1] << 8 | (uint32_t)buffer[2]; + sndbg("adc: %06x ret: %d\n", *adc, ret); return ret; } /**************************************************************************** - * Name: ms58xx_setosr + * Name: ms58xx_setosr_1 * * Description: * Set the oversampling ratio. * ****************************************************************************/ -static int ms58xx_setosr(FAR struct ms58xx_dev_s *priv, uint16_t osr) +static int ms58xx_setosr_1(FAR struct ms58xx_dev_s *priv, uint16_t osr) { int ret = OK; + switch (osr) + { + case 256: + priv->delay = 600; + priv->osr = 0x0; + break; - sndbg("osr: %04x\n", osr); + case 512: + priv->delay = 1170; + priv->osr = 0x2; + break; + case 1024: + priv->delay = 2280; + priv->osr = 0x4; + break; + + case 2048: + priv->delay = 4540; + priv->osr = 0x6; + break; + + case 4096: + priv->delay = 9040; + priv->osr = 0x8; + break; + + case 8192: + priv->delay = 18080; + priv->osr = 0xA; + break; + + default: + ret = -EINVAL; + break; + } + + return ret; +} + +/**************************************************************************** + * Name: ms58xx_setosr_2 + * + * Description: + * Set the oversampling ratio. + * + ****************************************************************************/ + +static int ms58xx_setosr_2(FAR struct ms58xx_dev_s *priv, uint16_t osr) +{ + int ret = OK; switch (osr) { case 256: @@ -409,26 +458,6 @@ static int ms58xx_setosr(FAR struct ms58xx_dev_s *priv, uint16_t osr) priv->delay = 9040; break; - case 8192: - switch (priv->model) - { - case MS58XX_MODEL_MS5805_02: - case MS58XX_MODEL_MS5837_30: - priv->delay = 18080; - break; - - case MS58XX_MODEL_MS5803_02: - case MS58XX_MODEL_MS5803_05: - case MS58XX_MODEL_MS5803_07: - case MS58XX_MODEL_MS5803_14: - case MS58XX_MODEL_MS5803_30: - case MS58XX_MODEL_MS5806_02: - default: - ret = -EINVAL; - break; - } - break; - default: ret = -EINVAL; break; @@ -442,6 +471,44 @@ static int ms58xx_setosr(FAR struct ms58xx_dev_s *priv, uint16_t osr) return ret; } +/**************************************************************************** + * Name: ms58xx_setosr + * + * Description: + * Set the oversampling ratio. + * + ****************************************************************************/ + +static int ms58xx_setosr(FAR struct ms58xx_dev_s *priv, uint16_t osr) +{ + int ret = OK; + + sndbg("osr: %04x\n", osr); + + switch (priv->model) + { + case MS58XX_MODEL_MS5805_02: + case MS58XX_MODEL_MS5837_30: + ret = ms58xx_setosr_1(priv,osr); + break; + + case MS58XX_MODEL_MS5803_02: + case MS58XX_MODEL_MS5803_05: + case MS58XX_MODEL_MS5803_07: + case MS58XX_MODEL_MS5803_14: + case MS58XX_MODEL_MS5803_30: + case MS58XX_MODEL_MS5806_02: + ret = ms58xx_setosr_2(priv,osr); + break; + + default: + ret = -EINVAL; + break; + } + + return ret; +} + /**************************************************************************** * Name: ms58xx_readprom * @@ -499,7 +566,7 @@ static int ms58xx_readprom(FAR struct ms58xx_dev_s *priv) crcmask = (uint16_t)0xf << crcshift; crc = (uint8_t)((prom[crcindex] & crcmask) >> crcshift); - if (crc != ms58xx_crc(prom, crcindex)) + if (crc != ms58xx_crc(prom, crcindex, crcmask)) { sndbg("crc mismatch\n"); return -ENODEV; @@ -787,7 +854,27 @@ static int ms58xx_close(FAR struct file *filep) static ssize_t ms58xx_read(FAR struct file *filep, FAR char *buffer, size_t buflen) { - return 0; + ssize_t size; + FAR struct inode *inode = filep->f_inode; + FAR struct ms58xx_dev_s *priv = inode->i_private; + FAR struct ms58xx_measure_s *p = (FAR struct ms58xx_measure_s *)buffer; + + size = buflen; + while (size >= sizeof(*p)) + { + if (ms58xx_measure(priv) < 0) + { + return -1; + } + + p->temperature = priv->temp; + p->pressure = priv->press; + + p++; + size -= sizeof(*p); + } + + return size; } /**************************************************************************** @@ -907,16 +994,16 @@ int ms58xx_register(FAR const char *devpath, FAR struct i2c_master_s *i2c, /* Sanity check */ DEBUGASSERT(i2c != NULL); - DEBUGASSERT((model == MS58XX_MODEL_MS5803_02 || - model == MS58XX_MODEL_MS5803_05 || - model == MS58XX_MODEL_MS5803_07 || - model == MS58XX_MODEL_MS5803_14 || - model == MS58XX_MODEL_MS5803_30 || - model == MS58XX_MODEL_MS5806_02) && - (addr == MS58XX_ADDR0 || addr == MS58XX_ADDR1) || - (model == MS58XX_MODEL_MS5805_02 || - model == MS58XX_MODEL_MS5837_30) && - addr == MS58XX_ADDR0); + DEBUGASSERT(((model == MS58XX_MODEL_MS5803_02 || + model == MS58XX_MODEL_MS5803_05 || + model == MS58XX_MODEL_MS5803_07 || + model == MS58XX_MODEL_MS5803_14 || + model == MS58XX_MODEL_MS5803_30 || + model == MS58XX_MODEL_MS5806_02) && + (addr == MS58XX_ADDR0 || addr == MS58XX_ADDR1)) || + ((model == MS58XX_MODEL_MS5805_02 || + model == MS58XX_MODEL_MS5837_30) && + addr == MS58XX_ADDR0)); /* Initialize the device's structure */ diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index ec333bc0d81..ef4858171dc 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -347,165 +347,114 @@ endif # MCU serial peripheral driver? # -config ARCH_HAVE_UART +config UART_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART0 +config UART0_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART1 +config UART1_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART2 +config UART2_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART3 +config UART3_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART4 +config UART4_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART5 +config UART5_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART6 +config UART6_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART7 +config UART7_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_UART8 +config UART8_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_SCI0 +config SCI0_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_SCI1 +config SCI1_SERIALDRIVER bool default n select MCU_SERIAL -config ARCH_HAVE_USART0 - bool - default n - -config ARCH_HAVE_USART1 - bool - default n - -config ARCH_HAVE_USART2 - bool - default n - -config ARCH_HAVE_USART3 - bool - default n - -config ARCH_HAVE_USART4 - bool - default n - -config ARCH_HAVE_USART5 - bool - default n - -config ARCH_HAVE_USART6 - bool - default n - -config ARCH_HAVE_USART7 - bool - default n - -config ARCH_HAVE_USART8 - bool - default n - -config ARCH_HAVE_OTHER_UART +config USART0_SERIALDRIVER bool default n select MCU_SERIAL -# -# USARTn configuration. Is the USART configured to behave like a UART? -# - -comment "USART Configuration" - -config USART0_ISUART - bool "USART0 is a UART" - default y - depends on ARCH_HAVE_USART0 +config USART1_SERIALDRIVER + bool + default n select MCU_SERIAL -config USART1_ISUART - bool "USART1 is a UART" - default y - depends on ARCH_HAVE_USART1 +config USART2_SERIALDRIVER + bool + default n select MCU_SERIAL -config USART2_ISUART - bool "USART2 is a UART" - default y - depends on ARCH_HAVE_USART2 +config USART3_SERIALDRIVER + bool + default n select MCU_SERIAL -config USART3_ISUART - bool "USART3 is a UART" - default y - depends on ARCH_HAVE_USART3 +config USART4_SERIALDRIVER + bool + default n select MCU_SERIAL -config USART4_ISUART - bool "USART4 is a UART" - default y - depends on ARCH_HAVE_USART4 +config USART5_SERIALDRIVER + bool + default n select MCU_SERIAL -config USART5_ISUART - bool "USART5 is a UART" - default y - depends on ARCH_HAVE_USART5 +config USART6_SERIALDRIVER + bool + default n select MCU_SERIAL -config USART6_ISUART - bool "USART6 is a UART" - default y - depends on ARCH_HAVE_USART6 +config USART7_SERIALDRIVER + bool + default n select MCU_SERIAL -config USART7_ISUART - bool "USART7 is a UART" - default y - depends on ARCH_HAVE_USART7 +config USART8_SERIALDRIVER + bool + default n select MCU_SERIAL -config USART8_ISUART - bool "USART8 is a UART" - default y - depends on ARCH_HAVE_USART8 +config OTHER_UART_SERIALDRIVER + bool + default n select MCU_SERIAL config MCU_SERIAL @@ -609,94 +558,94 @@ config SERIAL_TERMIOS choice prompt "Serial console" - default NO_SERIAL_CONSOLE if !ARCH_HAVE_OTHER_UART - default OTHER_SERIAL_CONSOLE if ARCH_HAVE_OTHER_UART + default NO_SERIAL_CONSOLE if !OTHER_UART_SERIALDRIVER + default OTHER_SERIAL_CONSOLE if OTHER_UART_SERIALDRIVER depends on MCU_SERIAL #depends on DEV_CONSOLE - We may have serial console with no file system at all config UART_SERIAL_CONSOLE bool "UART" - depends on ARCH_HAVE_UART + depends on UART_SERIALDRIVER config UART0_SERIAL_CONSOLE bool "UART0" - depends on ARCH_HAVE_UART0 + depends on UART0_SERIALDRIVER config USART0_SERIAL_CONSOLE bool "USART0" - depends on USART0_ISUART + depends on USART0_SERIALDRIVER config UART1_SERIAL_CONSOLE bool "UART1" - depends on ARCH_HAVE_UART1 + depends on UART1_SERIALDRIVER config USART1_SERIAL_CONSOLE bool "USART1" - depends on USART1_ISUART + depends on USART1_SERIALDRIVER config UART2_SERIAL_CONSOLE bool "UART2" - depends on ARCH_HAVE_UART2 + depends on UART2_SERIALDRIVER config USART2_SERIAL_CONSOLE bool "USART2" - depends on USART2_ISUART + depends on USART2_SERIALDRIVER config UART3_SERIAL_CONSOLE bool "UART3" - depends on ARCH_HAVE_UART3 + depends on UART3_SERIALDRIVER config USART3_SERIAL_CONSOLE bool "USART3" - depends on ARCH_HAVE_USART3 + depends on USART3_SERIALDRIVER config UART4_SERIAL_CONSOLE bool "UART4" - depends on ARCH_HAVE_UART4 + depends on UART4_SERIALDRIVER config USART4_SERIAL_CONSOLE bool "USART4" - depends on USART4_ISUART + depends on USART4_SERIALDRIVER config UART5_SERIAL_CONSOLE bool "UART5" - depends on ARCH_HAVE_UART5 + depends on UART5_SERIALDRIVER config USART5_SERIAL_CONSOLE bool "USART5" - depends on USART5_ISUART + depends on USART5_SERIALDRIVER config UART6_SERIAL_CONSOLE bool "UART6" - depends on ARCH_HAVE_UART6 + depends on UART6_SERIALDRIVER config USART6_SERIAL_CONSOLE bool "USART6" - depends on USART6_ISUART + depends on USART6_SERIALDRIVER config UART7_SERIAL_CONSOLE bool "UART7" - depends on ARCH_HAVE_UART7 + depends on UART7_SERIALDRIVER config USART7_SERIAL_CONSOLE bool "USART7" - depends on USART7_ISUART + depends on USART7_SERIALDRIVER config UART8_SERIAL_CONSOLE bool "UART8" - depends on ARCH_HAVE_UART8 + depends on UART8_SERIALDRIVER config USART8_SERIAL_CONSOLE bool "USART8" - depends on USART8_ISUART + depends on USART8_SERIALDRIVER config SCI0_SERIAL_CONSOLE bool "SCI0" - depends on ARCH_HAVE_SCI0 + depends on SCI0_SERIALDRIVER config SCI1_SERIAL_CONSOLE bool "SCI1" - depends on ARCH_HAVE_SCI1 + depends on SCI1_SERIALDRIVER config OTHER_SERIAL_CONSOLE bool "Other serial console" @@ -711,7 +660,7 @@ endchoice # menu "UART Configuration" - depends on ARCH_HAVE_UART + depends on UART_SERIALDRIVER config UART_RXBUFSIZE int "Receive buffer size" @@ -776,7 +725,7 @@ config UART_DMA endmenu menu "UART0 Configuration" - depends on ARCH_HAVE_UART0 + depends on UART0_SERIALDRIVER config UART0_RXBUFSIZE int "Receive buffer size" @@ -841,7 +790,7 @@ config UART0_DMA endmenu menu "USART0 Configuration" - depends on USART0_ISUART + depends on USART0_SERIALDRIVER config USART0_RXBUFSIZE int "Receive buffer size" @@ -906,7 +855,7 @@ config USART0_DMA endmenu menu "UART1 Configuration" - depends on ARCH_HAVE_UART1 + depends on UART1_SERIALDRIVER config UART1_RXBUFSIZE int "Receive buffer size" @@ -971,7 +920,7 @@ config UART1_DMA endmenu menu "USART1 Configuration" - depends on USART1_ISUART + depends on USART1_SERIALDRIVER config USART1_RXBUFSIZE int "Receive buffer size" @@ -1036,7 +985,7 @@ config USART1_DMA endmenu menu "UART2 Configuration" - depends on ARCH_HAVE_UART2 + depends on UART2_SERIALDRIVER config UART2_RXBUFSIZE int "Receive buffer size" @@ -1101,7 +1050,7 @@ config UART2_DMA endmenu menu "USART2 Configuration" - depends on USART2_ISUART + depends on USART2_SERIALDRIVER config USART2_RXBUFSIZE int "Receive buffer size" @@ -1165,7 +1114,7 @@ config USART2_DMA endmenu menu "UART3 Configuration" - depends on ARCH_HAVE_UART3 + depends on UART3_SERIALDRIVER config UART3_RXBUFSIZE int "Receive buffer size" @@ -1230,7 +1179,7 @@ config UART3_DMA endmenu menu "USART3 Configuration" - depends on USART3_ISUART + depends on USART3_SERIALDRIVER config USART3_RXBUFSIZE int "Receive buffer size" @@ -1295,7 +1244,7 @@ config USART3_DMA endmenu menu "UART4 Configuration" - depends on ARCH_HAVE_UART4 + depends on UART4_SERIALDRIVER config UART4_RXBUFSIZE int "Receive buffer size" @@ -1360,7 +1309,7 @@ config UART4_DMA endmenu menu "USART4 Configuration" - depends on USART4_ISUART + depends on USART4_SERIALDRIVER config USART4_RXBUFSIZE int "Receive buffer size" @@ -1425,7 +1374,7 @@ config USART4_DMA endmenu menu "UART5 Configuration" - depends on ARCH_HAVE_UART5 + depends on UART5_SERIALDRIVER config UART5_RXBUFSIZE int "Receive buffer size" @@ -1490,7 +1439,7 @@ config UART5_DMA endmenu menu "USART5 Configuration" - depends on USART5_ISUART + depends on USART5_SERIALDRIVER config USART5_RXBUFSIZE int "Receive buffer size" @@ -1555,7 +1504,7 @@ config USART5_DMA endmenu menu "USART6 Configuration" - depends on USART6_ISUART + depends on USART6_SERIALDRIVER config USART6_RXBUFSIZE int "Receive buffer size" @@ -1620,7 +1569,7 @@ config USART6_DMA endmenu menu "UART6 Configuration" - depends on ARCH_HAVE_UART6 + depends on UART6_SERIALDRIVER config UART6_RXBUFSIZE int "Receive buffer size" @@ -1685,7 +1634,7 @@ config UART6_DMA endmenu menu "USART7 Configuration" - depends on USART7_ISUART + depends on USART7_SERIALDRIVER config USART7_RXBUFSIZE int "Receive buffer size" @@ -1750,7 +1699,7 @@ config USART7_DMA endmenu menu "UART7 Configuration" - depends on ARCH_HAVE_UART7 + depends on UART7_SERIALDRIVER config UART7_RXBUFSIZE int "Receive buffer size" @@ -1815,7 +1764,7 @@ config UART7_DMA endmenu menu "USART8 Configuration" - depends on USART8_ISUART + depends on USART8_SERIALDRIVER config USART8_RXBUFSIZE int "Receive buffer size" @@ -1880,7 +1829,7 @@ config USART8_DMA endmenu menu "UART8 Configuration" - depends on ARCH_HAVE_UART8 + depends on UART8_SERIALDRIVER config UART8_RXBUFSIZE int "Receive buffer size" @@ -1945,7 +1894,7 @@ config UART8_DMA endmenu menu "SCI0 Configuration" - depends on ARCH_HAVE_SCI0 + depends on SCI0_SERIALDRIVER config SCI0_RXBUFSIZE int "SCI0 receive buffer size" @@ -1989,7 +1938,7 @@ config SCI0_2STOP endmenu # SCI0 Configuration menu "SCI1 Configuration" - depends on ARCH_HAVE_SCI1 + depends on SCI1_SERIALDRIVER config SCI1_RXBUFSIZE int "SCI1 receive buffer size" diff --git a/drivers/serial/lowconsole.c b/drivers/serial/lowconsole.c index c6228d79a6f..c3be8596619 100644 --- a/drivers/serial/lowconsole.c +++ b/drivers/serial/lowconsole.c @@ -70,14 +70,17 @@ static int lowconsole_ioctl(struct file *filep, int cmd, unsigned long arg); static const struct file_operations g_consoleops = { - 0, /* open */ - 0, /* close */ + NULL, /* open */ + NULL, /* close */ lowconsole_read, /* read */ lowconsole_write, /* write */ - 0, /* seek */ + NULL, /* seek */ lowconsole_ioctl /* ioctl */ #ifndef CONFIG_DISABLE_POLL - , 0 /* poll */ + , NULL /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ #endif }; diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 2e13f3790a8..2de293d0b03 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -103,6 +103,9 @@ static const struct file_operations g_serialops = #ifndef CONFIG_DISABLE_POLL , uart_poll /* poll */ #endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ +#endif }; /************************************************************************************ @@ -487,7 +490,7 @@ static ssize_t uart_write(FAR struct file *filep, FAR const char *buffer, * interrupted transfer. */ - if (buflen < nwritten) + if (buflen < (size_t)nwritten) { /* Some data was transferred. Return the number of bytes that * were successfully transferred. @@ -557,7 +560,7 @@ static ssize_t uart_read(FAR struct file *filep, FAR char *buffer, size_t buflen * data from the end of the buffer. */ - while (recvd < buflen) + while ((size_t)recvd < buflen) { #ifdef CONFIG_SERIAL_REMOVABLE /* If the removable device is no longer connected, refuse to read any diff --git a/drivers/syslog/ramlog.c b/drivers/syslog/ramlog.c index ea8e035ce70..1025500987f 100644 --- a/drivers/syslog/ramlog.c +++ b/drivers/syslog/ramlog.c @@ -123,14 +123,17 @@ static int ramlog_poll(FAR struct file *filep, FAR struct pollfd *fds, static const struct file_operations g_ramlogfops = { - 0, /* open */ - 0, /* close */ - ramlog_read, /* read */ - ramlog_write, /* write */ - 0, /* seek */ - 0 /* ioctl */ + NULL, /* open */ + NULL, /* close */ + ramlog_read, /* read */ + ramlog_write, /* write */ + NULL, /* seek */ + NULL /* ioctl */ #ifndef CONFIG_DISABLE_POLL - , ramlog_poll /* poll */ + , ramlog_poll /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ #endif }; @@ -206,7 +209,7 @@ static void ramlog_pollnotify(FAR struct ramlog_dev_s *priv, static int ramlog_addchar(FAR struct ramlog_dev_s *priv, char ch) { irqstate_t flags; - int nexthead; + size_t nexthead; /* Disable interrupts (in case we are NOT called from interrupt handler) */ @@ -271,7 +274,7 @@ static ssize_t ramlog_read(FAR struct file *filep, FAR char *buffer, size_t len) /* Loop until something is read */ - for (nread = 0; nread < len; ) + for (nread = 0; (size_t)nread < len; ) { /* Get the next byte from the buffer */ @@ -437,7 +440,7 @@ static ssize_t ramlog_write(FAR struct file *filep, FAR const char *buffer, size * interrupts. */ - for (nwritten = 0; nwritten < len; nwritten++) + for (nwritten = 0; (size_t)nwritten < len; nwritten++) { /* Get the next character to output */ @@ -529,7 +532,7 @@ int ramlog_poll(FAR struct file *filep, FAR struct pollfd *fds, bool setup) FAR struct inode *inode = filep->f_inode; FAR struct ramlog_dev_s *priv; pollevent_t eventset; - int ndx; + size_t ndx; int ret; int i; diff --git a/drivers/timers/timer.c b/drivers/timers/timer.c index 4e4e4d94f8e..afdd39a39ea 100644 --- a/drivers/timers/timer.c +++ b/drivers/timers/timer.c @@ -114,10 +114,13 @@ static const struct file_operations g_timerops = timer_close, /* close */ timer_read, /* read */ timer_write, /* write */ - 0, /* seek */ + NULL, /* seek */ timer_ioctl /* ioctl */ #ifndef CONFIG_DISABLE_POLL - , 0 /* poll */ + , NULL /* poll */ +#endif +#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS + , NULL /* unlink */ #endif }; diff --git a/fs/inode/Make.defs b/fs/inode/Make.defs index 14502451053..753a0706eee 100644 --- a/fs/inode/Make.defs +++ b/fs/inode/Make.defs @@ -39,7 +39,7 @@ ifneq ($(CONFIG_NFILE_DESCRIPTORS),0) CSRCS += fs_files.c fs_foreachinode.c fs_inode.c fs_inodeaddref.c CSRCS += fs_inodebasename.c fs_inodefind.c fs_inoderelease.c -CSRCS += fs_inoderemove.c fs_inodereserve.c +CSRCS += fs_inoderemove.c fs_inodereserve.c fs_filedetach.c # Include inode/utils build support diff --git a/fs/inode/fs_filedetach.c b/fs/inode/fs_filedetach.c new file mode 100644 index 00000000000..8b13250cbc1 --- /dev/null +++ b/fs/inode/fs_filedetach.c @@ -0,0 +1,217 @@ +/**************************************************************************** + * fs/inode/fs_filedetach.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "inode/inode.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: _files_semtake + ****************************************************************************/ + +static inline void _files_semtake(FAR struct filelist *list) +{ + /* Take the semaphore (perhaps waiting) */ + + while (sem_wait(&list->fl_sem) != 0) + { + /* The only case that an error should occur here is if + * the wait was awakened by a signal. + */ + + DEBUGASSERT(get_errno() == EINTR); + } +} + +/**************************************************************************** + * Name: _files_semgive + ****************************************************************************/ + +#define _files_semgive(list) sem_post(&list->fl_sem) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: file_detach + * + * Description: + * This function is used to device drivers to create a task-independent + * handle to an entity in the file system. file_detach() duplicates the + * 'struct file' that underlies the file descriptor, then closes the file + * descriptor. + * + * This function will fail if fd is not a valid file descriptor. In + * particular, it will fail if fd is a socket descriptor. + * + * Input Parameters: + * fd - The file descriptor to be detached. This descriptor will be + * closed and invalid if the file was successfully detached. + * filep - A pointer to a user provided memory location in which to + * received the duplicated, detached file structure. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +#if CONFIG_NFILE_DESCRIPTORS > 0 +int file_detach(int fd, FAR struct file *filep) +{ + FAR struct filelist *list; + FAR struct file *parent; + + /* Verify the file descriptor range */ + + if (fd < 0 || fd >= CONFIG_NFILE_DESCRIPTORS) + { + /* Not a file descriptor (might be a socket descriptor) */ + + return -EBADF; + } + + /* Get the thread-specific file list. It should never be NULL in this + * context. + */ + + list = sched_getfiles(); + DEBUGASSERT(list != NULL); + + /* If the file was properly opened, there should be an inode assigned */ + + _files_semtake(list); + parent = &list->fl_files[fd]; + if (parent->f_inode == NULL) + { + /* File is not open */ + + _files_semgive(list); + return -EBADF; + } + + /* Duplicate the 'struct file' content into the user-provided file + * structure. + */ + + filep->f_oflags = parent->f_oflags; + filep->f_pos = parent->f_pos; + filep->f_inode = parent->f_inode; + filep->f_priv = parent->f_priv; + + /* Release the file descriptore *without* calling the drive close method + * and without decrementing the inode reference count. That will be done + * in file_close_detached(). + */ + + parent->f_oflags = 0; + parent->f_pos = 0; + parent->f_inode = NULL; + parent->f_priv = NULL; + + _files_semgive(list); + return OK; +} +#endif + +/**************************************************************************** + * Name: file_close_detached + * + * Description: + * Close a file that was previously detached with file_detach(). + * + * REVISIT: This is essentially the same as _files_close() + * + * Input Parameters: + * filep - A pointer to a user provided memory location containing the + * open file data returned by file_detach(). + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int file_close_detached(FAR struct file *filep) +{ + struct inode *inode; + int ret = OK; + + DEBUGASSERT(filep != NULL); + inode = filep->f_inode; + + /* Check if the struct file is open (i.e., assigned an inode) */ + + if (inode) + { + /* Close the file, driver, or mountpoint. */ + + if (inode->u.i_ops && inode->u.i_ops->close) + { + /* Perform the close operation */ + + ret = inode->u.i_ops->close(filep); + } + + /* And release the inode */ + + inode_release(inode); + + /* Reset the user file struct instance so that it cannot be reused. */ + + filep->f_oflags = 0; + filep->f_pos = 0; + filep->f_inode = NULL; + filep->f_priv = NULL; + } + + return ret; +} diff --git a/fs/inode/fs_files.c b/fs/inode/fs_files.c index 84f78ee4009..7c4665640e5 100644 --- a/fs/inode/fs_files.c +++ b/fs/inode/fs_files.c @@ -65,7 +65,7 @@ static void _files_semtake(FAR struct filelist *list) while (sem_wait(&list->fl_sem) != 0) { - /* The only case that an error should occr here is if + /* The only case that an error should occur here is if * the wait was awakened by a signal. */ @@ -362,9 +362,9 @@ int files_close(int fd) /* If the file was properly opened, there should be an inode assigned */ if (fd < 0 || fd >= CONFIG_NFILE_DESCRIPTORS || !list->fl_files[fd].f_inode) - { - return -EBADF; - } + { + return -EBADF; + } /* Perform the protected close operation */ diff --git a/fs/nxffs/Kconfig b/fs/nxffs/Kconfig index 3618b2cf642..f3dd6e11663 100644 --- a/fs/nxffs/Kconfig +++ b/fs/nxffs/Kconfig @@ -31,8 +31,8 @@ config NXFFS_SCAN_VOLUME The down side is that scanning the volume can adversely affect your start-up time. An option is to just erase the FLASH and - reboot in these cases. That can be done with - apps/system/flash_eraseall. + reboot in these cases. That can be done with MDIOC_BULKERASE + IOCTL command. config NXFFS_NAND bool "Enable NAND support" diff --git a/fs/vfs/fs_close.c b/fs/vfs/fs_close.c index b784b2c9e0c..3a52d0c086f 100644 --- a/fs/vfs/fs_close.c +++ b/fs/vfs/fs_close.c @@ -105,7 +105,7 @@ int close(int fd) #if CONFIG_NFILE_DESCRIPTORS > 0 /* Close the driver or mountpoint. NOTES: (1) there is no - * exclusion mechanism here , the driver or mountpoint must be + * exclusion mechanism here, the driver or mountpoint must be * able to handle concurrent operations internally, (2) The driver * may have been opened numerous times (for different file * descriptors) and must also handle being closed numerous times. @@ -122,6 +122,7 @@ int close(int fd) err = -ret; goto errout; } + return OK; #endif diff --git a/fs/vfs/fs_dup.c b/fs/vfs/fs_dup.c index 03b8b751ab6..7e8096663d9 100644 --- a/fs/vfs/fs_dup.c +++ b/fs/vfs/fs_dup.c @@ -46,14 +46,6 @@ #include #include "inode/inode.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/fs/vfs/fs_dup2.c b/fs/vfs/fs_dup2.c index c81e7b6eae0..02ed1cbecc1 100644 --- a/fs/vfs/fs_dup2.c +++ b/fs/vfs/fs_dup2.c @@ -52,14 +52,6 @@ #if CONFIG_NFILE_DESCRIPTORS > 0 && defined(CONFIG_NET) && CONFIG_NSOCKET_DESCRIPTORS > 0 -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ diff --git a/include/assert.h b/include/assert.h index bb6948ab53c..c636dae9a98 100644 --- a/include/assert.h +++ b/include/assert.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/assert.h * - * Copyright (C) 2007-2009, 2011-2013, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2011-2013, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -51,9 +51,10 @@ #undef ASSERT /* Assert if the condition is not true */ #undef VERIFY /* Assert if a function returns a negative value */ +#undef PANIC /* Unconditional abort */ #undef DEBUGASSERT /* Like ASSERT, but only if CONFIG_DEBUG is defined */ #undef DEBUGVERIFY /* Like VERIFY, but only if CONFIG_DEBUG is defined */ -#undef PANIC /* Unconditional abort */ +#undef DEBUGPANIC /* Like PANIC, but only if CONFIG_DEBUG is defined */ #ifdef CONFIG_HAVE_FILENAME @@ -80,62 +81,37 @@ # define PANIC() \ up_assert((const uint8_t *)__FILE__, (int)__LINE__) -# ifdef CONFIG_DEBUG +#else -# define DEBUGASSERT(f) \ - do \ - { \ - if (!(f)) \ - { \ - up_assert((const uint8_t *)__FILE__, (int)__LINE__); \ - } \ - } \ - while (0) +# define ASSERT(f) do { if (!(f)) up_assert(); } while (0) +# define VERIFY(f) do { if ((f) < 0) up_assert(); } while (0) +# define PANIC() up_assert() -# define DEBUGVERIFY(f) \ - do \ - { \ - if ((f) < 0) \ - { \ - up_assert((const uint8_t *)__FILE__, (int)__LINE__); \ - } \ - } \ - while (0) +#endif -# define DEBUGPANIC() \ - up_assert((const uint8_t *)__FILE__, (int)__LINE__) +#ifdef CONFIG_DEBUG -# else - -# define DEBUGASSERT(f) -# define DEBUGVERIFY(f) ((void)(f)) -# define DEBUGPANIC() - -# endif /* CONFIG_DEBUG */ +# define DEBUGASSERT(f) ASSERT(f) +# define DEBUGVERIFY(f) VERIFY(f) +# define DEBUGPANIC() PANIC() #else -# define ASSERT(f) { if (!(f)) up_assert(); } -# define VERIFY(f) { if ((f) < 0) up_assert(); } -# define PANIC() up_assert() - -# ifdef CONFIG_DEBUG - -# define DEBUGASSERT(f) { if (!(f)) up_assert(); } -# define DEBUGVERIFY(f) { if ((f) < 0) up_assert(); } -# define DEBUGPANIC() up_assert() - -# else - -# define DEBUGASSERT(f) -# define DEBUGVERIFY(f) ((void)(f)) -# define DEBUGPANIC() +# define DEBUGASSERT(f) +# define DEBUGVERIFY(f) ((void)(f)) +# define DEBUGPANIC() # endif /* CONFIG_DEBUG */ -#endif -#ifndef assert -# define assert ASSERT +/* The C standard states that if NDEBUG is defined, assert will do nothing. + * Users can define and undefine NDEBUG as they see fit to choose when assert + * does something or does not do anything. + */ + +#ifdef NDEBUG +# define assert(f) +#else +# define assert(f) ASSERT(f) #endif /**************************************************************************** diff --git a/include/netinet/arp.h b/include/netinet/arp.h index caaa3e64b49..1ed14a6a67f 100644 --- a/include/netinet/arp.h +++ b/include/netinet/arp.h @@ -102,9 +102,9 @@ extern "C" ****************************************************************************/ /* If CONFIG_NET_ARPIOCTLS is defined then the semi-standard ioctl commands - * described above are supported. If not, you can call the uIP ARP interfaces - * directly in a very non-standard way. See include/nuttx/net/arp.h for - * prototypes. + * described above are supported. If not, you can call the network ARP + * interfaces directly in a very non-standard way. See + * include/nuttx/net/arp.h for prototypes. */ #undef EXTERN diff --git a/include/nuttx/1wire.h b/include/nuttx/1wire.h new file mode 100644 index 00000000000..2879d03089f --- /dev/null +++ b/include/nuttx/1wire.h @@ -0,0 +1,166 @@ +/**************************************************************************** + * include/nuttx/1wire.h + * + * Copyright (C) 2016 Aleksandr Vyhovanec. All rights reserved. + * Author: Aleksandr Vyhovanec + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_1WIRE_H +#define __INCLUDE_NUTTX_1WIRE_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Name: ONEWIRE_RESET + * + * Description: + * Reset pulse and presence detect. Each write operational will be an 'atomic' + * operation in the sense that any other 1-Wire actions will be serialized + * and pend until this write completes. + * + * Input Parameters: + * dev - Device-specific state data + * + * Returned Value: + * 0: success, <0: A negated errno + * + ****************************************************************************/ + +#define ONEWIRE_RESET(d) ((d)->ops->reset(d)) + +/**************************************************************************** + * Name: ONEWIRE_WRITE + * + * Description: + * Send a block of data on 1-Wire. Each write operational will be an 'atomic' + * operation in the sense that any other 1-Wire actions will be serialized + * and pend until this write completes. + * + * Input Parameters: + * dev - Device-specific state data + * buffer - A pointer to the read-only buffer of data to be written to device + * buflen - The number of bytes to send from the buffer + * + * Returned Value: + * 0: success, <0: A negated errno + * + ****************************************************************************/ + +#define ONEWIRE_WRITE(d,b,l) ((d)->ops->write(d,b,l)) + +/**************************************************************************** + * Name: ONEWIRE_READ + * + * Description: + * Receive a block of data from 1-Wire. Each read operational will be an 'atomic' + * operation in the sense that any other 1-Wire actions will be serialized + * and pend until this read completes. + * + * Input Parameters: + * dev - Device-specific state data + * buffer - A pointer to a buffer of data to receive the data from the device + * buflen - The requested number of bytes to be read + * + * Returned Value: + * 0: success, <0: A negated errno + * + ****************************************************************************/ + +#define ONEWIRE_READ(d,b,l) ((d)->ops->read(d,b,l)) + +/**************************************************************************** + * Name: ONEWIRE_EXCHANGE + * + * Description: + * Reset pulse and presence detect, send a block of data and receive a block + * of data from 1-Wir. Each write operational will be an 'atomic' + * operation in the sense that any other 1-Wire actions will be serialized + * and pend until this write completes. + * + * Input Parameters: + * dev - Device-specific state data + * reset - Reset pulse and presence detect + * txbuffer - A pointer to the read-only buffer of data to be written to device + * txbuflen - The number of bytes to send from the buffer + * rxbuffer - A pointer to a buffer of data to receive the data from the device + * rxbuflen - The requested number of bytes to be read + * + * Returned Value: + * 0: success, <0: A negated errno + * + ****************************************************************************/ + +#define ONEWIRE_EXCHANGE(d,r,tx,tl,rx,rl) ((d)->ops->exchange(d,r,tx,tl,rx,rl)) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/* The 1-Wire vtable */ + +struct onewire_dev_s; +struct onewire_ops_s +{ + int (*reset)(FAR struct onewire_dev_s *dev); + int (*write)(FAR struct onewire_dev_s *dev, FAR const uint8_t *buffer, + int buflen); + int (*read)(FAR struct onewire_dev_s *dev, FAR uint8_t *buffer, + int buflen); + int (*exchange)(FAR struct onewire_dev_s *dev, bool reset, + FAR const uint8_t *txbuffer, int txbuflen, + FAR uint8_t *rxbuffer, int rxbuflen); +}; + +/* 1-Wire private data. This structure only defines the initial fields of the + * structure visible to the 1-Wire client. The specific implementation may + * add additional, device specific fields after the vtable. + */ + +struct onewire_dev_s +{ + const struct onewire_ops_s *ops; /* 1-Wire vtable */ +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#endif /* __INCLUDE_NUTTX_1WIRE_H */ diff --git a/include/nuttx/analog/adc.h b/include/nuttx/analog/adc.h index 04db97626cf..0044c03364d 100644 --- a/include/nuttx/analog/adc.h +++ b/include/nuttx/analog/adc.h @@ -1,10 +1,10 @@ /************************************************************************************ * include/nuttx/analog/adc.h * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Copyright (C) 2011 Li Zhuoyi. All rights reserved. * Author: Li Zhuoyi - * History: 0.1 2011-08-04 initial version - * 0.2 remove ao_read + * Gregory Nutt * * Derived from include/nuttx/can.h * @@ -75,6 +75,27 @@ /************************************************************************************ * Public Types ************************************************************************************/ +/* These are callbacks to notify the upper-half driver of ADC events */ + +struct adc_dev_s; +struct adc_callback_s +{ + /* This method is called from the lower half, platform-specific ADC logic when + * new ADC sample data is available. + * + * Input Parameters: + * dev - The ADC device structure that was previously registered by adc_register() + * ch - And ID for the ADC channel number that generated the data + * data - The actual converted data from the channel. + * + * Returned Value: + * Zero on success; a negated errno value on failure. + */ + + CODE int (*au_receive)(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data); +}; + +/* This describes on ADC message */ struct adc_msg_s { @@ -82,6 +103,8 @@ struct adc_msg_s int32_t am_data; /* ADC convert result (4 bytes) */ } packed_struct; +/* This describes a FIFO of ADC messages */ + struct adc_fifo_s { sem_t af_sem; /* Counting semaphore */ @@ -99,6 +122,13 @@ struct adc_fifo_s struct adc_dev_s; struct adc_ops_s { + /* Bind the upper-half driver callbacks to the lower-half implementation. This + * must be called early in order to receive ADC event notifications. + */ + + CODE int (*ao_bind)(FAR struct adc_dev_s *dev, + FAR const struct adc_callback_s *callback); + /* Reset the ADC device. Called early to initialize the hardware. This * is called, before ao_setup() and on error conditions. */ @@ -129,8 +159,8 @@ struct adc_ops_s }; /* This is the device structure used by the driver. The caller of - * adc_register() must allocate and initialize this structure. The - * calling logic need only set all fields to zero except: + * adc_register() must allocate and initialize this structure. The calling + * logic need only set all fields to zero except: * * The elements of 'ad_ops', and 'ad_priv' * @@ -139,21 +169,24 @@ struct adc_ops_s struct adc_dev_s { +#ifdef CONFIG_ADC + /* Fields managed by common upper half ADC logic */ + uint8_t ad_ocount; /* The number of times the device has been opened */ uint8_t ad_nrxwaiters; /* Number of threads waiting to enqueue a message */ sem_t ad_closesem; /* Locks out new opens while close is in progress */ sem_t ad_recvsem; /* Used to wakeup user waiting for space in ad_recv.buffer */ struct adc_fifo_s ad_recv; /* Describes receive FIFO */ +#endif + + /* Fields provided by lower half ADC logic */ + FAR const struct adc_ops_s *ad_ops; /* Arch-specific operations */ FAR void *ad_priv; /* Used by the arch-specific logic */ }; /************************************************************************************ - * Public Data - ************************************************************************************/ - -/************************************************************************************ - * Public Functions + * Public Function Prototypes ************************************************************************************/ #if defined(__cplusplus) @@ -164,6 +197,7 @@ extern "C" /************************************************************************************ * "Upper-Half" ADC Driver Interfaces ************************************************************************************/ + /************************************************************************************ * Name: adc_register * @@ -188,28 +222,10 @@ extern "C" int adc_register(FAR const char *path, FAR struct adc_dev_s *dev); -/************************************************************************************ - * Name: adc_receive - * - * Description: - * This function is called from the lower half, platform-specific ADC logic when - * new ADC sample data is available. - * - * Input Parameters: - * dev - The ADC device structure that was previously registered by adc_register() - * ch - And ID for the ADC channel number that generated the data - * data - The actualy converted data from the channel. - * - * Returned Value: - * Zero on success; a negated errno value on failure. - * - ************************************************************************************/ - -int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data); - /************************************************************************************ * Platform-Independent "Lower Half" ADC Driver Interfaces ************************************************************************************/ + /************************************************************************************ * Name: up_ads1255initialize * @@ -218,7 +234,8 @@ int adc_receive(FAR struct adc_dev_s *dev, uint8_t ch, int32_t data); * ************************************************************************************/ -FAR struct adc_dev_s *up_ads1255initialize(FAR struct spi_dev_s *spi, unsigned int devno); +FAR struct adc_dev_s *up_ads1255initialize(FAR struct spi_dev_s *spi, + unsigned int devno); #if defined(__cplusplus) } diff --git a/include/nuttx/board.h b/include/nuttx/board.h index 9e0ea70ab80..e143c4862bb 100644 --- a/include/nuttx/board.h +++ b/include/nuttx/board.h @@ -144,9 +144,24 @@ void board_initialize(void); * called directly from application code, but only indirectly via the * (non-standard) boardctl() interface using the command BOARDIOC_INIT. * + * Input Parameters: + * arg - The boardctl() argument is passed to the board_app_initialize() + * implementation without modification. The argument has no + * meaning to NuttX; the meaning of the argument is a contract + * between the board-specific initalization logic and the the + * matching application logic. The value cold be such things as a + * mode enumeration value, a set of DIP switch switch settings, a + * pointer to configuration data read from a file or serial FLASH, + * or whatever you would like to do with it. Every implementation + * should accept zero/NULL as a default configuration. + * + * Returned Value: + * Zero (OK) is returned on success; a negated errno value is returned on + * any failure to indicate the nature of the failure. + * ****************************************************************************/ -int board_app_initialize(void); +int board_app_initialize(uintptr_t arg); /**************************************************************************** * Name: board_power_off diff --git a/include/nuttx/crypto/crypto.h b/include/nuttx/crypto/crypto.h index 631dedd893a..3433a72c9e9 100644 --- a/include/nuttx/crypto/crypto.h +++ b/include/nuttx/crypto/crypto.h @@ -90,6 +90,9 @@ int up_cryptoinitialize(void); int up_aesinitialize(void); int aes_cypher(FAR void *out, FAR const void *in, uint32_t size, FAR const void *iv, FAR const void *key, uint32_t keysize, int mode, int encrypt); +int aes_init(FAR const void *iv, FAR const void *key, uint32_t keysize, int mode, + int encrypt); +int aes_update(FAR const void *out, uint32_t *outl, FAR const void *in, uint32_t inl); #endif #if defined(CONFIG_CRYPTO_ALGTEST) diff --git a/include/nuttx/fs/fs.h b/include/nuttx/fs/fs.h index 8de9a1b0953..b415725ee8f 100644 --- a/include/nuttx/fs/fs.h +++ b/include/nuttx/fs/fs.h @@ -364,7 +364,6 @@ extern "C" #define EXTERN extern #endif -/* fs_inode.c ***************************************************************/ /**************************************************************************** * Name: fs_initialize * @@ -376,7 +375,6 @@ extern "C" void fs_initialize(void); -/* fs_foreachmountpoint.c ***************************************************/ /**************************************************************************** * Name: foreach_mountpoint * @@ -401,7 +399,6 @@ void fs_initialize(void); int foreach_mountpoint(foreach_mountpoint_t handler, FAR void *arg); #endif -/* fs_registerdriver.c ******************************************************/ /**************************************************************************** * Name: register_driver * @@ -428,7 +425,6 @@ int foreach_mountpoint(foreach_mountpoint_t handler, FAR void *arg); int register_driver(FAR const char *path, FAR const struct file_operations *fops, mode_t mode, FAR void *priv); -/* fs_registerblockdriver.c *************************************************/ /**************************************************************************** * Name: register_blockdriver * @@ -458,7 +454,6 @@ int register_blockdriver(FAR const char *path, FAR void *priv); #endif -/* fs_unregisterdriver.c ****************************************************/ /**************************************************************************** * Name: unregister_driver * @@ -469,7 +464,6 @@ int register_blockdriver(FAR const char *path, int unregister_driver(const char *path); -/* fs_unregisterblockdriver.c ***********************************************/ /**************************************************************************** * Name: unregister_blockdriver * @@ -480,7 +474,6 @@ int unregister_driver(const char *path); int unregister_blockdriver(const char *path); -/* fs_open.c ****************************************************************/ /**************************************************************************** * Name: inode_checkflags * @@ -491,7 +484,6 @@ int unregister_blockdriver(const char *path); int inode_checkflags(FAR struct inode *inode, int oflags); -/* fs_files.c ***************************************************************/ /**************************************************************************** * Name: files_initlist * @@ -529,7 +521,6 @@ void files_releaselist(FAR struct filelist *list); int file_dup2(FAR struct file *filep1, FAR struct file *filep2); #endif -/* fs_filedup.c *************************************************************/ /**************************************************************************** * Name: fs_dupfd OR dup * @@ -541,7 +532,7 @@ int file_dup2(FAR struct file *filep1, FAR struct file *filep2); * function IS dup(). * * This alternative naming is used when dup could operate on both file and - * socket descritors to avoid drawing unused socket support into the link. + * socket descriptors to avoid drawing unused socket support into the link. * ****************************************************************************/ @@ -561,7 +552,6 @@ int fs_dupfd(int fd, int minfd); int file_dup(FAR struct file *filep, int minfd); -/* fs_filedup2.c ************************************************************/ /**************************************************************************** * Name: fs_dupfd2 OR dup2 * @@ -584,7 +574,52 @@ int fs_dupfd2(int fd1, int fd2); #endif #endif -/* fs_openblockdriver.c *****************************************************/ +/**************************************************************************** + * Name: file_detach + * + * Description: + * This function is used to device drivers to create a task-independent + * handle to an entity in the file system. file_detach() duplicates the + * 'struct file' that underlies the file descriptor, then closes the file + * descriptor. + * + * This function will fail if fd is not a valid file descriptor. In + * particular, it will fail if fd is a socket descriptor. + * + * Input Parameters: + * fd - The file descriptor to be detached. This descriptor will be + * closed and invalid if the file was successfully detached. + * filep - A pointer to a user provided memory location in which to + * received the duplicated, detached file structure. + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +#if CONFIG_NFILE_DESCRIPTORS > 0 +int file_detach(int fd, FAR struct file *filep); +#endif + +/**************************************************************************** + * Name: file_close_detached + * + * Description: + * Close a file that was previously detached with file_detach(). + * + * Input Parameters: + * filep - A pointer to a user provided memory location containing the + * open file data returned by file_detach(). + * + * Returned Value: + * Zero (OK) is returned on success; A negated errno value is returned on + * any failure to indicate the nature of the failure. + * + ****************************************************************************/ + +int file_close_detached(FAR struct file *filep); + /**************************************************************************** * Name: open_blockdriver * @@ -613,7 +648,6 @@ int open_blockdriver(FAR const char *pathname, int mountflags, FAR struct inode **ppinode); #endif -/* fs_closeblockdriver.c ****************************************************/ /**************************************************************************** * Name: close_blockdriver * @@ -635,7 +669,6 @@ int open_blockdriver(FAR const char *pathname, int mountflags, int close_blockdriver(FAR struct inode *inode); #endif -/* fs/vfs/fs_ioctl.c ********************************************************/ /**************************************************************************** * Name: fs_ioctl * @@ -669,7 +702,6 @@ int close_blockdriver(FAR struct inode *inode); int fs_ioctl(int fd, int req, unsigned long arg); #endif -/* fs_fdopen.c **************************************************************/ /**************************************************************************** * Name: fs_fdopen * @@ -684,7 +716,6 @@ struct tcb_s; /* Forward reference */ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb); #endif -/* libc/stdio/lib_fflush.c *************************************************/ /**************************************************************************** * Name: lib_flushall * @@ -698,7 +729,6 @@ FAR struct file_struct *fs_fdopen(int fd, int oflags, FAR struct tcb_s *tcb); int lib_flushall(FAR struct streamlist *list); #endif -/* libc/misc/lib_sendfile.c *************************************************/ /**************************************************************************** * Name: lib_sendfile * @@ -711,7 +741,6 @@ int lib_flushall(FAR struct streamlist *list); ssize_t lib_sendfile(int outfd, int infd, off_t *offset, size_t count); #endif -/* fs/fs_getfilep.c *********************************************************/ /**************************************************************************** * Name: fs_getfilep * @@ -734,7 +763,6 @@ ssize_t lib_sendfile(int outfd, int infd, off_t *offset, size_t count); FAR struct file *fs_getfilep(int fd); #endif -/* fs/fs_read.c *************************************************************/ /**************************************************************************** * Name: file_read * @@ -749,7 +777,6 @@ FAR struct file *fs_getfilep(int fd); ssize_t file_read(FAR struct file *filep, FAR void *buf, size_t nbytes); #endif -/* fs/fs_write.c ************************************************************/ /**************************************************************************** * Name: file_write * @@ -764,7 +791,6 @@ ssize_t file_read(FAR struct file *filep, FAR void *buf, size_t nbytes); ssize_t file_write(FAR struct file *filep, FAR const void *buf, size_t nbytes); #endif -/* fs/fs_pread.c ************************************************************/ /**************************************************************************** * Name: file_pread * @@ -780,7 +806,6 @@ ssize_t file_pread(FAR struct file *filep, FAR void *buf, size_t nbytes, off_t offset); #endif -/* fs/fs_pwrite.c ***********************************************************/ /**************************************************************************** * Name: file_pwrite * @@ -796,7 +821,6 @@ ssize_t file_pwrite(FAR struct file *filep, FAR const void *buf, size_t nbytes, off_t offset); #endif -/* fs/fs_lseek.c ************************************************************/ /**************************************************************************** * Name: file_seek * @@ -811,7 +835,6 @@ ssize_t file_pwrite(FAR struct file *filep, FAR const void *buf, off_t file_seek(FAR struct file *filep, off_t offset, int whence); #endif -/* fs/fs_fsync.c ************************************************************/ /**************************************************************************** * Name: file_fsync * @@ -826,7 +849,6 @@ off_t file_seek(FAR struct file *filep, off_t offset, int whence); int file_fsync(FAR struct file *filep); #endif -/* fs/fs_fcntl.c ************************************************************/ /**************************************************************************** * Name: file_vfcntl * @@ -841,7 +863,6 @@ int file_fsync(FAR struct file *filep); int file_vfcntl(FAR struct file *filep, int cmd, va_list ap); #endif -/* fs/fs_poll.c *************************************************************/ /**************************************************************************** * Function: file_poll * @@ -864,7 +885,6 @@ int file_vfcntl(FAR struct file *filep, int cmd, va_list ap); int file_poll(int fd, FAR struct pollfd *fds, bool setup); #endif -/* drivers/dev_null.c *******************************************************/ /**************************************************************************** * Name: devnull_register * @@ -875,7 +895,6 @@ int file_poll(int fd, FAR struct pollfd *fds, bool setup); void devnull_register(void); -/* crypto/cryptodev.c *******************************************************/ /**************************************************************************** * Name: devcrypto_register * @@ -886,7 +905,6 @@ void devnull_register(void); void devcrypto_register(void); -/* drivers/dev_zero.c *******************************************************/ /**************************************************************************** * Name: devzero_register * @@ -897,7 +915,6 @@ void devcrypto_register(void); void devzero_register(void); -/* drivers/bch/bchdev_register.c ********************************************/ /**************************************************************************** * Name: bchdev_register * @@ -910,7 +927,6 @@ void devzero_register(void); int bchdev_register(FAR const char *blkdev, FAR const char *chardev, bool readonly); -/* drivers/bch/bchdev_unregister.c ******************************************/ /**************************************************************************** * Name: bchdev_unregister * @@ -926,7 +942,6 @@ int bchdev_unregister(FAR const char *chardev); * are incompatible. One and only one access method should be implemented. */ -/* drivers/bch/bchlib_setup.c ***********************************************/ /**************************************************************************** * Name: bchlib_setup * @@ -938,7 +953,6 @@ int bchdev_unregister(FAR const char *chardev); int bchlib_setup(FAR const char *blkdev, bool readonly, FAR void **handle); -/* drivers/bch/bchlib_teardown.c ********************************************/ /**************************************************************************** * Name: bchlib_teardown * @@ -950,7 +964,6 @@ int bchlib_setup(FAR const char *blkdev, bool readonly, FAR void **handle); int bchlib_teardown(FAR void *handle); -/* drivers/bch/bchlib_read.c ************************************************/ /**************************************************************************** * Name: bchlib_read * @@ -963,7 +976,6 @@ int bchlib_teardown(FAR void *handle); ssize_t bchlib_read(FAR void *handle, FAR char *buffer, size_t offset, size_t len); -/* drivers/bch/bchlib_write.c ***********************************************/ /**************************************************************************** * Name: bchlib_write * diff --git a/include/nuttx/i2c/i2c_master.h b/include/nuttx/i2c/i2c_master.h index 1938bcbfa10..c3684398ee6 100644 --- a/include/nuttx/i2c/i2c_master.h +++ b/include/nuttx/i2c/i2c_master.h @@ -155,10 +155,10 @@ struct i2c_master_s; struct i2c_msg_s; struct i2c_ops_s { - int (*transfer)(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs, - int count); + CODE int (*transfer)(FAR struct i2c_master_s *dev, + FAR struct i2c_msg_s *msgs, int count); #ifdef CONFIG_I2C_RESET - int (*reset)(FAR struct i2c_master_s *dev); + CODE int (*reset)(FAR struct i2c_master_s *dev); #endif }; diff --git a/include/nuttx/lcd/pcf8574_lcd_backpack.h b/include/nuttx/lcd/pcf8574_lcd_backpack.h new file mode 100644 index 00000000000..abbe6f97012 --- /dev/null +++ b/include/nuttx/lcd/pcf8574_lcd_backpack.h @@ -0,0 +1,179 @@ +/**************************************************************************** + * include/nuttx/lcd/pcf8574_lcd_backpack.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: dev@ziggurat29.com + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __INCLUDE_NUTTX_LCD_PCF8574_LCD_BACKPACK_H +#define __INCLUDE_NUTTX_LCD_PCF8574_LCD_BACKPACK_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Configurations of some well-known boards. You may still have to modify the + * address if was changed from the default. You will also need to specify the + * geometry of your attached LCD display. You can support: + * 1x8, 1x12, 1x16, 2x8, 2x12, 2x16, 2x20, 2x24, 2x40, 4x16, 4x20 + * Pretty much anything on the market except 4x40, which really consists of two + * separate 2x40 controllers, and the I2C backpack doesn't support those due + * to the second 'E' line being needed. + * Additionally, you still need to set the (row,col) geometry explicitly, since + * there is not a means of determining this dynamically. + * Consider these 'informative'. + * XXX Note, actual testing has been done on LCD_I2C_BACKPACK_CFG_MJKDZ + * and LCD_I2C_BACKPACK_CFG_SAINSMART only, the others come from online + * research. + */ + +/* board marked 'mjkdz' and Arduino-IIC-LCD GY-LCD-V1 */ + +#define LCD_I2C_BACKPACK_CFG_MJKDZ {0x20,4,5,6,0,1,2,3,7,false,0,0} + +/* YwRobot/DFRobot/SainSmart */ + +#define LCD_I2C_BACKPACK_CFG_SAINSMART {0x27,2,1,0,4,5,6,7,3,true,0,0} + +/* Robot Arduino LCM1602/2004 */ + +#define LCD_I2C_BACKPACK_CFG_ROBOT {0x27,2,1,0,4,5,6,7,3,false,0,0} + +/* I2CLCDextraIO board modded for backlight (pnp transistor) */ + +#define LCD_I2C_BACKPACK_CFG_I2CIO_PNP {0x38,6,5,4,0,1,2,3,7,false,0,0} + +/* I2CLCDextraIO board modded for backlight (npn transistor) */ + +#define LCD_I2C_BACKPACK_CFG_I2CIO_NPN {0x38,6,5,4,0,1,2,3,7,true,0,0} + +/* SLCDIOC_CREATECHAR: Create a custom character pattern + * + * argument: pointer to slcd_createchar_s structure (defined below) + */ + +#define SLCDIOC_CREATECHAR _SLCDIOC(0x80) + + /**************************************************************************** + * Public Types + ****************************************************************************/ + +/* Used to specify the pin wiring for this particular module */ + +struct pcf8574_lcd_backpack_config_s +{ + uint8_t addr; /* I2C address; 'unshifted' (i.e. disregarding the LSB R/W bit) + * these can vary widely depending on board pullups, whether it + * uses a PCF8574-T or -AT, etc. Many default to either 0x20 + * or 0x27, and some default to 0x38 or 0x3f. Check with seller. + */ + uint8_t en; /* gpio bit for LCD EN */ + uint8_t rw; /* gpio bit for LCD RW */ + uint8_t rs; /* gpio bit for LCD RS */ + uint8_t d4; /* gpio bit for LCD D4 */ + uint8_t d5; /* gpio bit for LCD D5 */ + uint8_t d6; /* gpio bit for LCD D6 */ + uint8_t d7; /* gpio bit for LCD D7 */ + uint8_t bl; /* gpio bit for backlight control */ + bool bl_active_high; /* is the backlight control active high? */ + uint8_t rows; /* screen geometry, rows, 1, 2 or 4 */ + uint8_t cols; /* screen geometry, cols, 8, 12, 16, 20, 24, 40 */ +}; + +/* Used with the SLCDIOC_CREATECHAR ioctl call */ + +struct slcd_createchar_s +{ + uint8_t idx; /* Custom character index; 0-7. Note; you'll probably + * want to avoid code point 0 unless you really need it, + * because embedded nul in a C string can cause surprises. + */ + uint8_t bmp[8]; /* Custom character bitmap. The bitmap is structured as + * a 5x8 bitmap. '1' = pixel on, msb-lsb left-to-right, + * and right-justified (i.e. only bits 4-0 are used). + * Each byte represents 1 row. By convention, you are + * expected to leave the last row all 0's, because it is + * used by the cursor, but this is not strictly required. + */ +}; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: pcf8574_lcd_backpack_register + * + * Description: + * Register a character driver that is a I2C LCD 'backpack' based on the + * PCF8574 I2C IO expander. It allows operation of the ever-popular HD44780 + * based LCDs via I2C instead of parallel (saving a bunch of gpio lines). + * + * There are a multitude of these available from various sources (e.g. ebay). + * They typically vary by gpio-to-lcd pin mapping, and I2C addresss, but + * otherwise are functionally identical. + * + * The characters presented for codes depend on the masked rom of the + * particular LCD device attached, but the most common are: + * 'A00', which present 0x20-0x7f, and 0xa0-0xff', similar to JIS X 0201 + * 'A02', which present 0x10-0xff, and include various european symbols + * In both cases, codes 0x00-0x07 map to the CGRAM characters, which can be + * loaded via ioctl SLCDIOC_CREATECHAR (q.v.). + * + * This driver supports the SLCD codec for various escape sequences; q.v. + * nuttx/lcd/slcd_codec.h for details. This driver supports the SLCD ioctl + * interface for various extended commands; q.v. nuttx/lcd/slcd_ioctl.h for + * details. This driver supports an additional ioctl for defining custom + * characters; see above for details. + * + * Parameters: + * devpath - path to device node; arbitrary, but typically '/dev/lcd0' or such + * i2c - the low-level i2c bus onto which to bind + * cfg - the board-specific configuration + * + ****************************************************************************/ + +int pcf8574_lcd_backpack_register(FAR const char *devpath, + FAR struct i2c_master_s *i2c, + FAR struct pcf8574_lcd_backpack_config_s *cfg); + +#endif /* __INCLUDE_NUTTX_LCD_PCF8574_LCD_BACKPACK_H */ diff --git a/include/nuttx/mtd/mtd.h b/include/nuttx/mtd/mtd.h index 8d1ee6db705..566f75b3141 100644 --- a/include/nuttx/mtd/mtd.h +++ b/include/nuttx/mtd/mtd.h @@ -298,17 +298,6 @@ FAR struct mtd_dev_s *mtd_rwb_initialize(FAR struct mtd_dev_s *mtd); int ftl_initialize(int minor, FAR struct mtd_dev_s *mtd); -/**************************************************************************** - * Name: flash_eraseall - * - * Description: - * Call a block driver with the MTDIOC_BULKERASE ioctl command. This will - * cause the MTD driver to erase all of the flash. - * - ****************************************************************************/ - -int flash_eraseall(FAR const char *driver); - /**************************************************************************** * Name: smart_initialize * @@ -412,6 +401,16 @@ void at24c_uninitialize(FAR struct mtd_dev_s *mtd); FAR struct mtd_dev_s *at25_initialize(FAR struct spi_dev_s *dev); +/**************************************************************************** + * Name: is25xp + * + * Description: + * Initializes the driver for SPI-based IS25xP FLASH + * + ****************************************************************************/ + +FAR struct mtd_dev_s *is25xp_initialize(FAR struct spi_dev_s *dev); + /**************************************************************************** * Name: m25p_initialize * diff --git a/include/nuttx/net/arp.h b/include/nuttx/net/arp.h index 236053ce703..cf04895f767 100644 --- a/include/nuttx/net/arp.h +++ b/include/nuttx/net/arp.h @@ -5,7 +5,7 @@ * Copyright (C) 2007, 2009-2012, 2015-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * - * Derived from uIP with has a similar BSD-styple license: + * Derived from uIP with has a similar BSD-style license: * * Author: Adam Dunkels * Copyright (c) 2001-2003, Adam Dunkels. diff --git a/include/nuttx/net/cs89x0.h b/include/nuttx/net/cs89x0.h index 9d92a193117..5629a8f4795 100644 --- a/include/nuttx/net/cs89x0.h +++ b/include/nuttx/net/cs89x0.h @@ -86,9 +86,9 @@ struct cs89x0_driver_s uint32_t cs_txunderrun; /* Count of Tx underrun errors */ #endif - /* This holds the information visible to uIP/NuttX */ + /* This holds the information visible to the NuttX network */ - struct net_driver_s cs_dev; /* Interface understood by uIP */ + struct net_driver_s cs_dev; /* Interface understood by the network */ }; /**************************************************************************** diff --git a/include/nuttx/net/icmp.h b/include/nuttx/net/icmp.h index f64895afc4e..875deaae425 100644 --- a/include/nuttx/net/icmp.h +++ b/include/nuttx/net/icmp.h @@ -1,6 +1,6 @@ /**************************************************************************** * include/nuttx/net/icmp.h - * Header file for the uIP ICMP stack. + * Header file for the NuttX ICMP stack. * * Copyright (C) 2007-2009, 2012, 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/include/nuttx/net/icmpv6.h b/include/nuttx/net/icmpv6.h index af17c4b95b0..d303cfa8480 100644 --- a/include/nuttx/net/icmpv6.h +++ b/include/nuttx/net/icmpv6.h @@ -1,6 +1,6 @@ /**************************************************************************** * include/nuttx/net/icmpv6.h - * Header file for the uIP ICMPv6 stack. + * Header file for the NuttX ICMPv6 stack. * * Copyright (C) 2007-2009, 2012, 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/include/nuttx/net/igmp.h b/include/nuttx/net/igmp.h index 68028daeea3..d0620dbc7b2 100644 --- a/include/nuttx/net/igmp.h +++ b/include/nuttx/net/igmp.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/nuttx/net/igmp.h * The definitions in this header file are intended only for internal use - * by the NuttX port of the uIP stack. + * by the NuttX network stack. * * Copyright (C) 2010, 2012, 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/include/nuttx/net/ip.h b/include/nuttx/net/ip.h index 6a494bd283e..6a07edd585b 100644 --- a/include/nuttx/net/ip.h +++ b/include/nuttx/net/ip.h @@ -1,7 +1,7 @@ /**************************************************************************** * include/nuttx/net/ip.h * - * The uIP header file contains IP-related definitions for a number of C + * This header file contains IP-related definitions for a number of C * macros that are used by applications as well as internally by the * OS networking logic. * diff --git a/include/nuttx/net/net.h b/include/nuttx/net/net.h index e95c9e82a73..4fadfd2c8fe 100644 --- a/include/nuttx/net/net.h +++ b/include/nuttx/net/net.h @@ -222,10 +222,11 @@ void net_initialize(void); /**************************************************************************** * Critical section management. The NuttX configuration setting - * CONFIG_NET_NOINTS indicates that uIP not called from the interrupt level. - * If CONFIG_NET_NOINTS is defined, then these will map to semaphore - * controls. Otherwise, it assumed that uIP will be called from interrupt - * level handling and these will map to interrupt enable/disable controls. + * CONFIG_NET_NOINTS indicates that the network stack not called from the + * interrupt level. If CONFIG_NET_NOINTS is defined, then these will map + * to semaphore controls. Otherwise, it assumed that the stack will be + * called from interrupt level handling and these will map to interrupt + * enable/disable controls. * * * If CONFIG_NET_NOINTS is defined, then semaphore based locking is used: diff --git a/include/nuttx/net/netconfig.h b/include/nuttx/net/netconfig.h index f65b1c478d3..e00b75da91e 100644 --- a/include/nuttx/net/netconfig.h +++ b/include/nuttx/net/netconfig.h @@ -1,10 +1,10 @@ /**************************************************************************** * include/nuttx/net/netconfig.h - * Configuration options for NuttX uIP-based networking. + * Configuration options for NuttX networking. * - * This file is used for tweaking various configuration options for - * uIP. This is most assuring the correct default values are provided and - * that configured options are valid. + * This file is used for tweaking various configuration options for the + * network. This is most assuring the correct default values are provided + * and that configured options are valid. * * Note: Network configuration options the netconfig.h should not be changed, * but rather the per-project defconfig file. @@ -72,8 +72,8 @@ /* Layer 2 Configuration Options ********************************************/ -/* The default data link layer for uIP is Ethernet. If CONFIG_NET_SLIP is - * defined in the NuttX header file, then SLIP will be supported. The basic +/* The default data link laye is Ethernet. If CONFIG_NET_SLIP is defined in + * the NuttX header file, then SLIP will be supported. The basic * differences between the SLIP and Ethernet configurations is that when SLIP * is selected: * @@ -204,7 +204,7 @@ /* IP configuration options */ -/* The IP TTL (time to live) of IP packets sent by uIP. +/* The IP TTL (time to live) of IP packets sent by the network stack. * * This should normally not be changed. */ @@ -494,7 +494,7 @@ #ifndef CONFIG_NET_ARPTAB_SIZE /* The size of the ARP table. * - * This option should be set to a larger value if this uIP node will + * This option should be set to a larger value if this network node will * have many connections from the local network. */ @@ -532,7 +532,7 @@ /* Statistics datatype * * This typedef defines the dataype used for keeping statistics in - * uIP. + * the network. */ typedef uint16_t net_stats_t; diff --git a/include/nuttx/net/netdev.h b/include/nuttx/net/netdev.h index de6e997faf1..7ef7cc62d75 100644 --- a/include/nuttx/net/netdev.h +++ b/include/nuttx/net/netdev.h @@ -1,6 +1,7 @@ /**************************************************************************** * include/nuttx/net/netdev.h - * Defines architecture-specific device driver interfaces to the uIP network. + * Defines architecture-specific device driver interfaces to the NuttX + * network. * * Copyright (C) 2007, 2009, 2011-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -232,9 +233,9 @@ struct net_driver_s * headers from this buffer. The size of the link level headers is * configured by the NET_LL_HDRLEN(dev) define. * - * uIP will handle only a single buffer for both incoming and outgoing - * packets. However, the drive design may be concurrently send and - * filling separate, break-off buffers if CONFIG_NET_MULTIBUFFER is + * The network will handle only a single buffer for both incoming and + * outgoing packets. However, the driver design may be concurrently send + * and filling separate, break-off buffers if CONFIG_NET_MULTIBUFFER is * defined. That buffer management must be controlled by the driver. */ @@ -266,7 +267,7 @@ struct net_driver_s * * Holds the length of the packet in the d_buf buffer. * - * When the network device driver calls the uIP input function, + * When the network device driver calls the network input function, * d_len should be set to the length of the packet in the d_buf * buffer. * @@ -353,10 +354,10 @@ typedef int (*devif_poll_callback_t)(FAR struct net_driver_s *dev); ****************************************************************************/ /**************************************************************************** - * uIP device driver functions + * Network device driver functions * * These functions are used by a network device driver for interacting - * with uIP. + * with the NuttX network. * * Process an incoming IP packet. * @@ -383,9 +384,9 @@ typedef int (*devif_poll_callback_t)(FAR struct net_driver_s *dev); * } * } * - * Note: If you are writing a uIP device driver that needs ARP - * (Address Resolution Protocol), e.g., when running uIP over - * Ethernet, you will need to call the uIP ARP code before calling + * Note: If you are writing a network device driver that needs ARP + * (Address Resolution Protocol), e.g., when running the network over + * Ethernet, you will need to call the network ARP code before calling * this function: * * #define BUF ((struct eth_hdr_s *)&dev->d_buf[0]) @@ -424,8 +425,8 @@ int ipv6_input(FAR struct net_driver_s *dev); /**************************************************************************** * Polling of connections * - * These functions will traverse each active uIP connection structure and - * perform appropriate operations: devif_timer() will perform TCP timer + * These functions will traverse each active network connection structure + * and perform appropriate operations: devif_timer() will perform TCP timer * operations (and UDP polling operations); devif_poll() will perform TCP * and UDP polling operations. The CAN driver MUST implement logic to * periodically call devif_timer(); devif_poll() may be called asynchronously @@ -437,7 +438,7 @@ int ipv6_input(FAR struct net_driver_s *dev); * value (which it should do only if it cannot accept further write data). * * When the callback function is called, there may be an outbound packet - * waiting for service in the uIP packet buffer, and if so the d_len field + * waiting for service in the device packet buffer, and if so the d_len field * is set to a value larger than zero. The device driver should then send * out the packet. * @@ -455,9 +456,9 @@ int ipv6_input(FAR struct net_driver_s *dev); * ... * devif_poll(dev, driver_callback); * - * Note: If you are writing a uIP device driver that needs ARP (Address - * Resolution Protocol), e.g., when running uIP over Ethernet, you will - * need to call the arp_out() function in the callback function + * Note: If you are writing a network device driver that needs ARP (Address + * Resolution Protocol), e.g., when running the networ over Ethernet, you + * will need to call the arp_out() function in the callback function * before sending the packet: * * int driver_callback(FAR struct net_driver_s *dev) diff --git a/include/nuttx/net/tcp.h b/include/nuttx/net/tcp.h index 02dfa885cdc..fd26d7ba5ed 100644 --- a/include/nuttx/net/tcp.h +++ b/include/nuttx/net/tcp.h @@ -1,10 +1,10 @@ /**************************************************************************** * include/nuttx/net/tcp.h - * Header file for the uIP TCP/IP stack. + * Header file for the NuttX TCP/IP stack. * - * The uIP TCP/IP stack header file contains definitions for a number - * of C macros that are used by uIP programs as well as internal uIP - * structures, TCP/IP header structures and function declarations. + * This TCP/IP stack header file contains definitions for a number of C + * macros that are used by internal network structures, TCP/IP header + * structures and function declarations. * * Copyright (C) 2007, 2009-2010, 2012-2014 Gregory Nutt. All rights * reserved. diff --git a/include/nuttx/net/udp.h b/include/nuttx/net/udp.h index 24b47452f54..6d73cdae10b 100644 --- a/include/nuttx/net/udp.h +++ b/include/nuttx/net/udp.h @@ -1,10 +1,10 @@ /**************************************************************************** * include/nuttx/net/udp.h - * Header file for the uIP UDP stack. + * Header file for the NuttX UDP stack. * - * The uIP UDP stack header file contains definitions for a number - * of C macros that are used by uIP programs as well as internal uIP - * structures, UDP header structures and function declarations. + * The UDP stack header file contains definitions for a number of C macros + * that are used by the internal network structures, UDP header structures + * and function declarations. * * Copyright (C) 2007, 2009, 2012, 2014 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/include/nuttx/sensors/ms58xx.h b/include/nuttx/sensors/ms58xx.h index fb20a3b2124..62525d31a63 100644 --- a/include/nuttx/sensors/ms58xx.h +++ b/include/nuttx/sensors/ms58xx.h @@ -87,6 +87,12 @@ enum ms58xx_model_e MS58XX_MODEL_MS5837_30 = 7 }; +struct ms58xx_measure_s +{ + int32_t temperature; /* in Degree x100 */ + int32_t pressure; /* in mBar x10 */ +}; + struct i2c_master_s; /**************************************************************************** diff --git a/include/signal.h b/include/signal.h index 12585c91e31..7cfc93b136b 100644 --- a/include/signal.h +++ b/include/signal.h @@ -175,22 +175,21 @@ /* Special values of of sa_handler used by sigaction and sigset. They are all * treated like NULL for now. This is okay for SIG_DFL and SIG_IGN because * in NuttX, the default action for all signals is to ignore them. - * - * REVISIT: Need to distinguish the value of SIG_HOLD. It is needed in the - * implementation of sigset() but would need to be recognized in all signal - * functions that deal with signal disposition. */ -#define SIG_ERR ((CODE void *)-1) /* And error occurred */ -#define SIG_DFL ((CODE void *)0) /* Default is SIG_IGN for all signals */ -#define SIG_IGN ((CODE void *)0) /* Ignore the signal */ -#define SIG_HOLD ((CODE void *)1) /* Used only with sigset() */ +#define SIG_ERR ((_sa_handler_t)-1) /* And error occurred */ +#define SIG_DFL ((_sa_handler_t)0) /* Default is SIG_IGN for all signals */ +#define SIG_IGN ((_sa_handler_t)0) /* Ignore the signal */ +#define SIG_HOLD ((_sa_handler_t)1) /* Used only with sigset() */ /******************************************************************************** * Public Type Definitions ********************************************************************************/ -/* This defines a set of 32 signals (numbered 0 through 31). */ +/* This defines a set of 32 signals (numbered 0 through 31). + * REVISIT: Signal 0 is, however, not generally usable since that value has + * special meaning in some circumstances (e.g., kill()). + */ typedef uint32_t sigset_t; /* Bit set of 32 signals */ #define __SIGSET_T_DEFINED 1 diff --git a/include/sys/boardctl.h b/include/sys/boardctl.h index 1470988418b..b1ebe45e8fa 100644 --- a/include/sys/boardctl.h +++ b/include/sys/boardctl.h @@ -54,9 +54,19 @@ * * CMD: BOARDIOC_INIT * DESCRIPTION: Perform one-time application initialization. - * ARG: None + * ARG: The boardctl() argument is passed to the + * board_app_initialize() implementation without modification. + * The argument has no meaning to NuttX; the meaning of the + * argument is a contract between the board-specific + * initalization logic and the the matching application logic. + * The value cold be such things as a mode enumeration value, + * a set of DIP switch switch settings, a pointer to + * configuration data read from a file or serial FLASH, or + * whatever you would like to do with it. Every + * implementation should accept zero/NULL as a default + * configuration. * CONFIGURATION: CONFIG_LIB_BOARDCTL - * DEPENDENCIES: Board logic must provide board_app_initialization() + * DEPENDENCIES: Board logic must provide board_app_initialize() * * CMD: BOARDIOC_POWEROFF * DESCRIPTION: Power off the board @@ -255,6 +265,19 @@ struct boardioc_usbdev_ctrl_s }; #endif /* CONFIG_BOARDCTL_USBDEVCTRL */ +/**************************************************************************** + * Public Data + ****************************************************************************/ + +#undef EXTERN +#if defined(__cplusplus) +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + /**************************************************************************** * Public Function Prototypes ****************************************************************************/ @@ -289,5 +312,10 @@ struct boardioc_usbdev_ctrl_s int boardctl(unsigned int cmd, uintptr_t arg); +#undef EXTERN +#if defined(__cplusplus) +} +#endif + #endif /* CONFIG_LIB_BOARDCTL */ #endif /* __INCLUDE_SYS_BOARDCTL_H */ diff --git a/libc/math/lib_asin.c b/libc/math/lib_asin.c index 08a2dc9573b..2f45a24a1d9 100644 --- a/libc/math/lib_asin.c +++ b/libc/math/lib_asin.c @@ -3,7 +3,7 @@ * * This file is a part of NuttX: * - * Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved. * Ported by: Darcy Gong * * It derives from the Rhombs OS math library by Nick Johnson which has @@ -55,7 +55,7 @@ double asin(double x) /* Verify that the input value is in the domain of the function */ - if (x < -1.0 || x > 1.0) + if (x < -1.0 || x > 1.0 || isnan(x)) { return NAN; } diff --git a/libc/netdb/lib_dnsquery.c b/libc/netdb/lib_dnsquery.c index 54a5046fabe..c29437c7b2d 100644 --- a/libc/netdb/lib_dnsquery.c +++ b/libc/netdb/lib_dnsquery.c @@ -2,8 +2,8 @@ * libc/netdb/lib_dnsquery.c * DNS host name to IP address resolver. * - * The uIP DNS resolver functions are used to lookup a hostname and - * map it to a numerical IP address. + * The DNS resolver functions are used to lookup a hostname and map it to a + * numerical IP address. * * Copyright (C) 2007, 2009, 2012, 2014-2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/libc/string/lib_strcasestr.c b/libc/string/lib_strcasestr.c index 0a56c731802..ab8df1eede2 100644 --- a/libc/string/lib_strcasestr.c +++ b/libc/string/lib_strcasestr.c @@ -73,7 +73,7 @@ FAR char *strcasestr(FAR const char *str, FAR const char *substr) { FAR const char *candidate; /* Candidate in str with matching start character */ char ch; /* First character of the substring */ - int len; /* The length of the substring */ + size_t len; /* The length of the substring */ /* Special case the empty substring */ diff --git a/libc/string/lib_strstr.c b/libc/string/lib_strstr.c index 06404402a94..adb1a4e829b 100644 --- a/libc/string/lib_strstr.c +++ b/libc/string/lib_strstr.c @@ -49,7 +49,7 @@ FAR char *strstr(FAR const char *str, FAR const char *substr) { FAR const char *candidate; /* Candidate in str with matching start character */ char ch; /* First character of the substring */ - int len; /* The length of the substring */ + size_t len; /* The length of the substring */ /* Special case the empty substring */ diff --git a/mm/mm_heap/mm_extend.c b/mm/mm_heap/mm_extend.c index 46c1fe0feb0..b10eea5a44c 100644 --- a/mm/mm_heap/mm_extend.c +++ b/mm/mm_heap/mm_extend.c @@ -74,9 +74,9 @@ void mm_extend(FAR struct mm_heap_s *heap, FAR void *mem, size_t size, DEBUGASSERT(heap && mem); #if CONFIG_MM_REGIONS > 1 - DEBUGASSERT(size >= MIN_EXTEND && (unsigned)region < heap->mm_nregions); + DEBUGASSERT(size >= MIN_EXTEND && (size_t)region < (size_t)heap->mm_nregions); #else - DEBUGASSERT(size >= MIN_EXTEND && (unsigned)region == 0); + DEBUGASSERT(size >= MIN_EXTEND && region == 0); #endif /* Make sure that the memory region are properly aligned */ diff --git a/net/Kconfig b/net/Kconfig index 6d98fc77dc2..3f454f4288d 100644 --- a/net/Kconfig +++ b/net/Kconfig @@ -44,7 +44,7 @@ config NET_MULTIBUFFER bool "Use multiple device-side I/O buffers" default n ---help--- - Traditionally, the uIP stacl has used a single buffer for all + Traditionally, the uIP-based stack has used a single buffer for all incoming and outgoing traffic. If this configuration is selected, then the driver can manage multiple I/O buffers and can, for example, be filling one input buffer while sending another output diff --git a/net/arp/arp.h b/net/arp/arp.h index b32490b4111..ba62f7893b1 100644 --- a/net/arp/arp.h +++ b/net/arp/arp.h @@ -382,7 +382,7 @@ void arp_notify(in_addr_t ipaddr); * * Assumptions * Interrupts are disabled; Returned value will become unstable when - * interrupts are re-enabled or if any other uIP APIs are called. + * interrupts are re-enabled or if any other network APIs are called. * ****************************************************************************/ diff --git a/net/arp/arp_table.c b/net/arp/arp_table.c index bdb27ad79dd..928ed590193 100644 --- a/net/arp/arp_table.c +++ b/net/arp/arp_table.c @@ -260,7 +260,7 @@ void arp_hdr_update(FAR uint16_t *pipaddr, FAR uint8_t *ethaddr) * * Assumptions * Interrupts are disabled; Returned value will become unstable when - * interrupts are re-enabled or if any other uIP APIs are called. + * interrupts are re-enabled or if any other network APIs are called. * ****************************************************************************/ diff --git a/net/devif/devif.h b/net/devif/devif.h index 2251ffcad0e..bca09878968 100644 --- a/net/devif/devif.h +++ b/net/devif/devif.h @@ -426,8 +426,8 @@ uint16_t devif_dev_event(FAR struct net_driver_s *dev, void *pvconn, * processing can send data. * * The amount of data that actually is sent out after a call to this - * function is determined by the maximum amount of data TCP allows. uIP - * will automatically crop the data so that only the appropriate + * function is determined by the maximum amount of data TCP allows. The + * network will automatically crop the data so that only the appropriate * amount of data is sent. The mss field of the TCP connection structure * can be used to determine the amount of data that actually will be sent. * diff --git a/net/devif/devif_poll.c b/net/devif/devif_poll.c index 3ec68be4f39..928b779fb38 100644 --- a/net/devif/devif_poll.c +++ b/net/devif/devif_poll.c @@ -296,7 +296,7 @@ static inline int devif_poll_tcp_timer(FAR struct net_driver_s *dev, * Function: devif_poll * * Description: - * This function will traverse each active uIP connection structure and + * This function will traverse each active network connection structure and * will perform network polling operations. devif_poll() may be called * asynchronously with the network driver can accept another outgoing * packet. @@ -307,7 +307,7 @@ static inline int devif_poll_tcp_timer(FAR struct net_driver_s *dev, * should do only if it cannot accept further write data). * * When the callback function is called, there may be an outbound packet - * waiting for service in the uIP packet buffer, and if so the d_len field + * waiting for service in the device packet buffer, and if so the d_len field * is set to a value larger than zero. The device driver should then send * out the packet. * @@ -400,7 +400,7 @@ int devif_poll(FAR struct net_driver_s *dev, devif_poll_callback_t callback) * Function: devif_timer * * Description: - * These function will traverse each active uIP connection structure and + * These function will traverse each active network connection structure and * perform network timer operations. The Ethernet driver MUST implement * logic to periodically call devif_timer(). * @@ -410,7 +410,7 @@ int devif_poll(FAR struct net_driver_s *dev, devif_poll_callback_t callback) * should do only if it cannot accept further write data). * * When the callback function is called, there may be an outbound packet - * waiting for service in the uIP packet buffer, and if so the d_len field + * waiting for service in the device packet buffer, and if so the d_len field * is set to a value larger than zero. The device driver should then send * out the packet. * diff --git a/net/devif/ipv4_input.c b/net/devif/ipv4_input.c index 1b3caf5087f..bd006908335 100644 --- a/net/devif/ipv4_input.c +++ b/net/devif/ipv4_input.c @@ -116,10 +116,6 @@ #define TCP_REASS_BUFSIZE (NET_DEV_MTU(dev) - NET_LL_HDRLEN(dev)) #define TCP_REASS_LASTFRAG 0x01 -/**************************************************************************** - * Public Data - ****************************************************************************/ - /**************************************************************************** * Private Data ****************************************************************************/ @@ -323,6 +319,7 @@ nullreturn: int ipv4_input(FAR struct net_driver_s *dev) { FAR struct ipv4_hdr_s *pbuf = BUF; + uint16_t hdrlen; uint16_t iplen; /* This is where the input processing starts. */ @@ -346,6 +343,17 @@ int ipv4_input(FAR struct net_driver_s *dev) goto drop; } + /* Get the size of the packet minus the size of link layer header */ + + hdrlen = NET_LL_HDRLEN(dev); + if ((hdrlen + IPv4_HDRLEN) > dev->d_len) + { + nlldbg("Packet shorter than IPv4 header\n"); + goto drop; + } + + dev->d_len -= hdrlen; + /* Check the size of the packet. If the size reported to us in d_len is * smaller the size reported in the IP header, we assume that the packet * has been corrupted in transit. If the size of d_len is larger than the diff --git a/net/devif/ipv6_input.c b/net/devif/ipv6_input.c index f5be1751f08..dcb2610626e 100644 --- a/net/devif/ipv6_input.c +++ b/net/devif/ipv6_input.c @@ -108,18 +108,6 @@ #define IPv6BUF ((FAR struct ipv6_hdr_s *)&dev->d_buf[NET_LL_HDRLEN(dev)]) -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -142,6 +130,7 @@ int ipv6_input(FAR struct net_driver_s *dev) { FAR struct ipv6_hdr_s *ipv6 = IPv6BUF; + uint16_t hdrlen; uint16_t pktlen; /* This is where the input processing starts. */ @@ -166,6 +155,17 @@ int ipv6_input(FAR struct net_driver_s *dev) goto drop; } + /* Get the size of the packet minus the size of link layer header */ + + hdrlen = NET_LL_HDRLEN(dev); + if ((hdrlen + IPv6_HDRLEN) > dev->d_len) + { + nlldbg("Packet shorter than IPv6 header\n"); + goto drop; + } + + dev->d_len -= hdrlen; + /* Check the size of the packet. If the size reported to us in d_len is * smaller the size reported in the IP header, we assume that the packet * has been corrupted in transit. If the size of d_len is larger than the diff --git a/net/pkt/Kconfig b/net/pkt/Kconfig index 2fc26442dd3..ae9c7891f56 100644 --- a/net/pkt/Kconfig +++ b/net/pkt/Kconfig @@ -13,9 +13,9 @@ config NET_PKT Packet sockets allow receiving and transmitting frames without a transport protocol in between. Frames received are copied into - a packet socket tap before they enter uIP. Data written into a - packet socket will bypass uIP altogether and be placed in the - transmission buffer of the network interface driver. + a packet socket tap before they enter the network. Data written into + a packet socket will bypass the network altogether and be placed in + the transmission buffer of the network interface driver. if NET_PKT diff --git a/net/route/net_foreachroute.c b/net/route/net_foreachroute.c index 13c154f539e..1c5789dd649 100644 --- a/net/route/net_foreachroute.c +++ b/net/route/net_foreachroute.c @@ -91,7 +91,7 @@ int net_foreachroute(route_handler_t handler, FAR void *arg) ret = handler(route, arg); } - /* Unlock uIP */ + /* Unlock the network */ net_unlock(save); return ret; @@ -122,7 +122,7 @@ int net_foreachroute_ipv6(route_handler_ipv6_t handler, FAR void *arg) ret = handler(route, arg); } - /* Unlock uIP */ + /* Unlock the network */ net_unlock(save); return ret; diff --git a/net/socket/net_close.c b/net/socket/net_close.c index f439811b854..f03a9caeea4 100644 --- a/net/socket/net_close.c +++ b/net/socket/net_close.c @@ -136,10 +136,10 @@ static inline int close_timeout(FAR struct tcp_close_s *pstate) * Function: netclose_interrupt * * Description: - * Handle uIP callback events. + * Handle network callback events. * * Parameters: - * conn - uIP TCP connection structure + * conn - TCP connection structure * * Returned Value: * None @@ -320,7 +320,7 @@ static inline void netclose_txnotify(FAR struct socket *psock, * Break any current TCP connection * * Parameters: - * conn - uIP TCP connection structure + * conn - TCP connection structure * * Returned Value: * None @@ -428,7 +428,7 @@ static inline int netclose_disconnect(FAR struct socket *psock) /* Free the connection */ conn->crefs = 0; /* No more references on the connection */ - tcp_free(conn); /* Free uIP resources */ + tcp_free(conn); /* Free network resources */ /* Get the result of the close */ @@ -517,7 +517,7 @@ int psock_close(FAR struct socket *psock) goto errout; } - /* We perform the uIP close operation only if this is the last count on + /* We perform the close operation only if this is the last count on * the socket. (actually, I think the socket crefs only takes the values * 0 and 1 right now). * @@ -527,7 +527,7 @@ int psock_close(FAR struct socket *psock) if (psock->s_crefs <= 1 && psock->s_conn != NULL) { - /* Perform uIP side of the close depending on the protocol type */ + /* Perform local side of the close depending on the protocol type */ switch (psock->s_type) { @@ -649,7 +649,7 @@ int psock_close(FAR struct socket *psock) /* Yes... free the connection structure */ conn->crefs = 0; /* No more references on the connection */ - pkt_free(psock->s_conn); /* Free uIP resources */ + pkt_free(psock->s_conn); /* Free network resources */ } else { diff --git a/net/socket/net_sendfile.c b/net/socket/net_sendfile.c index a8b7b9f1628..d5fde260231 100644 --- a/net/socket/net_sendfile.c +++ b/net/socket/net_sendfile.c @@ -402,7 +402,7 @@ static uint16_t sendfile_interrupt(FAR struct net_driver_s *dev, FAR void *pvcon dev->d_sndlen = sndlen; - /* Set the sequence number for this packet. NOTE: uIP updates + /* Set the sequence number for this packet. NOTE: The network updates * sndseq on recept of ACK *before* this function is called. In that * case sndseq will point to the next unacknowledge byte (which might * have already been sent). We will overwrite the value of sndseq diff --git a/net/socket/recvfrom.c b/net/socket/recvfrom.c index 01259753933..9bc234f5418 100644 --- a/net/socket/recvfrom.c +++ b/net/socket/recvfrom.c @@ -1692,8 +1692,8 @@ static ssize_t tcp_recvfrom(FAR struct socket *psock, FAR void *buf, size_t len, } } - /* In general, this uIP-based implementation will not support non-blocking - * socket operations... except in a few cases: Here for TCP receive with read-ahead + /* In general, this implementation will not support non-blocking socket + * operations... except in a few cases: Here for TCP receive with read-ahead * enabled. If this socket is configured as non-blocking then return EAGAIN * if no data was obtained from the read-ahead buffers. */ diff --git a/net/tcp/tcp_accept.c b/net/tcp/tcp_accept.c index a37db211db4..ced4f0d659f 100644 --- a/net/tcp/tcp_accept.c +++ b/net/tcp/tcp_accept.c @@ -250,8 +250,8 @@ int psock_tcp_accept(FAR struct socket *psock, FAR struct sockaddr *addr, accept_tcpsender(psock, state.acpt_newconn, addr, addrlen); } - /* In general, this uIP-based implementation will not support non-blocking - * socket operations... except in a few cases: Here for TCP accept with + /* In general, this implementation will not support non-blocking socket + * operations... except in a few cases: Here for TCP accept with * backlog enabled. If this socket is configured as non-blocking then * return EAGAIN if there is no pending connection in the backlog. */ diff --git a/net/tcp/tcp_callback.c b/net/tcp/tcp_callback.c index 73c6175fee5..ac430919230 100644 --- a/net/tcp/tcp_callback.c +++ b/net/tcp/tcp_callback.c @@ -147,7 +147,7 @@ uint16_t tcp_callback(FAR struct net_driver_s *dev, FAR struct tcp_conn_s *conn, uint16_t flags) { /* Preserve the TCP_ACKDATA, TCP_CLOSE, and TCP_ABORT in the response. - * These is needed by uIP to handle responses and buffer state. The + * These is needed by the network to handle responses and buffer state. The * TCP_NEWDATA indication will trigger the ACK response, but must be * explicitly set in the callback. */ diff --git a/net/tcp/tcp_conn.c b/net/tcp/tcp_conn.c index 6cc9950fc06..efc6527cc5a 100644 --- a/net/tcp/tcp_conn.c +++ b/net/tcp/tcp_conn.c @@ -73,7 +73,7 @@ * Private Data ****************************************************************************/ -/* The array containing all uIP TCP connections. */ +/* The array containing all TCP connections. */ static struct tcp_conn_s g_tcp_connections[CONFIG_NET_TCP_CONNS]; diff --git a/net/tcp/tcp_input.c b/net/tcp/tcp_input.c index 97bcb402fd7..19c207f6550 100644 --- a/net/tcp/tcp_input.c +++ b/net/tcp/tcp_input.c @@ -376,7 +376,7 @@ found: ackseq = tcp_getsequence(tcp->ackno); /* Check how many of the outstanding bytes have been acknowledged. For - * a most uIP send operation, this should always be true. However, + * most send operations, this should always be true. However, * the send() API sends data ahead when it can without waiting for * the ACK. In this case, the 'ackseq' could be less than then the * new sequence number. diff --git a/net/tcp/tcp_send_unbuffered.c b/net/tcp/tcp_send_unbuffered.c index 6d5c608ba37..53365e3f685 100644 --- a/net/tcp/tcp_send_unbuffered.c +++ b/net/tcp/tcp_send_unbuffered.c @@ -518,7 +518,7 @@ static uint16_t tcpsend_interrupt(FAR struct net_driver_s *dev, if ((pstate->snd_sent - pstate->snd_acked + sndlen) < conn->winsize) { - /* Set the sequence number for this packet. NOTE: uIP updates + /* Set the sequence number for this packet. NOTE: The network updates * sndseq on receipt of ACK *before* this function is called. In that * case sndseq will point to the next unacknowledged byte (which might * have already been sent). We will overwrite the value of sndseq diff --git a/net/udp/udp.h b/net/udp/udp.h index 91447d25965..f8584bff0b9 100644 --- a/net/udp/udp.h +++ b/net/udp/udp.h @@ -74,7 +74,7 @@ * Public Type Definitions ****************************************************************************/ -/* Representation of a uIP UDP connection */ +/* Representation of a UDP connection */ struct devif_callback_s; /* Forward reference */ struct udp_hdr_s; /* Forward reference */ diff --git a/net/udp/udp_conn.c b/net/udp/udp_conn.c index ddd599382e5..1f5ecd095c6 100644 --- a/net/udp/udp_conn.c +++ b/net/udp/udp_conn.c @@ -76,7 +76,7 @@ * Private Data ****************************************************************************/ -/* The array containing all uIP UDP connections. */ +/* The array containing all UDP connections. */ struct udp_conn_s g_udp_connections[CONFIG_NET_UDP_CONNS]; diff --git a/sched/init/os_smpstart.c b/sched/init/os_smpstart.c index 5ed82fb8782..da7852317c1 100644 --- a/sched/init/os_smpstart.c +++ b/sched/init/os_smpstart.c @@ -210,6 +210,14 @@ int os_smp_start(void) sdbg("ERROR: Failed to allocate stack for CPU%d\n", cpu); return ret; } + + /* Reinitialize the processor-specific portion of the TCB. This is + * the second time this has been called for this CPU, but the stack + * was not yet initialized on the first call so we need to do it + * again. + */ + + up_initial_state(tcb); } /* Then start all of the other CPUs after we have completed the memory diff --git a/tools/refresh.sh b/tools/refresh.sh index a38eadaffd0..8e24fa0d90f 100755 --- a/tools/refresh.sh +++ b/tools/refresh.sh @@ -32,7 +32,7 @@ # POSSIBILITY OF SUCH DAMAGE. # -USAGE="USAGE: $0 [--debug|--help] /" +USAGE="USAGE: $0 [options] /" ADVICE="Try '$0 --help' for more information" unset CONFIG @@ -51,7 +51,7 @@ while [ ! -z "$1" ]; do echo "" echo $USAGE echo "" - echo "Where:" + echo "Where [options] include:" echo " --debug" echo " Enable script debug" echo " --silent" diff --git a/tools/testbuild.sh b/tools/testbuild.sh index 9546c921447..31b0f9b4eae 100755 --- a/tools/testbuild.sh +++ b/tools/testbuild.sh @@ -34,22 +34,28 @@ WD=$PWD nuttx=$WD/../nuttx +TOOLSDIR=$nuttx/tools +UNLINK=$TOOLSDIR/unlink.sh progname=$0 host=linux wenv=cygwin sizet=uint +APPSDIR=../apps +NXWDIR=../NxWidgets unset testfile function showusage { echo "" - echo "USAGE: $progname [-w|l] [-c|n] [-s] " + echo "USAGE: $progname [-w|l] [-c|n] [-s] [-a ] [-n ] " echo " $progname -h" echo "" echo "Where:" echo " -w|l selects Windows (w) or Linux (l). Default: Linux" echo " -c|n selects Windows native (n) or Cygwin (c). Default Cygwin" echo " -s Use C++ unsigned long size_t in new operator. Default unsigned int" + echo " -a provides the relative path to the apps/ directory. Default ../apps" + echo " -n provides the relative path to the NxWidgets/ directory. Default ../NxWidgets" echo " -h will show this help test and terminate" echo " selects the list of configurations to test. No default" echo "" @@ -78,6 +84,14 @@ while [ ! -z "$1" ]; do -s ) sizet=long ;; + -a ) + shift + APPSDIR="$1" + ;; + -n ) + shift + NXWDIR="$1" + ;; -h ) showusage ;; @@ -196,11 +210,45 @@ function configure { make olddefconfig 1>/dev/null 2>&1 } +# Build the NxWidgets libraries + +function nxbuild { + if [ -e $APPSDIR/external ]; then + $UNLINK $APPSDIR/external + fi + + unset nxconfig + if [ -d $NXWDIR ]; then + nxconfig=`grep CONFIG_NXWM=y $nuttx/.config` + fi + + if [ ! -z "$nxconfig" ]; then + echo " Building NxWidgets..." + echo "------------------------------------------------------------------------------------" + + cd $nuttx/$NXTOOLS || { echo "Failed to CD to $NXTOOLS"; exit 1; } + ./install.sh $nuttx/$APPSDIR nxwm 1>/dev/null + + make -C $nuttx/$APPSDIR/external TOPDIR=$nuttx APPDIR=$nuttx/$APPSDIR TOPDIR=$nuttx clean 1>/dev/null + + cd $nuttx || { echo "Failed to CD to $nuttx"; exit 1; } + make -i context 1>/dev/null + + cd $nuttx/$NXWIDGETSDIR || { echo "Failed to CD to $NXWIDGETSDIR"; exit 1; } + make -i TOPDIR=$nuttx clean 1>/dev/null + make -i TOPDIR=$nuttx 1>/dev/null + + cd $nuttx/$NXWMDIR || { echo "Failed to CD to $NXWMDIR"; exit 1; } + make -i TOPDIR=$nuttx clean 1>/dev/null + make -i TOPDIR=$nuttx 1>/dev/null + fi +} + # Perform the next build function build { cd $nuttx || { echo "ERROR: failed to CD to $nuttx"; exit 1; } - echo " Building..." + echo " Building NuttX..." echo "------------------------------------------------------------------------------------" make -i 1>/dev/null } @@ -211,12 +259,24 @@ function dotest { echo "------------------------------------------------------------------------------------" distclean configure + nxbuild build } # Perform the build test for each entry in the test list file -export APPSDIR=../apps +if [ ! -d $APPSDIR ]; then + export "ERROR: No directory found at $APPSDIR" + exit 1 +fi + +export APPSDIR + +if [ -d $NXWDIR ]; then + NXWIDGETSDIR=$NXWDIR/libnxwidgets + NXWMDIR=$NXWDIR/nxwm + NXTOOLS=$NXWDIR/tools +fi # Shouldn't have to do this