From 6ff1c96017f0abc891d9a700c744dfc5b0718d4d Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Mon, 31 Oct 2016 18:41:36 -0600 Subject: [PATCH 01/32] LM32: First commit adds only reviewed architecture header files --- arch/Kconfig | 9 ++ arch/misoc/include/arch.h | 0 arch/misoc/include/irq.h | 80 ++++++++++++ arch/misoc/include/limits.h | 88 +++++++++++++ arch/misoc/include/lm32/irq.h | 193 ++++++++++++++++++++++++++++ arch/misoc/include/lm32/syscall.h | 207 ++++++++++++++++++++++++++++++ arch/misoc/include/lm32/types.h | 94 ++++++++++++++ arch/misoc/include/syscall.h | 88 +++++++++++++ arch/misoc/include/types.h | 94 ++++++++++++++ 9 files changed, 853 insertions(+) create mode 100644 arch/misoc/include/arch.h create mode 100644 arch/misoc/include/irq.h create mode 100644 arch/misoc/include/limits.h create mode 100644 arch/misoc/include/lm32/irq.h create mode 100644 arch/misoc/include/lm32/syscall.h create mode 100644 arch/misoc/include/lm32/types.h create mode 100644 arch/misoc/include/syscall.h create mode 100644 arch/misoc/include/types.h diff --git a/arch/Kconfig b/arch/Kconfig index 32ecb064106..0125994830f 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -39,6 +39,13 @@ config ARCH_MIPS ---help--- MIPS architectures (PIC32) +config ARCH_MISOC + bool "MISOC" + select ARCH_HAVE_INTERRUPTSTACK + select ARCH_HAVE_CUSTOMOPT + ---help--- + MISOC + config ARCH_RGMP bool "RGMP" ---help--- @@ -99,6 +106,7 @@ config ARCH default "avr" if ARCH_AVR default "hc" if ARCH_HC default "mips" if ARCH_MIPS + default "misoc" if ARCH_MISOC default "rgmp" if ARCH_RGMP default "renesas" if ARCH_RENESAS default "risc-v" if ARCH_RISCV @@ -112,6 +120,7 @@ source arch/arm/Kconfig source arch/avr/Kconfig source arch/hc/Kconfig source arch/mips/Kconfig +source arch/misoc/Kconfig source arch/rgmp/Kconfig source arch/renesas/Kconfig source arch/risc-v/Kconfig diff --git a/arch/misoc/include/arch.h b/arch/misoc/include/arch.h new file mode 100644 index 00000000000..e69de29bb2d diff --git a/arch/misoc/include/irq.h b/arch/misoc/include/irq.h new file mode 100644 index 00000000000..1fbf884fc3b --- /dev/null +++ b/arch/misoc/include/irq.h @@ -0,0 +1,80 @@ +/**************************************************************************** + * arch/misoc/include/irq.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly + * through nuttx/irq.h + */ + +#ifndef __ARCH_MISOC_INCLUDE_IRQ_H +#define __ARCH_MISOC_INCLUDE_IRQ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define NR_IRQS 32 + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +irqstate_t up_irq_save(void); +void up_irq_restore(irqstate_t flags); + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#endif /* __ARCH_MISOC_INCLUDE_IRQ_H */ diff --git a/arch/misoc/include/limits.h b/arch/misoc/include/limits.h new file mode 100644 index 00000000000..12dd86efb2e --- /dev/null +++ b/arch/misoc/include/limits.h @@ -0,0 +1,88 @@ +/**************************************************************************** + * arch/misoc/include/limits.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_INCLUDE_LIMITS_H +#define __ARCH_MISOC_INCLUDE_LIMITS_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define CHAR_BIT 8 +#define SCHAR_MIN (-SCHAR_MAX - 1) +#define SCHAR_MAX 127 +#define UCHAR_MAX 255 + +/* These could be different on machines where char is unsigned */ + +#ifdef __CHAR_UNSIGNED__ +#define CHAR_MIN 0 +#define CHAR_MAX UCHAR_MAX +#else +#define CHAR_MIN SCHAR_MIN +#define CHAR_MAX SCHAR_MAX +#endif + +#define SHRT_MIN (-SHRT_MAX - 1) +#define SHRT_MAX 32767 +#define USHRT_MAX 65535U + +/* Integer is four bytes */ + +#define INT_MIN (-INT_MAX - 1) +#define INT_MAX 2147483647 +#define UINT_MAX 4294967295U + +/* These change on 32-bit and 64-bit platforms */ + +#define LONG_MIN (-LONG_MAX - 1) +#define LONG_MAX 2147483647L +#define ULONG_MAX 4294967295UL + +#define LLONG_MIN (-LLONG_MAX - 1) +#define LLONG_MAX 9223372036854775807LL +#define ULLONG_MAX 18446744073709551615ULL + +/* A pointer is four bytes */ + +#define PTR_MIN (-PTR_MAX - 1) +#define PTR_MAX 2147483647 +#define UPTR_MAX 4294967295U + +#endif /* __ARCH_MISOC_INCLUDE_LIMITS_H */ diff --git a/arch/misoc/include/lm32/irq.h b/arch/misoc/include/lm32/irq.h new file mode 100644 index 00000000000..a98bcab8e3b --- /dev/null +++ b/arch/misoc/include/lm32/irq.h @@ -0,0 +1,193 @@ +/**************************************************************************** + * arch/misoc/include/lm32/syscall.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_INCLUDE_LM32_IRQ_H +#define __ARCH_MISOC_INCLUDE_LM32_IRQ_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Registers */ + +#define REG_X0_NDX 0 /* Holds the value zero */ +#define REG_X1_NDX 1 /* General-purpose/argument 0/return value 0 */ +#define REG_X2_NDX 2 /* General-purpose/argument 1/return value 1 */ +#define REG_X3_NDX 3 /* General-purpose/argument 2 */ +#define REG_X4_NDX 4 /* General-purpose/argument 3 */ +#define REG_X5_NDX 5 /* General-purpose/argument 4 */ +#define REG_X6_NDX 6 /* General-purpose/argument 5 */ +#define REG_X7_NDX 7 /* General-purpose/argument 6 */ +#define REG_X8_NDX 8 /* General-purpose/argument 7 */ +#define REG_X9_NDX 9 /* General-purpose */ +#define REG_X10_NDX 10 /* General-purpose */ +#define REG_X11_NDX 11 /* General-purpose */ +#define REG_X12_NDX 12 /* General-purpose */ +#define REG_X13_NDX 13 /* General-purpose */ +#define REG_X14_NDX 14 /* General-purpose */ +#define REG_X15_NDX 15 /* General-purpose */ +#define REG_X16_NDX 16 /* General-purpose */ +#define REG_X17_NDX 17 /* General-purpose */ +#define REG_X18_NDX 18 /* General-purpose */ +#define REG_X19_NDX 19 /* General-purpose */ +#define REG_X20_NDX 20 /* General-purpose */ +#define REG_X21_NDX 21 /* General-purpose */ +#define REG_X22_NDX 22 /* General-purpose */ +#define REG_X23_NDX 23 /* General-purpose */ +#define REG_X24_NDX 24 /* General-purpose */ +#define REG_X25_NDX 25 /* General-purpose */ +#define REG_X26_NDX 26 /* General-purpose/global pointer */ +#define REG_X27_NDX 27 /* General-purpose/frame pointer */ +#define REG_X28_NDX 28 /* Stack pointer */ +#define REG_X29_NDX 29 /* General-purpose/return address */ +#define REG_X30_NDX 30 /* Exception address */ +#define REG_X31_NDX 31 /* Breakpoint address */ + +/* Interrupt Context register */ + +#define XCPTCONTEXT_REGS 32 +#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) + +#ifdef __ASSEMBLY__ +# define REG_X0 (4*REG_X0_NDX) +# define REG_X1 (4*REG_X1_NDX) +# define REG_X2 (4*REG_X2_NDX) +# define REG_X3 (4*REG_X3_NDX) +# define REG_X4 (4*REG_X4_NDX) +# define REG_X5 (4*REG_X5_NDX) +# define REG_X6 (4*REG_X6_NDX) +# define REG_X7 (4*REG_X7_NDX) +# define REG_X8 (4*REG_X8_NDX) +# define REG_X9 (4*REG_X9_NDX) +# define REG_X10 (4*REG_X10_NDX) +# define REG_X11 (4*REG_X11_NDX) +# define REG_X12 (4*REG_X12_NDX) +# define REG_X13 (4*REG_X13_NDX) +# define REG_X14 (4*REG_X14_NDX) +# define REG_X15 (4*REG_X15_NDX) +# define REG_X16 (4*REG_X16_NDX) +# define REG_X17 (4*REG_X17_NDX) +# define REG_X18 (4*REG_X18_NDX) +# define REG_X19 (4*REG_X19_NDX) +# define REG_X20 (4*REG_X20_NDX) +# define REG_X21 (4*REG_X21_NDX) +# define REG_X22 (4*REG_X22_NDX) +# define REG_X23 (4*REG_X23_NDX) +# define REG_X24 (4*REG_X24_NDX) +# define REG_X25 (4*REG_X25_NDX) +# define REG_X26 (4*REG_X26_NDX) +# define REG_X27 (4*REG_X27_NDX) +# define REG_X28 (4*REG_X28_NDX) +# define REG_X29 (4*REG_X29_NDX) +# define REG_X30 (4*REG_X30_NDX) +# define REG_X31 (4*REG_X31_NDX) +#else +# define REG_X0 REG_X0_NDX +# define REG_X1 REG_X1_NDX +# define REG_X2 REG_X2_NDX +# define REG_X3 REG_X3_NDX +# define REG_X4 REG_X4_NDX +# define REG_X5 REG_X5_NDX +# define REG_X6 REG_X6_NDX +# define REG_X7 REG_X7_NDX +# define REG_X8 REG_X8_NDX +# define REG_X9 REG_X9_NDX +# define REG_X10 REG_X10_NDX +# define REG_X11 REG_X11_NDX +# define REG_X12 REG_X12_NDX +# define REG_X13 REG_X13_NDX +# define REG_X14 REG_X14_NDX +# define REG_X15 REG_X15_NDX +# define REG_X16 REG_X16_NDX +# define REG_X17 REG_X17_NDX +# define REG_X18 REG_X18_NDX +# define REG_X19 REG_X19_NDX +# define REG_X20 REG_X20_NDX +# define REG_X21 REG_X21_NDX +# define REG_X22 REG_X22_NDX +# define REG_X23 REG_X23_NDX +# define REG_X24 REG_X24_NDX +# define REG_X25 REG_X25_NDX +# define REG_X26 REG_X26_NDX +# define REG_X27 REG_X27_NDX +# define REG_X28 REG_X28_NDX +# define REG_X29 REG_X29_NDX +# define REG_X30 REG_X30_NDX +# define REG_X31 REG_X31_NDX +#endif + +/* Register aliases */ + +#define REG_GP REG_X26 +#define REG_FP REG_X27 +#define REG_SP REG_X28 +#define REG_RA REG_X29 +#define REG_EA REG_X30 +#define REG_BA REG_X31 + +#define REG_EPC REG_X30 + +#define REG_A0 REG_X1 +#define REG_A1 REG_X2 +#define REG_A2 REG_X3 +#define REG_A3 REG_X4 +#define REG_A4 REG_X5 +#define REG_A5 REG_X6 +#define REG_A6 REG_X7 +#define REG_A7 REG_X8 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +struct xcptcontext +{ + /* Register save area */ + + uint32_t regs[XCPTCONTEXT_REGS]; +}; + +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_MISOC_INCLUDE_LM32_IRQ_H */ diff --git a/arch/misoc/include/lm32/syscall.h b/arch/misoc/include/lm32/syscall.h new file mode 100644 index 00000000000..7c0c2b1066b --- /dev/null +++ b/arch/misoc/include/lm32/syscall.h @@ -0,0 +1,207 @@ +/**************************************************************************** + * arch/misoc/include/lm32/syscall.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly + * through include/syscall.h or include/sys/sycall.h + */ + +#ifndef __ARCH_MISOC_INCLUDE_LM32_SYSCALL_H +#define __ARCH_MISOC_INCLUDE_LM32_SYSCALL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define SYS_syscall 0x00 + +/* Configuration ********************************************************************/ +/* SYS call 1 and 2 are defined for internal use by the RISC-V port (see + * arch/riscv/include/mips32/syscall.h). In addition, SYS call 3 is the return from + * a SYS call in kernel mode. The first four syscall values must, therefore, be + * reserved (0 is not used). + */ + +#ifdef CONFIG_BUILD_KERNEL +# ifndef CONFIG_SYS_RESERVED +# error "CONFIG_SYS_RESERVED must be defined to the value 4" +# elif CONFIG_SYS_RESERVED != 4 +# error "CONFIG_SYS_RESERVED must have the value 4" +# endif +#endif + +/* sys_call macros ******************************************************************/ + +#ifndef __ASSEMBLY__ + +/* Context switching system calls ***************************************************/ + +/* SYS call 0: (not used) */ + +/* SYS call 1: + * + * void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function; + */ + +#define SYS_restore_context (1) +#define up_fullcontextrestore(restoreregs) \ + (void)sys_call1(SYS_restore_context, (uintptr_t)restoreregs) + +/* SYS call 2: + * + * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); + */ + +#define SYS_switch_context (2) +#define up_switchcontext(saveregs, restoreregs) \ + (void)sys_call2(SYS_switch_context, (uintptr_t)saveregs, (uintptr_t)restoreregs) + +#ifdef CONFIG_BUILD_KERNEL +/* SYS call 3: + * + * void up_syscall_return(void); + */ + +#define SYS_syscall_return (3) +#define up_syscall_return() (void)sys_call0(SYS_syscall_return) + +#endif +#endif /* __ASSEMBLY__ */ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/**************************************************************************** + * Name: up_syscall0 + * + * Description: + * System call SYS_ argument and no additional parameters. + * + ****************************************************************************/ + +uintptr_t sys_call0(unsigned int nbr); + +/**************************************************************************** + * Name: up_syscall1 + * + * Description: + * System call SYS_ argument and one additional parameter. + * + ****************************************************************************/ + +uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1); + +/**************************************************************************** + * Name: up_syscall2 + * + * Description: + * System call SYS_ argument and two additional parameters. + * + ****************************************************************************/ + +uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1, uintptr_t parm2); + +/**************************************************************************** + * Name: up_syscall3 + * + * Description: + * System call SYS_ argument and three additional parameters. + * + ****************************************************************************/ + +uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1, uintptr_t parm2, + uintptr_t parm3); + +/**************************************************************************** + * Name: up_syscall4 + * + * Description: + * System call SYS_ argument and four additional parameters. + * + ****************************************************************************/ + +uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1, uintptr_t parm2, + uintptr_t parm3, uintptr_t parm4); + +/**************************************************************************** + * Name: up_syscall5 + * + * Description: + * System call SYS_ argument and five additional parameters. + * + ****************************************************************************/ + +uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1, uintptr_t parm2, + uintptr_t parm3, uintptr_t parm4, uintptr_t parm5); + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_MISOC_INCLUDE_LM32_SYSCALL_H */ diff --git a/arch/misoc/include/lm32/types.h b/arch/misoc/include/lm32/types.h new file mode 100644 index 00000000000..dbaaff28d2e --- /dev/null +++ b/arch/misoc/include/lm32/types.h @@ -0,0 +1,94 @@ +/**************************************************************************** + * arch/misoc/include/lm32/types.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly + * through stdint.h + */ + +#ifndef __ARCH_MISOC_INCLUDE_LM32_TYPES_H +#define __ARCH_MISOC_INCLUDE_LM32_TYPES_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Type Declarations + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* These are the sizes of the standard integer types. NOTE that these type + * names have a leading underscore character. This file will be included + * (indirectly) by include/stdint.h and typedef'ed to the final name without + * the underscore character. This roundabout way of doings things allows + * the stdint.h to be removed from the include/ directory in the event that + * the user prefers to use the definitions provided by their toolchain header + * files + */ + +typedef signed char _int8_t; +typedef unsigned char _uint8_t; + +typedef signed short _int16_t; +typedef unsigned short _uint16_t; + +typedef signed int _int32_t; +typedef unsigned int _uint32_t; + +typedef signed long long _int64_t; +typedef unsigned long long _uint64_t; +#define __INT64_DEFINED + +/* A pointer is 4 bytes */ + +typedef signed int _intptr_t; +typedef unsigned int _uintptr_t; + +/* This is the size of the interrupt state save returned by up_irq_save(). */ + +typedef unsigned int irqstate_t; + +#endif /* __ASSEMBLY__ */ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __ARCH_MISOC_INCLUDE_LM32_TYPES_H */ diff --git a/arch/misoc/include/syscall.h b/arch/misoc/include/syscall.h new file mode 100644 index 00000000000..3a8f2e9df04 --- /dev/null +++ b/arch/misoc/include/syscall.h @@ -0,0 +1,88 @@ +/**************************************************************************** + * arch/misoc/include/syscall.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly + * through include/syscall.h or include/sys/sycall.h + */ + +#ifndef __ARCH_MISOC_INCLUDE_SYSCALL_H +#define __ARCH_MISOC_INCLUDE_SYSCALL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/* Include RISC-V architecture-specific syscall macros */ + +#ifdef CONFIG_ARCH_MISOC +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Inline functions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifndef __ASSEMBLY__ +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif + +#endif /* __ARCH_MISOC_INCLUDE_SYSCALL_H */ diff --git a/arch/misoc/include/types.h b/arch/misoc/include/types.h new file mode 100644 index 00000000000..f63ab15f19c --- /dev/null +++ b/arch/misoc/include/types.h @@ -0,0 +1,94 @@ +/**************************************************************************** + * arch/misoc/include/types.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/* This file should never be included directed but, rather, only indirectly + * through stdint.h + */ + +#ifndef __ARCH_MISOC_INCLUDE_TYPESL_H +#define __ARCH_MISOC_INCLUDE_TYPESL_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Type Declarations + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* These are the sizes of the standard integer types. NOTE that these type + * names have a leading underscore character. This file will be included + * (indirectly) by include/stdint.h and typedef'ed to the final name without + * the underscore character. This roundabout way of doings things allows + * the stdint.h to be removed from the include/ directory in the event that + * the user prefers to use the definitions provided by their toolchain header + * files + */ + +typedef signed char _int8_t; +typedef unsigned char _uint8_t; + +typedef signed short _int16_t; +typedef unsigned short _uint16_t; + +typedef signed int _int32_t; +typedef unsigned int _uint32_t; + +typedef signed long long _int64_t; +typedef unsigned long long _uint64_t; +#define __INT64_DEFINED + +/* A pointer is 4 bytes */ + +typedef signed int _intptr_t; +typedef unsigned int _uintptr_t; + +/* This is the size of the interrupt state save returned by up_irq_save(). */ + +typedef unsigned int irqstate_t; + +#endif /* __ASSEMBLY__ */ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#endif /* __ARCH_MISOC_INCLUDE_TYPESL_H */ From 6662c75679a7e5b03b9076c24cdfe5c8267f8e70 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 31 Oct 2016 19:29:30 -0600 Subject: [PATCH 02/32] LM32: Add arch/misoc/Kconfig file --- arch/misoc/Kconfig | 64 +++++++++++++++++++++++++++++++++++ arch/misoc/include/lm32/irq.h | 2 +- 2 files changed, 65 insertions(+), 1 deletion(-) create mode 100644 arch/misoc/Kconfig diff --git a/arch/misoc/Kconfig b/arch/misoc/Kconfig new file mode 100644 index 00000000000..7f3ae0dab45 --- /dev/null +++ b/arch/misoc/Kconfig @@ -0,0 +1,64 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_MISOC + +choice + prompt "Misoc Chip Selection" + default ARCH_CHIP_LM32 + +config ARCH_CHIP_LM32 + bool "LM32" + select MISOC_HAVE_UART0 + ---help--- + LM32 Chip Selected + +config ARCH_CHIP_MOR1K + bool "MOR1K" + ---help--- + MOR1K Chip Selected + +endchoice # Misoc Chip Selection + +config ARCH_CHIP + string + default "lm32" if ARCH_CHIP_LM32 + +menu "MISOC Peripheral Support" + +# These "hidden" settings determine is a peripheral option is available for the +# selection MCU + +config MISOC_HAVE_UART0 + bool + default n + select UART0_SERIALDRIVER + +config MISOC_UART0 + bool "UART0" + default n + select ARCH_HAVE_UART0 + select MISOC_UART + +endmenu # MISOC Peripheral Support + +config MISOC_UART + bool + +config MISOC_UART_RX_BUF_SIZE + int "UART RX Bufer size" + default 64 + depends on MISOC_UART + ---help--- + Size of RX buffers for MISOC UARTs + +config MISOC_UART_TX_BUF_SIZE + int "UART TX Bufer size" + default 64 + depends on MISOC_UART + ---help--- + Size of TX buffers for MISOC UARTs + +endif # ARCH_MISOC diff --git a/arch/misoc/include/lm32/irq.h b/arch/misoc/include/lm32/irq.h index a98bcab8e3b..f12fcb7db61 100644 --- a/arch/misoc/include/lm32/irq.h +++ b/arch/misoc/include/lm32/irq.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/misoc/include/lm32/syscall.h + * arch/misoc/include/lm32/irq.h * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt From 6a78c0f1130a9c314aa00d7a5c2531ffe8d00ab0 Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Tue, 1 Nov 2016 07:20:44 -0600 Subject: [PATCH 03/32] LM32: Add Kconfig files --- arch/misoc/Kconfig | 9 ++ arch/misoc/include/lm32/irq.h | 1 + arch/misoc/include/lm32/syscall.h | 1 + arch/misoc/include/lm32/types.h | 1 + arch/misoc/src/Makefile | 189 ++++++++++++++++++++++++++++++ arch/misoc/src/common/Kconfig | 8 ++ arch/misoc/src/lm32/Kconfig | 8 ++ 7 files changed, 217 insertions(+) create mode 100644 arch/misoc/src/Makefile create mode 100644 arch/misoc/src/common/Kconfig create mode 100644 arch/misoc/src/lm32/Kconfig diff --git a/arch/misoc/Kconfig b/arch/misoc/Kconfig index 7f3ae0dab45..74a2a7649b0 100644 --- a/arch/misoc/Kconfig +++ b/arch/misoc/Kconfig @@ -25,6 +25,7 @@ endchoice # Misoc Chip Selection config ARCH_CHIP string default "lm32" if ARCH_CHIP_LM32 + default "mor1k" if ARCH_CHIP_MOR1K menu "MISOC Peripheral Support" @@ -61,4 +62,12 @@ config MISOC_UART_TX_BUF_SIZE ---help--- Size of TX buffers for MISOC UARTs +source arch/misoc/src/common/Kconfig +ifdef ARCH_CHIP_LM32 +source arch/misoc/src/lm32/Kconfig +endif +ifdef ARCH_CHIP_MOR1K +source arch/misoc/src/mor1k/Kconfig +endif + endif # ARCH_MISOC diff --git a/arch/misoc/include/lm32/irq.h b/arch/misoc/include/lm32/irq.h index f12fcb7db61..e73d3815d5c 100644 --- a/arch/misoc/include/lm32/irq.h +++ b/arch/misoc/include/lm32/irq.h @@ -3,6 +3,7 @@ * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt + * Ramtin Amin * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/arch/misoc/include/lm32/syscall.h b/arch/misoc/include/lm32/syscall.h index 7c0c2b1066b..9e4b0d9ee03 100644 --- a/arch/misoc/include/lm32/syscall.h +++ b/arch/misoc/include/lm32/syscall.h @@ -3,6 +3,7 @@ * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt + * Ramtin Amin * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/arch/misoc/include/lm32/types.h b/arch/misoc/include/lm32/types.h index dbaaff28d2e..0e113100f91 100644 --- a/arch/misoc/include/lm32/types.h +++ b/arch/misoc/include/lm32/types.h @@ -3,6 +3,7 @@ * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt + * Ramtin Amin * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions diff --git a/arch/misoc/src/Makefile b/arch/misoc/src/Makefile new file mode 100644 index 00000000000..6a92f22910d --- /dev/null +++ b/arch/misoc/src/Makefile @@ -0,0 +1,189 @@ +############################################################################ +# arch/misoc/src/Makefile +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs +-include chip/Make.defs + +ARCH_SUBDIR = lm32 + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + ARCH_SRCDIR = $(TOPDIR)\arch\$(CONFIG_ARCH)\src + NUTTX = "$(TOPDIR)\nuttx$(EXEEXT)" + INCLUDES += -I "$(ARCH_SRCDIR)\chip" + INCLUDES += -I "$(ARCH_SRCDIR)\common" + INCLUDES += -I "$(ARCH_SRCDIR)\generated" + INCLUDES += -I "$(ARCH_SRCDIR)\$(ARCH_SUBDIR)" + INCLUDES += -I "$(TOPDIR)\sched" +else + ARCH_SRCDIR = $(TOPDIR)/arch/$(CONFIG_ARCH)/src +ifeq ($(WINTOOL),y) + NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx$(EXEEXT)}" + INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" + INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" + INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/generated}" + INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}" + INCLUDES += -I "${shell cygpath -w $(TOPDIR)/sched}" +else + NUTTX = "$(TOPDIR)/nuttx$(EXEEXT)" + INCLUDES += -I "$(ARCH_SRCDIR)/chip" + INCLUDES += -I "$(ARCH_SRCDIR)/common" + INCLUDES += -I "$(ARCH_SRCDIR)/generated" + INCLUDES += -I "$(ARCH_SRCDIR)/$(ARCH_SUBDIR)" + INCLUDES += -I "$(TOPDIR)/sched" +endif +endif + +CPPFLAGS += $(INCLUDES) $(EXTRADEFINES) +CFLAGS += $(INCLUDES) $(EXTRADEFINES) +CXXFLAGS += $(INCLUDES) $(EXTRADEFINES) +AFLAGS += $(INCLUDES) $(EXTRADEFINES) + +HEAD_OBJ = $(HEAD_ASRC:.S=$(OBJEXT)) +STARTUP_OBJS ?= $(HEAD_OBJ) + +ASRCS = $(CHIP_ASRCS) $(CMN_ASRCS) +AOBJS = $(ASRCS:.S=$(OBJEXT)) + +CSRCS = $(CHIP_CSRCS) $(CMN_CSRCS) +COBJS = $(CSRCS:.c=$(OBJEXT)) + +SRCS = $(ASRCS) $(CSRCS) +OBJS = $(AOBJS) $(COBJS) + +# Override in Make.defs if linker is not 'ld' + +LDSTARTGROUP ?= --start-group +LDENDGROUP ?= --end-group + +LDFLAGS += $(ARCHSCRIPT) +EXTRA_LIBS ?= +LINKLIBS ?= + +ifeq ($(CONFIG_WINDOWS_NATIVE),y) + BOARDMAKE = $(if $(wildcard .\board\Makefile),y,) + LIBPATHS += -L"$(TOPDIR)\lib" +ifeq ($(BOARDMAKE),y) + LIBPATHS += -L"$(TOPDIR)\arch\$(CONFIG_ARCH)\src\board" +endif + +else + BOARDMAKE = $(if $(wildcard ./board/Makefile),y,) + +ifeq ($(WINTOOL),y) + LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/lib"}" +ifeq ($(BOARDMAKE),y) + LIBPATHS += -L"${shell cygpath -w "$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board"}" +endif + +else + LIBPATHS += -L"$(TOPDIR)/lib" +ifeq ($(BOARDMAKE),y) + LIBPATHS += -L"$(TOPDIR)/arch/$(CONFIG_ARCH)/src/board" +endif +endif +endif + +LDLIBS = $(patsubst %.a,%,$(patsubst lib%,-l%,$(LINKLIBS))) +ifeq ($(BOARDMAKE),y) + LDLIBS += -lboard +endif + +LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}" + +VPATH = chip:common:$(ARCH_SUBDIR) + +all: $(HEAD_OBJ) libarch$(LIBEXT) + +.PHONY: board/libboard$(LIBEXT) + +$(AOBJS) $(HEAD_OBJ): %$(OBJEXT): %.S + $(call ASSEMBLE, $<, $@) + +$(COBJS): %$(OBJEXT): %.c + $(call COMPILE, $<, $@) + +libarch$(LIBEXT): $(OBJS) + $(call ARCHIVE, $@, $(OBJS)) + +board/libboard$(LIBEXT): + $(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES) + +nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT) + @echo "LD: nuttx toto $(LIBGCC)" + $(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \ + $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) +ifneq ($(CONFIG_WINDOWS_NATIVE),y) + $(Q) $(NM) $(NUTTX) | \ + grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ + sort > $(TOPDIR)/System.map +endif + +# This is part of the top-level export target + +export_startup: board/libboard$(LIBEXT) $(STARTUP_OBJS) + $(Q) if [ -d "$(EXPORT_DIR)/startup" ]; then \ + cp -f $(STARTUP_OBJS) "$(EXPORT_DIR)/startup"; \ + else \ + echo "$(EXPORT_DIR)/startup does not exist"; \ + exit 1; \ + fi + +# Dependencies + +.depend: Makefile chip/Make.defs $(SRCS) +ifeq ($(BOARDMAKE),y) + $(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" depend +endif + $(Q) $(MKDEP) --dep-path chip --dep-path common --dep-path $(ARCH_SUBDIR) \ + "$(CC)" -- $(CFLAGS) -- $(SRCS) >Make.dep + $(Q) touch $@ + +depend: .depend + +clean: +ifeq ($(BOARDMAKE),y) + $(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" clean +endif + $(call DELFILE, libarch$(LIBEXT)) + $(call CLEAN) + +distclean: clean +ifeq ($(BOARDMAKE),y) + $(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" distclean +endif + $(call DELFILE, Make.dep) + $(call DELFILE, .depend) + +-include Make.dep diff --git a/arch/misoc/src/common/Kconfig b/arch/misoc/src/common/Kconfig new file mode 100644 index 00000000000..6cd8cd81750 --- /dev/null +++ b/arch/misoc/src/common/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_MISOC + +endif # ARCH_MISOC diff --git a/arch/misoc/src/lm32/Kconfig b/arch/misoc/src/lm32/Kconfig new file mode 100644 index 00000000000..75814271c68 --- /dev/null +++ b/arch/misoc/src/lm32/Kconfig @@ -0,0 +1,8 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# + +if ARCH_CHIP_LM32 + +endif # ARCH_CHIP_LM32 From 62b394d06fc01cc211a9c2963b4a1fd389350104 Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Tue, 1 Nov 2016 08:10:14 -0600 Subject: [PATCH 04/32] LM32: First of many LM32 source files --- arch/misoc/src/lm32/lm32.h | 173 ++++++++++++++++++++++++ arch/misoc/src/lm32/lm32_allocateheap.c | 104 ++++++++++++++ 2 files changed, 277 insertions(+) create mode 100644 arch/misoc/src/lm32/lm32.h create mode 100644 arch/misoc/src/lm32/lm32_allocateheap.c diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h new file mode 100644 index 00000000000..8335c6917dd --- /dev/null +++ b/arch/misoc/src/lm32/lm32.h @@ -0,0 +1,173 @@ +/**************************************************************************** + * arch/misoc/src/common/lm32.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_SRC_COMMON_LM32_H +#define __ARCH_MISOC_SRC_COMMON_LM32_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#ifndef __ASSEMBLY__ +# include +# include +# include +#endif + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* This is the value used to mark the stack for subsequent stack monitoring + * logic. + */ + +#define STACK_COLOR 0xdeadbeef +#define INTSTACK_COLOR 0xdeadbeef +#define HEAP_COLOR 'h' + +/* In the RISC_V model, the state is copied from the stack to the TCB, but + * only a referenced is passed to get the state from the TCB. + */ + +#define up_savestate(regs) lm32_copystate(regs, (uint32_t*)g_current_regs) +#define up_restorestate(regs) (g_current_regs = regs) + +/* Determine which (if any) console driver to use. If a console is enabled + * and no other console device is specified, then a serial console is + * assumed. + */ + +#if !defined(CONFIG_DEV_CONSOLE) || CONFIG_NFILE_DESCRIPTORS <= 0 +# undef USE_SERIALDRIVER +# undef USE_EARLYSERIALINIT +# undef CONFIG_DEV_LOWCONSOLE +# undef CONFIG_RAMLOG_CONSOLE +#else +# if defined(CONFIG_RAMLOG_CONSOLE) +# undef USE_SERIALDRIVER +# undef USE_EARLYSERIALINIT +# undef CONFIG_DEV_LOWCONSOLE +# elif defined(CONFIG_DEV_LOWCONSOLE) +# undef USE_SERIALDRIVER +# undef USE_EARLYSERIALINIT +# else +# define USE_SERIALDRIVER 1 +# define USE_EARLYSERIALINIT 1 +# endif +#endif + +/* Low-level register access */ + +#define getreg8(a) (*(volatile uint8_t *)(a)) +#define putreg8(v,a) (*(volatile uint8_t *)(a) = (v)) +#define getreg16(a) (*(volatile uint16_t *)(a)) +#define putreg16(v,a) (*(volatile uint16_t *)(a) = (v)) +#define getreg32(a) (*(volatile uint32_t *)(a)) +#define putreg32(v,a) (*(volatile uint32_t *)(a) = (v)) + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +extern volatile uint32_t *g_current_regs; + +extern uint32_t g_idle_topstack; + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/* Low level initialization provided by board-level logic ******************/ + +void lm32_board_initialize(void); + +/* Memory allocation ********************************************************/ + +#if CONFIG_MM_REGIONS > 1 +void lm32_add_region(void); +#endif + +/* Context switching ********************************************************/ + +void lm32_copystate(uint32_t *dest, uint32_t *src); + +/* IRQ initialization *******************************************************/ + +void lm32_irq_initialize(void); + +/* System timer *************************************************************/ + +void lm32_timer_initialize(void); +int lm32_timerisr(int irq, void *context); + +/* Software interrupts ******************************************************/ + +uint32_t lm32_swint(int irq, FAR void *context); + +/* Signal handling **********************************************************/ + +void lm32_sigdeliver(void); + +/* Atomic modification of registers *****************************************/ + +void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits); +void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits); +void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits); + +/* Debug ********************************************************************/ + +void lm32_dumpstate(void); + +#undef EXTERN +#ifdef __cplusplus +} +#endif +#endif /* __ASSEMBLY__ */ + +#endif /* __ARCH_MISOC_SRC_COMMON_LM32_H */ diff --git a/arch/misoc/src/lm32/lm32_allocateheap.c b/arch/misoc/src/lm32/lm32_allocateheap.c new file mode 100644 index 00000000000..4df88cecaf6 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_allocateheap.c @@ -0,0 +1,104 @@ +/**************************************************************************** + * arch/misoc/src/common/lm32_allocateheap.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include + +#include "lm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_allocate_heap + * + * Description: + * This function will be called to dynamically set aside the heap region. + * + * For the kernel build (CONFIG_BUILD_KERNEL=y) with both kernel- and + * user-space heaps (CONFIG_MM_KERNEL_HEAP=y), this function provides the + * size of the unprotected, user-space heap. + * + * If a protected kernel-space heap is provided, the kernel heap must be + * allocated (and protected) by an analogous up_allocate_kheap(). + * + ****************************************************************************/ + +void up_allocate_heap(FAR void **heap_start, size_t *heap_size) +{ + board_autoled_on(LED_HEAPALLOCATE); + *heap_start = (FAR void *)g_idle_topstack; + *heap_size = CONFIG_RAM_END - g_idle_topstack; +} + +/**************************************************************************** + * Name: lm32_add_region + * + * Description: + * Memory may be added in non-contiguous chunks. Additional chunks are + * added by calling this function. + * + ****************************************************************************/ + +#if CONFIG_MM_REGIONS > 1 +void lm32_add_region(void) +{ +#warning Missing logic +} +#endif From 000e10470c79ba5393a437ef4aa48af3b9466940 Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Tue, 1 Nov 2016 11:35:27 -0600 Subject: [PATCH 05/32] MISOC LM32: Add arch/src/lm32 directory --- arch/misoc/src/Makefile | 4 +- arch/misoc/src/common/misoc_isr.c | 20 ++ arch/misoc/src/common/misoc_uart.c | 141 +++++++++ arch/misoc/src/lm32/Make.defs | 49 +++ arch/misoc/src/lm32/lm32.h | 3 +- arch/misoc/src/lm32/lm32_allocateheap.c | 2 +- arch/misoc/src/lm32/lm32_assert.c | 162 ++++++++++ arch/misoc/src/lm32/lm32_blocktask.c | 180 +++++++++++ arch/misoc/src/lm32/lm32_copystate.c | 87 ++++++ arch/misoc/src/lm32/lm32_createstack.c | 214 +++++++++++++ arch/misoc/src/lm32/lm32_doirq.c | 147 +++++++++ arch/misoc/src/lm32/lm32_dumpstate.c | 228 ++++++++++++++ arch/misoc/src/lm32/lm32_exit.c | 82 +++++ arch/misoc/src/lm32/lm32_idle.c | 96 ++++++ arch/misoc/src/lm32/lm32_initialize.c | 77 +++++ arch/misoc/src/lm32/lm32_initialstate.c | 120 +++++++ arch/misoc/src/lm32/lm32_interruptcontext.c | 62 ++++ arch/misoc/src/lm32/lm32_irq.c | 121 +++++++ arch/misoc/src/lm32/lm32_releasepending.c | 149 +++++++++ arch/misoc/src/lm32/lm32_releasestack.c | 115 +++++++ arch/misoc/src/lm32/lm32_stackframe.c | 136 ++++++++ arch/misoc/src/lm32/lm32_swint.c | 330 ++++++++++++++++++++ arch/misoc/src/lm32/lm32_syscall.S | 103 ++++++ arch/misoc/src/lm32/lm32_unblocktask.c | 164 ++++++++++ arch/misoc/src/lm32/lm32_vectors.S | 251 +++++++++++++++ 25 files changed, 3037 insertions(+), 6 deletions(-) create mode 100644 arch/misoc/src/common/misoc_isr.c create mode 100644 arch/misoc/src/common/misoc_uart.c create mode 100644 arch/misoc/src/lm32/Make.defs create mode 100644 arch/misoc/src/lm32/lm32_assert.c create mode 100644 arch/misoc/src/lm32/lm32_blocktask.c create mode 100644 arch/misoc/src/lm32/lm32_copystate.c create mode 100644 arch/misoc/src/lm32/lm32_createstack.c create mode 100644 arch/misoc/src/lm32/lm32_doirq.c create mode 100644 arch/misoc/src/lm32/lm32_dumpstate.c create mode 100644 arch/misoc/src/lm32/lm32_exit.c create mode 100644 arch/misoc/src/lm32/lm32_idle.c create mode 100644 arch/misoc/src/lm32/lm32_initialize.c create mode 100644 arch/misoc/src/lm32/lm32_initialstate.c create mode 100644 arch/misoc/src/lm32/lm32_interruptcontext.c create mode 100644 arch/misoc/src/lm32/lm32_irq.c create mode 100644 arch/misoc/src/lm32/lm32_releasepending.c create mode 100644 arch/misoc/src/lm32/lm32_releasestack.c create mode 100644 arch/misoc/src/lm32/lm32_stackframe.c create mode 100644 arch/misoc/src/lm32/lm32_swint.c create mode 100644 arch/misoc/src/lm32/lm32_syscall.S create mode 100644 arch/misoc/src/lm32/lm32_unblocktask.c create mode 100644 arch/misoc/src/lm32/lm32_vectors.S diff --git a/arch/misoc/src/Makefile b/arch/misoc/src/Makefile index 6a92f22910d..6a0285810b2 100644 --- a/arch/misoc/src/Makefile +++ b/arch/misoc/src/Makefile @@ -3,6 +3,7 @@ # # Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt +# Ramtin Amin # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -43,7 +44,6 @@ ifeq ($(CONFIG_WINDOWS_NATIVE),y) NUTTX = "$(TOPDIR)\nuttx$(EXEEXT)" INCLUDES += -I "$(ARCH_SRCDIR)\chip" INCLUDES += -I "$(ARCH_SRCDIR)\common" - INCLUDES += -I "$(ARCH_SRCDIR)\generated" INCLUDES += -I "$(ARCH_SRCDIR)\$(ARCH_SUBDIR)" INCLUDES += -I "$(TOPDIR)\sched" else @@ -52,14 +52,12 @@ ifeq ($(WINTOOL),y) NUTTX = "${shell cygpath -w $(TOPDIR)/nuttx$(EXEEXT)}" INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/chip}" INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/common}" - INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/generated}" INCLUDES += -I "${shell cygpath -w $(ARCH_SRCDIR)/$(ARCH_SUBDIR)}" INCLUDES += -I "${shell cygpath -w $(TOPDIR)/sched}" else NUTTX = "$(TOPDIR)/nuttx$(EXEEXT)" INCLUDES += -I "$(ARCH_SRCDIR)/chip" INCLUDES += -I "$(ARCH_SRCDIR)/common" - INCLUDES += -I "$(ARCH_SRCDIR)/generated" INCLUDES += -I "$(ARCH_SRCDIR)/$(ARCH_SUBDIR)" INCLUDES += -I "$(TOPDIR)/sched" endif diff --git a/arch/misoc/src/common/misoc_isr.c b/arch/misoc/src/common/misoc_isr.c new file mode 100644 index 00000000000..96c726b17c2 --- /dev/null +++ b/arch/misoc/src/common/misoc_isr.c @@ -0,0 +1,20 @@ +#include + +void uart_isr(); +void uart_isr() +{ + +} + +void isr(void); +void isr(void) +{ + unsigned int irqs; + + irqs = irq_pending() & irq_getmask(); + + if (irqs & (1 << UART_INTERRUPT)) + { + uart_isr(); + } +} diff --git a/arch/misoc/src/common/misoc_uart.c b/arch/misoc/src/common/misoc_uart.c new file mode 100644 index 00000000000..7a36e78199c --- /dev/null +++ b/arch/misoc/src/common/misoc_uart.c @@ -0,0 +1,141 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_SERIAL_TERMIOS +# include +#endif + +#include +#include +#include + +#include +#include + +#include "hw/flags.h" +#include "misoc_irqasm.h" +#include "misoc_uart.h" + +#include "lm32.h" + +/* Buffer sizes must be a power of 2 so that modulos can be computed + * with logical AND. + */ + +#define UART_RINGBUFFER_SIZE_RX 128 +#define UART_RINGBUFFER_MASK_RX (UART_RINGBUFFER_SIZE_RX-1) + +static char rx_buf[UART_RINGBUFFER_SIZE_RX]; +static volatile unsigned int rx_produce; +static unsigned int rx_consume; + +#define UART_RINGBUFFER_SIZE_TX 128 +#define UART_RINGBUFFER_MASK_TX (UART_RINGBUFFER_SIZE_TX-1) + +static char tx_buf[UART_RINGBUFFER_SIZE_TX]; +static unsigned int tx_produce; +static volatile unsigned int tx_consume; + +static int uart_interrupt(int irq, void *context); + +static int uart_interrupt(int irq, void *context) +{ + unsigned int stat, rx_produce_next; + + stat = uart_ev_pending_read(); + + if(stat & UART_EV_RX) { + while(!uart_rxempty_read()) { + rx_produce_next = (rx_produce + 1) & UART_RINGBUFFER_MASK_RX; + if(rx_produce_next != rx_consume) { + rx_buf[rx_produce] = uart_rxtx_read(); + rx_produce = rx_produce_next; + } + uart_ev_pending_write(UART_EV_RX); + } + } + + if(stat & UART_EV_TX) { + uart_ev_pending_write(UART_EV_TX); + while((tx_consume != tx_produce) && !uart_txfull_read()) { + uart_rxtx_write(tx_buf[tx_consume]); + tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX; + } + } + + return OK; +} + +/* Do not use in interrupt handlers! */ +char uart_read(void) +{ + char c; + + if(irq_getie()) { + while(rx_consume == rx_produce); + } else if (rx_consume == rx_produce) { + return 0; + } + + c = rx_buf[rx_consume]; + rx_consume = (rx_consume + 1) & UART_RINGBUFFER_MASK_RX; + return c; +} + +int uart_read_nonblock(void) +{ + return (rx_consume != rx_produce); +} + +int up_putc(int ch) +{ + unsigned int oldmask; + unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX; + + if(irq_getie()) { + while(tx_produce_next == tx_consume); + } else if(tx_produce_next == tx_consume) { + return ch; + } + + oldmask = irq_getmask(); + irq_setmask(oldmask & ~(1 << UART_INTERRUPT)); + if((tx_consume != tx_produce) || uart_txfull_read()) { + tx_buf[tx_produce] = ch; + tx_produce = tx_produce_next; + } else { + uart_rxtx_write(ch); + } + irq_setmask(oldmask); + return ch; +} + +void uart_init(void) +{ + rx_produce = 0; + rx_consume = 0; + + tx_produce = 0; + tx_consume = 0; + + uart_ev_pending_write(uart_ev_pending_read()); + uart_ev_enable_write(UART_EV_TX | UART_EV_RX); + irq_setmask(irq_getmask() | (1 << UART_INTERRUPT)); + + irq_attach(1 << UART_INTERRUPT, uart_interrupt); +} + +void uart_sync(void) +{ + while(tx_consume != tx_produce); +} + + + diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs new file mode 100644 index 00000000000..1c12e0c5270 --- /dev/null +++ b/arch/misoc/src/lm32/Make.defs @@ -0,0 +1,49 @@ +############################################################################ +# arch/misoc/src/Makefile +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Ramtin Amin +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +HEAD_ASRC = lm32_vectors.S + +CMN_ASRCS = +CMN_CSRCS = misoc_uart.c + +CHIP_ASRCS = lm32_start.S lm32_syscall.S + +CHIP_CSRCS = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c +CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_doirq.c lm32_dumpstate.c +CHIP_CSRCS += lm32_dumpstate.c lm32_exit.c lm32_idle.c lm32_initialize.c +CHIP_CSRCS += lm32_initialstate.c lm32_interruptcontext.c lm32_irq.c +CHIP_CSRCS += lm32_releasepending.c lm32_releasestack.c lm32_stackframe.c +CHIP_CSRCS += lm32_swint.c lm32_unblocktask.c diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h index 8335c6917dd..fe18969c758 100644 --- a/arch/misoc/src/lm32/lm32.h +++ b/arch/misoc/src/lm32/lm32.h @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/misoc/src/common/lm32.h + * arch/misoc/src/lm32/lm32.h * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt @@ -144,7 +144,6 @@ void lm32_irq_initialize(void); /* System timer *************************************************************/ void lm32_timer_initialize(void); -int lm32_timerisr(int irq, void *context); /* Software interrupts ******************************************************/ diff --git a/arch/misoc/src/lm32/lm32_allocateheap.c b/arch/misoc/src/lm32/lm32_allocateheap.c index 4df88cecaf6..882bed891aa 100644 --- a/arch/misoc/src/lm32/lm32_allocateheap.c +++ b/arch/misoc/src/lm32/lm32_allocateheap.c @@ -1,5 +1,5 @@ /**************************************************************************** - * arch/misoc/src/common/lm32_allocateheap.c + * arch/misoc/src/lm32/lm32_allocateheap.c * * Copyright (C) 2016 Gregory Nutt. All rights reserved. * Author: Gregory Nutt diff --git a/arch/misoc/src/lm32/lm32_assert.c b/arch/misoc/src/lm32/lm32_assert.c new file mode 100644 index 00000000000..78e7d2b6680 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_assert.c @@ -0,0 +1,162 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_assert.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include + +#include "sched/sched.h" +#include "lm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* USB trace dumping */ + +#ifndef CONFIG_USBDEV_TRACE +# undef CONFIG_ARCH_USBDUMP +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: _up_assert + ****************************************************************************/ + +static void _up_assert(int errorcode) noreturn_function; +static void _up_assert(int errorcode) +{ + /* Are we in an interrupt handler or the idle task? */ + + if (g_current_regs || this_task()->pid == 0) + { + (void)up_irq_save(); + for (; ; ) + { +#ifdef CONFIG_ARCH_LEDS + board_autoled_on(LED_PANIC); + up_mdelay(250); + board_autoled_off(LED_PANIC); + up_mdelay(250); +#endif + } + } + else + { + exit(errorcode); + } +} + +/**************************************************************************** + * Name: assert_tracecallback + ****************************************************************************/ + +#ifdef CONFIG_ARCH_USBDUMP +static int usbtrace_syslog(FAR const char *fmt, ...) +{ + va_list ap; + int ret; + + /* Let vsyslog do the real work */ + + va_start(ap, fmt); + ret = vsyslog(LOG_EMERG, fmt, ap); + va_end(ap); + return ret; +} + +static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg) +{ + usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value); + return 0; +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_assert + ****************************************************************************/ + +void up_assert(const uint8_t *filename, int lineno) +{ +#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT) + struct tcb_s *rtcb = this_task(); +#endif + + board_autoled_on(LED_ASSERTION); + +#if CONFIG_TASK_NAME_SIZE > 0 + _alert("Assertion failed at file:%s line: %d task: %s\n", + filename, lineno, rtcb->name); +#else + _alert("Assertion failed at file:%s line: %d\n", + filename, lineno); +#endif + + lm32_dumpstate(); + +#ifdef CONFIG_ARCH_USBDUMP + /* Dump USB trace data */ + + (void)usbtrace_enumerate(assert_tracecallback, NULL); +#endif + +#ifdef CONFIG_BOARD_CRASHDUMP + board_crashdump(up_getsp(), this_task(), filename, lineno); +#endif + + _up_assert(EXIT_FAILURE); +} diff --git a/arch/misoc/src/lm32/lm32_blocktask.c b/arch/misoc/src/lm32/lm32_blocktask.c new file mode 100644 index 00000000000..f313da11cca --- /dev/null +++ b/arch/misoc/src/lm32/lm32_blocktask.c @@ -0,0 +1,180 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_blocktask.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include + +#include "sched/sched.h" +#include "group/group.h" +#include "lm32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_block_task + * + * Description: + * The currently executing task at the head of + * the ready to run list must be stopped. Save its context + * and move it to the inactive list specified by task_state. + * + * Inputs: + * tcb: Refers to a task in the ready-to-run list (normally + * the task at the head of the list). It most be + * stopped, its context saved and moved into one of the + * waiting task lists. It it was the task at the head + * of the ready-to-run list, then a context to the new + * ready to run task must be performed. + * task_state: Specifies which waiting task list should be + * hold the blocked task TCB. + * + ****************************************************************************/ + +void up_block_task(struct tcb_s *tcb, tstate_t task_state) +{ + struct tcb_s *rtcb = this_task(); + bool switch_needed; + + /* Verify that the context switch can be performed */ + + ASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) && + (tcb->task_state <= LAST_READY_TO_RUN_STATE)); + + /* Remove the tcb task from the ready-to-run list. If we + * are blocking the task at the head of the task list (the + * most likely case), then a context switch to the next + * ready-to-run task is needed. In this case, it should + * also be true that rtcb == tcb. + */ + + switch_needed = sched_removereadytorun(tcb); + + /* Add the task to the specified blocked task list */ + + sched_addblocked(tcb, (tstate_t)task_state); + + /* If there are any pending tasks, then add them to the ready-to-run + * task list now + */ + + if (g_pendingtasks.head) + { + switch_needed |= sched_mergepending(); + } + + /* Now, perform the context switch if one is needed */ + + if (switch_needed) + { + /* Update scheduler parameters */ + + sched_suspend_scheduler(rtcb); + + /* Are we in an interrupt handler? */ + + if (g_current_regs) + { + /* Yes, then we have to do things differently. + * Just copy the g_current_regs into the OLD rtcb. + */ + + up_savestate(rtcb->xcp.regs); + + /* Restore the exception context of the rtcb at the (new) head + * of the ready-to-run task list. + */ + + rtcb = this_task(); + + /* Reset scheduler parameters */ + + sched_resume_scheduler(rtcb); + + /* Then switch contexts. Any necessary address environment + * changes will be made when the interrupt returns. + */ + + up_restorestate(rtcb->xcp.regs); + } + + /* No, then we will need to perform the user context switch */ + + else + { + /* Get the context of the task at the head of the ready to + * run list. + */ + + struct tcb_s *nexttcb = this_task(); + +#ifdef CONFIG_ARCH_ADDRENV + /* Make sure that the address environment for the previously + * running task is closed down gracefully (data caches dump, + * MMU flushed) and set up the address environment for the new + * thread at the head of the ready-to-run list. + */ + + (void)group_addrenv(nexttcb); +#endif + /* Reset scheduler parameters */ + + sched_resume_scheduler(nexttcb); + + /* Then switch contexts */ + + up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs); + + /* up_switchcontext forces a context switch to the task at the + * head of the ready-to-run list. It does not 'return' in the + * normal sense. When it does return, it is because the blocked + * task is again ready to run and has execution priority. + */ + } + } +} diff --git a/arch/misoc/src/lm32/lm32_copystate.c b/arch/misoc/src/lm32/lm32_copystate.c new file mode 100644 index 00000000000..b3afa387b85 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_copystate.c @@ -0,0 +1,87 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_copystate.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "lm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lm32_copystate + ****************************************************************************/ + +/* A little faster than most memcpy's */ + +void lm32_copystate(uint32_t *dest, uint32_t *src) +{ + int i; + + /* In the LM32 model, the state is copied from the stack to the TCB, + * but only a reference is passed to get the state from the TCB. So the + * following check avoids copying the TCB save area onto itself: + */ + + if (src != dest) + { + for (i = 0; i < XCPTCONTEXT_REGS; i++) + { + *dest++ = *src++; + } + } +} + diff --git a/arch/misoc/src/lm32/lm32_createstack.c b/arch/misoc/src/lm32/lm32_createstack.c new file mode 100644 index 00000000000..31c7f242261 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_createstack.c @@ -0,0 +1,214 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_createstack.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "lm32.h" + +/**************************************************************************** + * Pre-processor Macros + ****************************************************************************/ + +/* LM32 requires at least a 4-byte stack alignment. For floating point use, + * however, the stack must be aligned to 8-byte addresses. + */ + +#ifdef CONFIG_LIBC_FLOATINGPOINT +# define STACK_ALIGNMENT 8 +#else +# define STACK_ALIGNMENT 4 +#endif + +/* Stack alignment macros */ + +#define STACK_ALIGN_MASK (STACK_ALIGNMENT-1) +#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK) +#define STACK_ALIGN_UP(a) (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK) + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_create_stack + * + * Description: + * Allocate a stack for a new thread and setup up stack-related information + * in the TCB. + * + * The following TCB fields must be initialized by this function: + * + * - adj_stack_size: Stack size after adjustment for hardware, processor, + * etc. This value is retained only for debug purposes. + * - stack_alloc_ptr: Pointer to allocated stack + * - adj_stack_ptr: Adjusted stack_alloc_ptr for HW. The initial value of + * the stack pointer. + * + * Inputs: + * - tcb: The TCB of new task + * - stack_size: The requested stack size. At least this much + * must be allocated. + * - ttype: The thread type. This may be one of following (defined in + * include/nuttx/sched.h): + * + * TCB_FLAG_TTYPE_TASK Normal user task + * TCB_FLAG_TTYPE_PTHREAD User pthread + * TCB_FLAG_TTYPE_KERNEL Kernel thread + * + * This thread type is normally available in the flags field of the TCB, + * however, there are certain contexts where the TCB may not be fully + * initialized when up_create_stack is called. + * + * If CONFIG_BUILD_KERNEL is defined, then this thread type may affect + * how the stack is allocated. For example, kernel thread stacks should + * be allocated from protected kernel memory. Stacks for user tasks and + * threads must come from memory that is accessible to user code. + * + ****************************************************************************/ + +int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype) +{ + /* Is there already a stack allocated of a different size? Because of + * alignment issues, stack_size might erroneously appear to be of a + * different size. Fortunately, this is not a critical operation. + */ + + if (tcb->stack_alloc_ptr && tcb->adj_stack_size != stack_size) + { + /* Yes.. Release the old stack */ + + up_release_stack(tcb, ttype); + } + + /* Do we need to allocate a new stack? */ + + if (!tcb->stack_alloc_ptr) + { + /* Allocate the stack. If DEBUG is enabled (but not stack debug), + * then create a zeroed stack to make stack dumps easier to trace. + */ + +#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP) + /* Use the kernel allocator if this is a kernel thread */ + + if (ttype == TCB_FLAG_TTYPE_KERNEL) + { + tcb->stack_alloc_ptr = (uint32_t *)kmm_malloc(stack_size); + } + else +#endif + { + /* Use the user-space allocator if this is a task or pthread */ + + tcb->stack_alloc_ptr = (uint32_t *)kumm_malloc(stack_size); + } + +#ifdef CONFIG_DEBUG_FEATURES + /* Was the allocation successful? */ + + if (!tcb->stack_alloc_ptr) + { + serr("ERROR: Failed to allocate stack, size %d\n", stack_size); + } +#endif + } + + /* Did we successfully allocate a stack? */ + + if (tcb->stack_alloc_ptr) + { + size_t top_of_stack; + size_t size_of_stack; + + /* Yes.. If stack debug is enabled, then fill the stack with a + * recognizable value that we can use later to test for high + * water marks. + */ + +#ifdef CONFIG_STACK_COLORATION + memset(tcb->stack_alloc_ptr, 0xaa, stack_size); +#endif + + /* LM32 uses a push-down stack: the stack grows toward lower + * addresses in memory. The stack pointer register points to the + * lowest, valid working address (the "top" of the stack). Items on + * the stack are referenced as positive word offsets from sp. + */ + + top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4; + + /* The LM32 stack must be aligned at word (4 byte) boundaries; for + * floating point use, the stack must be aligned to 8-byte addresses. + * If necessary top_of_stack must be rounded down to the next + * boundary to meet these alignment requirements. + */ + + top_of_stack = STACK_ALIGN_DOWN(top_of_stack); + size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4; + + /* Save the adjusted stack values in the struct tcb_s */ + + tcb->adj_stack_ptr = (FAR uint32_t *)top_of_stack; + tcb->adj_stack_size = size_of_stack; + + board_autoled_on(LED_STACKCREATED); + return OK; + } + + return ERROR; +} diff --git a/arch/misoc/src/lm32/lm32_doirq.c b/arch/misoc/src/lm32/lm32_doirq.c new file mode 100644 index 00000000000..50b2e745fc5 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_doirq.c @@ -0,0 +1,147 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_doirq.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include +#include +#include + +#include "group/group.h" +#include "lm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +uint32_t *up_doirq(int irq, uint32_t *regs) +{ + board_autoled_on(LED_INIRQ); +#ifdef CONFIG_SUPPRESS_INTERRUPTS + PANIC(); +#else + /* Current regs non-zero indicates that we are processing an interrupt; + * g_current_regs is also used to manage interrupt level context switches. + * + * Nested interrupts are not supported + */ + + DEBUGASSERT(g_current_regs == NULL); + g_current_regs = regs; + + /* Disable further occurrences of this interrupt (until the interrupt sources + * have been clear by the driver). + */ + + up_disable_irq(irq); + + /* Deliver the IRQ */ + + irq_dispatch(irq, regs); + +#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) + /* Check for a context switch. If a context switch occurred, then + * g_current_regs will have a different value than it did on entry. If an + * interrupt level context switch has occurred, then restore the floating + * point state and the establish the correct address environment before + * returning from the interrupt. + */ + + if (regs != g_current_regs) + { +#ifdef CONFIG_ARCH_FPU + /* Restore floating point registers */ + + up_restorefpu((uint32_t *)g_current_regs); +#endif + +#ifdef CONFIG_ARCH_ADDRENV + /* Make sure that the address environment for the previously + * running task is closed down gracefully (data caches dump, + * MMU flushed) and set up the address environment for the new + * thread at the head of the ready-to-run list. + */ + + (void)group_addrenv(NULL); +#endif + } +#endif + + /* If a context switch occurred while processing the interrupt then + * g_current_regs may have change value. If we return any value different + * from the input regs, then the lower level will know that a context + * switch occurred during interrupt processing. + */ + + regs = (uint32_t *)g_current_regs; + + /* Set g_current_regs to NULL to indicate that we are no longer in an + * interrupt handler. + */ + + g_current_regs = NULL; + + /* Unmask the last interrupt (global interrupts are still disabled) */ + + up_enable_irq(irq); +#endif + board_autoled_off(LED_INIRQ); + return regs; +} diff --git a/arch/misoc/src/lm32/lm32_dumpstate.c b/arch/misoc/src/lm32/lm32_dumpstate.c new file mode 100644 index 00000000000..e847bec40c3 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_dumpstate.c @@ -0,0 +1,228 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_dumpstate.c + * + * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include "sched/sched.h" +#include "lm32.h" + +#ifdef CONFIG_ARCH_STACKDUMP + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_getsp + ****************************************************************************/ + +static inline uint32_t up_getsp(void) +{ + register uint32_t sp; + + __asm__ __volatile__("addi %0, sp, 0" : "=r" (sp)); + + return sp; +} + +/**************************************************************************** + * Name: up_stackdump + ****************************************************************************/ + +static void up_stackdump(uint32_t sp, uint32_t stack_base) +{ +# if 0 + uint32_t stack ; + + for (stack = sp & ~0x1f; stack < stack_base; stack += 32) + { + uint32_t *ptr = (uint32_t *)stack; + _alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n", + stack, ptr[0], ptr[1], ptr[2], ptr[3], + ptr[4], ptr[5], ptr[6], ptr[7]); + } +#endif +} + +/**************************************************************************** + * Name: up_registerdump + ****************************************************************************/ + +static inline void up_registerdump(void) +{ +#if 0 + /* Are user registers available from interrupt processing? */ + + if (g_current_regs) + { + _alert("EPC:%08x \n", + g_current_regs[REG_EPC]); + _alert("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x A6:%08x A7:%08x\n", + g_current_regs[REG_A0], g_current_regs[REG_A1], g_current_regs[REG_A2], + g_current_regs[REG_A3], g_current_regs[REG_A4], g_current_regs[REG_A5], + g_current_regs[REG_A6], g_current_regs[REG_A7]); + _alert("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n", + g_current_regs[REG_T0], g_current_regs[REG_T1], g_current_regs[REG_T2], + g_current_regs[REG_T3], g_current_regs[REG_T4], g_current_regs[REG_T5], + g_current_regs[REG_T6]); + _alert("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n", + g_current_regs[REG_S0], g_current_regs[REG_S1], g_current_regs[REG_S2], + g_current_regs[REG_S3], g_current_regs[REG_S4], g_current_regs[REG_S5], + g_current_regs[REG_S6], g_current_regs[REG_S7]); + _alert("S8:%08x S9:%08x S10:%08x S11:%08x\n", + g_current_regs[REG_S8], g_current_regs[REG_S9], g_current_regs[REG_S10], + g_current_regs[REG_S11]); +#ifdef RISCV_SAVE_GP + _alert("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n", + g_current_regs[REG_GP], g_current_regs[REG_SP], g_current_regs[REG_FP], + g_current_regs[REG_TP], g_current_regs[REG_RA]); +#else + _alert("SP:%08x FP:%08x TP:%08x RA:%08x\n", + g_current_regs[REG_SP], g_current_regs[REG_FP], g_current_regs[REG_TP], + g_current_regs[REG_RA]); +#endif + } +#endif +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lm32_dumpstate + ****************************************************************************/ + +void lm32_dumpstate(void) +{ + struct tcb_s *rtcb = this_task(); + uint32_t sp = up_getsp(); + uint32_t ustackbase; + uint32_t ustacksize; +#if CONFIG_ARCH_INTERRUPTSTACK > 3 + uint32_t istackbase; + uint32_t istacksize; +#endif + + /* Get the limits on the user stack memory */ + + if (rtcb->pid == 0) + { + ustackbase = g_idle_topstack - 4; + ustacksize = CONFIG_IDLETHREAD_STACKSIZE; + } + else + { + ustackbase = (uint32_t)rtcb->adj_stack_ptr; + ustacksize = (uint32_t)rtcb->adj_stack_size; + } + + /* Get the limits on the interrupt stack memory */ + +#if CONFIG_ARCH_INTERRUPTSTACK > 3 + istackbase = (uint32_t)&g_intstackbase; + istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~3) - 4; + + /* Show interrupt stack info */ + + _alert("sp: %08x\n", sp); + _alert("IRQ stack:\n"); + _alert(" base: %08x\n", istackbase); + _alert(" size: %08x\n", istacksize); + + /* Does the current stack pointer lie within the interrupt + * stack? + */ + + if (sp <= istackbase && sp > istackbase - istacksize) + { + /* Yes.. dump the interrupt stack */ + + up_stackdump(sp, istackbase); + + /* Extract the user stack pointer which should lie + * at the base of the interrupt stack. + */ + + sp = g_intstackbase; + _alert("sp: %08x\n", sp); + } + + /* Show user stack info */ + + _alert("User stack:\n"); + _alert(" base: %08x\n", ustackbase); + _alert(" size: %08x\n", ustacksize); +#else + _alert("sp: %08x\n", sp); + _alert("stack base: %08x\n", ustackbase); + _alert("stack size: %08x\n", ustacksize); +#endif + + /* Dump the user stack if the stack pointer lies within the allocated user + * stack memory. + */ + + if (sp > ustackbase || sp <= ustackbase - ustacksize) + { +#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4 + _alert("ERROR: Stack pointer is not within allocated stack\n"); +#endif + } + else + { + up_stackdump(sp, ustackbase); + } + + /* Then dump the registers (if available) */ + + up_registerdump(); +} + +#endif /* CONFIG_ARCH_STACKDUMP */ diff --git a/arch/misoc/src/lm32/lm32_exit.c b/arch/misoc/src/lm32/lm32_exit.c new file mode 100644 index 00000000000..688f0854263 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_exit.c @@ -0,0 +1,82 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_exit.c + * + * Copyright (C) 2010, 2013-2014 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#ifdef CONFIG_DUMP_ON_EXIT +# include +#endif + +#include "task/task.h" +#include "sched/sched.h" +#include "group/group.h" +#include "lm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: _exit + * + * Description: + * This function causes the currently executing task to cease + * to exist. This is a special case of task_delete() where the task to + * be deleted is the currently executing task. It is more complex because + * a context switch must be perform to the next ready to run task. + * + ****************************************************************************/ + +void _exit(int status) +{ +#warning Missing logic +} diff --git a/arch/misoc/src/lm32/lm32_idle.c b/arch/misoc/src/lm32/lm32_idle.c new file mode 100644 index 00000000000..5b85bcc0c03 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_idle.c @@ -0,0 +1,96 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_idle.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +#include "lm32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_idle + * + * Description: + * up_idle() is the logic that will be executed when their is no other + * ready-to-run task. This is processor idle time and will continue until + * some interrupt occurs to cause a context switch from the idle task. + * + * Processing in this state may be processor-specific. e.g., this is where + * power management operations might be performed. + * + ****************************************************************************/ + +void up_idle(void) +{ +#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS) + /* If the system is idle and there are no timer interrupts, then process + * "fake" timer interrupts. Hopefully, something will wake up. + */ + + sched_process_timer(); +#else + + /* This would be an appropriate place to put some MCU-specific logic to + * sleep in a reduced power mode until an interrupt occurs to save power + */ + + /* This is a kludge that I still don't understand. The call to kmm_trysemaphore() + * in the os_start.c IDLE loop seems necessary for the good health of the IDLE + * loop. When the work queue is enabled, this logic is removed from the IDLE + * loop and it appears that we are somehow left idling with interrupts non- + * functional. The following should be no-op, it just disables then re-enables + * interrupts. But it fixes the problem and will stay here until I understand + * the problem/fix better. + * + * And no, the contents of the CP0 status register are not incorrect. But for + * some reason the status register needs to be re-written again on this thread + * for it to take effect. This might be a PIC32-only issue? + */ + +#ifdef CONFIG_SCHED_WORKQUEUE + irqstate_t flags = enter_critical_section(); + leave_critical_section(flags); +#endif +#endif +} diff --git a/arch/misoc/src/lm32/lm32_initialize.c b/arch/misoc/src/lm32/lm32_initialize.c new file mode 100644 index 00000000000..4efa2ecbf00 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_initialize.c @@ -0,0 +1,77 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_initialize.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "lm32.h" + +/**************************************************************************** + * Public Functionis + ****************************************************************************/ + +void up_initialize(void) +{ + /* Initialize the System Timer */ + + lm32_irq_initialize(); + + /* Initialize the serial driver */ + +#warning REVISIT: Here you should all lm32_serial_initialize(). That initializes the entire serial driver, a part of the operation is the uart initialization. + + uart_init(); +} diff --git a/arch/misoc/src/lm32/lm32_initialstate.c b/arch/misoc/src/lm32/lm32_initialstate.c new file mode 100644 index 00000000000..e42107e1450 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_initialstate.c @@ -0,0 +1,120 @@ +/**************************************************************************** + * arch/misoc/src/lm32/up_initialstate.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "lm32.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_initial_state + * + * Description: + * A new thread is being started and a new TCB + * has been created. This function is called to initialize + * the processor specific portions of the new TCB. + * + * This function must setup the intial architecture registers + * and/or stack so that execution will begin at tcb->start + * on the next context switch. + * + ****************************************************************************/ + +void up_initial_state(struct tcb_s *tcb) +{ + struct xcptcontext *xcp = &tcb->xcp; + + /* Initialize the initial exception register context structure */ + + memset(xcp, 0, sizeof(struct xcptcontext)); + + /* Save the initial stack pointer. Hmmm.. the stack is set to the very + * beginning of the stack region. Some functions may want to store data on + * the caller's stack and it might be good to reserve some space. However, + * only the start function would do that and we have control over that one + */ + + xcp->regs[REG_SP] = (uint32_t)tcb->adj_stack_ptr; + + /* Save the task entry point */ + + xcp->regs[REG_EPC] = (uint32_t)tcb->start; + + /* If this task is running PIC, then set the PIC base register to the + * address of the allocated D-Space region. + */ + +#ifdef CONFIG_PIC +# warning "Missing logic" +#endif + + /* Set privileged- or unprivileged-mode, depending on how NuttX is + * configured and what kind of thread is being started. + * + * If the kernel build is not selected, then all threads run in + * privileged thread mode. + */ + +#ifdef CONFIG_BUILD_KERNEL +# warning "Missing logic" +#endif +} diff --git a/arch/misoc/src/lm32/lm32_interruptcontext.c b/arch/misoc/src/lm32/lm32_interruptcontext.c new file mode 100644 index 00000000000..8edd5538532 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_interruptcontext.c @@ -0,0 +1,62 @@ +/**************************************************************************** + * arch/misoc/src/lm32/up_interruptcontext.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include "lm32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_interrupt_context + * + * Description: Return true is we are currently executing in + * the interrupt handler context. + ****************************************************************************/ + +bool up_interrupt_context(void) +{ + return g_current_regs != NULL; +} diff --git a/arch/misoc/src/lm32/lm32_irq.c b/arch/misoc/src/lm32/lm32_irq.c new file mode 100644 index 00000000000..b99bb443b43 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_irq.c @@ -0,0 +1,121 @@ +/**************************************************************************** + * arch/misoc/src/lm32/_irq.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include +#include + +#include +#include +#include + +#include "misoc_irqasm.h" +#include "lm32.h" + +/**************************************************************************** + * Public Data + ****************************************************************************/ + +volatile uint32_t *g_current_regs; + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lm32_irq_initialize + ****************************************************************************/ + +void lm32_irq_initialize(void) +{ + /* currents_regs is non-NULL only while processing an interrupt */ + + g_current_regs = NULL; + + /* Enable interrupt */ + + irq_setie(1); +} + +irqstate_t up_irq_save(void) +{ + irqstate_t flags; + irq_setie(0); + +#warning Return value MUST be the previous IE value. Returning 1 will not work. + return 1; +} + +void up_irq_restore(irqstate_t flags) +{ + irq_setie(1); +} + +/**************************************************************************** + * Name: up_disable_irq + * + * Description: + * Disable the IRQ specified by 'irq' + * + ****************************************************************************/ + +void up_disable_irq(int irq) +{ + irqstate_t flags; + flags = irq_getmask(); + flags &= ~(1 < + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sched/sched.h" +#include "group/group.h" +#include "lm32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_release_pending + * + * Description: + * Release and ready-to-run tasks that have + * collected in the pending task list. This can call a + * context switch if a new task is placed at the head of + * the ready to run list. + * + ****************************************************************************/ + +void up_release_pending(void) +{ + struct tcb_s *rtcb = this_task(); + + sinfo("From TCB=%p\n", rtcb); + + /* Merge the g_pendingtasks list into the ready-to-run task list */ + + /* sched_lock(); */ + if (sched_mergepending()) + { + /* The currently active task has changed! We will need to switch + * contexts. + * + * Update scheduler parameters. + */ + + sched_suspend_scheduler(rtcb); + + /* Are we operating in interrupt context? */ + + if (g_current_regs) + { + /* Yes, then we have to do things differently. + * Just copy the g_current_regs into the OLD rtcb. + */ + + up_savestate(rtcb->xcp.regs); + + /* Restore the exception context of the rtcb at the (new) head + * of the ready-to-run task list. + */ + + rtcb = this_task(); + + /* Update scheduler parameters */ + + sched_resume_scheduler(rtcb); + + /* Then switch contexts. Any necessary address environment + * changes will be made when the interrupt returns. + */ + + up_restorestate(rtcb->xcp.regs); + } + + /* No, then we will need to perform the user context switch */ + + else + { + /* Switch context to the context of the task at the head of the + * ready to run list. + */ + + struct tcb_s *nexttcb = this_task(); + +#ifdef CONFIG_ARCH_ADDRENV + /* Make sure that the address environment for the previously + * running task is closed down gracefully (data caches dump, + * MMU flushed) and set up the address environment for the new + * thread at the head of the ready-to-run list. + */ + + (void)group_addrenv(nexttcb); +#endif + /* Update scheduler parameters */ + + sched_resume_scheduler(nexttcb); + + /* Then switch contexts */ + + up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs); + + /* up_switchcontext forces a context switch to the task at the + * head of the ready-to-run list. It does not 'return' in the + * normal sense. When it does return, it is because the blocked + * task is again ready to run and has execution priority. + */ + } + } +} diff --git a/arch/misoc/src/lm32/lm32_releasestack.c b/arch/misoc/src/lm32/lm32_releasestack.c new file mode 100644 index 00000000000..fa88500bf9d --- /dev/null +++ b/arch/misoc/src/lm32/lm32_releasestack.c @@ -0,0 +1,115 @@ +/**************************************************************************** + * arch/misoc/src/lm32/up_releasestack.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "lm32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_release_stack + * + * Description: + * A task has been stopped. Free all stack related resources retained in + * the defunct TCB. + * + * Input Parmeters + * - dtcb: The TCB containing information about the stack to be released + * - ttype: The thread type. This may be one of following (defined in + * include/nuttx/sched.h): + * + * TCB_FLAG_TTYPE_TASK Normal user task + * TCB_FLAG_TTYPE_PTHREAD User pthread + * TCB_FLAG_TTYPE_KERNEL Kernel thread + * + * This thread type is normally available in the flags field of the TCB, + * however, there are certain error recovery contexts where the TCB may + * not be fully initialized when up_release_stack is called. + * + * If CONFIG_BUILD_KERNEL is defined, then this thread type may affect + * how the stack is freed. For example, kernel thread stacks may have + * been allocated from protected kernel memory. Stacks for user tasks + * and threads must have come from memory that is accessible to user + * code. + * + * Returned Value: + * None + * + ****************************************************************************/ + +void up_release_stack(FAR struct tcb_s *dtcb, uint8_t ttype) +{ + /* Is there a stack allocated? */ + + if (dtcb->stack_alloc_ptr) + { +#if defined(CONFIG_BUILD_KERNEL) && defined(CONFIG_MM_KERNEL_HEAP) + /* Use the kernel allocator if this is a kernel thread */ + + if (ttype == TCB_FLAG_TTYPE_KERNEL) + { + sched_kfree(dtcb->stack_alloc_ptr); + } + else +#endif + { + /* Use the user-space allocator if this is a task or pthread */ + + sched_ufree(dtcb->stack_alloc_ptr); + } + + /* Mark the stack freed */ + + dtcb->stack_alloc_ptr = NULL; + } + + /* The size of the allocated stack is now zero */ + + dtcb->adj_stack_size = 0; +} diff --git a/arch/misoc/src/lm32/lm32_stackframe.c b/arch/misoc/src/lm32/lm32_stackframe.c new file mode 100644 index 00000000000..981c655f81f --- /dev/null +++ b/arch/misoc/src/lm32/lm32_stackframe.c @@ -0,0 +1,136 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_stackframe.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include + +#include + +#include "lm32.h" + +/**************************************************************************** + * Pre-processor Macros + ****************************************************************************/ + +/* LM32 requires at least a 4-byte stack alignment. For floating point use, + * however, the stack must be aligned to 8-byte addresses. + */ + +#ifdef CONFIG_LIBC_FLOATINGPOINT +# define STACK_ALIGNMENT 8 +#else +# define STACK_ALIGNMENT 4 +#endif + +/* Stack alignment macros */ + +#define STACK_ALIGN_MASK (STACK_ALIGNMENT-1) +#define STACK_ALIGN_DOWN(a) ((a) & ~STACK_ALIGN_MASK) +#define STACK_ALIGN_UP(a) (((a) + STACK_ALIGN_MASK) & ~STACK_ALIGN_MASK) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_stack_frame + * + * Description: + * Allocate a stack frame in the TCB's stack to hold thread-specific data. + * This function may be called anytime after up_create_stack() or + * up_use_stack() have been called but before the task has been started. + * + * Thread data may be kept in the stack (instead of in the TCB) if it is + * accessed by the user code directly. This includes such things as + * argv[]. The stack memory is guaranteed to be in the same protection + * domain as the thread. + * + * The following TCB fields will be re-initialized: + * + * - adj_stack_size: Stack size after removal of the stack frame from + * the stack + * - adj_stack_ptr: Adjusted initial stack pointer after the frame has + * been removed from the stack. This will still be the initial value + * of the stack pointer when the task is started. + * + * Inputs: + * - tcb: The TCB of new task + * - frame_size: The size of the stack frame to allocate. + * + * Returned Value: + * - A pointer to bottom of the allocated stack frame. NULL will be + * returned on any failures. The alignment of the returned value is + * the same as the alignment of the stack itself. + * + ****************************************************************************/ + +FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size) +{ + uintptr_t topaddr; + + /* Align the frame_size */ + + frame_size = STACK_ALIGN_UP(frame_size); + + /* Is there already a stack allocated? Is it big enough? */ + + if (!tcb->stack_alloc_ptr || tcb->adj_stack_size <= frame_size) + { + return NULL; + } + + /* Save the adjusted stack values in the struct tcb_s */ + + topaddr = (uintptr_t)tcb->adj_stack_ptr - frame_size; + tcb->adj_stack_ptr = (FAR void *)topaddr; + tcb->adj_stack_size -= frame_size; + + /* Reset the initial stack pointer */ + + tcb->xcp.regs[REG_SP] = (uint32_t)tcb->adj_stack_ptr; + + /* And return the pointer to the allocated region */ + + return (FAR void *)(topaddr + sizeof(uint32_t)); +} diff --git a/arch/misoc/src/lm32/lm32_swint.c b/arch/misoc/src/lm32/lm32_swint.c new file mode 100644 index 00000000000..c8148812cc5 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_swint.c @@ -0,0 +1,330 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_swint.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "lm32.h" + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_registerdump + ****************************************************************************/ + +#ifdef CONFIG_DEBUG_SYSCALL_INFO +static void up_registerdump(const uint32_t *regs) +{ +#if 0 + svcinfo("EPC:%08x\n", + regs[REG_EPC]); + svcinfo("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x A6:%08x A7:%08x\n", + regs[REG_A0], regs[REG_A1], regs[REG_A2], regs[REG_A3], + regs[REG_A4], regs[REG_A5], regs[REG_A6], regs[REG_A7]); + svcinfo("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n", + regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3], + regs[REG_T4], regs[REG_T5], regs[REG_T6]); + svcinfo("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n", + regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3], + regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]); + svcinfo("S8:%08x S9:%08x S10:%08x S11:%08x\n", + regs[REG_S8], regs[REG_S9], regs[REG_S10], regs[REG_S11]); +#ifdef LM3232_SAVE_GP + svcinfo("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n", + regs[REG_GP], regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]); +#else + svcinfo("SP:%08x FP:%08x TP:%08x RA:%08x\n", + regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]); +#endif +#endif +} +#else +# define up_registerdump(regs) +#endif + +/**************************************************************************** + * Name: dispatch_syscall + * + * Description: + * Call the stub function corresponding to the system call. + * + ****************************************************************************/ + +#ifdef CONFIG_BUILD_KERNEL +static void dispatch_syscall(void) naked_function; +static void dispatch_syscall(void) +{ +# error "Missing logic" + +/* Refer to arch/arm/src/armv7-m/up_svcall.h for how this is done for ARM */ +/* __asm__ __volatile__ */ +/* ( */ +/* Save registers */ +/* Get the base of the stub lookup table */ +/* Get the offset of the stub for this syscall */ +/* Load the entry of the stub for this syscall */ +/* Call the stub */ +/* Restore regsisters */ +/* Return from the syscall */ +/* ); */ +} +#endif + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: lm32_swint + * + * Description: + * This is software interrupt exception handler that performs context + * switching and manages system calls + * + ****************************************************************************/ + +uint32_t lm32_swint(int irq, FAR void *context) +{ + uint32_t *regs = (uint32_t *)context; + + DEBUGASSERT(g_current_regs == NULL); + g_current_regs = regs; + + /* Software interrupt 0 is invoked with REG_A0 (REG_X10) = system call + * command and REG_A1-6 = variable number of + * arguments depending on the system call. + */ + +#ifdef CONFIG_DEBUG_SYSCALL_INFO + svcinfo("Entry: regs: %p cmd: %d\n", regs, regs[REG_A0]); + up_registerdump(regs); +#endif + + /* Handle the SWInt according to the command in $a0 */ + + switch (regs[REG_A0]) + { + /* A0=SYS_restore_context: This a restore context command: + * + * void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function; + * + * At this point, the following values are saved in context: + * + * A0 = SYS_restore_context + * A1 = restoreregs + * + * In this case, we simply need to set g_current_regs to restore register + * area referenced in the saved R1. context == g_current_regs is the normal + * exception return. By setting g_current_regs = context[R1], we force + * the return to the saved context referenced in $a1. + */ + + case SYS_restore_context: + { + DEBUGASSERT(regs[REG_A1] != 0); + g_current_regs = (uint32_t *)regs[REG_A1]; + } + break; + + /* A0=SYS_switch_context: This a switch context command: + * + * void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs); + * + * At this point, the following values are saved in context: + * + * A0 = SYS_switch_context + * A1 = saveregs + * A2 = restoreregs + * + * In this case, we save the context registers to the save register + * area reference by the saved contents of R5 and then set + * g_current_regs to to the save register area referenced by the saved + * contents of R6. + */ + + case SYS_switch_context: + { + DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0); + lm32_copystate((uint32_t *)regs[REG_A1], regs); + g_current_regs = (uint32_t *)regs[REG_A2]; + } + break; + + /* A0=SYS_syscall_return: This a switch context command: + * + * void up_sycall_return(void); + * + * At this point, the following values are saved in context: + * + * A0 = SYS_syscall_return + * + * We need to restore the saved return address and return in + * unprivileged thread mode. + */ + +#ifdef CONFIG_BUILD_KERNEL + case SYS_syscall_return: + { + struct tcb_s *rtcb = sched_self(); + int index = (int)rtcb->xcp.nsyscalls - 1; + + /* Make sure that there is a saved syscall return address. */ + + DEBUGASSERT(index >= 0); + + /* Setup to return to the saved syscall return address in + * the original mode. + */ + + g_current_regs[REG_EPC] = rtcb->xcp.syscall[index].sysreturn; +#error "Missing logic -- need to restore the original mode" + rtcb->xcp.nsyscalls = index; + } + break; +#endif + + /* This is not an architecture-specify system call. If NuttX is built + * as a standalone kernel with a system call interface, then all of the + * additional system calls must be handled as in the default case. + */ + + default: + { +#ifdef CONFIG_BUILD_KERNEL + FAR struct tcb_s *rtcb = sched_self(); + int index = rtcb->xcp.nsyscalls; + + /* Verify that the SYS call number is within range */ + + DEBUGASSERT(g_current_regs[REG_A0] < SYS_maxsyscall); + + /* Make sure that we got here that there is a no saved syscall + * return address. We cannot yet handle nested system calls. + */ + + DEBUGASSERT(index < CONFIG_SYS_NNEST); + + /* Setup to return to dispatch_syscall in privileged mode. */ + + rtcb->xcpsyscall[index].sysreturn = regs[REG_EPC]; +#error "Missing logic -- Need to save mode" + rtcb->xcp.nsyscalls = index + 1; + + regs[REG_EPC] = (uint32_t)dispatch_syscall; +#error "Missing logic -- Need to set privileged mode" + + /* Offset R0 to account for the reserved values */ + + g_current_regs[REG_A0] -= CONFIG_SYS_RESERVED; +#else + svcerr("ERROR: Bad SYS call: %d\n", regs[REG_A0]); +#endif + } + break; + } + + /* Report what happened. That might difficult in the case of a context switch */ + +#ifdef CONFIG_DEBUG_SYSCALL_INFO + if (regs != g_current_regs) + { + svcinfo("SWInt Return: Context switch!\n"); + up_registerdump((const uint32_t *)g_current_regs); + } + else + { + svcinfo("SWInt Return: %d\n", regs[REG_A0]); + } +#endif + + +#if defined(CONFIG_ARCH_FPU) || defined(CONFIG_ARCH_ADDRENV) + /* Check for a context switch. If a context switch occurred, then + * g_current_regs will have a different value than it did on entry. If an + * interrupt level context switch has occurred, then restore the floating + * point state and the establish the correct address environment before + * returning from the interrupt. + */ + + if (regs != g_current_regs) + { +#ifdef CONFIG_ARCH_FPU + /* Restore floating point registers */ + + up_restorefpu((uint32_t *)g_current_regs); +#endif + +#ifdef CONFIG_ARCH_ADDRENV + /* Make sure that the address environment for the previously + * running task is closed down gracefully (data caches dump, + * MMU flushed) and set up the address environment for the new + * thread at the head of the ready-to-run list. + */ + + (void)group_addrenv(NULL); +#endif + } +#endif + + /* If a context switch occurred while processing the interrupt then + * g_current_regs may have change value. If we return any value different + * from the input regs, then the lower level will know that a context + * switch occurred during interrupt processing. + */ + + regs = (uint32_t *)g_current_regs; + + /* Set g_current_regs to NULL to indicate that we are no longer in an + * interrupt handler. + */ + + g_current_regs = NULL; + return regs; +} diff --git a/arch/misoc/src/lm32/lm32_syscall.S b/arch/misoc/src/lm32/lm32_syscall.S new file mode 100644 index 00000000000..61b0b6ca7cf --- /dev/null +++ b/arch/misoc/src/lm32/lm32_syscall.S @@ -0,0 +1,103 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_syscall.S + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Derives from RISC-V version: + * + * Copyright (C) 2016 Ken Pettit. All rights reserved. + * Author: Ken Pettit + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Symbols + ****************************************************************************/ + + .file "up_syscall.S" + .global sys_call0 + .global sys_call1 + .global sys_call2 + .global sys_call3 + .global sys_call4 + .global sys_call5 + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_syscall0, up_syscall1, up_syscall2, up_syscall3 + * + * Description: + * up_syscall0 - System call SYS_ argument and no additional parameters. + * up_syscall1 - System call SYS_ argument and one additional parameter. + * up_syscall2 - System call SYS_ argument and two additional parameters. + * up_syscall3 - System call SYS_ argument and three additional parameters. + * up_syscall4 - System call SYS_ argument and four additional parameters. + * up_syscall5 - System call SYS_ argument and five additional parameters. + * + * Assumption: + * All interrupts are disabled except for the software interrupts. + * + ****************************************************************************/ + + .text + +sys_call0: /* a0 holds the syscall number */ +sys_call1: /* a0 holds the syscall number, argument in a1 */ +sys_call2: /* a0 holds the syscall number, arguments in a1 and a2 */ +sys_call3: /* a0 holds the syscall number, arguments in a1, a2, and a3 */ +sys_call4: /* a0 holds the syscall number, arguments in a1, a2, a3 and a4 */ +sys_call5: /* a0 holds the syscall number, arguments in a1, a2, a3, a4 and a5 */ + + /* Issue the ECALL opcode to perform a SW interrupt to the OS */ + + scall + + /* The actual interrupt may not a occur for a few more cycles. Let's + * put a few nop's here in hope that the SW interrupt occurs during + * the sequence of nops. + */ + + nop + nop + + /* Then return with the result of the software interrupt in v0 */ + + ret + nop diff --git a/arch/misoc/src/lm32/lm32_unblocktask.c b/arch/misoc/src/lm32/lm32_unblocktask.c new file mode 100644 index 00000000000..74b1d92472c --- /dev/null +++ b/arch/misoc/src/lm32/lm32_unblocktask.c @@ -0,0 +1,164 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_unblocktask.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include + +#include +#include + +#include "sched/sched.h" +#include "group/group.h" +#include "clock/clock.h" +#include "lm32.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_unblock_task + * + * Description: + * A task is currently in an inactive task list + * but has been prepped to execute. Move the TCB to the + * ready-to-run list, restore its context, and start execution. + * + * Inputs: + * tcb: Refers to the tcb to be unblocked. This tcb is + * in one of the waiting tasks lists. It must be moved to + * the ready-to-run list and, if it is the highest priority + * ready to run task, executed. + * + ****************************************************************************/ + +void up_unblock_task(struct tcb_s *tcb) +{ + struct tcb_s *rtcb = this_task(); + + /* Verify that the context switch can be performed */ + + ASSERT((tcb->task_state >= FIRST_BLOCKED_STATE) && + (tcb->task_state <= LAST_BLOCKED_STATE)); + + /* Remove the task from the blocked task list */ + + sched_removeblocked(tcb); + + /* Add the task in the correct location in the prioritized + * ready-to-run task list + */ + + if (sched_addreadytorun(tcb)) + { + /* The currently active task has changed! We need to do + * a context switch to the new task. + */ + + /* Update scheduler parameters */ + + sched_suspend_scheduler(rtcb); + + /* Are we in an interrupt handler? */ + + if (g_current_regs) + { + /* Yes, then we have to do things differently. + * Just copy the g_current_regs into the OLD rtcb. + */ + + up_savestate(rtcb->xcp.regs); + + /* Restore the exception context of the rtcb at the (new) head + * of the ready-to-run task list. + */ + + rtcb = this_task(); + + /* Update scheduler parameters */ + + sched_resume_scheduler(rtcb); + + /* Then switch contexts. Any necessary address environment + * changes will be made when the interrupt returns. + */ + + up_restorestate(rtcb->xcp.regs); + } + + /* No, then we will need to perform the user context switch */ + + else + { + /* Restore the exception context of the new task that is ready to + * run (probably tcb). This is the new rtcb at the head of the + * ready-to-run task list. + */ + + struct tcb_s *nexttcb = this_task(); + +#ifdef CONFIG_ARCH_ADDRENV + /* Make sure that the address environment for the previously + * running task is closed down gracefully (data caches dump, + * MMU flushed) and set up the address environment for the new + * thread at the head of the ready-to-run list. + */ + + (void)group_addrenv(nexttcb); +#endif + /* Update scheduler parameters */ + + sched_resume_scheduler(nexttcb); + + /* Then switch contexts */ + + up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs); + + /* up_switchcontext forces a context switch to the task at the + * head of the ready-to-run list. It does not 'return' in the + * normal sense. When it does return, it is because the blocked + * task is again ready to run and has execution priority. + */ + } + } +} diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S new file mode 100644 index 00000000000..a5ca7a550de --- /dev/null +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -0,0 +1,251 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_allocateheap.c + * LM32 C startup code. + * + * Adapted for NuttX: + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Derives from LatticeMico32 C startup code. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Exception handlers - Must be 32 bytes long. + ****************************************************************************/ + + .section .text, "ax", @progbits + .global __start + +__start: +_reset_handler: + xor r0, r0, r0 + wcsr IE, r0 + mvhi r1, hi(_reset_handler) + ori r1, r1, lo(_reset_handler) + wcsr EBA, r1 + bi _do_reset + nop + nop + +_breakpoint_handler: + bi _breakpoint_handler + nop + nop + nop + nop + nop + nop + nop + +_instruction_bus_error_handler: + bi _instruction_bus_error_handler + nop + nop + nop + nop + nop + nop + nop + +_watchpoint_hander: + bi _watchpoint_hander + nop + nop + nop + nop + nop + nop + nop + +_data_bus_error_handler: + bi _data_bus_error_handler + nop + nop + nop + nop + nop + nop + nop + +_divide_by_zero_handler: + bi _divide_by_zero_handler + nop + nop + nop + nop + nop + nop + nop + +_interrupt_handler: + sw (sp+0), ra + calli .save_all + rcsr r1, IP + calli up_doirq + bi .restore_all_and_eret + nop + nop + nop + +_syscall_handler: + sw (sp+0), ra + calli .save_all + rcsr r1, IP + calli lm32_swint + bi .restore_all_and_eret + nop + nop + nop + +_do_reset: + /* Setup stack and global pointer */ + + mvhi sp, hi(_fstack) + ori sp, sp, lo(_fstack) + + /* Clear BSS */ + + mvhi r1, hi(_sbss) + ori r1, r1, lo(_sbss) + mvhi r3, hi(_ebss) + ori r3, r3, lo(_ebss) + +.clearBSS: + be r1, r3, .callMain + sw (r1+0), r0 + addi r1, r1, 4 + bi .clearBSS + +.callMain: + bi os_start + +.save_all: + addi sp, sp, -132 + sw (sp+REG_X0), r0 + sw (sp+REG_X1), r1 + sw (sp+REG_X2), r2 + sw (sp+REG_X3), r3 + sw (sp+REG_X4), r4 + sw (sp+REG_X5), r5 + sw (sp+REG_X6), r6 + sw (sp+REG_X7), r7 + sw (sp+REG_X8), r8 + sw (sp+REG_X9), r9 + sw (sp+REG_X10), r10 + sw (sp+REG_X11), r11 + sw (sp+REG_X12), r12 + sw (sp+REG_X13), r13 + sw (sp+REG_X14), r14 + sw (sp+REG_X15), r15 + sw (sp+REG_X16), r16 + sw (sp+REG_X17), r17 + sw (sp+REG_X18), r18 + sw (sp+REG_X19), r19 + sw (sp+REG_X20), r20 + sw (sp+REG_X21), r21 + sw (sp+REG_X22), r22 + sw (sp+REG_X23), r23 + sw (sp+REG_X24), r24 + sw (sp+REG_X25), r25 + + sw (sp+REG_GP), r26 + sw (sp+REG_FP), r27 + sw (sp+REG_SP), r28 + + /* reg RA done later */ + + sw (sp+REG_EA), r30 + sw (sp+REG_BA), r31 + + /* ra needs to be moved from initial stack location */ + + lw r1, (sp+ 132) + sw (sp+REG_RA), r1 + + /* the 2nd argument is the regs pointer */ + + addi r2, sp, 0 + ret + +.restore_all_and_eret: + /* r1 should have the place where we restore ! */ + + lw r2, (r1+REG_X2) + lw r3, (r1+REG_X3) + lw r4, (r1+REG_X4) + lw r5, (r1+REG_X5) + lw r6, (r1+REG_X6) + lw r7, (r1+REG_X7) + lw r8, (r1+REG_X8) + lw r9, (r1+REG_X9) + lw r10, (r1+REG_X10) + lw r11, (r1+REG_X11) + lw r12, (r1+REG_X12) + lw r13, (r1+REG_X13) + lw r14, (r1+REG_X14) + lw r15, (r1+REG_X15) + lw r16, (r1+REG_X16) + lw r17, (r1+REG_X17) + lw r18, (r1+REG_X18) + lw r19, (r1+REG_X19) + lw r20, (r1+REG_X20) + lw r21, (r1+REG_X21) + lw r22, (r1+REG_X22) + lw r23, (r1+REG_X23) + lw r24, (r1+REG_X24) + lw r25, (r1+REG_X25) + lw r26, (r1+REG_GP) + lw r27, (r1+REG_FP) + lw r28, (r1+REG_SP) + lw r29, (r1+REG_RA) + lw r30, (r1+REG_EA) + lw r31, (r1+REG_BA) + lw r1, (r1+REG_X1) + addi sp, sp, 132 + eret + + /* This global variable is unsigned long g_idle_topstack and is + * exported from here only because of its coupling to other + * uses of _ebss in this file + */ + + .data + .align 4 + .globl g_idle_topstack + .type g_idle_topstack, object + +g_idle_topstack: + .long _ebss+CONFIG_IDLETHREAD_STACKSIZE + .size g_idle_topstack, .-g_idle_topstack + .end From 0088f24603a5e73d503e0ea779712e1ff124f270 Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Tue, 1 Nov 2016 12:47:35 -0600 Subject: [PATCH 06/32] MISOC LM32: Add arch/src/common directory --- arch/misoc/Kconfig | 1 - arch/misoc/src/common/Kconfig | 8 -- arch/misoc/src/common/hw/common.h | 49 +++++++ arch/misoc/src/common/hw/ethmac_mem.h | 54 ++++++++ arch/misoc/src/common/hw/flags.h | 79 ++++++++++++ arch/misoc/src/common/misoc_isr.c | 20 --- arch/misoc/src/common/misoc_uart.c | 179 +++++++++++++++++++------- arch/misoc/src/common/misoc_uart.h | 60 +++++++++ arch/misoc/src/lm32/Make.defs | 4 +- arch/misoc/src/lm32/chip.h | 92 +++++++++++++ arch/misoc/src/lm32/lm32_irq.c | 2 +- arch/misoc/src/lm32/lm32_isr.c | 61 +++++++++ 12 files changed, 534 insertions(+), 75 deletions(-) delete mode 100644 arch/misoc/src/common/Kconfig create mode 100644 arch/misoc/src/common/hw/common.h create mode 100644 arch/misoc/src/common/hw/ethmac_mem.h create mode 100644 arch/misoc/src/common/hw/flags.h delete mode 100644 arch/misoc/src/common/misoc_isr.c create mode 100644 arch/misoc/src/common/misoc_uart.h create mode 100644 arch/misoc/src/lm32/chip.h create mode 100644 arch/misoc/src/lm32/lm32_isr.c diff --git a/arch/misoc/Kconfig b/arch/misoc/Kconfig index 74a2a7649b0..5cfbf0268c8 100644 --- a/arch/misoc/Kconfig +++ b/arch/misoc/Kconfig @@ -62,7 +62,6 @@ config MISOC_UART_TX_BUF_SIZE ---help--- Size of TX buffers for MISOC UARTs -source arch/misoc/src/common/Kconfig ifdef ARCH_CHIP_LM32 source arch/misoc/src/lm32/Kconfig endif diff --git a/arch/misoc/src/common/Kconfig b/arch/misoc/src/common/Kconfig deleted file mode 100644 index 6cd8cd81750..00000000000 --- a/arch/misoc/src/common/Kconfig +++ /dev/null @@ -1,8 +0,0 @@ -# -# For a description of the syntax of this configuration file, -# see the file kconfig-language.txt in the NuttX tools repository. -# - -if ARCH_MISOC - -endif # ARCH_MISOC diff --git a/arch/misoc/src/common/hw/common.h b/arch/misoc/src/common/hw/common.h new file mode 100644 index 00000000000..a6a7a92159f --- /dev/null +++ b/arch/misoc/src/common/hw/common.h @@ -0,0 +1,49 @@ +/**************************************************************************** + * arch/misoc/src/common/hw/common.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_SRC_COMMON_HW_COMMON_H +#define __ARCH_MISOC_SRC_COMMON_HW_COMMON_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef __ASSEMBLER__ +# define MMPTR(x) x +#else +# define MMPTR(x) (*((volatile unsigned int *)(x))) +#endif + +#endif /* __ARCH_MISOC_SRC_COMMON_HW_COMMON_H */ diff --git a/arch/misoc/src/common/hw/ethmac_mem.h b/arch/misoc/src/common/hw/ethmac_mem.h new file mode 100644 index 00000000000..61964809126 --- /dev/null +++ b/arch/misoc/src/common/hw/ethmac_mem.h @@ -0,0 +1,54 @@ +/**************************************************************************** + * arch/misoc/src/common/hw/emac_mem.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_SRC_COMMON_HW_EMAC_MEM_H +#define __ARCH_MISOC_SRC_COMMON_HW_EMAC_MEM_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ETHMAC_RX0_BASE ETHMAC_BASE +#define ETHMAC_RX1_BASE (ETHMAC_BASE+0x0800) +#define ETHMAC_TX0_BASE (ETHMAC_BASE+0x1000) +#define ETHMAC_TX1_BASE (ETHMAC_BASE+0x1800) + +#endif /* __ARCH_MISOC_SRC_COMMON_HW_EMAC_MEM_H */ diff --git a/arch/misoc/src/common/hw/flags.h b/arch/misoc/src/common/hw/flags.h new file mode 100644 index 00000000000..7ed2f4bf427 --- /dev/null +++ b/arch/misoc/src/common/hw/flags.h @@ -0,0 +1,79 @@ +/**************************************************************************** + * arch/misoc/src/common/hw/emac_mem.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_SRC_COMMON_HW_FLAGS_H +#define __ARCH_MISOC_SRC_COMMON_HW_FLAGS_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define UART_EV_TX 0x1 +#define UART_EV_RX 0x2 + +#define DFII_CONTROL_SEL 0x01 +#define DFII_CONTROL_CKE 0x02 +#define DFII_CONTROL_ODT 0x04 +#define DFII_CONTROL_RESET_N 0x08 + +#define DFII_COMMAND_CS 0x01 +#define DFII_COMMAND_WE 0x02 +#define DFII_COMMAND_CAS 0x04 +#define DFII_COMMAND_RAS 0x08 +#define DFII_COMMAND_WRDATA 0x10 +#define DFII_COMMAND_RDDATA 0x20 + +#define ETHMAC_EV_SRAM_WRITER 0x1 +#define ETHMAC_EV_SRAM_READER 0x1 + +#define CLKGEN_STATUS_BUSY 0x1 +#define CLKGEN_STATUS_PROGDONE 0x2 +#define CLKGEN_STATUS_LOCKED 0x4 + +#define DVISAMPLER_TOO_LATE 0x1 +#define DVISAMPLER_TOO_EARLY 0x2 + +#define DVISAMPLER_DELAY_MASTER_CAL 0x01 +#define DVISAMPLER_DELAY_MASTER_RST 0x02 +#define DVISAMPLER_DELAY_SLAVE_CAL 0x04 +#define DVISAMPLER_DELAY_SLAVE_RST 0x08 +#define DVISAMPLER_DELAY_INC 0x10 +#define DVISAMPLER_DELAY_DEC 0x20 + +#define DVISAMPLER_SLOT_EMPTY 0 +#define DVISAMPLER_SLOT_LOADED 1 +#define DVISAMPLER_SLOT_PENDING 2 + +#endif /* __ARCH_MISOC_SRC_COMMON_HW_FLAGS_H */ diff --git a/arch/misoc/src/common/misoc_isr.c b/arch/misoc/src/common/misoc_isr.c deleted file mode 100644 index 96c726b17c2..00000000000 --- a/arch/misoc/src/common/misoc_isr.c +++ /dev/null @@ -1,20 +0,0 @@ -#include - -void uart_isr(); -void uart_isr() -{ - -} - -void isr(void); -void isr(void) -{ - unsigned int irqs; - - irqs = irq_pending() & irq_getmask(); - - if (irqs & (1 << UART_INTERRUPT)) - { - uart_isr(); - } -} diff --git a/arch/misoc/src/common/misoc_uart.c b/arch/misoc/src/common/misoc_uart.c index 7a36e78199c..77410f5071d 100644 --- a/arch/misoc/src/common/misoc_uart.c +++ b/arch/misoc/src/common/misoc_uart.c @@ -1,3 +1,42 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_uart.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + #include #include #include @@ -20,11 +59,15 @@ #include #include "hw/flags.h" -#include "misoc_irqasm.h" +#include "chip.h" #include "misoc_uart.h" #include "lm32.h" +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + /* Buffer sizes must be a power of 2 so that modulos can be computed * with logical AND. */ @@ -32,91 +75,140 @@ #define UART_RINGBUFFER_SIZE_RX 128 #define UART_RINGBUFFER_MASK_RX (UART_RINGBUFFER_SIZE_RX-1) +#define UART_RINGBUFFER_SIZE_TX 128 +#define UART_RINGBUFFER_MASK_TX (UART_RINGBUFFER_SIZE_TX-1) + +/**************************************************************************** + * Private Data + ****************************************************************************/ + static char rx_buf[UART_RINGBUFFER_SIZE_RX]; static volatile unsigned int rx_produce; static unsigned int rx_consume; -#define UART_RINGBUFFER_SIZE_TX 128 -#define UART_RINGBUFFER_MASK_TX (UART_RINGBUFFER_SIZE_TX-1) - static char tx_buf[UART_RINGBUFFER_SIZE_TX]; static unsigned int tx_produce; static volatile unsigned int tx_consume; -static int uart_interrupt(int irq, void *context); - +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: uart_interrupt + ****************************************************************************/ + static int uart_interrupt(int irq, void *context) { unsigned int stat, rx_produce_next; stat = uart_ev_pending_read(); - if(stat & UART_EV_RX) { - while(!uart_rxempty_read()) { - rx_produce_next = (rx_produce + 1) & UART_RINGBUFFER_MASK_RX; - if(rx_produce_next != rx_consume) { - rx_buf[rx_produce] = uart_rxtx_read(); - rx_produce = rx_produce_next; - } - uart_ev_pending_write(UART_EV_RX); - } - } + if ((stat & UART_EV_RX) != 0) + { + while (!uart_rxempty_read()) + { + rx_produce_next = (rx_produce + 1) & UART_RINGBUFFER_MASK_RX; + if (rx_produce_next != rx_consume) + { + rx_buf[rx_produce] = uart_rxtx_read(); + rx_produce = rx_produce_next; + } - if(stat & UART_EV_TX) { - uart_ev_pending_write(UART_EV_TX); - while((tx_consume != tx_produce) && !uart_txfull_read()) { - uart_rxtx_write(tx_buf[tx_consume]); - tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX; + uart_ev_pending_write(UART_EV_RX); + } + } + + if ((stat & UART_EV_TX) != 0) + { + uart_ev_pending_write(UART_EV_TX); + while ((tx_consume != tx_produce) && !uart_txfull_read()) + { + uart_rxtx_write(tx_buf[tx_consume]); + tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX; + } } - } return OK; } -/* Do not use in interrupt handlers! */ +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: uart_read + * + * Do not use in interrupt handlers! + * + ****************************************************************************/ + char uart_read(void) { char c; - if(irq_getie()) { - while(rx_consume == rx_produce); - } else if (rx_consume == rx_produce) { - return 0; - } + if (irq_getie()) + { + while (rx_consume == rx_produce); + } + else if (rx_consume == rx_produce) + { + return 0; + } c = rx_buf[rx_consume]; rx_consume = (rx_consume + 1) & UART_RINGBUFFER_MASK_RX; return c; } +/**************************************************************************** + * Name: uart_read_nonblock + ****************************************************************************/ + int uart_read_nonblock(void) { return (rx_consume != rx_produce); } +/**************************************************************************** + * Name: up_putc + ****************************************************************************/ + int up_putc(int ch) { unsigned int oldmask; unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX; - if(irq_getie()) { - while(tx_produce_next == tx_consume); - } else if(tx_produce_next == tx_consume) { - return ch; - } + if (irq_getie()) + { + while (tx_produce_next == tx_consume); + } + else if (tx_produce_next == tx_consume) + { + return ch; + } oldmask = irq_getmask(); irq_setmask(oldmask & ~(1 << UART_INTERRUPT)); - if((tx_consume != tx_produce) || uart_txfull_read()) { - tx_buf[tx_produce] = ch; - tx_produce = tx_produce_next; - } else { - uart_rxtx_write(ch); - } + + if ((tx_consume != tx_produce) || uart_txfull_read()) + { + tx_buf[tx_produce] = ch; + tx_produce = tx_produce_next; + } + else + { + uart_rxtx_write(ch); + } + irq_setmask(oldmask); return ch; } +/**************************************************************************** + * Name: uart_init + ****************************************************************************/ + void uart_init(void) { rx_produce = 0; @@ -132,10 +224,11 @@ void uart_init(void) irq_attach(1 << UART_INTERRUPT, uart_interrupt); } +/**************************************************************************** + * Name: uart_sync + ****************************************************************************/ + void uart_sync(void) { - while(tx_consume != tx_produce); + while (tx_consume != tx_produce); } - - - diff --git a/arch/misoc/src/common/misoc_uart.h b/arch/misoc/src/common/misoc_uart.h new file mode 100644 index 00000000000..74fcc7c0acf --- /dev/null +++ b/arch/misoc/src/common/misoc_uart.h @@ -0,0 +1,60 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_uart.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_SRC_COMMON_MISOC_UART_H +#define __ARCH_MISOC_SRC_COMMON_MISOC_UART_H 1 + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +extern "C" +{ +#endif + +void uart_init(void); +void uart_isr(void); +void uart_sync(void); + +void uart_write(char c); +char uart_read(void); +int uart_read_nonblock(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __ARCH_MISOC_SRC_COMMON_MISOC_UART_H */ diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs index 1c12e0c5270..1a0ce75de24 100644 --- a/arch/misoc/src/lm32/Make.defs +++ b/arch/misoc/src/lm32/Make.defs @@ -45,5 +45,5 @@ CHIP_CSRCS = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_doirq.c lm32_dumpstate.c CHIP_CSRCS += lm32_dumpstate.c lm32_exit.c lm32_idle.c lm32_initialize.c CHIP_CSRCS += lm32_initialstate.c lm32_interruptcontext.c lm32_irq.c -CHIP_CSRCS += lm32_releasepending.c lm32_releasestack.c lm32_stackframe.c -CHIP_CSRCS += lm32_swint.c lm32_unblocktask.c +CHIP_CSRCS += lm32_isr.c lm32_releasepending.c lm32_releasestack.c +CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c diff --git a/arch/misoc/src/lm32/chip.h b/arch/misoc/src/lm32/chip.h new file mode 100644 index 00000000000..0683bd5a282 --- /dev/null +++ b/arch/misoc/src/lm32/chip.h @@ -0,0 +1,92 @@ +/**************************************************************************** + * arch/misoc/src/lm32/chip.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_SRC_LM32_CHIP_H +#define __ARCH_MISOC_SRC_LM32_CHIP_H 1 + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#ifdef __cplusplus +extern "C" +{ +#endif + +static inline unsigned int irq_getie(void) +{ + unsigned int ie; + __asm__ __volatile__("rcsr %0, IE" : "=r" (ie)); + return ie; +} + +static inline void irq_setie(unsigned int ie) +{ + __asm__ __volatile__("wcsr IE, %0" : : "r" (ie)); +} + +static inline unsigned int irq_getmask(void) +{ + + unsigned int mask; + __asm__ __volatile__("rcsr %0, IM" : "=r" (mask)); + return mask; +} + +static inline void irq_setmask(unsigned int mask) +{ + __asm__ __volatile__("wcsr IM, %0" : : "r" (mask)); +} + +static inline unsigned int irq_pending(void) +{ + + unsigned int pending; + __asm__ __volatile__("rcsr %0, IP" : "=r" (pending)); + return pending; +} + +#ifdef __cplusplus +} +#endif + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +void uart_isr(void); +void isr(void); + +#endif /* __ARCH_MISOC_SRC_LM32_CHIP_H */ diff --git a/arch/misoc/src/lm32/lm32_irq.c b/arch/misoc/src/lm32/lm32_irq.c index b99bb443b43..2e01b511fd1 100644 --- a/arch/misoc/src/lm32/lm32_irq.c +++ b/arch/misoc/src/lm32/lm32_irq.c @@ -46,7 +46,7 @@ #include #include -#include "misoc_irqasm.h" +#include "chip_irqasm.h" #include "lm32.h" /**************************************************************************** diff --git a/arch/misoc/src/lm32/lm32_isr.c b/arch/misoc/src/lm32/lm32_isr.c new file mode 100644 index 00000000000..539614d3179 --- /dev/null +++ b/arch/misoc/src/lm32/lm32_isr.c @@ -0,0 +1,61 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_isr.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include "chip_irqasm.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +void uart_isr() +{ +} + +void isr(void) +{ + unsigned int irqs; + + irqs = irq_pending() & irq_getmask(); + + if (irqs & (1 << UART_INTERRUPT)) + { + uart_isr(); + } +} From 1787a8143ee405ca0b64b7e6f9466893d388036e Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 1 Nov 2016 14:18:21 -0600 Subject: [PATCH 07/32] Misoc: Logic on common directory should not include ANY lm32 specific header file. The generic header file chip.h can be exported by all architectures and that is what should be included instead of lm32.h which is an inappropriate dependency. --- arch/misoc/src/common/misoc_uart.c | 3 +-- arch/misoc/src/lm32/chip.h | 6 ++++++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/misoc/src/common/misoc_uart.c b/arch/misoc/src/common/misoc_uart.c index 77410f5071d..76cdd487034 100644 --- a/arch/misoc/src/common/misoc_uart.c +++ b/arch/misoc/src/common/misoc_uart.c @@ -59,10 +59,9 @@ #include #include "hw/flags.h" -#include "chip.h" #include "misoc_uart.h" -#include "lm32.h" +#include "chip.h" /**************************************************************************** * Pre-processor Definitions diff --git a/arch/misoc/src/lm32/chip.h b/arch/misoc/src/lm32/chip.h index 0683bd5a282..bdb8823c5a2 100644 --- a/arch/misoc/src/lm32/chip.h +++ b/arch/misoc/src/lm32/chip.h @@ -36,6 +36,12 @@ #ifndef __ARCH_MISOC_SRC_LM32_CHIP_H #define __ARCH_MISOC_SRC_LM32_CHIP_H 1 +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +#include "lm32.h" + /**************************************************************************** * Inline Functions ****************************************************************************/ From 19f5a5f49de34dd62f22e5114d2b783d2ef9837b Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Tue, 1 Nov 2016 16:14:18 -0600 Subject: [PATCH 08/32] MISOC LM32: configs/misoc board support for testing --- configs/misoc/Kconfig | 4 + configs/misoc/hello/Make.defs | 101 +++ configs/misoc/hello/defconfig | 609 ++++++++++++++++++ configs/misoc/hello/setenv.sh | 64 ++ configs/misoc/include/board.h | 100 +++ configs/misoc/include/generated/common.h | 49 ++ configs/misoc/include/generated/csr.h | 397 ++++++++++++ configs/misoc/include/generated/mem.h | 52 ++ .../misoc/include/generated/output_format.ld | 1 + configs/misoc/include/generated/regions.ld | 6 + configs/misoc/include/generated/sdram_phy.h | 144 +++++ configs/misoc/include/generated/variables.mak | 11 + configs/misoc/scripts/ld.script | 106 +++ configs/misoc/src/.gitignore | 2 + configs/misoc/src/Makefile | 42 ++ configs/misoc/src/lm32_boot.c | 68 ++ configs/misoc/src/misoc.h | 102 +++ 17 files changed, 1858 insertions(+) create mode 100644 configs/misoc/Kconfig create mode 100644 configs/misoc/hello/Make.defs create mode 100644 configs/misoc/hello/defconfig create mode 100644 configs/misoc/hello/setenv.sh create mode 100644 configs/misoc/include/board.h create mode 100644 configs/misoc/include/generated/common.h create mode 100644 configs/misoc/include/generated/csr.h create mode 100644 configs/misoc/include/generated/mem.h create mode 100644 configs/misoc/include/generated/output_format.ld create mode 100644 configs/misoc/include/generated/regions.ld create mode 100644 configs/misoc/include/generated/sdram_phy.h create mode 100644 configs/misoc/include/generated/variables.mak create mode 100644 configs/misoc/scripts/ld.script create mode 100644 configs/misoc/src/.gitignore create mode 100644 configs/misoc/src/Makefile create mode 100644 configs/misoc/src/lm32_boot.c create mode 100644 configs/misoc/src/misoc.h diff --git a/configs/misoc/Kconfig b/configs/misoc/Kconfig new file mode 100644 index 00000000000..f72f3c094ce --- /dev/null +++ b/configs/misoc/Kconfig @@ -0,0 +1,4 @@ +# +# For a description of the syntax of this configuration file, +# see the file kconfig-language.txt in the NuttX tools repository. +# diff --git a/configs/misoc/hello/Make.defs b/configs/misoc/hello/Make.defs new file mode 100644 index 00000000000..b6124b77593 --- /dev/null +++ b/configs/misoc/hello/Make.defs @@ -0,0 +1,101 @@ +############################################################################ +# configs/misoc/hello/Make.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Ramtin Amin +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +include ${TOPDIR}/.config +include ${TOPDIR}/tools/Config.mk +CROSSDEV = lm32-elf- + +LDSCRIPT = ld.script + +ifeq ($(WINTOOL),y) + # Windows-native toolchains + DIRLINK = $(TOPDIR)/tools/copydir.sh + DIRUNLINK = $(TOPDIR)/tools/unlink.sh + MKDEP = $(TOPDIR)/tools/mkwindeps.sh + ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" + ARCHXXINCLUDES = $(ARCHINCLUDES) "${shell cygpath -w $(TOPDIR)/include/cxx}" + ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}" +else + # Linux/Cygwin-native toolchain + MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT) + ARCHINCLUDES = -I. -isystem "$(TOPDIR)/include" + ARCHXXINCLUDES = $(ARCHINCLUDES) -isystem "$(TOPDIR)/include/cxx" + ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD_CUSTOM_NAME)/scripts/$(LDSCRIPT) +endif + +CC = $(CROSSDEV)gcc +CXX = $(CROSSDEV)g++ +CPP = $(CROSSDEV)gcc -E +LD = $(CROSSDEV)ld +AR = $(CROSSDEV)ar rcs +NM = $(CROSSDEV)nm +OBJCOPY = $(CROSSDEV)objcopy +OBJDUMP = $(CROSSDEV)objdump + +ifeq ($(CONFIG_DEBUG_SYMBOLS),y) + ARCHOPTIMIZATION = -g +endif + +ifneq ($(CONFIG_DEBUG_NOOPT),y) + ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer +endif + +ARCHCFLAGS = -fno-builtin +ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new +ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef +ARCHWARNINGSXX = -Wall -Wshadow -Wundef +ARCHDEFINES = + +CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe +CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS) +CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) +AFLAGS = $(CFLAGS) -D__ASSEMBLY__ + +NXFLATLDFLAGS1 = -r -d -warn-common +NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections +LDNXFLATFLAGS = -e main -s 2048 + +ASMEXT = .S +OBJEXT = .o +LIBEXT = .a +EXEEXT = + + +HOSTCC = gcc +HOSTINCLUDES = -I. +HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe +HOSTLDFLAGS = diff --git a/configs/misoc/hello/defconfig b/configs/misoc/hello/defconfig new file mode 100644 index 00000000000..99c0c9ef2ce --- /dev/null +++ b/configs/misoc/hello/defconfig @@ -0,0 +1,609 @@ +# +# Automatically generated file; DO NOT EDIT. +# Nuttx/ Configuration +# + +# +# Build Setup +# +# CONFIG_EXPERIMENTAL is not set +CONFIG_DEFAULT_SMALL=y +CONFIG_HOST_LINUX=y +# CONFIG_HOST_OSX is not set +# CONFIG_HOST_WINDOWS is not set +# CONFIG_HOST_OTHER is not set + +# +# Build Configuration +# +# CONFIG_APPS_DIR="../apps" +CONFIG_BUILD_FLAT=y +# CONFIG_BUILD_2PASS is not set + +# +# Binary Output Formats +# +# CONFIG_RRLOAD_BINARY is not set +# CONFIG_INTELHEX_BINARY is not set +# CONFIG_MOTOROLA_SREC is not set +CONFIG_RAW_BINARY=y +# CONFIG_UBOOT_UIMAGE is not set + +# +# Customize Header Files +# +# CONFIG_ARCH_STDINT_H is not set +# CONFIG_ARCH_STDBOOL_H is not set +# CONFIG_ARCH_MATH_H is not set +# CONFIG_ARCH_FLOAT_H is not set +# CONFIG_ARCH_STDARG_H is not set +# CONFIG_ARCH_DEBUG_H is not set + +# +# Debug Options +# +CONFIG_DEBUG_ALERT=y +CONFIG_DEBUG_FEATURES=y + +# +# Debug SYSLOG Output Controls +# +# CONFIG_DEBUG_ERROR is not set +# CONFIG_DEBUG_ASSERTIONS is not set + +# +# Subsystem Debug Options +# +# CONFIG_DEBUG_BINFMT is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_GRAPHICS is not set +# CONFIG_DEBUG_LIB is not set +# CONFIG_DEBUG_MM is not set +# CONFIG_DEBUG_SCHED is not set + +# +# OS Function Debug Options +# +# CONFIG_DEBUG_IRQ is not set + +# +# Driver Debug Options +# +# CONFIG_DEBUG_GPIO is not set +# CONFIG_DEBUG_TIMER is not set +# CONFIG_ARCH_HAVE_STACKCHECK is not set +# CONFIG_ARCH_HAVE_HEAPCHECK is not set +CONFIG_DEBUG_SYMBOLS=y +# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_FULLOPT is not set + +# +# System Type +# +# CONFIG_ARCH_ARM is not set +# CONFIG_ARCH_AVR is not set +# CONFIG_ARCH_HC is not set +# CONFIG_ARCH_MIPS is not set +CONFIG_ARCH_MISOC=y +# CONFIG_ARCH_RGMP is not set +# CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_SIM is not set +# CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_Z16 is not set +# CONFIG_ARCH_Z80 is not set +CONFIG_ARCH="misoc" +CONFIG_ARCH_CHIP="lm32" +CONFIG_ARCH_CHIP_LM32=y +# CONFIG_ARCH_CHIP_MOR1K is not set + +# +# Architecture Options +# +# CONFIG_ARCH_NOINTC is not set +# CONFIG_ARCH_VECNOTIRQ is not set +# CONFIG_ARCH_DMA is not set +# CONFIG_ARCH_HAVE_IRQPRIO is not set +# CONFIG_ARCH_L2CACHE is not set +# CONFIG_ARCH_HAVE_COHERENT_DCACHE is not set +# CONFIG_ARCH_HAVE_ADDRENV is not set +# CONFIG_ARCH_NEED_ADDRENV_MAPPING is not set +# CONFIG_ARCH_HAVE_MULTICPU is not set +# CONFIG_ARCH_HAVE_VFORK is not set +# CONFIG_ARCH_HAVE_MMU is not set +# CONFIG_ARCH_HAVE_MPU is not set +# CONFIG_ARCH_NAND_HWECC is not set +# CONFIG_ARCH_HAVE_EXTCLK is not set +# CONFIG_ARCH_HAVE_POWEROFF is not set +# CONFIG_ARCH_HAVE_RESET is not set +CONFIG_ARCH_STACKDUMP=y +# CONFIG_ENDIAN_BIG is not set +# CONFIG_ARCH_IDLE_CUSTOM is not set +# CONFIG_ARCH_HAVE_RAMFUNCS is not set +# CONFIG_ARCH_HAVE_RAMVECTORS is not set + +# +# Board Settings +# +CONFIG_BOARD_LOOPSPERMSEC=800 +# CONFIG_ARCH_CALIBRATION is not set + +# +# Interrupt options +# +# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +# CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set + +# +# Boot options +# +# CONFIG_BOOT_RUNFROMEXTSRAM is not set +CONFIG_BOOT_RUNFROMFLASH=y +# CONFIG_BOOT_RUNFROMISRAM is not set +# CONFIG_BOOT_RUNFROMSDRAM is not set +# CONFIG_BOOT_COPYTORAM is not set + +# +# Boot Memory Configuration +# +CONFIG_RAM_START=0x40000000 +CONFIG_RAM_SIZE=524288 +# CONFIG_ARCH_HAVE_SDRAM is not set + +# +# Board Selection +# +CONFIG_ARCH_BOARD_CUSTOM=y + +# +# Custom Board Configuration +# +CONFIG_ARCH_BOARD_CUSTOM_NAME="misoc" +CONFIG_ARCH_BOARD_CUSTOM_DIR="/configs/misoc/" +CONFIG_ARCH_BOARD_CUSTOM_DIR_RELPATH=y +# CONFIG_BOARD_CUSTOM_LEDS is not set +# CONFIG_BOARD_CUSTOM_BUTTONS is not set + +# +# Common Board Options +# + +# +# Board-Specific Options +# +# CONFIG_BOARD_CRASHDUMP is not set +# CONFIG_LIB_BOARDCTL is not set + +# +# RTOS Features +# +CONFIG_DISABLE_OS_API=y +CONFIG_DISABLE_POSIX_TIMERS=y +CONFIG_DISABLE_PTHREAD=y +CONFIG_DISABLE_SIGNALS=y +CONFIG_DISABLE_MQUEUE=y +CONFIG_DISABLE_ENVIRON=y + +# +# Clocks and Timers +# +CONFIG_USEC_PER_TICK=10000 +# CONFIG_SYSTEM_TIME64 is not set +# CONFIG_CLOCK_MONOTONIC is not set +# CONFIG_ARCH_HAVE_TIMEKEEPING is not set +# CONFIG_JULIAN_TIME is not set +CONFIG_START_YEAR=2011 +CONFIG_START_MONTH=6 +CONFIG_START_DAY=16 +CONFIG_MAX_WDOGPARMS=2 +CONFIG_PREALLOC_WDOGS=4 +CONFIG_WDOG_INTRESERVE=0 +CONFIG_PREALLOC_TIMERS=0 + +# +# Tasks and Scheduling +# +# CONFIG_INIT_NONE is not set +CONFIG_INIT_ENTRYPOINT=y +# CONFIG_INIT_FILEPATH is not set +CONFIG_USER_ENTRYPOINT="hello_main" +CONFIG_RR_INTERVAL=0 +# CONFIG_SCHED_SPORADIC is not set +CONFIG_TASK_NAME_SIZE=0 +CONFIG_MAX_TASKS=4 +# CONFIG_SCHED_HAVE_PARENT is not set +# CONFIG_SCHED_WAITPID is not set + +# +# Performance Monitoring +# +# CONFIG_SCHED_CPULOAD is not set +# CONFIG_SCHED_INSTRUMENTATION is not set + +# +# Files and I/O +# +CONFIG_DEV_CONSOLE=y +# CONFIG_FDCLONE_DISABLE is not set +# CONFIG_FDCLONE_STDIO is not set +CONFIG_SDCLONE_DISABLE=y +CONFIG_NFILE_DESCRIPTORS=4 +CONFIG_NFILE_STREAMS=4 +CONFIG_NAME_MAX=32 +# CONFIG_PRIORITY_INHERITANCE is not set + +# +# RTOS hooks +# +# CONFIG_BOARD_INITIALIZE is not set +# CONFIG_SCHED_STARTHOOK is not set +# CONFIG_SCHED_ATEXIT is not set +# CONFIG_SCHED_ONEXIT is not set +# CONFIG_MODULE is not set + +# +# Work queue support +# + +# +# Stack and heap information +# +CONFIG_IDLETHREAD_STACKSIZE=512 +CONFIG_USERMAIN_STACKSIZE=512 +CONFIG_PTHREAD_STACK_MIN=256 +CONFIG_PTHREAD_STACK_DEFAULT=1024 +# CONFIG_LIB_SYSCALL is not set + +# +# Device Drivers +# +CONFIG_DISABLE_POLL=y +CONFIG_DEV_NULL=y +# CONFIG_DEV_ZERO is not set +# CONFIG_DEV_URANDOM is not set +# CONFIG_DEV_LOOP is not set + +# +# Buffering +# +# CONFIG_DRVR_WRITEBUFFER is not set +# CONFIG_DRVR_READAHEAD is not set +# CONFIG_RAMDISK is not set +# CONFIG_CAN is not set +# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set +# CONFIG_ARCH_HAVE_PWM_MULTICHAN is not set +# CONFIG_PWM is not set +# CONFIG_ARCH_HAVE_I2CRESET is not set +# CONFIG_I2C is not set +# CONFIG_SPI is not set +# CONFIG_I2S is not set + +# +# Timer Driver Support +# +# CONFIG_TIMER is not set +# CONFIG_ONESHOT is not set +# CONFIG_RTC is not set +# CONFIG_WATCHDOG is not set +# CONFIG_ANALOG is not set +# CONFIG_AUDIO_DEVICES is not set +# CONFIG_VIDEO_DEVICES is not set +# CONFIG_BCH is not set +# CONFIG_INPUT is not set + +# +# IO Expander/GPIO Support +# +# CONFIG_IOEXPANDER is not set +# CONFIG_DEV_GPIO is not set + +# +# LCD Driver Support +# +# CONFIG_LCD is not set +# CONFIG_SLCD is not set + +# +# LED Support +# +# CONFIG_RGBLED is not set +# CONFIG_PCA9635PW is not set +# CONFIG_NCP5623C is not set +# CONFIG_MMCSD is not set +# CONFIG_MODEM is not set +# CONFIG_MTD is not set +# CONFIG_EEPROM is not set +# CONFIG_PIPES is not set +# CONFIG_PM is not set +# CONFIG_POWER is not set +# CONFIG_SENSORS is not set +# CONFIG_SERCOMM_CONSOLE is not set +CONFIG_SERIAL=y +CONFIG_DEV_LOWCONSOLE=y +# CONFIG_SERIAL_REMOVABLE is not set +# CONFIG_SERIAL_CONSOLE is not set +# CONFIG_16550_UART is not set +# CONFIG_UART_SERIALDRIVER is not set +# CONFIG_UART0_SERIALDRIVER is not set +# CONFIG_UART1_SERIALDRIVER is not set +# CONFIG_UART2_SERIALDRIVER is not set +# CONFIG_UART3_SERIALDRIVER is not set +# CONFIG_UART4_SERIALDRIVER is not set +# CONFIG_UART5_SERIALDRIVER is not set +# CONFIG_UART6_SERIALDRIVER is not set +# CONFIG_UART7_SERIALDRIVER is not set +# CONFIG_UART8_SERIALDRIVER is not set +# CONFIG_SCI0_SERIALDRIVER is not set +# CONFIG_SCI1_SERIALDRIVER is not set +# CONFIG_USART0_SERIALDRIVER is not set +# CONFIG_USART1_SERIALDRIVER is not set +# CONFIG_USART2_SERIALDRIVER is not set +# CONFIG_USART3_SERIALDRIVER is not set +# CONFIG_USART4_SERIALDRIVER is not set +# CONFIG_USART5_SERIALDRIVER is not set +# CONFIG_USART6_SERIALDRIVER is not set +# CONFIG_USART7_SERIALDRIVER is not set +# CONFIG_USART8_SERIALDRIVER is not set +# CONFIG_OTHER_UART_SERIALDRIVER is not set +# CONFIG_MCU_SERIAL is not set +# CONFIG_SERIAL_IFLOWCONTROL is not set +# CONFIG_SERIAL_OFLOWCONTROL is not set +# CONFIG_SERIAL_DMA is not set +# CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +# CONFIG_PSEUDOTERM is not set +# CONFIG_USBDEV is not set +# CONFIG_USBHOST is not set +# CONFIG_HAVE_USBTRACE is not set +# CONFIG_DRIVERS_WIRELESS is not set +# CONFIG_DRIVERS_CONTACTLESS is not set + +# +# System Logging +# +# CONFIG_ARCH_SYSLOG is not set +# CONFIG_RAMLOG is not set +# CONFIG_SYSLOG_INTBUFFER is not set +# CONFIG_SYSLOG_TIMESTAMP is not set +# CONFIG_SYSLOG_SERIAL_CONSOLE is not set +# CONFIG_SYSLOG_CHAR is not set +CONFIG_SYSLOG_CONSOLE=y +# CONFIG_SYSLOG_NONE is not set +# CONFIG_SYSLOG_FILE is not set +# CONFIG_SYSLOG_CHARDEV is not set + +# +# Networking Support +# +# CONFIG_ARCH_HAVE_NET is not set +# CONFIG_ARCH_HAVE_PHY is not set +# CONFIG_NET is not set + +# +# Crypto API +# +# CONFIG_CRYPTO is not set + +# +# File Systems +# + +# +# File system configuration +# +CONFIG_DISABLE_MOUNTPOINT=y +CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y +# CONFIG_FS_READABLE is not set +# CONFIG_FS_WRITABLE is not set +# CONFIG_FS_NAMED_SEMAPHORES is not set +# CONFIG_FS_RAMMAP is not set +# CONFIG_FS_PROCFS is not set +# CONFIG_FS_UNIONFS is not set + +# +# Graphics Support +# +# CONFIG_NX is not set + +# +# Memory Management +# +CONFIG_MM_SMALL=y +CONFIG_MM_REGIONS=1 +# CONFIG_ARCH_HAVE_HEAP2 is not set +# CONFIG_GRAN is not set + +# +# Audio Support +# +# CONFIG_AUDIO is not set + +# +# Wireless Support +# + +# +# Binary Loader +# +# CONFIG_BINFMT_DISABLE is not set +# CONFIG_NXFLAT is not set +# CONFIG_ELF is not set +# CONFIG_BUILTIN is not set +# CONFIG_PIC is not set +# CONFIG_SYMTAB_ORDEREDBYNAME is not set + +# +# Library Routines +# + +# +# Standard C Library Options +# +CONFIG_STDIO_BUFFER_SIZE=0 +CONFIG_STDIO_LINEBUFFER=y +CONFIG_NUNGET_CHARS=0 +# CONFIG_LIBM is not set +# CONFIG_NOPRINTF_FIELDWIDTH is not set +# CONFIG_LIBC_FLOATINGPOINT is not set +# CONFIG_LIBC_LONG_LONG is not set +# CONFIG_LIBC_IOCTL_VARIADIC is not set +CONFIG_LIB_RAND_ORDER=1 +# CONFIG_EOL_IS_CR is not set +# CONFIG_EOL_IS_LF is not set +# CONFIG_EOL_IS_BOTH_CRLF is not set +CONFIG_EOL_IS_EITHER_CRLF=y +# CONFIG_LIBC_EXECFUNCS is not set +CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024 +CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048 +# CONFIG_LIBC_STRERROR is not set +# CONFIG_LIBC_PERROR_STDOUT is not set +CONFIG_ARCH_LOWPUTC=y +# CONFIG_TIME_EXTENDED is not set +CONFIG_LIB_SENDFILE_BUFSIZE=512 +# CONFIG_ARCH_ROMGETC is not set +# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set +# CONFIG_ARCH_HAVE_TLS is not set +# CONFIG_LIBC_NETDB is not set + +# +# Non-standard Library Support +# +# CONFIG_LIB_CRC64_FAST is not set +# CONFIG_LIB_KBDCODEC is not set +# CONFIG_LIB_SLCDCODEC is not set +# CONFIG_LIB_HEX2BIN is not set + +# +# Basic CXX Support +# +# CONFIG_C99_BOOL8 is not set +# CONFIG_HAVE_CXX is not set + +# +# Application Configuration +# + +# +# CAN Utilities +# + +# +# Examples +# +# CONFIG_EXAMPLES_CHAT is not set +# CONFIG_EXAMPLES_CONFIGDATA is not set +# CONFIG_EXAMPLES_DHCPD is not set +# CONFIG_EXAMPLES_ELF is not set +# CONFIG_EXAMPLES_FTPC is not set +# CONFIG_EXAMPLES_FTPD is not set +CONFIG_EXAMPLES_HELLO=y +CONFIG_EXAMPLES_HELLO_PRIORITY=100 +CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 +# CONFIG_EXAMPLES_HIDKBD is not set +# CONFIG_EXAMPLES_IGMP is not set +# CONFIG_EXAMPLES_JSON is not set +# CONFIG_EXAMPLES_KEYPADTEST is not set +# CONFIG_EXAMPLES_MEDIA is not set +# CONFIG_EXAMPLES_MM is not set +# CONFIG_EXAMPLES_MODBUS is not set +# CONFIG_EXAMPLES_MOUNT is not set +# CONFIG_EXAMPLES_NRF24L01TERM is not set +# CONFIG_EXAMPLES_NSH is not set +# CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NXFFS is not set +# CONFIG_EXAMPLES_NXHELLO is not set +# CONFIG_EXAMPLES_NXIMAGE is not set +# CONFIG_EXAMPLES_NX is not set +# CONFIG_EXAMPLES_NXLINES is not set +# CONFIG_EXAMPLES_NXTERM is not set +# CONFIG_EXAMPLES_NXTEXT is not set +# CONFIG_EXAMPLES_OSTEST is not set +# CONFIG_EXAMPLES_PCA9635 is not set +# CONFIG_EXAMPLES_POSIXSPAWN is not set +# CONFIG_EXAMPLES_PPPD is not set +# CONFIG_EXAMPLES_RFID_READUID is not set +# CONFIG_EXAMPLES_RGBLED is not set +# CONFIG_EXAMPLES_RGMP is not set +# CONFIG_EXAMPLES_SENDMAIL is not set +# CONFIG_EXAMPLES_SERIALBLASTER is not set +# CONFIG_EXAMPLES_SERIALRX is not set +# CONFIG_EXAMPLES_SERLOOP is not set +# CONFIG_EXAMPLES_SLCD is not set +# CONFIG_EXAMPLES_SMART is not set +# CONFIG_EXAMPLES_SMP is not set +# CONFIG_EXAMPLES_TCPECHO is not set +# CONFIG_EXAMPLES_TELNETD is not set +# CONFIG_EXAMPLES_TIFF is not set +# CONFIG_EXAMPLES_TOUCHSCREEN is not set +# CONFIG_EXAMPLES_USBTERM is not set +# CONFIG_EXAMPLES_WATCHDOG is not set +# CONFIG_EXAMPLES_WEBSERVER is not set + +# +# File System Utilities +# +# CONFIG_FSUTILS_INIFILE is not set + +# +# GPS Utilities +# +# CONFIG_GPSUTILS_MINMEA_LIB is not set + +# +# Graphics Support +# +# CONFIG_TIFF is not set +# CONFIG_GRAPHICS_TRAVELER is not set + +# +# Interpreters +# +# CONFIG_INTERPRETERS_FICL is not set +# CONFIG_INTERPRETERS_MICROPYTHON is not set +# CONFIG_INTERPRETERS_MINIBASIC is not set +# CONFIG_INTERPRETERS_PCODE is not set + +# +# FreeModBus +# +# CONFIG_MODBUS is not set + +# +# Network Utilities +# +# CONFIG_NETUTILS_CODECS is not set +# CONFIG_NETUTILS_ESP8266 is not set +# CONFIG_NETUTILS_FTPC is not set +# CONFIG_NETUTILS_JSON is not set +# CONFIG_NETUTILS_SMTP is not set + +# +# NSH Library +# +# CONFIG_NSH_LIBRARY is not set + +# +# NxWidgets/NxWM +# + +# +# Platform-specific Support +# +# CONFIG_PLATFORM_CONFIGDATA is not set + +# +# System Libraries and NSH Add-Ons +# +# CONFIG_SYSTEM_CLE is not set +# CONFIG_SYSTEM_CUTERM is not set +# CONFIG_SYSTEM_FREE is not set +# CONFIG_SYSTEM_HEX2BIN is not set +# CONFIG_SYSTEM_HEXED is not set +# CONFIG_SYSTEM_INSTALL is not set +# CONFIG_SYSTEM_RAMTEST is not set +# CONFIG_READLINE_HAVE_EXTMATCH is not set +# CONFIG_SYSTEM_READLINE is not set +# CONFIG_SYSTEM_SUDOKU is not set +# CONFIG_SYSTEM_TEE is not set +# CONFIG_SYSTEM_UBLOXMODEM is not set +# CONFIG_SYSTEM_VI is not set +# CONFIG_SYSTEM_ZMODEM is not set diff --git a/configs/misoc/hello/setenv.sh b/configs/misoc/hello/setenv.sh new file mode 100644 index 00000000000..c66c8782394 --- /dev/null +++ b/configs/misoc/hello/setenv.sh @@ -0,0 +1,64 @@ +#!/bin/bash +# configs/amber/hello/setenv.sh +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Ramtin Amin +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# + +if [ "$_" = "$0" ] ; then + echo "You must source this script, not run it!" 1>&2 + exit 1 +fi + +WD=`pwd` +if [ ! -x "setenv.sh" ]; then + echo "This script must be executed from the top-level NuttX build directory" + exit 1 +fi + +if [ -z "${PATH_ORIG}" ]; then + export PATH_ORIG="${PATH}" +fi + +# This is the Cygwin path to the location where I installed the WinAVR +# toolchain under windows. This is *not* the default install +# location so you will probably have to edit this. You will also have +# to edit this if you install the Linux AVR toolchain as well +#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" + +# This is the Cygwin path to the location where I build the buildroot +# toolchain. +#export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" + +# Add the path to the toolchain to the PATH varialble +#export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" + +echo "PATH : ${PATH}" diff --git a/configs/misoc/include/board.h b/configs/misoc/include/board.h new file mode 100644 index 00000000000..8db2fcc7cf3 --- /dev/null +++ b/configs/misoc/include/board.h @@ -0,0 +1,100 @@ +/**************************************************************************** + * configs/misoc/include/board.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_AMBER_INCLUDE_BOARD_H +#define __CONFIGS_AMBER_INCLUDE_BOARD_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Clocking *****************************************************************/ +/* Assume default CLKDIV8 fuse setting is overridden to CLKDIV1 */ + +#define BOARD_XTAL_FREQ 14745600 /* 14.7456MHz crystal */ +#define BOARD_CPU_CLOCK BOARD_XTAL_FREQ /* F_CPU = 14.7456MHz */ +#define BOARD_TOSCK_CLOCK 32768 /* TOSC = 32.768KHz */ + +/* LED definitions **********************************************************/ +/* The Amber Web Server has a reset switch and four LEDs. The LEDs indicate + * the status of power, programming state, Ethernet link status and reset + * status (Active). None are available for software use. + */ + +#define LED_STARTED 0 +#define LED_HEAPALLOCATE 1 +#define LED_IRQSENABLED 2 +#define LED_STACKCREATED 3 +#define LED_INIRQ 4 +#define LED_SIGNAL 5 +#define LED_ASSERTION 6 +#define LED_PANIC 7 + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_AMBER_INCLUDE_BOARD_H */ diff --git a/configs/misoc/include/generated/common.h b/configs/misoc/include/generated/common.h new file mode 100644 index 00000000000..38859deefab --- /dev/null +++ b/configs/misoc/include/generated/common.h @@ -0,0 +1,49 @@ +/**************************************************************************** + * configs/misoc/include/generated/common.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_COMMON_H +#define __CONFIGS_MISOC_INCLUDE_GENERATED_COMMON_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#ifdef __ASSEMBLER__ +# define MMPTR(x) x +#else +# define MMPTR(x) (*((volatile unsigned int *)(x))) +#endif + +#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_COMMON_H */ diff --git a/configs/misoc/include/generated/csr.h b/configs/misoc/include/generated/csr.h new file mode 100644 index 00000000000..64bd1915a1a --- /dev/null +++ b/configs/misoc/include/generated/csr.h @@ -0,0 +1,397 @@ +/**************************************************************************** + * configs/misoc/include/generated/csr.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_CSR_H +#define __CONFIGS_MISOC_INCLUDE_GENERATED_CSR_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include "hw/common.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* SDRAM */ + +#define CSR_SDRAM_BASE 0xe0004000 +#define CSR_SDRAM_DFII_CONTROL_ADDR 0xe0004000 +#define CSR_SDRAM_DFII_CONTROL_SIZE 1 + +#define CSR_SDRAM_DFII_PI0_COMMAND_ADDR 0xe0004004 +#define CSR_SDRAM_DFII_PI0_COMMAND_SIZE 1 + +#define CSR_SDRAM_DFII_PI0_COMMAND_ISSUE_ADDR 0xe0004008 +#define CSR_SDRAM_DFII_PI0_COMMAND_ISSUE_SIZE 1 + +#define CSR_SDRAM_DFII_PI0_ADDRESS_ADDR 0xe000400c +#define CSR_SDRAM_DFII_PI0_ADDRESS_SIZE 2 + +#define CSR_SDRAM_DFII_PI0_BADDRESS_ADDR 0xe0004014 +#define CSR_SDRAM_DFII_PI0_BADDRESS_SIZE 1 + +#define CSR_SDRAM_DFII_PI0_WRDATA_ADDR 0xe0004018 +#define CSR_SDRAM_DFII_PI0_WRDATA_SIZE 2 + +#define CSR_SDRAM_DFII_PI0_RDDATA_ADDR 0xe0004020 +#define CSR_SDRAM_DFII_PI0_RDDATA_SIZE 2 + +#define CSR_TIMER0_BASE 0xe0002000 +#define CSR_TIMER0_LOAD_ADDR 0xe0002000 +#define CSR_TIMER0_LOAD_SIZE 4 + +#define CSR_TIMER0_RELOAD_ADDR 0xe0002010 +#define CSR_TIMER0_RELOAD_SIZE 4 + +#define CSR_TIMER0_EN_ADDR 0xe0002020 +#define CSR_TIMER0_EN_SIZE 1 + +#define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002024 +#define CSR_TIMER0_UPDATE_VALUE_SIZE 1 + +#define CSR_TIMER0_VALUE_ADDR 0xe0002028 +#define CSR_TIMER0_VALUE_SIZE 4 + +#define CSR_TIMER0_EV_STATUS_ADDR 0xe0002038 +#define CSR_TIMER0_EV_STATUS_SIZE 1 + +#define CSR_TIMER0_EV_PENDING_ADDR 0xe000203c +#define CSR_TIMER0_EV_PENDING_SIZE 1 + +#define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002040 +#define CSR_TIMER0_EV_ENABLE_SIZE 1 + +#define CSR_UART_TXFULL_ADDR 0xe0001004 +#define CSR_UART_TXFULL_SIZE 1 + +#define CSR_UART_RXEMPTY_ADDR 0xe0001008 +#define CSR_UART_RXEMPTY_SIZE 1 + +#define CSR_UART_EV_STATUS_ADDR 0xe000100c +#define CSR_UART_EV_STATUS_SIZE 1 + +#define CSR_UART_EV_PENDING_ADDR 0xe0001010 +#define CSR_UART_EV_PENDING_SIZE 1 + +#define CSR_UART_EV_ENABLE_ADDR 0xe0001014 +#define CSR_UART_EV_ENABLE_SIZE 1 + +#define CSR_UART_PHY_BASE 0xe0000800 +#define CSR_UART_PHY_TUNING_WORD_ADDR 0xe0000800 +#define CSR_UART_PHY_TUNING_WORD_SIZE 4 + +/* Constants */ + +#define UART_INTERRUPT 0 +#define TIMER0_INTERRUPT 1 +#define SYSTEM_CLOCK_FREQUENCY 80000000 +#define L2_SIZE 8192 + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +static inline unsigned char sdram_dfii_control_read(void) +{ + unsigned char r = MMPTR(0xe0004000); + return r; +} + +static inline void sdram_dfii_control_write(unsigned char value) +{ + MMPTR(0xe0004000) = value; +} + +static inline unsigned char sdram_dfii_pi0_command_read(void) +{ + unsigned char r = MMPTR(0xe0004004); + return r; +} + +static inline void sdram_dfii_pi0_command_write(unsigned char value) +{ + MMPTR(0xe0004004) = value; +} + +static inline unsigned char sdram_dfii_pi0_command_issue_read(void) +{ + unsigned char r = MMPTR(0xe0004008); + return r; +} + +static inline void sdram_dfii_pi0_command_issue_write(unsigned char value) +{ + MMPTR(0xe0004008) = value; +} + +static inline unsigned short int sdram_dfii_pi0_address_read(void) +{ + unsigned short int r = MMPTR(0xe000400c); + r <<= 8; + r |= MMPTR(0xe0004010); + return r; +} + +static inline void sdram_dfii_pi0_address_write(unsigned short int value) +{ + MMPTR(0xe000400c) = value >> 8; + MMPTR(0xe0004010) = value; +} + +static inline unsigned char sdram_dfii_pi0_baddress_read(void) +{ + unsigned char r = MMPTR(0xe0004014); + return r; +} + +static inline void sdram_dfii_pi0_baddress_write(unsigned char value) +{ + MMPTR(0xe0004014) = value; +} + +static inline unsigned short int sdram_dfii_pi0_wrdata_read(void) +{ + unsigned short int r = MMPTR(0xe0004018); + r <<= 8; + r |= MMPTR(0xe000401c); + return r; +} + +static inline void sdram_dfii_pi0_wrdata_write(unsigned short int value) +{ + MMPTR(0xe0004018) = value >> 8; + MMPTR(0xe000401c) = value; +} + +static inline unsigned short int sdram_dfii_pi0_rddata_read(void) +{ + unsigned short int r = MMPTR(0xe0004020); + r <<= 8; + r |= MMPTR(0xe0004024); + return r; +} + +/* Timer0 */ + +static inline unsigned int timer0_load_read(void) +{ + unsigned int r = MMPTR(0xe0002000); + r <<= 8; + r |= MMPTR(0xe0002004); + r <<= 8; + r |= MMPTR(0xe0002008); + r <<= 8; + r |= MMPTR(0xe000200c); + return r; +} + +static inline void timer0_load_write(unsigned int value) +{ + MMPTR(0xe0002000) = value >> 24; + MMPTR(0xe0002004) = value >> 16; + MMPTR(0xe0002008) = value >> 8; + MMPTR(0xe000200c) = value; +} + +static inline unsigned int timer0_reload_read(void) +{ + unsigned int r = MMPTR(0xe0002010); + r <<= 8; + r |= MMPTR(0xe0002014); + r <<= 8; + r |= MMPTR(0xe0002018); + r <<= 8; + r |= MMPTR(0xe000201c); + return r; +} + +static inline void timer0_reload_write(unsigned int value) +{ + MMPTR(0xe0002010) = value >> 24; + MMPTR(0xe0002014) = value >> 16; + MMPTR(0xe0002018) = value >> 8; + MMPTR(0xe000201c) = value; +} + +static inline unsigned char timer0_en_read(void) +{ + unsigned char r = MMPTR(0xe0002020); + return r; +} + +static inline void timer0_en_write(unsigned char value) +{ + MMPTR(0xe0002020) = value; +} + +static inline unsigned char timer0_update_value_read(void) +{ + unsigned char r = MMPTR(0xe0002024); + return r; +} + +static inline void timer0_update_value_write(unsigned char value) +{ + MMPTR(0xe0002024) = value; +} + +static inline unsigned int timer0_value_read(void) +{ + unsigned int r = MMPTR(0xe0002028); + r <<= 8; + r |= MMPTR(0xe000202c); + r <<= 8; + r |= MMPTR(0xe0002030); + r <<= 8; + r |= MMPTR(0xe0002034); + return r; +} + +static inline unsigned char timer0_ev_status_read(void) +{ + unsigned char r = MMPTR(0xe0002038); + return r; +} + +static inline void timer0_ev_status_write(unsigned char value) +{ + MMPTR(0xe0002038) = value; +} + +static inline unsigned char timer0_ev_pending_read(void) +{ + unsigned char r = MMPTR(0xe000203c); + return r; +} + +static inline void timer0_ev_pending_write(unsigned char value) +{ + MMPTR(0xe000203c) = value; +} + +static inline unsigned char timer0_ev_enable_read(void) +{ + unsigned char r = MMPTR(0xe0002040); + return r; +} + +static inline void timer0_ev_enable_write(unsigned char value) +{ + MMPTR(0xe0002040) = value; +} + +/* UART */ + +static inline unsigned char uart_rxtx_read(void) +{ + unsigned char r = MMPTR(0xe0001000); + return r; +} + +static inline void uart_rxtx_write(unsigned char value) +{ + MMPTR(0xe0001000) = value; +} + +static inline unsigned char uart_txfull_read(void) +{ + unsigned char r = MMPTR(0xe0001004); + return r; +} + +static inline unsigned char uart_rxempty_read(void) +{ + unsigned char r = MMPTR(0xe0001008); + return r; +} + +static inline unsigned char uart_ev_status_read(void) +{ + unsigned char r = MMPTR(0xe000100c); + return r; +} + +static inline void uart_ev_status_write(unsigned char value) +{ + MMPTR(0xe000100c) = value; +} + +static inline unsigned char uart_ev_pending_read(void) +{ + unsigned char r = MMPTR(0xe0001010); + return r; +} + +static inline void uart_ev_pending_write(unsigned char value) +{ + MMPTR(0xe0001010) = value; +} + +static inline unsigned char uart_ev_enable_read(void) +{ + unsigned char r = MMPTR(0xe0001014); + return r; +} + +static inline void uart_ev_enable_write(unsigned char value) +{ + MMPTR(0xe0001014) = value; +} + +/* uart_phy */ + +static inline unsigned int uart_phy_tuning_word_read(void) +{ + unsigned int r = MMPTR(0xe0000800); + r <<= 8; + r |= MMPTR(0xe0000804); + r <<= 8; + r |= MMPTR(0xe0000808); + r <<= 8; + r |= MMPTR(0xe000080c); + return r; +} + +static inline void uart_phy_tuning_word_write(unsigned int value) +{ + MMPTR(0xe0000800) = value >> 24; + MMPTR(0xe0000804) = value >> 16; + MMPTR(0xe0000808) = value >> 8; + MMPTR(0xe000080c) = value; +} + +#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_CSR_H */ diff --git a/configs/misoc/include/generated/mem.h b/configs/misoc/include/generated/mem.h new file mode 100644 index 00000000000..dd6b512e91d --- /dev/null +++ b/configs/misoc/include/generated/mem.h @@ -0,0 +1,52 @@ +/**************************************************************************** + * configs/misoc/include/generated/mem.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H +#define __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define ROM_BASE 0x00000000 +#define ROM_SIZE 0x00008000 + +#define SRAM_BASE 0x10000000 +#define SRAM_SIZE 0x00001000 + +#define MAIN_RAM_BASE 0x40000000 +#define MAIN_RAM_SIZE 0x00800000 + +#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H / diff --git a/configs/misoc/include/generated/output_format.ld b/configs/misoc/include/generated/output_format.ld new file mode 100644 index 00000000000..72acc74d0f7 --- /dev/null +++ b/configs/misoc/include/generated/output_format.ld @@ -0,0 +1 @@ +OUTPUT_FORMAT("elf32-lm32") diff --git a/configs/misoc/include/generated/regions.ld b/configs/misoc/include/generated/regions.ld new file mode 100644 index 00000000000..bd7502729b9 --- /dev/null +++ b/configs/misoc/include/generated/regions.ld @@ -0,0 +1,6 @@ +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x00008000 + sram : ORIGIN = 0x10000000, LENGTH = 0x00001000 + main_ram : ORIGIN = 0x40000000, LENGTH = 0x00800000 +} diff --git a/configs/misoc/include/generated/sdram_phy.h b/configs/misoc/include/generated/sdram_phy.h new file mode 100644 index 00000000000..2161b7d5b93 --- /dev/null +++ b/configs/misoc/include/generated/sdram_phy.h @@ -0,0 +1,144 @@ +/**************************************************************************** + * configs/misoc/include/generated/common.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H +#define __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H + +/**************************************************************************** + * Included Filese + ****************************************************************************/ + +#include "hw/common.h" +#include "hw/flags.h" + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define DFII_NPHASES 1 + +#define sdram_dfii_pird_address_write(X) sdram_dfii_pi0_address_write(X) +#define sdram_dfii_piwr_address_write(X) sdram_dfii_pi0_address_write(X) + +#define sdram_dfii_pird_baddress_write(X) sdram_dfii_pi0_baddress_write(X) +#define sdram_dfii_piwr_baddress_write(X) sdram_dfii_pi0_baddress_write(X) + +#define command_prd(X) command_p0(X) +#define command_pwr(X) command_p0(X) + +#define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +const unsigned int sdram_dfii_pix_wrdata_addr[1] = +{ + CSR_SDRAM_DFII_PI0_WRDATA_ADDR +}; + +const unsigned int sdram_dfii_pix_rddata_addr[1] = +{ + CSR_SDRAM_DFII_PI0_RDDATA_ADDR +}; + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +static void cdelay(int i); + +static void command_p0(int cmd) +{ + sdram_dfii_pi0_command_write(cmd); + sdram_dfii_pi0_command_issue_write(1); +} + +static void init_sequence(void) +{ + /* Bring CKE high */ + + sdram_dfii_pi0_address_write(0x0); + sdram_dfii_pi0_baddress_write(0); + sdram_dfii_control_write(DFII_CONTROL_CKE | DFII_CONTROL_ODT | + DFII_CONTROL_RESET_N); + cdelay(20000); + + /* Precharge All */ + + sdram_dfii_pi0_address_write(0x400); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS | DFII_COMMAND_WE | DFII_COMMAND_CS); + + /* Load Mode Register / Reset DLL, CL=2, BL=1 */ + + sdram_dfii_pi0_address_write(0x120); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_WE | + DFII_COMMAND_CS); + cdelay(200); + + /* Precharge All */ + + sdram_dfii_pi0_address_write(0x400); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS | DFII_COMMAND_WE | DFII_COMMAND_CS); + + /* Auto Refresh */ + + sdram_dfii_pi0_address_write(0x0); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_CS); + cdelay(4); + + /* Auto Refresh */ + + sdram_dfii_pi0_address_write(0x0); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_CS); + cdelay(4); + + /* Load Mode Register / CL=2, BL=1 */ + + sdram_dfii_pi0_address_write(0x20); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_WE | + DFII_COMMAND_CS); + cdelay(200); +} + +#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H diff --git a/configs/misoc/include/generated/variables.mak b/configs/misoc/include/generated/variables.mak new file mode 100644 index 00000000000..a5e6478ad4e --- /dev/null +++ b/configs/misoc/include/generated/variables.mak @@ -0,0 +1,11 @@ +TRIPLE=lm32-elf +CPU=lm32 +CPUFLAGS=-mbarrel-shift-enabled -mmultiply-enabled -mdivide-enabled -msign-extend-enabled +CPUENDIANNESS=big +CLANG=0 +SOC_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc +BUILDINC_DIRECTORY=/home/lenovo/fpga/litex/litex/boards/targets/soc_basesoc_papilio_pro/software/include +LIBBASE_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/software/libbase +LIBCOMPILER_RT_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/software/libcompiler_rt +LIBNET_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/software/libnet +BIOS_DIRECTORY=/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/software/bios diff --git a/configs/misoc/scripts/ld.script b/configs/misoc/scripts/ld.script new file mode 100644 index 00000000000..806aa579283 --- /dev/null +++ b/configs/misoc/scripts/ld.script @@ -0,0 +1,106 @@ +/**************************************************************************** + * configs/misoc/hello/script/ld.script + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +OUTPUT_FORMAT("elf32-lm32") +ENTRY(_stext) + +MEMORY +{ + rom : ORIGIN = 0x00000000, LENGTH = 0x00008000 + sram : ORIGIN = 0x10000000, LENGTH = 0x00004000 + main_ram : ORIGIN = 0x40000000, LENGTH = 0x00080000 +} + +/* +MEMORY +{ + flash (rxai!w) : ORIGIN = 0x80002000, LENGTH = 256K - 8K + intram (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 32K + userpage : ORIGIN = 0x80800000, LENGTH = 512 + factorypage : ORIGIN = 0x80800200, LENGTH = 512 +} +*/ + +SECTIONS +{ + .text : { + _stext = ABSOLUTE(.); + *(.vectors) + *(.text .text.*) + *(.fixup) + *(.gnu.warning) + *(.rodata .rodata.*) + *(.gnu.linkonce.t.*) + *(.glue_7) + *(.glue_7t) + *(.got) + *(.gcc_except_table) + *(.gnu.linkonce.r.*) + _etext = ABSOLUTE(.); + } > main_ram + + _eronly = ABSOLUTE(.); /* See below */ + + .data : { + _sdata = ABSOLUTE(.); + *(.data .data.*) + *(.gnu.linkonce.d.*) + CONSTRUCTORS + _edata = ABSOLUTE(.); + } > main_ram + + .bss : { /* BSS */ + _sbss = ABSOLUTE(.); + *(.bss .bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + _ebss = ABSOLUTE(.); + } > main_ram + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_info 0 : { *(.debug_info) } + .debug_line 0 : { *(.debug_line) } + .debug_pubnames 0 : { *(.debug_pubnames) } + .debug_aranges 0 : { *(.debug_aranges) } +} + +PROVIDE(_fstack = ORIGIN(main_ram) + LENGTH(main_ram) - 4); diff --git a/configs/misoc/src/.gitignore b/configs/misoc/src/.gitignore new file mode 100644 index 00000000000..726d936e1e3 --- /dev/null +++ b/configs/misoc/src/.gitignore @@ -0,0 +1,2 @@ +/.depend +/Make.dep diff --git a/configs/misoc/src/Makefile b/configs/misoc/src/Makefile new file mode 100644 index 00000000000..b52ee91e5c6 --- /dev/null +++ b/configs/misoc/src/Makefile @@ -0,0 +1,42 @@ +############################################################################ +# configs/misoc/src/Makefile +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# Ramtin Amin +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +-include $(TOPDIR)/Make.defs + +ASRCS = +CSRCS = atmega_boot.c + +include $(TOPDIR)/configs/Board.mk diff --git a/configs/misoc/src/lm32_boot.c b/configs/misoc/src/lm32_boot.c new file mode 100644 index 00000000000..8d23d5dc632 --- /dev/null +++ b/configs/misoc/src/lm32_boot.c @@ -0,0 +1,68 @@ +/************************************************************************************ + * configs/misoc/src/lm32_boot.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include + +#include + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: lm32_board_initialize + * + * Description: + * All LM32 architectures must provide the following entry point. This entry + * point is called early in the initialization -- after all memory has been + * configured and mapped but before any devices have been initialized. + * + ************************************************************************************/ + +void lm32_board_initialize(void) +{ + /* Configure SSP chip selects if 1) at least one SSP is enabled, and 2) the weak + * function atmega_spidev_initialize() has been brought into the link. + */ + + /* Configure on-board LEDs if LED support has been selected. */ +} diff --git a/configs/misoc/src/misoc.h b/configs/misoc/src/misoc.h new file mode 100644 index 00000000000..24fe09a4520 --- /dev/null +++ b/configs/misoc/src/misoc.h @@ -0,0 +1,102 @@ +/**************************************************************************** + * configs/misoc/src/misoc.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __CONFIGS_MISOC_SRC_MISOC_H +#define __CONFIGS_MISOC_SRC_MISOC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/**************************************************************************** + * Public Types + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Inline Functions + ****************************************************************************/ + +/**************************************************************************** + * Public Function Prototypes + ****************************************************************************/ + +#ifdef __cplusplus +#define EXTERN extern "C" +extern "C" +{ +#else +#define EXTERN extern +#endif + +/************************************************************************************ + * Name: lm32_spidev_initialize + * + * Description: + * Called to configure SPI chip select GPIO pins for the Amber Web Server. + * + ************************************************************************************/ + +#if defined(CONFIG_AVR_SPI1) || defined(CONFIG_AVR_SPI2) +void weak_function lm32_spidev_initialize(void); +#endif + +/************************************************************************************ + * Name: lm32_led_initialize + * + * Description: + * Configure on-board LEDs if LED support has been selected. + * + ************************************************************************************/ + +#ifdef CONFIG_ARCH_LEDS +void lm32_led_initialize(void); +#endif + +#undef EXTERN +#ifdef __cplusplus +} +#endif + +#endif /* __ASSEMBLY__ */ +#endif /* __CONFIGS_MISOC_SRC_MISOC_H */ From b5a94e255aaa4410b59b2e950fa1834af21fabbf Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Wed, 2 Nov 2016 12:07:52 -0600 Subject: [PATCH 09/32] Misoc/LM32: Changes to get a clean compilation after initial review and commit --- arch/misoc/Kconfig | 6 +- arch/misoc/include/inttypes.h | 245 +++++++++++++++++++++++++++++++ arch/misoc/src/Makefile | 4 +- arch/misoc/src/lm32/Make.defs | 4 +- arch/misoc/src/lm32/chip.h | 3 - arch/misoc/src/lm32/lm32.h | 2 +- arch/misoc/src/lm32/lm32_irq.c | 2 +- arch/misoc/src/lm32/lm32_isr.c | 61 -------- arch/misoc/src/lm32/lm32_swint.c | 2 +- configs/misoc/scripts/ld.script | 17 +-- configs/misoc/src/Makefile | 2 +- 11 files changed, 259 insertions(+), 89 deletions(-) create mode 100644 arch/misoc/include/inttypes.h delete mode 100644 arch/misoc/src/lm32/lm32_isr.c diff --git a/arch/misoc/Kconfig b/arch/misoc/Kconfig index 5cfbf0268c8..f0acc68046b 100644 --- a/arch/misoc/Kconfig +++ b/arch/misoc/Kconfig @@ -62,11 +62,11 @@ config MISOC_UART_TX_BUF_SIZE ---help--- Size of TX buffers for MISOC UARTs -ifdef ARCH_CHIP_LM32 +if ARCH_CHIP_LM32 source arch/misoc/src/lm32/Kconfig endif -ifdef ARCH_CHIP_MOR1K -source arch/misoc/src/mor1k/Kconfig +if ARCH_CHIP_MOR1K +#source arch/misoc/src/mor1k/Kconfig endif endif # ARCH_MISOC diff --git a/arch/misoc/include/inttypes.h b/arch/misoc/include/inttypes.h new file mode 100644 index 00000000000..16c4046f7a7 --- /dev/null +++ b/arch/misoc/include/inttypes.h @@ -0,0 +1,245 @@ +/**************************************************************************** + * arch/misoc/include/inttypes.h + * + * Copyright (C) 2016 Omni Hoverboards Inc. All rights reserved. + * Author: Paul Alexander Patience + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_INCLUDE_INTTYPES_H +#define __ARCH_MISOC_INCLUDE_INTTYPES_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define PRId8 "d" +#define PRId16 "d" +#define PRId32 "d" +#define PRId64 "lld" + +#define PRIdLEAST8 "d" +#define PRIdLEAST16 "d" +#define PRIdLEAST32 "d" +#define PRIdLEAST64 "lld" + +#define PRIdFAST8 "d" +#define PRIdFAST16 "d" +#define PRIdFAST32 "d" +#define PRIdFAST64 "lld" + +#define PRIdMAX "lld" +#define PRIdPTR "d" + +#define PRIi8 "i" +#define PRIi16 "i" +#define PRIi32 "i" +#define PRIi64 "lli" + +#define PRIiLEAST8 "i" +#define PRIiLEAST16 "i" +#define PRIiLEAST32 "i" +#define PRIiLEAST64 "lli" + +#define PRIiFAST8 "i" +#define PRIiFAST16 "i" +#define PRIiFAST32 "i" +#define PRIiFAST64 "lli" + +#define PRIiMAX "lli" +#define PRIiPTR "i" + +#define PRIo8 "o" +#define PRIo16 "o" +#define PRIo32 "o" +#define PRIo64 "llo" + +#define PRIoLEAST8 "o" +#define PRIoLEAST16 "o" +#define PRIoLEAST32 "o" +#define PRIoLEAST64 "llo" + +#define PRIoFAST8 "o" +#define PRIoFAST16 "o" +#define PRIoFAST32 "o" +#define PRIoFAST64 "llo" + +#define PRIoMAX "llo" +#define PRIoPTR "o" + +#define PRIu8 "u" +#define PRIu16 "u" +#define PRIu32 "u" +#define PRIu64 "llu" + +#define PRIuLEAST8 "u" +#define PRIuLEAST16 "u" +#define PRIuLEAST32 "u" +#define PRIuLEAST64 "llu" + +#define PRIuFAST8 "u" +#define PRIuFAST16 "u" +#define PRIuFAST32 "u" +#define PRIuFAST64 "llu" + +#define PRIuMAX "llu" +#define PRIuPTR "u" + +#define PRIx8 "x" +#define PRIx16 "x" +#define PRIx32 "x" +#define PRIx64 "llx" + +#define PRIxLEAST8 "x" +#define PRIxLEAST16 "x" +#define PRIxLEAST32 "x" +#define PRIxLEAST64 "llx" + +#define PRIxFAST8 "x" +#define PRIxFAST16 "x" +#define PRIxFAST32 "x" +#define PRIxFAST64 "llx" + +#define PRIxMAX "llx" +#define PRIxPTR "x" + +#define PRIX8 "X" +#define PRIX16 "X" +#define PRIX32 "X" +#define PRIX64 "llX" + +#define PRIXLEAST8 "X" +#define PRIXLEAST16 "X" +#define PRIXLEAST32 "X" +#define PRIXLEAST64 "llX" + +#define PRIXFAST8 "X" +#define PRIXFAST16 "X" +#define PRIXFAST32 "X" +#define PRIXFAST64 "llX" + +#define PRIXMAX "llX" +#define PRIXPTR "X" + +#define SCNd8 "hhd" +#define SCNd16 "hd" +#define SCNd32 "d" +#define SCNd64 "lld" + +#define SCNdLEAST8 "hhd" +#define SCNdLEAST16 "hd" +#define SCNdLEAST32 "d" +#define SCNdLEAST64 "lld" + +#define SCNdFAST8 "hhd" +#define SCNdFAST16 "hd" +#define SCNdFAST32 "d" +#define SCNdFAST64 "lld" + +#define SCNdMAX "lld" +#define SCNdPTR "d" + +#define SCNi8 "hhi" +#define SCNi16 "hi" +#define SCNi32 "i" +#define SCNi64 "lli" + +#define SCNiLEAST8 "hhi" +#define SCNiLEAST16 "hi" +#define SCNiLEAST32 "i" +#define SCNiLEAST64 "lli" + +#define SCNiFAST8 "hhi" +#define SCNiFAST16 "hi" +#define SCNiFAST32 "i" +#define SCNiFAST64 "lli" + +#define SCNiMAX "lli" +#define SCNiPTR "i" + +#define SCNo8 "hho" +#define SCNo16 "ho" +#define SCNo32 "o" +#define SCNo64 "llo" + +#define SCNoLEAST8 "hho" +#define SCNoLEAST16 "ho" +#define SCNoLEAST32 "o" +#define SCNoLEAST64 "llo" + +#define SCNoFAST8 "hho" +#define SCNoFAST16 "ho" +#define SCNoFAST32 "o" +#define SCNoFAST64 "llo" + +#define SCNoMAX "llo" +#define SCNoPTR "o" + +#define SCNu8 "hhu" +#define SCNu16 "hu" +#define SCNu32 "u" +#define SCNu64 "llu" + +#define SCNuLEAST8 "hhu" +#define SCNuLEAST16 "hu" +#define SCNuLEAST32 "u" +#define SCNuLEAST64 "llu" + +#define SCNuFAST8 "hhu" +#define SCNuFAST16 "hu" +#define SCNuFAST32 "u" +#define SCNuFAST64 "llu" + +#define SCNuMAX "llu" +#define SCNuPTR "u" + +#define SCNx8 "hhx" +#define SCNx16 "hx" +#define SCNx32 "x" +#define SCNx64 "llx" + +#define SCNxLEAST8 "hhx" +#define SCNxLEAST16 "hx" +#define SCNxLEAST32 "x" +#define SCNxLEAST64 "llx" + +#define SCNxFAST8 "hhx" +#define SCNxFAST16 "hx" +#define SCNxFAST32 "x" +#define SCNxFAST64 "llx" + +#define SCNxMAX "llx" +#define SCNxPTR "x" + +#endif /* __ARCH_MISOC_INCLUDE_INTTYPES_H */ diff --git a/arch/misoc/src/Makefile b/arch/misoc/src/Makefile index 6a0285810b2..19bd124422c 100644 --- a/arch/misoc/src/Makefile +++ b/arch/misoc/src/Makefile @@ -3,7 +3,6 @@ # # Copyright (C) 2016 Gregory Nutt. All rights reserved. # Author: Gregory Nutt -# Ramtin Amin # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -139,9 +138,8 @@ board/libboard$(LIBEXT): $(Q) $(MAKE) -C board TOPDIR="$(TOPDIR)" libboard$(LIBEXT) EXTRADEFINES=$(EXTRADEFINES) nuttx$(EXEEXT): $(HEAD_OBJ) board/libboard$(LIBEXT) - @echo "LD: nuttx toto $(LIBGCC)" $(Q) $(LD) --entry=__start $(LDFLAGS) $(LIBPATHS) -o $(NUTTX) $(HEAD_OBJ) $(EXTRA_OBJS) \ - $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LDENDGROUP) + $(LDSTARTGROUP) $(LDLIBS) $(EXTRA_LIBS) $(LIBGCC) $(LDENDGROUP) ifneq ($(CONFIG_WINDOWS_NATIVE),y) $(Q) $(NM) $(NUTTX) | \ grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs index 1a0ce75de24..83381543884 100644 --- a/arch/misoc/src/lm32/Make.defs +++ b/arch/misoc/src/lm32/Make.defs @@ -39,11 +39,11 @@ HEAD_ASRC = lm32_vectors.S CMN_ASRCS = CMN_CSRCS = misoc_uart.c -CHIP_ASRCS = lm32_start.S lm32_syscall.S +CHIP_ASRCS = lm32_syscall.S CHIP_CSRCS = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_doirq.c lm32_dumpstate.c CHIP_CSRCS += lm32_dumpstate.c lm32_exit.c lm32_idle.c lm32_initialize.c CHIP_CSRCS += lm32_initialstate.c lm32_interruptcontext.c lm32_irq.c -CHIP_CSRCS += lm32_isr.c lm32_releasepending.c lm32_releasestack.c +CHIP_CSRCS += lm32_releasepending.c lm32_releasestack.c CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c diff --git a/arch/misoc/src/lm32/chip.h b/arch/misoc/src/lm32/chip.h index bdb8823c5a2..78d671f7f94 100644 --- a/arch/misoc/src/lm32/chip.h +++ b/arch/misoc/src/lm32/chip.h @@ -92,7 +92,4 @@ static inline unsigned int irq_pending(void) * Public Function Prototypes ****************************************************************************/ -void uart_isr(void); -void isr(void); - #endif /* __ARCH_MISOC_SRC_LM32_CHIP_H */ diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h index fe18969c758..8098da7492e 100644 --- a/arch/misoc/src/lm32/lm32.h +++ b/arch/misoc/src/lm32/lm32.h @@ -147,7 +147,7 @@ void lm32_timer_initialize(void); /* Software interrupts ******************************************************/ -uint32_t lm32_swint(int irq, FAR void *context); +uint32_t *lm32_swint(int irq, FAR void *context); /* Signal handling **********************************************************/ diff --git a/arch/misoc/src/lm32/lm32_irq.c b/arch/misoc/src/lm32/lm32_irq.c index 2e01b511fd1..726d60c2970 100644 --- a/arch/misoc/src/lm32/lm32_irq.c +++ b/arch/misoc/src/lm32/lm32_irq.c @@ -46,7 +46,7 @@ #include #include -#include "chip_irqasm.h" +#include "chip.h" #include "lm32.h" /**************************************************************************** diff --git a/arch/misoc/src/lm32/lm32_isr.c b/arch/misoc/src/lm32/lm32_isr.c deleted file mode 100644 index 539614d3179..00000000000 --- a/arch/misoc/src/lm32/lm32_isr.c +++ /dev/null @@ -1,61 +0,0 @@ -/**************************************************************************** - * arch/misoc/src/lm32/lm32_isr.c - * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Ramtin Amin - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include -#include "chip_irqasm.h" - -/**************************************************************************** - * Public Functions - ****************************************************************************/ - -void uart_isr() -{ -} - -void isr(void) -{ - unsigned int irqs; - - irqs = irq_pending() & irq_getmask(); - - if (irqs & (1 << UART_INTERRUPT)) - { - uart_isr(); - } -} diff --git a/arch/misoc/src/lm32/lm32_swint.c b/arch/misoc/src/lm32/lm32_swint.c index c8148812cc5..f8c7b280ee3 100644 --- a/arch/misoc/src/lm32/lm32_swint.c +++ b/arch/misoc/src/lm32/lm32_swint.c @@ -130,7 +130,7 @@ static void dispatch_syscall(void) * ****************************************************************************/ -uint32_t lm32_swint(int irq, FAR void *context) +uint32_t *lm32_swint(int irq, FAR void *context) { uint32_t *regs = (uint32_t *)context; diff --git a/configs/misoc/scripts/ld.script b/configs/misoc/scripts/ld.script index 806aa579283..0a3aa7e3d02 100644 --- a/configs/misoc/scripts/ld.script +++ b/configs/misoc/scripts/ld.script @@ -36,23 +36,14 @@ OUTPUT_FORMAT("elf32-lm32") ENTRY(_stext) +/*INCLUDE configs/misoc/include/generated/regions.ld*/ MEMORY { - rom : ORIGIN = 0x00000000, LENGTH = 0x00008000 - sram : ORIGIN = 0x10000000, LENGTH = 0x00004000 - main_ram : ORIGIN = 0x40000000, LENGTH = 0x00080000 + rom : ORIGIN = 0x00000000, LENGTH = 0x00008000 + sram : ORIGIN = 0x10000000, LENGTH = 0x00004000 + main_ram : ORIGIN = 0x40000000, LENGTH = 0x00080000 } -/* -MEMORY -{ - flash (rxai!w) : ORIGIN = 0x80002000, LENGTH = 256K - 8K - intram (wxa!ri) : ORIGIN = 0x00000004, LENGTH = 32K - userpage : ORIGIN = 0x80800000, LENGTH = 512 - factorypage : ORIGIN = 0x80800200, LENGTH = 512 -} -*/ - SECTIONS { .text : { diff --git a/configs/misoc/src/Makefile b/configs/misoc/src/Makefile index b52ee91e5c6..0607a11ed37 100644 --- a/configs/misoc/src/Makefile +++ b/configs/misoc/src/Makefile @@ -37,6 +37,6 @@ -include $(TOPDIR)/Make.defs ASRCS = -CSRCS = atmega_boot.c +CSRCS = lm32_boot.c include $(TOPDIR)/configs/Board.mk From cb96e632faf84ccaa98d401160b41f78ed3cdf1b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Thu, 3 Nov 2016 07:21:25 -0600 Subject: [PATCH 10/32] LM32: Add toolchain configuration; Add Toolchain.defs. --- arch/arm/src/armv7-r/Kconfig | 2 +- arch/misoc/src/lm32/Kconfig | 24 +++++++ arch/misoc/src/lm32/Toolchain.defs | 104 +++++++++++++++++++++++++++++ configs/misoc/hello/Make.defs | 2 +- 4 files changed, 130 insertions(+), 2 deletions(-) create mode 100644 arch/misoc/src/lm32/Toolchain.defs diff --git a/arch/arm/src/armv7-r/Kconfig b/arch/arm/src/armv7-r/Kconfig index 0582a4fee33..810e80601d6 100644 --- a/arch/arm/src/armv7-r/Kconfig +++ b/arch/arm/src/armv7-r/Kconfig @@ -162,7 +162,7 @@ config ARMV7R_TOOLCHAIN_GNU_OABI ---help--- This option should work for any GNU toolchain configured for arm-elf-. -endchoice # ARMV7R_HAVE_L2CC +endchoice # Toolchain Selection config ARMV7R_OABI_TOOLCHAIN bool "OABI (vs EABI)" diff --git a/arch/misoc/src/lm32/Kconfig b/arch/misoc/src/lm32/Kconfig index 75814271c68..b9178978e75 100644 --- a/arch/misoc/src/lm32/Kconfig +++ b/arch/misoc/src/lm32/Kconfig @@ -5,4 +5,28 @@ if ARCH_CHIP_LM32 +choice + prompt "Toolchain Selection" + default LM32_TOOLCHAIN_GNUW if HOST_WINDOWS + default LM32_TOOLCHAIN_GNUL if !HOST_WINDOWS + +config LM32_TOOLCHAIN_BUILDROOT + bool "Buildroot (Cygwin or Linux)" + depends on !WINDOWS_NATIVE + +config LM32_TOOLCHAIN_GNUL + bool "Generic GNU toolchain under Linux (or other POSIX environment)" + ---help--- + This option should work for any modern GNU toolchain (GCC 4.5 or newer) + configured for lm32-elf-. + +config LM32_TOOLCHAIN_GNUW + bool "Generic GNU toolchain under Windows" + depends on HOST_WINDOWS + ---help--- + This option should work for any modern GNU toolchain (GCC 4.5 or newer) + configured for lm32-elf-. + +endchoice # Toolchain Selection + endif # ARCH_CHIP_LM32 diff --git a/arch/misoc/src/lm32/Toolchain.defs b/arch/misoc/src/lm32/Toolchain.defs new file mode 100644 index 00000000000..e0227e2e16e --- /dev/null +++ b/arch/misoc/src/lm32/Toolchain.defs @@ -0,0 +1,104 @@ +############################################################################ +# arch/misco/src/lm32/Toolchain.defs +# +# Copyright (C) 2016 Gregory Nutt. All rights reserved. +# Author: Gregory Nutt +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in +# the documentation and/or other materials provided with the +# distribution. +# 3. Neither the name NuttX nor the names of its contributors may be +# used to endorse or promote products derived from this software +# without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE +# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, +# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS +# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED +# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN +# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +# POSSIBILITY OF SUCH DAMAGE. +# +############################################################################ + +# Setup for the selected toolchain + +# +# Select and allow the selected toolchain to be overridden by a command-line +#selection. +# + +ifeq ($(filter y, \ + $(CONFIG_LM32_TOOLCHAIN_BUILDROOT) \ + ),y) + CONFIG_LM32_TOOLCHAIN ?= BUILDROOT +endif + +ifeq ($(filter y, \ + $(CONFIG_LM32_TOOLCHAIN_GNUL) \ + ),y) + CONFIG_LM32_TOOLCHAIN ?= GNUL +endif + +ifeq ($(filter y, \ + $(CONFIG_LM32_TOOLCHAIN_GNUW) \ + ),y) + CONFIG_LM32_TOOLCHAIN ?= GNUW +endif + +# +# Supported toolchains +# +# Each toolchain definition should set: +# +# CROSSDEV The GNU toolchain triple (command prefix) +# ARCROSSDEV If required, an alternative prefix used when +# invoking ar and nm. +# ARCHCPUFLAGS CPU-specific flags selecting the instruction set +# FPU options, etc. +# MAXOPTIMIZATION The maximum optimization level that results in +# reliable code generation. +# + +ifeq ($(CONFIG_DEBUG_CUSTOMOPT),y) + MAXOPTIMIZATION := $(CONFIG_DEBUG_OPTLEVEL) +endif + +# NuttX buildroot under Linux or Cygwin + +ifeq ($(CONFIG_LM32_TOOLCHAIN),BUILDROOT) + CROSSDEV ?= lm32-nuttx-elf- + ARCROSSDEV ?= lm32-nuttx-elf- + MAXOPTIMIZATION ?= -Os +endif + +# Generic GNU toolchain on OS X, Linux or any typical Posix system + +ifeq ($(CONFIG_LM32_TOOLCHAIN),GNUL) + CROSSDEV ?= lm32-elf-- + ARCROSSDEV ?= lm32-elf-- + MAXOPTIMIZATION ?= -Os +endif + +# Generic GNU toolchain under Windows (native) + +ifeq ($(CONFIG_LM32_TOOLCHAIN),GNUW) + CROSSDEV ?= lm32-elf-- + ARCROSSDEV ?= lm32-elf-- + MAXOPTIMIZATION ?= -Os + ifeq ($(CONFIG_WINDOWS_CYGWIN),y) + WINTOOL = y + endif +endif diff --git a/configs/misoc/hello/Make.defs b/configs/misoc/hello/Make.defs index b6124b77593..f82c1cb2232 100644 --- a/configs/misoc/hello/Make.defs +++ b/configs/misoc/hello/Make.defs @@ -36,7 +36,7 @@ include ${TOPDIR}/.config include ${TOPDIR}/tools/Config.mk -CROSSDEV = lm32-elf- +include ${TOPDIR}/arch/misoc/src/lm32/Toolchain.defs LDSCRIPT = ld.script From e6435c28d0f866f8f348e4e4015ed5e2e802323b Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 09:58:27 -0600 Subject: [PATCH 11/32] Fix some name errors in port: RISC-V -> LM32 --- arch/misoc/include/lm32/syscall.h | 4 ++-- arch/misoc/include/syscall.h | 2 +- arch/misoc/src/lm32/lm32.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/misoc/include/lm32/syscall.h b/arch/misoc/include/lm32/syscall.h index 9e4b0d9ee03..d0816c7a217 100644 --- a/arch/misoc/include/lm32/syscall.h +++ b/arch/misoc/include/lm32/syscall.h @@ -58,8 +58,8 @@ #define SYS_syscall 0x00 /* Configuration ********************************************************************/ -/* SYS call 1 and 2 are defined for internal use by the RISC-V port (see - * arch/riscv/include/mips32/syscall.h). In addition, SYS call 3 is the return from +/* SYS call 1 and 2 are defined for internal use by the LM32 port (see + * arch/miscoc/include/lm32/syscall.h). In addition, SYS call 3 is the return from * a SYS call in kernel mode. The first four syscall values must, therefore, be * reserved (0 is not used). */ diff --git a/arch/misoc/include/syscall.h b/arch/misoc/include/syscall.h index 3a8f2e9df04..71b9e85a6c4 100644 --- a/arch/misoc/include/syscall.h +++ b/arch/misoc/include/syscall.h @@ -44,7 +44,7 @@ * Included Files ****************************************************************************/ -/* Include RISC-V architecture-specific syscall macros */ +/* Include LM32 architecture-specific syscall macros */ #ifdef CONFIG_ARCH_MISOC # include diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h index 8098da7492e..280c2ff17fc 100644 --- a/arch/misoc/src/lm32/lm32.h +++ b/arch/misoc/src/lm32/lm32.h @@ -61,7 +61,7 @@ #define INTSTACK_COLOR 0xdeadbeef #define HEAP_COLOR 'h' -/* In the RISC_V model, the state is copied from the stack to the TCB, but +/* In the LM32 model, the state is copied from the stack to the TCB, but * only a referenced is passed to get the state from the TCB. */ From 8f3c59b0d60dc37c6edf6c26ed929c0ddff37fcc Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 10:21:55 -0600 Subject: [PATCH 12/32] LM32: Rename up_doirq() to lm32_doirq() --- arch/misoc/src/lm32/lm32_doirq.c | 2 +- arch/misoc/src/lm32/lm32_vectors.S | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/misoc/src/lm32/lm32_doirq.c b/arch/misoc/src/lm32/lm32_doirq.c index 50b2e745fc5..50a001ea69e 100644 --- a/arch/misoc/src/lm32/lm32_doirq.c +++ b/arch/misoc/src/lm32/lm32_doirq.c @@ -71,7 +71,7 @@ * Public Functions ****************************************************************************/ -uint32_t *up_doirq(int irq, uint32_t *regs) +uint32_t *lm32_doirq(int irq, uint32_t *regs) { board_autoled_on(LED_INIRQ); #ifdef CONFIG_SUPPRESS_INTERRUPTS diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index a5ca7a550de..70187767dd4 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -112,7 +112,7 @@ _interrupt_handler: sw (sp+0), ra calli .save_all rcsr r1, IP - calli up_doirq + calli lm32_doirq bi .restore_all_and_eret nop nop From 145ee2e6f157245c3311213d8f6eaa1124a3cde5 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 10:39:57 -0600 Subject: [PATCH 13/32] LM32: Add prototype for lm32_decodeirq(). --- arch/misoc/src/lm32/Make.defs | 11 ++-- arch/misoc/src/lm32/lm32_decodeirq.c | 92 ++++++++++++++++++++++++++++ arch/misoc/src/lm32/lm32_vectors.S | 2 +- 3 files changed, 99 insertions(+), 6 deletions(-) create mode 100644 arch/misoc/src/lm32/lm32_decodeirq.c diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs index 83381543884..cc4b72da664 100644 --- a/arch/misoc/src/lm32/Make.defs +++ b/arch/misoc/src/lm32/Make.defs @@ -42,8 +42,9 @@ CMN_CSRCS = misoc_uart.c CHIP_ASRCS = lm32_syscall.S CHIP_CSRCS = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c -CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_doirq.c lm32_dumpstate.c -CHIP_CSRCS += lm32_dumpstate.c lm32_exit.c lm32_idle.c lm32_initialize.c -CHIP_CSRCS += lm32_initialstate.c lm32_interruptcontext.c lm32_irq.c -CHIP_CSRCS += lm32_releasepending.c lm32_releasestack.c -CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c +CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_decodeirq.c +CHIP_CSRCS += lm32_doirq.c lm32_dumpstate.c lm32_dumpstate.c lm32_exit.c +CHIP_CSRCS += lm32_idle.c lm32_initialize.c lm32_initialstate.c +CHIP_CSRCS += lm32_interruptcontext.c lm32_irq.c lm32_releasepending.c +CHIP_CSRCS += lm32_releasestack.c lm32_stackframe.c lm32_swint.c +CHIP_CSRCS += lm32_unblocktask.c diff --git a/arch/misoc/src/lm32/lm32_decodeirq.c b/arch/misoc/src/lm32/lm32_decodeirq.c new file mode 100644 index 00000000000..a532331ca3b --- /dev/null +++ b/arch/misoc/src/lm32/lm32_decodeirq.c @@ -0,0 +1,92 @@ +/******************************************************************************** + * arch/misoc/src/lm32/lm32_decodeirq.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ********************************************************************************/ + +/******************************************************************************** + * Included Files + ********************************************************************************/ + +#include + +#include "chip.h" +#include "lm32.h" + +/******************************************************************************** + * Public Functions + ********************************************************************************/ + +/**************************************************************************** + * Name: lm32_decodeirq + * + * Description: + * This function is called from the IRQ vector handler in lm32_vectors.S. + * At this point, the interrupt has been taken and the registers have + * been saved on the stack. This function simply needs to determine the + * the irq number of the interrupt and then to call lm32_doirq to dispatch + * the interrupt. + * + * Input parameters: + * regs - A pointer to the register save area on the stack. + * + ****************************************************************************/ + +uint32_t *lm32_decodeirq(uint32_t *regs) +{ + uint32_t im; + int irq; + + /* Read the interrupt acknowledge register and get the interrupt ID */ + + im = getreg32(GIC_ICCIAR); + irq = (im & GIC_ICCIAR_INTID_MASK) >> GIC_ICCIAR_INTID_SHIFT; + + irqinfo("irq=%d\n", irq); + + /* Ignore spurions IRQs. ICCIAR will report 1023 if there is no pending + * interrupt. + */ + + DEBUGASSERT(irq < NR_IRQS || irq == 1023); + if (irq < NR_IRQS) + { + /* Dispatch the interrupt */ + + regs = lm32_doirq(irq, regs); + } + + /* Write to the end-of-interrupt register */ + + putreg32(im, GIC_ICCEOIR); + return regs; +} diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index 70187767dd4..f672fa7fda8 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -112,7 +112,7 @@ _interrupt_handler: sw (sp+0), ra calli .save_all rcsr r1, IP - calli lm32_doirq + calli lm32_decodeirq bi .restore_all_and_eret nop nop From ddd871618937104d069fac7687036e3a3171c3c7 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 10:42:05 -0600 Subject: [PATCH 14/32] LM32: Ooops.. last version still in editor --- arch/misoc/src/lm32/lm32_decodeirq.c | 45 +++++++++++++++++++--------- arch/misoc/src/lm32/lm32_doirq.c | 16 ---------- 2 files changed, 31 insertions(+), 30 deletions(-) diff --git a/arch/misoc/src/lm32/lm32_decodeirq.c b/arch/misoc/src/lm32/lm32_decodeirq.c index a532331ca3b..bdf0abe240d 100644 --- a/arch/misoc/src/lm32/lm32_decodeirq.c +++ b/arch/misoc/src/lm32/lm32_decodeirq.c @@ -63,30 +63,47 @@ uint32_t *lm32_decodeirq(uint32_t *regs) { - uint32_t im; + uint32_t intstat; int irq; - /* Read the interrupt acknowledge register and get the interrupt ID */ + /* Read the pending interrupts */ + /* REVISIT: How do I get the interupt status */ +#warning Missing logic + intstat = 0; - im = getreg32(GIC_ICCIAR); - irq = (im & GIC_ICCIAR_INTID_MASK) >> GIC_ICCIAR_INTID_SHIFT; + /* REVIST: Do I need to mask the interrupt status with the IM? */ - irqinfo("irq=%d\n", irq); + irqinfo("intstat=%08lx\n", (unsigned long)intstat); - /* Ignore spurions IRQs. ICCIAR will report 1023 if there is no pending - * interrupt. - */ + /* Decode and dispatch interrupts */ - DEBUGASSERT(irq < NR_IRQS || irq == 1023); - if (irq < NR_IRQS) + for (irq = 0; irq < NR_IRQS & instat != 0; i++) { - /* Dispatch the interrupt */ + uint32_t bit = (1 << irq); - regs = lm32_doirq(irq, regs); + /* Is this interrupt pending? */ + + if ((instat & bit) != 0) + { + /* Yes.. Dispatch the interrupt */ + /* REVIST: Do I need to acknowledge the interrupt first? */ + + irqinfo("irq=%d\n", irq); + regs = lm32_doirq(irq, regs); + + /* Clear the bit in the interrupt status copy so that maybe we can + * break out of the loop early. + */ + + instat &= ~bit; + } } - /* Write to the end-of-interrupt register */ + /* Return the final task register save area. This will typically be the + * same as the value of regs on input. In the event of a context switch, + * however, it will differ. It will refere to the register save are in the + * TCB of the new thread. + */ - putreg32(im, GIC_ICCEOIR); return regs; } diff --git a/arch/misoc/src/lm32/lm32_doirq.c b/arch/misoc/src/lm32/lm32_doirq.c index 50a001ea69e..6d44eeb95c1 100644 --- a/arch/misoc/src/lm32/lm32_doirq.c +++ b/arch/misoc/src/lm32/lm32_doirq.c @@ -51,22 +51,6 @@ #include "group/group.h" #include "lm32.h" -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/**************************************************************************** - * Public Data - ****************************************************************************/ - -/**************************************************************************** - * Private Data - ****************************************************************************/ - -/**************************************************************************** - * Private Functions - ****************************************************************************/ - /**************************************************************************** * Public Functions ****************************************************************************/ From b2126738cd2091cf5e079b1f08a8f7ec39720b55 Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Fri, 4 Nov 2016 10:54:10 -0600 Subject: [PATCH 15/32] LM32: Fix implementation of up_irq_save() and up_irq_restore() --- arch/misoc/include/lm32/irq.h | 7 +++- arch/misoc/src/lm32/lm32_doirq.c | 4 +- arch/misoc/src/lm32/lm32_initialstate.c | 4 ++ arch/misoc/src/lm32/lm32_irq.c | 32 +++++++++++---- arch/misoc/src/lm32/lm32_swint.c | 1 + arch/misoc/src/lm32/lm32_vectors.S | 13 ++++-- configs/misoc/hello/defconfig | 53 +++++++++++++++++++++---- 7 files changed, 90 insertions(+), 24 deletions(-) diff --git a/arch/misoc/include/lm32/irq.h b/arch/misoc/include/lm32/irq.h index e73d3815d5c..782bb06ae9e 100644 --- a/arch/misoc/include/lm32/irq.h +++ b/arch/misoc/include/lm32/irq.h @@ -82,10 +82,11 @@ #define REG_X29_NDX 29 /* General-purpose/return address */ #define REG_X30_NDX 30 /* Exception address */ #define REG_X31_NDX 31 /* Breakpoint address */ +#define REG_X32_NDX 32 /* Reg IE */ /* Interrupt Context register */ -#define XCPTCONTEXT_REGS 32 +#define XCPTCONTEXT_REGS 33 #define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS) #ifdef __ASSEMBLY__ @@ -121,6 +122,7 @@ # define REG_X29 (4*REG_X29_NDX) # define REG_X30 (4*REG_X30_NDX) # define REG_X31 (4*REG_X31_NDX) +# define REG_INT_CTX (4*REG_X32_NDX) #else # define REG_X0 REG_X0_NDX # define REG_X1 REG_X1_NDX @@ -154,6 +156,7 @@ # define REG_X29 REG_X29_NDX # define REG_X30 REG_X30_NDX # define REG_X31 REG_X31_NDX +# define REG_INT_CTX REG_X32_NDX #endif /* Register aliases */ @@ -176,6 +179,8 @@ #define REG_A6 REG_X7 #define REG_A7 REG_X8 +#define REG_IE REG_INT_CTX + /**************************************************************************** * Public Types ****************************************************************************/ diff --git a/arch/misoc/src/lm32/lm32_doirq.c b/arch/misoc/src/lm32/lm32_doirq.c index 6d44eeb95c1..e318a65adf7 100644 --- a/arch/misoc/src/lm32/lm32_doirq.c +++ b/arch/misoc/src/lm32/lm32_doirq.c @@ -58,9 +58,7 @@ uint32_t *lm32_doirq(int irq, uint32_t *regs) { board_autoled_on(LED_INIRQ); -#ifdef CONFIG_SUPPRESS_INTERRUPTS - PANIC(); -#else + /* Current regs non-zero indicates that we are processing an interrupt; * g_current_regs is also used to manage interrupt level context switches. * diff --git a/arch/misoc/src/lm32/lm32_initialstate.c b/arch/misoc/src/lm32/lm32_initialstate.c index e42107e1450..6064e186c84 100644 --- a/arch/misoc/src/lm32/lm32_initialstate.c +++ b/arch/misoc/src/lm32/lm32_initialstate.c @@ -99,6 +99,10 @@ void up_initial_state(struct tcb_s *tcb) xcp->regs[REG_EPC] = (uint32_t)tcb->start; + /* Initial state of IE: Interrupts enabled */ + + xcp->regs[REG_INT_CTX] = 1; + /* If this task is running PIC, then set the PIC base register to the * address of the allocated D-Space region. */ diff --git a/arch/misoc/src/lm32/lm32_irq.c b/arch/misoc/src/lm32/lm32_irq.c index 726d60c2970..d64623dfa3e 100644 --- a/arch/misoc/src/lm32/lm32_irq.c +++ b/arch/misoc/src/lm32/lm32_irq.c @@ -69,7 +69,7 @@ void lm32_irq_initialize(void) g_current_regs = NULL; - /* Enable interrupt */ + /* Enable interrupts */ irq_setie(1); } @@ -77,15 +77,22 @@ void lm32_irq_initialize(void) irqstate_t up_irq_save(void) { irqstate_t flags; - irq_setie(0); -#warning Return value MUST be the previous IE value. Returning 1 will not work. - return 1; + /* Get the previous value of IE */ + + flags = irq_getie(); + + /* Disable interrupts and return the previous interrupt state */ + + irq_setie(0); + return flags; } void up_irq_restore(irqstate_t flags) { - irq_setie(1); + /* Restore the interrupt state returned by up_save_irq() */ + + irq_setie(flags); } /**************************************************************************** @@ -99,8 +106,13 @@ void up_irq_restore(irqstate_t flags) void up_disable_irq(int irq) { irqstate_t flags; - flags = irq_getmask(); - flags &= ~(1 <= 0 && irq < NR_IRQS); + + /* Disable interrupts by clearing the bit that corresponds to the irq */ + + flags = irq_getmask(); + flags &= ~(1 << irq); irq_setmask(flags); } @@ -115,7 +127,11 @@ void up_disable_irq(int irq) void up_enable_irq(int irq) { irqstate_t flags; - flags = irq_getmask(); + DEBUGASSERT(irq >= 0 && irq < NR_IRQS); + + /* Enable interrupts by setting the bit that corresponds to the irq */ + + flags = irq_getmask(); flags |= (1 << irq); irq_setmask(flags); } diff --git a/arch/misoc/src/lm32/lm32_swint.c b/arch/misoc/src/lm32/lm32_swint.c index f8c7b280ee3..9e5f932d466 100644 --- a/arch/misoc/src/lm32/lm32_swint.c +++ b/arch/misoc/src/lm32/lm32_swint.c @@ -326,5 +326,6 @@ uint32_t *lm32_swint(int irq, FAR void *context) */ g_current_regs = NULL; + return regs; } diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index f672fa7fda8..f5010599979 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -151,7 +151,7 @@ _do_reset: bi os_start .save_all: - addi sp, sp, -132 + addi sp, sp, -136 sw (sp+REG_X0), r0 sw (sp+REG_X1), r1 sw (sp+REG_X2), r2 @@ -190,11 +190,14 @@ _do_reset: /* ra needs to be moved from initial stack location */ - lw r1, (sp+ 132) + lw r1, (sp+ 136) sw (sp+REG_RA), r1 - /* the 2nd argument is the regs pointer */ + /* get IE/REG_INT_CTX */ + rcsr r1, IE + sw (sp+REG_INT_CTX), r1 + /* the 2nd argument is the regs pointer */ addi r2, sp, 0 ret @@ -231,8 +234,10 @@ _do_reset: lw r29, (r1+REG_RA) lw r30, (r1+REG_EA) lw r31, (r1+REG_BA) + lw r1, (r1+REG_INT_CTX) + wcsr IE, r1 lw r1, (r1+REG_X1) - addi sp, sp, 132 + addi sp, sp, 136 eret /* This global variable is unsigned long g_idle_topstack and is diff --git a/configs/misoc/hello/defconfig b/configs/misoc/hello/defconfig index 99c0c9ef2ce..f7b4a0082d2 100644 --- a/configs/misoc/hello/defconfig +++ b/configs/misoc/hello/defconfig @@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y # # Build Configuration # -# CONFIG_APPS_DIR="../apps" +CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set @@ -74,8 +74,9 @@ CONFIG_DEBUG_FEATURES=y # CONFIG_ARCH_HAVE_STACKCHECK is not set # CONFIG_ARCH_HAVE_HEAPCHECK is not set CONFIG_DEBUG_SYMBOLS=y -# CONFIG_ARCH_HAVE_CUSTOMOPT is not set +CONFIG_ARCH_HAVE_CUSTOMOPT=y CONFIG_DEBUG_NOOPT=y +# CONFIG_DEBUG_CUSTOMOPT is not set # CONFIG_DEBUG_FULLOPT is not set # @@ -88,8 +89,10 @@ CONFIG_DEBUG_NOOPT=y CONFIG_ARCH_MISOC=y # CONFIG_ARCH_RGMP is not set # CONFIG_ARCH_RENESAS is not set +# CONFIG_ARCH_RISCV is not set # CONFIG_ARCH_SIM is not set # CONFIG_ARCH_X86 is not set +# CONFIG_ARCH_XTENSA is not set # CONFIG_ARCH_Z16 is not set # CONFIG_ARCH_Z80 is not set CONFIG_ARCH="misoc" @@ -97,6 +100,15 @@ CONFIG_ARCH_CHIP="lm32" CONFIG_ARCH_CHIP_LM32=y # CONFIG_ARCH_CHIP_MOR1K is not set +# +# MISOC Peripheral Support +# +CONFIG_MISOC_HAVE_UART1=y +CONFIG_MISOC_UART1=y +CONFIG_MISOC_UART=y +CONFIG_MISOC_UART_RX_BUF_SIZE=64 +CONFIG_MISOC_UART_TX_BUF_SIZE=64 + # # Architecture Options # @@ -131,7 +143,8 @@ CONFIG_BOARD_LOOPSPERMSEC=800 # # Interrupt options # -# CONFIG_ARCH_HAVE_INTERRUPTSTACK is not set +CONFIG_ARCH_HAVE_INTERRUPTSTACK=y +CONFIG_ARCH_INTERRUPTSTACK=0 # CONFIG_ARCH_HAVE_HIPRI_INTERRUPT is not set # @@ -276,6 +289,9 @@ CONFIG_DEV_NULL=y # CONFIG_ARCH_HAVE_I2CRESET is not set # CONFIG_I2C is not set # CONFIG_SPI is not set +# CONFIG_ARCH_HAVE_SPI_CRCGENERATION is not set +# CONFIG_ARCH_HAVE_SPI_CS_CONTROL is not set +# CONFIG_ARCH_HAVE_SPI_BITORDER is not set # CONFIG_I2S is not set # @@ -319,13 +335,13 @@ CONFIG_DEV_NULL=y # CONFIG_SENSORS is not set # CONFIG_SERCOMM_CONSOLE is not set CONFIG_SERIAL=y -CONFIG_DEV_LOWCONSOLE=y +# CONFIG_DEV_LOWCONSOLE is not set # CONFIG_SERIAL_REMOVABLE is not set -# CONFIG_SERIAL_CONSOLE is not set +CONFIG_SERIAL_CONSOLE=y # CONFIG_16550_UART is not set # CONFIG_UART_SERIALDRIVER is not set # CONFIG_UART0_SERIALDRIVER is not set -# CONFIG_UART1_SERIALDRIVER is not set +CONFIG_UART1_SERIALDRIVER=y # CONFIG_UART2_SERIALDRIVER is not set # CONFIG_UART3_SERIALDRIVER is not set # CONFIG_UART4_SERIALDRIVER is not set @@ -345,11 +361,29 @@ CONFIG_DEV_LOWCONSOLE=y # CONFIG_USART7_SERIALDRIVER is not set # CONFIG_USART8_SERIALDRIVER is not set # CONFIG_OTHER_UART_SERIALDRIVER is not set -# CONFIG_MCU_SERIAL is not set +CONFIG_MCU_SERIAL=y +# CONFIG_STANDARD_SERIAL is not set # CONFIG_SERIAL_IFLOWCONTROL is not set # CONFIG_SERIAL_OFLOWCONTROL is not set # CONFIG_SERIAL_DMA is not set +# CONFIG_SERIAL_TIOCSERGSTRUCT is not set # CONFIG_ARCH_HAVE_SERIAL_TERMIOS is not set +CONFIG_UART1_SERIAL_CONSOLE=y +# CONFIG_OTHER_SERIAL_CONSOLE is not set +# CONFIG_NO_SERIAL_CONSOLE is not set + +# +# UART1 Configuration +# +CONFIG_UART1_RXBUFSIZE=256 +CONFIG_UART1_TXBUFSIZE=256 +CONFIG_UART1_BAUD=115200 +CONFIG_UART1_BITS=8 +CONFIG_UART1_PARITY=0 +CONFIG_UART1_2STOP=0 +# CONFIG_UART1_IFLOWCONTROL is not set +# CONFIG_UART1_OFLOWCONTROL is not set +# CONFIG_UART1_DMA is not set # CONFIG_PSEUDOTERM is not set # CONFIG_USBDEV is not set # CONFIG_USBHOST is not set @@ -364,7 +398,7 @@ CONFIG_DEV_LOWCONSOLE=y # CONFIG_RAMLOG is not set # CONFIG_SYSLOG_INTBUFFER is not set # CONFIG_SYSLOG_TIMESTAMP is not set -# CONFIG_SYSLOG_SERIAL_CONSOLE is not set +CONFIG_SYSLOG_SERIAL_CONSOLE=y # CONFIG_SYSLOG_CHAR is not set CONFIG_SYSLOG_CONSOLE=y # CONFIG_SYSLOG_NONE is not set @@ -446,6 +480,8 @@ CONFIG_NUNGET_CHARS=0 # CONFIG_LIBC_FLOATINGPOINT is not set # CONFIG_LIBC_LONG_LONG is not set # CONFIG_LIBC_IOCTL_VARIADIC is not set +# CONFIG_LIBC_WCHAR is not set +# CONFIG_LIBC_LOCALE is not set CONFIG_LIB_RAND_ORDER=1 # CONFIG_EOL_IS_CR is not set # CONFIG_EOL_IS_LF is not set @@ -489,6 +525,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512 # # Examples # +# CONFIG_EXAMPLES_CCTYPE is not set # CONFIG_EXAMPLES_CHAT is not set # CONFIG_EXAMPLES_CONFIGDATA is not set # CONFIG_EXAMPLES_DHCPD is not set From 50efe4a906f82eda23b9dc9d4ed75e683bcd2bbd Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 11:17:12 -0600 Subject: [PATCH 16/32] LM32: Add a fake IRQ number for a software interrupt. --- arch/misoc/include/irq.h | 6 ++++- arch/misoc/src/lm32/lm32_decodeirq.c | 2 +- arch/misoc/src/lm32/lm32_irq.c | 40 ++++++++++++++++++++++------ 3 files changed, 38 insertions(+), 10 deletions(-) diff --git a/arch/misoc/include/irq.h b/arch/misoc/include/irq.h index 1fbf884fc3b..a21987b00a4 100644 --- a/arch/misoc/include/irq.h +++ b/arch/misoc/include/irq.h @@ -53,7 +53,11 @@ * Pre-processor Definitions ****************************************************************************/ -#define NR_IRQS 32 +/* 32 True interrupts plus the sofware interrupt */ + +#define MISOC_NINTERRUPTS 32 +#define MISOC_IRQ_SWINT 32 +#define NR_IRQS 33 /**************************************************************************** * Public Function Prototypes diff --git a/arch/misoc/src/lm32/lm32_decodeirq.c b/arch/misoc/src/lm32/lm32_decodeirq.c index bdf0abe240d..0df3f73ed96 100644 --- a/arch/misoc/src/lm32/lm32_decodeirq.c +++ b/arch/misoc/src/lm32/lm32_decodeirq.c @@ -77,7 +77,7 @@ uint32_t *lm32_decodeirq(uint32_t *regs) /* Decode and dispatch interrupts */ - for (irq = 0; irq < NR_IRQS & instat != 0; i++) + for (irq = 0; irq < MISOC_NINTERRUPTS & instat != 0; i++) { uint32_t bit = (1 << irq); diff --git a/arch/misoc/src/lm32/lm32_irq.c b/arch/misoc/src/lm32/lm32_irq.c index d64623dfa3e..4218d8872b2 100644 --- a/arch/misoc/src/lm32/lm32_irq.c +++ b/arch/misoc/src/lm32/lm32_irq.c @@ -74,6 +74,13 @@ void lm32_irq_initialize(void) irq_setie(1); } +/**************************************************************************** + * Name: up_irq_save + * + * Description: + * + ****************************************************************************/ + irqstate_t up_irq_save(void) { irqstate_t flags; @@ -88,6 +95,13 @@ irqstate_t up_irq_save(void) return flags; } +/**************************************************************************** + * Name: up_irq_restore + * + * Description: + * + ****************************************************************************/ + void up_irq_restore(irqstate_t flags) { /* Restore the interrupt state returned by up_save_irq() */ @@ -109,11 +123,16 @@ void up_disable_irq(int irq) DEBUGASSERT(irq >= 0 && irq < NR_IRQS); - /* Disable interrupts by clearing the bit that corresponds to the irq */ + /* Ignore any attempt to disable software interrupts */ - flags = irq_getmask(); - flags &= ~(1 << irq); - irq_setmask(flags); + if (irq < MISOC_NINTERRUPTS) + { + /* Disable interrupts by clearing the bit that corresponds to the irq */ + + flags = irq_getmask(); + flags &= ~(1 << irq); + irq_setmask(flags); + } } /**************************************************************************** @@ -129,9 +148,14 @@ void up_enable_irq(int irq) irqstate_t flags; DEBUGASSERT(irq >= 0 && irq < NR_IRQS); - /* Enable interrupts by setting the bit that corresponds to the irq */ + /* Ignore any attempt to enable software interrupts */ - flags = irq_getmask(); - flags |= (1 << irq); - irq_setmask(flags); + if (irq < MISOC_NINTERRUPTS) + { + /* Enable interrupts by setting the bit that corresponds to the irq */ + + flags = irq_getmask(); + flags |= (1 << irq); + irq_setmask(flags); + } } From 8fe916e13384fd9f7a76fde167cea38470e3bf2e Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 11:23:33 -0600 Subject: [PATCH 17/32] Attach the software interrupt handler when interrupts are intialized. --- arch/misoc/src/lm32/lm32_irq.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/misoc/src/lm32/lm32_irq.c b/arch/misoc/src/lm32/lm32_irq.c index 4218d8872b2..dab24189e66 100644 --- a/arch/misoc/src/lm32/lm32_irq.c +++ b/arch/misoc/src/lm32/lm32_irq.c @@ -69,6 +69,10 @@ void lm32_irq_initialize(void) g_current_regs = NULL; + /* Attach the software interrupt */ + + (void)irq_attach(MISOC_IRQ_SWINT, lm32_swint); + /* Enable interrupts */ irq_setie(1); From 45caca804a01205cb7cebb1e21dda76419d183a6 Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Fri, 4 Nov 2016 14:04:43 -0600 Subject: [PATCH 18/32] LM32: Progress on interrupt and serial driver. --- arch/misoc/Kconfig | 12 +- arch/misoc/src/common/misoc.h | 64 ++ arch/misoc/src/common/misoc_mdelay.c | 70 ++ arch/misoc/src/common/misoc_serial.c | 685 ++++++++++++++++++++ arch/misoc/src/lm32/Make.defs | 2 +- arch/misoc/src/lm32/Toolchain.defs | 4 +- arch/misoc/src/lm32/lm32.h | 21 +- arch/misoc/src/lm32/lm32_config.h | 97 +++ arch/misoc/src/lm32/lm32_decodeirq.c | 10 +- arch/misoc/src/lm32/lm32_doirq.c | 3 + arch/misoc/src/lm32/lm32_initialize.c | 5 +- arch/misoc/src/lm32/lm32_swint.c | 18 +- arch/misoc/src/lm32/lm32_vectors.S | 148 ++--- configs/misoc/include/generated/csr.h | 537 ++++++--------- configs/misoc/include/generated/mem.h | 45 +- configs/misoc/include/generated/regions.ld | 3 +- configs/misoc/include/generated/sdram_phy.h | 168 ++--- 17 files changed, 1270 insertions(+), 622 deletions(-) create mode 100644 arch/misoc/src/common/misoc.h create mode 100644 arch/misoc/src/common/misoc_mdelay.c create mode 100644 arch/misoc/src/common/misoc_serial.c create mode 100644 arch/misoc/src/lm32/lm32_config.h diff --git a/arch/misoc/Kconfig b/arch/misoc/Kconfig index f0acc68046b..615b741c52b 100644 --- a/arch/misoc/Kconfig +++ b/arch/misoc/Kconfig @@ -11,7 +11,7 @@ choice config ARCH_CHIP_LM32 bool "LM32" - select MISOC_HAVE_UART0 + select MISOC_HAVE_UART1 ---help--- LM32 Chip Selected @@ -32,15 +32,15 @@ menu "MISOC Peripheral Support" # These "hidden" settings determine is a peripheral option is available for the # selection MCU -config MISOC_HAVE_UART0 +config MISOC_HAVE_UART1 bool default n - select UART0_SERIALDRIVER + select UART1_SERIALDRIVER -config MISOC_UART0 - bool "UART0" +config MISOC_UART1 + bool "UART1" default n - select ARCH_HAVE_UART0 + select ARCH_HAVE_UART1 select MISOC_UART endmenu # MISOC Peripheral Support diff --git a/arch/misoc/src/common/misoc.h b/arch/misoc/src/common/misoc.h new file mode 100644 index 00000000000..d487babab26 --- /dev/null +++ b/arch/misoc/src/common/misoc.h @@ -0,0 +1,64 @@ +/**************************************************************************** + * arch/misoc/src/common/serial.h + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +#ifndef __ARCH_MISOC_SRC_COMMON_MISOC_H +#define __ARCH_MISOC_SRC_COMMON_MISOC_H + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +#ifndef __ASSEMBLY__ + +/**************************************************************************** + * Name: up_serialinit + * + * Description: + * Register serial console and serial ports. This assumes that + * misoc_earlyserialinit was called previously. + * + ****************************************************************************/ + +void misoc_serial_initialize(void); + +#endif /* __ASSEMBLY__ */ +#endif /* __ARCH_MISOC_SRC_COMMON_MISOC_H */ diff --git a/arch/misoc/src/common/misoc_mdelay.c b/arch/misoc/src/common/misoc_mdelay.c new file mode 100644 index 00000000000..2a1ccaa1a14 --- /dev/null +++ b/arch/misoc/src/common/misoc_mdelay.c @@ -0,0 +1,70 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_mdelay.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_mdelay + * + * Description: + * Delay inline for the requested number of milliseconds. + * *** NOT multi-tasking friendly *** + * + * ASSUMPTIONS: + * The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated + * + ****************************************************************************/ + +void up_mdelay(unsigned int milliseconds) +{ + volatile int i; + volatile int j; + + for (i = 0; i < milliseconds; i++) + { + for (j = 0; j < CONFIG_BOARD_LOOPSPERMSEC; j++) + { + } + } +} diff --git a/arch/misoc/src/common/misoc_serial.c b/arch/misoc/src/common/misoc_serial.c new file mode 100644 index 00000000000..af05eb1bb18 --- /dev/null +++ b/arch/misoc/src/common/misoc_serial.c @@ -0,0 +1,685 @@ +/**************************************************************************** + * arch/misoc/src/lm32/lm32_blocktask.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include + +#include + +#include "chip.h" +#include "hw/flags.h +#include "misoc.h" + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#undef HAVE_UART_DEVICE +#if defined(CONFIG_MISOC_UART1) || defined(CONFIG_MISOC_UART2) +# define HAVE_UART_DEVICE 1 +#endif + +/* Is there a serial console? There should be no more than one defined. It + * could be on any UARTn, n=1,.. CHIP_NUARTS + */ + +#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART1) +# undef CONFIG_UART2_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART2) +# undef CONFIG_UART1_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#else +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef CONFIG_UART2_SERIAL_CONSOLE +# undef HAVE_SERIAL_CONSOLE +#endif + +/* If we are not using the serial driver for the console, then we still must + * provide some minimal implementation of misoc_putc. + */ + +#ifdef USE_SERIALDRIVER + +/* Which UART with be tty0/console and which tty1? The console will always + * be ttyS0. If there is no console then will use the lowest numbered UART. + */ + +#ifdef HAVE_SERIAL_CONSOLE +# if defined(CONFIG_UART1_SERIAL_CONSOLE) +# define CONSOLE_DEV g_uart1port /* UART1 is console */ +# define TTYS0_DEV g_uart1port /* UART1 is ttyS0 */ +# undef TTYS1_DEV /* No ttyS1 */ +# define SERIAL_CONSOLE 1 +# else +# error "I'm confused... Do we have a serial console or not?" +# endif +#else +# undef CONSOLE_DEV /* No console */ +# undef CONFIG_UART1_SERIAL_CONSOLE +# if defined(CONFIG_NR5_UART1) +# define TTYS0_DEV g_uart1port /* UART1 is ttyS0 */ +# undef TTYS1_DEV /* No ttyS1 */ +# define SERIAL_CONSOLE 1 +# else +# undef TTYS0_DEV +# undef TTYS1_DEV +# endif +#endif + +/* Common initialization logic will not not know that the all of the UARTs + * have been disabled. So, as a result, we may still have to provide + * stub implementations of misoc_earlyserialinit(), misoc_serial_initialize(), and + * misoc_putc(). + */ + +#ifdef HAVE_UART_DEVICE + +/**************************************************************************** + * Private Types + ****************************************************************************/ + +struct misoc_dev_s +{ + uintptr_t uartbase; + uintptr_t rxtx_addr; + uintptr_t txfull_addr; + uintptr_t rxempty_addr; + uintptr_t ev_status_addr; + uintptr_t ev_pending_addr; + uintptr_t ev_enable_addr; + uint8_t irq; +}; + +/**************************************************************************** + * Private Function Prototypes + ****************************************************************************/ + +/* Low-level helpers */ + +static inline uint32_t misoc_serialin(struct misoc_dev_s *priv, int offset); +static inline void misoc_serialout(struct misoc_dev_s *priv, int offset, + uint32_t value); +static void misoc_restoreuartint(struct uart_dev_s *dev, uint8_t im); +static void misoc_disableuartint(struct uart_dev_s *dev, uint8_t *im); + +/* Serial driver methods */ + +static int misoc_setup(struct uart_dev_s *dev); +static void misoc_shutdown(struct uart_dev_s *dev); +static int misoc_attach(struct uart_dev_s *dev); +static void misoc_detach(struct uart_dev_s *dev); +static int misoc_uart_interrupt(int irq, void *context); +static int misoc_ioctl(struct file *filep, int cmd, unsigned long arg); +static int misoc_receive(struct uart_dev_s *dev, uint32_t *status); +static void misoc_rxint(struct uart_dev_s *dev, bool enable); +static bool misoc_rxavailable(struct uart_dev_s *dev); +static void misoc_send(struct uart_dev_s *dev, int ch); +static void misoc_txint(struct uart_dev_s *dev, bool enable); +static bool misoc_txready(struct uart_dev_s *dev); +static bool misoc_txempty(struct uart_dev_s *dev); + +/**************************************************************************** + * Private Data + ****************************************************************************/ + +static const struct uart_ops_s g_uart_ops = +{ + .setup = misoc_setup, + .shutdown = misoc_shutdown, + .attach = misoc_attach, + .detach = misoc_detach, + .ioctl = misoc_ioctl, + .receive = misoc_receive, + .rxint = misoc_rxint, + .rxavailable = misoc_rxavailable, +#ifdef CONFIG_SERIAL_IFLOWCONTROL + .rxflowcontrol = NULL, +#endif + .send = misoc_send, + .txint = misoc_txint, + .txready = misoc_txready, + .txempty = misoc_txempty, +}; + +/* I/O buffers */ + +#ifdef CONFIG_MISOC_UART1 +static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE]; +static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE]; +#endif + +/* This describes the state of the NR5 UART1 port. */ + +#ifdef CONFIG_MISOC_UART1 +#ifndef CONFIG_MISOC_UART1PRIO +# define CONFIG_MISOC_UART1PRIO 4 +#endif + +static struct misoc_dev_s g_uart1priv = +{ + .uartbase = CSR_UART_BASE, + .irq = UART_INTERRUPT, + .rxtx_addr = CSR_UART_RXTX_ADDR, + .rxempty_addr = CSR_UART_RXEMPTY_ADDR, + .txfull_addr = CSR_UART_TXFULL_ADDR, + .ev_status_addr = CSR_UART_EV_STATUS_ADDR, + .ev_pending_addr = CSR_UART_EV_PENDING_ADDR, + .ev_enable_addr = CSR_UART_EV_ENABLE_ADDR, +}; + +static uart_dev_t g_uart1port = +{ +#if SERIAL_CONSOLE == 1 + .isconsole = 1, +#endif + .recv = + { + .size = CONFIG_UART1_RXBUFSIZE, + .buffer = g_uart1rxbuffer, + }, + .xmit = + { + .size = CONFIG_UART1_TXBUFSIZE, + .buffer = g_uart1txbuffer, + }, + .ops = &g_uart_ops, + .priv = &g_uart1priv, +}; +#endif + +/**************************************************************************** + * Private Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: misoc_restoreuartint + ****************************************************************************/ + +static void misoc_restoreuartint(struct uart_dev_s *dev, uint8_t im) +{ + /* Re-enable/re-disable interrupts corresponding to the state of bits in + * im. + */ + + uart_ev_enable_write(im); +} + +/**************************************************************************** + * Name: misoc_disableuartint + ****************************************************************************/ + +static void misoc_disableuartint(struct uart_dev_s *dev, uint8_t *im) +{ + struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv; + + if (im) + { + *im = uart_ev_enable_read(); + } + + misoc_restoreuartint(dev, 0); +} + +/**************************************************************************** + * Name: misoc_setup + * + * Description: + * Configure the UART baud, bits, parity, etc. This method is called the + * first time that the serial port is opened. + * + ****************************************************************************/ + +static int misoc_setup(struct uart_dev_s *dev) +{ + uart_ev_pending_write(uart_ev_pending_read()); + return OK; +} + +/**************************************************************************** + * Name: misoc_shutdown + * + * Description: + * Disable the UART. This method is called when the serial + * port is closed + * + ****************************************************************************/ + +static void misoc_shutdown(struct uart_dev_s *dev) +{ +} + +/**************************************************************************** + * Name: misoc_attach + * + * Description: + * Configure the UART to operation in interrupt driven mode. This method is + * called when the serial port is opened. Normally, this is just after the + * the setup() method is called, however, the serial console may operate in + * a non-interrupt driven mode during the boot phase. + * + * RX and TX interrupts are not enabled by the attach method (unless the + * hardware supports multiple levels of interrupt enabling). The RX and TX + * interrupts are not enabled until the txint() and rxint() methods are called. + * + ****************************************************************************/ + +static int misoc_attach(struct uart_dev_s *dev) +{ + struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv; + uint32_t im; + + irq_attach(priv->irq, misoc_uart_interrupt); + + /* enable interrupt */ + /* TODO: move that somewhere proper ! */ + + im = irq_getmask(); + im |= (1 << UART_INTERRUPT); + irq_setmask(im); + + return OK; +} + +/**************************************************************************** + * Name: misoc_detach + * + * Description: + * Detach UART interrupts. This method is called when the serial port is + * closed normally just before the shutdown method is called. The exception + * is the serial console which is never shutdown. + * + ****************************************************************************/ + +static void misoc_detach(struct uart_dev_s *dev) +{ + struct misoc_dev_s *priv = (struct misoc_dev_s *)dev->priv; + uint32_t im; + + /* TODO: move that somewhere proper */ + + im = irq_getmask(); + im &= ~(1 << UART_INTERRUPT); + irq_setmask(im); + + irq_detach(priv->irq); +} + +/**************************************************************************** + * Name: misoc_interrupt + * + * Description: + * This is the UART interrupt handler. It will be invoked when an + * interrupt received on the 'irq' It should call uart_transmitchars or + * uart_receivechar to perform the appropriate data transfers. The + * interrupt handling logic must be able to map the 'irq' number into the + * approprite uart_dev_s structure in order to call these functions. + * + ****************************************************************************/ + +static int misoc_uart_interrupt(int irq, void *context) +{ + uint32_t stat; + struct uart_dev_s *dev = NULL; + int i; + + dev = &g_uart1port; + + /* Read as much as we can */ + + stat = uart_ev_pending_read(); + if (stat & UART_EV_RX) + { + while (!uart_rxempty_read()) + { + uart_recvchars(dev); + } + } + + /* Try to send all the buffer that were not sent. Does uart_xmitchars + * send only if there is something to send ??? + */ + + if ((stat & UART_EV_TX) != 0) + { + uart_ev_pending_write(UART_EV_TX); + uart_xmitchars(dev); + } + + return OK; +} + +/**************************************************************************** + * Name: misoc_ioctl + * + * Description: + * All ioctl calls will be routed through this method + * + ****************************************************************************/ + +static int misoc_ioctl(struct file *filep, int cmd, unsigned long arg) +{ +#ifdef CONFIG_SERIAL_TERMIOS + return -ENOSYS; +#else + return -ENOTTY; +#endif +} + +/**************************************************************************** + * Name: misoc_receive + * + * Description: + * Called (usually) from the interrupt level to receive one + * character from the UART. Error bits associated with the + * receipt are provided in the return 'status'. + * + ****************************************************************************/ + +static int misoc_receive(struct uart_dev_s *dev, uint32_t *status) +{ + int ret; + + if (status != NULL) + { + *status = 0; + } + + ret = uart_rxtx_read(); + + uart_ev_pending_write(UART_EV_RX); + + return ret; +} + +/**************************************************************************** + * Name: misoc_rxint + * + * Description: + * Call to enable or disable RX interrupts + * + ****************************************************************************/ + +static void misoc_rxint(struct uart_dev_s *dev, bool enable) +{ + uint8_t im; + + im = uart_ev_enable_read(); + if (enable) + { + im |= UART_EV_RX; + } + else + { + im &= ~UART_EV_RX; + } + + uart_ev_enable_write(im); +} + +/**************************************************************************** + * Name: misoc_rxavailable + * + * Description: + * Return true if the receive register is not empty + * + ****************************************************************************/ + +static bool misoc_rxavailable(struct uart_dev_s *dev) +{ + return !uart_rxempty_read(); +} + +/**************************************************************************** + * Name: misoc_send + * + * Description: + * This method will send one byte on the UART. + * + ****************************************************************************/ + +static void misoc_send(struct uart_dev_s *dev, int ch) +{ + uart_rxtx_write(ch); +} + +/**************************************************************************** + * Name: misoc_txint + * + * Description: + * Call to enable or disable TX interrupts + * + ****************************************************************************/ + +static void misoc_txint(struct uart_dev_s *dev, bool enable) +{ + uint8_t im; + int i; + + im = uart_ev_enable_read(); + if (enable) + { + im |= UART_EV_TX; + uart_ev_enable_write(im); + + /* Fake an uart INT */ + + uart_xmitchars(dev); + } + else + { + im &= ~UART_EV_TX; + uart_ev_enable_write(im); + } +} + +/**************************************************************************** + * Name: misoc_txready + * + * Description: + * Return true if the tranmsit data register is empty + * + ****************************************************************************/ + +static bool misoc_txready(struct uart_dev_s *dev) +{ + return !uart_txfull_read(); +} + +/**************************************************************************** + * Name: misoc_txempty + * + * Description: + * Return true if the tranmsit data register is empty + * + ****************************************************************************/ + +static bool misoc_txempty(struct uart_dev_s *dev) +{ + return !uart_txfull_read(); +} + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: misoc_earlyserialinit + * + * Description: + * Performs the low level UART initialization early in debug so that the + * serial console will be available during bootup. This must be called + * before misoc_serial_initialize. + * + ****************************************************************************/ + +void misoc_earlyserialinit(void) +{ +} + +/**************************************************************************** + * Name: misoc_putc + * + * Description: + * Provide priority, low-level access to support OS debug writes + * + ****************************************************************************/ + +int up_putc(int ch) +{ +#ifdef HAVE_SERIAL_CONSOLE + struct uart_dev_s *dev = (struct uart_dev_s *)&CONSOLE_DEV; + uint8_t imr; + + misoc_disableuartint(dev, &imr); + + /* Check for LF */ + + if (ch == '\n') + { + /* Add CR */ + + misoc_lowputc('\r'); + } + + misoc_lowputc(ch); + misoc_restoreuartint(dev, imr); +#endif + return ch; +} + +/**************************************************************************** + * Name: misoc_earlyserialinit, misoc_serial_initialize, and misoc_putc + * + * Description: + * stubs that may be needed. These stubs would be used if all UARTs are + * disabled. In that case, the logic in common/misoc_initialize() is not + * smart enough to know that there are not UARTs and will still expect + * these interfaces to be provided. + * + ****************************************************************************/ + +#else /* HAVE_UART_DEVICE */ +void misoc_earlyserialinit(void) +{ +} + +void misoc_serial_initialize(void) +{ +} + +int up_putc(int ch) +{ + return ch; +} + +#endif /* HAVE_UART_DEVICE */ +#else /* USE_SERIALDRIVER */ + +/**************************************************************************** + * Name: misoc_putc + * + * Description: + * Provide priority, low-level access to support OS debug writes + * + ****************************************************************************/ + +int up_putc(int ch) +{ +#ifdef HAVE_SERIAL_CONSOLE + /* Check for LF */ + + if (ch == '\n') + { + /* Add CR */ + + misoc_lowputc('\r'); + } + + misoc_lowputc(ch); +#endif + + return ch; +} + +#endif /* USE_SERIALDRIVER */ + +void misoc_lowputc(char ch) +{ + while (uart_txfull_read()); + uart_rxtx_write(ch); + uart_ev_pending_write(UART_EV_TX); +} + +/**************************************************************************** + * Name: misoc_serial_initialize + * + * Description: + * Register serial console and serial ports. This assumes + * that misoc_earlyserialinit was called previously. + * + ****************************************************************************/ + +void misoc_serial_initialize(void) +{ +#ifdef USE_SERIALDRIVER + /* Register the console */ + +#ifdef HAVE_SERIAL_CONSOLE + (void)uart_register("/dev/console", &CONSOLE_DEV); +#endif + + /* Register all UARTs */ + (void)uart_register("/dev/ttyS0", &TTYS0_DEV); +#endif +} diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs index cc4b72da664..4548e6fe32f 100644 --- a/arch/misoc/src/lm32/Make.defs +++ b/arch/misoc/src/lm32/Make.defs @@ -37,7 +37,7 @@ HEAD_ASRC = lm32_vectors.S CMN_ASRCS = -CMN_CSRCS = misoc_uart.c +CMN_CSRCS = misoc_serial.c misoc_mdelay.c CHIP_ASRCS = lm32_syscall.S diff --git a/arch/misoc/src/lm32/Toolchain.defs b/arch/misoc/src/lm32/Toolchain.defs index e0227e2e16e..f59fa1ab45e 100644 --- a/arch/misoc/src/lm32/Toolchain.defs +++ b/arch/misoc/src/lm32/Toolchain.defs @@ -87,8 +87,8 @@ endif # Generic GNU toolchain on OS X, Linux or any typical Posix system ifeq ($(CONFIG_LM32_TOOLCHAIN),GNUL) - CROSSDEV ?= lm32-elf-- - ARCROSSDEV ?= lm32-elf-- + CROSSDEV ?= lm32-elf- + ARCROSSDEV ?= lm32-elf- MAXOPTIMIZATION ?= -Os endif diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h index 280c2ff17fc..ddfd2320e19 100644 --- a/arch/misoc/src/lm32/lm32.h +++ b/arch/misoc/src/lm32/lm32.h @@ -34,8 +34,8 @@ * ****************************************************************************/ -#ifndef __ARCH_MISOC_SRC_COMMON_LM32_H -#define __ARCH_MISOC_SRC_COMMON_LM32_H +#ifndef __ARCH_MISOC_SRC_LM32_LM32_H +#define __ARCH_MISOC_SRC_LM32_LM32_H /**************************************************************************** * Included Files @@ -141,13 +141,17 @@ void lm32_copystate(uint32_t *dest, uint32_t *src); void lm32_irq_initialize(void); -/* System timer *************************************************************/ +/* Interrupt decode *********************************************************/ -void lm32_timer_initialize(void); +uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs); /* Software interrupts ******************************************************/ -uint32_t *lm32_swint(int irq, FAR void *context); +int lm32_swint(int irq, FAR void *context); + +/* System timer *************************************************************/ + +void lm32_timer_initialize(void); /* Signal handling **********************************************************/ @@ -163,10 +167,5 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits); void lm32_dumpstate(void); -#undef EXTERN -#ifdef __cplusplus -} -#endif #endif /* __ASSEMBLY__ */ - -#endif /* __ARCH_MISOC_SRC_COMMON_LM32_H */ +#endif /* __ARCH_MISOC_SRC_LM32_LM32_H */ diff --git a/arch/misoc/src/lm32/lm32_config.h b/arch/misoc/src/lm32/lm32_config.h new file mode 100644 index 00000000000..5b0d5d9b03f --- /dev/null +++ b/arch/misoc/src/lm32/lm32_config.h @@ -0,0 +1,97 @@ +/************************************************************************************ + * arch/misoc/src/lm32/lm32_config.h + * + * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Modified for LM32: + * + * Copyright (C) 2016 Ramin Amin. All rights reserved. + * Author: Ramtin Amin + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H +#define __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include + +#include +#include + +/************************************************************************************ + * Pre-processor Definitions + ************************************************************************************/ +/* UARTs ****************************************************************************/ + +/* Are any UARTs enabled? */ + +#undef HAVE_UART_DEVICE +#if defined(CONFIG_MISOC_UART1) || defined(CONFIG_MISOC_UART2) +# define HAVE_UART_DEVICE 1 +#endif + +/* Is there a serial console? There should be no more than one defined. It + * could be on any UARTn, n=1,.. CHIP_NUARTS + */ + +#if defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART1) +# undef CONFIG_UART2_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_MISOC_UART2) +# undef CONFIG_UART1_SERIAL_CONSOLE +# define HAVE_SERIAL_CONSOLE 1 +#else +# undef CONFIG_UART1_SERIAL_CONSOLE +# undef CONFIG_UART2_SERIAL_CONSOLE +# undef HAVE_SERIAL_CONSOLE +#endif + +/************************************************************************************ + * Public Types + ************************************************************************************/ + +/************************************************************************************ + * Public Data + ************************************************************************************/ + +/************************************************************************************ + * Inline Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +#endif /* __ARCH_MISOC_SRC_LM32_LM32_CONFIG_H */ diff --git a/arch/misoc/src/lm32/lm32_decodeirq.c b/arch/misoc/src/lm32/lm32_decodeirq.c index 0df3f73ed96..198445deeda 100644 --- a/arch/misoc/src/lm32/lm32_decodeirq.c +++ b/arch/misoc/src/lm32/lm32_decodeirq.c @@ -61,18 +61,10 @@ * ****************************************************************************/ -uint32_t *lm32_decodeirq(uint32_t *regs) +uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs) { - uint32_t intstat; int irq; - /* Read the pending interrupts */ - /* REVISIT: How do I get the interupt status */ -#warning Missing logic - intstat = 0; - - /* REVIST: Do I need to mask the interrupt status with the IM? */ - irqinfo("intstat=%08lx\n", (unsigned long)intstat); /* Decode and dispatch interrupts */ diff --git a/arch/misoc/src/lm32/lm32_doirq.c b/arch/misoc/src/lm32/lm32_doirq.c index e318a65adf7..25cc30e2a04 100644 --- a/arch/misoc/src/lm32/lm32_doirq.c +++ b/arch/misoc/src/lm32/lm32_doirq.c @@ -42,10 +42,13 @@ #include #include +#include #include #include #include + +#include #include #include "group/group.h" diff --git a/arch/misoc/src/lm32/lm32_initialize.c b/arch/misoc/src/lm32/lm32_initialize.c index 4efa2ecbf00..23e6e8fc1f0 100644 --- a/arch/misoc/src/lm32/lm32_initialize.c +++ b/arch/misoc/src/lm32/lm32_initialize.c @@ -57,6 +57,7 @@ #include +#include "misoc.h" #include "lm32.h" /**************************************************************************** @@ -71,7 +72,7 @@ void up_initialize(void) /* Initialize the serial driver */ -#warning REVISIT: Here you should all lm32_serial_initialize(). That initializes the entire serial driver, a part of the operation is the uart initialization. +#warning REVISIT: Here you should all misoc_serial_initialize(). That initializes the entire serial driver, a part of the operation is the uart initialization. - uart_init(); + misoc_serial_initialize(); } diff --git a/arch/misoc/src/lm32/lm32_swint.c b/arch/misoc/src/lm32/lm32_swint.c index 9e5f932d466..cdfbeeb389e 100644 --- a/arch/misoc/src/lm32/lm32_swint.c +++ b/arch/misoc/src/lm32/lm32_swint.c @@ -130,7 +130,7 @@ static void dispatch_syscall(void) * ****************************************************************************/ -uint32_t *lm32_swint(int irq, FAR void *context) +int lm32_swint(int irq, FAR void *context) { uint32_t *regs = (uint32_t *)context; @@ -313,19 +313,5 @@ uint32_t *lm32_swint(int irq, FAR void *context) } #endif - /* If a context switch occurred while processing the interrupt then - * g_current_regs may have change value. If we return any value different - * from the input regs, then the lower level will know that a context - * switch occurred during interrupt processing. - */ - - regs = (uint32_t *)g_current_regs; - - /* Set g_current_regs to NULL to indicate that we are no longer in an - * interrupt handler. - */ - - g_current_regs = NULL; - - return regs; + return OK; } diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index f5010599979..a7d7d9b6218 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -143,101 +143,103 @@ _do_reset: .clearBSS: be r1, r3, .callMain - sw (r1+0), r0 - addi r1, r1, 4 + sw (r1+0), r0 + addi r1, r1, 4 bi .clearBSS .callMain: bi os_start .save_all: - addi sp, sp, -136 - sw (sp+REG_X0), r0 - sw (sp+REG_X1), r1 - sw (sp+REG_X2), r2 - sw (sp+REG_X3), r3 - sw (sp+REG_X4), r4 - sw (sp+REG_X5), r5 - sw (sp+REG_X6), r6 - sw (sp+REG_X7), r7 - sw (sp+REG_X8), r8 - sw (sp+REG_X9), r9 - sw (sp+REG_X10), r10 - sw (sp+REG_X11), r11 - sw (sp+REG_X12), r12 - sw (sp+REG_X13), r13 - sw (sp+REG_X14), r14 - sw (sp+REG_X15), r15 - sw (sp+REG_X16), r16 - sw (sp+REG_X17), r17 - sw (sp+REG_X18), r18 - sw (sp+REG_X19), r19 - sw (sp+REG_X20), r20 - sw (sp+REG_X21), r21 - sw (sp+REG_X22), r22 - sw (sp+REG_X23), r23 - sw (sp+REG_X24), r24 - sw (sp+REG_X25), r25 + addi sp, sp, -136 + sw (sp+REG_X0), r0 + sw (sp+REG_X1), r1 + sw (sp+REG_X2), r2 + sw (sp+REG_X3), r3 + sw (sp+REG_X4), r4 + sw (sp+REG_X5), r5 + sw (sp+REG_X6), r6 + sw (sp+REG_X7), r7 + sw (sp+REG_X8), r8 + sw (sp+REG_X9), r9 + sw (sp+REG_X10), r10 + sw (sp+REG_X11), r11 + sw (sp+REG_X12), r12 + sw (sp+REG_X13), r13 + sw (sp+REG_X14), r14 + sw (sp+REG_X15), r15 + sw (sp+REG_X16), r16 + sw (sp+REG_X17), r17 + sw (sp+REG_X18), r18 + sw (sp+REG_X19), r19 + sw (sp+REG_X20), r20 + sw (sp+REG_X21), r21 + sw (sp+REG_X22), r22 + sw (sp+REG_X23), r23 + sw (sp+REG_X24), r24 + sw (sp+REG_X25), r25 - sw (sp+REG_GP), r26 - sw (sp+REG_FP), r27 - sw (sp+REG_SP), r28 + sw (sp+REG_GP), r26 + sw (sp+REG_FP), r27 + sw (sp+REG_SP), r28 /* reg RA done later */ - sw (sp+REG_EA), r30 - sw (sp+REG_BA), r31 + sw (sp+REG_EA), r30 + sw (sp+REG_BA), r31 /* ra needs to be moved from initial stack location */ - lw r1, (sp+ 136) - sw (sp+REG_RA), r1 + w r1, (sp+ 136) + sw (sp+REG_RA), r1 + + /* Get IE/REG_INT_CTX */ - /* get IE/REG_INT_CTX */ rcsr r1, IE - sw (sp+REG_INT_CTX), r1 + sw (sp+REG_INT_CTX), r1 - /* the 2nd argument is the regs pointer */ - addi r2, sp, 0 + /* The 2nd argument is the regs pointer */ + + addi r2, sp, 0 ret .restore_all_and_eret: /* r1 should have the place where we restore ! */ - lw r2, (r1+REG_X2) - lw r3, (r1+REG_X3) - lw r4, (r1+REG_X4) - lw r5, (r1+REG_X5) - lw r6, (r1+REG_X6) - lw r7, (r1+REG_X7) - lw r8, (r1+REG_X8) - lw r9, (r1+REG_X9) - lw r10, (r1+REG_X10) - lw r11, (r1+REG_X11) - lw r12, (r1+REG_X12) - lw r13, (r1+REG_X13) - lw r14, (r1+REG_X14) - lw r15, (r1+REG_X15) - lw r16, (r1+REG_X16) - lw r17, (r1+REG_X17) - lw r18, (r1+REG_X18) - lw r19, (r1+REG_X19) - lw r20, (r1+REG_X20) - lw r21, (r1+REG_X21) - lw r22, (r1+REG_X22) - lw r23, (r1+REG_X23) - lw r24, (r1+REG_X24) - lw r25, (r1+REG_X25) - lw r26, (r1+REG_GP) - lw r27, (r1+REG_FP) - lw r28, (r1+REG_SP) - lw r29, (r1+REG_RA) - lw r30, (r1+REG_EA) - lw r31, (r1+REG_BA) - lw r1, (r1+REG_INT_CTX) + w r2, (r1+REG_X2) + w r3, (r1+REG_X3) + w r4, (r1+REG_X4) + w r5, (r1+REG_X5) + w r6, (r1+REG_X6) + w r7, (r1+REG_X7) + w r8, (r1+REG_X8) + w r9, (r1+REG_X9) + w r10, (r1+REG_X10) + w r11, (r1+REG_X11) + w r12, (r1+REG_X12) + w r13, (r1+REG_X13) + w r14, (r1+REG_X14) + w r15, (r1+REG_X15) + w r16, (r1+REG_X16) + w r17, (r1+REG_X17) + w r18, (r1+REG_X18) + w r19, (r1+REG_X19) + w r20, (r1+REG_X20) + w r21, (r1+REG_X21) + w r22, (r1+REG_X22) + w r23, (r1+REG_X23) + w r24, (r1+REG_X24) + w r25, (r1+REG_X25) + w r26, (r1+REG_GP) + w r27, (r1+REG_FP) + w r28, (r1+REG_SP) + w r29, (r1+REG_RA) + w r30, (r1+REG_EA) + w r31, (r1+REG_BA) + lw r1, (r1+REG_INT_CTX) wcsr IE, r1 - lw r1, (r1+REG_X1) - addi sp, sp, 136 + w r1, (r1+REG_X1) + addi sp, sp, 136 eret /* This global variable is unsigned long g_idle_topstack and is diff --git a/configs/misoc/include/generated/csr.h b/configs/misoc/include/generated/csr.h index 64bd1915a1a..abfa8b39cdc 100644 --- a/configs/misoc/include/generated/csr.h +++ b/configs/misoc/include/generated/csr.h @@ -1,397 +1,250 @@ -/**************************************************************************** - * configs/misoc/include/generated/csr.h - * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Ramtin Amin - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_CSR_H -#define __CONFIGS_MISOC_INCLUDE_GENERATED_CSR_H - -/**************************************************************************** - * Included Files - ****************************************************************************/ - -#include "hw/common.h" - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ - -/* SDRAM */ +#ifndef __GENERATED_CSR_H +#define __GENERATED_CSR_H +#include +/* sdram */ #define CSR_SDRAM_BASE 0xe0004000 #define CSR_SDRAM_DFII_CONTROL_ADDR 0xe0004000 #define CSR_SDRAM_DFII_CONTROL_SIZE 1 - +static inline unsigned char sdram_dfii_control_read(void) { + unsigned char r = MMPTR(0xe0004000); + return r; +} +static inline void sdram_dfii_control_write(unsigned char value) { + MMPTR(0xe0004000) = value; +} #define CSR_SDRAM_DFII_PI0_COMMAND_ADDR 0xe0004004 #define CSR_SDRAM_DFII_PI0_COMMAND_SIZE 1 - +static inline unsigned char sdram_dfii_pi0_command_read(void) { + unsigned char r = MMPTR(0xe0004004); + return r; +} +static inline void sdram_dfii_pi0_command_write(unsigned char value) { + MMPTR(0xe0004004) = value; +} #define CSR_SDRAM_DFII_PI0_COMMAND_ISSUE_ADDR 0xe0004008 #define CSR_SDRAM_DFII_PI0_COMMAND_ISSUE_SIZE 1 - +static inline unsigned char sdram_dfii_pi0_command_issue_read(void) { + unsigned char r = MMPTR(0xe0004008); + return r; +} +static inline void sdram_dfii_pi0_command_issue_write(unsigned char value) { + MMPTR(0xe0004008) = value; +} #define CSR_SDRAM_DFII_PI0_ADDRESS_ADDR 0xe000400c #define CSR_SDRAM_DFII_PI0_ADDRESS_SIZE 2 - +static inline unsigned short int sdram_dfii_pi0_address_read(void) { + unsigned short int r = MMPTR(0xe000400c); + r <<= 8; + r |= MMPTR(0xe0004010); + return r; +} +static inline void sdram_dfii_pi0_address_write(unsigned short int value) { + MMPTR(0xe000400c) = value >> 8; + MMPTR(0xe0004010) = value; +} #define CSR_SDRAM_DFII_PI0_BADDRESS_ADDR 0xe0004014 #define CSR_SDRAM_DFII_PI0_BADDRESS_SIZE 1 - +static inline unsigned char sdram_dfii_pi0_baddress_read(void) { + unsigned char r = MMPTR(0xe0004014); + return r; +} +static inline void sdram_dfii_pi0_baddress_write(unsigned char value) { + MMPTR(0xe0004014) = value; +} #define CSR_SDRAM_DFII_PI0_WRDATA_ADDR 0xe0004018 #define CSR_SDRAM_DFII_PI0_WRDATA_SIZE 2 - +static inline unsigned short int sdram_dfii_pi0_wrdata_read(void) { + unsigned short int r = MMPTR(0xe0004018); + r <<= 8; + r |= MMPTR(0xe000401c); + return r; +} +static inline void sdram_dfii_pi0_wrdata_write(unsigned short int value) { + MMPTR(0xe0004018) = value >> 8; + MMPTR(0xe000401c) = value; +} #define CSR_SDRAM_DFII_PI0_RDDATA_ADDR 0xe0004020 #define CSR_SDRAM_DFII_PI0_RDDATA_SIZE 2 +static inline unsigned short int sdram_dfii_pi0_rddata_read(void) { + unsigned short int r = MMPTR(0xe0004020); + r <<= 8; + r |= MMPTR(0xe0004024); + return r; +} +/* timer0 */ #define CSR_TIMER0_BASE 0xe0002000 #define CSR_TIMER0_LOAD_ADDR 0xe0002000 #define CSR_TIMER0_LOAD_SIZE 4 - +static inline unsigned int timer0_load_read(void) { + unsigned int r = MMPTR(0xe0002000); + r <<= 8; + r |= MMPTR(0xe0002004); + r <<= 8; + r |= MMPTR(0xe0002008); + r <<= 8; + r |= MMPTR(0xe000200c); + return r; +} +static inline void timer0_load_write(unsigned int value) { + MMPTR(0xe0002000) = value >> 24; + MMPTR(0xe0002004) = value >> 16; + MMPTR(0xe0002008) = value >> 8; + MMPTR(0xe000200c) = value; +} #define CSR_TIMER0_RELOAD_ADDR 0xe0002010 #define CSR_TIMER0_RELOAD_SIZE 4 - +static inline unsigned int timer0_reload_read(void) { + unsigned int r = MMPTR(0xe0002010); + r <<= 8; + r |= MMPTR(0xe0002014); + r <<= 8; + r |= MMPTR(0xe0002018); + r <<= 8; + r |= MMPTR(0xe000201c); + return r; +} +static inline void timer0_reload_write(unsigned int value) { + MMPTR(0xe0002010) = value >> 24; + MMPTR(0xe0002014) = value >> 16; + MMPTR(0xe0002018) = value >> 8; + MMPTR(0xe000201c) = value; +} #define CSR_TIMER0_EN_ADDR 0xe0002020 #define CSR_TIMER0_EN_SIZE 1 - +static inline unsigned char timer0_en_read(void) { + unsigned char r = MMPTR(0xe0002020); + return r; +} +static inline void timer0_en_write(unsigned char value) { + MMPTR(0xe0002020) = value; +} #define CSR_TIMER0_UPDATE_VALUE_ADDR 0xe0002024 #define CSR_TIMER0_UPDATE_VALUE_SIZE 1 - +static inline unsigned char timer0_update_value_read(void) { + unsigned char r = MMPTR(0xe0002024); + return r; +} +static inline void timer0_update_value_write(unsigned char value) { + MMPTR(0xe0002024) = value; +} #define CSR_TIMER0_VALUE_ADDR 0xe0002028 #define CSR_TIMER0_VALUE_SIZE 4 - +static inline unsigned int timer0_value_read(void) { + unsigned int r = MMPTR(0xe0002028); + r <<= 8; + r |= MMPTR(0xe000202c); + r <<= 8; + r |= MMPTR(0xe0002030); + r <<= 8; + r |= MMPTR(0xe0002034); + return r; +} #define CSR_TIMER0_EV_STATUS_ADDR 0xe0002038 #define CSR_TIMER0_EV_STATUS_SIZE 1 - +static inline unsigned char timer0_ev_status_read(void) { + unsigned char r = MMPTR(0xe0002038); + return r; +} +static inline void timer0_ev_status_write(unsigned char value) { + MMPTR(0xe0002038) = value; +} #define CSR_TIMER0_EV_PENDING_ADDR 0xe000203c #define CSR_TIMER0_EV_PENDING_SIZE 1 - +static inline unsigned char timer0_ev_pending_read(void) { + unsigned char r = MMPTR(0xe000203c); + return r; +} +static inline void timer0_ev_pending_write(unsigned char value) { + MMPTR(0xe000203c) = value; +} #define CSR_TIMER0_EV_ENABLE_ADDR 0xe0002040 #define CSR_TIMER0_EV_ENABLE_SIZE 1 +static inline unsigned char timer0_ev_enable_read(void) { + unsigned char r = MMPTR(0xe0002040); + return r; +} +static inline void timer0_ev_enable_write(unsigned char value) { + MMPTR(0xe0002040) = value; +} +/* uart */ +#define CSR_UART_BASE 0xe0001000 +#define CSR_UART_RXTX_ADDR 0xe0001000 +#define CSR_UART_RXTX_SIZE 1 +static inline unsigned char uart_rxtx_read(void) { + unsigned char r = MMPTR(0xe0001000); + return r; +} +static inline void uart_rxtx_write(unsigned char value) { + MMPTR(0xe0001000) = value; +} #define CSR_UART_TXFULL_ADDR 0xe0001004 #define CSR_UART_TXFULL_SIZE 1 - +static inline unsigned char uart_txfull_read(void) { + unsigned char r = MMPTR(0xe0001004); + return r; +} #define CSR_UART_RXEMPTY_ADDR 0xe0001008 #define CSR_UART_RXEMPTY_SIZE 1 - +static inline unsigned char uart_rxempty_read(void) { + unsigned char r = MMPTR(0xe0001008); + return r; +} #define CSR_UART_EV_STATUS_ADDR 0xe000100c #define CSR_UART_EV_STATUS_SIZE 1 - +static inline unsigned char uart_ev_status_read(void) { + unsigned char r = MMPTR(0xe000100c); + return r; +} +static inline void uart_ev_status_write(unsigned char value) { + MMPTR(0xe000100c) = value; +} #define CSR_UART_EV_PENDING_ADDR 0xe0001010 #define CSR_UART_EV_PENDING_SIZE 1 - +static inline unsigned char uart_ev_pending_read(void) { + unsigned char r = MMPTR(0xe0001010); + return r; +} +static inline void uart_ev_pending_write(unsigned char value) { + MMPTR(0xe0001010) = value; +} #define CSR_UART_EV_ENABLE_ADDR 0xe0001014 #define CSR_UART_EV_ENABLE_SIZE 1 +static inline unsigned char uart_ev_enable_read(void) { + unsigned char r = MMPTR(0xe0001014); + return r; +} +static inline void uart_ev_enable_write(unsigned char value) { + MMPTR(0xe0001014) = value; +} +/* uart_phy */ #define CSR_UART_PHY_BASE 0xe0000800 #define CSR_UART_PHY_TUNING_WORD_ADDR 0xe0000800 #define CSR_UART_PHY_TUNING_WORD_SIZE 4 +static inline unsigned int uart_phy_tuning_word_read(void) { + unsigned int r = MMPTR(0xe0000800); + r <<= 8; + r |= MMPTR(0xe0000804); + r <<= 8; + r |= MMPTR(0xe0000808); + r <<= 8; + r |= MMPTR(0xe000080c); + return r; +} +static inline void uart_phy_tuning_word_write(unsigned int value) { + MMPTR(0xe0000800) = value >> 24; + MMPTR(0xe0000804) = value >> 16; + MMPTR(0xe0000808) = value >> 8; + MMPTR(0xe000080c) = value; +} -/* Constants */ - +/* constants */ #define UART_INTERRUPT 0 #define TIMER0_INTERRUPT 1 #define SYSTEM_CLOCK_FREQUENCY 80000000 #define L2_SIZE 8192 -/**************************************************************************** - * Inline Functions - ****************************************************************************/ - -static inline unsigned char sdram_dfii_control_read(void) -{ - unsigned char r = MMPTR(0xe0004000); - return r; -} - -static inline void sdram_dfii_control_write(unsigned char value) -{ - MMPTR(0xe0004000) = value; -} - -static inline unsigned char sdram_dfii_pi0_command_read(void) -{ - unsigned char r = MMPTR(0xe0004004); - return r; -} - -static inline void sdram_dfii_pi0_command_write(unsigned char value) -{ - MMPTR(0xe0004004) = value; -} - -static inline unsigned char sdram_dfii_pi0_command_issue_read(void) -{ - unsigned char r = MMPTR(0xe0004008); - return r; -} - -static inline void sdram_dfii_pi0_command_issue_write(unsigned char value) -{ - MMPTR(0xe0004008) = value; -} - -static inline unsigned short int sdram_dfii_pi0_address_read(void) -{ - unsigned short int r = MMPTR(0xe000400c); - r <<= 8; - r |= MMPTR(0xe0004010); - return r; -} - -static inline void sdram_dfii_pi0_address_write(unsigned short int value) -{ - MMPTR(0xe000400c) = value >> 8; - MMPTR(0xe0004010) = value; -} - -static inline unsigned char sdram_dfii_pi0_baddress_read(void) -{ - unsigned char r = MMPTR(0xe0004014); - return r; -} - -static inline void sdram_dfii_pi0_baddress_write(unsigned char value) -{ - MMPTR(0xe0004014) = value; -} - -static inline unsigned short int sdram_dfii_pi0_wrdata_read(void) -{ - unsigned short int r = MMPTR(0xe0004018); - r <<= 8; - r |= MMPTR(0xe000401c); - return r; -} - -static inline void sdram_dfii_pi0_wrdata_write(unsigned short int value) -{ - MMPTR(0xe0004018) = value >> 8; - MMPTR(0xe000401c) = value; -} - -static inline unsigned short int sdram_dfii_pi0_rddata_read(void) -{ - unsigned short int r = MMPTR(0xe0004020); - r <<= 8; - r |= MMPTR(0xe0004024); - return r; -} - -/* Timer0 */ - -static inline unsigned int timer0_load_read(void) -{ - unsigned int r = MMPTR(0xe0002000); - r <<= 8; - r |= MMPTR(0xe0002004); - r <<= 8; - r |= MMPTR(0xe0002008); - r <<= 8; - r |= MMPTR(0xe000200c); - return r; -} - -static inline void timer0_load_write(unsigned int value) -{ - MMPTR(0xe0002000) = value >> 24; - MMPTR(0xe0002004) = value >> 16; - MMPTR(0xe0002008) = value >> 8; - MMPTR(0xe000200c) = value; -} - -static inline unsigned int timer0_reload_read(void) -{ - unsigned int r = MMPTR(0xe0002010); - r <<= 8; - r |= MMPTR(0xe0002014); - r <<= 8; - r |= MMPTR(0xe0002018); - r <<= 8; - r |= MMPTR(0xe000201c); - return r; -} - -static inline void timer0_reload_write(unsigned int value) -{ - MMPTR(0xe0002010) = value >> 24; - MMPTR(0xe0002014) = value >> 16; - MMPTR(0xe0002018) = value >> 8; - MMPTR(0xe000201c) = value; -} - -static inline unsigned char timer0_en_read(void) -{ - unsigned char r = MMPTR(0xe0002020); - return r; -} - -static inline void timer0_en_write(unsigned char value) -{ - MMPTR(0xe0002020) = value; -} - -static inline unsigned char timer0_update_value_read(void) -{ - unsigned char r = MMPTR(0xe0002024); - return r; -} - -static inline void timer0_update_value_write(unsigned char value) -{ - MMPTR(0xe0002024) = value; -} - -static inline unsigned int timer0_value_read(void) -{ - unsigned int r = MMPTR(0xe0002028); - r <<= 8; - r |= MMPTR(0xe000202c); - r <<= 8; - r |= MMPTR(0xe0002030); - r <<= 8; - r |= MMPTR(0xe0002034); - return r; -} - -static inline unsigned char timer0_ev_status_read(void) -{ - unsigned char r = MMPTR(0xe0002038); - return r; -} - -static inline void timer0_ev_status_write(unsigned char value) -{ - MMPTR(0xe0002038) = value; -} - -static inline unsigned char timer0_ev_pending_read(void) -{ - unsigned char r = MMPTR(0xe000203c); - return r; -} - -static inline void timer0_ev_pending_write(unsigned char value) -{ - MMPTR(0xe000203c) = value; -} - -static inline unsigned char timer0_ev_enable_read(void) -{ - unsigned char r = MMPTR(0xe0002040); - return r; -} - -static inline void timer0_ev_enable_write(unsigned char value) -{ - MMPTR(0xe0002040) = value; -} - -/* UART */ - -static inline unsigned char uart_rxtx_read(void) -{ - unsigned char r = MMPTR(0xe0001000); - return r; -} - -static inline void uart_rxtx_write(unsigned char value) -{ - MMPTR(0xe0001000) = value; -} - -static inline unsigned char uart_txfull_read(void) -{ - unsigned char r = MMPTR(0xe0001004); - return r; -} - -static inline unsigned char uart_rxempty_read(void) -{ - unsigned char r = MMPTR(0xe0001008); - return r; -} - -static inline unsigned char uart_ev_status_read(void) -{ - unsigned char r = MMPTR(0xe000100c); - return r; -} - -static inline void uart_ev_status_write(unsigned char value) -{ - MMPTR(0xe000100c) = value; -} - -static inline unsigned char uart_ev_pending_read(void) -{ - unsigned char r = MMPTR(0xe0001010); - return r; -} - -static inline void uart_ev_pending_write(unsigned char value) -{ - MMPTR(0xe0001010) = value; -} - -static inline unsigned char uart_ev_enable_read(void) -{ - unsigned char r = MMPTR(0xe0001014); - return r; -} - -static inline void uart_ev_enable_write(unsigned char value) -{ - MMPTR(0xe0001014) = value; -} - -/* uart_phy */ - -static inline unsigned int uart_phy_tuning_word_read(void) -{ - unsigned int r = MMPTR(0xe0000800); - r <<= 8; - r |= MMPTR(0xe0000804); - r <<= 8; - r |= MMPTR(0xe0000808); - r <<= 8; - r |= MMPTR(0xe000080c); - return r; -} - -static inline void uart_phy_tuning_word_write(unsigned int value) -{ - MMPTR(0xe0000800) = value >> 24; - MMPTR(0xe0000804) = value >> 16; - MMPTR(0xe0000808) = value >> 8; - MMPTR(0xe000080c) = value; -} - -#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_CSR_H */ +#endif diff --git a/configs/misoc/include/generated/mem.h b/configs/misoc/include/generated/mem.h index dd6b512e91d..7b6839d2a94 100644 --- a/configs/misoc/include/generated/mem.h +++ b/configs/misoc/include/generated/mem.h @@ -1,44 +1,5 @@ -/**************************************************************************** - * configs/misoc/include/generated/mem.h - * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Ramtin Amin - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H -#define __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ +#ifndef __GENERATED_MEM_H +#define __GENERATED_MEM_H #define ROM_BASE 0x00000000 #define ROM_SIZE 0x00008000 @@ -49,4 +10,4 @@ #define MAIN_RAM_BASE 0x40000000 #define MAIN_RAM_SIZE 0x00800000 -#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_MEM_H / +#endif diff --git a/configs/misoc/include/generated/regions.ld b/configs/misoc/include/generated/regions.ld index bd7502729b9..eb3a45be98b 100644 --- a/configs/misoc/include/generated/regions.ld +++ b/configs/misoc/include/generated/regions.ld @@ -1,5 +1,4 @@ -MEMORY -{ +MEMORY { rom : ORIGIN = 0x00000000, LENGTH = 0x00008000 sram : ORIGIN = 0x10000000, LENGTH = 0x00001000 main_ram : ORIGIN = 0x40000000, LENGTH = 0x00800000 diff --git a/configs/misoc/include/generated/sdram_phy.h b/configs/misoc/include/generated/sdram_phy.h index 2161b7d5b93..9fa49eec22c 100644 --- a/configs/misoc/include/generated/sdram_phy.h +++ b/configs/misoc/include/generated/sdram_phy.h @@ -1,56 +1,20 @@ -/**************************************************************************** - * configs/misoc/include/generated/common.h - * - * Copyright (C) 2016 Gregory Nutt. All rights reserved. - * Author: Ramtin Amin - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * 3. Neither the name NuttX nor the names of its contributors may be - * used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS - * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, - * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS - * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED - * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN - * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************/ - -#ifndef __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H -#define __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H - -/**************************************************************************** - * Included Filese - ****************************************************************************/ - -#include "hw/common.h" -#include "hw/flags.h" - -#include - -/**************************************************************************** - * Pre-processor Definitions - ****************************************************************************/ +#ifndef __GENERATED_SDRAM_PHY_H +#define __GENERATED_SDRAM_PHY_H +#include +#include +#include #define DFII_NPHASES 1 +static void cdelay(int i); + +static void command_p0(int cmd) +{ + sdram_dfii_pi0_command_write(cmd); + sdram_dfii_pi0_command_issue_write(1); +} + + #define sdram_dfii_pird_address_write(X) sdram_dfii_pi0_address_write(X) #define sdram_dfii_piwr_address_write(X) sdram_dfii_pi0_address_write(X) @@ -62,83 +26,55 @@ #define DFII_PIX_DATA_SIZE CSR_SDRAM_DFII_PI0_WRDATA_SIZE -/**************************************************************************** - * Private Data - ****************************************************************************/ - -const unsigned int sdram_dfii_pix_wrdata_addr[1] = -{ - CSR_SDRAM_DFII_PI0_WRDATA_ADDR +const unsigned int sdram_dfii_pix_wrdata_addr[1] = { + CSR_SDRAM_DFII_PI0_WRDATA_ADDR }; -const unsigned int sdram_dfii_pix_rddata_addr[1] = -{ - CSR_SDRAM_DFII_PI0_RDDATA_ADDR +const unsigned int sdram_dfii_pix_rddata_addr[1] = { + CSR_SDRAM_DFII_PI0_RDDATA_ADDR }; -/**************************************************************************** - * Private Functions - ****************************************************************************/ - -static void cdelay(int i); - -static void command_p0(int cmd) -{ - sdram_dfii_pi0_command_write(cmd); - sdram_dfii_pi0_command_issue_write(1); -} - static void init_sequence(void) { - /* Bring CKE high */ + /* Bring CKE high */ + sdram_dfii_pi0_address_write(0x0); + sdram_dfii_pi0_baddress_write(0); + sdram_dfii_control_write(DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET_N); + cdelay(20000); - sdram_dfii_pi0_address_write(0x0); - sdram_dfii_pi0_baddress_write(0); - sdram_dfii_control_write(DFII_CONTROL_CKE | DFII_CONTROL_ODT | - DFII_CONTROL_RESET_N); - cdelay(20000); + /* Precharge All */ + sdram_dfii_pi0_address_write(0x400); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS); - /* Precharge All */ + /* Load Mode Register / Reset DLL, CL=2, BL=1 */ + sdram_dfii_pi0_address_write(0x120); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS); + cdelay(200); - sdram_dfii_pi0_address_write(0x400); - sdram_dfii_pi0_baddress_write(0); - command_p0(DFII_COMMAND_RAS | DFII_COMMAND_WE | DFII_COMMAND_CS); + /* Precharge All */ + sdram_dfii_pi0_address_write(0x400); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS|DFII_COMMAND_WE|DFII_COMMAND_CS); - /* Load Mode Register / Reset DLL, CL=2, BL=1 */ + /* Auto Refresh */ + sdram_dfii_pi0_address_write(0x0); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_CS); + cdelay(4); - sdram_dfii_pi0_address_write(0x120); - sdram_dfii_pi0_baddress_write(0); - command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_WE | - DFII_COMMAND_CS); - cdelay(200); + /* Auto Refresh */ + sdram_dfii_pi0_address_write(0x0); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_CS); + cdelay(4); - /* Precharge All */ + /* Load Mode Register / CL=2, BL=1 */ + sdram_dfii_pi0_address_write(0x20); + sdram_dfii_pi0_baddress_write(0); + command_p0(DFII_COMMAND_RAS|DFII_COMMAND_CAS|DFII_COMMAND_WE|DFII_COMMAND_CS); + cdelay(200); - sdram_dfii_pi0_address_write(0x400); - sdram_dfii_pi0_baddress_write(0); - command_p0(DFII_COMMAND_RAS | DFII_COMMAND_WE | DFII_COMMAND_CS); - - /* Auto Refresh */ - - sdram_dfii_pi0_address_write(0x0); - sdram_dfii_pi0_baddress_write(0); - command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_CS); - cdelay(4); - - /* Auto Refresh */ - - sdram_dfii_pi0_address_write(0x0); - sdram_dfii_pi0_baddress_write(0); - command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_CS); - cdelay(4); - - /* Load Mode Register / CL=2, BL=1 */ - - sdram_dfii_pi0_address_write(0x20); - sdram_dfii_pi0_baddress_write(0); - command_p0(DFII_COMMAND_RAS | DFII_COMMAND_CAS | DFII_COMMAND_WE | - DFII_COMMAND_CS); - cdelay(200); } - -#endif /* __CONFIGS_MISOC_INCLUDE_GENERATED_SDRAM_PHY_H +#endif From af0d7a96fe1fc6969611eecfd0c3dde48caa6af8 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 14:42:17 -0600 Subject: [PATCH 19/32] LM32: More standard, common helper functions --- arch/misoc/src/common/misoc.h | 42 ++++++++ arch/misoc/src/common/misoc_lowputs.c | 62 ++++++++++++ arch/misoc/src/common/misoc_modifyreg16.c | 73 ++++++++++++++ arch/misoc/src/common/misoc_modifyreg32.c | 73 ++++++++++++++ arch/misoc/src/common/misoc_modifyreg8.c | 73 ++++++++++++++ arch/misoc/src/common/misoc_puts.c | 63 ++++++++++++ arch/misoc/src/common/misoc_udelay.c | 117 ++++++++++++++++++++++ arch/misoc/src/lm32/Make.defs | 4 +- arch/misoc/src/lm32/lm32.h | 6 -- 9 files changed, 506 insertions(+), 7 deletions(-) create mode 100644 arch/misoc/src/common/misoc_lowputs.c create mode 100644 arch/misoc/src/common/misoc_modifyreg16.c create mode 100644 arch/misoc/src/common/misoc_modifyreg32.c create mode 100644 arch/misoc/src/common/misoc_modifyreg8.c create mode 100644 arch/misoc/src/common/misoc_puts.c create mode 100644 arch/misoc/src/common/misoc_udelay.c diff --git a/arch/misoc/src/common/misoc.h b/arch/misoc/src/common/misoc.h index d487babab26..e95a60e5d7d 100644 --- a/arch/misoc/src/common/misoc.h +++ b/arch/misoc/src/common/misoc.h @@ -60,5 +60,47 @@ void misoc_serial_initialize(void); +/**************************************************************************** + * Name: misoc_puts + * + * Description: + * This is a low-level helper function used to support debug. + * + ****************************************************************************/ + +void misoc_puts(const char *str); + +/**************************************************************************** + * Name: misoc_lowputc + * + * Description: + * Low-level, blocking character output the the serial console. + * + ****************************************************************************/ + +void misoc_lowputc(char ch); + +/**************************************************************************** + * Name: misoc_lowputs + * + * Description: + * This is a low-level helper function used to support debug. + * + ****************************************************************************/ + +void misoc_lowputs(const char *str); + +/**************************************************************************** + * Name: modifyreg[N] + * + * Description: + * Atomic modification of registers. + * + ****************************************************************************/ + +void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits); +void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits); +void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits); + #endif /* __ASSEMBLY__ */ #endif /* __ARCH_MISOC_SRC_COMMON_MISOC_H */ diff --git a/arch/misoc/src/common/misoc_lowputs.c b/arch/misoc/src/common/misoc_lowputs.c new file mode 100644 index 00000000000..d3848838163 --- /dev/null +++ b/arch/misoc/src/common/misoc_lowputs.c @@ -0,0 +1,62 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_lowputs.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "misoc.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: misoc_lowputs + * + * Description: + * This is a low-level helper function used to support debug. + * + ****************************************************************************/ + +void misoc_lowputs(const char *str) +{ + while (*str) + { + up_lowputc(*str++); + } +} diff --git a/arch/misoc/src/common/misoc_modifyreg16.c b/arch/misoc/src/common/misoc_modifyreg16.c new file mode 100644 index 00000000000..a8502dbe54a --- /dev/null +++ b/arch/misoc/src/common/misoc_modifyreg16.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_modifyreg16.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "misoc.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: modifyreg16 + * + * Description: + * Atomically modify the specified bits in a memory mapped register + * + ****************************************************************************/ + +void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits) +{ + irqstate_t flags; + uint16_t regval; + + flags = enter_critical_section(); + regval = getreg16(addr); + regval &= ~clearbits; + regval |= setbits; + putreg16(regval, addr); + leave_critical_section(flags); +} diff --git a/arch/misoc/src/common/misoc_modifyreg32.c b/arch/misoc/src/common/misoc_modifyreg32.c new file mode 100644 index 00000000000..3e7c2d54196 --- /dev/null +++ b/arch/misoc/src/common/misoc_modifyreg32.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_modifyreg32.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "misoc_arch.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: modifyreg32 + * + * Description: + * Atomically modify the specified bits in a memory mapped register + * + ****************************************************************************/ + +void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits) +{ + irqstate_t flags; + uint32_t regval; + + flags = enter_critical_section(); + regval = getreg32(addr); + regval &= ~clearbits; + regval |= setbits; + putreg32(regval, addr); + leave_critical_section(flags); +} diff --git a/arch/misoc/src/common/misoc_modifyreg8.c b/arch/misoc/src/common/misoc_modifyreg8.c new file mode 100644 index 00000000000..88ba788e7b2 --- /dev/null +++ b/arch/misoc/src/common/misoc_modifyreg8.c @@ -0,0 +1,73 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_modifyreg8.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include +#include + +#include +#include + +#include "misoc.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: modifyreg8 + * + * Description: + * Atomically modify the specified bits in a memory mapped register + * + ****************************************************************************/ + +void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits) +{ + irqstate_t flags; + uint8_t regval; + + flags = enter_critical_section(); + regval = getreg8(addr); + regval &= ~clearbits; + regval |= setbits; + putreg8(regval, addr); + leave_critical_section(flags); +} diff --git a/arch/misoc/src/common/misoc_puts.c b/arch/misoc/src/common/misoc_puts.c new file mode 100644 index 00000000000..556c23f8295 --- /dev/null +++ b/arch/misoc/src/common/misoc_puts.c @@ -0,0 +1,63 @@ +/**************************************************************************** + * arch/misoc/src/common/misoc_puts.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include + +#include "misoc.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: misoc_puts + * + * Description: + * This is a low-level helper function used to support debug. + * + ****************************************************************************/ + +void misoc_puts(const char *str) +{ + while (*str) + { + misoc_putc(*str++); + } +} diff --git a/arch/misoc/src/common/misoc_udelay.c b/arch/misoc/src/common/misoc_udelay.c new file mode 100644 index 00000000000..42bbc1f95ae --- /dev/null +++ b/arch/misoc/src/common/misoc_udelay.c @@ -0,0 +1,117 @@ +/**************************************************************************** + * arch/misoc/src/common/up_udelay.c + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************/ + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include +#include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +#define CONFIG_BOARD_LOOPSPER100USEC ((CONFIG_BOARD_LOOPSPERMSEC+5)/10) +#define CONFIG_BOARD_LOOPSPER10USEC ((CONFIG_BOARD_LOOPSPERMSEC+50)/100) +#define CONFIG_BOARD_LOOPSPERUSEC ((CONFIG_BOARD_LOOPSPERMSEC+500)/1000) + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: up_udelay + * + * Description: + * Delay inline for the requested number of microseconds. NOTE: Because + * of all of the setup, several microseconds will be lost before the actual + * timing looop begins. Thus, the delay will always be a few microseconds + * longer than requested. + * + * *** NOT multi-tasking friendly *** + * + * ASSUMPTIONS: + * The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated + * + ****************************************************************************/ + +void up_udelay(useconds_t microseconds) +{ + volatile int i; + + /* We'll do this a little at a time because we expect that the + * CONFIG_BOARD_LOOPSPERUSEC is very inaccurate during to truncation in + * the divisions of its calculation. We'll use the largest values that + * we can in order to prevent significant error buildup in the loops. + */ + + while (microseconds > 1000) + { + for (i = 0; i < CONFIG_BOARD_LOOPSPERMSEC; i++) + { + } + + microseconds -= 1000; + } + + while (microseconds > 100) + { + for (i = 0; i < CONFIG_BOARD_LOOPSPER100USEC; i++) + { + } + + microseconds -= 100; + } + + while (microseconds > 10) + { + for (i = 0; i < CONFIG_BOARD_LOOPSPER10USEC; i++) + { + } + + microseconds -= 10; + } + + while (microseconds > 0) + { + for (i = 0; i < CONFIG_BOARD_LOOPSPERUSEC; i++) + { + } + + microseconds--; + } +} diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs index 4548e6fe32f..e31fd7f50f4 100644 --- a/arch/misoc/src/lm32/Make.defs +++ b/arch/misoc/src/lm32/Make.defs @@ -37,7 +37,9 @@ HEAD_ASRC = lm32_vectors.S CMN_ASRCS = -CMN_CSRCS = misoc_serial.c misoc_mdelay.c +CMN_CSRCS = misoc_lowputs.c misoc_serial.c misoc_mdelay.c +CMN_CSRCS += misoc_modifyreg8.cmisoc_modifyreg16.c misoc_modifyreg32.c +CMN_CSRCS += misoc_puts.c misoc_udelay.c CHIP_ASRCS = lm32_syscall.S diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h index ddfd2320e19..a04fb5e5714 100644 --- a/arch/misoc/src/lm32/lm32.h +++ b/arch/misoc/src/lm32/lm32.h @@ -157,12 +157,6 @@ void lm32_timer_initialize(void); void lm32_sigdeliver(void); -/* Atomic modification of registers *****************************************/ - -void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits); -void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits); -void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits); - /* Debug ********************************************************************/ void lm32_dumpstate(void); From 5a9d3b20fab4c07b3a1a735b1699281543338ba0 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 17:19:42 -0600 Subject: [PATCH 20/32] LM32: Add README. Update hello defconfig and setenv.sh --- Documentation/README.html | 4 ++- README.txt | 2 ++ arch/misoc/src/lm32/lm32.h | 5 ++-- configs/misoc/README.txt | 54 +++++++++++++++++++++++++++++++++++ configs/misoc/hello/defconfig | 6 ++-- configs/misoc/hello/setenv.sh | 10 ++----- 6 files changed, 67 insertions(+), 14 deletions(-) create mode 100644 configs/misoc/README.txt diff --git a/Documentation/README.html b/Documentation/README.html index baf534cf50d..8751b6b37c0 100644 --- a/Documentation/README.html +++ b/Documentation/README.html @@ -8,7 +8,7 @@

NuttX README Files

-

Last Updated: November 1, 2016

+

Last Updated: November 4, 2016

@@ -150,6 +150,8 @@ nuttx/ | | `- README.txt | |- mirtoo/ | | `- README.txt + | |- misoc/ + | | `- README.txt | |- moteino-mega/ | | `- README.txt | |- mx1ads/ diff --git a/README.txt b/README.txt index 6203ab4cd10..d2a9a7b9fe1 100644 --- a/README.txt +++ b/README.txt @@ -1366,6 +1366,8 @@ nuttx/ | | `- README.txt | |- mirtoo/ | | `- README.txt + | |- misoc/ + | | `- README.txt | |- moteino-mega/ | | `- README.txt | |- mx1ads/ diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h index a04fb5e5714..7b125578f0f 100644 --- a/arch/misoc/src/lm32/lm32.h +++ b/arch/misoc/src/lm32/lm32.h @@ -109,8 +109,9 @@ * Public Data ****************************************************************************/ -extern volatile uint32_t *g_current_regs; +#ifndef __ASSEMBLY__ +extern volatile uint32_t *g_current_regs; extern uint32_t g_idle_topstack; /**************************************************************************** @@ -121,8 +122,6 @@ extern uint32_t g_idle_topstack; * Public Functions ****************************************************************************/ -#ifndef __ASSEMBLY__ - /* Low level initialization provided by board-level logic ******************/ void lm32_board_initialize(void); diff --git a/configs/misoc/README.txt b/configs/misoc/README.txt new file mode 100644 index 00000000000..1c205445136 --- /dev/null +++ b/configs/misoc/README.txt @@ -0,0 +1,54 @@ +Misoc README +============ + +Buildroot Toolchain +=================== + + A GNU GCC-based toolchain is assumed. The files */setenv.sh should + be modified to point to the correct path to the LM32 GCC toolchain (if + different from the default in your PATH variable). + + If you have no LM32 toolchain, one can be cloned from the NuttX + Bitbucket GIT repository (https://bitbucket.org/nuttx/buildroot). + This GNU toolchain builds and executes in the Linux or Cygwin environment. + + 1. You must have already configured Nuttx in /nuttx. + + cd tools + ./configure.sh misoc/ + + 2. Clone the latest buildroot package into + + git clone git@bitbucket.org:nuttx/buildroot.git + + or + + git clone https://patacongo@bitbucket.org/nuttx/buildroot.git + + 3. cd + + 4. cp lm32-elf-defconfig-6.1.0 .config + + 5. make oldconfig + + 6. make + + 7. Edit setenv.h, if necessary, so that the PATH variable includes + the path to the newly built binaries. + + By default, the tools will be at: + + /build_lm32/staging_dir/bin + + That location can be changed by reconfiguring the .config file. + + See the file configs/README.txt in the buildroot source tree. That has more + detailed PLUS some special instructions that you will need to follow if you + are building a LM32 toolchain for Cygwin under Windows. Also included in + that README file is a FAQ of frequent build issues that their work-arounds. + + In order to use the buildroot toolchain, you also must set the following + in your .config file: + + CONFIG_LM3S_TOOLCHAIN_BUILDROOT=y + diff --git a/configs/misoc/hello/defconfig b/configs/misoc/hello/defconfig index f7b4a0082d2..b859e4ab2d0 100644 --- a/configs/misoc/hello/defconfig +++ b/configs/misoc/hello/defconfig @@ -16,7 +16,7 @@ CONFIG_HOST_LINUX=y # # Build Configuration # -CONFIG_APPS_DIR="../apps" +# CONFIG_APPS_DIR="../apps" CONFIG_BUILD_FLAT=y # CONFIG_BUILD_2PASS is not set @@ -108,6 +108,8 @@ CONFIG_MISOC_UART1=y CONFIG_MISOC_UART=y CONFIG_MISOC_UART_RX_BUF_SIZE=64 CONFIG_MISOC_UART_TX_BUF_SIZE=64 +# CONFIG_LM32_TOOLCHAIN_BUILDROOT is not set +CONFIG_LM32_TOOLCHAIN_GNUL=y # # Architecture Options @@ -546,10 +548,10 @@ CONFIG_EXAMPLES_HELLO_STACKSIZE=2048 # CONFIG_EXAMPLES_NRF24L01TERM is not set # CONFIG_EXAMPLES_NSH is not set # CONFIG_EXAMPLES_NULL is not set +# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXFFS is not set # CONFIG_EXAMPLES_NXHELLO is not set # CONFIG_EXAMPLES_NXIMAGE is not set -# CONFIG_EXAMPLES_NX is not set # CONFIG_EXAMPLES_NXLINES is not set # CONFIG_EXAMPLES_NXTERM is not set # CONFIG_EXAMPLES_NXTEXT is not set diff --git a/configs/misoc/hello/setenv.sh b/configs/misoc/hello/setenv.sh index c66c8782394..7ba5ee60e7d 100644 --- a/configs/misoc/hello/setenv.sh +++ b/configs/misoc/hello/setenv.sh @@ -48,17 +48,11 @@ if [ -z "${PATH_ORIG}" ]; then export PATH_ORIG="${PATH}" fi -# This is the Cygwin path to the location where I installed the WinAVR -# toolchain under windows. This is *not* the default install -# location so you will probably have to edit this. You will also have -# to edit this if you install the Linux AVR toolchain as well -#export TOOLCHAIN_BIN="/cygdrive/c/WinAVR/bin" - # This is the Cygwin path to the location where I build the buildroot # toolchain. -#export TOOLCHAIN_BIN="${WD}/../buildroot/build_avr/staging_dir/bin" +export TOOLCHAIN_BIN="${WD}/../buildroot/build_lm32/staging_dir/bin" # Add the path to the toolchain to the PATH varialble -#export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" +export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}" echo "PATH : ${PATH}" From 911e5abb2c7a2eb7a6b4c200871b20390dfab380 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 17:37:10 -0600 Subject: [PATCH 21/32] LM32: Fix various compilation errors that I introduced. --- arch/misoc/include/.gitignore | 3 +++ arch/misoc/src/.gitignore | 5 +++++ arch/misoc/src/common/misoc.h | 14 ++++++++++++++ arch/misoc/src/common/misoc_lowputs.c | 2 +- arch/misoc/src/common/misoc_modifyreg32.c | 2 +- arch/misoc/src/common/misoc_puts.c | 2 +- arch/misoc/src/common/misoc_serial.c | 2 +- arch/misoc/src/lm32/Make.defs | 11 +++++------ arch/misoc/src/lm32/lm32.h | 10 +--------- arch/misoc/src/lm32/lm32_decodeirq.c | 11 ++++++++--- arch/misoc/src/lm32/lm32_doirq.c | 1 - 11 files changed, 40 insertions(+), 23 deletions(-) create mode 100644 arch/misoc/include/.gitignore create mode 100644 arch/misoc/src/.gitignore diff --git a/arch/misoc/include/.gitignore b/arch/misoc/include/.gitignore new file mode 100644 index 00000000000..e6460c4a678 --- /dev/null +++ b/arch/misoc/include/.gitignore @@ -0,0 +1,3 @@ +/board +/chip + diff --git a/arch/misoc/src/.gitignore b/arch/misoc/src/.gitignore new file mode 100644 index 00000000000..dfdfc935431 --- /dev/null +++ b/arch/misoc/src/.gitignore @@ -0,0 +1,5 @@ +/.depend +/Make.dep +/locked.r +/board +/chip diff --git a/arch/misoc/src/common/misoc.h b/arch/misoc/src/common/misoc.h index e95a60e5d7d..4726759ea58 100644 --- a/arch/misoc/src/common/misoc.h +++ b/arch/misoc/src/common/misoc.h @@ -42,6 +42,20 @@ ****************************************************************************/ #include +#include + +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ + +/* Low-level register access */ + +#define getreg8(a) (*(volatile uint8_t *)(a)) +#define putreg8(v,a) (*(volatile uint8_t *)(a) = (v)) +#define getreg16(a) (*(volatile uint16_t *)(a)) +#define putreg16(v,a) (*(volatile uint16_t *)(a) = (v)) +#define getreg32(a) (*(volatile uint32_t *)(a)) +#define putreg32(v,a) (*(volatile uint32_t *)(a) = (v)) /**************************************************************************** * Public Functions diff --git a/arch/misoc/src/common/misoc_lowputs.c b/arch/misoc/src/common/misoc_lowputs.c index d3848838163..7b8b962678c 100644 --- a/arch/misoc/src/common/misoc_lowputs.c +++ b/arch/misoc/src/common/misoc_lowputs.c @@ -57,6 +57,6 @@ void misoc_lowputs(const char *str) { while (*str) { - up_lowputc(*str++); + misoc_lowputc(*str++); } } diff --git a/arch/misoc/src/common/misoc_modifyreg32.c b/arch/misoc/src/common/misoc_modifyreg32.c index 3e7c2d54196..65eda199abf 100644 --- a/arch/misoc/src/common/misoc_modifyreg32.c +++ b/arch/misoc/src/common/misoc_modifyreg32.c @@ -45,7 +45,7 @@ #include #include -#include "misoc_arch.h" +#include "misoc.h" /**************************************************************************** * Public Functions diff --git a/arch/misoc/src/common/misoc_puts.c b/arch/misoc/src/common/misoc_puts.c index 556c23f8295..f048b74795d 100644 --- a/arch/misoc/src/common/misoc_puts.c +++ b/arch/misoc/src/common/misoc_puts.c @@ -58,6 +58,6 @@ void misoc_puts(const char *str) { while (*str) { - misoc_putc(*str++); + up_putc(*str++); } } diff --git a/arch/misoc/src/common/misoc_serial.c b/arch/misoc/src/common/misoc_serial.c index af05eb1bb18..c46e83775a4 100644 --- a/arch/misoc/src/common/misoc_serial.c +++ b/arch/misoc/src/common/misoc_serial.c @@ -57,7 +57,7 @@ #include #include "chip.h" -#include "hw/flags.h +#include "hw/flags.h" #include "misoc.h" /**************************************************************************** diff --git a/arch/misoc/src/lm32/Make.defs b/arch/misoc/src/lm32/Make.defs index e31fd7f50f4..9c0768b2a4f 100644 --- a/arch/misoc/src/lm32/Make.defs +++ b/arch/misoc/src/lm32/Make.defs @@ -38,15 +38,14 @@ HEAD_ASRC = lm32_vectors.S CMN_ASRCS = CMN_CSRCS = misoc_lowputs.c misoc_serial.c misoc_mdelay.c -CMN_CSRCS += misoc_modifyreg8.cmisoc_modifyreg16.c misoc_modifyreg32.c +CMN_CSRCS += misoc_modifyreg8.c misoc_modifyreg16.c misoc_modifyreg32.c CMN_CSRCS += misoc_puts.c misoc_udelay.c CHIP_ASRCS = lm32_syscall.S CHIP_CSRCS = lm32_allocateheap.c lm32_assert.c lm32_blocktask.c CHIP_CSRCS += lm32_copystate.c lm32_createstack.c lm32_decodeirq.c -CHIP_CSRCS += lm32_doirq.c lm32_dumpstate.c lm32_dumpstate.c lm32_exit.c -CHIP_CSRCS += lm32_idle.c lm32_initialize.c lm32_initialstate.c -CHIP_CSRCS += lm32_interruptcontext.c lm32_irq.c lm32_releasepending.c -CHIP_CSRCS += lm32_releasestack.c lm32_stackframe.c lm32_swint.c -CHIP_CSRCS += lm32_unblocktask.c +CHIP_CSRCS += lm32_doirq.c lm32_dumpstate.c lm32_exit.c lm32_idle.c +CHIP_CSRCS += lm32_initialize.c lm32_initialstate.c lm32_interruptcontext.c +CHIP_CSRCS += lm32_irq.c lm32_releasepending.c lm32_releasestack.c +CHIP_CSRCS += lm32_stackframe.c lm32_swint.c lm32_unblocktask.c diff --git a/arch/misoc/src/lm32/lm32.h b/arch/misoc/src/lm32/lm32.h index 7b125578f0f..eac1fe76516 100644 --- a/arch/misoc/src/lm32/lm32.h +++ b/arch/misoc/src/lm32/lm32.h @@ -92,15 +92,6 @@ # endif #endif -/* Low-level register access */ - -#define getreg8(a) (*(volatile uint8_t *)(a)) -#define putreg8(v,a) (*(volatile uint8_t *)(a) = (v)) -#define getreg16(a) (*(volatile uint16_t *)(a)) -#define putreg16(v,a) (*(volatile uint16_t *)(a) = (v)) -#define getreg32(a) (*(volatile uint32_t *)(a)) -#define putreg32(v,a) (*(volatile uint32_t *)(a) = (v)) - /**************************************************************************** * Public Types ****************************************************************************/ @@ -143,6 +134,7 @@ void lm32_irq_initialize(void); /* Interrupt decode *********************************************************/ uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs); +uint32_t *lm32_doirq(int irq, uint32_t *regs); /* Software interrupts ******************************************************/ diff --git a/arch/misoc/src/lm32/lm32_decodeirq.c b/arch/misoc/src/lm32/lm32_decodeirq.c index 198445deeda..1cb792cedf4 100644 --- a/arch/misoc/src/lm32/lm32_decodeirq.c +++ b/arch/misoc/src/lm32/lm32_decodeirq.c @@ -39,6 +39,11 @@ #include +#include +#include + +#include + #include "chip.h" #include "lm32.h" @@ -69,13 +74,13 @@ uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs) /* Decode and dispatch interrupts */ - for (irq = 0; irq < MISOC_NINTERRUPTS & instat != 0; i++) + for (irq = 0; irq < MISOC_NINTERRUPTS && intstat != 0; irq++) { uint32_t bit = (1 << irq); /* Is this interrupt pending? */ - if ((instat & bit) != 0) + if ((intstat & bit) != 0) { /* Yes.. Dispatch the interrupt */ /* REVIST: Do I need to acknowledge the interrupt first? */ @@ -87,7 +92,7 @@ uint32_t *lm32_decodeirq(uint32_t intstat, uint32_t *regs) * break out of the loop early. */ - instat &= ~bit; + intstat &= ~bit; } } diff --git a/arch/misoc/src/lm32/lm32_doirq.c b/arch/misoc/src/lm32/lm32_doirq.c index 25cc30e2a04..cf42f4e6997 100644 --- a/arch/misoc/src/lm32/lm32_doirq.c +++ b/arch/misoc/src/lm32/lm32_doirq.c @@ -126,7 +126,6 @@ uint32_t *lm32_doirq(int irq, uint32_t *regs) /* Unmask the last interrupt (global interrupts are still disabled) */ up_enable_irq(irq); -#endif board_autoled_off(LED_INIRQ); return regs; } From 6cc73f04057d737e2fa6079a5733fb9e5f036e00 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 17:42:10 -0600 Subject: [PATCH 22/32] LM32: Fix a copy/paste error in lm32_vectors.S that I introduced. --- arch/misoc/src/lm32/lm32_vectors.S | 64 +++++++++++++++--------------- 1 file changed, 32 insertions(+), 32 deletions(-) diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index a7d7d9b6218..aa66237565f 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -190,7 +190,7 @@ _do_reset: /* ra needs to be moved from initial stack location */ - w r1, (sp+ 136) + lw r1, (sp+ 136) sw (sp+REG_RA), r1 /* Get IE/REG_INT_CTX */ @@ -206,39 +206,39 @@ _do_reset: .restore_all_and_eret: /* r1 should have the place where we restore ! */ - w r2, (r1+REG_X2) - w r3, (r1+REG_X3) - w r4, (r1+REG_X4) - w r5, (r1+REG_X5) - w r6, (r1+REG_X6) - w r7, (r1+REG_X7) - w r8, (r1+REG_X8) - w r9, (r1+REG_X9) - w r10, (r1+REG_X10) - w r11, (r1+REG_X11) - w r12, (r1+REG_X12) - w r13, (r1+REG_X13) - w r14, (r1+REG_X14) - w r15, (r1+REG_X15) - w r16, (r1+REG_X16) - w r17, (r1+REG_X17) - w r18, (r1+REG_X18) - w r19, (r1+REG_X19) - w r20, (r1+REG_X20) - w r21, (r1+REG_X21) - w r22, (r1+REG_X22) - w r23, (r1+REG_X23) - w r24, (r1+REG_X24) - w r25, (r1+REG_X25) - w r26, (r1+REG_GP) - w r27, (r1+REG_FP) - w r28, (r1+REG_SP) - w r29, (r1+REG_RA) - w r30, (r1+REG_EA) - w r31, (r1+REG_BA) + lw r2, (r1+REG_X2) + lw r3, (r1+REG_X3) + lw r4, (r1+REG_X4) + lw r5, (r1+REG_X5) + lw r6, (r1+REG_X6) + lw r7, (r1+REG_X7) + lw r8, (r1+REG_X8) + lw r9, (r1+REG_X9) + lw r10, (r1+REG_X10) + lw r11, (r1+REG_X11) + lw r12, (r1+REG_X12) + lw r13, (r1+REG_X13) + lw r14, (r1+REG_X14) + lw r15, (r1+REG_X15) + lw r16, (r1+REG_X16) + lw r17, (r1+REG_X17) + lw r18, (r1+REG_X18) + lw r19, (r1+REG_X19) + lw r20, (r1+REG_X20) + lw r21, (r1+REG_X21) + lw r22, (r1+REG_X22) + lw r23, (r1+REG_X23) + lw r24, (r1+REG_X24) + lw r25, (r1+REG_X25) + lw r26, (r1+REG_GP) + lw r27, (r1+REG_FP) + lw r28, (r1+REG_SP) + lw r29, (r1+REG_RA) + lw r30, (r1+REG_EA) + lw r31, (r1+REG_BA) lw r1, (r1+REG_INT_CTX) wcsr IE, r1 - w r1, (r1+REG_X1) + lw r1, (r1+REG_X1) addi sp, sp, 136 eret From 0b83e8afaa900d89148846ec0c8e0e5a83c8475a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 17:48:24 -0600 Subject: [PATCH 23/32] LM32: Remove some extra spacing --- arch/misoc/src/lm32/lm32_vectors.S | 60 +++++++++++++++--------------- 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index aa66237565f..80645f834d1 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -206,39 +206,39 @@ _do_reset: .restore_all_and_eret: /* r1 should have the place where we restore ! */ - lw r2, (r1+REG_X2) - lw r3, (r1+REG_X3) - lw r4, (r1+REG_X4) - lw r5, (r1+REG_X5) - lw r6, (r1+REG_X6) - lw r7, (r1+REG_X7) - lw r8, (r1+REG_X8) - lw r9, (r1+REG_X9) + lw r2, (r1+REG_X2) + lw r3, (r1+REG_X3) + lw r4, (r1+REG_X4) + lw r5, (r1+REG_X5) + lw r6, (r1+REG_X6) + lw r7, (r1+REG_X7) + lw r8, (r1+REG_X8) + lw r9, (r1+REG_X9) lw r10, (r1+REG_X10) - lw r11, (r1+REG_X11) - lw r12, (r1+REG_X12) - lw r13, (r1+REG_X13) - lw r14, (r1+REG_X14) - lw r15, (r1+REG_X15) - lw r16, (r1+REG_X16) - lw r17, (r1+REG_X17) - lw r18, (r1+REG_X18) - lw r19, (r1+REG_X19) - lw r20, (r1+REG_X20) - lw r21, (r1+REG_X21) - lw r22, (r1+REG_X22) - lw r23, (r1+REG_X23) - lw r24, (r1+REG_X24) - lw r25, (r1+REG_X25) - lw r26, (r1+REG_GP) - lw r27, (r1+REG_FP) - lw r28, (r1+REG_SP) - lw r29, (r1+REG_RA) - lw r30, (r1+REG_EA) - lw r31, (r1+REG_BA) + lw r11, (r1+REG_X11) + lw r12, (r1+REG_X12) + lw r13, (r1+REG_X13) + lw r14, (r1+REG_X14) + lw r15, (r1+REG_X15) + lw r16, (r1+REG_X16) + lw r17, (r1+REG_X17) + lw r18, (r1+REG_X18) + lw r19, (r1+REG_X19) + lw r20, (r1+REG_X20) + lw r21, (r1+REG_X21) + lw r22, (r1+REG_X22) + lw r23, (r1+REG_X23) + lw r24, (r1+REG_X24) + lw r25, (r1+REG_X25) + lw r26, (r1+REG_GP) + lw r27, (r1+REG_FP) + lw r28, (r1+REG_SP) + lw r29, (r1+REG_RA) + lw r30, (r1+REG_EA) + lw r31, (r1+REG_BA) lw r1, (r1+REG_INT_CTX) wcsr IE, r1 - lw r1, (r1+REG_X1) + lw r1, (r1+REG_X1) addi sp, sp, 136 eret From 1c05eb651c45830ae6f4256883493a4d5e8f6f68 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 19:29:54 -0600 Subject: [PATCH 24/32] LM32: lm32_vectors.S needs to call lm32_doirq(), passing two parameters --- arch/misoc/src/lm32/lm32_vectors.S | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index 80645f834d1..f3dd955f86f 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -38,7 +38,7 @@ * Included Files ****************************************************************************/ -#include +#include /**************************************************************************** * Exception handlers - Must be 32 bytes long. @@ -121,12 +121,11 @@ _interrupt_handler: _syscall_handler: sw (sp+0), ra calli .save_all - rcsr r1, IP - calli lm32_swint + mvi r1, MISOC_IRQ_SWINT + rcsr r2, IP + calli lm32_doirq bi .restore_all_and_eret nop - nop - nop _do_reset: /* Setup stack and global pointer */ From 3f150daf9657df24b3049ed2844c1a1f104a3fa0 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 4 Nov 2016 19:41:43 -0600 Subject: [PATCH 25/32] LM32: Oops, missed one line of code in the manual application of a patch --- arch/misoc/src/lm32/lm32_vectors.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index f3dd955f86f..4a0e6cd0950 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -120,6 +120,7 @@ _interrupt_handler: _syscall_handler: sw (sp+0), ra + addi ea, ea, 4 calli .save_all mvi r1, MISOC_IRQ_SWINT rcsr r2, IP From 479c9776a78f551dca293df611947f6722503e8c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 5 Nov 2016 08:42:33 -0600 Subject: [PATCH 26/32] configs/misoc: Should not have CONFIG_MM_SMALL set in defconfig. --- configs/misoc/hello/defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/misoc/hello/defconfig b/configs/misoc/hello/defconfig index b859e4ab2d0..39eddd24352 100644 --- a/configs/misoc/hello/defconfig +++ b/configs/misoc/hello/defconfig @@ -443,7 +443,7 @@ CONFIG_DISABLE_PSEUDOFS_OPERATIONS=y # # Memory Management # -CONFIG_MM_SMALL=y +# CONFIG_MM_SMALL is not set CONFIG_MM_REGIONS=1 # CONFIG_ARCH_HAVE_HEAP2 is not set # CONFIG_GRAN is not set From 5dc9d963f64364aee3bcea5d153ce722e1cef569 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 5 Nov 2016 08:49:50 -0600 Subject: [PATCH 27/32] configs/misco: CONFIG_DEFAULT_SMALL should not be set either. It is really too late now, hoever, because all of the small defaults have already been set. --- configs/misoc/hello/defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/misoc/hello/defconfig b/configs/misoc/hello/defconfig index 39eddd24352..dddddfd3ee9 100644 --- a/configs/misoc/hello/defconfig +++ b/configs/misoc/hello/defconfig @@ -7,7 +7,7 @@ # Build Setup # # CONFIG_EXPERIMENTAL is not set -CONFIG_DEFAULT_SMALL=y +# CONFIG_DEFAULT_SMALL is not set CONFIG_HOST_LINUX=y # CONFIG_HOST_OSX is not set # CONFIG_HOST_WINDOWS is not set From 45f549d2b833fbfebf2439108c805de678646d3a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sat, 5 Nov 2016 17:39:06 -0600 Subject: [PATCH 28/32] LM32: Back out part of last change --- arch/misoc/src/lm32/lm32_vectors.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index 4a0e6cd0950..dc62cfe25ef 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -123,10 +123,10 @@ _syscall_handler: addi ea, ea, 4 calli .save_all mvi r1, MISOC_IRQ_SWINT - rcsr r2, IP calli lm32_doirq bi .restore_all_and_eret nop + nop _do_reset: /* Setup stack and global pointer */ From 175394904528bd1f3c562d2cc56584731480e738 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 6 Nov 2016 08:55:15 -0600 Subject: [PATCH 29/32] Update README --- configs/misoc/README.txt | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/configs/misoc/README.txt b/configs/misoc/README.txt index 1c205445136..b75eaad7e89 100644 --- a/configs/misoc/README.txt +++ b/configs/misoc/README.txt @@ -16,16 +16,17 @@ Buildroot Toolchain cd tools ./configure.sh misoc/ + make oldconfig context - 2. Clone the latest buildroot package into + 2. Clone the latest buildroot package into /buildroot - git clone git@bitbucket.org:nuttx/buildroot.git + git clone git@bitbucket.org:nuttx/buildroot.git /buildroot or - git clone https://patacongo@bitbucket.org/nuttx/buildroot.git + git clone https://patacongo@bitbucket.org/nuttx/buildroot.git /buildroot - 3. cd + 3. cd /buildroot 4. cp lm32-elf-defconfig-6.1.0 .config @@ -33,14 +34,18 @@ Buildroot Toolchain 6. make - 7. Edit setenv.h, if necessary, so that the PATH variable includes - the path to the newly built binaries. + 7. By default, the tools will be at the absolute path: - By default, the tools will be at: + /buildroot/build_lm32/staging_dir/bin - /build_lm32/staging_dir/bin + Or the NuttX relative path: - That location can be changed by reconfiguring the .config file. + ../buildroot/build_lm32/staging_dir/bin + + The setenv.sh files in these sub-directories are already set to use + the relative path. It you choose to install the buildroot package + in some other location, you may need to edit the setenv.h file so + that the PATH variable includes the path to the newly built binaries. See the file configs/README.txt in the buildroot source tree. That has more detailed PLUS some special instructions that you will need to follow if you From 5ac9136b21c4bf24e0286f87d6c39940311a287c Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 6 Nov 2016 10:46:11 -0600 Subject: [PATCH 30/32] LM32: Implement some commented out logic in lm32_dumpstate --- arch/misoc/src/lm32/lm32_dumpstate.c | 50 ++++++++++++---------------- 1 file changed, 22 insertions(+), 28 deletions(-) diff --git a/arch/misoc/src/lm32/lm32_dumpstate.c b/arch/misoc/src/lm32/lm32_dumpstate.c index e847bec40c3..229aee8bfd2 100644 --- a/arch/misoc/src/lm32/lm32_dumpstate.c +++ b/arch/misoc/src/lm32/lm32_dumpstate.c @@ -77,7 +77,6 @@ static inline uint32_t up_getsp(void) static void up_stackdump(uint32_t sp, uint32_t stack_base) { -# if 0 uint32_t stack ; for (stack = sp & ~0x1f; stack < stack_base; stack += 32) @@ -87,7 +86,6 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base) stack, ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5], ptr[6], ptr[7]); } -#endif } /**************************************************************************** @@ -96,39 +94,35 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base) static inline void up_registerdump(void) { -#if 0 /* Are user registers available from interrupt processing? */ if (g_current_regs) { _alert("EPC:%08x \n", g_current_regs[REG_EPC]); - _alert("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x A6:%08x A7:%08x\n", - g_current_regs[REG_A0], g_current_regs[REG_A1], g_current_regs[REG_A2], - g_current_regs[REG_A3], g_current_regs[REG_A4], g_current_regs[REG_A5], - g_current_regs[REG_A6], g_current_regs[REG_A7]); - _alert("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n", - g_current_regs[REG_T0], g_current_regs[REG_T1], g_current_regs[REG_T2], - g_current_regs[REG_T3], g_current_regs[REG_T4], g_current_regs[REG_T5], - g_current_regs[REG_T6]); - _alert("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n", - g_current_regs[REG_S0], g_current_regs[REG_S1], g_current_regs[REG_S2], - g_current_regs[REG_S3], g_current_regs[REG_S4], g_current_regs[REG_S5], - g_current_regs[REG_S6], g_current_regs[REG_S7]); - _alert("S8:%08x S9:%08x S10:%08x S11:%08x\n", - g_current_regs[REG_S8], g_current_regs[REG_S9], g_current_regs[REG_S10], - g_current_regs[REG_S11]); -#ifdef RISCV_SAVE_GP - _alert("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n", - g_current_regs[REG_GP], g_current_regs[REG_SP], g_current_regs[REG_FP], - g_current_regs[REG_TP], g_current_regs[REG_RA]); -#else - _alert("SP:%08x FP:%08x TP:%08x RA:%08x\n", - g_current_regs[REG_SP], g_current_regs[REG_FP], g_current_regs[REG_TP], - g_current_regs[REG_RA]); -#endif + _alert(" X0:%08x A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x A6:%08x\n", + g_current_regs[REG_X0_NDX], g_current_regs[REG_X1_NDX], + g_current_regs[REG_X2_NDX], g_current_regs[REG_X3_NDX], + g_current_regs[REG_X4_NDX], g_current_regs[REG_X5_NDX], + g_current_regs[REG_X6_NDX], g_current_regs[REG_X7_NDX]); + _alert(" A7:%08x X9:%08x X10:%08x X11:%08x X12:%08x X13:%08x X14:%08x X15:%08x\n", + g_current_regs[REG_X8_NDX], g_current_regs[REG_X9_NDX], + g_current_regs[REG_X10_NDX], g_current_regs[REG_X11_NDX], + g_current_regs[REG_X12_NDX], g_current_regs[REG_X13_NDX], + g_current_regs[REG_X14_NDX], g_current_regs[REG_X15_NDX]); + _alert("X16:%08x X17:%08x X18:%08x X19:%08x X20:%08x X21:%08x X22:%08x X23:%08x\n", + g_current_regs[REG_X16_NDX], g_current_regs[REG_X17_NDX], + g_current_regs[REG_X18_NDX], g_current_regs[REG_X19_NDX], + g_current_regs[REG_X20_NDX], g_current_regs[REG_X21_NDX], + g_current_regs[REG_X22_NDX], g_current_regs[REG_X23_NDX]); + _alert("X24:%08x X25:%08x GP:%08x FP:%08x SP:%08x RA:%08x EA:%08x BA:%08x\n", + g_current_regs[REG_X24_NDX], g_current_regs[REG_X25_NDX], + g_current_regs[REG_X26_NDX], g_current_regs[REG_X27_NDX], + g_current_regs[REG_X28_NDX], g_current_regs[REG_X29_NDX], + g_current_regs[REG_X30_NDX], g_current_regs[REG_X31_NDX]); + _alert(" IE:%08x\n", + g_current_regs[REG_X32_NDX]); } -#endif } /**************************************************************************** From fe2b75579115818be2093cc7608626e6003303df Mon Sep 17 00:00:00 2001 From: Ramtin Amin Date: Mon, 7 Nov 2016 06:54:57 -0600 Subject: [PATCH 31/32] LM32: Correct some assembly language interrupt handling issues. Now the basic port seems functional. --- arch/misoc/src/lm32/lm32_vectors.S | 59 +++++++++++++++++++++++------- 1 file changed, 46 insertions(+), 13 deletions(-) diff --git a/arch/misoc/src/lm32/lm32_vectors.S b/arch/misoc/src/lm32/lm32_vectors.S index dc62cfe25ef..a71cf63b98a 100644 --- a/arch/misoc/src/lm32/lm32_vectors.S +++ b/arch/misoc/src/lm32/lm32_vectors.S @@ -38,13 +38,43 @@ * Included Files ****************************************************************************/ +#include #include +/**************************************************************************** + * Pre-processor Definitions + ****************************************************************************/ +/* Linker memory organization ***********************************************/ +/* Data memory is organized as follows: + * + * 1) Initialized data (.data): + * Start: _sdata + * End(+1): _edata + * 2) Uninitialized data (.bss): + * Start: _sbss + * End(+1): _ebss + * + * The following are placed outside of the "normal" memory segments -- mostly + * so that they do not have to be cleared on power up. + * + * 3) Idle thread stack: + * Start: _ebss + * End(+1): _ebss+CONFIG_IDLETHREAD_STACKSIZE + * 4) Heap: + * Start: _ebss+CONFIG_IDLETHREAD_STACKSIZE + * End(+1): to the end of memory + */ + +#define LM32_STACK_BASE _ebss +#define LM32_STACK_TOP _ebss+CONFIG_IDLETHREAD_STACKSIZE +#define LM32_HEAP_BASE LM32_STACK_TOP + /**************************************************************************** * Exception handlers - Must be 32 bytes long. ****************************************************************************/ .section .text, "ax", @progbits + .global g_idle_topstack .global __start __start: @@ -131,24 +161,24 @@ _syscall_handler: _do_reset: /* Setup stack and global pointer */ - mvhi sp, hi(_fstack) - ori sp, sp, lo(_fstack) + mvhi sp, hi(LM32_STACK_TOP) + ori sp, sp, lo(LM32_STACK_TOP) /* Clear BSS */ - mvhi r1, hi(_sbss) - ori r1, r1, lo(_sbss) - mvhi r3, hi(_ebss) - ori r3, r3, lo(_ebss) + mvhi r1, hi(_sbss) + ori r1, r1, lo(_sbss) + mvhi r3, hi(_ebss) + ori r3, r3, lo(_ebss) .clearBSS: - be r1, r3, .callMain + be r1, r3, .callMain sw (r1+0), r0 addi r1, r1, 4 - bi .clearBSS + bi .clearBSS .callMain: - bi os_start + bi os_start .save_all: addi sp, sp, -136 @@ -181,7 +211,11 @@ _do_reset: sw (sp+REG_GP), r26 sw (sp+REG_FP), r27 - sw (sp+REG_SP), r28 + + /* Save SP before we add 136 */ + + addi r1, sp, 136 + sw (sp+REG_SP), r1 /* reg RA done later */ @@ -239,7 +273,7 @@ _do_reset: lw r1, (r1+REG_INT_CTX) wcsr IE, r1 lw r1, (r1+REG_X1) - addi sp, sp, 136 + eret /* This global variable is unsigned long g_idle_topstack and is @@ -249,10 +283,9 @@ _do_reset: .data .align 4 - .globl g_idle_topstack .type g_idle_topstack, object g_idle_topstack: - .long _ebss+CONFIG_IDLETHREAD_STACKSIZE + .long _LM32_STACK_TOP .size g_idle_topstack, .-g_idle_topstack .end From 155f863ca16f9ca8f5d89dda084be7872f2c271a Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Mon, 7 Nov 2016 07:04:44 -0600 Subject: [PATCH 32/32] Update README --- configs/misoc/README.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/misoc/README.txt b/configs/misoc/README.txt index b75eaad7e89..285b6a4724d 100644 --- a/configs/misoc/README.txt +++ b/configs/misoc/README.txt @@ -1,6 +1,9 @@ Misoc README ============ + This README applies to a port to NuttX running on a Qemu LM32 system. You + can find the Qemu setup at https://bitbucket.org/key2/qemu + Buildroot Toolchain ===================