mirror of
https://github.com/apache/nuttx.git
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Add logic to initialize the LPC43xx SPIFI device
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4949 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
@@ -901,7 +901,8 @@ Where <subdir> is one of the following:
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CONFIG_LPC32_CODEREDW=y : Code Red under Windows
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This configuration has some special options that can be used to
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create a block device on the SPIFI FLASH:
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create a block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y
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must also be defined to enable SPIFI setup support:
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CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI
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device.
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@@ -151,6 +151,36 @@
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#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY
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/* SPIFI clocking **********************************************************/
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/* The SPIFI will receive clocking from a divider per the settings provided
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* in this file. The NuttX code will configure PLL1 as the input clock
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* for the selected divider
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*/
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#if BOARD_FCLKOUT_FREQUENCY < 120000000
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# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */
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# undef BOARD_SPIFI_DIVA
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#else
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# undef BOARD_SPIFI_PLL1
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# define BOARD_SPIFI_DIVA 1 /* Use IDIVA */
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#endif
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#undef BOARD_SPIFI_DIVB
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#undef BOARD_SPIFI_DIVC
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#undef BOARD_SPIFI_DIVD
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#undef BOARD_SPIFI_DIVE
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/* We need to configure the divider so that its output is as close to 120MHz
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* without exceeding that value.
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*/
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#if BOARD_FCLKOUT_FREQUENCY < 120000000
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# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */
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#else
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# define BOARD_SPIFI_DIVIDER (2) /* 204MHz / 2 = 102MHz */
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# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 2 = 102MHz */
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#endif
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/* UART clocking ***********************************************************/
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/* Configure all U[S]ARTs to use the XTAL input frequency */
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@@ -659,7 +659,8 @@ CONFIG_MMCSD_HAVECARDDETECT=n
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#
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# This configuration has some special options that can be used to
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# create a block device on the SPIFI FLASH:
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# create a block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y
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# must also be defined to enable SPIFI setup support:
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#
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# CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI
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# device.
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@@ -44,39 +44,31 @@
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#include <debug.h>
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#include <errno.h>
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/* This should be removed someday when we are confident in SPIFI */
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#ifdef CONFIG_DEBUG_FS
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# include "up_arch.h"
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# include "chip/lpc43_cgu.h"
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# include "chip/lpc43_ccu.h"
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#endif
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#include <nuttx/ramdisk.h>
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#include "chip.h"
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#include <nuttx/ramdisk.h>
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#ifdef CONFIG_SPIFI_BLKDRVR
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# include "lpc43_spifi.h"
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/* This should be removed someday when we are confident in SPIFI */
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# ifdef CONFIG_DEBUG_FS
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# include "up_arch.h"
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# include "chip/lpc43_cgu.h"
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# include "chip/lpc43_ccu.h"
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# endif
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#endif
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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/* USB Configuration ********************************************************/
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/* PORT and SLOT number probably depend on the board configuration */
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#ifdef CONFIG_ARCH_BOARD_LPC4330_XPLORER
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# define CONFIG_NSH_HAVEUSBDEV 1
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#else
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# error "Unrecognized board"
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# undef CONFIG_NSH_HAVEUSBDEV
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#endif
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/* Can't support USB features if USB is not enabled */
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#ifndef CONFIG_USBDEV
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# undef CONFIG_NSH_HAVEUSBDEV
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#endif
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/* SPIFI Configuration ******************************************************/
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/* CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI device.
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/* This logic supports some special options that can be used to create a
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* block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y must also
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* be defined to enable SPIFI setup support:
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*
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* CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI device.
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* CONFIG_SPIFI_DEVNO - SPIFI minor device number. The SPFI device will be
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* at /dev/ramN, where N is the value of CONFIG_SPIFI_DEVNO. Default: 0.
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* CONFIG_SPIFI_RDONLY - Create a read only device on SPIFI.
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@@ -95,22 +87,31 @@
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*/
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#ifdef CONFIG_SPIFI_BLKDRVR
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# ifndef CONFIG_LPC43_SPIFI=n
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# error "SPIFI support is not enabled (CONFIG_LPC43_SPIFI)"
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# endif
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# ifndef CONFIG_SPIFI_DEVNO
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# define CONFIG_SPIFI_DEVNO 0
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# endif
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# ifndef CONFIG_SPIFI_OFFSET
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# define CONFIG_SPIFI_OFFSET 0
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# endif
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# ifndef CONFIG_SPIFI_BLKSIZE
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# define CONFIG_SPIFI_BLKSIZE 512
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# endif
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# ifndef CONFIG_SPIFI_NBLOCKS
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# error "Need number of SPIFI blocks (CONFIG_SPIFI_NBLOCKS)"
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# endif
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#endif
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#define SPIFI_BUFFER \
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(FAR uint8_t *)(LPC43_LOCSRAM_SPIFI_BASE + CONFIG_SPIFI_OFFSET)
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# define SPIFI_BUFFER \
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(FAR uint8_t *)(LPC43_LOCSRAM_SPIFI_BASE + CONFIG_SPIFI_OFFSET)
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#endif
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/* Debug ********************************************************************/
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@@ -151,6 +152,17 @@
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#ifdef CONFIG_SPIFI_BLKDRVR
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static int nsh_spifi_initialize(void)
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{
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int ret;
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/* Initialize the SPIFI interface */
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ret = lpc43_spifi_initialize();
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if (ret < 0)
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{
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fdbg("ERROR: lpc43_spifi_initialize failed: %d\n", ret);
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return ret;
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}
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/* This should be removed someday when we are confident in SPIFI */
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#ifdef CONFIG_DEBUG_FS
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@@ -646,18 +646,18 @@ LPCXpresso Configuration Options
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LPC17xx specific CAN device driver settings. These settings all
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require CONFIG_CAN:
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CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
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Standard 11-bit IDs.
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CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
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CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
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CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
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CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
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CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
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Standard 11-bit IDs.
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CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
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CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
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CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
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(the CCLK frequency is divided by this number to get the CAN clock).
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Options = {1,2,4,6}. Default: 4.
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CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
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CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
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LPC17xx specific PHY/Ethernet device driver settings. These setting
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also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
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@@ -787,10 +787,10 @@ Where <subdir> is one of the following:
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class driver at apps/examples/usbstorage. See apps/examples/README.txt
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for more information.
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NOTE: At present, the value for the SD SPI frequency is too
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high and the SD will fail. Setting that frequency to 400000
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removes the problem. TODO: Tune this frequency to some optimal
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value.
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NOTE: At present, the value for the SD SPI frequency is too
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high and the SD will fail. Setting that frequency to 400000
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removes the problem. TODO: Tune this frequency to some optimal
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value.
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Jumpers: J55 must be set to provide chip select PIO1_11 signal as
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the SD slot chip select.
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