mirror of
https://github.com/apache/nuttx.git
synced 2026-06-05 15:58:59 +08:00
Add logic to initialize the LPC43xx SPIFI device
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4949 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
@@ -901,7 +901,8 @@ Where <subdir> is one of the following:
|
|||||||
CONFIG_LPC32_CODEREDW=y : Code Red under Windows
|
CONFIG_LPC32_CODEREDW=y : Code Red under Windows
|
||||||
|
|
||||||
This configuration has some special options that can be used to
|
This configuration has some special options that can be used to
|
||||||
create a block device on the SPIFI FLASH:
|
create a block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y
|
||||||
|
must also be defined to enable SPIFI setup support:
|
||||||
|
|
||||||
CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI
|
CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI
|
||||||
device.
|
device.
|
||||||
|
|||||||
@@ -151,6 +151,36 @@
|
|||||||
|
|
||||||
#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY
|
#define LPC43_CCLK BOARD_FCLKOUT_FREQUENCY
|
||||||
|
|
||||||
|
/* SPIFI clocking **********************************************************/
|
||||||
|
/* The SPIFI will receive clocking from a divider per the settings provided
|
||||||
|
* in this file. The NuttX code will configure PLL1 as the input clock
|
||||||
|
* for the selected divider
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if BOARD_FCLKOUT_FREQUENCY < 120000000
|
||||||
|
# define BOARD_SPIFI_PLL1 1 /* Use PLL1 directly */
|
||||||
|
# undef BOARD_SPIFI_DIVA
|
||||||
|
#else
|
||||||
|
# undef BOARD_SPIFI_PLL1
|
||||||
|
# define BOARD_SPIFI_DIVA 1 /* Use IDIVA */
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#undef BOARD_SPIFI_DIVB
|
||||||
|
#undef BOARD_SPIFI_DIVC
|
||||||
|
#undef BOARD_SPIFI_DIVD
|
||||||
|
#undef BOARD_SPIFI_DIVE
|
||||||
|
|
||||||
|
/* We need to configure the divider so that its output is as close to 120MHz
|
||||||
|
* without exceeding that value.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if BOARD_FCLKOUT_FREQUENCY < 120000000
|
||||||
|
# define BOARD_SPIFI_FREQUENCY BOARD_FCLKOUT_FREQUENCY /* 72Mhz? */
|
||||||
|
#else
|
||||||
|
# define BOARD_SPIFI_DIVIDER (2) /* 204MHz / 2 = 102MHz */
|
||||||
|
# define BOARD_SPIFI_FREQUENCY (102000000) /* 204MHz / 2 = 102MHz */
|
||||||
|
#endif
|
||||||
|
|
||||||
/* UART clocking ***********************************************************/
|
/* UART clocking ***********************************************************/
|
||||||
/* Configure all U[S]ARTs to use the XTAL input frequency */
|
/* Configure all U[S]ARTs to use the XTAL input frequency */
|
||||||
|
|
||||||
|
|||||||
@@ -659,7 +659,8 @@ CONFIG_MMCSD_HAVECARDDETECT=n
|
|||||||
|
|
||||||
#
|
#
|
||||||
# This configuration has some special options that can be used to
|
# This configuration has some special options that can be used to
|
||||||
# create a block device on the SPIFI FLASH:
|
# create a block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y
|
||||||
|
# must also be defined to enable SPIFI setup support:
|
||||||
#
|
#
|
||||||
# CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI
|
# CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI
|
||||||
# device.
|
# device.
|
||||||
|
|||||||
@@ -44,39 +44,31 @@
|
|||||||
#include <debug.h>
|
#include <debug.h>
|
||||||
#include <errno.h>
|
#include <errno.h>
|
||||||
|
|
||||||
/* This should be removed someday when we are confident in SPIFI */
|
#include <nuttx/ramdisk.h>
|
||||||
|
|
||||||
#ifdef CONFIG_DEBUG_FS
|
|
||||||
# include "up_arch.h"
|
|
||||||
# include "chip/lpc43_cgu.h"
|
|
||||||
# include "chip/lpc43_ccu.h"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#include "chip.h"
|
#include "chip.h"
|
||||||
#include <nuttx/ramdisk.h>
|
|
||||||
|
#ifdef CONFIG_SPIFI_BLKDRVR
|
||||||
|
# include "lpc43_spifi.h"
|
||||||
|
|
||||||
|
/* This should be removed someday when we are confident in SPIFI */
|
||||||
|
|
||||||
|
# ifdef CONFIG_DEBUG_FS
|
||||||
|
# include "up_arch.h"
|
||||||
|
# include "chip/lpc43_cgu.h"
|
||||||
|
# include "chip/lpc43_ccu.h"
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
/****************************************************************************
|
/****************************************************************************
|
||||||
* Pre-Processor Definitions
|
* Pre-Processor Definitions
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
/* USB Configuration ********************************************************/
|
|
||||||
|
|
||||||
/* PORT and SLOT number probably depend on the board configuration */
|
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_BOARD_LPC4330_XPLORER
|
|
||||||
# define CONFIG_NSH_HAVEUSBDEV 1
|
|
||||||
#else
|
|
||||||
# error "Unrecognized board"
|
|
||||||
# undef CONFIG_NSH_HAVEUSBDEV
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Can't support USB features if USB is not enabled */
|
|
||||||
|
|
||||||
#ifndef CONFIG_USBDEV
|
|
||||||
# undef CONFIG_NSH_HAVEUSBDEV
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/* SPIFI Configuration ******************************************************/
|
/* SPIFI Configuration ******************************************************/
|
||||||
/* CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI device.
|
/* This logic supports some special options that can be used to create a
|
||||||
|
* block device on the SPIFI FLASH. NOTE: CONFIG_LPC43_SPIFI=y must also
|
||||||
|
* be defined to enable SPIFI setup support:
|
||||||
|
*
|
||||||
|
* CONFIG_SPIFI_BLKDRVR - Enable to create a block driver on the SPFI device.
|
||||||
* CONFIG_SPIFI_DEVNO - SPIFI minor device number. The SPFI device will be
|
* CONFIG_SPIFI_DEVNO - SPIFI minor device number. The SPFI device will be
|
||||||
* at /dev/ramN, where N is the value of CONFIG_SPIFI_DEVNO. Default: 0.
|
* at /dev/ramN, where N is the value of CONFIG_SPIFI_DEVNO. Default: 0.
|
||||||
* CONFIG_SPIFI_RDONLY - Create a read only device on SPIFI.
|
* CONFIG_SPIFI_RDONLY - Create a read only device on SPIFI.
|
||||||
@@ -95,22 +87,31 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
#ifdef CONFIG_SPIFI_BLKDRVR
|
#ifdef CONFIG_SPIFI_BLKDRVR
|
||||||
|
|
||||||
|
# ifndef CONFIG_LPC43_SPIFI=n
|
||||||
|
# error "SPIFI support is not enabled (CONFIG_LPC43_SPIFI)"
|
||||||
|
# endif
|
||||||
|
|
||||||
# ifndef CONFIG_SPIFI_DEVNO
|
# ifndef CONFIG_SPIFI_DEVNO
|
||||||
# define CONFIG_SPIFI_DEVNO 0
|
# define CONFIG_SPIFI_DEVNO 0
|
||||||
# endif
|
# endif
|
||||||
|
|
||||||
# ifndef CONFIG_SPIFI_OFFSET
|
# ifndef CONFIG_SPIFI_OFFSET
|
||||||
# define CONFIG_SPIFI_OFFSET 0
|
# define CONFIG_SPIFI_OFFSET 0
|
||||||
# endif
|
# endif
|
||||||
|
|
||||||
# ifndef CONFIG_SPIFI_BLKSIZE
|
# ifndef CONFIG_SPIFI_BLKSIZE
|
||||||
# define CONFIG_SPIFI_BLKSIZE 512
|
# define CONFIG_SPIFI_BLKSIZE 512
|
||||||
# endif
|
# endif
|
||||||
|
|
||||||
# ifndef CONFIG_SPIFI_NBLOCKS
|
# ifndef CONFIG_SPIFI_NBLOCKS
|
||||||
# error "Need number of SPIFI blocks (CONFIG_SPIFI_NBLOCKS)"
|
# error "Need number of SPIFI blocks (CONFIG_SPIFI_NBLOCKS)"
|
||||||
# endif
|
# endif
|
||||||
#endif
|
|
||||||
|
|
||||||
#define SPIFI_BUFFER \
|
# define SPIFI_BUFFER \
|
||||||
(FAR uint8_t *)(LPC43_LOCSRAM_SPIFI_BASE + CONFIG_SPIFI_OFFSET)
|
(FAR uint8_t *)(LPC43_LOCSRAM_SPIFI_BASE + CONFIG_SPIFI_OFFSET)
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Debug ********************************************************************/
|
/* Debug ********************************************************************/
|
||||||
|
|
||||||
@@ -151,6 +152,17 @@
|
|||||||
#ifdef CONFIG_SPIFI_BLKDRVR
|
#ifdef CONFIG_SPIFI_BLKDRVR
|
||||||
static int nsh_spifi_initialize(void)
|
static int nsh_spifi_initialize(void)
|
||||||
{
|
{
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
/* Initialize the SPIFI interface */
|
||||||
|
|
||||||
|
ret = lpc43_spifi_initialize();
|
||||||
|
if (ret < 0)
|
||||||
|
{
|
||||||
|
fdbg("ERROR: lpc43_spifi_initialize failed: %d\n", ret);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
/* This should be removed someday when we are confident in SPIFI */
|
/* This should be removed someday when we are confident in SPIFI */
|
||||||
|
|
||||||
#ifdef CONFIG_DEBUG_FS
|
#ifdef CONFIG_DEBUG_FS
|
||||||
|
|||||||
@@ -646,18 +646,18 @@ LPCXpresso Configuration Options
|
|||||||
LPC17xx specific CAN device driver settings. These settings all
|
LPC17xx specific CAN device driver settings. These settings all
|
||||||
require CONFIG_CAN:
|
require CONFIG_CAN:
|
||||||
|
|
||||||
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
|
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
|
||||||
Standard 11-bit IDs.
|
Standard 11-bit IDs.
|
||||||
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
|
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
|
||||||
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
|
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
|
||||||
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
|
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
|
||||||
(the CCLK frequency is divided by this number to get the CAN clock).
|
(the CCLK frequency is divided by this number to get the CAN clock).
|
||||||
Options = {1,2,4,6}. Default: 4.
|
Options = {1,2,4,6}. Default: 4.
|
||||||
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
|
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
|
||||||
(the CCLK frequency is divided by this number to get the CAN clock).
|
(the CCLK frequency is divided by this number to get the CAN clock).
|
||||||
Options = {1,2,4,6}. Default: 4.
|
Options = {1,2,4,6}. Default: 4.
|
||||||
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
|
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
|
||||||
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
|
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7
|
||||||
|
|
||||||
LPC17xx specific PHY/Ethernet device driver settings. These setting
|
LPC17xx specific PHY/Ethernet device driver settings. These setting
|
||||||
also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
|
also require CONFIG_NET and CONFIG_LPC17_ETHERNET.
|
||||||
@@ -787,10 +787,10 @@ Where <subdir> is one of the following:
|
|||||||
class driver at apps/examples/usbstorage. See apps/examples/README.txt
|
class driver at apps/examples/usbstorage. See apps/examples/README.txt
|
||||||
for more information.
|
for more information.
|
||||||
|
|
||||||
NOTE: At present, the value for the SD SPI frequency is too
|
NOTE: At present, the value for the SD SPI frequency is too
|
||||||
high and the SD will fail. Setting that frequency to 400000
|
high and the SD will fail. Setting that frequency to 400000
|
||||||
removes the problem. TODO: Tune this frequency to some optimal
|
removes the problem. TODO: Tune this frequency to some optimal
|
||||||
value.
|
value.
|
||||||
|
|
||||||
Jumpers: J55 must be set to provide chip select PIO1_11 signal as
|
Jumpers: J55 must be set to provide chip select PIO1_11 signal as
|
||||||
the SD slot chip select.
|
the SD slot chip select.
|
||||||
|
|||||||
Reference in New Issue
Block a user