mirror of
https://github.com/apache/nuttx.git
synced 2026-06-04 14:53:47 +08:00
arch/arm/src/tiva/cc13xx: Fixes to get a clean build of the configs/launchxl-cc1312r1 configuration. Still untested.
This commit is contained in:
@@ -288,6 +288,9 @@ config ARCH_CHIP_CC13X2
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select TIVA_HAVE_TIMER3
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select TIVA_HAVE_UART1
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config ARCH_CHIP_CC26X2
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bool
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config LM_REVA2
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bool "Rev A2"
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default n
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@@ -539,6 +542,11 @@ config TIVA_UART0_HCIUART
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endchoice # UART0 Driver Configuration
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config TIVA_CC26X2_POWERLIB
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bool "CC26x2 Power Library"
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default n
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depends on ARCH_CHIP_CC26X2
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if TIVA_UART0_HCIUART
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config TIVA_HCIUART0_RXBUFSIZE
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int "HCI UART0 Rx buffer size"
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File diff suppressed because it is too large
Load Diff
@@ -176,6 +176,7 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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mp1rev = ((getreg32(TIVA_FCFG1_TRIM_CAL_REVISION) &
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FCFG1_TRIM_CAL_REVISION_MP1_MASK) >>
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FCFG1_TRIM_CAL_REVISION_MP1_SHIFT);
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if (mp1rev < 542)
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{
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uint32_t ldoTrimReg = getreg32(TIVA_FCFG1_BAT_RC_LDO_TRIM);
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@@ -317,32 +318,35 @@ void cc13xx_trim_device(void)
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rom_setup_cachemode();
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/* 1. Check for powerdown 2. Check for shutdown 3. Assume cold reset if none
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* of the above. It is always assumed that the application will freeze the
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* latches in AON_IOC when going to powerdown in order to retain the values
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* on the IOs. NB. If this bit is not cleared before proceeding to
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* powerdown, the IOs will all default to the reset configuration when
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/* 1. Check for powerdown
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* 2. Check for shutdown
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* 3. Assume cold reset if none of the above.
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*
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* It is always assumed that the application will freeze the latches in
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* AON_IOC when going to powerdown in order to retain the values on the
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* IOs. NB. If this bit is not cleared before proceeding to powerdown,
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* the IOs will all default to the reset configuration when
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* restarting.
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*/
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if ((getreg32(TIVA_AON_IOC_IOCLATCH) & AON_IOC_IOCLATCH_EN) == 0)
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{
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/* NB. This should be calling a ROM implementation of required trim and
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* compensation e.g.
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* trim_wakeup_frompowerdown()
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* compensation e.g. trim_wakeup_frompowerdown()
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*/
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trim_wakeup_frompowerdown();
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}
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/* Check for shutdown When device is going to shutdown the hardware will
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/* Check for shutdown. When device is going to shutdown the hardware will
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* automatically clear the SLEEPDIS bit in the SLEEP register in the
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* AON_SYSCTL module. It is left for the application to assert this bit when
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* waking back up, but not before the desired IO configuration has been
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* re-established.
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*/
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else if ((getreg32(TIVA_AON_SYSCTL_SLEEPCTL) & AON_SYSCTL_SLEEPCTL_IO_PAD_SLEEP_DIS) == 0)
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else if ((getreg32(TIVA_AON_SYSCTL_SLEEPCTL) &
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AON_SYSCTL_SLEEPCTL_IO_PAD_SLEEP_DIS) == 0)
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{
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/* NB. This should be calling a ROM implementation of required trim and
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* compensation e.g. trim_wakeup_fromshutdown() -->
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@@ -357,14 +361,12 @@ void cc13xx_trim_device(void)
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/* Consider adding a check for soft reset to allow debugging to skip this
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* section!!! NB. This should be calling a ROM implementation of
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* required trim and compensation e.g. trim_coldreset() -->
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* trim_wakeup_fromshutdown() -->
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* trim_wakeup_frompowerdown()
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* trim_wakeup_fromshutdown() --> trim_wakeup_frompowerdown()
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*/
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trim_coldreset();
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trim_wakeup_fromshutdown(fcfg1_revision);
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trim_wakeup_frompowerdown();
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}
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/* Set VIMS power domain control. PDCTL1VIMS = 0 ==> VIMS power domain is
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@@ -377,7 +379,7 @@ void cc13xx_trim_device(void)
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* up from sleep
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*/
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regval = getreg32(TIVA_FLASH_FPAC1);
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regval = getreg32(TIVA_FLASH_FPAC1);
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regval &= ~FLASH_FPAC1_PSLEEPTDIS_MASK;
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regval |= (0x139 << FLASH_FPAC1_PSLEEPTDIS_SHIFT);
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putreg32(regval, TIVA_FLASH_FPAC1);
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@@ -410,6 +412,5 @@ void cc13xx_trim_device(void)
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while ((getreg32(TIVA_VIMS_STAT) & VIMS_STAT_MODE_CHANGING) != 0)
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{
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/* Do nothing - wait for an eventual ongoing mode change to complete. */
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}
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}
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@@ -267,8 +267,7 @@ static void trim_wakeup_fromshutdown(uint32_t fcfg1_revision)
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* -Configure XOSC.
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*/
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rom_setup_coldreset_from_shutdown_cfg2(fcfg1_revision,
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ccfg_modeconf);
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rom_setup_coldreset_from_shutdown_cfg2(fcfg1_revision, ccfg_modeconf);
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/* Special shadow register trim propagation on first batch of devices */
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@@ -533,12 +532,14 @@ void cc13xx_trim_device(void)
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rom_setup_cachemode();
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/* 1. Check for powerdown 2. Check for shutdown 3. Assume cold reset if none
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* of the above. It is always assumed that the application will freeze the
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* latches in AON_IOC when going to powerdown in order to retain the values
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* on the IOs. NB. If this bit is not cleared before proceeding to
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* powerdown, the IOs will all default to the reset configuration when
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* restarting.
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/* 1. Check for powerdown
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* 2. Check for shutdown
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* 3. Assume cold reset if none of the above.
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*
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* It is always assumed that the application will freeze the latches in
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* AON_IOC when going to powerdown in order to retain the values on the
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* IOs. NB. If this bit is not cleared before proceeding to powerdown,
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* the IOs will all default to the reset configuration when restarting.
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*/
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if ((getreg32(TIVA_AON_IOC_IOCLATCH) & AON_IOC_IOCLATCH_EN) == 0)
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@@ -299,16 +299,16 @@ void cc13xx_trim_device(void)
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/* Check for shutdown When device is going to shutdown the hardware will
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* automatically clear the SLEEPDIS bit in the SLEEP register in the
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* AON_PMCTL module. It is left for the application to assert this bit when
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* waking back up, but not before the desired IO configuration has been
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* re-established.
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* AON_PMCTL module. It is left for the application to assert this bit
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* when waking back up, but not before the desired IO configuration has
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* been re-established.
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*/
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else if ((getreg32(TIVA_AON_PMCTL_SLEEPCTL) & AON_PMCTL_SLEEPCTL_IO_PAD_SLEEP_DIS)
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== 0)
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else if ((getreg32(TIVA_AON_PMCTL_SLEEPCTL) &
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AON_PMCTL_SLEEPCTL_IO_PAD_SLEEP_DIS) == 0)
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{
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/* NB. This should be calling a ROM implementation of required trim and
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* compensation e.g. trim_wakeup_fromshutdown() -->
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/* NB. This should be calling a ROM implementation of required trim
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* and compensation e.g. trim_wakeup_fromshutdown() -->
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* trim_wakeup_frompowerdown();
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*/
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@@ -317,11 +317,10 @@ void cc13xx_trim_device(void)
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}
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else
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{
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/* Consider adding a check for soft reset to allow debugging to skip this
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* section!!! NB. This should be calling a ROM implementation of
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/* Consider adding a check for soft reset to allow debugging to skip
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* this section!!! NB. This should be calling a ROM implementation of
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* required trim and compensation e.g. trim_coldreset() -->
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* trim_wakeup_fromshutdown() -->
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* trim_wakeup_frompowerdown()
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* trim_wakeup_fromshutdown() --> trim_wakeup_frompowerdown()
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*/
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trim_coldreset();
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@@ -335,8 +334,8 @@ void cc13xx_trim_device(void)
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putreg32(0, TIVA_PRCM_PDCTL1VIMS);
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/* Configure optimal wait time for flash FSM in cases where flash pump wakes
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* up from sleep
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/* Configure optimal wait time for flash FSM in cases where flash pump
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* wakes up from sleep
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*/
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regval = getreg32(TIVA_FLASH_FPAC1);
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@@ -345,8 +344,8 @@ void cc13xx_trim_device(void)
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putreg32(regval, TIVA_FLASH_FPAC1);
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/* And finally at the end of the flash boot process: SET BOOT_DET bits in
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* AON_PMCTL to 3 if already found to be 1 Note: The BOOT_DET_x_CLR/SET bits
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* must be manually cleared
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* AON_PMCTL to 3 if already found to be 1 Note: The BOOT_DET_x_CLR/SET
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* bits must be manually cleared
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*/
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if ((getreg32(TIVA_AON_PMCTL_RESETCTL) &
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@@ -135,7 +135,7 @@
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/* This structure represents the pin configuration */
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struct cc134xx_pinconfig_s
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struct cc13xx_pinconfig_s
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{
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uint32_t gpio; /* GPIO and DIO definitions */
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uint32_t ioc; /* IOC configuration register image */
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@@ -145,7 +145,7 @@ struct cc134xx_pinconfig_s
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* across all MCUs.
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*/
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typedef const struct cc134xx_pinconfig_s *pinconfig_t;
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typedef const struct cc13xx_pinconfig_s *pinconfig_t;
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/****************************************************************************
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* Public Function Prototypes
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@@ -279,8 +279,8 @@ void __start(void)
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showprogress('E');
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#endif
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#ifndef CONFIG_ARCH_CHIP_CC13X0 /* REVISIT */
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/* Initialize the Power Manager internal state. It must be called prior
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#ifdef CONFIG_TIVA_CC26X2_POWERLIB /* REVISIT */
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/* Initialize the Power Manager internal state. This must be called prior
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* to any other Power API.
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*/
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@@ -14,9 +14,10 @@ Contents
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Status
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======
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2019-12-03: Fragmentary board support in place. The initial intent
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of this board support is simply to assist in the CC13xx architecture
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development. Serious board development will occur later.
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2019-01-21: Fragmentary board support in place. The initial intent
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of this board support is simply to assist in the CC13x0 architecture
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development. Serious board development will occur later. At present,
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the CC13x0 does not even compile error-free.
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Serial Console
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==============
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@@ -9,13 +9,15 @@ Contents
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o Status
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o Serial Console
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o LEDs and Buttons
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o Version 1 or 2?
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Status
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======
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2018-12-03: Fragmentary board support in place. The initial intent
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of this board support is simply to assist in the CC13xx architecture
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development. Serious board development will occur later.
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development. Serious board development will occur later. Board
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support is missing LED and button support.
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Serial Console
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==============
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@@ -33,3 +35,17 @@ LEDs
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Buttons
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-------
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Version 1 or 2?
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===============
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Two versions of the CC1312R1 are supported selected by CONFIG_ARCH_CHIP_CC13XX_V1
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or CONFIG_ARCH_CHIP_CC13XX_V2. How can you tell which one you have?
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Perhaps you can tell by the markings on the chip, but I do not have the
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secret decoder ring necessary to do that.
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What you can do is enable CONFIG_DEBUG_ASSERTIONS. The firmware can
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determine which version you have by looking at register contents. The
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firmware will assert if you select the wrong version. If that occurs,
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switch to the other version and the assertion should go away.
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