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arch/cortex-m: replace arm_switchcontext to c-style

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Signed-off-by: chao.an <anchao@xiaomi.com>
This commit is contained in:
chao.an
2021-08-04 19:38:22 +08:00
committed by Xiang Xiao
parent 6c2fcdc45d
commit 6cfb132232
33 changed files with 64 additions and 330 deletions
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arch/arm/src/armv6-m/arm_switchcontext.S
-81
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@@ -1,81 +0,0 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "nvic.h"
#include "svcall.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Symbols
****************************************************************************/
.file "arm_switchcontext.S"
/****************************************************************************
* Macros
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_switchcontext
*
* Description:
* Save the current thread context and restore the specified context.
* Full prototype is:
*
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*
* Returned Value:
* None
*
****************************************************************************/
.align 2
.code 16
.thumb_func
.globl arm_switchcontext
.type arm_switchcontext, function
arm_switchcontext:
/* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */
mov r2, r1 /* R2: restoreregs */
mov r1, r0 /* R1: saveregs */
mov r0, #SYS_switch_context /* R0: context switch */
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
/* We will get here only after the rerturn from the context switch */
bx lr
.size arm_switchcontext, .-arm_switchcontext
.end
arch/arm/src/armv7-m/gnu/arm_switchcontext.S
-81
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@@ -1,81 +0,0 @@
/****************************************************************************
* arch/arm/src/armv7-m/gnu/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "nvic.h"
#include "svcall.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Symbols
****************************************************************************/
.syntax unified
.thumb
.file "arm_switchcontext.S"
/****************************************************************************
* Macros
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_switchcontext
*
* Description:
* Save the current thread context and restore the specified context.
* Full prototype is:
*
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*
* Returned Value:
* None
*
****************************************************************************/
.thumb_func
.globl arm_switchcontext
.type arm_switchcontext, function
arm_switchcontext:
/* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */
mov r2, r1 /* R2: restoreregs */
mov r1, r0 /* R1: saveregs */
mov r0, #SYS_switch_context /* R0: context switch */
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
/* We will get here only after the rerturn from the context switch */
bx lr
.size arm_switchcontext, .-arm_switchcontext
.end
arch/arm/src/armv8-m/arm_switchcontext.S
-81
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@@ -1,81 +0,0 @@
/****************************************************************************
* arch/arm/src/armv8-m/arm_switchcontext.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "nvic.h"
#include "svcall.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Symbols
****************************************************************************/
.syntax unified
.thumb
.file "arm_switchcontext.S"
/****************************************************************************
* Macros
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_switchcontext
*
* Description:
* Save the current thread context and restore the specified context.
* Full prototype is:
*
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*
* Returned Value:
* None
*
****************************************************************************/
.thumb_func
.globl arm_switchcontext
.type arm_switchcontext, function
arm_switchcontext:
/* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */
mov r2, r1 /* R2: restoreregs */
mov r1, r0 /* R1: saveregs */
mov r0, #SYS_switch_context /* R0: context switch */
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
/* We will get here only after the rerturn from the context switch */
bx lr
.size arm_switchcontext, .-arm_switchcontext
.end
arch/arm/src/armv7-m/iar/arm_switchcontext.S → arch/arm/src/common/arm_switchcontext.c
+6 -39
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@@ -1,5 +1,5 @@
/**************************************************************************** /****************************************************************************
* arch/arm/src/armv7-m/iar/arm_switchcontext.S * arch/arm/src/common/arm_switchcontext.c
* *
* Licensed to the Apache Software Foundation (ASF) under one or more * Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with * contributor license agreements. See the NOTICE file distributed with
@@ -23,27 +23,9 @@
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include <arch/irq.h>
#include "nvic.h"
#include "svcall.h" #include "svcall.h"
#include "syscall.h"
MODULE arm_switchcontext
SECTION .text:CODE:NOROOT(2)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Symbols
****************************************************************************/
PUBLIC arm_switchcontext
/****************************************************************************
* Macros
****************************************************************************/
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
@@ -54,28 +36,13 @@
* *
* Description: * Description:
* Save the current thread context and restore the specified context. * Save the current thread context and restore the specified context.
* Full prototype is:
*
* void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
* *
* Returned Value: * Returned Value:
* None * None
* *
****************************************************************************/ ****************************************************************************/
THUMB void arm_switchcontext(uint32_t *saveregs, uint32_t *restoreregs)
{
arm_switchcontext: sys_call2(SYS_switch_context, (uintptr_t)saveregs, (uintptr_t)restoreregs);
}
/* Perform the System call with R0=1, R1=saveregs, R2=restoreregs */
mov r2, r1 /* R2: restoreregs */
mov r1, r0 /* R1: saveregs */
mov r0, #SYS_switch_context /* R0: context switch */
svc #SYS_syscall /* Force synchronous SVCall (or Hard Fault) */
/* We will get here only after the rerturn from the context switch */
bx lr
END
arch/arm/src/cxd56xx/Make.defs
+2 -2
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@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S CMN_ASRCS += vfork.S
ifneq ($(CONFIG_CXD56_TESTSET),y) ifneq ($(CONFIG_CXD56_TESTSET),y)
@@ -32,7 +32,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
CMN_CSRCS += arm_svcall.c arm_vfork.c CMN_CSRCS += arm_svcall.c arm_vfork.c arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += arm_lazyexception.S CMN_ASRCS += arm_lazyexception.S
arch/arm/src/efm32/Make.defs
+2 -1
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@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
@@ -29,6 +29,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += arm_lazyexception.S CMN_ASRCS += arm_lazyexception.S
arch/arm/src/eoss3/Make.defs
+2 -1
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@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
@@ -29,6 +29,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c CMN_CSRCS += arm_trigger_irq.c arm_udelay.c arm_unblocktask.c arm_usestack.c arm_vfork.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += arm_lazyexception.S CMN_ASRCS += arm_lazyexception.S
arch/arm/src/imxrt/Make.defs
+2 -1
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@@ -20,7 +20,7 @@
# Common ARM and Cortex-M7 files # Common ARM and Cortex-M7 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c
@@ -31,6 +31,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_systemreset.c CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_systemreset.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
CMN_CSRCS += arm_stackcheck.c CMN_CSRCS += arm_stackcheck.c
arch/arm/src/kinetis/Make.defs
+2 -2
View File
@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -28,7 +28,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasestack.c
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_releasepending.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_releasepending.c
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_unblocktask.c arm_usestack.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_unblocktask.c arm_usestack.c
CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_svcall.c arm_vfork.c CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_svcall.c arm_vfork.c
CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
CMN_CSRCS += arm_stackcheck.c CMN_CSRCS += arm_stackcheck.c
arch/arm/src/kl/Make.defs
+2 -1
View File
@@ -19,7 +19,7 @@
############################################################################ ############################################################################
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
@@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_BUILD_PROTECTED),y) ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c CMN_CSRCS += arm_task_start.c arm_pthread_start.c
arch/arm/src/lc823450/Make.defs
+2 -2
View File
@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S CMN_ASRCS += vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c
@@ -28,7 +28,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c CMN_CSRCS += arm_svcall.c arm_vfork.c arm_trigger_irq.c arm_switchcontext.c
# CMN_CSRCS += up_dwt.c # CMN_CSRCS += up_dwt.c
arch/arm/src/lpc17xx_40xx/Make.defs
+2 -2
View File
@@ -20,7 +20,7 @@
# Common ARM and Cortex-M3 files # Common ARM and Cortex-M3 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -30,7 +30,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_trigger_irq.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_trigger_irq.c
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_doirq.c arm_hardfault.c
CMN_CSRCS += arm_svcall.c arm_checkstack.c arm_vfork.c CMN_CSRCS += arm_svcall.c arm_checkstack.c arm_vfork.c arm_switchcontext.c
CMN_CSRCS += arm_systemreset.c CMN_CSRCS += arm_systemreset.c
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
arch/arm/src/lpc43xx/Make.defs
+2 -2
View File
@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -28,7 +28,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
CMN_CSRCS += arm_usestack.c arm_vfork.c CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += arm_lazyexception.S CMN_ASRCS += arm_lazyexception.S
arch/arm/src/lpc54xx/Make.defs
+2 -2
View File
@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -28,7 +28,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
CMN_CSRCS += arm_usestack.c arm_vfork.c CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += arm_lazyexception.S CMN_ASRCS += arm_lazyexception.S
arch/arm/src/max326xx/Make.defs
+2 -2
View File
@@ -20,7 +20,7 @@
# Common ARMv7-M Source Files # Common ARMv7-M Source Files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
@@ -30,7 +30,7 @@ CMN_CSRCS += arm_mdelay.c arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c
CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += arm_lazyexception.S CMN_ASRCS += arm_lazyexception.S
arch/arm/src/nrf52/Make.defs
+2 -1
View File
@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S vfork.S CMN_ASRCS += arm_testset.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c
@@ -29,6 +29,7 @@ CMN_CSRCS += arm_modifyreg32.c arm_releasepending.c arm_releasestack.c
CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c CMN_CSRCS += arm_reprioritizertr.c arm_schedulesigaction.c arm_sigdeliver.c
CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_udelay.c CMN_CSRCS += arm_stackframe.c arm_svcall.c arm_trigger_irq.c arm_udelay.c
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_systemreset.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_systemreset.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_NRF52_SYSTIMER_SYSTICK),y) ifeq ($(CONFIG_NRF52_SYSTIMER_SYSTICK),y)
CMN_CSRCS += arm_systick.c nrf52_systick.c CMN_CSRCS += arm_systick.c nrf52_systick.c
arch/arm/src/nuc1xx/Make.defs
+2 -1
View File
@@ -19,7 +19,7 @@
############################################################################ ############################################################################
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
@@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_BUILD_PROTECTED),y) ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c CMN_CSRCS += arm_task_start.c arm_pthread_start.c
arch/arm/src/rp2040/Make.defs
+2 -1
View File
@@ -19,7 +19,7 @@
############################################################################ ############################################################################
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
@@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_ARCH_RAMVECTORS),y) ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c CMN_CSRCS += arm_ramvec_initialize.c arm_ramvec_attach.c
arch/arm/src/rtl8720c/Make.defs
+2 -1
View File
@@ -32,7 +32,7 @@ CMN_ASRCS += arm_exception.S
# #
CMN_ASRCS += arm_fetchadd.S arm_fpu.S arm_setjmp.S CMN_ASRCS += arm_fetchadd.S arm_fpu.S arm_setjmp.S
CMN_ASRCS += arm_fullcontextrestore.S arm_saveusercontext.S CMN_ASRCS += arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += arm_switchcontext.S arm_testset.S vfork.S CMN_ASRCS += arm_testset.S vfork.S
CMN_UASRCS += arm_signal_handler.S CMN_UASRCS += arm_signal_handler.S
@@ -42,6 +42,7 @@ CMN_CSRCS += arm_itm_syslog.c arm_memfault.c arm_mpu.c arm_ramvec_attach.c
CMN_CSRCS += arm_ramvec_initialize.c arm_releasepending.c arm_reprioritizertr.c CMN_CSRCS += arm_ramvec_initialize.c arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_signal_dispatch.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_signal_dispatch.c
CMN_CSRCS += arm_stackcheck.c arm_svcall.c arm_systick.c arm_unblocktask.c CMN_CSRCS += arm_stackcheck.c arm_svcall.c arm_systick.c arm_unblocktask.c
CMN_CSRCS += arm_switchcontext.c
# arch/arm/src/rtl8720c # arch/arm/src/rtl8720c
# #
arch/arm/src/s32k1xx/s32k11x/Make.defs
+2 -2
View File
@@ -21,13 +21,13 @@
# Source files specific to the Cortex-M0+ # Source files specific to the Cortex-M0+
CMN_ASRCS += arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS += arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S CMN_ASRCS += vfork.S
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS += arm_initialstate.c arm_releasepending.c arm_reprioritizertr.c CMN_CSRCS += arm_initialstate.c arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c
CMN_CSRCS += arm_unblocktask.c arm_doirq.c arm_hardfault.c arm_svcall.c CMN_CSRCS += arm_unblocktask.c arm_doirq.c arm_hardfault.c arm_svcall.c
CMN_CSRCS += arm_vectors.c CMN_CSRCS += arm_vectors.c arm_switchcontext.c
ifeq ($(CONFIG_BUILD_PROTECTED),y) ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_signal_dispatch.c CMN_CSRCS += arm_signal_dispatch.c
arch/arm/src/s32k1xx/s32k14x/Make.defs
+2 -2
View File
@@ -20,14 +20,14 @@
# Source files specific to the Cortex-M4F # Source files specific to the Cortex-M4F
CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_initialstate.c arm_memfault.c CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_initialstate.c arm_memfault.c
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_schedulesigaction.c
CMN_CSRCS += arm_sigdeliver.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c CMN_CSRCS += arm_sigdeliver.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
CMN_CSRCS += arm_systemreset.c CMN_CSRCS += arm_systemreset.c arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y) ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += arm_lazyexception.S CMN_ASRCS += arm_lazyexception.S
arch/arm/src/sam34/Make.defs
+2 -2
View File
@@ -22,7 +22,7 @@
# Common ARM and Cortex-M3 files # Common ARM and Cortex-M3 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -32,7 +32,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
CMN_CSRCS += arm_usestack.c arm_vfork.c CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c
ifneq ($(CONFIG_SMP),y) ifneq ($(CONFIG_SMP),y)
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
arch/arm/src/samd2l2/Make.defs
+2 -1
View File
@@ -19,7 +19,7 @@
############################################################################ ############################################################################
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
@@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_BUILD_PROTECTED),y) ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c CMN_CSRCS += arm_task_start.c arm_pthread_start.c
arch/arm/src/samd5e5/Make.defs
+2 -2
View File
@@ -22,7 +22,7 @@
# Common ARM and Cortex-M4 files # Common ARM and Cortex-M4 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
@@ -32,7 +32,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_trigger_irq.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_trigger_irq.c
CMN_CSRCS += arm_unblocktask.c arm_udelay.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_unblocktask.c arm_udelay.c arm_usestack.c arm_doirq.c
CMN_CSRCS += arm_hardfault.c arm_vfork.c CMN_CSRCS += arm_hardfault.c arm_vfork.c arm_switchcontext.c
# Configuration-dependent common files # Configuration-dependent common files
arch/arm/src/samv7/Make.defs
+2 -2
View File
@@ -23,7 +23,7 @@
# Common ARM and Cortex-M7 files # Common ARM and Cortex-M7 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -33,7 +33,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
CMN_CSRCS += arm_usestack.c arm_vfork.c CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c
# Configuration-dependent common files # Configuration-dependent common files
arch/arm/src/stm32/Make.defs
+2 -2
View File
@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -28,7 +28,7 @@ CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c CMN_CSRCS += arm_sigdeliver.c arm_stackframe.c arm_svcall.c arm_systemreset.c
CMN_CSRCS += arm_trigger_irq.c arm_unblocktask.c arm_udelay.c arm_usestack.c CMN_CSRCS += arm_trigger_irq.c arm_unblocktask.c arm_udelay.c arm_usestack.c
CMN_CSRCS += arm_doirq.c arm_vfork.c CMN_CSRCS += arm_doirq.c arm_vfork.c arm_switchcontext.c
ifeq ($(CONFIG_STM32_TICKLESS_SYSTICK),y) ifeq ($(CONFIG_STM32_TICKLESS_SYSTICK),y)
CMN_CSRCS += arm_systick.c CMN_CSRCS += arm_systick.c
arch/arm/src/stm32f0l0g0/Make.defs
+2 -1
View File
@@ -19,7 +19,7 @@
############################################################################ ############################################################################
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_switchcontext.S vfork.S CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
@@ -29,6 +29,7 @@ CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c CMN_CSRCS += arm_systemreset.c arm_unblocktask.c arm_usestack.c arm_doirq.c
CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c CMN_CSRCS += arm_hardfault.c arm_svcall.c arm_vectors.c arm_vfork.c
CMN_CSRCS += arm_switchcontext.c
ifeq ($(CONFIG_BUILD_PROTECTED),y) ifeq ($(CONFIG_BUILD_PROTECTED),y)
CMN_CSRCS += arm_task_start.c arm_pthread_start.c CMN_CSRCS += arm_task_start.c arm_pthread_start.c
arch/arm/src/stm32f7/Make.defs
+2 -2
View File
@@ -23,7 +23,7 @@
# Common ARM and Cortex-M7 files # Common ARM and Cortex-M7 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -33,7 +33,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_unblocktask.c CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_unblocktask.c
CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c CMN_CSRCS += arm_udelay.c arm_usestack.c arm_vfork.c arm_switchcontext.c
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y) ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
CMN_CSRCS += arm_idle.c CMN_CSRCS += arm_idle.c
arch/arm/src/stm32h7/Make.defs
+2 -2
View File
@@ -23,7 +23,7 @@
# Common ARM and Cortex-M7 files # Common ARM and Cortex-M7 files
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S vfork.S CMN_ASRCS += arm_testset.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -33,7 +33,7 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c
CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_udelay.c arm_unblocktask.c CMN_CSRCS += arm_systemreset.c arm_trigger_irq.c arm_udelay.c arm_unblocktask.c
CMN_CSRCS += arm_usestack.c arm_vfork.c CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c
# Configuration-dependent common files # Configuration-dependent common files
arch/arm/src/stm32l4/Make.defs
+2 -2
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@@ -23,7 +23,7 @@
# Common ARM and Cortex-M4 files (copied from stm32/Make.defs) # Common ARM and Cortex-M4 files (copied from stm32/Make.defs)
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -33,7 +33,7 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_switchcontext.c
# Configuration-dependent common files # Configuration-dependent common files
arch/arm/src/stm32l5/Make.defs
+2 -2
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@@ -28,7 +28,7 @@ HEAD_ASRC =
CMN_UASRCS = CMN_UASRCS =
CMN_UCSRCS = CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -38,7 +38,7 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c CMN_CSRCS += arm_svcall.c arm_systemreset.c arm_trigger_irq.c arm_udelay.c
CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c CMN_CSRCS += arm_unblocktask.c arm_usestack.c arm_vfork.c arm_switchcontext.c
# Configuration-dependent common files # Configuration-dependent common files
arch/arm/src/tiva/Make.defs
+2 -2
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@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -28,7 +28,7 @@ CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c CMN_CSRCS += arm_releasepending.c arm_releasestack.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_stackframe.c
CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c CMN_CSRCS += arm_svcall.c arm_trigger_irq.c arm_unblocktask.c arm_udelay.c
CMN_CSRCS += arm_usestack.c arm_vfork.c CMN_CSRCS += arm_usestack.c arm_vfork.c arm_switchcontext.c
ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y) ifeq ($(CONFIG_ARM_SEMIHOSTING_HOSTFS),y)
CMN_CSRCS += arm_hostfs.c CMN_CSRCS += arm_hostfs.c
arch/arm/src/xmc4/Make.defs
+2 -2
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@@ -18,7 +18,7 @@
# #
############################################################################ ############################################################################
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_switchcontext.S CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
@@ -28,7 +28,7 @@ CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c CMN_CSRCS += arm_releasestack.c arm_reprioritizertr.c arm_schedulesigaction.c
CMN_CSRCS += arm_releasepending.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c CMN_CSRCS += arm_releasepending.c arm_sigdeliver.c arm_stackframe.c arm_svcall.c
CMN_CSRCS += arm_systemreset.c arm_udelay.c arm_unblocktask.c arm_usestack.c CMN_CSRCS += arm_systemreset.c arm_udelay.c arm_unblocktask.c arm_usestack.c
CMN_CSRCS += arm_vfork.c CMN_CSRCS += arm_vfork.c arm_switchcontext.c
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y) ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
CMN_CSRCS += arm_stackcheck.c CMN_CSRCS += arm_stackcheck.c