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arch/arm/src/lpc2378/Kconfig: Create Kconfig for the platform; Adjust configuration names for compatibility, configs/olimex-lpc2378/nsh: Convert to use the kconfig-frontends tools
This commit is contained in:
Gregory Nutt
@@ -6696,51 +6696,53 @@
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cases where there wass some good argument to retain the ostest
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configuration) (2014-2-28)
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* configurations (2014-2-28).
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* configs/stm3240g-eval/nsh2: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/stm3220g-eval/nsh2: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/stm3210e-eval/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/stm3210e-eval/nsh2: Configuration converted to use the
|
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kconfig-frontends tools (2014-3-1).
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* configs/stm3240g-eval/nsh2: Configuration converted to use the
|
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kconfig-frontends tools (2014-3-1).
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* configs/stm3220g-eval/nsh2: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/stm3210e-eval/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/stm3210e-eval/nsh2: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/lincoln60/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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kconfig-frontends tools (2014-3-1).
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* configs/lpcxpresso-lpc1768/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/nucleus2g/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/vsn/nsh: Configuration converted to use the kconfig-frontends
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kconfig-frontends tools (2014-3-1).
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* configs/nucleus2g/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/vsn/nsh: Configuration converted to use the kconfig-frontends
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tools (2014-3-1).
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* configs/mirtoo/nsh: Configuration converted to use the kconfig-frontends
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tools (2014-3-1).
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* configs/pic32-starterkit/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/pic32-starterkit/nsh2: Configuration converted to use the
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kconfig-frontends tools (2014-3-1)
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* configs/mirtoo/nsh: Configuration converted to use the kconfig-frontends
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tools (2014-3-1).
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* configs/pic32-starterkit/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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* configs/pic32-starterkit/nsh2: Configuration converted to use the
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kconfig-frontends tools (2014-3-1)
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* configs/pic32mx7mmb/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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kconfig-frontends tools (2014-3-1).
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* configs/ubw32/nsh: Configuration converted to use the kconfig-frontends
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tools (2014-3-1).
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tools (2014-3-1).
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* configs/sim/nsh2: Configuration converted to use the kconfig-frontends
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tools (2014-3-1).
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tools (2014-3-1).
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* configs/lm3s6432-s2e/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1)
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kconfig-frontends tools (2014-3-1)
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* configs/lm3s8962-ek/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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kconfig-frontends tools (2014-3-1).
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* configs/eagle100/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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kconfig-frontends tools (2014-3-1).
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* configs/stm32f4discovery/src/Makefile: Fix type: stm32_pwm.c not
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stm32_psm.c. Noted by Max Kriegleder (2014-3-1).
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* configs/lpc4330-xplorer/nsh Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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kconfig-frontends tools (2014-3-1).
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* configs/ea3152/ostest: Configuration converted to use the
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kconfig-frontends tools (2014-3-1).
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kconfig-frontends tools (2014-3-1).
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* configs/stm3210e-eval/RIDE, nxlines, and nxtext: Remove some old
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style configurations that are not worth converting to use the
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kconfig-frontends tools (2014-3-2).
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* configs/stm3210e-eval/nx: Configuration converted to use the
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kconfig-frontends tools (2014-3-2).
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kconfig-frontends tools (2014-3-2).
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* configs/mirtoo/nxffs: Configuration converted to use the kconfig-frontends
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tools (2014-3-1).
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tools (2014-3-1).
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* configs/olimex-lpc2378/nsh: Configuration converted to use the
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kconfig-frontends tools (2014-3-2)
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@@ -37,7 +37,7 @@ config DEFAULT_MODE
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endchoice
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config CODE_BASE
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hex "Execuation Base Address"
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hex "Execution Base Address"
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default 0x00000000
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---help---
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This must match the expected address for the selected "Memory
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@@ -45,7 +45,7 @@ config CODE_BASE
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EXTMEM_MODE: 0x8000:0000
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RAM_MODE: 0x4000:0000
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DEFAULT)MODE: 0x0000:0000
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DEFAULT_MODE: 0x0000:0000
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config PLL_SETUP
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bool "Configure the PLL"
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@@ -4,3 +4,163 @@
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#
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comment "LPC2378 Configuration Options"
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choice
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prompt "Memory Execution Mode"
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default LPC2378_DEFAULT_MODE
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config LPC2378_EXTMEM_MODE
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bool "External Memory Mode"
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depends on EXPERIMENTAL # Not used
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---help---
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Code executes from external memory starting at address 0x8000:0000.
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config LPC2378_RAM_MODE
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bool "RAM Memory Mode"
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depends on EXPERIMENTAL # Not used
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---help---
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Code executes from on-chip RAM at address 0x4000:0000.
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config LPC2378_DEFAULT_MODE
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bool "Default Memory Mode"
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---help---
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Executes from 0x0000:0000. In non-default modes, the MEMAP register
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is set override the settings of the CPU configuration pins.
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endchoice
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config LPC2378_CODE_BASE
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hex "Execution Base Address"
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default 0x00000000
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---help---
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This must match the expected address for the selected "Memory
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Execution Address":
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LPC2378_EXTMEM_MODE: 0x8000:0000
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LPC2378_RAM_MODE: 0x4000:0000
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LPC2378_DEFAULT_MODE: 0x0000:0000
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config LPC2378_PLL_SETUP
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bool "Configure the PLL"
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default y
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config LPC2378_PLL_CLKSRC
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int "PLL clock source"
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default 1
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range 0 2
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depends on LPC2378_PLL_SETUP
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---help---
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PLL clock source
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config LPC2378_MAM_SETUP
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bool "Configure the Memory Accelerator Module (MAM)"
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default y
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config LPC2378_LPC2378_MAMCR_VALUE
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int "Memory accelerator mode"
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default 1
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range 0 2
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---help---
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Memory accelerator mode:
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OFF 0
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PART 1
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FULL 2
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config LPC2378_LPC2378_MAMTIM_VALUE
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int "Memory accelerator timing value"
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default 3
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---help---
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Memory accelerator timing value
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config LPC2378_APBDIV_SETUP
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bool "Configure the APB Divider"
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default y
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depends on EXPERIMENTAL # Not used
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config LPC2378_APBDIV_VALUE
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int "APB Divisor"
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default 1
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depends on EXPERIMENTAL # Not used
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config LPC2378_EMC_SETUP
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bool "Configure EMC"
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default n
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depends on EXPERIMENTAL # Not used
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config LPC2378_BCFG0_SETUP
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bool "Configure BCFG0"
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default n
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depends on EXPERIMENTAL # Not used
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config LPC2378_BCFG1_SETUP
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bool "Configure BCFG1"
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default n
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depends on EXPERIMENTAL # Not used
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config LPC2378_BCFG2_SETUP
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bool "Configure BCFG2"
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default n
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depends on EXPERIMENTAL # Not used
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config BCFG3_SETUP
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bool "Configure BCFG3"
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default n
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depends on EXPERIMENTAL # Not used
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config LPC2378_ADC_SETUP
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bool "Configure ADC"
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default y
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depends on EXPERIMENTAL # Not used
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menu "LPC2378 Peripheral Support"
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config LPC2378_UART0
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bool "UART0"
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default y
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select ARCH_HAVE_UART0
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config LPC2378_UART1
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bool "UART1"
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default y
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select ARCH_HAVE_UART1
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config LPC2378_UART2
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bool "UART2"
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default y
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select ARCH_HAVE_UART2
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config LPC2378_USBDEV
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bool "USB Device"
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default y
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depends on USBDEV
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endmenu
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if LPC2378_USBDEV
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menu "LPC2378 USB Device Configuration"
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config LPC2378_USBDEV_DMA
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bool "USB Device DMA Support"
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default n
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config LPC2378_USBDEV_NDMADESCRIPTORS
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int "Number of USB DMA Descriptors"
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default 8
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depends on LPC2378_USBDEV_DMA
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config LPC2378_USBDEV_EPFAST_INTERRUPT
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bool "USB Device Fast Endpoint Interrupts"
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default n
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config LPC2378_USBDEV_FRAME_INTERRUPT
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bool "USB Device Frame Interrupts"
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default n
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config LPC2378_USBDEV_REGDEBUG
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bool "USB Device Register-Level Debug Output"
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default n
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depends on DEBUG
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endmenu
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endif
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@@ -6,7 +6,7 @@
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*
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* This file is part of the NuttX RTOS and based on the lpc2148 port:
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*
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* Copyright (C) 2010, 2012 Gregory Nutt. All rights reserved.
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* Copyright (C) 2010, 2012, 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -59,6 +59,7 @@
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/* Print a character on the UART to show boot status. This macro will
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* modify r0, r1, r2 and r14
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*/
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#ifdef CONFIG_DEBUG
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.macro showprogress, code
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mov r0, #\code
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@@ -80,7 +81,7 @@
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*
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* Description:
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* Interrrupt vector table. This must be located at the beginning
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* of the memory space (at CONFIG_CODE_BASE). The first entry in
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* of the memory space (at CONFIG_LPC2378_CODE_BASE). The first entry in
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* the vector table is the reset vector and this is the code that
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* will execute whn the processor is reset.
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*
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@@ -136,6 +137,7 @@ _vector_table:
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__start:
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/* Call lowlevel init C-function */
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.extern ConfigurePLL
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ldr r0, =ConfigurePLL
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mov lr, pc
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@@ -153,7 +155,6 @@ __start:
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showprogress 'A'
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/* Setup system stack (and get the BSS range) */
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adr r0, LC0
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@@ -231,4 +232,3 @@ g_idle_topstack:
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.size g_idle_topstack, .-g_idle_topstack
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.end
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@@ -6,7 +6,7 @@
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*
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* This file is part of the NuttX RTOS:
|
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
|
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
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@@ -46,13 +46,13 @@
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* MEMAP register is set override the settings of the CPU configuration
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* pins.
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*
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* CONFIG_EXTMEM_MODE: Code executes from external memory starting at
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* CONFIG_LPC2378_EXTMEM_MODE: Code executes from external memory starting at
|
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* address 0x8000:0000.
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*
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* CONFIG_RAM_MODE: Code executes from on-chip RAM at address
|
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* CONFIG_LPC2378_RAM_MODE: Code executes from on-chip RAM at address
|
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* 0x4000:0000.
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*
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* Starupt Code must be linked to run at the correct address
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* Start-up Code must be linked to run at the correct address
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* corresponding to the selected mode.
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*/
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|
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@@ -70,10 +70,10 @@
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#include "lpc23xx_pinsel.h"
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#include "lpc23xx_scb.h"
|
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|
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extern void IO_Init(void);
|
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void IO_Init(void);
|
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|
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/***********************************************************************
|
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* Definitions
|
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* Pre-processor Definitions
|
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**********************************************************************/
|
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|
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#if ((FOSC < 32000) || (FOSC > 50000000))
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@@ -105,8 +105,8 @@ extern void IO_Init(void);
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* RTC 2
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*/
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|
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#ifdef CONFIG_PLL_CLKSRC
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# if ( (CONFIG_PLL_CLKSRC < 0) || (CONFIG_PLL_CLKSRC > 2) )
|
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#ifdef CONFIG_LPC2378_PLL_CLKSRC
|
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# if ( (CONFIG_LPC2378_PLL_CLKSRC < 0) || (CONFIG_LPC2378_PLL_CLKSRC > 2) )
|
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# error "PLL clock source not valid, check configuration "
|
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# endif
|
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#else
|
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@@ -138,13 +138,13 @@ extern void IO_Init(void);
|
||||
|
||||
/* LPC2378 Rev. '-' errata MAM may not work if fully enabled */
|
||||
|
||||
#ifdef CONFIG_MAM_SETUP
|
||||
# ifndef CONFIG_MAMCR_VALUE /* Can be selected from config file */
|
||||
# define CONFIG_MAMCR_VALUE (MAMCR_PART)
|
||||
#ifdef CONFIG_LPC2378_MAM_SETUP
|
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# ifndef CONFIG_LPC2378_MAMCR_VALUE /* Can be selected from config file */
|
||||
# define CONFIG_LPC2378_MAMCR_VALUE (MAMCR_PART)
|
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# endif
|
||||
|
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# ifndef CONFIG_MAMTIM_VALUE /* Can be selected from config file */
|
||||
# define CONFIG_MAMTIM_VALUE (0x00000003)
|
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# ifndef CONFIG_LPC2378_MAMTIM_VALUE /* Can be selected from config file */
|
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# define CONFIG_LPC2378_MAMTIM_VALUE (0x00000003)
|
||||
# endif
|
||||
#endif
|
||||
|
||||
@@ -171,12 +171,15 @@ void ConfigurePLL(void)
|
||||
uint32_t MSel, NSel;
|
||||
|
||||
/* LPC2378 Rev.'-' errata Enable the Ethernet block to enable 16k EnetRAM */
|
||||
|
||||
SCB_PCONP |= PCENET;
|
||||
|
||||
/* Vectors are remapped to Flash */
|
||||
|
||||
SCB_MEMMAP = MEMMAP2FLASH;
|
||||
|
||||
/* Enable PLL, disconnected */
|
||||
|
||||
if (SCB_PLLSTAT & (1 << 25))
|
||||
{
|
||||
SCB_PLLCON = 0x01;
|
||||
@@ -184,37 +187,48 @@ void ConfigurePLL(void)
|
||||
}
|
||||
|
||||
/* Disable PLL, disconnected */
|
||||
|
||||
SCB_PLLCON = 0;
|
||||
up_scbpllfeed();
|
||||
|
||||
/* Enable main OSC */
|
||||
|
||||
SCB_SCS |= 0x20;
|
||||
|
||||
/* Wait until main OSC is usable */
|
||||
|
||||
while (!(SCB_SCS & 0x40));
|
||||
|
||||
/* select main OSC, 12MHz, as the PLL clock source */
|
||||
SCB_CLKSRCSEL = CONFIG_PLL_CLKSRC;
|
||||
|
||||
SCB_CLKSRCSEL = CONFIG_LPC2378_PLL_CLKSRC;
|
||||
|
||||
/* Reconfigure PLL */
|
||||
|
||||
SCB_PLLCFG = PLL;
|
||||
up_scbpllfeed();
|
||||
|
||||
/* Enable PLL */
|
||||
|
||||
SCB_PLLCON = 0x01;
|
||||
up_scbpllfeed();
|
||||
|
||||
/* Set clock divider */
|
||||
|
||||
SCB_CCLKCFG = CCLK_DIV;
|
||||
|
||||
#ifdef CONFIG_USBDEV
|
||||
/* usbclk = 288 MHz/6 = 48 MHz */
|
||||
|
||||
SCB_USBCLKCFG = USBCLK_DIV;
|
||||
|
||||
/* Turn On USB PCLK */
|
||||
|
||||
SCB_PCONP |= PCUSB;
|
||||
#endif
|
||||
|
||||
/* Wait for PLL to lock */
|
||||
|
||||
while ((SCB_PLLSTAT & (1 << 26)) == 0);
|
||||
|
||||
MSel = SCB_PLLSTAT & 0x00007FFF;
|
||||
@@ -222,18 +236,22 @@ void ConfigurePLL(void)
|
||||
while ((MSel != PLL_M) && (NSel != PLL_N));
|
||||
|
||||
/* Enable and connect */
|
||||
|
||||
SCB_PLLCON = 0x03;
|
||||
up_scbpllfeed();
|
||||
|
||||
/* Check connect bit status */
|
||||
|
||||
while ((SCB_PLLSTAT & (1 << 25)) == 0);
|
||||
|
||||
/* Set memory accelerater module */
|
||||
|
||||
SCB_MAMCR = 0;
|
||||
SCB_MAMTIM = CONFIG_MAMTIM_VALUE;
|
||||
SCB_MAMCR = CONFIG_MAMCR_VALUE;
|
||||
SCB_MAMTIM = CONFIG_LPC2378_MAMTIM_VALUE;
|
||||
SCB_MAMCR = CONFIG_LPC2378_MAMCR_VALUE;
|
||||
|
||||
/* Enable FastIO on P0:P1 */
|
||||
|
||||
SCB_SCS |= 0x01;
|
||||
|
||||
IO_Init();
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
*
|
||||
* This file is part of the NuttX RTOS and based on the lpc2148 port:
|
||||
*
|
||||
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -49,17 +49,20 @@
|
||||
#include "lpc23xx_vic.h"
|
||||
|
||||
/****************************************************************************************************
|
||||
* Definitions
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************************************/
|
||||
|
||||
#define scb_getreg(o) getreg32(LPC23XX_SCB_BASE + (o))
|
||||
#define scb_putreg(v,o) putreg32((v),LPC23XX_SCB_BASE + (o))
|
||||
|
||||
/* Memory Accelerator Mode */
|
||||
|
||||
#define MAMCR_OFF 0
|
||||
#define MAMCR_PART 1
|
||||
#define MAMCR_FULL 2
|
||||
|
||||
/* Memory Mapping */
|
||||
|
||||
#define MEMMAP2BBLK 0 /* Interrupt Vectors in Boot Block */
|
||||
#define MEMMAP2FLASH 1 /* Interrupt Vectors in FLASH */
|
||||
#define MEMMAP2SRAM 2 /* Interrupt Vectors in RAM */
|
||||
@@ -68,58 +71,58 @@
|
||||
|
||||
/* PLL Control Register Bit Settings */
|
||||
|
||||
#define PLLCON_PLLE (1 << 0) /* PLL Enable */
|
||||
#define PLLCON_PLLC (1 << 1) /* PLL Connect */
|
||||
#define PLLCON_PLLE (1 << 0) /* PLL Enable */
|
||||
#define PLLCON_PLLC (1 << 1) /* PLL Connect */
|
||||
|
||||
/* PLL Configuration Register Bit Settings */
|
||||
|
||||
#define PLLCFG_MSEL (0x0000FFFF << 0) /* PLL Multiplier (minus 1) */
|
||||
#define PLLCFG_NSEL (0x000000FF << 16) /* PLL Divider */
|
||||
|
||||
#define PLLCFG_MSEL (0x0000ffff << 0) /* PLL Multiplier (minus 1) */
|
||||
#define PLLCFG_NSEL (0x000000ff << 16) /* PLL Divider */
|
||||
|
||||
/* PLL Status Register Bit Settings */
|
||||
|
||||
#define PLLSTAT_MSEL (0x7FFF << 0) /* PLL Multiplier Readback */
|
||||
#define PLLSTAT_NSEL (0xFF << 16) /* PLL Divider Readback */
|
||||
#define PLLSTAT_PLLE (1 << 24) /* PLL Enable Readback */
|
||||
#define PLLSTAT_PLLC (1 << 25) /* PLL Connect Readback */
|
||||
#define PLLSTAT_PLOCK (1 << 26) /* PLL Lock Status */
|
||||
#define PLLSTAT_MSEL (0x7fff << 0) /* PLL Multiplier Readback */
|
||||
#define PLLSTAT_NSEL (0xff << 16) /* PLL Divider Readback */
|
||||
#define PLLSTAT_PLLE (1 << 24) /* PLL Enable Readback */
|
||||
#define PLLSTAT_PLLC (1 << 25) /* PLL Connect Readback */
|
||||
#define PLLSTAT_PLOCK (1 << 26) /* PLL Lock Status */
|
||||
|
||||
/* PLL Feed Register values */
|
||||
|
||||
#define PLLFEED1 0xaa
|
||||
#define PLLFEED2 0x55
|
||||
|
||||
#define PLLFEED1 0xaa
|
||||
#define PLLFEED2 0x55
|
||||
|
||||
/* Peripheral Power Control (PCONP) Register 0xE01FC0C4 */
|
||||
|
||||
#define PCTIM0 (1 << 1) /* Timer/Counter 0 */
|
||||
#define PCTIM1 (1 << 2) /* Timer/Counter 1 */
|
||||
#define PCUART0 (1 << 3) /* UART0 power/clock */
|
||||
#define PCUART1 (1 << 4) /* UART1 power/clock */
|
||||
#define PCPWM1 (1 << 5) /* Unused, always 0 */
|
||||
#define PWM1 (1 << 6) /* Pulse Width Modulation 1 */
|
||||
#define PCI2C0 (1 << 7) /* I2C0 interface */
|
||||
#define PCSPI (1 << 8) /* SPI */
|
||||
#define PCRTC (1 << 9) /* Real Time Clock*/
|
||||
#define PCSSP1 (1 << 10) /* SSP1 */
|
||||
#define PCEMC (1 << 11) /* External Memory Controller */
|
||||
#define PCAD (1 << 12) /* A/D converter (ADC) Note: Clear the PDN bit in the AD0CR before
|
||||
clearing this bit, and set this bit before setting PDN */
|
||||
#define PCAN1 (1 << 13) /* CAN Controller 1 */
|
||||
#define PCAN2 (1 << 14) /* CAN Controller 2 */
|
||||
#define PCI2C1 (1 << 19) /* The I2C1 interface power/clock control bit */
|
||||
#define PCSSP0 (1 << 21) /* The SSP0 interface power/clock control bit */
|
||||
#define PCTIM2 (1 << 22) /* Timer 2 */
|
||||
#define PCTIM3 (1 << 23) /* Timer 3 */
|
||||
#define PCUART2 (1 << 24) /* UART 2 */
|
||||
#define PCUART3 (1 << 25) /* UART 3 */
|
||||
#define PCI2C2 (1 << 26) /* I2C interface 2 */
|
||||
#define PCI2S (1 << 27) /* I2S interface */
|
||||
#define PCSDC (1 << 28) /* SD card interface */
|
||||
#define PCGPDMA (1 << 29) /* GP DMA function */
|
||||
#define PCENET (1 << 30) /* Ethernet block */
|
||||
#define PCUSB (1 << 31) /* USB interface */
|
||||
#define PCTIM0 (1 << 1) /* Timer/Counter 0 */
|
||||
#define PCTIM1 (1 << 2) /* Timer/Counter 1 */
|
||||
#define PCUART0 (1 << 3) /* UART0 power/clock */
|
||||
#define PCUART1 (1 << 4) /* UART1 power/clock */
|
||||
#define PCPWM1 (1 << 5) /* Unused, always 0 */
|
||||
#define PWM1 (1 << 6) /* Pulse Width Modulation 1 */
|
||||
#define PCI2C0 (1 << 7) /* I2C0 interface */
|
||||
#define PCSPI (1 << 8) /* SPI */
|
||||
#define PCRTC (1 << 9) /* Real Time Clock*/
|
||||
#define PCSSP1 (1 << 10) /* SSP1 */
|
||||
#define PCEMC (1 << 11) /* External Memory Controller */
|
||||
#define PCAD (1 << 12) /* A/D converter (ADC) Note: Clear the PDN
|
||||
* bit in the AD0CR before clearing this bit,
|
||||
* and set this bit before setting PDN */
|
||||
#define PCAN1 (1 << 13) /* CAN Controller 1 */
|
||||
#define PCAN2 (1 << 14) /* CAN Controller 2 */
|
||||
#define PCI2C1 (1 << 19) /* The I2C1 interface power/clock control bit */
|
||||
#define PCSSP0 (1 << 21) /* The SSP0 interface power/clock control bit */
|
||||
#define PCTIM2 (1 << 22) /* Timer 2 */
|
||||
#define PCTIM3 (1 << 23) /* Timer 3 */
|
||||
#define PCUART2 (1 << 24) /* UART 2 */
|
||||
#define PCUART3 (1 << 25) /* UART 3 */
|
||||
#define PCI2C2 (1 << 26) /* I2C interface 2 */
|
||||
#define PCI2S (1 << 27) /* I2S interface */
|
||||
#define PCSDC (1 << 28) /* SD card interface */
|
||||
#define PCGPDMA (1 << 29) /* GP DMA function */
|
||||
#define PCENET (1 << 30) /* Ethernet block */
|
||||
#define PCUSB (1 << 31) /* USB interface */
|
||||
|
||||
/****************************************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************************************/
|
||||
|
||||
@@ -136,7 +136,7 @@ static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
|
||||
|
||||
/* This describes the state of the LPC214X uart0 port. */
|
||||
|
||||
#ifdef CONFIG_UART0
|
||||
#ifdef CONFIG_LPC2378_UART0
|
||||
static struct up_dev_s g_uart0priv =
|
||||
{
|
||||
.uartbase = UART0_BASE_ADDR,
|
||||
@@ -164,7 +164,7 @@ static uart_dev_t g_uart0port =
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_UART2
|
||||
#ifdef CONFIG_LPC2378_UART2
|
||||
|
||||
/* This describes the state of the LPC23XX uart2 port. */
|
||||
|
||||
|
||||
@@ -1,44 +0,0 @@
|
||||
############################################################################
|
||||
# configs/olimex-lpc2378/nsh/appconfig
|
||||
#
|
||||
# Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
|
||||
# Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
############################################################################
|
||||
|
||||
# Path to example in apps/examples containing the user_start entry point
|
||||
|
||||
CONFIGURED_APPS += examples/nsh
|
||||
|
||||
# The NSH library
|
||||
|
||||
CONFIGURED_APPS += system/readline
|
||||
CONFIGURED_APPS += nshlib
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -6,7 +6,7 @@
|
||||
*
|
||||
* This is part of the NuttX RTOS and based on the LPC2148 port:
|
||||
*
|
||||
* Copyright (C) 2010 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -48,34 +48,25 @@
|
||||
#include "chip.h"
|
||||
#include "up_arch.h"
|
||||
#include "up_internal.h"
|
||||
//~ #define LPC23XX_FIO_BASE 0x3fffc000 /* Fast I/O 0 base address */
|
||||
|
||||
/****************************************************************************
|
||||
* Definitions
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* P3.0 : P0.7 PINSEL6 LEDS 1-8 */
|
||||
#define LEDBIT(led) (0x01 << (led))
|
||||
#define ALL_LEDS (0xFF)
|
||||
#define STATLED (0x08)
|
||||
//~ #ifdef CONFIG_LPC23XX_FIO
|
||||
# define putled8(v,o) putreg8((v), (LPC23XX_FIO_BASE+(o)))
|
||||
# define putled32(v,r) putreg32((v),(LPC23XX_FIO_BASE+(r)))
|
||||
# define CLRLEDS putled(ALL_LEDS,FIO3CLR0_OFFSET)
|
||||
|
||||
# define LED_SET_OFFSET FIO3SET0_OFFSET
|
||||
# define LED_CLR_OFFSET FIO3CLR0_OFFSET
|
||||
# define LED_DIR_OFFSET FIO3DIR0_OFFSET
|
||||
# define LED_MASK_OFFSET FIO3MASK0_OFFSET
|
||||
#define LEDBIT(led) (0x01 << (led))
|
||||
#define ALL_LEDS (0xff)
|
||||
#define STATLED (0x08)
|
||||
|
||||
//~ #else
|
||||
//~ # define putled(v,r) putreg32((v),(LPC23XX_GPIO1_BASE+(r)))
|
||||
//~ # define CLRLEDS putled(STATLED,LPC23XX_GPIO1_SET_OFFSET)
|
||||
//~
|
||||
//~ # define LED_SET_OFFSET LPC23XX_GPIO_SET_OFFSET
|
||||
//~ # define LED_CLR_OFFSET LPC23XX_GPIO_CLR_OFFSET
|
||||
//~ # define LED_DIR_OFFSET LPC23XX_GPIO_DIR_OFFSET
|
||||
//~ #endif
|
||||
#define putled8(v,o) putreg8((v), (LPC23XX_FIO_BASE+(o)))
|
||||
#define putled32(v,r) putreg32((v),(LPC23XX_FIO_BASE+(r)))
|
||||
#define CLRLEDS putled(ALL_LEDS,FIO3CLR0_OFFSET)
|
||||
|
||||
#define LED_SET_OFFSET FIO3SET0_OFFSET
|
||||
#define LED_CLR_OFFSET FIO3CLR0_OFFSET
|
||||
#define LED_DIR_OFFSET FIO3DIR0_OFFSET
|
||||
#define LED_MASK_OFFSET FIO3MASK0_OFFSET
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
@@ -86,7 +77,7 @@
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Funtions
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
@@ -96,7 +87,7 @@
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
void board_led_initialize(void)
|
||||
{
|
||||
/* Initilize GIOs P1.16-P1.23 */
|
||||
/* Initialize GIOs P1.16-P1.23 */
|
||||
|
||||
putled8(ALL_LEDS, LED_DIR_OFFSET);
|
||||
putled8(ALL_LEDS, LED_CLR_OFFSET);
|
||||
|
||||
Reference in New Issue
Block a user