diff --git a/arch/arm/src/stm32l4/stm32l4_i2c.c b/arch/arm/src/stm32l4/stm32l4_i2c.c
index 4b9dc0a35ac..f9d824f75f6 100644
--- a/arch/arm/src/stm32l4/stm32l4_i2c.c
+++ b/arch/arm/src/stm32l4/stm32l4_i2c.c
@@ -1460,32 +1460,32 @@ static void stm32l4_i2c_setclock(FAR struct stm32l4_i2c_priv_s *priv,
             }
         }
       else if (i2cclk_mhz == 48)
-      {
-        if (frequency == 100000)
-          {
-            presc        = 2;
-            scl_delay    = 10;
-            sda_delay    = 0;
-            scl_h_period = 62;
-            scl_l_period = 85;
-          }
-        else if (frequency == 400000)
-          {
-            presc        = 1;
-            scl_delay    = 8;
-            sda_delay    = 0;
-            scl_h_period = 12;
-            scl_l_period = 33;
-          }
-        else if (frequency == 1000000)
-          {
-            presc        = 0;
-            scl_delay    = 5;
-            sda_delay    = 0;
-            scl_h_period = 8;
-            scl_l_period = 22;
-          }
-      }
+        {
+          if (frequency == 100000)
+            {
+              presc        = 2;
+              scl_delay    = 10;
+              sda_delay    = 0;
+              scl_h_period = 62;
+              scl_l_period = 85;
+            }
+          else if (frequency == 400000)
+            {
+              presc        = 1;
+              scl_delay    = 8;
+              sda_delay    = 0;
+              scl_h_period = 12;
+              scl_l_period = 33;
+            }
+          else if (frequency == 1000000)
+            {
+              presc        = 0;
+              scl_delay    = 5;
+              sda_delay    = 0;
+              scl_h_period = 8;
+              scl_l_period = 22;
+            }
+        }
       else
         {
           DEBUGPANIC();
diff --git a/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c b/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
index 01dc2805f59..546b7208193 100644
--- a/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
+++ b/arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
@@ -731,26 +731,26 @@ static void stm32l4_stdclockconfig(void)
   putreg32(regval, STM32L4_RCC_CR);
 
   if (!(regval & RCC_CR_MSION))
-  {
-    /* Enable MSI */
+    {
+      /* Enable MSI */
 
-    regval  = getreg32(STM32L4_RCC_CR);
-    regval |= RCC_CR_MSION;
-    putreg32(regval, STM32L4_RCC_CR);
+      regval  = getreg32(STM32L4_RCC_CR);
+      regval |= RCC_CR_MSION;
+      putreg32(regval, STM32L4_RCC_CR);
 
-    /* Wait until the MSI is ready (or until a timeout elapsed) */
+      /* Wait until the MSI is ready (or until a timeout elapsed) */
 
-    for (timeout = MSIRDY_TIMEOUT; timeout > 0; timeout--)
-      {
-        /* Check if the MSIRDY flag is the set in the CR */
+      for (timeout = MSIRDY_TIMEOUT; timeout > 0; timeout--)
+        {
+          /* Check if the MSIRDY flag is the set in the CR */
 
-        if ((getreg32(STM32L4_RCC_CR) & RCC_CR_MSIRDY) != 0)
-          {
-            /* If so, then break-out with timeout > 0 */
+          if ((getreg32(STM32L4_RCC_CR) & RCC_CR_MSIRDY) != 0)
+            {
+              /* If so, then break-out with timeout > 0 */
 
-            break;
-          }
-      }
+              break;
+            }
+        }
     }
 
 #elif defined(STM32L4_BOARD_USEHSE)
@@ -797,7 +797,7 @@ static void stm32l4_stdclockconfig(void)
           stm32l4_pwr_enableclk(true);
           stm32_pwr_setvos(1);
 #endif
-      }
+        }
       else
         {
           /* Select regulator voltage output Scale 2 mode for