arch/arm/src/lpc54628: With these changes, the LPCXpresso-LPC54628 NSH configuration is fully functional. Also adds a README file for the board.

Documentation/README.html

@@ -8,7 +8,7 @@
   <tr align="center" bgcolor="#e4e4e4">
     <td>
       <h1><big><font color="#3c34ec"><i>NuttX README Files</i></font></big></h1>
-      <p>Last Updated: November 18, 2017</p>
+      <p>Last Updated: December 10, 2017</p>
     </td>
   </tr>
 </table>
@@ -138,6 +138,8 @@ nuttx/
  |   |   `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lpcxpresso-lpc1115/README.txt" target="_blank"><b><i>README.txt</i></b></a>
  |   |- lpcxpresso-lpc1768/
  |   |   `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lpcxpresso-lpc1768/README.txt" target="_blank"><b><i>README.txt</i></b></a>
+ |   |- lpcxpresso-lpc54628/
+ |   |   `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/lpcxpresso-lpc54628/README.txt" target="_blank"><b><i>README.txt</i></b></a>
  |   |- maple/
  |   |   `- <a href="https://bitbucket.org/nuttx/nuttx/src/master/configs/maple/README.txt" target="_blank"><b><i>README.txt</i></b></a>
  |   |- mbed/

README.txt

@@ -1681,6 +1681,8 @@ nuttx/
  |   |   `- README.txt
  |   |- lpcxpresso-lpc1768/
  |   |   `- README.txt
+ |   |- lpcxpresso-lpc54628/
+ |   |   `- README.txt
  |   |- maple/
  |   |   `- README.txt
  |   |- mbed/

arch/arm/src/lpc54xx/chip/lpc54_syscon.h

@@ -634,13 +634,13 @@
 
 #define SYSCON_SYSPLLCTRL_SELR_SHIFT           (0)       /* Bits 0-3: Bandwidth select R value */
 #define SYSCON_SYSPLLCTRL_SELR_MASK            (15 << SYSCON_SYSPLLCTRL_SELR_SHIFT)
-#  define SYSCON_SYSPLLCTRL_SELR(n)            ((uint32_t)((n)-1) << SYSCON_SYSPLLCTRL_SELR_SHIFT)
+#  define SYSCON_SYSPLLCTRL_SELR(n)            ((uint32_t)(n) << SYSCON_SYSPLLCTRL_SELR_SHIFT)
 #define SYSCON_SYSPLLCTRL_SELI_SHIFT           (4)       /* Bits 4-9: Bandwidth select I value */
 #define SYSCON_SYSPLLCTRL_SELI_MASK            (0x3f << SYSCON_SYSPLLCTRL_SELI_SHIFT)
-#  define SYSCON_SYSPLLCTRL_SELI(n)            ((uint32_t)((n)-1) << SYSCON_SYSPLLCTRL_SELI_SHIFT)
+#  define SYSCON_SYSPLLCTRL_SELI(n)            ((uint32_t)(n) << SYSCON_SYSPLLCTRL_SELI_SHIFT)
 #define SYSCON_SYSPLLCTRL_SELP_SHIFT           (10)      /* Bits 10-14: Bandwidth select P value */
 #define SYSCON_SYSPLLCTRL_SELP_MASK            (0x1f << SYSCON_SYSPLLCTRL_SELP_SHIFT)
-#  define SYSCON_SYSPLLCTRL_SELP(n)            ((uint32_t)((n)-1) << SYSCON_SYSPLLCTRL_SELP_SHIFT)
+#  define SYSCON_SYSPLLCTRL_SELP(n)            ((uint32_t)(n) << SYSCON_SYSPLLCTRL_SELP_SHIFT)
 #define SYSCON_SYSPLLCTRL_BYPASS               (1 << 15) /* Bit 15: PLL bypass control */
 #define SYSCON_SYSPLLCTRL_UPLIMOFF             (1 << 17) /* Bit 17: Disable upper frequency limiter */
 #define SYSCON_SYSPLLCTRL_DIRECTI              (1 << 19) /* Bit 19: PLL direct input enable */
@@ -654,21 +654,21 @@
 
 #define SYSCON_SYSPLLNDEC_NDEC_SHIFT           (0)       /* Bits 0-9: Decoded N-divider coefficient */
 #define SYSCON_SYSPLLNDEC_NDEC_MASK            (0x3ff << SYSCON_SYSPLLNDEC_NDEC_SHIFT)
-#  define SYSCON_SYSPLLNDEC_NDEC(n)            ((uint32_t)((n)-1) << SYSCON_SYSPLLNDEC_NDEC_SHIFT)
+#  define SYSCON_SYSPLLNDEC_NDEC(n)            ((uint32_t)(n) << SYSCON_SYSPLLNDEC_NDEC_SHIFT)
 #define SYSCON_SYSPLLNDEC_NREQ                 (1 << 10) /* Bit 10:  NDEC reload request */
 
 /* PLL P divider */
 
 #define SYSCON_SYSPLLPDEC_PDEC_SHIFT           (0)       /* Bits 0-6: Decoded P-divider coefficient */
 #define SYSCON_SYSPLLPDEC_PDEC_MASK            (0x7f << SYSCON_SYSPLLPDEC_PDEC_SHIFT)
-#  define SYSCON_SYSPLLPDEC_PDEC(n)            ((uint32_t)((n)-1) << SYSCON_SYSPLLPDEC_PDEC_SHIFT)
+#  define SYSCON_SYSPLLPDEC_PDEC(n)            ((uint32_t)(n) << SYSCON_SYSPLLPDEC_PDEC_SHIFT)
 #define SYSCON_SYSPLLPDEC_PREQ                 (1 << 7)  /* Bit 7:  PDEC reload request */
 
 /* System PLL M divider */
 
 #define SYSCON_SYSPLLMDEC_MDEC_SHIFT           (0)       /* Bits 0-16: Decoded M-divider coefficient */
 #define SYSCON_SYSPLLMDEC_MDEC_MASK            (0xffff << SYSCON_SYSPLLMDEC_MDEC_SHIFT)
-#  define SYSCON_SYSPLLMDEC_MDEC(n)            ((uint32_t)((n)-1) << SYSCON_SYSPLLMDEC_MDEC_SHIFT)
+#  define SYSCON_SYSPLLMDEC_MDEC(n)            ((uint32_t)(n) << SYSCON_SYSPLLMDEC_MDEC_SHIFT)
 #define SYSCON_SYSPLLMDEC_MREQ                 (1 << 17) /* Bit 17:  MDEC reload request */
 
 /* Audio PLL control */

arch/arm/src/lpc54xx/chip/lpc54_usart.h

@@ -384,8 +384,8 @@
  */
 
 #define USART_FIFOINT_TXERR             (1 << 0)  /* Bit 0:  Transmit FIFO error interrupt */
-#define USART_FIFOINT_RXERR             (1 << 2)  /* Bit 1:  Receive ERROR error interrupt */
+#define USART_FIFOINT_RXERR             (1 << 1)  /* Bit 1:  Receive ERROR error interrupt */
-#define USART_FIFOINT_TXLVL             (1 << 3)  /* Bit 2:  Transmit FIFO level interrupt */
+#define USART_FIFOINT_TXLVL             (1 << 2)  /* Bit 2:  Transmit FIFO level interrupt */
 #define USART_FIFOINT_RXLVL             (1 << 3)  /* Bit 3:  Receive FIFO level interrupt */
 #define USART_FIFOINTSTAT_PERINT        (1 << 4)  /* Bit 4:  Peripheral interrupt (Status only) */
 

arch/arm/src/lpc54xx/lpc54_clockconfig.c

@@ -76,16 +76,16 @@ static void lpc54_setvoltage(uint32_t freq)
   if (freq == 12000000)
     {
       putreg32(0x21e, 0x40020040);
-      putreg32(4, 0x40000620);
+      putreg32(4, LPC54_SYSCON_PDRUNCFGSET0);
     }
   else if (freq == 48000000)
     {
       putreg32(0x31e, 0x40020040);
-      putreg32(4, 0x40000620);
+      putreg32(4, LPC54_SYSCON_PDRUNCFGSET0);
     }
   else
     {
-      putreg32(4, 0x40000630);
+      putreg32(4, LPC54_SYSCON_PDRUNCFGCLR0);
     }
 }
 
@@ -99,7 +99,7 @@ static void lpc54_setvoltage(uint32_t freq)
 
 static void lpc54_power_pll(void)
 {
-  putreg32(0x04000000, 0x40000630);
+  lpc54_vd3_enable();
   while ((getreg32(0x40020054) & (1 << 6)) == 0)
     {
     }
@@ -200,7 +200,7 @@ static void lpc54_configure_pll(FAR const struct pll_setup_s *pllsetup)
        */
 
       volatile uint32_t delay;
-      uint32_t maxcco = (1 << 18) | 0x5dd2; /* CCO = 1.6Ghz + MDEC enabled*/
+      uint32_t maxcco = (1 << 18) | 0x5dd2; /* CCO = 1.6Ghz + MDEC enabled */
       uint32_t ssctrl = getreg32(LPC54_SYSCON_SYSPLLMDEC) & ~SYSCON_SYSPLLMDEC_MREQ;
 
       /* Initialize and power up PLL */

arch/arm/src/lpc54xx/lpc54_lowputc.c

@@ -294,7 +294,7 @@ static const struct uart_config_s g_console_config=
   .parity    = CONSOLE_PARITY,
   .bits      = CONSOLE_BITS,
   .txlevel   = LPC54_USART_FIFO_DEPTH / 2,
-  .rxlevel   = LPC54_USART_FIFO_DEPTH - 1,
+  .rxlevel   = 0,
   .stopbits2 = CONSOLE_STOPBITS2,
 #ifdef CONFIG_SERIAL_IFLOWCONTROL
   .iflow     = CONSOLE_IFLOW,

arch/arm/src/lpc54xx/lpc54_serial.c

@@ -478,7 +478,7 @@ static struct lpc54_dev_s g_uart0priv =
     .parity       = CONFIG_USART0_PARITY,
     .bits         = CONFIG_USART0_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART0_2STOP,
 #ifdef CONFIG_USART0_IFLOWCONTROL
     .iflow        = true,
@@ -520,7 +520,7 @@ static struct lpc54_dev_s g_uart1priv =
     .parity       = CONFIG_USART1_PARITY,
     .bits         = CONFIG_USART1_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART1_2STOP,
 #ifdef CONFIG_USART1_IFLOWCONTROL
     .iflow        = true,
@@ -562,7 +562,7 @@ static struct lpc54_dev_s g_uart2priv =
     .parity       = CONFIG_USART2_PARITY,
     .bits         = CONFIG_USART2_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART2_2STOP,
 #ifdef CONFIG_USART2_IFLOWCONTROL
     .iflow        = true,
@@ -604,7 +604,7 @@ static struct lpc54_dev_s g_uart3priv =
     .parity       = CONFIG_USART3_PARITY,
     .bits         = CONFIG_USART3_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART3_2STOP,
 #ifdef CONFIG_USART3_IFLOWCONTROL
     .iflow        = true,
@@ -646,7 +646,7 @@ static struct lpc54_dev_s g_uart4priv =
     .parity       = CONFIG_USART4_PARITY,
     .bits         = CONFIG_USART4_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART4_2STOP,
 #ifdef CONFIG_USART4_IFLOWCONTROL
     .iflow        = true,
@@ -688,7 +688,7 @@ static struct lpc54_dev_s g_uart5priv =
     .parity       = CONFIG_USART5_PARITY,
     .bits         = CONFIG_USART5_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART5_2STOP,
 #ifdef CONFIG_USART5_IFLOWCONTROL
     .iflow        = true,
@@ -730,7 +730,7 @@ static struct lpc54_dev_s g_uart6priv =
     .parity       = CONFIG_USART6_PARITY,
     .bits         = CONFIG_USART6_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART6_2STOP,
 #ifdef CONFIG_USART6_IFLOWCONTROL
     .iflow        = true,
@@ -772,7 +772,7 @@ static struct lpc54_dev_s g_uart7priv =
     .parity       = CONFIG_USART7_PARITY,
     .bits         = CONFIG_USART7_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART7_2STOP,
 #ifdef CONFIG_USART7_IFLOWCONTROL
     .iflow        = true,
@@ -814,7 +814,7 @@ static struct lpc54_dev_s g_uart8priv =
     .parity       = CONFIG_USART8_PARITY,
     .bits         = CONFIG_USART8_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART8_2STOP,
 #ifdef CONFIG_USART8_IFLOWCONTROL
     .iflow        = true,
@@ -856,7 +856,7 @@ static struct lpc54_dev_s g_uart9priv =
     .parity       = CONFIG_USART9_PARITY,
     .bits         = CONFIG_USART9_BITS,
     .txlevel      = LPC54_USART_FIFO_DEPTH / 2,
-    .rxlevel      = LPC54_USART_FIFO_DEPTH - 1,
+    .rxlevel      = 0,
     .stopbits2    = CONFIG_USART9_2STOP,
 #ifdef CONFIG_USART9_IFLOWCONTROL
     .iflow        = true,
@@ -1110,7 +1110,7 @@ static int lpc54_interrupt(int irq, void *context, FAR void *arg)
        * Check if the received FIFO is not empty.
        */
 
-      if ((regval & USART_FIFOINT_RXLVL) == 0)
+      if ((regval & USART_FIFOINT_RXLVL) != 0)
         {
           /* Process incoming bytes */
 
@@ -1122,7 +1122,7 @@ static int lpc54_interrupt(int irq, void *context, FAR void *arg)
        * Check if the received FIFO is not full.
        */
 
-      if ((regval & USART_FIFOINT_TXLVL) == 0)
+      if ((regval & USART_FIFOINT_TXLVL) != 0)
         {
           /* Process outgoing bytes */
 
@@ -1133,7 +1133,7 @@ static int lpc54_interrupt(int irq, void *context, FAR void *arg)
 #ifdef CONFIG_DEBUG_FEATURES
       /* Check for error conditions */
 
-      if ((regval & CCR_ERROR_EVENTS) == 0)
+      if ((regval & CCR_ERROR_EVENTS) != 0)
         {
           /* And now do... what?  Should we reset FIFOs on a FIFO error? */
 #warning Misssing logic

configs/lpcxpresso-lpc54628/README.txt

@@ -0,0 +1,106 @@
+README
+======
+
+  This directory contains the port to the NXP LPCXpress-LPC54628 board
+  (OMI1309UL).  This board features:
+
+    - LPC54628 Cortex-M4 microcontroller running at up to 220MHz
+    - 272x480 color LCD with capacitive touch screen
+    - On-board, high-speed USB, Link2 debug probe with CMSIS-DAP and SEGGER
+      J-Link protocol options
+    - UART and SPI port bridging from LPC546xx target to USB via the on-
+      board debug probe
+    - Support for external debug probe
+    - 3 x user LEDs, plus Reset, ISP (3) and user buttons
+    - Multiple Expansion options, including Arduino UNO and PMod
+    - Built-in power consumption measurement for target LPC546xx MCU
+    - 128Mb Micron MT25QL128 Quad-SPI flash
+    - 16MB Micron MT48LC8M16A2B4 SDRAM
+    - Knowles SPH0641LM4H digital microphone
+    - Full size SD/MMC card slot
+    - NXP MMA8652FCR1 accelerometer
+    - Stereo audio codec with line in/out
+    - High and full speed USB ports with micro A/B connector for host or
+      device functionality
+    - 10/100Mbps Ethernet (RJ45 connector)
+
+STATUS
+======
+
+  2017-12-10:  The basic NSH configuration is functional at 220MHz with a
+    Serial console, timer and LED support.
+
+Configurations
+==============
+
+  Information Common to All Configurations
+  ----------------------------------------
+  Each LPCXpresso-LPC54628 configuration is maintained in a sub-directory
+  and can be selected as follow:
+
+    .tools/configure.sh [OPTIONS] xmc5400-relax/<subdir>
+
+  See '.tools/configure.sh -h' for a list of all options.  The most typical
+  are -l to select the Linux host or -c to select the Windows Cygwin host.
+
+  Before starting the build, make sure that your PATH environment variable
+  includes the correct path to your toolchain.
+
+  And then build NuttX by simply typing the following.  At the conclusion of
+  the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
+
+    make
+
+  The <subdir> that is provided above as an argument to the tools/configure.sh
+  must be is one of the following.
+
+  NOTES:
+
+    1. These configurations use the mconf-based configuration tool.  To
+      change any of these configurations using that tool, you should:
+
+      a. Build and install the kconfig-mconf tool.  See nuttx/README.txt
+         see additional README.txt files in the NuttX tools repository.
+
+      b. Execute 'make menuconfig' in nuttx/ in order to start the
+         reconfiguration process.
+
+    2. Unless stated otherwise, all configurations generate console
+       output on USART0 (aka Flexcomm0).  USART0 connects to the serial
+       bridge on LPC4322JET100 and should be available as a USB serial
+       device on your host PC.
+
+    3. All of these configurations are set up to build under Windows using
+       the  "GNU Tools for ARM Embedded Processors" that is maintained by
+       ARM (unless stated otherwise in the description of the configuration).
+
+         https://developer.arm.com/open-source/gnu-toolchain/gnu-rm
+
+       That toolchain selection can easily be reconfigured using
+       'make menuconfig'.  Here are the relevant current settings:
+
+       Build Setup:
+         CONFIG_HOST_WINDOWS=y               : Window environment
+         CONFIG_WINDOWS_CYGWIN=y             : Cywin under Windows
+
+       System Type -> Toolchain:
+         CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU ARM EABI toolchain
+
+  Configuration sub-directories
+  -----------------------------
+
+  nsh:
+
+    Configures the NuttShell (nsh) located at examples/nsh.  This
+    configuration is focused on low level, command-line driver testing.  It
+    has no network.
+
+    NOTES:
+
+    1. NSH built-in applications are supported.
+
+       Binary Formats:
+         CONFIG_BUILTIN=y           : Enable support for built-in programs
+
+       Application Configuration:
+         CONFIG_NSH_BUILTIN_APPS=y  : Enable starting apps from NSH command line

configs/lpcxpresso-lpc54628/include/board.h

@@ -120,10 +120,10 @@
 /* CPU Clock:
  *
  *   AHB Clock Divider:          1
- *   AHB Clock Frequency:        220,000,000
+ *   AHB Clock Frequency:        180,000,000 or 220,000,000
  */
 
-#define BOARD_AHBCLKDIV          1
+#define BOARD_AHBCLKDIV          1                 /* (un-decremented) */
 #define BOARD_AHB_FREQUENCY      (BOARD_MAIN_CLK / BOARD_AHBCLKDIV)
 #define BOARD_CPU_FREQUENCY      BOARD_AHB_FREQUENCY
 

configs/lpcxpresso-lpc54628/nsh/defconfig

@@ -1,6 +1,4 @@
 # CONFIG_ARCH_FPU is not set
-# CONFIG_NSH_DISABLE_IFCONFIG is not set
-# CONFIG_NSH_DISABLE_PS is not set
 CONFIG_ARCH_BOARD_LPCXPRESSO_LPC54628=y
 CONFIG_ARCH_BOARD="lpcxpresso-lpc54628"
 CONFIG_ARCH_CHIP_LPC54628=y
@@ -9,17 +7,20 @@ CONFIG_ARCH_STACKDUMP=y
 CONFIG_ARCH_STDARG_H=y
 CONFIG_ARCH="arm"
 CONFIG_BOARD_LOOPSPERMSEC=18535
+CONFIG_BUILTIN=y
 CONFIG_EXAMPLES_NSH=y
 CONFIG_FAT_LCNAMES=y
 CONFIG_FAT_LFN=y
 CONFIG_FS_FAT=y
+CONFIG_FS_PROCFS=y
 CONFIG_LPC54_USART0=y
 CONFIG_MAX_TASKS=16
 CONFIG_MAX_WDOGPARMS=2
-CONFIG_MM_REGIONS=1
 CONFIG_NFILE_DESCRIPTORS=8
 CONFIG_NFILE_STREAMS=8
 CONFIG_NSH_ARCHINIT=y
+CONFIG_NSH_BUILTIN_APPS=y
+CONFIG_NSH_DISABLE_IFUPDOWN=y
 CONFIG_NSH_FILEIOSIZE=512
 CONFIG_NSH_LINELEN=64
 CONFIG_NSH_READLINE=y

configs/xmc4500-relax/README.txt

@@ -81,9 +81,10 @@ Configurations
   Each XMC4500 Relax configuration is maintained in a sub-directory and
   can be selected as follow:
 
-    cd tools
+    .tools/configure.sh xmc5400-relax/<subdir>
-    ./configure.sh xmc5400-relax/<subdir>
+
-    cd -
+  See '.tools/configure.sh -h' for a list of all options.  The most typical
+  are -l to select the Linux host or -c to select the Windows Cygwin host.
 
   Before starting the build, make sure that your PATH environment variable
   includes the correct path to your toolchain.
@@ -91,7 +92,6 @@ Configurations
   And then build NuttX by simply typing the following.  At the conclusion of
   the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
 
-    make oldconfig
     make
 
   The <subdir> that is provided above as an argument to the tools/configure.sh