Add basic Kinetis serial support

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3878 42af7a65-404d-4744-a932-0658087f49c3

arch/arm/src/kinetis/Make.defs

@@ -40,13 +40,13 @@ HEAD_ASRC	= kinetis_vectors.S
 # Common ARM and Cortex-M3 files
 
 CMN_ASRCS	= up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
-CMN_CSRCS	= up_assert.c up_blocktask.c up_copystate.c up_createstack.c \
+CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
-		  up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c \
+		  up_createstack.c up_mdelay.c up_udelay.c up_exit.c up_initialize.c \
-		  up_initialstate.c up_interruptcontext.c up_modifyreg8.c \
+		  up_memfault.c up_initialstate.c up_interruptcontext.c \
-		  up_modifyreg16.c up_modifyreg32.c up_releasepending.c \
+		  up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
 		  up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
-		  up_sigdeliver.c up_unblocktask.c up_usestack.c up_doirq.c \
+		  up_releasepending.c up_sigdeliver.c up_unblocktask.c up_usestack.c \
-		  up_hardfault.c up_svcall.c up_checkstack.c
+		  up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c
 
 ifeq ($(CONFIG_NET),y)
 ifneq ($(CONFIG_KINETIS_ETHERNET),y)
@@ -57,10 +57,9 @@ endif
 # Required Kinetis files
 
 CHIP_ASRCS	=
-#CHIP_CSRCS	= kinetis_allocateheap.c kinetis_can.c kinetis_gpio.c \
+CHIP_CSRCS	= kinetis_clockconfig.c kinetis_clrpend.c kinetis_gpio.c \
-#		  kinetis_serial.c kinetis_spi.c kinetis_ssp.c kinetis_timerisr.c
+		  kinetis_idle.c kinetis_irq.c kinetis_lowputc.c kinetis_serial.c \
-CHIP_CSRCS	= kinetis_clockconfig.c kinetis_clrpend.c kinetis_idle.c kinetis_irq.c \
+		  kinetis_start.c kinetis_timerisr.c kinetis_wdog.c
-		  kinetis_lowputc.c kinetis_start.c kinetis_wdog.c
 
 # Configuration-dependent Kinetis files
 

arch/arm/src/kinetis/kinetis_config.h

@@ -94,42 +94,42 @@
 #  undef CONFIG_UART3_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
 #  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART1)
 #  undef CONFIG_UART0_SERIAL_CONSOLE
 #  undef CONFIG_UART2_SERIAL_CONSOLE
 #  undef CONFIG_UART3_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
 #  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #elif defined(CONFIG_UART2_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART2)
 #  undef CONFIG_UART0_SERIAL_CONSOLE
 #  undef CONFIG_UART1_SERIAL_CONSOLE
 #  undef CONFIG_UART3_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
 #  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #elif defined(CONFIG_UART3_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART3)
 #  undef CONFIG_UART0_SERIAL_CONSOLE
 #  undef CONFIG_UART1_SERIAL_CONSOLE
 #  undef CONFIG_UART2_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
 #  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #elif defined(CONFIG_UART4_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART4)
 #  undef CONFIG_UART0_SERIAL_CONSOLE
 #  undef CONFIG_UART1_SERIAL_CONSOLE
 #  undef CONFIG_UART2_SERIAL_CONSOLE
 #  undef CONFIG_UART3_SERIAL_CONSOLE
 #  undef CONFIG_UART5_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #elif defined(CONFIG_UART5_SERIAL_CONSOLE) && defined(CONFIG_KINETIS_UART5)
 #  undef CONFIG_UART0_SERIAL_CONSOLE
 #  undef CONFIG_UART1_SERIAL_CONSOLE
 #  undef CONFIG_UART2_SERIAL_CONSOLE
 #  undef CONFIG_UART3_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
-#  define HAVE_CONSOLE 1
+#  define HAVE_SERIAL_CONSOLE 1
 #else
 #  undef CONFIG_UART0_SERIAL_CONSOLE
 #  undef CONFIG_UART1_SERIAL_CONSOLE
@@ -137,7 +137,7 @@
 #  undef CONFIG_UART3_SERIAL_CONSOLE
 #  undef CONFIG_UART4_SERIAL_CONSOLE
 #  undef CONFIG_UART5_SERIAL_CONSOLE
-#  undef HAVE_CONSOLE
+#  undef HAVE_SERIAL_CONSOLE
 #endif
 
 /* Check UART flow control (Not yet supported) */

arch/arm/src/kinetis/kinetis_gpio.c

@@ -0,0 +1,106 @@
+/****************************************************************************
+ *  arch/arm/src/kinetis/kinetis_gpio.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <arch/board/board.h>
+
+#include <errno.h>
+
+#include <nuttx/arch.h>
+
+#include "up_internal.h"
+#include "kinetis_gpio.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: kinetis_configgpio
+ *
+ * Description:
+ *   Configure a GPIO pin based on bit-encoded description of the pin.
+ *
+ ****************************************************************************/
+
+int kinetis_configgpio(uint32_t cfgset)
+{
+# warning "Missing logic"
+  return -ENOSYS;
+}
+
+/****************************************************************************
+ * Name: kinetis_gpiowrite
+ *
+ * Description:
+ *   Write one or zero to the selected GPIO pin
+ *
+ ****************************************************************************/
+
+void kinetis_gpiowrite(uint32_t pinset, bool value)
+{
+# warning "Missing logic"
+}
+
+/****************************************************************************
+ * Name: kinetis_gpioread
+ *
+ * Description:
+ *   Read one or zero from the selected GPIO pin
+ *
+ ****************************************************************************/
+
+bool kinetis_gpioread(uint32_t pinset)
+{
+# warning "Missing logic"
+  return false;
+}
+

arch/arm/src/kinetis/kinetis_internal.h

@@ -332,9 +332,9 @@ EXTERN void kinetis_uartreset(uintptr_t uart_base);
  ******************************************************************************/
 
 #ifdef HAVE_UART_DEVICE
-EXTERN void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
+EXTERN void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
-                                  unsigned int parity, unsigned int nbits,
+                                  uint32_t clock, unsigned int parity,
-                                  bool stop2);
+                                  unsigned int nbits);
 #endif
 
 /************************************************************************************

arch/arm/src/kinetis/kinetis_lowputc.c

@@ -50,6 +50,7 @@
 #include "kinetis_config.h"
 #include "kinetis_internal.h"
 #include "kinetis_uart.h"
+#include "kinetis_sim.h"
 #include "kinetis_pinmux.h"
 
 /**************************************************************************
@@ -60,56 +61,44 @@
 
 #if defined(CONFIG_UART0_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART0_BASE
+#  define CONSOLE_FREQ     BOARD_CORECLK_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART0_BAUD
 #  define CONSOLE_BITS     CONFIG_UART0_BITS
 #  define CONSOLE_PARITY   CONFIG_UART0_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART0_2STOP
 #elif defined(CONFIG_UART1_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART1_BASE
+#  define CONSOLE_FREQ     BOARD_CORECLK_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART1_BAUD
 #  define CONSOLE_BITS     CONFIG_UART1_BITS
 #  define CONSOLE_PARITY   CONFIG_UART1_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART1_2STOP
 #elif defined(CONFIG_UART2_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART2_BASE
+#  define CONSOLE_FREQ     BOARD_BUS_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART2_BAUD
 #  define CONSOLE_BITS     CONFIG_UART2_BITS
 #  define CONSOLE_PARITY   CONFIG_UART2_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART2_2STOP
 #elif defined(CONFIG_UART3_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART3_BASE
+#  define CONSOLE_FREQ     BOARD_BUS_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART3_BAUD
 #  define CONSOLE_BITS     CONFIG_UART3_BITS
 #  define CONSOLE_PARITY   CONFIG_UART3_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART3_2STOP
 #elif defined(CONFIG_UART4_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART4_BASE
+#  define CONSOLE_FREQ     BOARD_BUS_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART4_BAUD
 #  define CONSOLE_BITS     CONFIG_UART4_BITS
 #  define CONSOLE_PARITY   CONFIG_UART4_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART4_2STOP
 #elif defined(CONFIG_UART5_SERIAL_CONSOLE)
 #  define CONSOLE_BASE     KINETIS_UART5_BASE
+#  define CONSOLE_FREQ     BOARD_BUS_FREQ
 #  define CONSOLE_BAUD     CONFIG_UART5_BAUD
 #  define CONSOLE_BITS     CONFIG_UART5_BITS
 #  define CONSOLE_PARITY   CONFIG_UART5_PARITY
-#  define CONSOLE_2STOP    CONFIG_UART5_2STOP
+#elif defined(HAVE_SERIAL_CONSOLE)
-#elif defined(HAVE_CONSOLE)
 #  error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
 #endif
 
-/* Get word length setting for the console */
-# warning "Missing logic"
-
-/* Get parity setting for the console */
-# warning "Missing logic"
-
-/* Get stop-bit setting for the console and UART0-3 */
-# warning "Missing logic"
-
-/* Select a divider to produce the UART CLK */
-# warning "Missing logic"
-
 /**************************************************************************
  * Private Types
  **************************************************************************/
@@ -144,8 +133,19 @@
 
 void up_lowputc(char ch)
 {
-#if defined HAVE_UART_DEVICE && defined HAVE_CONSOLE
+#if defined HAVE_UART_DEVICE && defined HAVE_SERIAL_CONSOLE
-# warning "Missing logic"
+
+  /* Wait until the transmit data register is "empty."  This state depends
+   * on the TX watermark setting and does not mean that the transmit buffer
+   * is really empty.  It just means that we can now add another character
+   * to the transmit buffer
+   */
+
+  while ((getreg8(CONSOLE_BASE+KINETIS_UART_S1_OFFSET) & UART_S1_TDRE) == 0);
+
+ /* Then write the character to the UART data register */
+
+  putreg8((uint8_t)ch, CONSOLE_BASE+KINETIS_UART_D_OFFSET);
 #endif
 }
 
@@ -182,13 +182,46 @@ void up_lowputc(char ch)
 void kinetis_lowsetup(void)
 {
 #ifdef HAVE_UART_DEVICE
-  /* Step 1: Enable power for all enabled UARTs */
+  uint32_t regval;
 
-# warning "Missing logic"
+  /* Enable peripheral clocking for all enabled UARTs.  Clocking for UARTs
+   * 0-3 is enabled in the SCGC4 register.
+   */
 
-  /* Step 2: Enable peripheral clocking for all enabled UARTs */
+#if defined(CONFIG_KINETIS_UART0) || defined(CONFIG_KINETIS_UART1) || \
+    defined(CONFIG_KINETIS_UART2) || defined(CONFIG_KINETIS_UART3)
 
-# warning "Missing logic"
+   regval = getreg32(KINETIS_SIM_SCGC4);
+#  ifdef CONFIG_KINETIS_UART0
+   regval |= SIM_SCGC4_UART0;
+#  endif
+#  ifdef CONFIG_KINETIS_UART1
+   regval |= SIM_SCGC4_UART1;
+#  endif
+#  ifdef CONFIG_KINETIS_UART2
+   regval |= SIM_SCGC4_UART2;
+#  endif
+#  ifdef CONFIG_KINETIS_UART3
+   regval |= SIM_SCGC4_UART3;
+#  endif
+   putreg32(regval, KINETIS_SIM_SCGC4);
+
+#endif
+
+  /* Clocking for UARTs 4-5 is enabled in the SCGC1 register. */
+
+#if defined(CONFIG_KINETIS_UART4) || defined(CONFIG_KINETIS_UART5)
+
+   regval = getreg32(KINETIS_SIM_SCGC4);
+#  ifdef CONFIG_KINETIS_UART4
+   regval |= SIM_SCGC1_UART4;
+#  endif
+#  ifdef CONFIG_KINETIS_UART5
+   regval |= SIM_SCGC1_UART5;
+#  endif
+   putreg32(regval, KINETIS_SIM_SCGC4);
+
+#endif
 
   /* Configure UART pins for the all enabled UARTs */
 
@@ -217,12 +250,14 @@ void kinetis_lowsetup(void)
   kinetis_configgpio(GPIO_UART5_RX);
 #endif
 
-  /* Configure the console (only) */
+  /* Configure the console (only) now.  Other UARTs will be configured
+   * when the serial driver is opened.
+   */
 
-#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
+#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
 
-  kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_PARITY,
+  kinetis_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ,
-                        CONSOLE_BITS, CONSOLE_2STOP);
+                        CONSOLE_PARITY, CONSOLE_BITS);
 #endif
 #endif /* HAVE_UART_DEVICE */
 }
@@ -238,7 +273,13 @@ void kinetis_lowsetup(void)
 #ifdef HAVE_UART_DEVICE
 void kinetis_uartreset(uintptr_t uart_base)
 {
-# warning "Missing logic"
+  uint8_t regval;
+
+  /* Just disable the transmitter and receiver */
+
+  regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
+  regval &= ~(UART_C2_RE|UART_C2_TE);
+  putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
 }
 #endif
 
@@ -251,11 +292,103 @@ void kinetis_uartreset(uintptr_t uart_base)
  ******************************************************************************/
 
 #ifdef HAVE_UART_DEVICE
-void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baudrate,
+void kinetis_uartconfigure(uintptr_t uart_base, uint32_t baud,
-                           unsigned int parity, unsigned int nbits,
+                           uint32_t clock, unsigned int parity,
-                           bool stop2)
+                           unsigned int nbits)
 {
-# warning "Missing logic"
+  uint32_t sbr;
+  uint32_t brfa;
+  uint32_t tmp;
+  uint8_t  regval;
+
+  /* Disable the transmitter and receiver throughout the reconfiguration */
+
+  regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
+  regval &= ~(UART_C2_RE|UART_C2_TE);
+  putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
+
+  /* Configure number of bits, stop bits and parity */
+
+  regval = 0;
+
+  /* Check for odd parity */
+
+  if (parity == 1)
+    {
+      regval |= (UART_C1_PE|UART_C1_PT); /* Enable + odd parity type */
+    }
+
+  /* Check for even parity */
+
+  else if (parity == 2)
+    {
+      regval |= UART_C1_PE;              /* Enable (even parity default) */
+    }
+
+  /* The only other option is no parity */
+
+  else
+    {
+      DEBUGASSERT(parity == 0);
+    }
+
+  /* Check for 9-bit operation */
+
+  if (nbits == 9)
+    {
+      regval |= UART_C1_M;
+    }
+  
+  /* The only other option is 8-bit operation */
+
+  else
+    {
+      DEBUGASSERT(nbits == 8);
+    }
+
+  putreg8(regval, uart_base+KINETIS_UART_C1_OFFSET);
+
+  /* Calculate baud settings (truncating) */
+
+  sbr = clock / (baud << 4);
+  DEBUGASSERT(sbr < 0x2000);
+        
+  /* Save the new baud divisor, retaining other bits in the UARTx_BDH
+   * register.
+   */
+
+  regval  = getreg8(uart_base+KINETIS_UART_BDH_OFFSET) & UART_BDH_SBR_MASK;
+  tmp     = sbr >> 8;
+  regval |= (((uint8_t)tmp) << UART_BDH_SBR_SHIFT) & UART_BDH_SBR_MASK;
+  putreg8(regval, uart_base+KINETIS_UART_BDH_OFFSET);
+
+  tmp    = sbr & 0xff;
+  putreg8(regval, uart_base+KINETIS_UART_BDL_OFFSET);
+    
+  /* Calculate a fractional divider to get closer to the requested baud.
+   * The fractional divider, BRFA, is a 5 bit fractional value that is
+   * logically added to the SBR:
+   *
+   *   UART baud rate = clock / (16 × (SBR + BRFD))
+   *
+   * The BRFA the remainder.  This will be a non-negative value since the SBR
+   * was calculated by truncation.
+   */
+
+  tmp  = clock - (sbr * (baud << 4));
+  brfa = (tmp << 5) / (baud << 4);
+    
+  /* Set the BRFA field (retaining other bits in the UARTx_C4 register) */
+
+  regval  = getreg8(uart_base+KINETIS_UART_C4_OFFSET) & UART_C4_BRFA_MASK;
+  regval |= ((uint8_t)brfa << UART_C4_BRFA_SHIFT) & UART_C4_BRFA_MASK;
+  putreg8(regval, uart_base+KINETIS_UART_C4_OFFSET);
+
+  /* Now we can re-enable the transmitter and receiver */
+
+  regval = getreg8(uart_base+KINETIS_UART_C2_OFFSET);
+  regval |= (UART_C2_RE|UART_C2_TE);
+  putreg8(regval, uart_base+KINETIS_UART_C2_OFFSET);
 }
 #endif
 

arch/arm/src/kinetis/kinetis_timerisr.c

@@ -0,0 +1,157 @@
+/****************************************************************************
+ * arch/arm/src/kinetis/kinetis_timerisr.c
+ *
+ *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+#include <time.h>
+#include <debug.h>
+
+#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
+#include "nvic.h"
+#include "clock_internal.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+#include "chip.h"
+#include "kinetis_internal.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* The desired timer interrupt frequency is provided by the definition
+ * CLK_TCK (see include/time.h).  CLK_TCK defines the desired number of
+ * system clock ticks per second.  That value is a user configurable setting
+ * that defaults to 100 (100 ticks per second = 10 MS interval).
+ *
+ * The Clock Source: The System Tick Timer's clock source is always the core
+ * clock
+ */
+
+#define SYSTICK_RELOAD ((BOARD_CORECLK_FREQ / CLK_TCK) - 1)
+
+/* The size of the reload field is 24 bits.  Verify that the reload value
+ * will fit in the reload register.
+ */
+
+#if SYSTICK_RELOAD > 0x00ffffff
+#  error SYSTICK_RELOAD exceeds the range of the RELOAD register
+#endif
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Global Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Function:  up_timerisr
+ *
+ * Description:
+ *   The timer ISR will perform a variety of services for various portions
+ *   of the systems.
+ *
+ ****************************************************************************/
+
+int up_timerisr(int irq, uint32_t *regs)
+{
+   /* Process timer interrupt */
+
+   sched_process_timer();
+   return 0;
+}
+
+/****************************************************************************
+ * Function:  up_timerinit
+ *
+ * Description:
+ *   This function is called during start-up to initialize
+ *   the timer interrupt.
+ *
+ ****************************************************************************/
+
+void up_timerinit(void)
+{
+  uint32_t regval;
+
+  /* Set the SysTick interrupt to the default priority */
+
+  regval = getreg32(NVIC_SYSH12_15_PRIORITY);
+  regval &= ~NVIC_SYSH_PRIORITY_PR15_MASK;
+  regval |= (NVIC_SYSH_PRIORITY_DEFAULT << NVIC_SYSH_PRIORITY_PR15_SHIFT);
+  putreg32(regval, NVIC_SYSH12_15_PRIORITY);
+
+  /* Note that is should not be neccesary to set the SYSTICK clock source: 
+   * "The CLKSOURCE bit in SysTick Control and Status register is always set
+   *  to select the core clock."
+   */
+
+#if 0
+  regval = getreg32(NVIC_SYSTICK_CTRL);
+  regval |= NVIC_SYSTICK_CTRL_CLKSOURCE;
+  putreg32(regval, NVIC_SYSTICK_CTRL);
+#endif
+
+  /* Configure SysTick to interrupt at the requested rate */
+
+  putreg32(SYSTICK_RELOAD, NVIC_SYSTICK_RELOAD);
+
+  /* Attach the timer interrupt vector */
+
+  (void)irq_attach(KINETIS_IRQ_SYSTICK, (xcpt_t)up_timerisr);
+
+  /* Enable SysTick interrupts */
+
+  putreg32((NVIC_SYSTICK_CTRL_CLKSOURCE | NVIC_SYSTICK_CTRL_TICKINT |
+            NVIC_SYSTICK_CTRL_ENABLE),
+           NVIC_SYSTICK_CTRL);
+
+  /* And enable the timer interrupt */
+
+  up_enable_irq(KINETIS_IRQ_SYSTICK);
+}

arch/mips/src/pic32mx/pic32mx-serial.c

@@ -90,12 +90,12 @@
 #    ifdef CONFIG_PIC32MX_UART2
 #      define TTYS1_DEV     g_uart1port     /* UART2 is ttyS1 */
 #    else
-#      undef  TTYS1_DEV                      /* No ttyS1 */
+#      undef  TTYS1_DEV                     /* No ttyS1 */
 #    endif
 #  elif defined(CONFIG_UART2_SERIAL_CONSOLE)
 #    define CONSOLE_DEV     g_uart1port     /* UART2 is console */
 #    define TTYS0_DEV       g_uart1port     /* UART2 is ttyS0 */
-#    undef  TTYS1_DEV                        /* No ttyS1 */
+#    undef  TTYS1_DEV                       /* No ttyS1 */
 #  else
 #    error "I'm confused... Do we have a serial console or not?"
 #  endif
@@ -108,11 +108,11 @@
 #    ifdef CONFIG_PIC32MX_UART2
 #      define TTYS1_DEV     g_uart1port     /* UART2 is ttyS1 */
 #    else
-#      undef  TTYS1_DEV                      /* No ttyS1 */
+#      undef  TTYS1_DEV                     /* No ttyS1 */
 #    endif
 #  elif defined(CONFIG_PIC32MX_UART2)
 #    define TTYS0_DEV       g_uart1port     /* UART2 is ttyS0 */
-#    undef  TTYS1_DEV                        /* No ttyS1 */
+#    undef  TTYS1_DEV                       /* No ttyS1 */
 #  else
 #    undef  TTYS0_DEV
 #    undef  TTYS0_DEV
@@ -144,7 +144,7 @@ struct up_dev_s
   uint8_t   irq;       /* IRQ associated with this UART (for attachment) */
   uint8_t   irqe;      /* Error IRQ associated with this UART (for enable) */
   uint8_t   irqrx;     /* RX IRQ associated with this UART (for enable) */
-  uint8_t   irqtx;     /* RX IRQ associated with this UART (for enable) */
+  uint8_t   irqtx;     /* TX IRQ associated with this UART (for enable) */
   uint8_t   irqprio;   /* Interrupt priority */
   uint8_t   ie;        /* Interrupts enabled */
   uint8_t   parity;    /* 0=none, 1=odd, 2=even */
@@ -193,8 +193,8 @@ struct uart_ops_s g_uart_ops =
 /* I/O buffers */
 
 #ifdef CONFIG_PIC32MX_UART1
-static char g_uart1rxbuffer[CONFIG_UART2_RXBUFSIZE];
+static char g_uart1rxbuffer[CONFIG_UART1_RXBUFSIZE];
-static char g_uart1txbuffer[CONFIG_UART2_TXBUFSIZE];
+static char g_uart1txbuffer[CONFIG_UART1_TXBUFSIZE];
 #endif
 #ifdef CONFIG_PIC32MX_UART2
 static char g_uart2rxbuffer[CONFIG_UART2_RXBUFSIZE];
@@ -207,27 +207,27 @@ static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
 static struct up_dev_s g_uart1priv =
 {
   .uartbase       = PIC32MX_UART1_K1BASE,
-  .baud           = CONFIG_UART2_BAUD,
+  .baud           = CONFIG_UART1_BAUD,
   .irq            = PIC32MX_IRQ_U1,
   .irqe           = PIC32MX_IRQSRC_U1E,
   .irqrx          = PIC32MX_IRQSRC_U1RX,
   .irqtx          = PIC32MX_IRQSRC_U1TX,
   .irqprio        = CONFIG_PIC32MX_UART1PRIO,
-  .parity         = CONFIG_UART2_PARITY,
+  .parity         = CONFIG_UART1_PARITY,
-  .bits           = CONFIG_UART2_BITS,
+  .bits           = CONFIG_UART1_BITS,
-  .stopbits2      = CONFIG_UART2_2STOP,
+  .stopbits2      = CONFIG_UART1_2STOP,
 };
 
 static uart_dev_t g_uart1port =
 {
   .recv     =
   {
-    .size   = CONFIG_UART2_RXBUFSIZE,
+    .size   = CONFIG_UART1_RXBUFSIZE,
     .buffer = g_uart1rxbuffer,
   },
   .xmit     =
   {
-    .size   = CONFIG_UART2_TXBUFSIZE,
+    .size   = CONFIG_UART1_TXBUFSIZE,
     .buffer = g_uart1txbuffer,
    },
   .ops      = &g_uart_ops,
@@ -237,7 +237,7 @@ static uart_dev_t g_uart1port =
 
 /* This describes the state of the AVR32 UART2 port. */
 
-#ifdef CONFIG_PIC32MX_UART1
+#ifdef CONFIG_PIC32MX_UART2
 static struct up_dev_s g_uart2priv =
 {
   .uartbase       = PIC32MX_UART2_K1BASE,
@@ -414,7 +414,7 @@ static void up_detach(struct uart_dev_s *dev)
 
   up_disableuartint(priv, NULL);
 
-  /* Dettach from the interrupt */
+  /* Detach from the interrupt */
 
   irq_detach(priv->irq);
 }
@@ -639,17 +639,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
 
   /* Return true is data is available in the receive data buffer */
 
-#define UART_STA_URXDA              (1 << 0)  /* Bit 0: Receive buffer data available */
+  return (up_serialin(priv, PIC32MX_UART_STA_OFFSET) & UART_STA_URXDA) != 0;
-#define UART_STA_RIDLE              (1 << 4)  /* Bit 4: Receiver idle */
-#define                (1 << 8)  /* Bit 8: */
-#define               (1 << 9)  /* Bit 9: Transmit buffer full status */
-
-  /* Return TRUE if the Transmit shift register is empty */
-
-  return (up_serialin(priv, PIC32MX_UART_STA_OFFSET) & UART_STA_TRMT) != 0;
-
-#warning "Missing logic"
-  return false;
 }
 
 /****************************************************************************