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arch/risc-v: add support for motor control on ESP32|C6|H2
This commit is contained in:
committed by
Alan Carvalho de Assis
parent
fddebc267d
commit
65e989e063
@@ -105,15 +105,15 @@ capture
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The capture configuration enables the capture driver and the capture example, allowing
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the user to measure duty cycle and frequency of a signal. Default pin is GPIO 18 with
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an internal pull-up resistor enabled. When connecting a 50 Hz pulse with 50% duty cycle,
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the following output is expected:
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the following output is expected::
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nsh> cap
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cap_main: Hardware initialized. Opening the capture device: /dev/capture0
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cap_main: Number of samples: 0
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pwm duty cycle: 50 %
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pwm frequence: 50 Hz
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pwm duty cycle: 50 %
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pwm frequence: 50 Hz
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nsh> cap
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cap_main: Hardware initialized. Opening the capture device: /dev/capture0
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cap_main: Number of samples: 0
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pwm duty cycle: 50 %
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pwm frequence: 50 Hz
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pwm duty cycle: 50 %
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pwm frequence: 50 Hz
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coremark
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--------
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@@ -154,6 +154,18 @@ You can scan for all I2C devices using the following command::
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nsh> i2c dev 0x00 0x7f
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motor
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-------
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The motor configuration enables the MCPWM peripheral with support to brushed DC motor
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control.
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It creates a ``/dev/motor0`` device with speed and direction control capabilities
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by using two GPIOs (GPIO21 and GPIO22) for PWM output. PWM frequency is configurable
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from 25 Hz to 3 kHz, however it defaults to 1 kHz.
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There is also support for an optional fault GPIO (defaults to GPIO9), which can be used
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for quick motor braking. All GPIOs are configurable in ``menuconfig``.
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mcuboot_nsh
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--------------------
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@@ -170,7 +170,7 @@ I2S No
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Int. Temp. No
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LED No
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LED_PWM Yes
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MCPWM Yes (Capture)
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MCPWM Yes
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Pulse Counter No
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RMT No
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RNG No
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