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https://github.com/apache/nuttx.git
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Add i2c driver for gd32f450 MCU
This commit is contained in:
GD32-MCU
Xiang Xiao
@@ -87,7 +87,7 @@ config GD32F4_120MHZ
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endchoice # CPU Frequency
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config GD32F4_GD25_BLOCKMOUNT
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config GD32F450ZK_EVAL_GD25_BLOCKMOUNT
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bool "GD25 serial FLASH auto-mount"
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default n
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depends on GD32F4_SPI5 && MTD_GD25
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@@ -96,18 +96,18 @@ config GD32F4_GD25_BLOCKMOUNT
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choice
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prompt "GD25 SPI FLASH configuration"
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default GD32F4_GD25_NXFFS
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depends on GD32F4_GD25_BLOCKMOUNT
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default GD32F450ZK_EVAL_GD25_NXFFS
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depends on GD32F450ZK_EVAL_GD25_BLOCKMOUNT
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config GD32F4_GD25_FTL
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config GD32F450ZK_EVAL_GD25_FTL
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bool "Create GD25 SPI FLASH block driver"
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---help---
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Create the MTD driver for the GD25 and "wrap" the GD25 as a standard
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block driver that could then, for example, be mounted using FAT or
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any other file system. Any file system may be used, but there will
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any other file system. Any file system may be used, but there will
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be no wear-leveling.
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config GD32F4_GD25_NXFFS
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config GD32F450ZK_EVAL_GD25_NXFFS
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bool "Create GD25 serial FLASH NXFFS file system"
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depends on FS_NXFFS
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---help---
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@@ -117,5 +117,20 @@ config GD32F4_GD25_NXFFS
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endchoice # GD25 serial FLASH configuration
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config GD32F450ZK_EVAL_AT24_TEST
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bool "I2C0 EEPROM AT2402 write and read test"
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default n
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depends on NSH_ARCHINIT && GD32F4_I2C0 && MTD_AT24XX
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---help---
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Automatically initialize and test the AT24 I2C EEPROM driver when
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NSH starts. After test the I2C0 will be released.
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config AT24XX_MTD_BLOCKSIZE
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int "AT24xx MTD block size"
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default 8
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depends on GD32F450ZK_EVAL_AT24_TEST
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---help---
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The block size must be an even multiple of the pages.
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The page size of AT2402 on the board is 8 Byte.
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endif # ARCH_BOARD_GD32F450ZK_EVAL
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@@ -29,11 +29,11 @@ CONFIG_FS_PROCFS=y
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CONFIG_FS_PROCFS_REGISTER=y
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CONFIG_FS_TMPFS=y
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CONFIG_GD25_SPIFREQUENCY=4000000
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CONFIG_GD32F450ZK_EVAL_GD25_BLOCKMOUNT=y
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CONFIG_GD32F4_168MHZ=y
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CONFIG_GD32F4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
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CONFIG_GD32F4_ENETMAC=y
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CONFIG_GD32F4_FLASH_CONFIG_K=y
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CONFIG_GD32F4_GD25_BLOCKMOUNT=y
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CONFIG_GD32F4_PHY_SR=16
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CONFIG_GD32F4_PHY_SR_100FD=0x0004
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CONFIG_GD32F4_PHY_SR_100HD=0x0000
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@@ -0,0 +1,63 @@
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#
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# This file is autogenerated: PLEASE DO NOT EDIT IT.
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#
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# You can use "make menuconfig" to make any modifications to the installed .config file.
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# You can then do "make savedefconfig" to generate a new defconfig file that includes your
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# modifications.
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#
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# CONFIG_ARCH_FPU is not set
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CONFIG_ARCH="arm"
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CONFIG_ARCH_BOARD="gd32f450zk-eval"
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CONFIG_ARCH_BOARD_GD32F450ZK_EVAL=y
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CONFIG_ARCH_BUTTONS=y
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CONFIG_ARCH_CHIP="gd32f4"
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CONFIG_ARCH_CHIP_GD32F450ZK=y
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CONFIG_ARCH_CHIP_GD32F4=y
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CONFIG_ARCH_INTERRUPTSTACK=256
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_AT24XX_SIZE=2
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CONFIG_BOARD_LOOPSPERMSEC=16717
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CONFIG_BUILTIN=y
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CONFIG_DEBUG_CUSTOMOPT=y
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CONFIG_DEBUG_ERROR=y
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CONFIG_DEBUG_FEATURES=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_IRQ=y
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CONFIG_DEBUG_LEDS=y
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CONFIG_DEBUG_OPTLEVEL="-O0"
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CONFIG_DEBUG_SCHED=y
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CONFIG_DEBUG_SYMBOLS=y
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CONFIG_DEBUG_WARN=y
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CONFIG_FS_NXFFS=y
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CONFIG_FS_PROCFS=y
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CONFIG_GD32F450ZK_EVAL_AT24_TEST=y
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CONFIG_GD32F4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
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CONFIG_GD32F4_FLASH_CONFIG_K=y
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CONFIG_GD32F4_I2C0=y
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CONFIG_HAVE_CXX=y
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CONFIG_HAVE_CXXINITIALIZE=y
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CONFIG_I2C_DRIVER=y
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CONFIG_I2C_POLLED=y
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CONFIG_I2C_RESET=y
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CONFIG_INIT_ENTRYPOINT="nsh_main"
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CONFIG_INTELHEX_BINARY=y
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CONFIG_MM_REGIONS=2
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CONFIG_MTD=y
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CONFIG_MTD_AT24XX=y
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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CONFIG_NSH_FILEIOSIZE=512
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CONFIG_NSH_LINELEN=64
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CONFIG_NSH_READLINE=y
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CONFIG_NXFFS_PACKTHRESHOLD=8
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CONFIG_RAM_SIZE=114688
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CONFIG_RAM_START=0x20000000
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_SCHED_WAITPID=y
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CONFIG_START_DAY=6
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CONFIG_START_MONTH=12
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CONFIG_START_YEAR=2011
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CONFIG_SYSTEM_NSH=y
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CONFIG_TASK_NAME_SIZE=0
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CONFIG_USART0_SERIAL_CONSOLE=y
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@@ -25,11 +25,11 @@ CONFIG_FS_PROCFS=y
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CONFIG_FS_PROCFS_REGISTER=y
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CONFIG_FS_TMPFS=y
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CONFIG_GD25_SPIFREQUENCY=4000000
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CONFIG_GD32F450ZK_EVAL_GD25_BLOCKMOUNT=y
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CONFIG_GD32F4_168MHZ=y
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CONFIG_GD32F4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
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CONFIG_GD32F4_ENETMAC=y
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CONFIG_GD32F4_FLASH_CONFIG_K=y
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CONFIG_GD32F4_GD25_BLOCKMOUNT=y
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CONFIG_GD32F4_PHY_SR=16
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CONFIG_GD32F4_PHY_SR_100FD=0x0004
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CONFIG_GD32F4_PHY_SR_100HD=0x0000
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@@ -283,6 +283,16 @@ typedef enum
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# define GPIO_USART3_TX GPIO_USART3_TX_3
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#endif
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/* I2C0 gpios:
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*
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* PB6 I2C0_SCL
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* PB7 I2C0_SDA
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*
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*/
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#define GPIO_I2C0_SCL GPIO_I2C0_SCL_1
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#define GPIO_I2C0_SDA GPIO_I2C0_SDA_1
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/* SPI flash
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*
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* PG12 SPI5_MISO
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@@ -53,4 +53,8 @@ ifeq ($(CONFIG_MTD_GD25),y)
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CSRCS += gd32f4xx_gd25.c
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endif
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ifeq ($(CONFIG_MTD_AT24XX), y)
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CSRCS += gd32f4xx_at24.c
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endif
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include $(TOPDIR)/boards/Board.mk
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@@ -101,6 +101,41 @@
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#define HAVE_GD25 1
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#if !defined(CONFIG_MTD_GD25) || !defined(CONFIG_GD32F4_SPI5)
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# undef HAVE_GD25
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#endif
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/* Can't support AT24 features if mountpoints are disabled or if we were not
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* asked to mount the AT25 part
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*/
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#if defined(CONFIG_DISABLE_MOUNTPOINT) || \
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!defined(CONFIG_GD32F450ZK_EVAL_GD25_BLOCKMOUNT)
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# undef HAVE_GD25
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#endif
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#define HAVE_AT24 1
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/* AT24 Serial EEPROM
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*
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* A AT24C02C Serial EEPPROM was used for tested I2C0.
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*/
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#define AT24_BUS 0
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#define AT24_MINOR 0
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#if !defined(CONFIG_MTD_AT24XX) || !defined(CONFIG_GD32F4_I2C0)
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# undef HAVE_AT24
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#endif
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/* Can't support AT24 features if mountpoints are disabled or if we were not
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* asked to mount the AT25 part
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*/
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#ifndef CONFIG_GD32F450ZK_EVAL_AT24_TEST
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# undef HAVE_AT24
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#endif
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/* GPIO pins used by the GPIO Subsystem */
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#define BOARD_NGPIOIN 1 /* Amount of GPIO Input pins */
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@@ -144,6 +179,18 @@ void gd32_spidev_initialize(void);
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int gd32_gd25_automount(int minor);
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#endif
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/****************************************************************************
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* Name: gd32_at24_wr_test
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*
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* Description:
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* Write and read the AT24 serial EEPROM test.
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*
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****************************************************************************/
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#ifdef HAVE_AT24
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int gd32_at24_wr_test(int minor);
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#endif
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/****************************************************************************
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* Name: gd32_gpio_initialize
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*
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@@ -138,7 +138,7 @@ int board_app_initialize(uintptr_t arg)
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# endif
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# ifdef CONFIG_MTD_GD25
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# ifdef HAVE_GD25
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ret = gd32_gd25_automount(0);
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if (ret < 0)
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@@ -149,7 +149,18 @@ int board_app_initialize(uintptr_t arg)
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# endif
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#endif
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# ifdef HAVE_AT24
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ret = gd32_at24_wr_test(AT24_MINOR);
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if (ret < 0)
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{
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syslog(LOG_ERR, "ERROR: I2C EEPROM write and read test fail: \
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%d\n", ret);
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}
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# endif
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#endif /* CONFIG_FS_NXFFS */
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#ifdef CONFIG_DEV_GPIO
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/* Register the GPIO driver */
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@@ -0,0 +1,155 @@
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/****************************************************************************
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* boards/arm/gd32f4/gd32f450zk-eval/src/gd32f4xx_at24.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/i2c/i2c_master.h>
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#include <nuttx/mtd/mtd.h>
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#include <nuttx/kmalloc.h>
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#include "gd32f4xx.h"
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#include "gd32f450z_eval.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: gd32_at24_wr_test
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*
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* Description:
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* Write and read the AT24 serial EEPROM test.
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*
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****************************************************************************/
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#ifdef HAVE_AT24
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#define BUFFSIZE 16
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#define START_BLOCK 0
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#if BUFFSIZE>=CONFIG_AT24XX_MTD_BLOCKSIZE
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# define NBLOCK (BUFFSIZE/CONFIG_AT24XX_MTD_BLOCKSIZE)
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#else
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# error "BUFFSIZE should bigger than CONFIG_AT24XX_MTD_BLOCKSIZE"
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#endif
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const uint8_t write_buf[BUFFSIZE] =
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{
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0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7,
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0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf
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};
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int gd32_at24_wr_test(int minor)
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{
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struct i2c_master_s *i2c;
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struct mtd_dev_s *at24;
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static bool initialized = false;
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int ret;
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ssize_t nblocks;
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uint8_t *read_buf;
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/* Have we already initialized? */
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if (!initialized)
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{
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/* No.. Get the I2C port driver */
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finfo("Initialize TWI%d\n", AT24_BUS);
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i2c = gd32_i2cbus_initialize(AT24_BUS);
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if (!i2c)
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{
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ferr("ERROR: Failed to initialize TWI%d\n", AT24_BUS);
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return -ENODEV;
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}
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/* Now bind the I2C interface to the AT24 I2C EEPROM driver */
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finfo("Bind the AT24 EEPROM driver to TWI%d\n", AT24_BUS);
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at24 = at24c_initialize(i2c);
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if (!at24)
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{
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ferr("ERROR: Failed to bind TWI%d to the AT24 EEPROM driver\n",
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AT24_BUS);
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return -ENODEV;
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}
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/* Now we are initializeed */
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initialized = true;
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}
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/* Write start block is START_BLOCK, number of block is 2 */
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nblocks = at24->bwrite(at24, START_BLOCK, NBLOCK, write_buf);
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if (nblocks < NBLOCK)
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{
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ferr("ERROR: AT24 write failed: %zd\n", nblocks);
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gd32_i2cbus_uninitialize(i2c);
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return (int)nblocks;
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}
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read_buf = (uint8_t *)kmm_malloc(BUFFSIZE);
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/* Read the data write before */
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nblocks = at24->bread(at24, START_BLOCK, NBLOCK, read_buf);
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if (nblocks < NBLOCK)
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{
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ferr("ERROR: AT24 read failed: %zd\n", nblocks);
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gd32_i2cbus_uninitialize(i2c);
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return (int)nblocks;
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}
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if (memcmp(read_buf, write_buf, BUFFSIZE) != 0)
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{
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ferr("ERROR: Read buffer does not match write buffer\n");
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return -1;
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}
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/* Release the I2C instance.
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* REVISIT: Need an interface to release the AT24 instance too
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*/
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ret = gd32_i2cbus_uninitialize(i2c);
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if (ret < 0)
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{
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ferr("ERROR: Failed to release the I2C interface: %d\n", ret);
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}
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syslog(LOG_INFO, "INFO: I2C EEPROM write and read success: \
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%d\n", ret);
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return OK;
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}
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#endif /* HAVE_AT24 */
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@@ -87,7 +87,7 @@ int gd32_gd25_automount(int minor)
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return -ENODEV;
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}
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#if defined(CONFIG_GD32F4_GD25_FTL)
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#if defined(CONFIG_GD32F450ZK_EVAL_GD25_FTL)
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/* And finally, use the FTL layer to wrap the MTD driver as a block
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* driver at /dev/mtdblockN, where N=minor device number.
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*/
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@@ -100,7 +100,7 @@ int gd32_gd25_automount(int minor)
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return ret;
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}
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#elif defined(CONFIG_GD32F4_GD25_NXFFS)
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#elif defined(CONFIG_GD32F450ZK_EVAL_GD25_NXFFS)
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/* Initialize to provide NXFFS on the MTD interface */
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ret = nxffs_initialize(mtd);
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