diff --git a/arch/arm/src/armv7-a/Kconfig b/arch/arm/src/armv7-a/Kconfig
index 232b96e23a3..e4e0eca96d7 100644
--- a/arch/arm/src/armv7-a/Kconfig
+++ b/arch/arm/src/armv7-a/Kconfig
@@ -47,6 +47,17 @@ config ARMV7A_HAVE_L2CC
 		Selected by the configuration tool if the architecture supports any
 		kind of L2 cache.
 
+config ARMV7A_SMP_BUSY_WAIT
+	bool "Busy wait when SMP boot"
+	default n
+	depends on SMP
+	---help---
+		Enables busy wait when SMP boot
+
+config ARMV7A_SMP_BUSY_WAIT_FLAG_ADDR
+	hex "Busy wait flag address"
+	depends on ARMV7A_SMP_BUSY_WAIT
+
 config ARMV7A_HAVE_L2CC_PL310
 	bool
 	default n
diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S
index 9e0b0330ff8..a469f9af52d 100644
--- a/arch/arm/src/armv7-a/arm_head.S
+++ b/arch/arm/src/armv7-a/arm_head.S
@@ -183,7 +183,17 @@ __start:
 	and		r0, r0, #0x3
 	cmp		r0, #0
 	beq		__cpu0_start
+
+#ifdef CONFIG_ARMV7A_SMP_BUSY_WAIT
+	ldr		r2, =CONFIG_ARMV7A_SMP_BUSY_WAIT_FLAG_ADDR
+1:
+	ldr		r1, [r2, #0]
+	cmp		r1, #0
+	beq		1b
+#else
 	wfe
+#endif
+
 	cmp		r0, #1
 	beq		__cpu1_start
 #  if CONFIG_SMP_NCPUS > 2
@@ -674,6 +684,15 @@ __cpu0_start:
 
 	bl		arm_boot
 
+	/* finish busy wait */
+
+#ifdef CONFIG_ARMV7A_SMP_BUSY_WAIT
+	ldr		r0, =CONFIG_ARMV7A_SMP_BUSY_WAIT_FLAG_ADDR
+	mov		r1, #1
+	str		r1, [r0]
+	dsb		sy
+#endif
+
 	/* Finally branch to the OS entry point */
 
 	mov		lr, #0				/* LR = return address (none) */