diff --git a/arch/arm/src/armv7-a/arm_fpuconfig.S b/arch/arm/src/armv7-a/arm_fpuconfig.S
index 52c210b4226..aaa93656838 100644
--- a/arch/arm/src/armv7-a/arm_fpuconfig.S
+++ b/arch/arm/src/armv7-a/arm_fpuconfig.S
@@ -75,6 +75,13 @@ arm_fpuconfig:
 	mcr		CP15_CPACR(r0)
 
 	/* Enable access to CP10 and CP11 in CP15.NSACR */
+
+#ifdef CONFIG_ARCH_TRUSTZONE_SECURE
+	mrc		CP15_NSACR(r0)
+	orr		r0, r0, #0xc00
+	mcr		CP15_NSACR(r0)
+#endif
+
 	/* REVISIT: Do we need to do this? */
 
 	/* Set FPEXC.EN (B30) */
diff --git a/arch/arm/src/armv7-r/arm_fpuconfig.S b/arch/arm/src/armv7-r/arm_fpuconfig.S
index 5faf4631e9e..6715bc762fa 100644
--- a/arch/arm/src/armv7-r/arm_fpuconfig.S
+++ b/arch/arm/src/armv7-r/arm_fpuconfig.S
@@ -75,6 +75,13 @@ arm_fpuconfig:
 	mcr		CP15_CPACR(r0)
 
 	/* Enable access to CP10 and CP11 in CP15.NSACR */
+
+#ifdef CONFIG_ARCH_TRUSTZONE_SECURE
+	mrc		CP15_NSACR(r0)
+	orr		r0, r0, #0xc00
+	mcr		CP15_NSACR(r0)
+#endif
+
 	/* REVISIT: Do we need to do this? */
 
 	/* Set FPEXC.EN (B30) */
diff --git a/arch/arm/src/armv8-r/arm_fpuconfig.S b/arch/arm/src/armv8-r/arm_fpuconfig.S
index f13fc7ea4d5..0cfa2525142 100644
--- a/arch/arm/src/armv8-r/arm_fpuconfig.S
+++ b/arch/arm/src/armv8-r/arm_fpuconfig.S
@@ -75,6 +75,13 @@ arm_fpuconfig:
 	mcr		CP15_CPACR(r0)
 
 	/* Enable access to CP10 and CP11 in CP15.NSACR */
+
+#ifdef CONFIG_ARCH_TRUSTZONE_SECURE
+	mrc		CP15_NSACR(r0)
+	orr		r0, r0, #0xc00
+	mcr		CP15_NSACR(r0)
+#endif
+
 	/* REVISIT: Do we need to do this? */
 
 	/* Set FPEXC.EN (B30) */