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SAMA5D4-EK: NSH should run at 528MHz

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This commit is contained in:
Gregory Nutt
2014-07-02 15:31:52 -06:00
parent 30fc821bc8
commit 596dbc20ef
2 changed files with 4 additions and 2 deletions
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arch/arm/src/sama5/chip/sam_pmc.h
+1 -1
View File
@@ -420,7 +420,7 @@
#define PMC_PCR_CMD (1 << 12) /* Bit 12: Command */ #define PMC_PCR_CMD (1 << 12) /* Bit 12: Command */
#ifdef ATSAMA5D3 #ifdef ATSAMA5D3
# define SAMA5_HAVE_PMC_PCR 1 /* Supports conditional compilation */ # define SAMA5_HAVE_PMC_PCR_DIV 1 /* Supports conditional compilation */
# define PMC_PCR_DIV_SHIFT (16) /* Bits 16-17: Divisor Value */ # define PMC_PCR_DIV_SHIFT (16) /* Bits 16-17: Divisor Value */
# define PMC_PCR_DIV_MASK (3 << PMC_PCR_DIV_SHIFT) # define PMC_PCR_DIV_MASK (3 << PMC_PCR_DIV_SHIFT)
# define PMC_PCR_DIV1 (0 << PMC_PCR_DIV_SHIFT) /* Peripheral clock is MCK */ # define PMC_PCR_DIV1 (0 << PMC_PCR_DIV_SHIFT) /* Peripheral clock is MCK */
arch/arm/src/sama5/sam_twi.c
+3 -1
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@@ -1169,6 +1169,8 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
mck = BOARD_MCK_FREQUENCY; mck = BOARD_MCK_FREQUENCY;
#ifdef SAMA5_HAVE_PMC_PCR_DIV #ifdef SAMA5_HAVE_PMC_PCR_DIV
/* Select the optimal value for the PCR DIV field */
DEBUGASSERT((mck >> 3) <= TWI_MAX_FREQUENCY); DEBUGASSERT((mck >> 3) <= TWI_MAX_FREQUENCY);
if (mck <= TWI_MAX_FREQUENCY) if (mck <= TWI_MAX_FREQUENCY)
{ {
@@ -1193,7 +1195,7 @@ static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
#else #else
/* No DIV field in the PCR register */ /* No DIV field in the PCR register */
priv->frequency = mck; priv->frequency = mck;
regval = 0; regval = 0;