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esp32: add simple boot support

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The Simple Boot feature for Espressif chips is a method of booting
that doesn't depend on a 2nd stage bootloader. Its not the
intention to replace a 2nd stage bootloader such as MCUboot and
ESP-IDF bootloader, but to have a minimal and straight-forward way
of booting, and also simplify the building.

This commit also removes deprecated code and makes this bootloader
configuration as default for esp32 targets and removes the need
for running 'make bootloader' command for it.

Signed-off-by: Almir Okato <almir.okato@espressif.com>
This commit is contained in:
Almir Okato
2024-06-10 18:07:35 +02:00
committed by Alan Carvalho de Assis
parent 6ec690cbfc
commit 593dc946d1
27 changed files with 864 additions and 239 deletions
Download Patch File Download Diff File Expand all files Collapse all files
boards/xtensa/esp32/common/scripts/esp32_rom.ld
+17 -16
View File
@@ -1992,27 +1992,11 @@ PROVIDE ( xthal_set_intclear = 0x4000c1ec );
PROVIDE ( _xtos_set_intlevel = 0x4000bfdc );
PROVIDE ( g_ticks_per_us_pro = 0x3ffe01e0 );
PROVIDE ( g_ticks_per_us_app = 0x3ffe40f0 );
PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
PROVIDE ( esp_rom_spiflash_config_clk = 0x40062bc8 );
PROVIDE ( esp_rom_spiflash_config_param = 0x40063238 );
PROVIDE ( esp_rom_spiflash_config_readmode = 0x40062b64 ); /* SPIMasterReadModeCnfig */
PROVIDE ( esp_rom_spiflash_enable_write = 0x40062320 );
PROVIDE ( esp_rom_spiflash_erase_area = 0x400631ac );
PROVIDE ( esp_rom_spiflash_erase_block = 0x40062c4c );
PROVIDE ( esp_rom_spiflash_erase_chip = 0x40062c14 );
PROVIDE ( esp_rom_spiflash_erase_sector = 0x40062ccc );
PROVIDE ( esp_rom_spiflash_lock = 0x400628f0 );
PROVIDE ( esp_rom_spiflash_prepare_encrypted_data = 0x40062e1c );
PROVIDE ( esp_rom_spiflash_read = 0x40062ed8 );
PROVIDE ( esp_rom_spiflash_read_status = 0x4006226c );
PROVIDE ( esp_rom_spiflash_read_statushigh = 0x40062448 );
PROVIDE ( esp_rom_spiflash_read_user_cmd = 0x400621b0 );
PROVIDE ( esp_rom_spiflash_select_qio_pins = 0x40061ddc );
PROVIDE ( esp_rom_spiflash_write = 0x40062d50 );
PROVIDE ( esp_rom_spiflash_write_encrypted = 0x40062e78 );
PROVIDE ( esp_rom_spiflash_write_encrypted_disable = 0x40062e60 );
PROVIDE ( esp_rom_spiflash_write_encrypted_enable = 0x40062df4 );
PROVIDE ( esp_rom_spiflash_write_status = 0x400622f0 );
PROVIDE ( g_rom_spiflash_chip = 0x3ffae270 );
PROVIDE ( hci_le_rd_rem_used_feats_cmd_handler = 0x400417b4 );
PROVIDE ( llcp_length_req_handler = 0x40043808 );
@@ -2054,6 +2038,23 @@ PROVIDE ( esp_rom_spiflash_prepare_encrypted_data = 0x40062e1c );
PROVIDE ( esp_rom_printf = ets_printf );
PROVIDE ( esp_rom_delay_us = ets_delay_us );
/* ESP32 ROM SPIFLASH functions */
PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
PROVIDE ( esp_rom_spiflash_config_readmode = 0x40062b64 );
PROVIDE ( esp_rom_spiflash_enable_write = 0x40062320 );
PROVIDE ( esp_rom_spiflash_erase_area = 0x400631ac );
PROVIDE ( esp_rom_spiflash_erase_block = 0x40062c4c );
PROVIDE ( esp_rom_spiflash_erase_chip = 0x40062c14 );
PROVIDE ( esp_rom_spiflash_erase_sector = 0x40062ccc );
PROVIDE ( esp_rom_spiflash_lock = 0x400628f0 );
PROVIDE ( esp_rom_spiflash_read = 0x40062ed8 );
PROVIDE ( esp_rom_spiflash_read_status = 0x4006226c );
PROVIDE ( esp_rom_spiflash_read_statushigh = 0x40062448 );
PROVIDE ( esp_rom_spiflash_write = 0x40062d50 );
PROVIDE ( esp_rom_spiflash_write_encrypted = 0x40062e78 );
PROVIDE ( esp_rom_spiflash_write_status = 0x400622f0 );
/* Following are static data, but can be used, not generated by script <<<<< btdm data */
PROVIDE ( hci_tl_env = 0x3ffb8154 );
boards/xtensa/esp32/common/scripts/flat_memory.ld
+21 -3
View File
@@ -43,6 +43,8 @@
# define FLASH_SIZE 0x1000000
#endif
#define SRAM1_IRAM_LEN 0xa000
MEMORY
{
#ifdef CONFIG_ESP32_APP_FORMAT_MCUBOOT
@@ -58,6 +60,17 @@ MEMORY
metadata (RX) : org = CONFIG_ESP32_APP_MCUBOOT_HEADER_SIZE, len = 0x20
ROM (RX) : org = ORIGIN(metadata) + LENGTH(metadata),
len = FLASH_SIZE - ORIGIN(ROM)
#elif defined (CONFIG_ESPRESSIF_SIMPLE_BOOT)
/* The 0x20 offset is a convenience for the app binary image generation.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's
* constraint that (paddr % 64KB == vaddr % 64KB).
*/
ROM (RX) : org = 0x20,
len = FLASH_SIZE - ORIGIN(ROM)
#endif
/* Below values assume the flash cache is on, and have the blocks this
@@ -68,7 +81,7 @@ MEMORY
/* IRAM for PRO cpu. Not sure if happy with this, this is MMU area... */
iram0_0_seg (RX) : org = 0x40080000, len = 0x20000
iram0_0_seg (RX) : org = 0x40080000, len = 0x20000 + SRAM1_IRAM_LEN
/* Flash mapped instruction data. */
@@ -152,13 +165,18 @@ MEMORY
REGION_ALIAS("default_code_seg", irom0_0_seg);
#endif /* CONFIG_ESP32_RUN_IRAM */
_sram1_iram_start = 0x400a0000;
_sram1_iram_len = ( _iram_text_end > _sram1_iram_start) ? (_iram_text_end - _sram1_iram_start) : 0;
/* Heap ends at top of dram0_0_seg */
_eheap = 0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM;
_eheap = (_iram_text_end > _sram1_iram_start) ?
ALIGN(0x40000000 - _sram1_iram_len - 3, 4) - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM :
0x40000000 - CONFIG_ESP32_TRACEMEM_RESERVE_DRAM;
/* IRAM heap ends at top of dram0_0_seg */
_eiramheap = 0x400a0000;
_eiramheap = (_iram_text_end > _sram1_iram_start) ? ALIGN(_iram_text_end, 4) : 0x400a0000;
/* Mark the end of the RTC heap (top of the RTC region) */
boards/xtensa/esp32/common/scripts/mcuboot_sections.ld
+22 -6
View File
@@ -63,8 +63,16 @@ SECTIONS
{
. = ALIGN(4);
_srodata = ABSOLUTE(.);
*(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* esp32_start.*) .rodata)
*(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* esp32_start.*) .rodata.*)
*(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* esp32_start.*
*libarch.a:*esp_loader.*
*libarch.a:*uart_hal.*
*libarch.a:*mmu_hal.*
) .rodata)
*(EXCLUDE_FILE (*libarch.a:esp32_spiflash.* esp32_start.*
*libarch.a:*esp_loader.*
*libarch.a:*uart_hal.*
*libarch.a:*mmu_hal.*
) .rodata.*)
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
*(.gnu.linkonce.r.*)
*(.rodata1)
@@ -157,12 +165,15 @@ SECTIONS
_iram_text_start = ABSOLUTE(.);
*(.iram1 .iram1.*)
esp32_start.*(.literal .text .literal.* .text.*)
*libphy.a:(.literal .text .literal.* .text.*)
*librtc.a:(.literal .text .literal.* .text.*)
*libpp.a:(.literal .text .literal.* .text.*)
*libhal.a:(.literal .text .literal.* .text.*)
*libarch.a:esp32_spiflash.*(.literal .text .literal.* .text.*)
esp32_start.*(.literal .text .literal.* .text.*)
*libarch.a:*mmu_hal.*(.text .text.* .literal .literal.*)
*libarch.a:*uart_hal.*(.text .text.* .literal .literal.*)
*libarch.a:*esp_loader.*(.text .text.* .literal .literal.*)
*(.wifirxiram .wifirxiram.*)
*(.wifirxiram .wifi0iram.*)
*(.wifislpiram .wifislpiram.*)
@@ -183,6 +194,7 @@ SECTIONS
/* .bss initialized on power-up */
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
_sbss = ABSOLUTE(.);
*(.dynsbss)
*(.sbss)
@@ -200,6 +212,7 @@ SECTIONS
*(COMMON)
. = ALIGN(8);
_ebss = ABSOLUTE(.);
_bss_end = ABSOLUTE(.);
} >dram0_0_seg
.noinit (NOLOAD):
@@ -231,8 +244,11 @@ SECTIONS
KEEP (*(.gnu.linkonce.s2.*))
KEEP (*(.jcr))
*(.dram1 .dram1.*)
*libarch.a:esp32_spiflash.*(.rodata .rodata.*)
esp32_start.*(.rodata .rodata.*)
*libarch.a:esp32_spiflash.*(.rodata .rodata.*)
*libarch.a:*esp_loader.*(.rodata .rodata.*)
*libarch.a:*mmu_hal.*(.rodata .rodata.*)
*libarch.a:*uart_hal.*(.rodata .rodata.*)
_edata = ABSOLUTE(.);
. = ALIGN(4);
@@ -256,7 +272,7 @@ SECTIONS
_image_irom_size = LOADADDR(.flash.text) + SIZEOF(.flash.text) - _image_irom_lma;
/* The alignment of the ".flash.text" output section is forced to
* 0x0000FFFF (64KB) to ensure that it will be allocated at the beginning
* 0x00010000 (64KB) to ensure that it will be allocated at the beginning
* of the next available Flash block.
* This is required to meet the following constraint from the external
* flash MMU:
@@ -266,7 +282,7 @@ SECTIONS
* be equal.
*/
.flash.text : ALIGN(0x0000FFFF)
.flash.text : ALIGN(0x00010000)
{
_stext = .;
_text_start = ABSOLUTE(.);
boards/xtensa/esp32/common/scripts/simple_boot_sections.ld
+539
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File diff suppressed because it is too large Load Diff
boards/xtensa/esp32/esp32-2432S028/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/esp32-audio-kit/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/esp32-devkitc/configs/knsh/defconfig
-1
View File
@@ -26,7 +26,6 @@ CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ESP32_BOOTLOADER_BUILD_FROM_SOURCE=y
CONFIG_ESP32_PID=y
CONFIG_ESP32_UART0=y
CONFIG_EXPERIMENTAL=y
boards/xtensa/esp32/esp32-devkitc/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/esp32-ethernet-kit/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/esp32-lyrat/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/esp32-pico-kit/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/esp32-sparrow-kit/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/esp32-wrover-kit/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/lilygo_tbeam_lora_gps/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/ttgo_eink5_v2/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/ttgo_lora_esp32/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif
boards/xtensa/esp32/ttgo_t_display_esp32/scripts/Make.defs
+2
View File
@@ -36,6 +36,8 @@ else
ifeq ($(CONFIG_ESP32_APP_FORMAT_MCUBOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,mcuboot_sections.ld)
else ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
ARCHSCRIPT += $(call FINDSCRIPT,simple_boot_sections.ld)
else
ARCHSCRIPT += $(call FINDSCRIPT,legacy_sections.ld)
endif