diff --git a/arch/arm/src/stm32/chip.h b/arch/arm/src/stm32/chip.h index c80ea97c20d..c58331d7b60 100755 --- a/arch/arm/src/stm32/chip.h +++ b/arch/arm/src/stm32/chip.h @@ -54,17 +54,17 @@ # undef CONFIG_STM32_MEDIUMDENSITY /* STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */ # define CONFIG_STM32_HIGHDENSITY 1 /* STM32F101x and STM32F103x w/ 256/512 Kbytes */ # undef CONFIG_STM32_CONNECTIVITYLINE /* STM32F105x and STM32F107x */ -# define STM32_NATIM 2 /* Advanced timers TIM1,8 */ +# define STM32_NATIM 1 /* One advanced timers TIM1 */ # define STM32_NGTIM 4 /* General timers TIM2,3,4,5 */ -# define STM32 NBTIM 2 /* Basic timers TIM6,7 */ -# define STM32_NSPI 1 /* SPI1 */ -# define STM32_NUSART 5 /* USART1-3, UART4-5 */ +# define STM32 NBTIM 0 /* No basic timers */ +# define STM32_NSPI 2 /* SPI1-2 */ +# define STM32_NUSART 3 /* USART1-3 */ # define STM32_NI2C 2 /* I2C1-2 */ # define STM32_NCAN 1 /* bxCAN1 */ # define STM32_NSDIO 1 /* 1 */ # define STM32_NGPIO 112 /* GPIOA-G */ -# define STM32_NADC 3 /* ADC 1-3 */ -# define STM32_NDAC 2 /* No DAC */ +# define STM32_NADC 1 /* ADC1 */ +# define STM32_NDAC 0 /* No DAC */ # define STM32_NCRC 0 /* No CRC */ # define STM32_NTHERNET 0 /* No ethernet */ #else diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c index 33c4296aa64..3d849f96a65 100755 --- a/arch/arm/src/stm32/stm32_gpio.c +++ b/arch/arm/src/stm32/stm32_gpio.c @@ -40,6 +40,7 @@ #include #include #include +#include #include "up_arch.h" #include "chip.h" diff --git a/configs/stm3210e-eval/README.txt b/configs/stm3210e-eval/README.txt index 51e86d61990..01f9173cda9 100755 --- a/configs/stm3210e-eval/README.txt +++ b/configs/stm3210e-eval/README.txt @@ -118,6 +118,15 @@ NuttX buildroot Toolchain detailed PLUS some special instructions that you will need to follow if you are building a Cortex-M3 toolchain for Cygwin under Windows. +DFU +^^^ + + The linker files in these projects assume that you will be loading code + using STMicro built in USB DFU loader. In this case, the code will not + be positioned at the beginning of FLASH (0x80000000) but will be offset + to 0x08030000. If you need to change that origin, you will need to + edit the file(s) ld.script for each configuration. + STM3210E-EVAL-specific Configuration Options ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/configs/stm3210e-eval/ostest/defconfig b/configs/stm3210e-eval/ostest/defconfig index d73d0d98345..0a71545caf2 100755 --- a/configs/stm3210e-eval/ostest/defconfig +++ b/configs/stm3210e-eval/ostest/defconfig @@ -214,9 +214,9 @@ CONFIG_SSI_POLLWAIT=y # CONFIG_HAVE_LIBM - toolchain supports libm.a # CONFIG_RRLOAD_BINARY=n -CONFIG_INTELHEX_BINARY=n +CONFIG_INTELHEX_BINARY=y CONFIG_MOTOROLA_SREC=n -CONFIG_RAW_BINARY=y +CONFIG_RAW_BINARY=n CONFIG_HAVE_LIBM=n # diff --git a/configs/stm3210e-eval/ostest/ld.script b/configs/stm3210e-eval/ostest/ld.script index 0e318f7ccdd..15db8dd0dda 100755 --- a/configs/stm3210e-eval/ostest/ld.script +++ b/configs/stm3210e-eval/ostest/ld.script @@ -34,12 +34,14 @@ ****************************************************************************/ /* The STM32F103ZET6 has 512Kb of FLASH beginning at address 0x0800:0000 and - * 64Kb of SRAM beginning at address 0x2000:0000 + * 64Kb of SRAM beginning at address 0x2000:0000. Here we assume that the + * STM3210E-EVAL's DFU bootloader is being used. In that case, the corrct + * load .text load address is 0x08030000 (leaving 320Kb). */ MEMORY { - flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K + flash (rx) : ORIGIN = 0x08030000, LENGTH = 320K sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K }