From 588d2b506f6d051fbae6875a4ed7a5f4ed545ccf Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 21 Dec 2016 08:04:15 -0600 Subject: [PATCH] Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem. --- arch/xtensa/include/xtensa/xtensa_coproc.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/xtensa/include/xtensa/xtensa_coproc.h b/arch/xtensa/include/xtensa/xtensa_coproc.h index 54794447034..26829a7a3a4 100644 --- a/arch/xtensa/include/xtensa/xtensa_coproc.h +++ b/arch/xtensa/include/xtensa/xtensa_coproc.h @@ -153,7 +153,8 @@ static inline uint32_t xtensa_get_cpenable(void) __asm__ __volatile__ ( - "rsr %0, CPENABLE" : "=r"(cpenable) + "\trsr %0, CPENABLE\n" + : "=r"(cpenable) ); return cpenable; @@ -165,7 +166,9 @@ static inline void xtensa_set_cpenable(uint32_t cpenable) { __asm__ __volatile__ ( - "wsr %0, PS" : : "r"(cpenable) + "\twsr %0, CPENABLE\n" + "\trsync\n" + : : "r"(cpenable) ); }