diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c index 747973afbdd..83e3cd68f34 100644 --- a/arch/xtensa/src/esp32/esp32_cpustart.c +++ b/arch/xtensa/src/esp32/esp32_cpustart.c @@ -105,7 +105,7 @@ static inline void xtensa_attach_fromcpu0_interrupt(void) /* Enable the inter 0 CPU interrupts. */ - up_enable_irq(cpuint); + up_enable_irq(ESP32_IRQ_CPU_CPU0); } #endif diff --git a/arch/xtensa/src/esp32/esp32_emac.c b/arch/xtensa/src/esp32/esp32_emac.c index ec2320ff989..1bf723f021f 100644 --- a/arch/xtensa/src/esp32/esp32_emac.c +++ b/arch/xtensa/src/esp32/esp32_emac.c @@ -1315,7 +1315,7 @@ static void emac_txtimeout_expiry(wdparm_t arg) * Interrupts will be re-enabled when emac_ifup() is called. */ - up_disable_irq(priv->cpuint); + up_disable_irq(ESP32_IRQ_EMAC); /* Schedule to perform the TX timeout processing on the worker thread, * perhaps canceling any pending IRQ processing. @@ -1904,7 +1904,7 @@ static int emac_ifup(struct net_driver_s *dev) /* Enable the Ethernet interrupt */ - up_enable_irq(priv->cpuint); + up_enable_irq(ESP32_IRQ_EMAC); leave_critical_section(flags); diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c index 7a36607f43e..af75aeabfcb 100644 --- a/arch/xtensa/src/esp32/esp32_gpio.c +++ b/arch/xtensa/src/esp32/esp32_gpio.c @@ -426,7 +426,7 @@ void esp32_gpioirqinitialize(void) /* Attach and enable the interrupt handler */ DEBUGVERIFY(irq_attach(ESP32_IRQ_CPU_GPIO, gpio_interrupt, NULL)); - up_enable_irq(g_gpio_cpuint); + up_enable_irq(ESP32_IRQ_CPU_GPIO); } #endif @@ -456,7 +456,7 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype) /* Get the address of the GPIO PIN register for this pin */ - up_disable_irq(g_gpio_cpuint); + up_disable_irq(ESP32_IRQ_CPU_GPIO); regaddr = GPIO_REG(pin); regval = getreg32(regaddr); @@ -490,7 +490,7 @@ void esp32_gpioirqenable(int irq, gpio_intrtype_t intrtype) regval |= (intrtype << GPIO_PIN_INT_TYPE_S); putreg32(regval, regaddr); - up_enable_irq(g_gpio_cpuint); + up_enable_irq(ESP32_IRQ_CPU_GPIO); } #endif @@ -517,14 +517,14 @@ void esp32_gpioirqdisable(int irq) /* Get the address of the GPIO PIN register for this pin */ - up_disable_irq(g_gpio_cpuint); + up_disable_irq(ESP32_IRQ_CPU_GPIO); regaddr = GPIO_REG(pin); regval = getreg32(regaddr); regval &= ~(GPIO_PIN_INT_ENA_M | GPIO_PIN_INT_TYPE_M); putreg32(regval, regaddr); - up_enable_irq(g_gpio_cpuint); + up_enable_irq(ESP32_IRQ_CPU_GPIO); } #endif diff --git a/arch/xtensa/src/esp32/esp32_i2c.c b/arch/xtensa/src/esp32/esp32_i2c.c index 4c399f69b2e..4c417334c59 100644 --- a/arch/xtensa/src/esp32/esp32_i2c.c +++ b/arch/xtensa/src/esp32/esp32_i2c.c @@ -1580,7 +1580,7 @@ FAR struct i2c_master_s *esp32_i2cbus_initialize(int port) return NULL; } - up_enable_irq(priv->cpuint); + up_enable_irq(config->irq); #endif esp32_i2c_sem_init(priv); @@ -1623,7 +1623,7 @@ int esp32_i2cbus_uninitialize(FAR struct i2c_master_s *dev) leave_critical_section(flags); #ifndef CONFIG_I2C_POLLED - up_disable_irq(priv->cpuint); + up_disable_irq(priv->config->irq); esp32_detach_peripheral(priv->cpu, priv->config->periph, priv->cpuint); diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c index de011769e5b..cdbc865d794 100644 --- a/arch/xtensa/src/esp32/esp32_irq.c +++ b/arch/xtensa/src/esp32/esp32_irq.c @@ -147,7 +147,7 @@ static inline void xtensa_attach_fromcpu1_interrupt(void) /* Enable the inter 0 CPU interrupt. */ - up_enable_irq(cpuint); + up_enable_irq(ESP32_IRQ_CPU_CPU1); } #endif diff --git a/arch/xtensa/src/esp32/esp32_serial.c b/arch/xtensa/src/esp32/esp32_serial.c index 659ea2f7de9..ca750228339 100644 --- a/arch/xtensa/src/esp32/esp32_serial.c +++ b/arch/xtensa/src/esp32/esp32_serial.c @@ -1041,7 +1041,7 @@ static int esp32_attach(struct uart_dev_s *dev) * in the UART */ - up_enable_irq(priv->cpuint); + up_enable_irq(priv->config->irq); } return ret; @@ -1063,7 +1063,7 @@ static void esp32_detach(struct uart_dev_s *dev) /* Disable and detach the CPU interrupt */ - up_disable_irq(priv->cpuint); + up_disable_irq(priv->config->irq); irq_detach(priv->config->irq); /* Disassociate the peripheral interrupt from the CPU interrupt */ @@ -1133,6 +1133,8 @@ static void dma_attach(uint8_t dma_chan) int dma_cpuint; int cpu; int ret; + int periph; + int irq; /* Clear the interrupts */ @@ -1159,20 +1161,22 @@ static void dma_attach(uint8_t dma_chan) if (dma_chan == 0) { - esp32_attach_peripheral(cpu, ESP32_PERIPH_UHCI0, dma_cpuint); - ret = irq_attach(ESP32_IRQ_UHCI0, esp32_interrupt_dma, NULL); + periph = ESP32_PERIPH_UHCI0; + irq = ESP32_IRQ_UHCI0; } else { - esp32_attach_peripheral(cpu, ESP32_PERIPH_UHCI1, dma_cpuint); - ret = irq_attach(ESP32_IRQ_UHCI1, esp32_interrupt_dma, NULL); + periph = ESP32_PERIPH_UHCI1; + irq = ESP32_IRQ_UHCI1; } + esp32_attach_peripheral(cpu, periph, dma_cpuint); + ret = irq_attach(irq, esp32_interrupt_dma, NULL); if (ret == OK) { /* Enable the CPU interrupt */ - up_enable_irq(dma_cpuint); + up_enable_irq(irq); } else { diff --git a/arch/xtensa/src/esp32/esp32_spi.c b/arch/xtensa/src/esp32/esp32_spi.c index bac7e46b4c2..1637ea0b53f 100644 --- a/arch/xtensa/src/esp32/esp32_spi.c +++ b/arch/xtensa/src/esp32/esp32_spi.c @@ -1489,7 +1489,7 @@ FAR struct spi_dev_s *esp32_spibus_initialize(int port) return NULL; } - up_enable_irq(priv->cpuint); + up_enable_irq(priv->config->irq); } esp32_spi_init(spi_dev); @@ -1533,7 +1533,7 @@ int esp32_spibus_uninitialize(FAR struct spi_dev_s *dev) if (priv->config->use_dma) { - up_disable_irq(priv->cpuint); + up_disable_irq(priv->config->irq); esp32_detach_peripheral(priv->cpu, priv->config->periph, priv->cpuint); diff --git a/arch/xtensa/src/esp32/esp32_spi_slave.c b/arch/xtensa/src/esp32/esp32_spi_slave.c index bd463ab8e34..a42c9a14423 100644 --- a/arch/xtensa/src/esp32/esp32_spi_slave.c +++ b/arch/xtensa/src/esp32/esp32_spi_slave.c @@ -1027,7 +1027,7 @@ static void esp32_spislv_bind(struct spi_slave_ctrlr_s *ctrlr, esp32_spislv_setmode(ctrlr, mode); esp32_spislv_setbits(ctrlr, nbits); - up_enable_irq(priv->cpuint); + up_enable_irq(priv->config->irq); esp32_spi_set_regbits(priv, SPI_CMD_OFFSET, SPI_USR_M); @@ -1063,7 +1063,7 @@ static void esp32_spislv_unbind(struct spi_slave_ctrlr_s *ctrlr) flags = enter_critical_section(); - up_disable_irq(priv->cpuint); + up_disable_irq(priv->config->irq); esp32_gpioirqdisable(ESP32_PIN2IRQ(priv->config->cs_pin)); esp32_spi_reset_regbits(priv, SPI_SLAVE_OFFSET, SPI_INT_EN_M); @@ -1365,7 +1365,7 @@ int esp32_spislv_ctrlr_uninitialize(FAR struct spi_slave_ctrlr_s *ctrlr) return OK; } - up_disable_irq(priv->cpuint); + up_disable_irq(priv->config->irq); esp32_detach_peripheral(priv->cpu, priv->config->periph, priv->cpuint); diff --git a/arch/xtensa/src/esp32/esp32_tickless.c b/arch/xtensa/src/esp32/esp32_tickless.c index 382c82c0d59..1b7058856d7 100644 --- a/arch/xtensa/src/esp32/esp32_tickless.c +++ b/arch/xtensa/src/esp32/esp32_tickless.c @@ -499,7 +499,7 @@ void up_timer_initialize(void) /* Enable the timer 0 CPU interrupt. */ - up_enable_irq(ESP32_CPUINT_TIMER0); + up_enable_irq(XTENSA_IRQ_TIMER0); return; } @@ -586,4 +586,4 @@ void IRAM_ATTR up_step_idletime(uint32_t us) leave_critical_section(flags); } -#endif /* CONFIG_SCHED_TICKLESS */ \ No newline at end of file +#endif /* CONFIG_SCHED_TICKLESS */ diff --git a/arch/xtensa/src/esp32/esp32_tim.c b/arch/xtensa/src/esp32/esp32_tim.c index e62973d10b7..85f111aa365 100644 --- a/arch/xtensa/src/esp32/esp32_tim.c +++ b/arch/xtensa/src/esp32/esp32_tim.c @@ -528,7 +528,7 @@ static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, * CPU Interrupt */ - up_disable_irq(tim->cpuint); + up_disable_irq(tim->irq); esp32_detach_peripheral(tim->core, tim->periph, tim->cpuint); esp32_free_cpuint(tim->cpuint); irq_detach(tim->irq); @@ -545,7 +545,7 @@ static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, { /* Disable the previous CPU Interrupt */ - up_disable_irq(tim->cpuint); + up_disable_irq(tim->irq); /* Free cpu interrupt * because we will get another from esp32_alloc_levelint @@ -585,7 +585,7 @@ static int esp32_tim_setisr(FAR struct esp32_tim_dev_s *dev, xcpt_t handler, /* Enable the CPU Interrupt that is linked to the timer */ - up_enable_irq(tim->cpuint); + up_enable_irq(tim->irq); } errout: diff --git a/arch/xtensa/src/esp32/esp32_timerisr.c b/arch/xtensa/src/esp32/esp32_timerisr.c index 01e3fee7379..f191068a3b7 100644 --- a/arch/xtensa/src/esp32/esp32_timerisr.c +++ b/arch/xtensa/src/esp32/esp32_timerisr.c @@ -135,5 +135,5 @@ void up_timer_initialize(void) /* Enable the timer 0 CPU interrupt. */ - up_enable_irq(ESP32_CPUINT_TIMER0); + up_enable_irq(XTENSA_IRQ_TIMER0); } diff --git a/arch/xtensa/src/esp32/esp32_wdt.c b/arch/xtensa/src/esp32/esp32_wdt.c index ef40840b67e..886b4c072ed 100644 --- a/arch/xtensa/src/esp32/esp32_wdt.c +++ b/arch/xtensa/src/esp32/esp32_wdt.c @@ -726,7 +726,7 @@ static int esp32_wdt_setisr(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler, * CPU Interrupt */ - up_disable_irq(wdt->cpuint); + up_disable_irq(wdt->irq); esp32_detach_peripheral(wdt->cpu, wdt->periph, wdt->cpuint); esp32_free_cpuint(wdt->cpuint); irq_detach(wdt->irq); @@ -772,7 +772,7 @@ static int esp32_wdt_setisr(FAR struct esp32_wdt_dev_s *dev, xcpt_t handler, /* Enable the CPU Interrupt that is linked to the wdt */ - up_enable_irq(wdt->cpuint); + up_enable_irq(wdt->irq); } errout: diff --git a/arch/xtensa/src/esp32/esp32_wifi_adapter.c b/arch/xtensa/src/esp32/esp32_wifi_adapter.c index 056afab9db0..985ab28a1fa 100644 --- a/arch/xtensa/src/esp32/esp32_wifi_adapter.c +++ b/arch/xtensa/src/esp32/esp32_wifi_adapter.c @@ -844,7 +844,7 @@ static void esp32_ints_on(uint32_t mask) wlinfo("INFO mask=%08x irq=%d\n", mask, irq); - up_enable_irq(irq); + up_enable_irq(ESP32_IRQ_MAC); } /**************************************************************************** @@ -867,7 +867,7 @@ static void esp32_ints_off(uint32_t mask) wlinfo("INFO mask=%08x irq=%d\n", mask, irq); - up_disable_irq(irq); + up_disable_irq(ESP32_IRQ_MAC); } /****************************************************************************